sdm660-internal.c 90 KB

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  1. /* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/of_gpio.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/module.h>
  15. #include <sound/pcm_params.h>
  16. #include "msm-pcm-routing-v2.h"
  17. #include "sdm660-common.h"
  18. #include "codecs/msm-cdc-pinctrl.h"
  19. #include "codecs/sdm660_cdc/msm-digital-cdc.h"
  20. #include "codecs/sdm660_cdc/msm-analog-cdc.h"
  21. #include "codecs/msm_sdw/msm_sdw.h"
  22. #define __CHIPSET__ "SDM660 "
  23. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  24. #define WCD_MBHC_DEF_RLOADS 5
  25. #define WCN_CDC_SLIM_RX_CH_MAX 2
  26. #define WCN_CDC_SLIM_TX_CH_MAX 3
  27. #define WSA8810_NAME_1 "wsa881x.20170211"
  28. #define WSA8810_NAME_2 "wsa881x.20170212"
  29. enum {
  30. INT0_MI2S = 0,
  31. INT1_MI2S,
  32. INT2_MI2S,
  33. INT3_MI2S,
  34. INT4_MI2S,
  35. INT5_MI2S,
  36. INT6_MI2S,
  37. INT_MI2S_MAX,
  38. };
  39. enum {
  40. BT_SLIM7,
  41. FM_SLIM8,
  42. SLIM_MAX,
  43. };
  44. /*TDM default offset currently only supporting TDM_RX_0 and TDM_TX_0 */
  45. static unsigned int tdm_slot_offset[TDM_PORT_MAX][TDM_SLOT_OFFSET_MAX] = {
  46. {0, 4, 8, 12, 16, 20, 24, 28},/* TX_0 | RX_0 */
  47. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_1 | RX_1 */
  48. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_2 | RX_2 */
  49. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_3 | RX_3 */
  50. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_4 | RX_4 */
  51. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_5 | RX_5 */
  52. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_6 | RX_6 */
  53. {AFE_SLOT_MAPPING_OFFSET_INVALID},/* TX_7 | RX_7 */
  54. };
  55. static struct afe_clk_set int_mi2s_clk[INT_MI2S_MAX] = {
  56. {
  57. AFE_API_VERSION_I2S_CONFIG,
  58. Q6AFE_LPASS_CLK_ID_INT0_MI2S_IBIT,
  59. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  60. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  61. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  62. 0,
  63. },
  64. {
  65. AFE_API_VERSION_I2S_CONFIG,
  66. Q6AFE_LPASS_CLK_ID_INT1_MI2S_IBIT,
  67. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  68. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  69. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  70. 0,
  71. },
  72. {
  73. AFE_API_VERSION_I2S_CONFIG,
  74. Q6AFE_LPASS_CLK_ID_INT2_MI2S_IBIT,
  75. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  76. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  77. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  78. 0,
  79. },
  80. {
  81. AFE_API_VERSION_I2S_CONFIG,
  82. Q6AFE_LPASS_CLK_ID_INT3_MI2S_IBIT,
  83. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  84. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  85. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  86. 0,
  87. },
  88. {
  89. AFE_API_VERSION_I2S_CONFIG,
  90. Q6AFE_LPASS_CLK_ID_INT4_MI2S_IBIT,
  91. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  92. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  93. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  94. 0,
  95. },
  96. {
  97. AFE_API_VERSION_I2S_CONFIG,
  98. Q6AFE_LPASS_CLK_ID_INT5_MI2S_IBIT,
  99. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  100. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  101. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  102. 0,
  103. },
  104. {
  105. AFE_API_VERSION_I2S_CONFIG,
  106. Q6AFE_LPASS_CLK_ID_INT6_MI2S_IBIT,
  107. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  108. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  109. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  110. 0,
  111. },
  112. };
  113. struct dev_config {
  114. u32 sample_rate;
  115. u32 bit_format;
  116. u32 channels;
  117. };
  118. /* Default configuration of MI2S channels */
  119. static struct dev_config int_mi2s_cfg[] = {
  120. [INT0_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  121. [INT1_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  122. [INT2_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  123. [INT3_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  124. [INT4_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  125. [INT5_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  126. [INT6_MI2S] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  127. };
  128. static struct dev_config bt_fm_cfg[] = {
  129. [BT_SLIM7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  130. [FM_SLIM8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  131. };
  132. static char const *int_mi2s_rate_text[] = {"KHZ_8", "KHZ_16",
  133. "KHZ_32", "KHZ_44P1", "KHZ_48",
  134. "KHZ_96", "KHZ_192"};
  135. static const char *const int_mi2s_ch_text[] = {"One", "Two"};
  136. static const char *const int_mi2s_tx_ch_text[] = {"One", "Two",
  137. "Three", "Four"};
  138. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE"};
  139. static const char *const loopback_mclk_text[] = {"DISABLE", "ENABLE"};
  140. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_48"};
  141. static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_sample_rate, int_mi2s_rate_text);
  142. static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_chs, int_mi2s_ch_text);
  143. static SOC_ENUM_SINGLE_EXT_DECL(int0_mi2s_rx_format, bit_format_text);
  144. static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_sample_rate, int_mi2s_rate_text);
  145. static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_chs, int_mi2s_tx_ch_text);
  146. static SOC_ENUM_SINGLE_EXT_DECL(int2_mi2s_tx_format, bit_format_text);
  147. static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_sample_rate, int_mi2s_rate_text);
  148. static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_chs, int_mi2s_tx_ch_text);
  149. static SOC_ENUM_SINGLE_EXT_DECL(int3_mi2s_tx_format, bit_format_text);
  150. static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_sample_rate, int_mi2s_rate_text);
  151. static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_chs, int_mi2s_ch_text);
  152. static SOC_ENUM_SINGLE_EXT_DECL(int4_mi2s_rx_format, bit_format_text);
  153. static SOC_ENUM_SINGLE_EXT_DECL(int5_mi2s_tx_chs, int_mi2s_ch_text);
  154. static SOC_ENUM_SINGLE_EXT_DECL(loopback_mclk_en, loopback_mclk_text);
  155. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  156. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  157. struct snd_kcontrol *kcontrol, int event);
  158. static int msm_int_enable_dig_cdc_clk(struct snd_soc_codec *codec, int enable,
  159. bool dapm);
  160. static int msm_int_mclk0_event(struct snd_soc_dapm_widget *w,
  161. struct snd_kcontrol *kcontrol, int event);
  162. static int msm_int_mi2s_snd_startup(struct snd_pcm_substream *substream);
  163. static void msm_int_mi2s_snd_shutdown(struct snd_pcm_substream *substream);
  164. static struct wcd_mbhc_config *mbhc_cfg_ptr;
  165. static struct snd_info_entry *codec_root;
  166. static int int_mi2s_get_bit_format_val(int bit_format)
  167. {
  168. int val = 0;
  169. switch (bit_format) {
  170. case SNDRV_PCM_FORMAT_S24_3LE:
  171. val = 2;
  172. break;
  173. case SNDRV_PCM_FORMAT_S24_LE:
  174. val = 1;
  175. break;
  176. case SNDRV_PCM_FORMAT_S16_LE:
  177. default:
  178. val = 0;
  179. break;
  180. }
  181. return val;
  182. }
  183. static int int_mi2s_get_bit_format(int val)
  184. {
  185. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  186. switch (val) {
  187. case 0:
  188. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  189. break;
  190. case 1:
  191. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  192. break;
  193. case 2:
  194. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  195. break;
  196. default:
  197. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  198. break;
  199. }
  200. return bit_fmt;
  201. }
  202. static int int_mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  203. {
  204. int port_id = 0;
  205. if (strnstr(kcontrol->id.name, "INT0_MI2S", sizeof("INT0_MI2S")))
  206. port_id = INT0_MI2S;
  207. else if (strnstr(kcontrol->id.name, "INT2_MI2S", sizeof("INT2_MI2S")))
  208. port_id = INT2_MI2S;
  209. else if (strnstr(kcontrol->id.name, "INT3_MI2S", sizeof("INT3_MI2S")))
  210. port_id = INT3_MI2S;
  211. else if (strnstr(kcontrol->id.name, "INT4_MI2S", sizeof("INT4_MI2S")))
  212. port_id = INT4_MI2S;
  213. else {
  214. pr_err("%s: unsupported channel: %s",
  215. __func__, kcontrol->id.name);
  216. return -EINVAL;
  217. }
  218. return port_id;
  219. }
  220. static int int_mi2s_bit_format_get(struct snd_kcontrol *kcontrol,
  221. struct snd_ctl_elem_value *ucontrol)
  222. {
  223. int ch_num = int_mi2s_get_port_idx(kcontrol);
  224. if (ch_num < 0)
  225. return ch_num;
  226. ucontrol->value.enumerated.item[0] =
  227. int_mi2s_get_bit_format_val(int_mi2s_cfg[ch_num].bit_format);
  228. pr_debug("%s: int_mi2s[%d]_bit_format = %d, ucontrol value = %d\n",
  229. __func__, ch_num, int_mi2s_cfg[ch_num].bit_format,
  230. ucontrol->value.enumerated.item[0]);
  231. return 0;
  232. }
  233. static int int_mi2s_bit_format_put(struct snd_kcontrol *kcontrol,
  234. struct snd_ctl_elem_value *ucontrol)
  235. {
  236. int ch_num = int_mi2s_get_port_idx(kcontrol);
  237. if (ch_num < 0)
  238. return ch_num;
  239. int_mi2s_cfg[ch_num].bit_format =
  240. int_mi2s_get_bit_format(ucontrol->value.enumerated.item[0]);
  241. pr_debug("%s: int_mi2s[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  242. __func__, ch_num, int_mi2s_cfg[ch_num].bit_format,
  243. ucontrol->value.enumerated.item[0]);
  244. return 0;
  245. }
  246. static inline int param_is_mask(int p)
  247. {
  248. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  249. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  250. }
  251. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  252. int n)
  253. {
  254. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  255. }
  256. static void param_set_mask(struct snd_pcm_hw_params *p, int n, unsigned int bit)
  257. {
  258. if (bit >= SNDRV_MASK_MAX)
  259. return;
  260. if (param_is_mask(n)) {
  261. struct snd_mask *m = param_to_mask(p, n);
  262. m->bits[0] = 0;
  263. m->bits[1] = 0;
  264. m->bits[bit >> 5] |= (1 << (bit & 31));
  265. }
  266. }
  267. static int int_mi2s_get_sample_rate_val(int sample_rate)
  268. {
  269. int sample_rate_val;
  270. switch (sample_rate) {
  271. case SAMPLING_RATE_8KHZ:
  272. sample_rate_val = 0;
  273. break;
  274. case SAMPLING_RATE_16KHZ:
  275. sample_rate_val = 1;
  276. break;
  277. case SAMPLING_RATE_32KHZ:
  278. sample_rate_val = 2;
  279. break;
  280. case SAMPLING_RATE_44P1KHZ:
  281. sample_rate_val = 3;
  282. break;
  283. case SAMPLING_RATE_48KHZ:
  284. sample_rate_val = 4;
  285. break;
  286. case SAMPLING_RATE_96KHZ:
  287. sample_rate_val = 5;
  288. break;
  289. case SAMPLING_RATE_192KHZ:
  290. sample_rate_val = 6;
  291. break;
  292. default:
  293. sample_rate_val = 4;
  294. break;
  295. }
  296. return sample_rate_val;
  297. }
  298. static int int_mi2s_get_sample_rate(int value)
  299. {
  300. int sample_rate;
  301. switch (value) {
  302. case 0:
  303. sample_rate = SAMPLING_RATE_8KHZ;
  304. break;
  305. case 1:
  306. sample_rate = SAMPLING_RATE_16KHZ;
  307. break;
  308. case 2:
  309. sample_rate = SAMPLING_RATE_32KHZ;
  310. break;
  311. case 3:
  312. sample_rate = SAMPLING_RATE_44P1KHZ;
  313. break;
  314. case 4:
  315. sample_rate = SAMPLING_RATE_48KHZ;
  316. break;
  317. case 5:
  318. sample_rate = SAMPLING_RATE_96KHZ;
  319. break;
  320. case 6:
  321. sample_rate = SAMPLING_RATE_192KHZ;
  322. break;
  323. default:
  324. sample_rate = SAMPLING_RATE_48KHZ;
  325. break;
  326. }
  327. return sample_rate;
  328. }
  329. static int int_mi2s_sample_rate_put(struct snd_kcontrol *kcontrol,
  330. struct snd_ctl_elem_value *ucontrol)
  331. {
  332. int idx = int_mi2s_get_port_idx(kcontrol);
  333. if (idx < 0)
  334. return idx;
  335. int_mi2s_cfg[idx].sample_rate =
  336. int_mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  337. pr_debug("%s: idx[%d]_sample_rate = %d, item = %d\n", __func__,
  338. idx, int_mi2s_cfg[idx].sample_rate,
  339. ucontrol->value.enumerated.item[0]);
  340. return 0;
  341. }
  342. static int int_mi2s_sample_rate_get(struct snd_kcontrol *kcontrol,
  343. struct snd_ctl_elem_value *ucontrol)
  344. {
  345. int idx = int_mi2s_get_port_idx(kcontrol);
  346. if (idx < 0)
  347. return idx;
  348. ucontrol->value.enumerated.item[0] =
  349. int_mi2s_get_sample_rate_val(int_mi2s_cfg[idx].sample_rate);
  350. pr_debug("%s: idx[%d]_sample_rate = %d, item = %d\n", __func__,
  351. idx, int_mi2s_cfg[idx].sample_rate,
  352. ucontrol->value.enumerated.item[0]);
  353. return 0;
  354. }
  355. static int int_mi2s_ch_get(struct snd_kcontrol *kcontrol,
  356. struct snd_ctl_elem_value *ucontrol)
  357. {
  358. int idx = int_mi2s_get_port_idx(kcontrol);
  359. if (idx < 0)
  360. return idx;
  361. pr_debug("%s: int_mi2s_[%d]_rx_ch = %d\n", __func__,
  362. idx, int_mi2s_cfg[idx].channels);
  363. ucontrol->value.enumerated.item[0] = int_mi2s_cfg[idx].channels - 1;
  364. return 0;
  365. }
  366. static int int_mi2s_ch_put(struct snd_kcontrol *kcontrol,
  367. struct snd_ctl_elem_value *ucontrol)
  368. {
  369. int idx = int_mi2s_get_port_idx(kcontrol);
  370. if (idx < 0)
  371. return idx;
  372. int_mi2s_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  373. pr_debug("%s: int_mi2s_[%d]_ch = %d\n", __func__,
  374. idx, int_mi2s_cfg[idx].channels);
  375. return 1;
  376. }
  377. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  378. SND_SOC_DAPM_SUPPLY_S("INT_MCLK0", -1, SND_SOC_NOPM, 0, 0,
  379. msm_int_mclk0_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  380. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  381. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  382. SND_SOC_DAPM_MIC("Secondary Mic", NULL),
  383. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  384. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  385. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  386. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  387. };
  388. static int msm_config_hph_compander_gpio(bool enable,
  389. struct snd_soc_codec *codec)
  390. {
  391. struct snd_soc_card *card = codec->component.card;
  392. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  393. int ret = 0;
  394. pr_debug("%s: %s HPH Compander\n", __func__,
  395. enable ? "Enable" : "Disable");
  396. if (enable) {
  397. ret = msm_cdc_pinctrl_select_active_state(pdata->comp_gpio_p);
  398. if (ret) {
  399. pr_err("%s: gpio set cannot be activated %s\n",
  400. __func__, "comp_gpio");
  401. goto done;
  402. }
  403. } else {
  404. ret = msm_cdc_pinctrl_select_sleep_state(pdata->comp_gpio_p);
  405. if (ret) {
  406. pr_err("%s: gpio set cannot be de-activated %s\n",
  407. __func__, "comp_gpio");
  408. goto done;
  409. }
  410. }
  411. done:
  412. return ret;
  413. }
  414. static int is_ext_spk_gpio_support(struct platform_device *pdev,
  415. struct msm_asoc_mach_data *pdata)
  416. {
  417. const char *spk_ext_pa = "qcom,msm-spk-ext-pa";
  418. pr_debug("%s:Enter\n", __func__);
  419. pdata->spk_ext_pa_gpio = of_get_named_gpio(pdev->dev.of_node,
  420. spk_ext_pa, 0);
  421. if (pdata->spk_ext_pa_gpio < 0) {
  422. dev_dbg(&pdev->dev,
  423. "%s: missing %s in dt node\n", __func__, spk_ext_pa);
  424. } else {
  425. if (!gpio_is_valid(pdata->spk_ext_pa_gpio)) {
  426. pr_err("%s: Invalid external speaker gpio: %d",
  427. __func__, pdata->spk_ext_pa_gpio);
  428. return -EINVAL;
  429. }
  430. }
  431. return 0;
  432. }
  433. static int enable_spk_ext_pa(struct snd_soc_codec *codec, int enable)
  434. {
  435. struct snd_soc_card *card = codec->component.card;
  436. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  437. int ret;
  438. if (!gpio_is_valid(pdata->spk_ext_pa_gpio)) {
  439. pr_err("%s: Invalid gpio: %d\n", __func__,
  440. pdata->spk_ext_pa_gpio);
  441. return false;
  442. }
  443. pr_debug("%s: %s external speaker PA\n", __func__,
  444. enable ? "Enable" : "Disable");
  445. if (enable) {
  446. ret = msm_cdc_pinctrl_select_active_state(
  447. pdata->ext_spk_gpio_p);
  448. if (ret) {
  449. pr_err("%s: gpio set cannot be de-activated %s\n",
  450. __func__, "ext_spk_gpio");
  451. return ret;
  452. }
  453. gpio_set_value_cansleep(pdata->spk_ext_pa_gpio, enable);
  454. } else {
  455. gpio_set_value_cansleep(pdata->spk_ext_pa_gpio, enable);
  456. ret = msm_cdc_pinctrl_select_sleep_state(
  457. pdata->ext_spk_gpio_p);
  458. if (ret) {
  459. pr_err("%s: gpio set cannot be de-activated %s\n",
  460. __func__, "ext_spk_gpio");
  461. return ret;
  462. }
  463. }
  464. return 0;
  465. }
  466. static int int_mi2s_get_idx_from_beid(int32_t id)
  467. {
  468. int idx = 0;
  469. switch (id) {
  470. case MSM_BACKEND_DAI_INT0_MI2S_RX:
  471. idx = INT0_MI2S;
  472. break;
  473. case MSM_BACKEND_DAI_INT2_MI2S_TX:
  474. idx = INT2_MI2S;
  475. break;
  476. case MSM_BACKEND_DAI_INT3_MI2S_TX:
  477. idx = INT3_MI2S;
  478. break;
  479. case MSM_BACKEND_DAI_INT4_MI2S_RX:
  480. idx = INT4_MI2S;
  481. break;
  482. case MSM_BACKEND_DAI_INT5_MI2S_TX:
  483. idx = INT5_MI2S;
  484. break;
  485. default:
  486. idx = INT0_MI2S;
  487. break;
  488. }
  489. return idx;
  490. }
  491. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  492. struct snd_pcm_hw_params *params)
  493. {
  494. struct snd_interval *rate = hw_param_interval(params,
  495. SNDRV_PCM_HW_PARAM_RATE);
  496. struct snd_interval *channels = hw_param_interval(params,
  497. SNDRV_PCM_HW_PARAM_CHANNELS);
  498. pr_debug("%s()\n", __func__);
  499. rate->min = rate->max = 48000;
  500. channels->min = channels->max = 2;
  501. return 0;
  502. }
  503. static int int_mi2s_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  504. struct snd_pcm_hw_params *params)
  505. {
  506. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  507. struct snd_interval *rate = hw_param_interval(params,
  508. SNDRV_PCM_HW_PARAM_RATE);
  509. struct snd_interval *channels = hw_param_interval(params,
  510. SNDRV_PCM_HW_PARAM_CHANNELS);
  511. int idx;
  512. pr_debug("%s: format = %d, rate = %d\n",
  513. __func__, params_format(params), params_rate(params));
  514. switch (dai_link->id) {
  515. case MSM_BACKEND_DAI_INT0_MI2S_RX:
  516. case MSM_BACKEND_DAI_INT2_MI2S_TX:
  517. case MSM_BACKEND_DAI_INT3_MI2S_TX:
  518. case MSM_BACKEND_DAI_INT4_MI2S_RX:
  519. case MSM_BACKEND_DAI_INT5_MI2S_TX:
  520. idx = int_mi2s_get_idx_from_beid(dai_link->id);
  521. rate->min = rate->max = int_mi2s_cfg[idx].sample_rate;
  522. channels->min = channels->max =
  523. int_mi2s_cfg[idx].channels;
  524. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  525. int_mi2s_cfg[idx].bit_format);
  526. break;
  527. default:
  528. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  529. break;
  530. }
  531. return 0;
  532. }
  533. static int msm_btfm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  534. struct snd_pcm_hw_params *params)
  535. {
  536. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  537. struct snd_interval *rate = hw_param_interval(params,
  538. SNDRV_PCM_HW_PARAM_RATE);
  539. struct snd_interval *channels = hw_param_interval(params,
  540. SNDRV_PCM_HW_PARAM_CHANNELS);
  541. switch (dai_link->id) {
  542. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  543. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  544. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  545. bt_fm_cfg[BT_SLIM7].bit_format);
  546. rate->min = rate->max = bt_fm_cfg[BT_SLIM7].sample_rate;
  547. channels->min = channels->max =
  548. bt_fm_cfg[BT_SLIM7].channels;
  549. break;
  550. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  551. rate->min = rate->max = bt_fm_cfg[FM_SLIM8].sample_rate;
  552. channels->min = channels->max =
  553. bt_fm_cfg[FM_SLIM8].channels;
  554. break;
  555. default:
  556. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  557. break;
  558. }
  559. return 0;
  560. }
  561. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  562. struct snd_ctl_elem_value *ucontrol)
  563. {
  564. ucontrol->value.integer.value[0] =
  565. (int_mi2s_cfg[INT5_MI2S].channels/2 - 1);
  566. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  567. ucontrol->value.integer.value[0]);
  568. return 0;
  569. }
  570. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  571. struct snd_ctl_elem_value *ucontrol)
  572. {
  573. int_mi2s_cfg[INT5_MI2S].channels =
  574. roundup_pow_of_two(ucontrol->value.integer.value[0] + 2);
  575. pr_debug("%s: msm_vi_feed_tx_ch = %d\n",
  576. __func__, int_mi2s_cfg[INT5_MI2S].channels);
  577. return 1;
  578. }
  579. static int msm_int_enable_dig_cdc_clk(struct snd_soc_codec *codec,
  580. int enable, bool dapm)
  581. {
  582. int ret = 0;
  583. struct msm_asoc_mach_data *pdata = NULL;
  584. int clk_freq_in_hz;
  585. bool int_mclk0_freq_chg = false;
  586. pdata = snd_soc_card_get_drvdata(codec->component.card);
  587. pr_debug("%s: enable %d mclk ref counter %d\n",
  588. __func__, enable,
  589. atomic_read(&pdata->int_mclk0_rsc_ref));
  590. if (enable) {
  591. if (int_mi2s_cfg[INT0_MI2S].sample_rate ==
  592. SAMPLING_RATE_44P1KHZ) {
  593. clk_freq_in_hz = NATIVE_MCLK_RATE;
  594. pdata->native_clk_set = true;
  595. } else {
  596. clk_freq_in_hz = pdata->mclk_freq;
  597. pdata->native_clk_set = false;
  598. }
  599. if (pdata->digital_cdc_core_clk.clk_freq_in_hz
  600. != clk_freq_in_hz)
  601. int_mclk0_freq_chg = true;
  602. if (!atomic_read(&pdata->int_mclk0_rsc_ref) ||
  603. int_mclk0_freq_chg) {
  604. cancel_delayed_work_sync(
  605. &pdata->disable_int_mclk0_work);
  606. mutex_lock(&pdata->cdc_int_mclk0_mutex);
  607. if (atomic_read(&pdata->int_mclk0_enabled) == false ||
  608. int_mclk0_freq_chg) {
  609. if (atomic_read(&pdata->int_mclk0_enabled)) {
  610. pdata->digital_cdc_core_clk.enable = 0;
  611. afe_set_lpass_clock_v2(
  612. AFE_PORT_ID_INT0_MI2S_RX,
  613. &pdata->digital_cdc_core_clk);
  614. }
  615. pdata->digital_cdc_core_clk.clk_freq_in_hz =
  616. clk_freq_in_hz;
  617. pdata->digital_cdc_core_clk.enable = 1;
  618. ret = afe_set_lpass_clock_v2(
  619. AFE_PORT_ID_INT0_MI2S_RX,
  620. &pdata->digital_cdc_core_clk);
  621. if (ret < 0) {
  622. pr_err("%s: failed to enable CCLK\n",
  623. __func__);
  624. mutex_unlock(
  625. &pdata->cdc_int_mclk0_mutex);
  626. return ret;
  627. }
  628. pr_debug("enabled digital codec core clk\n");
  629. atomic_set(&pdata->int_mclk0_enabled, true);
  630. }
  631. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  632. }
  633. atomic_inc(&pdata->int_mclk0_rsc_ref);
  634. } else {
  635. cancel_delayed_work_sync(&pdata->disable_int_mclk0_work);
  636. mutex_lock(&pdata->cdc_int_mclk0_mutex);
  637. if (atomic_read(&pdata->int_mclk0_enabled) == true) {
  638. pdata->digital_cdc_core_clk.clk_freq_in_hz =
  639. DEFAULT_MCLK_RATE;
  640. pdata->digital_cdc_core_clk.enable = 0;
  641. ret = afe_set_lpass_clock_v2(
  642. AFE_PORT_ID_INT0_MI2S_RX,
  643. &pdata->digital_cdc_core_clk);
  644. if (ret < 0)
  645. pr_err("%s: failed to disable CCLK\n",
  646. __func__);
  647. atomic_set(&pdata->int_mclk0_enabled, false);
  648. atomic_set(&pdata->int_mclk0_rsc_ref, 0);
  649. }
  650. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  651. }
  652. return ret;
  653. }
  654. static int loopback_mclk_get(struct snd_kcontrol *kcontrol,
  655. struct snd_ctl_elem_value *ucontrol)
  656. {
  657. pr_debug("%s\n", __func__);
  658. return 0;
  659. }
  660. static int loopback_mclk_put(struct snd_kcontrol *kcontrol,
  661. struct snd_ctl_elem_value *ucontrol)
  662. {
  663. int ret = -EINVAL;
  664. struct msm_asoc_mach_data *pdata = NULL;
  665. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  666. pdata = snd_soc_card_get_drvdata(codec->component.card);
  667. pr_debug("%s: mclk_rsc_ref %d enable %ld\n",
  668. __func__, atomic_read(&pdata->int_mclk0_rsc_ref),
  669. ucontrol->value.integer.value[0]);
  670. switch (ucontrol->value.integer.value[0]) {
  671. case 1:
  672. ret = msm_cdc_pinctrl_select_active_state(pdata->pdm_gpio_p);
  673. if (ret) {
  674. pr_err("%s: failed to enable the pri gpios: %d\n",
  675. __func__, ret);
  676. break;
  677. }
  678. mutex_lock(&pdata->cdc_int_mclk0_mutex);
  679. if ((!atomic_read(&pdata->int_mclk0_rsc_ref)) &&
  680. (!atomic_read(&pdata->int_mclk0_enabled))) {
  681. pdata->digital_cdc_core_clk.enable = 1;
  682. ret = afe_set_lpass_clock_v2(
  683. AFE_PORT_ID_INT0_MI2S_RX,
  684. &pdata->digital_cdc_core_clk);
  685. if (ret < 0) {
  686. pr_err("%s: failed to enable the MCLK: %d\n",
  687. __func__, ret);
  688. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  689. ret = msm_cdc_pinctrl_select_sleep_state(
  690. pdata->pdm_gpio_p);
  691. if (ret)
  692. pr_err("%s: failed to disable the pri gpios: %d\n",
  693. __func__, ret);
  694. break;
  695. }
  696. atomic_set(&pdata->int_mclk0_enabled, true);
  697. }
  698. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  699. atomic_inc(&pdata->int_mclk0_rsc_ref);
  700. msm_anlg_cdc_mclk_enable(codec, 1, true);
  701. break;
  702. case 0:
  703. if (atomic_read(&pdata->int_mclk0_rsc_ref) <= 0)
  704. break;
  705. msm_anlg_cdc_mclk_enable(codec, 0, true);
  706. mutex_lock(&pdata->cdc_int_mclk0_mutex);
  707. if ((!atomic_dec_return(&pdata->int_mclk0_rsc_ref)) &&
  708. (atomic_read(&pdata->int_mclk0_enabled))) {
  709. pdata->digital_cdc_core_clk.enable = 0;
  710. ret = afe_set_lpass_clock_v2(
  711. AFE_PORT_ID_INT0_MI2S_RX,
  712. &pdata->digital_cdc_core_clk);
  713. if (ret < 0) {
  714. pr_err("%s: failed to disable the CCLK: %d\n",
  715. __func__, ret);
  716. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  717. break;
  718. }
  719. atomic_set(&pdata->int_mclk0_enabled, false);
  720. }
  721. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  722. ret = msm_cdc_pinctrl_select_sleep_state(pdata->pdm_gpio_p);
  723. if (ret)
  724. pr_err("%s: failed to disable the pri gpios: %d\n",
  725. __func__, ret);
  726. break;
  727. default:
  728. pr_err("%s: Unexpected input value\n", __func__);
  729. break;
  730. }
  731. return ret;
  732. }
  733. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  734. struct snd_ctl_elem_value *ucontrol)
  735. {
  736. /*
  737. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  738. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  739. * value.
  740. */
  741. switch (bt_fm_cfg[BT_SLIM7].sample_rate) {
  742. case SAMPLING_RATE_48KHZ:
  743. ucontrol->value.integer.value[0] = 2;
  744. break;
  745. case SAMPLING_RATE_16KHZ:
  746. ucontrol->value.integer.value[0] = 1;
  747. break;
  748. case SAMPLING_RATE_8KHZ:
  749. default:
  750. ucontrol->value.integer.value[0] = 0;
  751. break;
  752. }
  753. pr_debug("%s: sample rate = %d", __func__,
  754. bt_fm_cfg[BT_SLIM7].sample_rate);
  755. return 0;
  756. }
  757. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  758. struct snd_ctl_elem_value *ucontrol)
  759. {
  760. switch (ucontrol->value.integer.value[0]) {
  761. case 1:
  762. bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_16KHZ;
  763. break;
  764. case 2:
  765. bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_48KHZ;
  766. break;
  767. case 0:
  768. default:
  769. bt_fm_cfg[BT_SLIM7].sample_rate = SAMPLING_RATE_8KHZ;
  770. break;
  771. }
  772. pr_debug("%s: sample rates: slim7_rx = %d, value = %d\n",
  773. __func__,
  774. bt_fm_cfg[BT_SLIM7].sample_rate,
  775. ucontrol->value.enumerated.item[0]);
  776. return 0;
  777. }
  778. static const struct snd_kcontrol_new msm_snd_controls[] = {
  779. SOC_ENUM_EXT("INT0_MI2S_RX Format", int0_mi2s_rx_format,
  780. int_mi2s_bit_format_get, int_mi2s_bit_format_put),
  781. SOC_ENUM_EXT("INT2_MI2S_TX Format", int2_mi2s_tx_format,
  782. int_mi2s_bit_format_get, int_mi2s_bit_format_put),
  783. SOC_ENUM_EXT("INT3_MI2S_TX Format", int3_mi2s_tx_format,
  784. int_mi2s_bit_format_get, int_mi2s_bit_format_put),
  785. SOC_ENUM_EXT("INT0_MI2S_RX SampleRate", int0_mi2s_rx_sample_rate,
  786. int_mi2s_sample_rate_get,
  787. int_mi2s_sample_rate_put),
  788. SOC_ENUM_EXT("INT2_MI2S_TX SampleRate", int2_mi2s_tx_sample_rate,
  789. int_mi2s_sample_rate_get,
  790. int_mi2s_sample_rate_put),
  791. SOC_ENUM_EXT("INT3_MI2S_TX SampleRate", int3_mi2s_tx_sample_rate,
  792. int_mi2s_sample_rate_get,
  793. int_mi2s_sample_rate_put),
  794. SOC_ENUM_EXT("INT0_MI2S_RX Channels", int0_mi2s_rx_chs,
  795. int_mi2s_ch_get, int_mi2s_ch_put),
  796. SOC_ENUM_EXT("INT2_MI2S_TX Channels", int2_mi2s_tx_chs,
  797. int_mi2s_ch_get, int_mi2s_ch_put),
  798. SOC_ENUM_EXT("INT3_MI2S_TX Channels", int3_mi2s_tx_chs,
  799. int_mi2s_ch_get, int_mi2s_ch_put),
  800. SOC_ENUM_EXT("Loopback MCLK", loopback_mclk_en,
  801. loopback_mclk_get, loopback_mclk_put),
  802. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  803. msm_bt_sample_rate_get,
  804. msm_bt_sample_rate_put),
  805. };
  806. static const struct snd_kcontrol_new msm_sdw_controls[] = {
  807. SOC_ENUM_EXT("INT4_MI2S_RX Format", int4_mi2s_rx_format,
  808. int_mi2s_bit_format_get, int_mi2s_bit_format_put),
  809. SOC_ENUM_EXT("INT4_MI2S_RX SampleRate", int4_mi2s_rx_sample_rate,
  810. int_mi2s_sample_rate_get,
  811. int_mi2s_sample_rate_put),
  812. SOC_ENUM_EXT("INT4_MI2S_RX Channels", int4_mi2s_rx_chs,
  813. int_mi2s_ch_get, int_mi2s_ch_put),
  814. SOC_ENUM_EXT("VI_FEED_TX Channels", int5_mi2s_tx_chs,
  815. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  816. };
  817. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  818. struct snd_kcontrol *kcontrol, int event)
  819. {
  820. struct msm_asoc_mach_data *pdata = NULL;
  821. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  822. int ret = 0;
  823. pdata = snd_soc_card_get_drvdata(codec->component.card);
  824. pr_debug("%s: event = %d\n", __func__, event);
  825. switch (event) {
  826. case SND_SOC_DAPM_PRE_PMU:
  827. ret = msm_cdc_pinctrl_select_active_state(pdata->dmic_gpio_p);
  828. if (ret < 0) {
  829. pr_err("%s: gpio set cannot be activated %sd",
  830. __func__, "dmic_gpio");
  831. return ret;
  832. }
  833. break;
  834. case SND_SOC_DAPM_POST_PMD:
  835. ret = msm_cdc_pinctrl_select_sleep_state(pdata->dmic_gpio_p);
  836. if (ret < 0) {
  837. pr_err("%s: gpio set cannot be de-activated %sd",
  838. __func__, "dmic_gpio");
  839. return ret;
  840. }
  841. break;
  842. default:
  843. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  844. return -EINVAL;
  845. }
  846. return 0;
  847. }
  848. static int msm_int_mclk0_event(struct snd_soc_dapm_widget *w,
  849. struct snd_kcontrol *kcontrol, int event)
  850. {
  851. struct msm_asoc_mach_data *pdata = NULL;
  852. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  853. int ret = 0;
  854. pdata = snd_soc_card_get_drvdata(codec->component.card);
  855. pr_debug("%s: event = %d\n", __func__, event);
  856. switch (event) {
  857. case SND_SOC_DAPM_PRE_PMU:
  858. ret = msm_cdc_pinctrl_select_active_state(pdata->pdm_gpio_p);
  859. if (ret < 0) {
  860. pr_err("%s: gpio set cannot be activated %s\n",
  861. __func__, "int_pdm");
  862. return ret;
  863. }
  864. msm_int_enable_dig_cdc_clk(codec, 1, true);
  865. msm_anlg_cdc_mclk_enable(codec, 1, true);
  866. break;
  867. case SND_SOC_DAPM_POST_PMD:
  868. pr_debug("%s: mclk_res_ref = %d\n",
  869. __func__, atomic_read(&pdata->int_mclk0_rsc_ref));
  870. ret = msm_cdc_pinctrl_select_sleep_state(pdata->pdm_gpio_p);
  871. if (ret < 0) {
  872. pr_err("%s: gpio set cannot be de-activated %sd",
  873. __func__, "int_pdm");
  874. return ret;
  875. }
  876. pr_debug("%s: disabling MCLK\n", __func__);
  877. /* disable the codec mclk config*/
  878. msm_anlg_cdc_mclk_enable(codec, 0, true);
  879. msm_int_enable_dig_cdc_clk(codec, 0, true);
  880. break;
  881. default:
  882. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  883. return -EINVAL;
  884. }
  885. return 0;
  886. }
  887. static int int_mi2s_get_port_id(int id)
  888. {
  889. int afe_port_id;
  890. switch (id) {
  891. case MSM_BACKEND_DAI_INT0_MI2S_RX:
  892. afe_port_id = AFE_PORT_ID_INT0_MI2S_RX;
  893. break;
  894. case MSM_BACKEND_DAI_INT2_MI2S_TX:
  895. afe_port_id = AFE_PORT_ID_INT2_MI2S_TX;
  896. break;
  897. case MSM_BACKEND_DAI_INT3_MI2S_TX:
  898. afe_port_id = AFE_PORT_ID_INT3_MI2S_TX;
  899. break;
  900. case MSM_BACKEND_DAI_INT4_MI2S_RX:
  901. afe_port_id = AFE_PORT_ID_INT4_MI2S_RX;
  902. break;
  903. case MSM_BACKEND_DAI_INT5_MI2S_TX:
  904. afe_port_id = AFE_PORT_ID_INT5_MI2S_TX;
  905. break;
  906. default:
  907. pr_err("%s: Invalid id: %d\n", __func__, id);
  908. afe_port_id = -EINVAL;
  909. }
  910. return afe_port_id;
  911. }
  912. static int int_mi2s_get_index(int port_id)
  913. {
  914. int index;
  915. switch (port_id) {
  916. case AFE_PORT_ID_INT0_MI2S_RX:
  917. index = INT0_MI2S;
  918. break;
  919. case AFE_PORT_ID_INT2_MI2S_TX:
  920. index = INT2_MI2S;
  921. break;
  922. case AFE_PORT_ID_INT3_MI2S_TX:
  923. index = INT3_MI2S;
  924. break;
  925. case AFE_PORT_ID_INT4_MI2S_RX:
  926. index = INT4_MI2S;
  927. break;
  928. case AFE_PORT_ID_INT5_MI2S_TX:
  929. index = INT5_MI2S;
  930. break;
  931. default:
  932. pr_err("%s: Invalid port_id: %d\n", __func__, port_id);
  933. index = -EINVAL;
  934. }
  935. return index;
  936. }
  937. static u32 get_int_mi2s_bits_per_sample(u32 bit_format)
  938. {
  939. u32 bit_per_sample;
  940. switch (bit_format) {
  941. case SNDRV_PCM_FORMAT_S24_3LE:
  942. case SNDRV_PCM_FORMAT_S24_LE:
  943. bit_per_sample = 32;
  944. break;
  945. case SNDRV_PCM_FORMAT_S16_LE:
  946. default:
  947. bit_per_sample = 16;
  948. break;
  949. }
  950. return bit_per_sample;
  951. }
  952. static void update_int_mi2s_clk_val(int idx, int stream)
  953. {
  954. u32 bit_per_sample;
  955. bit_per_sample =
  956. get_int_mi2s_bits_per_sample(int_mi2s_cfg[idx].bit_format);
  957. int_mi2s_clk[idx].clk_freq_in_hz =
  958. (int_mi2s_cfg[idx].sample_rate * 2 * bit_per_sample);
  959. }
  960. static int int_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  961. {
  962. int ret = 0;
  963. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  964. int port_id = 0;
  965. int index;
  966. port_id = int_mi2s_get_port_id(rtd->dai_link->id);
  967. if (port_id < 0) {
  968. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  969. ret = port_id;
  970. goto done;
  971. }
  972. index = int_mi2s_get_index(port_id);
  973. if (index < 0) {
  974. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  975. ret = port_id;
  976. goto done;
  977. }
  978. if (enable) {
  979. update_int_mi2s_clk_val(index, substream->stream);
  980. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  981. int_mi2s_clk[index].clk_freq_in_hz);
  982. }
  983. int_mi2s_clk[index].enable = enable;
  984. ret = afe_set_lpass_clock_v2(port_id,
  985. &int_mi2s_clk[index]);
  986. if (ret < 0) {
  987. dev_err(rtd->card->dev,
  988. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  989. __func__, port_id, ret);
  990. goto done;
  991. }
  992. done:
  993. return ret;
  994. }
  995. static int msm_sdw_mi2s_snd_startup(struct snd_pcm_substream *substream)
  996. {
  997. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  998. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  999. int ret = 0;
  1000. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  1001. substream->name, substream->stream);
  1002. ret = int_mi2s_set_sclk(substream, true);
  1003. if (ret < 0) {
  1004. pr_err("%s: failed to enable sclk %d\n",
  1005. __func__, ret);
  1006. return ret;
  1007. }
  1008. ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS);
  1009. if (ret < 0)
  1010. pr_err("%s: set fmt cpu dai failed; ret=%d\n", __func__, ret);
  1011. return ret;
  1012. }
  1013. static void msm_sdw_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  1014. {
  1015. int ret;
  1016. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  1017. substream->name, substream->stream);
  1018. ret = int_mi2s_set_sclk(substream, false);
  1019. if (ret < 0)
  1020. pr_err("%s:clock disable failed; ret=%d\n", __func__,
  1021. ret);
  1022. }
  1023. static int msm_int_mi2s_snd_startup(struct snd_pcm_substream *substream)
  1024. {
  1025. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1026. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1027. struct snd_soc_codec *codec = rtd->codec_dais[ANA_CDC]->codec;
  1028. int ret = 0;
  1029. struct msm_asoc_mach_data *pdata = NULL;
  1030. pdata = snd_soc_card_get_drvdata(codec->component.card);
  1031. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  1032. substream->name, substream->stream);
  1033. ret = int_mi2s_set_sclk(substream, true);
  1034. if (ret < 0) {
  1035. pr_err("%s: failed to enable sclk %d\n",
  1036. __func__, ret);
  1037. return ret;
  1038. }
  1039. ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBS_CFS);
  1040. if (ret < 0)
  1041. pr_err("%s: set fmt cpu dai failed; ret=%d\n", __func__, ret);
  1042. return ret;
  1043. }
  1044. static void msm_int_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  1045. {
  1046. int ret;
  1047. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  1048. substream->name, substream->stream);
  1049. ret = int_mi2s_set_sclk(substream, false);
  1050. if (ret < 0)
  1051. pr_err("%s:clock disable failed; ret=%d\n", __func__,
  1052. ret);
  1053. }
  1054. static void *def_msm_int_wcd_mbhc_cal(void)
  1055. {
  1056. void *msm_int_wcd_cal;
  1057. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  1058. u16 *btn_low, *btn_high;
  1059. msm_int_wcd_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  1060. WCD_MBHC_DEF_RLOADS), GFP_KERNEL);
  1061. if (!msm_int_wcd_cal)
  1062. return NULL;
  1063. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(msm_int_wcd_cal)->X) = (Y))
  1064. S(v_hs_max, 1500);
  1065. #undef S
  1066. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(msm_int_wcd_cal)->X) = (Y))
  1067. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  1068. #undef S
  1069. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(msm_int_wcd_cal);
  1070. btn_low = btn_cfg->_v_btn_low;
  1071. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  1072. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  1073. /*
  1074. * In SW we are maintaining two sets of threshold register
  1075. * one for current source and another for Micbias.
  1076. * all btn_low corresponds to threshold for current source
  1077. * all bt_high corresponds to threshold for Micbias
  1078. * Below thresholds are based on following resistances
  1079. * 0-70 == Button 0
  1080. * 110-180 == Button 1
  1081. * 210-290 == Button 2
  1082. * 360-680 == Button 3
  1083. */
  1084. btn_low[0] = 75;
  1085. btn_high[0] = 75;
  1086. btn_low[1] = 150;
  1087. btn_high[1] = 150;
  1088. btn_low[2] = 225;
  1089. btn_high[2] = 225;
  1090. btn_low[3] = 450;
  1091. btn_high[3] = 450;
  1092. btn_low[4] = 500;
  1093. btn_high[4] = 500;
  1094. return msm_int_wcd_cal;
  1095. }
  1096. static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
  1097. {
  1098. struct snd_soc_codec *dig_cdc = rtd->codec_dais[DIG_CDC]->codec;
  1099. struct snd_soc_codec *ana_cdc = rtd->codec_dais[ANA_CDC]->codec;
  1100. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(ana_cdc);
  1101. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1102. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(rtd->card);
  1103. struct snd_card *card;
  1104. int ret = -ENOMEM;
  1105. pr_debug("%s(),dev_name%s\n", __func__, dev_name(cpu_dai->dev));
  1106. ret = snd_soc_add_codec_controls(ana_cdc, msm_snd_controls,
  1107. ARRAY_SIZE(msm_snd_controls));
  1108. if (ret < 0) {
  1109. pr_err("%s: add_codec_controls failed: %d\n",
  1110. __func__, ret);
  1111. return ret;
  1112. }
  1113. ret = snd_soc_add_codec_controls(ana_cdc, msm_common_snd_controls,
  1114. msm_common_snd_controls_size());
  1115. if (ret < 0) {
  1116. pr_err("%s: add common snd controls failed: %d\n",
  1117. __func__, ret);
  1118. return ret;
  1119. }
  1120. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  1121. ARRAY_SIZE(msm_int_dapm_widgets));
  1122. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  1123. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  1124. snd_soc_dapm_ignore_suspend(dapm, "Secondary Mic");
  1125. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  1126. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  1127. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1128. snd_soc_dapm_ignore_suspend(dapm, "HEADPHONE");
  1129. snd_soc_dapm_ignore_suspend(dapm, "SPK_OUT");
  1130. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1131. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1132. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1133. snd_soc_dapm_sync(dapm);
  1134. dapm = snd_soc_codec_get_dapm(dig_cdc);
  1135. snd_soc_dapm_ignore_suspend(dapm, "DMIC1");
  1136. snd_soc_dapm_ignore_suspend(dapm, "DMIC2");
  1137. snd_soc_dapm_ignore_suspend(dapm, "DMIC3");
  1138. snd_soc_dapm_ignore_suspend(dapm, "DMIC4");
  1139. snd_soc_dapm_sync(dapm);
  1140. msm_anlg_cdc_spk_ext_pa_cb(enable_spk_ext_pa, ana_cdc);
  1141. msm_dig_cdc_hph_comp_cb(msm_config_hph_compander_gpio, dig_cdc);
  1142. card = rtd->card->snd_card;
  1143. if (!codec_root)
  1144. codec_root = snd_info_create_subdir(card->module, "codecs",
  1145. card->proc_root);
  1146. if (!codec_root) {
  1147. pr_debug("%s: Cannot create codecs module entry\n",
  1148. __func__);
  1149. goto done;
  1150. }
  1151. pdata->codec_root = codec_root;
  1152. msm_dig_codec_info_create_codec_entry(codec_root, dig_cdc);
  1153. msm_anlg_codec_info_create_codec_entry(codec_root, ana_cdc);
  1154. done:
  1155. msm_set_codec_reg_done(true);
  1156. return 0;
  1157. }
  1158. static int msm_sdw_audrx_init(struct snd_soc_pcm_runtime *rtd)
  1159. {
  1160. struct snd_soc_codec *codec = rtd->codec;
  1161. struct snd_soc_dapm_context *dapm =
  1162. snd_soc_codec_get_dapm(codec);
  1163. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(rtd->card);
  1164. struct snd_soc_component *aux_comp;
  1165. struct snd_card *card;
  1166. snd_soc_add_codec_controls(codec, msm_sdw_controls,
  1167. ARRAY_SIZE(msm_sdw_controls));
  1168. snd_soc_dapm_ignore_suspend(dapm, "AIF1_SDW Playback");
  1169. snd_soc_dapm_ignore_suspend(dapm, "VIfeed_SDW");
  1170. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  1171. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  1172. snd_soc_dapm_ignore_suspend(dapm, "AIF1_SDW VI");
  1173. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_SDW");
  1174. snd_soc_dapm_sync(dapm);
  1175. /*
  1176. * Send speaker configuration only for WSA8810.
  1177. * Default configuration is for WSA8815.
  1178. */
  1179. pr_debug("%s: Number of aux devices: %d\n",
  1180. __func__, rtd->card->num_aux_devs);
  1181. if (rtd->card->num_aux_devs &&
  1182. !list_empty(&rtd->card->aux_comp_list)) {
  1183. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  1184. struct snd_soc_component, list_aux);
  1185. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  1186. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  1187. msm_sdw_set_spkr_mode(rtd->codec, SPKR_MODE_1);
  1188. msm_sdw_set_spkr_gain_offset(rtd->codec,
  1189. RX_GAIN_OFFSET_M1P5_DB);
  1190. }
  1191. }
  1192. card = rtd->card->snd_card;
  1193. if (!codec_root)
  1194. codec_root = snd_info_create_subdir(card->module, "codecs",
  1195. card->proc_root);
  1196. if (!codec_root) {
  1197. pr_debug("%s: Cannot create codecs module entry\n",
  1198. __func__);
  1199. goto done;
  1200. }
  1201. pdata->codec_root = codec_root;
  1202. msm_sdw_codec_info_create_codec_entry(codec_root, codec);
  1203. done:
  1204. return 0;
  1205. }
  1206. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  1207. {
  1208. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  1209. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  1210. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  1211. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  1212. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  1213. }
  1214. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  1215. struct snd_pcm_hw_params *params)
  1216. {
  1217. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1218. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  1219. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1220. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  1221. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  1222. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  1223. int ret;
  1224. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  1225. codec_dai->name, codec_dai->id);
  1226. ret = snd_soc_dai_get_channel_map(codec_dai,
  1227. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  1228. if (ret) {
  1229. dev_err(rtd->dev,
  1230. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  1231. __func__, ret);
  1232. goto exit;
  1233. }
  1234. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) id %d\n",
  1235. __func__, tx_ch_cnt, dai_link->id);
  1236. ret = snd_soc_dai_set_channel_map(cpu_dai,
  1237. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  1238. if (ret)
  1239. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  1240. __func__, ret);
  1241. exit:
  1242. return ret;
  1243. }
  1244. static unsigned int tdm_param_set_slot_mask(u16 port_id, int slot_width,
  1245. int slots)
  1246. {
  1247. unsigned int slot_mask = 0;
  1248. int i, j;
  1249. unsigned int *slot_offset;
  1250. for (i = TDM_0; i < TDM_PORT_MAX; i++) {
  1251. slot_offset = tdm_slot_offset[i];
  1252. for (j = 0; j < TDM_SLOT_OFFSET_MAX; j++) {
  1253. if (slot_offset[j] != AFE_SLOT_MAPPING_OFFSET_INVALID)
  1254. slot_mask |=
  1255. (1 << ((slot_offset[j] * 8) / slot_width));
  1256. else
  1257. break;
  1258. }
  1259. }
  1260. return slot_mask;
  1261. }
  1262. static int msm_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  1263. struct snd_pcm_hw_params *params)
  1264. {
  1265. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1266. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1267. int ret = 0;
  1268. int channels, slot_width, slots;
  1269. unsigned int slot_mask;
  1270. unsigned int *slot_offset;
  1271. int offset_channels = 0;
  1272. int i;
  1273. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  1274. channels = params_channels(params);
  1275. switch (channels) {
  1276. case 1:
  1277. case 2:
  1278. case 3:
  1279. case 4:
  1280. case 5:
  1281. case 6:
  1282. case 7:
  1283. case 8:
  1284. switch (params_format(params)) {
  1285. case SNDRV_PCM_FORMAT_S32_LE:
  1286. case SNDRV_PCM_FORMAT_S24_LE:
  1287. case SNDRV_PCM_FORMAT_S16_LE:
  1288. /*
  1289. * up to 8 channels HW config should
  1290. * use 32 bit slot width for max support of
  1291. * stream bit width. (slot_width > bit_width)
  1292. */
  1293. slot_width = 32;
  1294. break;
  1295. default:
  1296. pr_err("%s: invalid param format 0x%x\n",
  1297. __func__, params_format(params));
  1298. return -EINVAL;
  1299. }
  1300. slots = 8;
  1301. slot_mask = tdm_param_set_slot_mask(cpu_dai->id,
  1302. slot_width,
  1303. slots);
  1304. if (!slot_mask) {
  1305. pr_err("%s: invalid slot_mask 0x%x\n",
  1306. __func__, slot_mask);
  1307. return -EINVAL;
  1308. }
  1309. break;
  1310. default:
  1311. pr_err("%s: invalid param channels %d\n",
  1312. __func__, channels);
  1313. return -EINVAL;
  1314. }
  1315. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  1316. switch (cpu_dai->id) {
  1317. case AFE_PORT_ID_PRIMARY_TDM_RX:
  1318. case AFE_PORT_ID_SECONDARY_TDM_RX:
  1319. case AFE_PORT_ID_TERTIARY_TDM_RX:
  1320. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  1321. case AFE_PORT_ID_QUINARY_TDM_RX:
  1322. case AFE_PORT_ID_PRIMARY_TDM_TX:
  1323. case AFE_PORT_ID_SECONDARY_TDM_TX:
  1324. case AFE_PORT_ID_TERTIARY_TDM_TX:
  1325. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  1326. case AFE_PORT_ID_QUINARY_TDM_TX:
  1327. slot_offset = tdm_slot_offset[TDM_0];
  1328. break;
  1329. default:
  1330. pr_err("%s: dai id 0x%x not supported\n",
  1331. __func__, cpu_dai->id);
  1332. return -EINVAL;
  1333. }
  1334. for (i = 0; i < TDM_SLOT_OFFSET_MAX; i++) {
  1335. if (slot_offset[i] != AFE_SLOT_MAPPING_OFFSET_INVALID)
  1336. offset_channels++;
  1337. else
  1338. break;
  1339. }
  1340. if (offset_channels == 0) {
  1341. pr_err("%s: slot offset not supported, offset_channels %d\n",
  1342. __func__, offset_channels);
  1343. return -EINVAL;
  1344. }
  1345. if (channels > offset_channels) {
  1346. pr_err("%s: channels %d exceed offset_channels %d\n",
  1347. __func__, channels, offset_channels);
  1348. return -EINVAL;
  1349. }
  1350. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1351. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  1352. slots, slot_width);
  1353. if (ret < 0) {
  1354. pr_err("%s: failed to set tdm slot, err:%d\n",
  1355. __func__, ret);
  1356. goto end;
  1357. }
  1358. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, NULL,
  1359. channels, slot_offset);
  1360. if (ret < 0) {
  1361. pr_err("%s: failed to set channel map, err:%d\n",
  1362. __func__, ret);
  1363. goto end;
  1364. }
  1365. } else {
  1366. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  1367. slots, slot_width);
  1368. if (ret < 0) {
  1369. pr_err("%s: failed to set tdm slot, err:%d\n",
  1370. __func__, ret);
  1371. goto end;
  1372. }
  1373. ret = snd_soc_dai_set_channel_map(cpu_dai, channels,
  1374. slot_offset, 0, NULL);
  1375. if (ret < 0) {
  1376. pr_err("%s: failed to set channel map, err:%d\n",
  1377. __func__, ret);
  1378. goto end;
  1379. }
  1380. }
  1381. end:
  1382. return ret;
  1383. }
  1384. static int msm_snd_card_late_probe(struct snd_soc_card *card)
  1385. {
  1386. const char *be_dl_name = LPASS_BE_INT0_MI2S_RX;
  1387. struct snd_soc_codec *ana_cdc;
  1388. struct snd_soc_pcm_runtime *rtd;
  1389. int ret = 0;
  1390. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  1391. if (!rtd) {
  1392. dev_err(card->dev,
  1393. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  1394. __func__, be_dl_name);
  1395. return -EINVAL;
  1396. }
  1397. ana_cdc = rtd->codec_dais[ANA_CDC]->codec;
  1398. mbhc_cfg_ptr->calibration = def_msm_int_wcd_mbhc_cal();
  1399. if (!mbhc_cfg_ptr->calibration)
  1400. return -ENOMEM;
  1401. ret = msm_anlg_cdc_hs_detect(ana_cdc, mbhc_cfg_ptr);
  1402. if (ret) {
  1403. dev_err(card->dev,
  1404. "%s: msm_anlg_cdc_hs_detect failed\n", __func__);
  1405. kfree(mbhc_cfg_ptr->calibration);
  1406. }
  1407. return ret;
  1408. }
  1409. static struct snd_soc_ops msm_tdm_be_ops = {
  1410. .hw_params = msm_tdm_snd_hw_params
  1411. };
  1412. static struct snd_soc_ops msm_wcn_ops = {
  1413. .hw_params = msm_wcn_hw_params,
  1414. };
  1415. static struct snd_soc_ops msm_mi2s_be_ops = {
  1416. .startup = msm_mi2s_snd_startup,
  1417. .shutdown = msm_mi2s_snd_shutdown,
  1418. };
  1419. static struct snd_soc_ops msm_aux_pcm_be_ops = {
  1420. .startup = msm_aux_pcm_snd_startup,
  1421. .shutdown = msm_aux_pcm_snd_shutdown,
  1422. };
  1423. static struct snd_soc_ops msm_int_mi2s_be_ops = {
  1424. .startup = msm_int_mi2s_snd_startup,
  1425. .shutdown = msm_int_mi2s_snd_shutdown,
  1426. };
  1427. static struct snd_soc_ops msm_sdw_mi2s_be_ops = {
  1428. .startup = msm_sdw_mi2s_snd_startup,
  1429. .shutdown = msm_sdw_mi2s_snd_shutdown,
  1430. };
  1431. struct snd_soc_dai_link_component dlc_rx1[] = {
  1432. {
  1433. .of_node = NULL,
  1434. .dai_name = "msm_dig_cdc_dai_rx1",
  1435. },
  1436. {
  1437. .of_node = NULL,
  1438. .dai_name = "msm_anlg_cdc_i2s_rx1",
  1439. },
  1440. };
  1441. struct snd_soc_dai_link_component dlc_tx1[] = {
  1442. {
  1443. .of_node = NULL,
  1444. .dai_name = "msm_dig_cdc_dai_tx1",
  1445. },
  1446. {
  1447. .of_node = NULL,
  1448. .dai_name = "msm_anlg_cdc_i2s_tx1",
  1449. },
  1450. };
  1451. struct snd_soc_dai_link_component dlc_tx2[] = {
  1452. {
  1453. .of_node = NULL,
  1454. .dai_name = "msm_dig_cdc_dai_tx2",
  1455. },
  1456. {
  1457. .of_node = NULL,
  1458. .dai_name = "msm_anlg_cdc_i2s_tx2",
  1459. },
  1460. };
  1461. /* Digital audio interface glue - connects codec <---> CPU */
  1462. static struct snd_soc_dai_link msm_int_dai[] = {
  1463. /* FrontEnd DAI Links */
  1464. {/* hw:x,0 */
  1465. .name = MSM_DAILINK_NAME(Media1),
  1466. .stream_name = "MultiMedia1",
  1467. .cpu_dai_name = "MultiMedia1",
  1468. .platform_name = "msm-pcm-dsp.0",
  1469. .dynamic = 1,
  1470. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1471. SND_SOC_DPCM_TRIGGER_POST},
  1472. .codec_dai_name = "snd-soc-dummy-dai",
  1473. .codec_name = "snd-soc-dummy",
  1474. .ignore_suspend = 1,
  1475. .dpcm_playback = 1,
  1476. .dpcm_capture = 1,
  1477. /* this dai link has playback support */
  1478. .ignore_pmdown_time = 1,
  1479. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  1480. },
  1481. {/* hw:x,1 */
  1482. .name = MSM_DAILINK_NAME(Media2),
  1483. .stream_name = "MultiMedia2",
  1484. .cpu_dai_name = "MultiMedia2",
  1485. .platform_name = "msm-pcm-dsp.0",
  1486. .dynamic = 1,
  1487. .dpcm_playback = 1,
  1488. .dpcm_capture = 1,
  1489. .codec_dai_name = "snd-soc-dummy-dai",
  1490. .codec_name = "snd-soc-dummy",
  1491. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1492. SND_SOC_DPCM_TRIGGER_POST},
  1493. .ignore_suspend = 1,
  1494. /* this dai link has playback support */
  1495. .ignore_pmdown_time = 1,
  1496. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  1497. },
  1498. {/* hw:x,2 */
  1499. .name = "VoiceMMode1",
  1500. .stream_name = "VoiceMMode1",
  1501. .cpu_dai_name = "VoiceMMode1",
  1502. .platform_name = "msm-pcm-voice",
  1503. .dynamic = 1,
  1504. .dpcm_capture = 1,
  1505. .dpcm_playback = 1,
  1506. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1507. SND_SOC_DPCM_TRIGGER_POST},
  1508. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1509. .ignore_suspend = 1,
  1510. .ignore_pmdown_time = 1,
  1511. .codec_dai_name = "snd-soc-dummy-dai",
  1512. .codec_name = "snd-soc-dummy",
  1513. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  1514. },
  1515. {/* hw:x,3 */
  1516. .name = "MSM VoIP",
  1517. .stream_name = "VoIP",
  1518. .cpu_dai_name = "VoIP",
  1519. .platform_name = "msm-voip-dsp",
  1520. .dynamic = 1,
  1521. .dpcm_playback = 1,
  1522. .dpcm_capture = 1,
  1523. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1524. SND_SOC_DPCM_TRIGGER_POST},
  1525. .codec_dai_name = "snd-soc-dummy-dai",
  1526. .codec_name = "snd-soc-dummy",
  1527. .ignore_suspend = 1,
  1528. /* this dai link has playback support */
  1529. .ignore_pmdown_time = 1,
  1530. .id = MSM_FRONTEND_DAI_VOIP,
  1531. },
  1532. {/* hw:x,4 */
  1533. .name = MSM_DAILINK_NAME(ULL),
  1534. .stream_name = "ULL",
  1535. .cpu_dai_name = "MultiMedia3",
  1536. .platform_name = "msm-pcm-dsp.2",
  1537. .dynamic = 1,
  1538. .dpcm_playback = 1,
  1539. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1540. SND_SOC_DPCM_TRIGGER_POST},
  1541. .codec_dai_name = "snd-soc-dummy-dai",
  1542. .codec_name = "snd-soc-dummy",
  1543. .ignore_suspend = 1,
  1544. /* this dai link has playback support */
  1545. .ignore_pmdown_time = 1,
  1546. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  1547. },
  1548. /* Hostless PCM purpose */
  1549. {/* hw:x,5 */
  1550. .name = "INT4 MI2S_RX Hostless",
  1551. .stream_name = "INT4 MI2S_RX Hostless",
  1552. .cpu_dai_name = "INT4_MI2S_RX_HOSTLESS",
  1553. .platform_name = "msm-pcm-hostless",
  1554. .dynamic = 1,
  1555. .dpcm_playback = 1,
  1556. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1557. SND_SOC_DPCM_TRIGGER_POST},
  1558. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1559. .ignore_suspend = 1,
  1560. /* this dailink has playback support */
  1561. .ignore_pmdown_time = 1,
  1562. /* This dainlink has MI2S support */
  1563. .codec_dai_name = "snd-soc-dummy-dai",
  1564. .codec_name = "snd-soc-dummy",
  1565. },
  1566. {/* hw:x,6 */
  1567. .name = "MSM AFE-PCM RX",
  1568. .stream_name = "AFE-PROXY RX",
  1569. .cpu_dai_name = "msm-dai-q6-dev.241",
  1570. .codec_name = "msm-stub-codec.1",
  1571. .codec_dai_name = "msm-stub-rx",
  1572. .platform_name = "msm-pcm-afe",
  1573. .ignore_suspend = 1,
  1574. /* this dai link has playback support */
  1575. .ignore_pmdown_time = 1,
  1576. },
  1577. {/* hw:x,7 */
  1578. .name = "MSM AFE-PCM TX",
  1579. .stream_name = "AFE-PROXY TX",
  1580. .cpu_dai_name = "msm-dai-q6-dev.240",
  1581. .codec_name = "msm-stub-codec.1",
  1582. .codec_dai_name = "msm-stub-tx",
  1583. .platform_name = "msm-pcm-afe",
  1584. .ignore_suspend = 1,
  1585. },
  1586. {/* hw:x,8 */
  1587. .name = MSM_DAILINK_NAME(Compress1),
  1588. .stream_name = "Compress1",
  1589. .cpu_dai_name = "MultiMedia4",
  1590. .platform_name = "msm-compress-dsp",
  1591. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  1592. .dynamic = 1,
  1593. .dpcm_capture = 1,
  1594. .dpcm_playback = 1,
  1595. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1596. SND_SOC_DPCM_TRIGGER_POST},
  1597. .codec_dai_name = "snd-soc-dummy-dai",
  1598. .codec_name = "snd-soc-dummy",
  1599. .ignore_suspend = 1,
  1600. .ignore_pmdown_time = 1,
  1601. /* this dai link has playback support */
  1602. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  1603. },
  1604. {/* hw:x,9*/
  1605. .name = "AUXPCM Hostless",
  1606. .stream_name = "AUXPCM Hostless",
  1607. .cpu_dai_name = "AUXPCM_HOSTLESS",
  1608. .platform_name = "msm-pcm-hostless",
  1609. .dynamic = 1,
  1610. .dpcm_capture = 1,
  1611. .dpcm_playback = 1,
  1612. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1613. SND_SOC_DPCM_TRIGGER_POST},
  1614. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1615. .ignore_suspend = 1,
  1616. /* this dai link has playback support */
  1617. .ignore_pmdown_time = 1,
  1618. .codec_dai_name = "snd-soc-dummy-dai",
  1619. .codec_name = "snd-soc-dummy",
  1620. },
  1621. {/* hw:x,10 */
  1622. .name = "SLIMBUS_1 Hostless",
  1623. .stream_name = "SLIMBUS_1 Hostless",
  1624. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  1625. .platform_name = "msm-pcm-hostless",
  1626. .dynamic = 1,
  1627. .dpcm_capture = 1,
  1628. .dpcm_playback = 1,
  1629. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1630. SND_SOC_DPCM_TRIGGER_POST},
  1631. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1632. .ignore_suspend = 1,
  1633. .ignore_pmdown_time = 1, /* dai link has playback support */
  1634. .codec_dai_name = "snd-soc-dummy-dai",
  1635. .codec_name = "snd-soc-dummy",
  1636. },
  1637. {/* hw:x,11 */
  1638. .name = "INT3 MI2S_TX Hostless",
  1639. .stream_name = "INT3 MI2S_TX Hostless",
  1640. .cpu_dai_name = "INT3_MI2S_TX_HOSTLESS",
  1641. .platform_name = "msm-pcm-hostless",
  1642. .dynamic = 1,
  1643. .dpcm_capture = 1,
  1644. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1645. SND_SOC_DPCM_TRIGGER_POST},
  1646. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1647. .ignore_suspend = 1,
  1648. .ignore_pmdown_time = 1,
  1649. .codec_dai_name = "snd-soc-dummy-dai",
  1650. .codec_name = "snd-soc-dummy",
  1651. },
  1652. {/* hw:x,12 */
  1653. .name = "SLIMBUS_7 Hostless",
  1654. .stream_name = "SLIMBUS_7 Hostless",
  1655. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  1656. .platform_name = "msm-pcm-hostless",
  1657. .dynamic = 1,
  1658. .dpcm_capture = 1,
  1659. .dpcm_playback = 1,
  1660. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1661. SND_SOC_DPCM_TRIGGER_POST},
  1662. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1663. .ignore_suspend = 1,
  1664. .ignore_pmdown_time = 1, /* dai link has playback support */
  1665. .codec_dai_name = "snd-soc-dummy-dai",
  1666. .codec_name = "snd-soc-dummy",
  1667. },
  1668. {/* hw:x,13 */
  1669. .name = MSM_DAILINK_NAME(LowLatency),
  1670. .stream_name = "MultiMedia5",
  1671. .cpu_dai_name = "MultiMedia5",
  1672. .platform_name = "msm-pcm-dsp.1",
  1673. .dynamic = 1,
  1674. .dpcm_capture = 1,
  1675. .dpcm_playback = 1,
  1676. .codec_dai_name = "snd-soc-dummy-dai",
  1677. .codec_name = "snd-soc-dummy",
  1678. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1679. SND_SOC_DPCM_TRIGGER_POST},
  1680. .ignore_suspend = 1,
  1681. /* this dai link has playback support */
  1682. .ignore_pmdown_time = 1,
  1683. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  1684. },
  1685. /* LSM FE */
  1686. {/* hw:x,14 */
  1687. .name = "Listen 1 Audio Service",
  1688. .stream_name = "Listen 1 Audio Service",
  1689. .cpu_dai_name = "LSM1",
  1690. .platform_name = "msm-lsm-client",
  1691. .dynamic = 1,
  1692. .dpcm_capture = 1,
  1693. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1694. SND_SOC_DPCM_TRIGGER_POST },
  1695. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1696. .ignore_suspend = 1,
  1697. .ignore_pmdown_time = 1,
  1698. .codec_dai_name = "snd-soc-dummy-dai",
  1699. .codec_name = "snd-soc-dummy",
  1700. .id = MSM_FRONTEND_DAI_LSM1,
  1701. },
  1702. {/* hw:x,15 */
  1703. .name = MSM_DAILINK_NAME(Compress2),
  1704. .stream_name = "Compress2",
  1705. .cpu_dai_name = "MultiMedia7",
  1706. .platform_name = "msm-compress-dsp",
  1707. .dynamic = 1,
  1708. .dpcm_capture = 1,
  1709. .dpcm_playback = 1,
  1710. .codec_dai_name = "snd-soc-dummy-dai",
  1711. .codec_name = "snd-soc-dummy",
  1712. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1713. SND_SOC_DPCM_TRIGGER_POST},
  1714. .ignore_suspend = 1,
  1715. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  1716. },
  1717. {/* hw:x,16 */
  1718. .name = MSM_DAILINK_NAME(MultiMedia10),
  1719. .stream_name = "MultiMedia10",
  1720. .cpu_dai_name = "MultiMedia10",
  1721. .platform_name = "msm-pcm-dsp.1",
  1722. .dynamic = 1,
  1723. .dpcm_capture = 1,
  1724. .dpcm_playback = 1,
  1725. .dpcm_capture = 1,
  1726. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1727. SND_SOC_DPCM_TRIGGER_POST},
  1728. .codec_dai_name = "snd-soc-dummy-dai",
  1729. .codec_name = "snd-soc-dummy",
  1730. .ignore_suspend = 1,
  1731. .ignore_pmdown_time = 1,
  1732. /* this dai link has playback support */
  1733. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  1734. },
  1735. {/* hw:x,17 */
  1736. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  1737. .stream_name = "MM_NOIRQ",
  1738. .cpu_dai_name = "MultiMedia8",
  1739. .platform_name = "msm-pcm-dsp-noirq",
  1740. .dynamic = 1,
  1741. .dpcm_capture = 1,
  1742. .dpcm_playback = 1,
  1743. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1744. SND_SOC_DPCM_TRIGGER_POST},
  1745. .codec_dai_name = "snd-soc-dummy-dai",
  1746. .codec_name = "snd-soc-dummy",
  1747. .ignore_suspend = 1,
  1748. .ignore_pmdown_time = 1,
  1749. /* this dai link has playback support */
  1750. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  1751. },
  1752. {/* hw:x,18 */
  1753. .name = "HDMI_RX_HOSTLESS",
  1754. .stream_name = "HDMI_RX_HOSTLESS",
  1755. .cpu_dai_name = "HDMI_HOSTLESS",
  1756. .platform_name = "msm-pcm-hostless",
  1757. .dynamic = 1,
  1758. .dpcm_playback = 1,
  1759. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1760. SND_SOC_DPCM_TRIGGER_POST},
  1761. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1762. .ignore_suspend = 1,
  1763. .ignore_pmdown_time = 1,
  1764. .codec_dai_name = "snd-soc-dummy-dai",
  1765. .codec_name = "snd-soc-dummy",
  1766. },
  1767. {/* hw:x,19 */
  1768. .name = "VoiceMMode2",
  1769. .stream_name = "VoiceMMode2",
  1770. .cpu_dai_name = "VoiceMMode2",
  1771. .platform_name = "msm-pcm-voice",
  1772. .dynamic = 1,
  1773. .dpcm_capture = 1,
  1774. .dpcm_playback = 1,
  1775. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1776. SND_SOC_DPCM_TRIGGER_POST},
  1777. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1778. .ignore_suspend = 1,
  1779. .ignore_pmdown_time = 1,
  1780. .codec_dai_name = "snd-soc-dummy-dai",
  1781. .codec_name = "snd-soc-dummy",
  1782. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  1783. },
  1784. {/* hw:x,20 */
  1785. .name = "Listen 2 Audio Service",
  1786. .stream_name = "Listen 2 Audio Service",
  1787. .cpu_dai_name = "LSM2",
  1788. .platform_name = "msm-lsm-client",
  1789. .dynamic = 1,
  1790. .dpcm_capture = 1,
  1791. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1792. SND_SOC_DPCM_TRIGGER_POST },
  1793. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1794. .ignore_suspend = 1,
  1795. .ignore_pmdown_time = 1,
  1796. .codec_dai_name = "snd-soc-dummy-dai",
  1797. .codec_name = "snd-soc-dummy",
  1798. .id = MSM_FRONTEND_DAI_LSM2,
  1799. },
  1800. {/* hw:x,21 */
  1801. .name = "Listen 3 Audio Service",
  1802. .stream_name = "Listen 3 Audio Service",
  1803. .cpu_dai_name = "LSM3",
  1804. .platform_name = "msm-lsm-client",
  1805. .dynamic = 1,
  1806. .dpcm_capture = 1,
  1807. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1808. SND_SOC_DPCM_TRIGGER_POST },
  1809. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1810. .ignore_suspend = 1,
  1811. .ignore_pmdown_time = 1,
  1812. .codec_dai_name = "snd-soc-dummy-dai",
  1813. .codec_name = "snd-soc-dummy",
  1814. .id = MSM_FRONTEND_DAI_LSM3,
  1815. },
  1816. {/* hw:x,22 */
  1817. .name = "Listen 4 Audio Service",
  1818. .stream_name = "Listen 4 Audio Service",
  1819. .cpu_dai_name = "LSM4",
  1820. .platform_name = "msm-lsm-client",
  1821. .dynamic = 1,
  1822. .dpcm_capture = 1,
  1823. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1824. SND_SOC_DPCM_TRIGGER_POST },
  1825. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1826. .ignore_suspend = 1,
  1827. .ignore_pmdown_time = 1,
  1828. .codec_dai_name = "snd-soc-dummy-dai",
  1829. .codec_name = "snd-soc-dummy",
  1830. .id = MSM_FRONTEND_DAI_LSM4,
  1831. },
  1832. {/* hw:x,23 */
  1833. .name = "Listen 5 Audio Service",
  1834. .stream_name = "Listen 5 Audio Service",
  1835. .cpu_dai_name = "LSM5",
  1836. .platform_name = "msm-lsm-client",
  1837. .dynamic = 1,
  1838. .dpcm_capture = 1,
  1839. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1840. SND_SOC_DPCM_TRIGGER_POST },
  1841. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1842. .ignore_suspend = 1,
  1843. .ignore_pmdown_time = 1,
  1844. .codec_dai_name = "snd-soc-dummy-dai",
  1845. .codec_name = "snd-soc-dummy",
  1846. .id = MSM_FRONTEND_DAI_LSM5,
  1847. },
  1848. {/* hw:x,24 */
  1849. .name = "Listen 6 Audio Service",
  1850. .stream_name = "Listen 6 Audio Service",
  1851. .cpu_dai_name = "LSM6",
  1852. .platform_name = "msm-lsm-client",
  1853. .dynamic = 1,
  1854. .dpcm_capture = 1,
  1855. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1856. SND_SOC_DPCM_TRIGGER_POST },
  1857. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1858. .ignore_suspend = 1,
  1859. .ignore_pmdown_time = 1,
  1860. .codec_dai_name = "snd-soc-dummy-dai",
  1861. .codec_name = "snd-soc-dummy",
  1862. .id = MSM_FRONTEND_DAI_LSM6
  1863. },
  1864. {/* hw:x,25 */
  1865. .name = "Listen 7 Audio Service",
  1866. .stream_name = "Listen 7 Audio Service",
  1867. .cpu_dai_name = "LSM7",
  1868. .platform_name = "msm-lsm-client",
  1869. .dynamic = 1,
  1870. .dpcm_capture = 1,
  1871. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1872. SND_SOC_DPCM_TRIGGER_POST },
  1873. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1874. .ignore_suspend = 1,
  1875. .ignore_pmdown_time = 1,
  1876. .codec_dai_name = "snd-soc-dummy-dai",
  1877. .codec_name = "snd-soc-dummy",
  1878. .id = MSM_FRONTEND_DAI_LSM7,
  1879. },
  1880. {/* hw:x,26 */
  1881. .name = "Listen 8 Audio Service",
  1882. .stream_name = "Listen 8 Audio Service",
  1883. .cpu_dai_name = "LSM8",
  1884. .platform_name = "msm-lsm-client",
  1885. .dynamic = 1,
  1886. .dpcm_capture = 1,
  1887. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1888. SND_SOC_DPCM_TRIGGER_POST },
  1889. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  1890. .ignore_suspend = 1,
  1891. .ignore_pmdown_time = 1,
  1892. .codec_dai_name = "snd-soc-dummy-dai",
  1893. .codec_name = "snd-soc-dummy",
  1894. .id = MSM_FRONTEND_DAI_LSM8,
  1895. },
  1896. {/* hw:x,27 */
  1897. .name = MSM_DAILINK_NAME(Media9),
  1898. .stream_name = "MultiMedia9",
  1899. .cpu_dai_name = "MultiMedia9",
  1900. .platform_name = "msm-pcm-dsp.0",
  1901. .dynamic = 1,
  1902. .dpcm_capture = 1,
  1903. .dpcm_playback = 1,
  1904. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1905. SND_SOC_DPCM_TRIGGER_POST},
  1906. .codec_dai_name = "snd-soc-dummy-dai",
  1907. .codec_name = "snd-soc-dummy",
  1908. .ignore_suspend = 1,
  1909. .ignore_pmdown_time = 1,
  1910. /* this dai link has playback support */
  1911. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  1912. },
  1913. {/* hw:x,28 */
  1914. .name = MSM_DAILINK_NAME(Compress4),
  1915. .stream_name = "Compress4",
  1916. .cpu_dai_name = "MultiMedia11",
  1917. .platform_name = "msm-compress-dsp",
  1918. .dynamic = 1,
  1919. .dpcm_capture = 1,
  1920. .dpcm_playback = 1,
  1921. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1922. SND_SOC_DPCM_TRIGGER_POST},
  1923. .codec_dai_name = "snd-soc-dummy-dai",
  1924. .codec_name = "snd-soc-dummy",
  1925. .ignore_suspend = 1,
  1926. .ignore_pmdown_time = 1,
  1927. /* this dai link has playback support */
  1928. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  1929. },
  1930. {/* hw:x,29 */
  1931. .name = MSM_DAILINK_NAME(Compress5),
  1932. .stream_name = "Compress5",
  1933. .cpu_dai_name = "MultiMedia12",
  1934. .platform_name = "msm-compress-dsp",
  1935. .dynamic = 1,
  1936. .dpcm_capture = 1,
  1937. .dpcm_playback = 1,
  1938. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1939. SND_SOC_DPCM_TRIGGER_POST},
  1940. .codec_dai_name = "snd-soc-dummy-dai",
  1941. .codec_name = "snd-soc-dummy",
  1942. .ignore_suspend = 1,
  1943. .ignore_pmdown_time = 1,
  1944. /* this dai link has playback support */
  1945. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  1946. },
  1947. {/* hw:x,30 */
  1948. .name = MSM_DAILINK_NAME(Compress6),
  1949. .stream_name = "Compress6",
  1950. .cpu_dai_name = "MultiMedia13",
  1951. .platform_name = "msm-compress-dsp",
  1952. .dynamic = 1,
  1953. .dpcm_capture = 1,
  1954. .dpcm_playback = 1,
  1955. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1956. SND_SOC_DPCM_TRIGGER_POST},
  1957. .codec_dai_name = "snd-soc-dummy-dai",
  1958. .codec_name = "snd-soc-dummy",
  1959. .ignore_suspend = 1,
  1960. .ignore_pmdown_time = 1,
  1961. /* this dai link has playback support */
  1962. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  1963. },
  1964. {/* hw:x,31 */
  1965. .name = MSM_DAILINK_NAME(Compress7),
  1966. .stream_name = "Compress7",
  1967. .cpu_dai_name = "MultiMedia14",
  1968. .platform_name = "msm-compress-dsp",
  1969. .dynamic = 1,
  1970. .dpcm_capture = 1,
  1971. .dpcm_playback = 1,
  1972. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1973. SND_SOC_DPCM_TRIGGER_POST},
  1974. .codec_dai_name = "snd-soc-dummy-dai",
  1975. .codec_name = "snd-soc-dummy",
  1976. .ignore_suspend = 1,
  1977. .ignore_pmdown_time = 1,
  1978. /* this dai link has playback support */
  1979. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  1980. },
  1981. {/* hw:x,32 */
  1982. .name = MSM_DAILINK_NAME(Compress8),
  1983. .stream_name = "Compress8",
  1984. .cpu_dai_name = "MultiMedia15",
  1985. .platform_name = "msm-compress-dsp",
  1986. .dynamic = 1,
  1987. .dpcm_capture = 1,
  1988. .dpcm_playback = 1,
  1989. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  1990. SND_SOC_DPCM_TRIGGER_POST},
  1991. .codec_dai_name = "snd-soc-dummy-dai",
  1992. .codec_name = "snd-soc-dummy",
  1993. .ignore_suspend = 1,
  1994. .ignore_pmdown_time = 1,
  1995. /* this dai link has playback support */
  1996. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  1997. },
  1998. {/* hw:x,33 */
  1999. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  2000. .stream_name = "MM_NOIRQ_2",
  2001. .cpu_dai_name = "MultiMedia16",
  2002. .platform_name = "msm-pcm-dsp-noirq",
  2003. .dynamic = 1,
  2004. .dpcm_capture = 1,
  2005. .dpcm_playback = 1,
  2006. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2007. SND_SOC_DPCM_TRIGGER_POST},
  2008. .codec_dai_name = "snd-soc-dummy-dai",
  2009. .codec_name = "snd-soc-dummy",
  2010. .ignore_suspend = 1,
  2011. .ignore_pmdown_time = 1,
  2012. /* this dai link has playback support */
  2013. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  2014. },
  2015. {/* hw:x,34 */
  2016. .name = "SLIMBUS_8 Hostless",
  2017. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  2018. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  2019. .platform_name = "msm-pcm-hostless",
  2020. .dynamic = 1,
  2021. .dpcm_capture = 1,
  2022. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2023. SND_SOC_DPCM_TRIGGER_POST},
  2024. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2025. .ignore_suspend = 1,
  2026. .ignore_pmdown_time = 1,
  2027. .codec_dai_name = "snd-soc-dummy-dai",
  2028. .codec_name = "snd-soc-dummy",
  2029. },
  2030. {/* hw:x,35 */
  2031. .name = "Primary MI2S_RX Hostless",
  2032. .stream_name = "Primary MI2S_RX Hostless",
  2033. .cpu_dai_name = "PRI_MI2S_RX_HOSTLESS",
  2034. .platform_name = "msm-pcm-hostless",
  2035. .dynamic = 1,
  2036. .dpcm_playback = 1,
  2037. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2038. SND_SOC_DPCM_TRIGGER_POST},
  2039. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2040. .ignore_suspend = 1,
  2041. /* this dailink has playback support */
  2042. .ignore_pmdown_time = 1,
  2043. /* This dainlink has MI2S support */
  2044. .codec_dai_name = "snd-soc-dummy-dai",
  2045. .codec_name = "snd-soc-dummy",
  2046. },
  2047. {/* hw:x,36 */
  2048. .name = "Secondary MI2S_RX Hostless",
  2049. .stream_name = "Secondary MI2S_RX Hostless",
  2050. .cpu_dai_name = "SEC_MI2S_RX_HOSTLESS",
  2051. .platform_name = "msm-pcm-hostless",
  2052. .dynamic = 1,
  2053. .dpcm_playback = 1,
  2054. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2055. SND_SOC_DPCM_TRIGGER_POST},
  2056. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2057. .ignore_suspend = 1,
  2058. /* this dailink has playback support */
  2059. .ignore_pmdown_time = 1,
  2060. /* This dainlink has MI2S support */
  2061. .codec_dai_name = "snd-soc-dummy-dai",
  2062. .codec_name = "snd-soc-dummy",
  2063. },
  2064. {/* hw:x,37 */
  2065. .name = "Tertiary MI2S_RX Hostless",
  2066. .stream_name = "Tertiary MI2S_RX Hostless",
  2067. .cpu_dai_name = "TERT_MI2S_RX_HOSTLESS",
  2068. .platform_name = "msm-pcm-hostless",
  2069. .dynamic = 1,
  2070. .dpcm_playback = 1,
  2071. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2072. SND_SOC_DPCM_TRIGGER_POST},
  2073. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2074. .ignore_suspend = 1,
  2075. /* this dailink has playback support */
  2076. .ignore_pmdown_time = 1,
  2077. /* This dainlink has MI2S support */
  2078. .codec_dai_name = "snd-soc-dummy-dai",
  2079. .codec_name = "snd-soc-dummy",
  2080. },
  2081. {/* hw:x,38 */
  2082. .name = "INT0 MI2S_RX Hostless",
  2083. .stream_name = "INT0 MI2S_RX Hostless",
  2084. .cpu_dai_name = "INT0_MI2S_RX_HOSTLESS",
  2085. .platform_name = "msm-pcm-hostless",
  2086. .dynamic = 1,
  2087. .dpcm_playback = 1,
  2088. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2089. SND_SOC_DPCM_TRIGGER_POST},
  2090. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2091. .ignore_suspend = 1,
  2092. /* this dailink has playback support */
  2093. .ignore_pmdown_time = 1,
  2094. /* This dainlink has MI2S support */
  2095. .codec_dai_name = "snd-soc-dummy-dai",
  2096. .codec_name = "snd-soc-dummy",
  2097. },
  2098. {/* hw:x,39 */
  2099. .name = "SDM660 HFP TX",
  2100. .stream_name = "MultiMedia6",
  2101. .cpu_dai_name = "MultiMedia6",
  2102. .platform_name = "msm-pcm-loopback",
  2103. .dynamic = 1,
  2104. .dpcm_playback = 1,
  2105. .dpcm_capture = 1,
  2106. .codec_dai_name = "snd-soc-dummy-dai",
  2107. .codec_name = "snd-soc-dummy",
  2108. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  2109. SND_SOC_DPCM_TRIGGER_POST},
  2110. .ignore_suspend = 1,
  2111. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2112. .ignore_pmdown_time = 1,
  2113. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  2114. },
  2115. };
  2116. static struct snd_soc_dai_link msm_int_wsa_dai[] = {
  2117. {/* hw:x,40 */
  2118. .name = LPASS_BE_INT5_MI2S_TX,
  2119. .stream_name = "INT5_mi2s Capture",
  2120. .cpu_dai_name = "msm-dai-q6-mi2s.12",
  2121. .platform_name = "msm-pcm-hostless",
  2122. .codec_name = "msm_sdw_codec",
  2123. .codec_dai_name = "msm_sdw_vifeedback",
  2124. .id = MSM_BACKEND_DAI_INT5_MI2S_TX,
  2125. .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
  2126. .ops = &msm_sdw_mi2s_be_ops,
  2127. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  2128. .ignore_suspend = 1,
  2129. .dpcm_capture = 1,
  2130. .ignore_pmdown_time = 1,
  2131. },
  2132. };
  2133. static struct snd_soc_dai_link msm_int_be_dai[] = {
  2134. /* Backend I2S DAI Links */
  2135. {
  2136. .name = LPASS_BE_INT0_MI2S_RX,
  2137. .stream_name = "INT0 MI2S Playback",
  2138. .cpu_dai_name = "msm-dai-q6-mi2s.7",
  2139. .platform_name = "msm-pcm-routing",
  2140. .codecs = dlc_rx1,
  2141. .num_codecs = CODECS_MAX,
  2142. .no_pcm = 1,
  2143. .dpcm_playback = 1,
  2144. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
  2145. ASYNC_DPCM_SND_SOC_HW_PARAMS,
  2146. .id = MSM_BACKEND_DAI_INT0_MI2S_RX,
  2147. .init = &msm_audrx_init,
  2148. .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
  2149. .ops = &msm_int_mi2s_be_ops,
  2150. .ignore_suspend = 1,
  2151. },
  2152. {
  2153. .name = LPASS_BE_INT3_MI2S_TX,
  2154. .stream_name = "INT3 MI2S Capture",
  2155. .cpu_dai_name = "msm-dai-q6-mi2s.10",
  2156. .platform_name = "msm-pcm-routing",
  2157. .codecs = dlc_tx1,
  2158. .num_codecs = CODECS_MAX,
  2159. .no_pcm = 1,
  2160. .dpcm_capture = 1,
  2161. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
  2162. ASYNC_DPCM_SND_SOC_HW_PARAMS,
  2163. .id = MSM_BACKEND_DAI_INT3_MI2S_TX,
  2164. .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
  2165. .ops = &msm_int_mi2s_be_ops,
  2166. .ignore_suspend = 1,
  2167. },
  2168. {
  2169. .name = LPASS_BE_INT2_MI2S_TX,
  2170. .stream_name = "INT2 MI2S Capture",
  2171. .cpu_dai_name = "msm-dai-q6-mi2s.9",
  2172. .platform_name = "msm-pcm-routing",
  2173. .codecs = dlc_tx2,
  2174. .num_codecs = CODECS_MAX,
  2175. .no_pcm = 1,
  2176. .dpcm_capture = 1,
  2177. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE |
  2178. ASYNC_DPCM_SND_SOC_HW_PARAMS,
  2179. .id = MSM_BACKEND_DAI_INT2_MI2S_TX,
  2180. .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
  2181. .ops = &msm_int_mi2s_be_ops,
  2182. .ignore_suspend = 1,
  2183. },
  2184. {
  2185. .name = LPASS_BE_AFE_PCM_RX,
  2186. .stream_name = "AFE Playback",
  2187. .cpu_dai_name = "msm-dai-q6-dev.224",
  2188. .platform_name = "msm-pcm-routing",
  2189. .codec_name = "msm-stub-codec.1",
  2190. .codec_dai_name = "msm-stub-rx",
  2191. .no_pcm = 1,
  2192. .dpcm_playback = 1,
  2193. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  2194. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2195. /* this dainlink has playback support */
  2196. .ignore_pmdown_time = 1,
  2197. .ignore_suspend = 1,
  2198. },
  2199. {
  2200. .name = LPASS_BE_AFE_PCM_TX,
  2201. .stream_name = "AFE Capture",
  2202. .cpu_dai_name = "msm-dai-q6-dev.225",
  2203. .platform_name = "msm-pcm-routing",
  2204. .codec_name = "msm-stub-codec.1",
  2205. .codec_dai_name = "msm-stub-tx",
  2206. .no_pcm = 1,
  2207. .dpcm_capture = 1,
  2208. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  2209. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2210. .ignore_suspend = 1,
  2211. },
  2212. /* Incall Record Uplink BACK END DAI Link */
  2213. {
  2214. .name = LPASS_BE_INCALL_RECORD_TX,
  2215. .stream_name = "Voice Uplink Capture",
  2216. .cpu_dai_name = "msm-dai-q6-dev.32772",
  2217. .platform_name = "msm-pcm-routing",
  2218. .codec_name = "msm-stub-codec.1",
  2219. .codec_dai_name = "msm-stub-tx",
  2220. .no_pcm = 1,
  2221. .dpcm_capture = 1,
  2222. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  2223. .be_hw_params_fixup = msm_be_hw_params_fixup,
  2224. .ignore_suspend = 1,
  2225. },
  2226. /* Incall Record Downlink BACK END DAI Link */
  2227. {
  2228. .name = LPASS_BE_INCALL_RECORD_RX,
  2229. .stream_name = "Voice Downlink Capture",
  2230. .cpu_dai_name = "msm-dai-q6-dev.32771",
  2231. .platform_name = "msm-pcm-routing",
  2232. .codec_name = "msm-stub-codec.1",
  2233. .codec_dai_name = "msm-stub-tx",
  2234. .no_pcm = 1,
  2235. .dpcm_capture = 1,
  2236. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  2237. .be_hw_params_fixup = msm_be_hw_params_fixup,
  2238. .ignore_suspend = 1,
  2239. },
  2240. /* Incall Music BACK END DAI Link */
  2241. {
  2242. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  2243. .stream_name = "Voice Farend Playback",
  2244. .cpu_dai_name = "msm-dai-q6-dev.32773",
  2245. .platform_name = "msm-pcm-routing",
  2246. .codec_name = "msm-stub-codec.1",
  2247. .codec_dai_name = "msm-stub-rx",
  2248. .no_pcm = 1,
  2249. .dpcm_playback = 1,
  2250. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  2251. .be_hw_params_fixup = msm_be_hw_params_fixup,
  2252. .ignore_suspend = 1,
  2253. },
  2254. /* Incall Music 2 BACK END DAI Link */
  2255. {
  2256. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  2257. .stream_name = "Voice2 Farend Playback",
  2258. .cpu_dai_name = "msm-dai-q6-dev.32770",
  2259. .platform_name = "msm-pcm-routing",
  2260. .codec_name = "msm-stub-codec.1",
  2261. .codec_dai_name = "msm-stub-rx",
  2262. .no_pcm = 1,
  2263. .dpcm_playback = 1,
  2264. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  2265. .be_hw_params_fixup = msm_be_hw_params_fixup,
  2266. .ignore_suspend = 1,
  2267. },
  2268. {
  2269. .name = LPASS_BE_USB_AUDIO_RX,
  2270. .stream_name = "USB Audio Playback",
  2271. .cpu_dai_name = "msm-dai-q6-dev.28672",
  2272. .platform_name = "msm-pcm-routing",
  2273. .codec_name = "msm-stub-codec.1",
  2274. .codec_dai_name = "msm-stub-rx",
  2275. .no_pcm = 1,
  2276. .dpcm_playback = 1,
  2277. .id = MSM_BACKEND_DAI_USB_RX,
  2278. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2279. .ignore_pmdown_time = 1,
  2280. .ignore_suspend = 1,
  2281. },
  2282. {
  2283. .name = LPASS_BE_USB_AUDIO_TX,
  2284. .stream_name = "USB Audio Capture",
  2285. .cpu_dai_name = "msm-dai-q6-dev.28673",
  2286. .platform_name = "msm-pcm-routing",
  2287. .codec_name = "msm-stub-codec.1",
  2288. .codec_dai_name = "msm-stub-tx",
  2289. .no_pcm = 1,
  2290. .dpcm_capture = 1,
  2291. .id = MSM_BACKEND_DAI_USB_TX,
  2292. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2293. .ignore_suspend = 1,
  2294. },
  2295. {
  2296. .name = LPASS_BE_PRI_TDM_RX_0,
  2297. .stream_name = "Primary TDM0 Playback",
  2298. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  2299. .platform_name = "msm-pcm-routing",
  2300. .codec_name = "msm-stub-codec.1",
  2301. .codec_dai_name = "msm-stub-rx",
  2302. .no_pcm = 1,
  2303. .dpcm_playback = 1,
  2304. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  2305. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2306. .ops = &msm_tdm_be_ops,
  2307. .ignore_suspend = 1,
  2308. },
  2309. {
  2310. .name = LPASS_BE_PRI_TDM_TX_0,
  2311. .stream_name = "Primary TDM0 Capture",
  2312. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  2313. .platform_name = "msm-pcm-routing",
  2314. .codec_name = "msm-stub-codec.1",
  2315. .codec_dai_name = "msm-stub-tx",
  2316. .no_pcm = 1,
  2317. .dpcm_capture = 1,
  2318. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  2319. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2320. .ops = &msm_tdm_be_ops,
  2321. .ignore_suspend = 1,
  2322. },
  2323. {
  2324. .name = LPASS_BE_SEC_TDM_RX_0,
  2325. .stream_name = "Secondary TDM0 Playback",
  2326. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  2327. .platform_name = "msm-pcm-routing",
  2328. .codec_name = "msm-stub-codec.1",
  2329. .codec_dai_name = "msm-stub-rx",
  2330. .no_pcm = 1,
  2331. .dpcm_playback = 1,
  2332. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  2333. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2334. .ops = &msm_tdm_be_ops,
  2335. .ignore_suspend = 1,
  2336. },
  2337. {
  2338. .name = LPASS_BE_SEC_TDM_TX_0,
  2339. .stream_name = "Secondary TDM0 Capture",
  2340. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  2341. .platform_name = "msm-pcm-routing",
  2342. .codec_name = "msm-stub-codec.1",
  2343. .codec_dai_name = "msm-stub-tx",
  2344. .no_pcm = 1,
  2345. .dpcm_capture = 1,
  2346. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  2347. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2348. .ops = &msm_tdm_be_ops,
  2349. .ignore_suspend = 1,
  2350. },
  2351. {
  2352. .name = LPASS_BE_TERT_TDM_RX_0,
  2353. .stream_name = "Tertiary TDM0 Playback",
  2354. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  2355. .platform_name = "msm-pcm-routing",
  2356. .codec_name = "msm-stub-codec.1",
  2357. .codec_dai_name = "msm-stub-rx",
  2358. .no_pcm = 1,
  2359. .dpcm_playback = 1,
  2360. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  2361. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2362. .ops = &msm_tdm_be_ops,
  2363. .ignore_suspend = 1,
  2364. },
  2365. {
  2366. .name = LPASS_BE_TERT_TDM_TX_0,
  2367. .stream_name = "Tertiary TDM0 Capture",
  2368. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  2369. .platform_name = "msm-pcm-routing",
  2370. .codec_name = "msm-stub-codec.1",
  2371. .codec_dai_name = "msm-stub-tx",
  2372. .no_pcm = 1,
  2373. .dpcm_capture = 1,
  2374. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  2375. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2376. .ops = &msm_tdm_be_ops,
  2377. .ignore_suspend = 1,
  2378. },
  2379. {
  2380. .name = LPASS_BE_QUAT_TDM_RX_0,
  2381. .stream_name = "Quaternary TDM0 Playback",
  2382. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  2383. .platform_name = "msm-pcm-routing",
  2384. .codec_name = "msm-stub-codec.1",
  2385. .codec_dai_name = "msm-stub-rx",
  2386. .no_pcm = 1,
  2387. .dpcm_playback = 1,
  2388. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  2389. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2390. .ops = &msm_tdm_be_ops,
  2391. .ignore_suspend = 1,
  2392. },
  2393. {
  2394. .name = LPASS_BE_QUAT_TDM_TX_0,
  2395. .stream_name = "Quaternary TDM0 Capture",
  2396. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  2397. .platform_name = "msm-pcm-routing",
  2398. .codec_name = "msm-stub-codec.1",
  2399. .codec_dai_name = "msm-stub-tx",
  2400. .no_pcm = 1,
  2401. .dpcm_capture = 1,
  2402. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  2403. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2404. .ops = &msm_tdm_be_ops,
  2405. .ignore_suspend = 1,
  2406. },
  2407. {
  2408. .name = LPASS_BE_QUIN_TDM_RX_0,
  2409. .stream_name = "Quinary TDM0 Playback",
  2410. .cpu_dai_name = "msm-dai-q6-tdm.36928",
  2411. .platform_name = "msm-pcm-routing",
  2412. .codec_name = "msm-stub-codec.1",
  2413. .codec_dai_name = "msm-stub-rx",
  2414. .no_pcm = 1,
  2415. .dpcm_playback = 1,
  2416. .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
  2417. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2418. .ops = &msm_tdm_be_ops,
  2419. .ignore_suspend = 1,
  2420. },
  2421. {
  2422. .name = LPASS_BE_QUIN_TDM_TX_0,
  2423. .stream_name = "Quinary TDM0 Capture",
  2424. .cpu_dai_name = "msm-dai-q6-tdm.36929",
  2425. .platform_name = "msm-pcm-routing",
  2426. .codec_name = "msm-stub-codec.1",
  2427. .codec_dai_name = "msm-stub-tx",
  2428. .no_pcm = 1,
  2429. .dpcm_capture = 1,
  2430. .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
  2431. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2432. .ops = &msm_tdm_be_ops,
  2433. .ignore_suspend = 1,
  2434. },
  2435. };
  2436. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  2437. {
  2438. .name = LPASS_BE_PRI_MI2S_RX,
  2439. .stream_name = "Primary MI2S Playback",
  2440. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  2441. .platform_name = "msm-pcm-routing",
  2442. .codec_name = "msm-stub-codec.1",
  2443. .codec_dai_name = "msm-stub-rx",
  2444. .no_pcm = 1,
  2445. .dpcm_playback = 1,
  2446. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  2447. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2448. .ops = &msm_mi2s_be_ops,
  2449. .ignore_suspend = 1,
  2450. .ignore_pmdown_time = 1,
  2451. },
  2452. {
  2453. .name = LPASS_BE_PRI_MI2S_TX,
  2454. .stream_name = "Primary MI2S Capture",
  2455. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  2456. .platform_name = "msm-pcm-routing",
  2457. .codec_name = "msm-stub-codec.1",
  2458. .codec_dai_name = "msm-stub-tx",
  2459. .no_pcm = 1,
  2460. .dpcm_capture = 1,
  2461. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  2462. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2463. .ops = &msm_mi2s_be_ops,
  2464. .ignore_suspend = 1,
  2465. },
  2466. {
  2467. .name = LPASS_BE_SEC_MI2S_RX,
  2468. .stream_name = "Secondary MI2S Playback",
  2469. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  2470. .platform_name = "msm-pcm-routing",
  2471. .codec_name = "msm-stub-codec.1",
  2472. .codec_dai_name = "msm-stub-rx",
  2473. .no_pcm = 1,
  2474. .dpcm_playback = 1,
  2475. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  2476. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2477. .ops = &msm_mi2s_be_ops,
  2478. .ignore_suspend = 1,
  2479. .ignore_pmdown_time = 1,
  2480. },
  2481. {
  2482. .name = LPASS_BE_SEC_MI2S_TX,
  2483. .stream_name = "Secondary MI2S Capture",
  2484. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  2485. .platform_name = "msm-pcm-routing",
  2486. .codec_name = "msm-stub-codec.1",
  2487. .codec_dai_name = "msm-stub-tx",
  2488. .no_pcm = 1,
  2489. .dpcm_capture = 1,
  2490. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  2491. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2492. .ops = &msm_mi2s_be_ops,
  2493. .ignore_suspend = 1,
  2494. },
  2495. {
  2496. .name = LPASS_BE_TERT_MI2S_RX,
  2497. .stream_name = "Tertiary MI2S Playback",
  2498. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  2499. .platform_name = "msm-pcm-routing",
  2500. .codec_name = "msm-stub-codec.1",
  2501. .codec_dai_name = "msm-stub-rx",
  2502. .no_pcm = 1,
  2503. .dpcm_playback = 1,
  2504. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  2505. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2506. .ops = &msm_mi2s_be_ops,
  2507. .ignore_suspend = 1,
  2508. .ignore_pmdown_time = 1,
  2509. },
  2510. {
  2511. .name = LPASS_BE_TERT_MI2S_TX,
  2512. .stream_name = "Tertiary MI2S Capture",
  2513. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  2514. .platform_name = "msm-pcm-routing",
  2515. .codec_name = "msm-stub-codec.1",
  2516. .codec_dai_name = "msm-stub-tx",
  2517. .no_pcm = 1,
  2518. .dpcm_capture = 1,
  2519. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  2520. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2521. .ops = &msm_mi2s_be_ops,
  2522. .ignore_suspend = 1,
  2523. },
  2524. {
  2525. .name = LPASS_BE_QUAT_MI2S_RX,
  2526. .stream_name = "Quaternary MI2S Playback",
  2527. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  2528. .platform_name = "msm-pcm-routing",
  2529. .codec_name = "msm-stub-codec.1",
  2530. .codec_dai_name = "msm-stub-rx",
  2531. .no_pcm = 1,
  2532. .dpcm_playback = 1,
  2533. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  2534. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2535. .ops = &msm_mi2s_be_ops,
  2536. .ignore_suspend = 1,
  2537. .ignore_pmdown_time = 1,
  2538. },
  2539. {
  2540. .name = LPASS_BE_QUAT_MI2S_TX,
  2541. .stream_name = "Quaternary MI2S Capture",
  2542. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  2543. .platform_name = "msm-pcm-routing",
  2544. .codec_name = "msm-stub-codec.1",
  2545. .codec_dai_name = "msm-stub-tx",
  2546. .no_pcm = 1,
  2547. .dpcm_capture = 1,
  2548. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  2549. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2550. .ops = &msm_mi2s_be_ops,
  2551. .ignore_suspend = 1,
  2552. },
  2553. {
  2554. .name = LPASS_BE_QUIN_MI2S_RX,
  2555. .stream_name = "Quinary MI2S Playback",
  2556. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  2557. .platform_name = "msm-pcm-routing",
  2558. .codec_name = "msm-stub-codec.1",
  2559. .codec_dai_name = "msm-stub-rx",
  2560. .no_pcm = 1,
  2561. .dpcm_playback = 1,
  2562. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  2563. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2564. .ops = &msm_mi2s_be_ops,
  2565. .ignore_suspend = 1,
  2566. .ignore_pmdown_time = 1,
  2567. },
  2568. {
  2569. .name = LPASS_BE_QUIN_MI2S_TX,
  2570. .stream_name = "Quinary MI2S Capture",
  2571. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  2572. .platform_name = "msm-pcm-routing",
  2573. .codec_name = "msm-stub-codec.1",
  2574. .codec_dai_name = "msm-stub-tx",
  2575. .no_pcm = 1,
  2576. .dpcm_capture = 1,
  2577. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  2578. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2579. .ops = &msm_mi2s_be_ops,
  2580. .ignore_suspend = 1,
  2581. },
  2582. };
  2583. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  2584. /* Primary AUX PCM Backend DAI Links */
  2585. {
  2586. .name = LPASS_BE_AUXPCM_RX,
  2587. .stream_name = "AUX PCM Playback",
  2588. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  2589. .platform_name = "msm-pcm-routing",
  2590. .codec_name = "msm-stub-codec.1",
  2591. .codec_dai_name = "msm-stub-rx",
  2592. .no_pcm = 1,
  2593. .dpcm_playback = 1,
  2594. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  2595. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2596. .ignore_pmdown_time = 1,
  2597. .ignore_suspend = 1,
  2598. .ops = &msm_aux_pcm_be_ops,
  2599. },
  2600. {
  2601. .name = LPASS_BE_AUXPCM_TX,
  2602. .stream_name = "AUX PCM Capture",
  2603. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  2604. .platform_name = "msm-pcm-routing",
  2605. .codec_name = "msm-stub-codec.1",
  2606. .codec_dai_name = "msm-stub-tx",
  2607. .no_pcm = 1,
  2608. .dpcm_capture = 1,
  2609. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  2610. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2611. .ignore_pmdown_time = 1,
  2612. .ignore_suspend = 1,
  2613. .ops = &msm_aux_pcm_be_ops,
  2614. },
  2615. /* Secondary AUX PCM Backend DAI Links */
  2616. {
  2617. .name = LPASS_BE_SEC_AUXPCM_RX,
  2618. .stream_name = "Sec AUX PCM Playback",
  2619. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  2620. .platform_name = "msm-pcm-routing",
  2621. .codec_name = "msm-stub-codec.1",
  2622. .codec_dai_name = "msm-stub-rx",
  2623. .no_pcm = 1,
  2624. .dpcm_playback = 1,
  2625. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  2626. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2627. .ignore_pmdown_time = 1,
  2628. .ignore_suspend = 1,
  2629. .ops = &msm_aux_pcm_be_ops,
  2630. },
  2631. {
  2632. .name = LPASS_BE_SEC_AUXPCM_TX,
  2633. .stream_name = "Sec AUX PCM Capture",
  2634. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  2635. .platform_name = "msm-pcm-routing",
  2636. .codec_name = "msm-stub-codec.1",
  2637. .codec_dai_name = "msm-stub-tx",
  2638. .no_pcm = 1,
  2639. .dpcm_capture = 1,
  2640. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  2641. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2642. .ignore_suspend = 1,
  2643. .ignore_pmdown_time = 1,
  2644. .ops = &msm_aux_pcm_be_ops,
  2645. },
  2646. /* Tertiary AUX PCM Backend DAI Links */
  2647. {
  2648. .name = LPASS_BE_TERT_AUXPCM_RX,
  2649. .stream_name = "Tert AUX PCM Playback",
  2650. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  2651. .platform_name = "msm-pcm-routing",
  2652. .codec_name = "msm-stub-codec.1",
  2653. .codec_dai_name = "msm-stub-rx",
  2654. .no_pcm = 1,
  2655. .dpcm_playback = 1,
  2656. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  2657. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2658. .ignore_pmdown_time = 1,
  2659. .ignore_suspend = 1,
  2660. .ops = &msm_aux_pcm_be_ops,
  2661. },
  2662. {
  2663. .name = LPASS_BE_TERT_AUXPCM_TX,
  2664. .stream_name = "Tert AUX PCM Capture",
  2665. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  2666. .platform_name = "msm-pcm-routing",
  2667. .codec_name = "msm-stub-codec.1",
  2668. .codec_dai_name = "msm-stub-tx",
  2669. .no_pcm = 1,
  2670. .dpcm_capture = 1,
  2671. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  2672. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2673. .ignore_suspend = 1,
  2674. .ignore_pmdown_time = 1,
  2675. .ops = &msm_aux_pcm_be_ops,
  2676. },
  2677. /* Quaternary AUX PCM Backend DAI Links */
  2678. {
  2679. .name = LPASS_BE_QUAT_AUXPCM_RX,
  2680. .stream_name = "Quat AUX PCM Playback",
  2681. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  2682. .platform_name = "msm-pcm-routing",
  2683. .codec_name = "msm-stub-codec.1",
  2684. .codec_dai_name = "msm-stub-rx",
  2685. .no_pcm = 1,
  2686. .dpcm_playback = 1,
  2687. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  2688. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2689. .ignore_pmdown_time = 1,
  2690. .ignore_suspend = 1,
  2691. .ops = &msm_aux_pcm_be_ops,
  2692. },
  2693. {
  2694. .name = LPASS_BE_QUAT_AUXPCM_TX,
  2695. .stream_name = "Quat AUX PCM Capture",
  2696. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  2697. .platform_name = "msm-pcm-routing",
  2698. .codec_name = "msm-stub-codec.1",
  2699. .codec_dai_name = "msm-stub-tx",
  2700. .no_pcm = 1,
  2701. .dpcm_capture = 1,
  2702. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  2703. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2704. .ignore_suspend = 1,
  2705. .ignore_pmdown_time = 1,
  2706. .ops = &msm_aux_pcm_be_ops,
  2707. },
  2708. /* Quinary AUX PCM Backend DAI Links */
  2709. {
  2710. .name = LPASS_BE_QUIN_AUXPCM_RX,
  2711. .stream_name = "Quin AUX PCM Playback",
  2712. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  2713. .platform_name = "msm-pcm-routing",
  2714. .codec_name = "msm-stub-codec.1",
  2715. .codec_dai_name = "msm-stub-rx",
  2716. .no_pcm = 1,
  2717. .dpcm_playback = 1,
  2718. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  2719. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2720. .ignore_pmdown_time = 1,
  2721. .ignore_suspend = 1,
  2722. .ops = &msm_aux_pcm_be_ops,
  2723. },
  2724. {
  2725. .name = LPASS_BE_QUIN_AUXPCM_TX,
  2726. .stream_name = "Quin AUX PCM Capture",
  2727. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  2728. .platform_name = "msm-pcm-routing",
  2729. .codec_name = "msm-stub-codec.1",
  2730. .codec_dai_name = "msm-stub-tx",
  2731. .no_pcm = 1,
  2732. .dpcm_capture = 1,
  2733. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  2734. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2735. .ignore_suspend = 1,
  2736. .ignore_pmdown_time = 1,
  2737. .ops = &msm_aux_pcm_be_ops,
  2738. },
  2739. };
  2740. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  2741. {
  2742. .name = LPASS_BE_SLIMBUS_7_RX,
  2743. .stream_name = "Slimbus7 Playback",
  2744. .cpu_dai_name = "msm-dai-q6-dev.16398",
  2745. .platform_name = "msm-pcm-routing",
  2746. .codec_name = "btfmslim_slave",
  2747. /* BT codec driver determines capabilities based on
  2748. * dai name, bt codecdai name should always contains
  2749. * supported usecase information
  2750. */
  2751. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  2752. .no_pcm = 1,
  2753. .dpcm_playback = 1,
  2754. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  2755. .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
  2756. .ops = &msm_wcn_ops,
  2757. /* dai link has playback support */
  2758. .ignore_pmdown_time = 1,
  2759. .ignore_suspend = 1,
  2760. },
  2761. {
  2762. .name = LPASS_BE_SLIMBUS_7_TX,
  2763. .stream_name = "Slimbus7 Capture",
  2764. .cpu_dai_name = "msm-dai-q6-dev.16399",
  2765. .platform_name = "msm-pcm-routing",
  2766. .codec_name = "btfmslim_slave",
  2767. .codec_dai_name = "btfm_bt_sco_slim_tx",
  2768. .no_pcm = 1,
  2769. .dpcm_capture = 1,
  2770. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  2771. .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
  2772. .ops = &msm_wcn_ops,
  2773. .ignore_suspend = 1,
  2774. },
  2775. {
  2776. .name = LPASS_BE_SLIMBUS_8_TX,
  2777. .stream_name = "Slimbus8 Capture",
  2778. .cpu_dai_name = "msm-dai-q6-dev.16401",
  2779. .platform_name = "msm-pcm-routing",
  2780. .codec_name = "btfmslim_slave",
  2781. .codec_dai_name = "btfm_fm_slim_tx",
  2782. .no_pcm = 1,
  2783. .dpcm_capture = 1,
  2784. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  2785. .be_hw_params_fixup = msm_btfm_be_hw_params_fixup,
  2786. .init = &msm_wcn_init,
  2787. .ops = &msm_wcn_ops,
  2788. .ignore_suspend = 1,
  2789. },
  2790. };
  2791. static struct snd_soc_dai_link msm_wsa_be_dai_links[] = {
  2792. {
  2793. .name = LPASS_BE_INT4_MI2S_RX,
  2794. .stream_name = "INT4 MI2S Playback",
  2795. .cpu_dai_name = "msm-dai-q6-mi2s.11",
  2796. .platform_name = "msm-pcm-routing",
  2797. .codec_name = "msm_sdw_codec",
  2798. .codec_dai_name = "msm_sdw_i2s_rx1",
  2799. .no_pcm = 1,
  2800. .dpcm_playback = 1,
  2801. .id = MSM_BACKEND_DAI_INT4_MI2S_RX,
  2802. .init = &msm_sdw_audrx_init,
  2803. .be_hw_params_fixup = int_mi2s_be_hw_params_fixup,
  2804. .ops = &msm_sdw_mi2s_be_ops,
  2805. .ignore_suspend = 1,
  2806. },
  2807. };
  2808. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  2809. /* DISP PORT BACK END DAI Link */
  2810. {
  2811. .name = LPASS_BE_DISPLAY_PORT,
  2812. .stream_name = "Display Port Playback",
  2813. .cpu_dai_name = "msm-dai-q6-dp.24608",
  2814. .platform_name = "msm-pcm-routing",
  2815. .codec_name = "msm-ext-disp-audio-codec-rx",
  2816. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  2817. .no_pcm = 1,
  2818. .dpcm_playback = 1,
  2819. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  2820. .be_hw_params_fixup = msm_common_be_hw_params_fixup,
  2821. .ignore_pmdown_time = 1,
  2822. .ignore_suspend = 1,
  2823. },
  2824. };
  2825. static struct snd_soc_dai_link msm_int_dai_links[
  2826. ARRAY_SIZE(msm_int_dai) +
  2827. ARRAY_SIZE(msm_int_wsa_dai) +
  2828. ARRAY_SIZE(msm_int_be_dai) +
  2829. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  2830. ARRAY_SIZE(msm_auxpcm_be_dai_links)+
  2831. ARRAY_SIZE(msm_wcn_be_dai_links) +
  2832. ARRAY_SIZE(msm_wsa_be_dai_links) +
  2833. ARRAY_SIZE(ext_disp_be_dai_link)];
  2834. static struct snd_soc_card sdm660_card = {
  2835. /* snd_soc_card_sdm660 */
  2836. .name = "sdm660-snd-card",
  2837. .dai_link = msm_int_dai,
  2838. .num_links = ARRAY_SIZE(msm_int_dai),
  2839. .late_probe = msm_snd_card_late_probe,
  2840. };
  2841. static void msm_disable_int_mclk0(struct work_struct *work)
  2842. {
  2843. struct msm_asoc_mach_data *pdata = NULL;
  2844. struct delayed_work *dwork;
  2845. int ret = 0;
  2846. dwork = to_delayed_work(work);
  2847. pdata = container_of(dwork, struct msm_asoc_mach_data,
  2848. disable_int_mclk0_work);
  2849. mutex_lock(&pdata->cdc_int_mclk0_mutex);
  2850. pr_debug("%s: mclk_enabled %d mclk_rsc_ref %d\n", __func__,
  2851. atomic_read(&pdata->int_mclk0_enabled),
  2852. atomic_read(&pdata->int_mclk0_rsc_ref));
  2853. if (atomic_read(&pdata->int_mclk0_enabled) == true
  2854. && atomic_read(&pdata->int_mclk0_rsc_ref) == 0) {
  2855. pr_debug("Disable the mclk\n");
  2856. pdata->digital_cdc_core_clk.enable = 0;
  2857. pdata->digital_cdc_core_clk.clk_freq_in_hz =
  2858. DEFAULT_MCLK_RATE;
  2859. ret = afe_set_lpass_clock_v2(
  2860. AFE_PORT_ID_INT0_MI2S_RX,
  2861. &pdata->digital_cdc_core_clk);
  2862. if (ret < 0)
  2863. pr_err("%s failed to disable the CCLK\n", __func__);
  2864. atomic_set(&pdata->int_mclk0_enabled, false);
  2865. }
  2866. mutex_unlock(&pdata->cdc_int_mclk0_mutex);
  2867. }
  2868. static void msm_int_dt_parse_cap_info(struct platform_device *pdev,
  2869. struct msm_asoc_mach_data *pdata)
  2870. {
  2871. const char *ext1_cap = "qcom,msm-micbias1-ext-cap";
  2872. const char *ext2_cap = "qcom,msm-micbias2-ext-cap";
  2873. pdata->micbias1_cap_mode =
  2874. (of_property_read_bool(pdev->dev.of_node, ext1_cap) ?
  2875. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  2876. pdata->micbias2_cap_mode =
  2877. (of_property_read_bool(pdev->dev.of_node, ext2_cap) ?
  2878. MICBIAS_EXT_BYP_CAP : MICBIAS_NO_EXT_BYP_CAP);
  2879. }
  2880. static struct snd_soc_card *msm_int_populate_sndcard_dailinks(
  2881. struct device *dev)
  2882. {
  2883. struct snd_soc_card *card = &sdm660_card;
  2884. struct snd_soc_dai_link *dailink;
  2885. int len1;
  2886. card->name = dev_name(dev);
  2887. len1 = ARRAY_SIZE(msm_int_dai);
  2888. memcpy(msm_int_dai_links, msm_int_dai, sizeof(msm_int_dai));
  2889. dailink = msm_int_dai_links;
  2890. if (!of_property_read_bool(dev->of_node,
  2891. "qcom,wsa-disable")) {
  2892. memcpy(dailink + len1,
  2893. msm_int_wsa_dai,
  2894. sizeof(msm_int_wsa_dai));
  2895. len1 += ARRAY_SIZE(msm_int_wsa_dai);
  2896. }
  2897. memcpy(dailink + len1, msm_int_be_dai, sizeof(msm_int_be_dai));
  2898. len1 += ARRAY_SIZE(msm_int_be_dai);
  2899. if (of_property_read_bool(dev->of_node,
  2900. "qcom,mi2s-audio-intf")) {
  2901. memcpy(dailink + len1,
  2902. msm_mi2s_be_dai_links,
  2903. sizeof(msm_mi2s_be_dai_links));
  2904. len1 += ARRAY_SIZE(msm_mi2s_be_dai_links);
  2905. }
  2906. if (of_property_read_bool(dev->of_node,
  2907. "qcom,auxpcm-audio-intf")) {
  2908. memcpy(dailink + len1,
  2909. msm_auxpcm_be_dai_links,
  2910. sizeof(msm_auxpcm_be_dai_links));
  2911. len1 += ARRAY_SIZE(msm_auxpcm_be_dai_links);
  2912. }
  2913. if (of_property_read_bool(dev->of_node, "qcom,wcn-btfm")) {
  2914. dev_dbg(dev, "%s(): WCN BTFM support present\n",
  2915. __func__);
  2916. memcpy(dailink + len1,
  2917. msm_wcn_be_dai_links,
  2918. sizeof(msm_wcn_be_dai_links));
  2919. len1 += ARRAY_SIZE(msm_wcn_be_dai_links);
  2920. }
  2921. if (!of_property_read_bool(dev->of_node, "qcom,wsa-disable")) {
  2922. memcpy(dailink + len1,
  2923. msm_wsa_be_dai_links,
  2924. sizeof(msm_wsa_be_dai_links));
  2925. len1 += ARRAY_SIZE(msm_wsa_be_dai_links);
  2926. }
  2927. if (of_property_read_bool(dev->of_node, "qcom,ext-disp-audio-rx")) {
  2928. dev_dbg(dev, "%s(): ext disp audio support present\n",
  2929. __func__);
  2930. memcpy(dailink + len1,
  2931. ext_disp_be_dai_link,
  2932. sizeof(ext_disp_be_dai_link));
  2933. len1 += ARRAY_SIZE(ext_disp_be_dai_link);
  2934. }
  2935. card->dai_link = dailink;
  2936. card->num_links = len1;
  2937. return card;
  2938. }
  2939. static int msm_internal_init(struct platform_device *pdev,
  2940. struct msm_asoc_mach_data *pdata,
  2941. struct snd_soc_card *card)
  2942. {
  2943. const char *type = NULL;
  2944. const char *hs_micbias_type = "qcom,msm-hs-micbias-type";
  2945. int ret;
  2946. ret = is_ext_spk_gpio_support(pdev, pdata);
  2947. if (ret < 0)
  2948. dev_dbg(&pdev->dev,
  2949. "%s: doesn't support external speaker pa\n",
  2950. __func__);
  2951. ret = of_property_read_string(pdev->dev.of_node,
  2952. hs_micbias_type, &type);
  2953. if (ret) {
  2954. dev_err(&pdev->dev, "%s: missing %s in dt node\n",
  2955. __func__, hs_micbias_type);
  2956. goto err;
  2957. }
  2958. if (!strcmp(type, "external")) {
  2959. dev_dbg(&pdev->dev, "Headset is using external micbias\n");
  2960. mbhc_cfg_ptr->hs_ext_micbias = true;
  2961. } else {
  2962. dev_dbg(&pdev->dev, "Headset is using internal micbias\n");
  2963. mbhc_cfg_ptr->hs_ext_micbias = false;
  2964. }
  2965. /* initialize the int_mclk0 */
  2966. pdata->digital_cdc_core_clk.clk_set_minor_version =
  2967. AFE_API_VERSION_I2S_CONFIG;
  2968. pdata->digital_cdc_core_clk.clk_id =
  2969. Q6AFE_LPASS_CLK_ID_INT_MCLK_0;
  2970. pdata->digital_cdc_core_clk.clk_freq_in_hz = pdata->mclk_freq;
  2971. pdata->digital_cdc_core_clk.clk_attri =
  2972. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO;
  2973. pdata->digital_cdc_core_clk.clk_root =
  2974. Q6AFE_LPASS_CLK_ROOT_DEFAULT;
  2975. pdata->digital_cdc_core_clk.enable = 1;
  2976. /* Initialize loopback mode to false */
  2977. pdata->lb_mode = false;
  2978. msm_int_dt_parse_cap_info(pdev, pdata);
  2979. card->dev = &pdev->dev;
  2980. platform_set_drvdata(pdev, card);
  2981. snd_soc_card_set_drvdata(card, pdata);
  2982. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  2983. if (ret)
  2984. goto err;
  2985. /* initialize timer */
  2986. INIT_DELAYED_WORK(&pdata->disable_int_mclk0_work,
  2987. msm_disable_int_mclk0);
  2988. mutex_init(&pdata->cdc_int_mclk0_mutex);
  2989. atomic_set(&pdata->int_mclk0_rsc_ref, 0);
  2990. atomic_set(&pdata->int_mclk0_enabled, false);
  2991. dev_info(&pdev->dev, "%s: default codec configured\n", __func__);
  2992. return 0;
  2993. err:
  2994. return ret;
  2995. }
  2996. /**
  2997. * msm_int_cdc_init - internal codec machine specific init.
  2998. *
  2999. * @pdev: platform device handle
  3000. * @pdata: private data of machine driver
  3001. * @card: sound card pointer reference
  3002. * @mbhc_cfg: MBHC config reference
  3003. *
  3004. * Returns 0.
  3005. */
  3006. int msm_int_cdc_init(struct platform_device *pdev,
  3007. struct msm_asoc_mach_data *pdata,
  3008. struct snd_soc_card **card,
  3009. struct wcd_mbhc_config *mbhc_cfg)
  3010. {
  3011. mbhc_cfg_ptr = mbhc_cfg;
  3012. *card = msm_int_populate_sndcard_dailinks(&pdev->dev);
  3013. msm_internal_init(pdev, pdata, *card);
  3014. return 0;
  3015. }
  3016. EXPORT_SYMBOL(msm_int_cdc_init);