dp_tx.c 184 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "htt.h"
  20. #include "dp_htt.h"
  21. #include "hal_hw_headers.h"
  22. #include "dp_tx.h"
  23. #include "dp_tx_desc.h"
  24. #include "dp_peer.h"
  25. #include "dp_types.h"
  26. #include "hal_tx.h"
  27. #include "qdf_mem.h"
  28. #include "qdf_nbuf.h"
  29. #include "qdf_net_types.h"
  30. #include "qdf_module.h"
  31. #include <wlan_cfg.h>
  32. #include "dp_ipa.h"
  33. #if defined(MESH_MODE_SUPPORT) || defined(FEATURE_PERPKT_INFO)
  34. #include "if_meta_hdr.h"
  35. #endif
  36. #include "enet.h"
  37. #include "dp_internal.h"
  38. #ifdef ATH_SUPPORT_IQUE
  39. #include "dp_txrx_me.h"
  40. #endif
  41. #include "dp_hist.h"
  42. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  43. #include <wlan_dp_swlm.h>
  44. #endif
  45. #ifdef WIFI_MONITOR_SUPPORT
  46. #include <dp_mon.h>
  47. #endif
  48. #ifdef FEATURE_WDS
  49. #include "dp_txrx_wds.h"
  50. #endif
  51. #include "cdp_txrx_cmn_reg.h"
  52. #ifdef CONFIG_SAWF
  53. #include <dp_sawf.h>
  54. #endif
  55. /* Flag to skip CCE classify when mesh or tid override enabled */
  56. #define DP_TX_SKIP_CCE_CLASSIFY \
  57. (DP_TXRX_HLOS_TID_OVERRIDE_ENABLED | DP_TX_MESH_ENABLED)
  58. /* TODO Add support in TSO */
  59. #define DP_DESC_NUM_FRAG(x) 0
  60. /* disable TQM_BYPASS */
  61. #define TQM_BYPASS_WAR 0
  62. #define DP_RETRY_COUNT 7
  63. #ifdef WLAN_PEER_JITTER
  64. #define DP_AVG_JITTER_WEIGHT_DENOM 4
  65. #define DP_AVG_DELAY_WEIGHT_DENOM 3
  66. #endif
  67. #ifdef QCA_DP_TX_FW_METADATA_V2
  68. #define DP_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)\
  69. HTT_TX_TCL_METADATA_V2_PDEV_ID_SET(_var, _val)
  70. #define DP_TX_TCL_METADATA_VALID_HTT_SET(_var, _val) \
  71. HTT_TX_TCL_METADATA_V2_VALID_HTT_SET(_var, _val)
  72. #define DP_TX_TCL_METADATA_TYPE_SET(_var, _val) \
  73. HTT_TX_TCL_METADATA_TYPE_V2_SET(_var, _val)
  74. #define DP_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val) \
  75. HTT_TX_TCL_METADATA_V2_HOST_INSPECTED_SET(_var, _val)
  76. #define DP_TX_TCL_METADATA_PEER_ID_SET(_var, _val) \
  77. HTT_TX_TCL_METADATA_V2_PEER_ID_SET(_var, _val)
  78. #define DP_TX_TCL_METADATA_VDEV_ID_SET(_var, _val) \
  79. HTT_TX_TCL_METADATA_V2_VDEV_ID_SET(_var, _val)
  80. #define DP_TCL_METADATA_TYPE_PEER_BASED \
  81. HTT_TCL_METADATA_V2_TYPE_PEER_BASED
  82. #define DP_TCL_METADATA_TYPE_VDEV_BASED \
  83. HTT_TCL_METADATA_V2_TYPE_VDEV_BASED
  84. #else
  85. #define DP_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)\
  86. HTT_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)
  87. #define DP_TX_TCL_METADATA_VALID_HTT_SET(_var, _val) \
  88. HTT_TX_TCL_METADATA_VALID_HTT_SET(_var, _val)
  89. #define DP_TX_TCL_METADATA_TYPE_SET(_var, _val) \
  90. HTT_TX_TCL_METADATA_TYPE_SET(_var, _val)
  91. #define DP_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val) \
  92. HTT_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val)
  93. #define DP_TX_TCL_METADATA_PEER_ID_SET(_var, _val) \
  94. HTT_TX_TCL_METADATA_PEER_ID_SET(_var, _val)
  95. #define DP_TX_TCL_METADATA_VDEV_ID_SET(_var, _val) \
  96. HTT_TX_TCL_METADATA_VDEV_ID_SET(_var, _val)
  97. #define DP_TCL_METADATA_TYPE_PEER_BASED \
  98. HTT_TCL_METADATA_TYPE_PEER_BASED
  99. #define DP_TCL_METADATA_TYPE_VDEV_BASED \
  100. HTT_TCL_METADATA_TYPE_VDEV_BASED
  101. #endif
  102. #define DP_GET_HW_LINK_ID_FRM_PPDU_ID(PPDU_ID, LINK_ID_OFFSET, LINK_ID_BITS) \
  103. (((PPDU_ID) >> (LINK_ID_OFFSET)) & ((1 << (LINK_ID_BITS)) - 1))
  104. /*mapping between hal encrypt type and cdp_sec_type*/
  105. uint8_t sec_type_map[MAX_CDP_SEC_TYPE] = {HAL_TX_ENCRYPT_TYPE_NO_CIPHER,
  106. HAL_TX_ENCRYPT_TYPE_WEP_128,
  107. HAL_TX_ENCRYPT_TYPE_WEP_104,
  108. HAL_TX_ENCRYPT_TYPE_WEP_40,
  109. HAL_TX_ENCRYPT_TYPE_TKIP_WITH_MIC,
  110. HAL_TX_ENCRYPT_TYPE_TKIP_NO_MIC,
  111. HAL_TX_ENCRYPT_TYPE_AES_CCMP_128,
  112. HAL_TX_ENCRYPT_TYPE_WAPI,
  113. HAL_TX_ENCRYPT_TYPE_AES_CCMP_256,
  114. HAL_TX_ENCRYPT_TYPE_AES_GCMP_128,
  115. HAL_TX_ENCRYPT_TYPE_AES_GCMP_256,
  116. HAL_TX_ENCRYPT_TYPE_WAPI_GCM_SM4};
  117. qdf_export_symbol(sec_type_map);
  118. #ifdef WLAN_FEATURE_DP_TX_DESC_HISTORY
  119. static inline enum dp_tx_event_type dp_tx_get_event_type(uint32_t flags)
  120. {
  121. enum dp_tx_event_type type;
  122. if (flags & DP_TX_DESC_FLAG_FLUSH)
  123. type = DP_TX_DESC_FLUSH;
  124. else if (flags & DP_TX_DESC_FLAG_TX_COMP_ERR)
  125. type = DP_TX_COMP_UNMAP_ERR;
  126. else if (flags & DP_TX_DESC_FLAG_COMPLETED_TX)
  127. type = DP_TX_COMP_UNMAP;
  128. else
  129. type = DP_TX_DESC_UNMAP;
  130. return type;
  131. }
  132. static inline void
  133. dp_tx_desc_history_add(struct dp_soc *soc, dma_addr_t paddr,
  134. qdf_nbuf_t skb, uint32_t sw_cookie,
  135. enum dp_tx_event_type type)
  136. {
  137. struct dp_tx_tcl_history *tx_tcl_history = &soc->tx_tcl_history;
  138. struct dp_tx_comp_history *tx_comp_history = &soc->tx_comp_history;
  139. struct dp_tx_desc_event *entry;
  140. uint32_t idx;
  141. uint16_t slot;
  142. switch (type) {
  143. case DP_TX_COMP_UNMAP:
  144. case DP_TX_COMP_UNMAP_ERR:
  145. case DP_TX_COMP_MSDU_EXT:
  146. if (qdf_unlikely(!tx_comp_history->allocated))
  147. return;
  148. dp_get_frag_hist_next_atomic_idx(&tx_comp_history->index, &idx,
  149. &slot,
  150. DP_TX_COMP_HIST_SLOT_SHIFT,
  151. DP_TX_COMP_HIST_PER_SLOT_MAX,
  152. DP_TX_COMP_HISTORY_SIZE);
  153. entry = &tx_comp_history->entry[slot][idx];
  154. break;
  155. case DP_TX_DESC_MAP:
  156. case DP_TX_DESC_UNMAP:
  157. case DP_TX_DESC_COOKIE:
  158. case DP_TX_DESC_FLUSH:
  159. if (qdf_unlikely(!tx_tcl_history->allocated))
  160. return;
  161. dp_get_frag_hist_next_atomic_idx(&tx_tcl_history->index, &idx,
  162. &slot,
  163. DP_TX_TCL_HIST_SLOT_SHIFT,
  164. DP_TX_TCL_HIST_PER_SLOT_MAX,
  165. DP_TX_TCL_HISTORY_SIZE);
  166. entry = &tx_tcl_history->entry[slot][idx];
  167. break;
  168. default:
  169. dp_info_rl("Invalid dp_tx_event_type: %d", type);
  170. return;
  171. }
  172. entry->skb = skb;
  173. entry->paddr = paddr;
  174. entry->sw_cookie = sw_cookie;
  175. entry->type = type;
  176. entry->ts = qdf_get_log_timestamp();
  177. }
  178. static inline void
  179. dp_tx_tso_seg_history_add(struct dp_soc *soc,
  180. struct qdf_tso_seg_elem_t *tso_seg,
  181. qdf_nbuf_t skb, uint32_t sw_cookie,
  182. enum dp_tx_event_type type)
  183. {
  184. int i;
  185. for (i = 1; i < tso_seg->seg.num_frags; i++) {
  186. dp_tx_desc_history_add(soc, tso_seg->seg.tso_frags[i].paddr,
  187. skb, sw_cookie, type);
  188. }
  189. if (!tso_seg->next)
  190. dp_tx_desc_history_add(soc, tso_seg->seg.tso_frags[0].paddr,
  191. skb, 0xFFFFFFFF, type);
  192. }
  193. static inline void
  194. dp_tx_tso_history_add(struct dp_soc *soc, struct qdf_tso_info_t tso_info,
  195. qdf_nbuf_t skb, uint32_t sw_cookie,
  196. enum dp_tx_event_type type)
  197. {
  198. struct qdf_tso_seg_elem_t *curr_seg = tso_info.tso_seg_list;
  199. uint32_t num_segs = tso_info.num_segs;
  200. while (num_segs) {
  201. dp_tx_tso_seg_history_add(soc, curr_seg, skb, sw_cookie, type);
  202. curr_seg = curr_seg->next;
  203. num_segs--;
  204. }
  205. }
  206. #else
  207. static inline enum dp_tx_event_type dp_tx_get_event_type(uint32_t flags)
  208. {
  209. return DP_TX_DESC_INVAL_EVT;
  210. }
  211. static inline void
  212. dp_tx_desc_history_add(struct dp_soc *soc, dma_addr_t paddr,
  213. qdf_nbuf_t skb, uint32_t sw_cookie,
  214. enum dp_tx_event_type type)
  215. {
  216. }
  217. static inline void
  218. dp_tx_tso_seg_history_add(struct dp_soc *soc,
  219. struct qdf_tso_seg_elem_t *tso_seg,
  220. qdf_nbuf_t skb, uint32_t sw_cookie,
  221. enum dp_tx_event_type type)
  222. {
  223. }
  224. static inline void
  225. dp_tx_tso_history_add(struct dp_soc *soc, struct qdf_tso_info_t tso_info,
  226. qdf_nbuf_t skb, uint32_t sw_cookie,
  227. enum dp_tx_event_type type)
  228. {
  229. }
  230. #endif /* WLAN_FEATURE_DP_TX_DESC_HISTORY */
  231. /**
  232. * dp_is_tput_high() - Check if throughput is high
  233. *
  234. * @soc: core txrx main context
  235. *
  236. * The current function is based of the RTPM tput policy variable where RTPM is
  237. * avoided based on throughput.
  238. */
  239. static inline int dp_is_tput_high(struct dp_soc *soc)
  240. {
  241. return dp_get_rtpm_tput_policy_requirement(soc);
  242. }
  243. #if defined(FEATURE_TSO)
  244. /**
  245. * dp_tx_tso_unmap_segment() - Unmap TSO segment
  246. *
  247. * @soc: core txrx main context
  248. * @seg_desc: tso segment descriptor
  249. * @num_seg_desc: tso number segment descriptor
  250. */
  251. static void dp_tx_tso_unmap_segment(
  252. struct dp_soc *soc,
  253. struct qdf_tso_seg_elem_t *seg_desc,
  254. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  255. {
  256. TSO_DEBUG("%s: Unmap the tso segment", __func__);
  257. if (qdf_unlikely(!seg_desc)) {
  258. DP_TRACE(ERROR, "%s %d TSO desc is NULL!",
  259. __func__, __LINE__);
  260. qdf_assert(0);
  261. } else if (qdf_unlikely(!num_seg_desc)) {
  262. DP_TRACE(ERROR, "%s %d TSO num desc is NULL!",
  263. __func__, __LINE__);
  264. qdf_assert(0);
  265. } else {
  266. bool is_last_seg;
  267. /* no tso segment left to do dma unmap */
  268. if (num_seg_desc->num_seg.tso_cmn_num_seg < 1)
  269. return;
  270. is_last_seg = (num_seg_desc->num_seg.tso_cmn_num_seg == 1) ?
  271. true : false;
  272. qdf_nbuf_unmap_tso_segment(soc->osdev,
  273. seg_desc, is_last_seg);
  274. num_seg_desc->num_seg.tso_cmn_num_seg--;
  275. }
  276. }
  277. /**
  278. * dp_tx_tso_desc_release() - Release the tso segment and tso_cmn_num_seg
  279. * back to the freelist
  280. *
  281. * @soc: soc device handle
  282. * @tx_desc: Tx software descriptor
  283. */
  284. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  285. struct dp_tx_desc_s *tx_desc)
  286. {
  287. TSO_DEBUG("%s: Free the tso descriptor", __func__);
  288. if (qdf_unlikely(!tx_desc->msdu_ext_desc->tso_desc)) {
  289. dp_tx_err("SO desc is NULL!");
  290. qdf_assert(0);
  291. } else if (qdf_unlikely(!tx_desc->msdu_ext_desc->tso_num_desc)) {
  292. dp_tx_err("TSO num desc is NULL!");
  293. qdf_assert(0);
  294. } else {
  295. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  296. (struct qdf_tso_num_seg_elem_t *)tx_desc->
  297. msdu_ext_desc->tso_num_desc;
  298. /* Add the tso num segment into the free list */
  299. if (tso_num_desc->num_seg.tso_cmn_num_seg == 0) {
  300. dp_tso_num_seg_free(soc, tx_desc->pool_id,
  301. tx_desc->msdu_ext_desc->
  302. tso_num_desc);
  303. tx_desc->msdu_ext_desc->tso_num_desc = NULL;
  304. DP_STATS_INC(tx_desc->pdev, tso_stats.tso_comp, 1);
  305. }
  306. /* Add the tso segment into the free list*/
  307. dp_tx_tso_desc_free(soc,
  308. tx_desc->pool_id, tx_desc->msdu_ext_desc->
  309. tso_desc);
  310. tx_desc->msdu_ext_desc->tso_desc = NULL;
  311. }
  312. }
  313. #else
  314. static void dp_tx_tso_unmap_segment(
  315. struct dp_soc *soc,
  316. struct qdf_tso_seg_elem_t *seg_desc,
  317. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  318. {
  319. }
  320. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  321. struct dp_tx_desc_s *tx_desc)
  322. {
  323. }
  324. #endif
  325. #ifdef WLAN_SUPPORT_PPEDS
  326. static inline int
  327. dp_tx_release_ds_tx_desc(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  328. uint8_t desc_pool_id)
  329. {
  330. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  331. __dp_tx_outstanding_dec(soc);
  332. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  333. return 1;
  334. }
  335. return 0;
  336. }
  337. #else
  338. static inline int
  339. dp_tx_release_ds_tx_desc(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  340. uint8_t desc_pool_id)
  341. {
  342. return 0;
  343. }
  344. #endif
  345. void
  346. dp_tx_desc_release(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  347. uint8_t desc_pool_id)
  348. {
  349. struct dp_pdev *pdev = tx_desc->pdev;
  350. uint8_t comp_status = 0;
  351. if (dp_tx_release_ds_tx_desc(soc, tx_desc, desc_pool_id))
  352. return;
  353. qdf_assert(pdev);
  354. soc = pdev->soc;
  355. dp_tx_outstanding_dec(pdev);
  356. if (tx_desc->msdu_ext_desc) {
  357. if (tx_desc->frm_type == dp_tx_frm_tso)
  358. dp_tx_tso_desc_release(soc, tx_desc);
  359. if (tx_desc->flags & DP_TX_DESC_FLAG_ME)
  360. dp_tx_me_free_buf(tx_desc->pdev,
  361. tx_desc->msdu_ext_desc->me_buffer);
  362. dp_tx_ext_desc_free(soc, tx_desc->msdu_ext_desc, desc_pool_id);
  363. tx_desc->msdu_ext_desc = NULL;
  364. }
  365. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  366. qdf_atomic_dec(&soc->num_tx_exception);
  367. if (HAL_TX_COMP_RELEASE_SOURCE_TQM ==
  368. tx_desc->buffer_src)
  369. comp_status = hal_tx_comp_get_release_reason(&tx_desc->comp,
  370. soc->hal_soc);
  371. else
  372. comp_status = HAL_TX_COMP_RELEASE_REASON_FW;
  373. dp_tx_debug("Tx Completion Release desc %d status %d outstanding %d",
  374. tx_desc->id, comp_status,
  375. qdf_atomic_read(&pdev->num_tx_outstanding));
  376. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  377. return;
  378. }
  379. /**
  380. * dp_tx_prepare_htt_metadata() - Prepare HTT metadata for special frames
  381. * @vdev: DP vdev Handle
  382. * @nbuf: skb
  383. * @msdu_info: msdu_info required to create HTT metadata
  384. *
  385. * Prepares and fills HTT metadata in the frame pre-header for special frames
  386. * that should be transmitted using varying transmit parameters.
  387. * There are 2 VDEV modes that currently needs this special metadata -
  388. * 1) Mesh Mode
  389. * 2) DSRC Mode
  390. *
  391. * Return: HTT metadata size
  392. *
  393. */
  394. static uint8_t dp_tx_prepare_htt_metadata(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  395. struct dp_tx_msdu_info_s *msdu_info)
  396. {
  397. uint32_t *meta_data = msdu_info->meta_data;
  398. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  399. (struct htt_tx_msdu_desc_ext2_t *) meta_data;
  400. uint8_t htt_desc_size;
  401. /* Size rounded of multiple of 8 bytes */
  402. uint8_t htt_desc_size_aligned;
  403. uint8_t *hdr = NULL;
  404. /*
  405. * Metadata - HTT MSDU Extension header
  406. */
  407. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  408. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  409. if (vdev->mesh_vdev || msdu_info->is_tx_sniffer ||
  410. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_GET(msdu_info->
  411. meta_data[0]) ||
  412. msdu_info->exception_fw) {
  413. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) <
  414. htt_desc_size_aligned)) {
  415. nbuf = qdf_nbuf_realloc_headroom(nbuf,
  416. htt_desc_size_aligned);
  417. if (!nbuf) {
  418. /*
  419. * qdf_nbuf_realloc_headroom won't do skb_clone
  420. * as skb_realloc_headroom does. so, no free is
  421. * needed here.
  422. */
  423. DP_STATS_INC(vdev,
  424. tx_i.dropped.headroom_insufficient,
  425. 1);
  426. qdf_print(" %s[%d] skb_realloc_headroom failed",
  427. __func__, __LINE__);
  428. return 0;
  429. }
  430. }
  431. /* Fill and add HTT metaheader */
  432. hdr = qdf_nbuf_push_head(nbuf, htt_desc_size_aligned);
  433. if (!hdr) {
  434. dp_tx_err("Error in filling HTT metadata");
  435. return 0;
  436. }
  437. qdf_mem_copy(hdr, desc_ext, htt_desc_size);
  438. } else if (vdev->opmode == wlan_op_mode_ocb) {
  439. /* Todo - Add support for DSRC */
  440. }
  441. return htt_desc_size_aligned;
  442. }
  443. /**
  444. * dp_tx_prepare_tso_ext_desc() - Prepare MSDU extension descriptor for TSO
  445. * @tso_seg: TSO segment to process
  446. * @ext_desc: Pointer to MSDU extension descriptor
  447. *
  448. * Return: void
  449. */
  450. #if defined(FEATURE_TSO)
  451. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  452. void *ext_desc)
  453. {
  454. uint8_t num_frag;
  455. uint32_t tso_flags;
  456. /*
  457. * Set tso_en, tcp_flags(NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN),
  458. * tcp_flag_mask
  459. *
  460. * Checksum enable flags are set in TCL descriptor and not in Extension
  461. * Descriptor (H/W ignores checksum_en flags in MSDU ext descriptor)
  462. */
  463. tso_flags = *(uint32_t *) &tso_seg->tso_flags;
  464. hal_tx_ext_desc_set_tso_flags(ext_desc, tso_flags);
  465. hal_tx_ext_desc_set_msdu_length(ext_desc, tso_seg->tso_flags.l2_len,
  466. tso_seg->tso_flags.ip_len);
  467. hal_tx_ext_desc_set_tcp_seq(ext_desc, tso_seg->tso_flags.tcp_seq_num);
  468. hal_tx_ext_desc_set_ip_id(ext_desc, tso_seg->tso_flags.ip_id);
  469. for (num_frag = 0; num_frag < tso_seg->num_frags; num_frag++) {
  470. uint32_t lo = 0;
  471. uint32_t hi = 0;
  472. qdf_assert_always((tso_seg->tso_frags[num_frag].paddr) &&
  473. (tso_seg->tso_frags[num_frag].length));
  474. qdf_dmaaddr_to_32s(
  475. tso_seg->tso_frags[num_frag].paddr, &lo, &hi);
  476. hal_tx_ext_desc_set_buffer(ext_desc, num_frag, lo, hi,
  477. tso_seg->tso_frags[num_frag].length);
  478. }
  479. return;
  480. }
  481. #else
  482. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  483. void *ext_desc)
  484. {
  485. return;
  486. }
  487. #endif
  488. #if defined(FEATURE_TSO)
  489. /**
  490. * dp_tx_free_tso_seg_list() - Loop through the tso segments
  491. * allocated and free them
  492. * @soc: soc handle
  493. * @free_seg: list of tso segments
  494. * @msdu_info: msdu descriptor
  495. *
  496. * Return: void
  497. */
  498. static void dp_tx_free_tso_seg_list(
  499. struct dp_soc *soc,
  500. struct qdf_tso_seg_elem_t *free_seg,
  501. struct dp_tx_msdu_info_s *msdu_info)
  502. {
  503. struct qdf_tso_seg_elem_t *next_seg;
  504. while (free_seg) {
  505. next_seg = free_seg->next;
  506. dp_tx_tso_desc_free(soc,
  507. msdu_info->tx_queue.desc_pool_id,
  508. free_seg);
  509. free_seg = next_seg;
  510. }
  511. }
  512. /**
  513. * dp_tx_free_tso_num_seg_list() - Loop through the tso num segments
  514. * allocated and free them
  515. * @soc: soc handle
  516. * @free_num_seg: list of tso number segments
  517. * @msdu_info: msdu descriptor
  518. *
  519. * Return: void
  520. */
  521. static void dp_tx_free_tso_num_seg_list(
  522. struct dp_soc *soc,
  523. struct qdf_tso_num_seg_elem_t *free_num_seg,
  524. struct dp_tx_msdu_info_s *msdu_info)
  525. {
  526. struct qdf_tso_num_seg_elem_t *next_num_seg;
  527. while (free_num_seg) {
  528. next_num_seg = free_num_seg->next;
  529. dp_tso_num_seg_free(soc,
  530. msdu_info->tx_queue.desc_pool_id,
  531. free_num_seg);
  532. free_num_seg = next_num_seg;
  533. }
  534. }
  535. /**
  536. * dp_tx_unmap_tso_seg_list() - Loop through the tso segments
  537. * do dma unmap for each segment
  538. * @soc: soc handle
  539. * @free_seg: list of tso segments
  540. * @num_seg_desc: tso number segment descriptor
  541. *
  542. * Return: void
  543. */
  544. static void dp_tx_unmap_tso_seg_list(
  545. struct dp_soc *soc,
  546. struct qdf_tso_seg_elem_t *free_seg,
  547. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  548. {
  549. struct qdf_tso_seg_elem_t *next_seg;
  550. if (qdf_unlikely(!num_seg_desc)) {
  551. DP_TRACE(ERROR, "TSO number seg desc is NULL!");
  552. return;
  553. }
  554. while (free_seg) {
  555. next_seg = free_seg->next;
  556. dp_tx_tso_unmap_segment(soc, free_seg, num_seg_desc);
  557. free_seg = next_seg;
  558. }
  559. }
  560. #ifdef FEATURE_TSO_STATS
  561. /**
  562. * dp_tso_get_stats_idx() - Retrieve the tso packet id
  563. * @pdev: pdev handle
  564. *
  565. * Return: id
  566. */
  567. static uint32_t dp_tso_get_stats_idx(struct dp_pdev *pdev)
  568. {
  569. uint32_t stats_idx;
  570. stats_idx = (((uint32_t)qdf_atomic_inc_return(&pdev->tso_idx))
  571. % CDP_MAX_TSO_PACKETS);
  572. return stats_idx;
  573. }
  574. #else
  575. static int dp_tso_get_stats_idx(struct dp_pdev *pdev)
  576. {
  577. return 0;
  578. }
  579. #endif /* FEATURE_TSO_STATS */
  580. /**
  581. * dp_tx_free_remaining_tso_desc() - do dma unmap for tso segments if any,
  582. * free the tso segments descriptor and
  583. * tso num segments descriptor
  584. * @soc: soc handle
  585. * @msdu_info: msdu descriptor
  586. * @tso_seg_unmap: flag to show if dma unmap is necessary
  587. *
  588. * Return: void
  589. */
  590. static void dp_tx_free_remaining_tso_desc(struct dp_soc *soc,
  591. struct dp_tx_msdu_info_s *msdu_info,
  592. bool tso_seg_unmap)
  593. {
  594. struct qdf_tso_info_t *tso_info = &msdu_info->u.tso_info;
  595. struct qdf_tso_seg_elem_t *free_seg = tso_info->tso_seg_list;
  596. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  597. tso_info->tso_num_seg_list;
  598. /* do dma unmap for each segment */
  599. if (tso_seg_unmap)
  600. dp_tx_unmap_tso_seg_list(soc, free_seg, tso_num_desc);
  601. /* free all tso number segment descriptor though looks only have 1 */
  602. dp_tx_free_tso_num_seg_list(soc, tso_num_desc, msdu_info);
  603. /* free all tso segment descriptor */
  604. dp_tx_free_tso_seg_list(soc, free_seg, msdu_info);
  605. }
  606. /**
  607. * dp_tx_prepare_tso() - Given a jumbo msdu, prepare the TSO info
  608. * @vdev: virtual device handle
  609. * @msdu: network buffer
  610. * @msdu_info: meta data associated with the msdu
  611. *
  612. * Return: QDF_STATUS_SUCCESS success
  613. */
  614. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  615. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  616. {
  617. struct qdf_tso_seg_elem_t *tso_seg;
  618. int num_seg = qdf_nbuf_get_tso_num_seg(msdu);
  619. struct dp_soc *soc = vdev->pdev->soc;
  620. struct dp_pdev *pdev = vdev->pdev;
  621. struct qdf_tso_info_t *tso_info;
  622. struct qdf_tso_num_seg_elem_t *tso_num_seg;
  623. tso_info = &msdu_info->u.tso_info;
  624. tso_info->curr_seg = NULL;
  625. tso_info->tso_seg_list = NULL;
  626. tso_info->num_segs = num_seg;
  627. msdu_info->frm_type = dp_tx_frm_tso;
  628. tso_info->tso_num_seg_list = NULL;
  629. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  630. while (num_seg) {
  631. tso_seg = dp_tx_tso_desc_alloc(
  632. soc, msdu_info->tx_queue.desc_pool_id);
  633. if (tso_seg) {
  634. tso_seg->next = tso_info->tso_seg_list;
  635. tso_info->tso_seg_list = tso_seg;
  636. num_seg--;
  637. } else {
  638. dp_err_rl("Failed to alloc tso seg desc");
  639. DP_STATS_INC_PKT(vdev->pdev,
  640. tso_stats.tso_no_mem_dropped, 1,
  641. qdf_nbuf_len(msdu));
  642. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  643. return QDF_STATUS_E_NOMEM;
  644. }
  645. }
  646. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  647. tso_num_seg = dp_tso_num_seg_alloc(soc,
  648. msdu_info->tx_queue.desc_pool_id);
  649. if (tso_num_seg) {
  650. tso_num_seg->next = tso_info->tso_num_seg_list;
  651. tso_info->tso_num_seg_list = tso_num_seg;
  652. } else {
  653. DP_TRACE(ERROR, "%s: Failed to alloc - Number of segs desc",
  654. __func__);
  655. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  656. return QDF_STATUS_E_NOMEM;
  657. }
  658. msdu_info->num_seg =
  659. qdf_nbuf_get_tso_info(soc->osdev, msdu, tso_info);
  660. TSO_DEBUG(" %s: msdu_info->num_seg: %d", __func__,
  661. msdu_info->num_seg);
  662. if (!(msdu_info->num_seg)) {
  663. /*
  664. * Free allocated TSO seg desc and number seg desc,
  665. * do unmap for segments if dma map has done.
  666. */
  667. DP_TRACE(ERROR, "%s: Failed to get tso info", __func__);
  668. dp_tx_free_remaining_tso_desc(soc, msdu_info, true);
  669. return QDF_STATUS_E_INVAL;
  670. }
  671. dp_tx_tso_history_add(soc, msdu_info->u.tso_info,
  672. msdu, 0, DP_TX_DESC_MAP);
  673. tso_info->curr_seg = tso_info->tso_seg_list;
  674. tso_info->msdu_stats_idx = dp_tso_get_stats_idx(pdev);
  675. dp_tso_packet_update(pdev, tso_info->msdu_stats_idx,
  676. msdu, msdu_info->num_seg);
  677. dp_tso_segment_stats_update(pdev, tso_info->tso_seg_list,
  678. tso_info->msdu_stats_idx);
  679. dp_stats_tso_segment_histogram_update(pdev, msdu_info->num_seg);
  680. return QDF_STATUS_SUCCESS;
  681. }
  682. #else
  683. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  684. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  685. {
  686. return QDF_STATUS_E_NOMEM;
  687. }
  688. #endif
  689. QDF_COMPILE_TIME_ASSERT(dp_tx_htt_metadata_len_check,
  690. (DP_TX_MSDU_INFO_META_DATA_DWORDS * 4 >=
  691. sizeof(struct htt_tx_msdu_desc_ext2_t)));
  692. /**
  693. * dp_tx_prepare_ext_desc() - Allocate and prepare MSDU extension descriptor
  694. * @vdev: DP Vdev handle
  695. * @msdu_info: MSDU info to be setup in MSDU extension descriptor
  696. * @desc_pool_id: Descriptor Pool ID
  697. *
  698. * Return:
  699. */
  700. static
  701. struct dp_tx_ext_desc_elem_s *dp_tx_prepare_ext_desc(struct dp_vdev *vdev,
  702. struct dp_tx_msdu_info_s *msdu_info, uint8_t desc_pool_id)
  703. {
  704. uint8_t i;
  705. uint8_t cached_ext_desc[HAL_TX_EXT_DESC_WITH_META_DATA];
  706. struct dp_tx_seg_info_s *seg_info;
  707. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  708. struct dp_soc *soc = vdev->pdev->soc;
  709. /* Allocate an extension descriptor */
  710. msdu_ext_desc = dp_tx_ext_desc_alloc(soc, desc_pool_id);
  711. qdf_mem_zero(&cached_ext_desc[0], HAL_TX_EXT_DESC_WITH_META_DATA);
  712. if (!msdu_ext_desc) {
  713. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  714. return NULL;
  715. }
  716. if (msdu_info->exception_fw &&
  717. qdf_unlikely(vdev->mesh_vdev)) {
  718. qdf_mem_copy(&cached_ext_desc[HAL_TX_EXTENSION_DESC_LEN_BYTES],
  719. &msdu_info->meta_data[0],
  720. sizeof(struct htt_tx_msdu_desc_ext2_t));
  721. qdf_atomic_inc(&soc->num_tx_exception);
  722. msdu_ext_desc->flags |= DP_TX_EXT_DESC_FLAG_METADATA_VALID;
  723. }
  724. switch (msdu_info->frm_type) {
  725. case dp_tx_frm_sg:
  726. case dp_tx_frm_me:
  727. case dp_tx_frm_raw:
  728. seg_info = msdu_info->u.sg_info.curr_seg;
  729. /* Update the buffer pointers in MSDU Extension Descriptor */
  730. for (i = 0; i < seg_info->frag_cnt; i++) {
  731. hal_tx_ext_desc_set_buffer(&cached_ext_desc[0], i,
  732. seg_info->frags[i].paddr_lo,
  733. seg_info->frags[i].paddr_hi,
  734. seg_info->frags[i].len);
  735. }
  736. break;
  737. case dp_tx_frm_tso:
  738. dp_tx_prepare_tso_ext_desc(&msdu_info->u.tso_info.curr_seg->seg,
  739. &cached_ext_desc[0]);
  740. break;
  741. default:
  742. break;
  743. }
  744. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  745. cached_ext_desc, HAL_TX_EXT_DESC_WITH_META_DATA);
  746. hal_tx_ext_desc_sync(&cached_ext_desc[0],
  747. msdu_ext_desc->vaddr);
  748. return msdu_ext_desc;
  749. }
  750. /**
  751. * dp_tx_trace_pkt() - Trace TX packet at DP layer
  752. * @soc: datapath SOC
  753. * @skb: skb to be traced
  754. * @msdu_id: msdu_id of the packet
  755. * @vdev_id: vdev_id of the packet
  756. * @op_mode: Vdev Operation mode
  757. *
  758. * Return: None
  759. */
  760. #ifdef DP_DISABLE_TX_PKT_TRACE
  761. static void dp_tx_trace_pkt(struct dp_soc *soc,
  762. qdf_nbuf_t skb, uint16_t msdu_id,
  763. uint8_t vdev_id, enum QDF_OPMODE op_mode)
  764. {
  765. }
  766. #else
  767. static void dp_tx_trace_pkt(struct dp_soc *soc,
  768. qdf_nbuf_t skb, uint16_t msdu_id,
  769. uint8_t vdev_id, enum QDF_OPMODE op_mode)
  770. {
  771. if (dp_is_tput_high(soc))
  772. return;
  773. QDF_NBUF_CB_TX_PACKET_TRACK(skb) = QDF_NBUF_TX_PKT_DATA_TRACK;
  774. QDF_NBUF_CB_TX_DP_TRACE(skb) = 1;
  775. DPTRACE(qdf_dp_trace_ptr(skb,
  776. QDF_DP_TRACE_LI_DP_TX_PACKET_PTR_RECORD,
  777. QDF_TRACE_DEFAULT_PDEV_ID,
  778. qdf_nbuf_data_addr(skb),
  779. sizeof(qdf_nbuf_data(skb)),
  780. msdu_id, vdev_id, 0,
  781. op_mode));
  782. qdf_dp_trace_log_pkt(vdev_id, skb, QDF_TX, QDF_TRACE_DEFAULT_PDEV_ID,
  783. op_mode);
  784. DPTRACE(qdf_dp_trace_data_pkt(skb, QDF_TRACE_DEFAULT_PDEV_ID,
  785. QDF_DP_TRACE_LI_DP_TX_PACKET_RECORD,
  786. msdu_id, QDF_TX));
  787. }
  788. #endif
  789. #ifdef WLAN_DP_FEATURE_MARK_ICMP_REQ_TO_FW
  790. /**
  791. * dp_tx_is_nbuf_marked_exception() - Check if the packet has been marked as
  792. * exception by the upper layer (OS_IF)
  793. * @soc: DP soc handle
  794. * @nbuf: packet to be transmitted
  795. *
  796. * Return: 1 if the packet is marked as exception,
  797. * 0, if the packet is not marked as exception.
  798. */
  799. static inline int dp_tx_is_nbuf_marked_exception(struct dp_soc *soc,
  800. qdf_nbuf_t nbuf)
  801. {
  802. return QDF_NBUF_CB_TX_PACKET_TO_FW(nbuf);
  803. }
  804. #else
  805. static inline int dp_tx_is_nbuf_marked_exception(struct dp_soc *soc,
  806. qdf_nbuf_t nbuf)
  807. {
  808. return 0;
  809. }
  810. #endif
  811. #ifdef DP_TRAFFIC_END_INDICATION
  812. /**
  813. * dp_tx_get_traffic_end_indication_pkt() - Allocate and prepare packet to send
  814. * as indication to fw to inform that
  815. * data stream has ended
  816. * @vdev: DP vdev handle
  817. * @nbuf: original buffer from network stack
  818. *
  819. * Return: NULL on failure,
  820. * nbuf on success
  821. */
  822. static inline qdf_nbuf_t
  823. dp_tx_get_traffic_end_indication_pkt(struct dp_vdev *vdev,
  824. qdf_nbuf_t nbuf)
  825. {
  826. /* Packet length should be enough to copy upto L3 header */
  827. uint8_t end_nbuf_len = 64;
  828. uint8_t htt_desc_size_aligned;
  829. uint8_t htt_desc_size;
  830. qdf_nbuf_t end_nbuf;
  831. if (qdf_unlikely(QDF_NBUF_CB_GET_PACKET_TYPE(nbuf) ==
  832. QDF_NBUF_CB_PACKET_TYPE_END_INDICATION)) {
  833. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  834. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  835. end_nbuf = qdf_nbuf_queue_remove(&vdev->end_ind_pkt_q);
  836. if (!end_nbuf) {
  837. end_nbuf = qdf_nbuf_alloc(NULL,
  838. (htt_desc_size_aligned +
  839. end_nbuf_len),
  840. htt_desc_size_aligned,
  841. 8, false);
  842. if (!end_nbuf) {
  843. dp_err("Packet allocation failed");
  844. goto out;
  845. }
  846. } else {
  847. qdf_nbuf_reset(end_nbuf, htt_desc_size_aligned, 8);
  848. }
  849. qdf_mem_copy(qdf_nbuf_data(end_nbuf), qdf_nbuf_data(nbuf),
  850. end_nbuf_len);
  851. qdf_nbuf_set_pktlen(end_nbuf, end_nbuf_len);
  852. return end_nbuf;
  853. }
  854. out:
  855. return NULL;
  856. }
  857. /**
  858. * dp_tx_send_traffic_end_indication_pkt() - Send indication packet to FW
  859. * via exception path.
  860. * @vdev: DP vdev handle
  861. * @end_nbuf: skb to send as indication
  862. * @msdu_info: msdu_info of original nbuf
  863. * @peer_id: peer id
  864. *
  865. * Return: None
  866. */
  867. static inline void
  868. dp_tx_send_traffic_end_indication_pkt(struct dp_vdev *vdev,
  869. qdf_nbuf_t end_nbuf,
  870. struct dp_tx_msdu_info_s *msdu_info,
  871. uint16_t peer_id)
  872. {
  873. struct dp_tx_msdu_info_s e_msdu_info = {0};
  874. qdf_nbuf_t nbuf;
  875. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  876. (struct htt_tx_msdu_desc_ext2_t *)(e_msdu_info.meta_data);
  877. e_msdu_info.tx_queue = msdu_info->tx_queue;
  878. e_msdu_info.tid = msdu_info->tid;
  879. e_msdu_info.exception_fw = 1;
  880. desc_ext->host_tx_desc_pool = 1;
  881. desc_ext->traffic_end_indication = 1;
  882. nbuf = dp_tx_send_msdu_single(vdev, end_nbuf, &e_msdu_info,
  883. peer_id, NULL);
  884. if (nbuf) {
  885. dp_err("Traffic end indication packet tx failed");
  886. qdf_nbuf_free(nbuf);
  887. }
  888. }
  889. /**
  890. * dp_tx_traffic_end_indication_set_desc_flag() - Set tx descriptor flag to
  891. * mark it traffic end indication
  892. * packet.
  893. * @tx_desc: Tx descriptor pointer
  894. * @msdu_info: msdu_info structure pointer
  895. *
  896. * Return: None
  897. */
  898. static inline void
  899. dp_tx_traffic_end_indication_set_desc_flag(struct dp_tx_desc_s *tx_desc,
  900. struct dp_tx_msdu_info_s *msdu_info)
  901. {
  902. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  903. (struct htt_tx_msdu_desc_ext2_t *)(msdu_info->meta_data);
  904. if (qdf_unlikely(desc_ext->traffic_end_indication))
  905. tx_desc->flags |= DP_TX_DESC_FLAG_TRAFFIC_END_IND;
  906. }
  907. /**
  908. * dp_tx_traffic_end_indication_enq_ind_pkt() - Enqueue the packet instead of
  909. * freeing which are associated
  910. * with traffic end indication
  911. * flagged descriptor.
  912. * @soc: dp soc handle
  913. * @desc: Tx descriptor pointer
  914. * @nbuf: buffer pointer
  915. *
  916. * Return: True if packet gets enqueued else false
  917. */
  918. static bool
  919. dp_tx_traffic_end_indication_enq_ind_pkt(struct dp_soc *soc,
  920. struct dp_tx_desc_s *desc,
  921. qdf_nbuf_t nbuf)
  922. {
  923. struct dp_vdev *vdev = NULL;
  924. if (qdf_unlikely((desc->flags &
  925. DP_TX_DESC_FLAG_TRAFFIC_END_IND) != 0)) {
  926. vdev = dp_vdev_get_ref_by_id(soc, desc->vdev_id,
  927. DP_MOD_ID_TX_COMP);
  928. if (vdev) {
  929. qdf_nbuf_queue_add(&vdev->end_ind_pkt_q, nbuf);
  930. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_COMP);
  931. return true;
  932. }
  933. }
  934. return false;
  935. }
  936. /**
  937. * dp_tx_traffic_end_indication_is_enabled() - get the feature
  938. * enable/disable status
  939. * @vdev: dp vdev handle
  940. *
  941. * Return: True if feature is enable else false
  942. */
  943. static inline bool
  944. dp_tx_traffic_end_indication_is_enabled(struct dp_vdev *vdev)
  945. {
  946. return qdf_unlikely(vdev->traffic_end_ind_en);
  947. }
  948. static inline qdf_nbuf_t
  949. dp_tx_send_msdu_single_wrapper(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  950. struct dp_tx_msdu_info_s *msdu_info,
  951. uint16_t peer_id, qdf_nbuf_t end_nbuf)
  952. {
  953. if (dp_tx_traffic_end_indication_is_enabled(vdev))
  954. end_nbuf = dp_tx_get_traffic_end_indication_pkt(vdev, nbuf);
  955. nbuf = dp_tx_send_msdu_single(vdev, nbuf, msdu_info, peer_id, NULL);
  956. if (qdf_unlikely(end_nbuf))
  957. dp_tx_send_traffic_end_indication_pkt(vdev, end_nbuf,
  958. msdu_info, peer_id);
  959. return nbuf;
  960. }
  961. #else
  962. static inline qdf_nbuf_t
  963. dp_tx_get_traffic_end_indication_pkt(struct dp_vdev *vdev,
  964. qdf_nbuf_t nbuf)
  965. {
  966. return NULL;
  967. }
  968. static inline void
  969. dp_tx_send_traffic_end_indication_pkt(struct dp_vdev *vdev,
  970. qdf_nbuf_t end_nbuf,
  971. struct dp_tx_msdu_info_s *msdu_info,
  972. uint16_t peer_id)
  973. {}
  974. static inline void
  975. dp_tx_traffic_end_indication_set_desc_flag(struct dp_tx_desc_s *tx_desc,
  976. struct dp_tx_msdu_info_s *msdu_info)
  977. {}
  978. static inline bool
  979. dp_tx_traffic_end_indication_enq_ind_pkt(struct dp_soc *soc,
  980. struct dp_tx_desc_s *desc,
  981. qdf_nbuf_t nbuf)
  982. {
  983. return false;
  984. }
  985. static inline bool
  986. dp_tx_traffic_end_indication_is_enabled(struct dp_vdev *vdev)
  987. {
  988. return false;
  989. }
  990. static inline qdf_nbuf_t
  991. dp_tx_send_msdu_single_wrapper(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  992. struct dp_tx_msdu_info_s *msdu_info,
  993. uint16_t peer_id, qdf_nbuf_t end_nbuf)
  994. {
  995. return dp_tx_send_msdu_single(vdev, nbuf, msdu_info, peer_id, NULL);
  996. }
  997. #endif
  998. #if defined(QCA_SUPPORT_WDS_EXTENDED)
  999. static bool
  1000. dp_tx_is_wds_ast_override_en(struct dp_soc *soc,
  1001. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1002. {
  1003. if (soc->features.wds_ext_ast_override_enable &&
  1004. tx_exc_metadata && tx_exc_metadata->is_wds_extended)
  1005. return true;
  1006. return false;
  1007. }
  1008. #else
  1009. static bool
  1010. dp_tx_is_wds_ast_override_en(struct dp_soc *soc,
  1011. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1012. {
  1013. return false;
  1014. }
  1015. #endif
  1016. /**
  1017. * dp_tx_prepare_desc_single() - Allocate and prepare Tx descriptor
  1018. * @vdev: DP vdev handle
  1019. * @nbuf: skb
  1020. * @desc_pool_id: Descriptor pool ID
  1021. * @msdu_info: Metadata to the fw
  1022. * @tx_exc_metadata: Handle that holds exception path metadata
  1023. *
  1024. * Allocate and prepare Tx descriptor with msdu information.
  1025. *
  1026. * Return: Pointer to Tx Descriptor on success,
  1027. * NULL on failure
  1028. */
  1029. static
  1030. struct dp_tx_desc_s *dp_tx_prepare_desc_single(struct dp_vdev *vdev,
  1031. qdf_nbuf_t nbuf, uint8_t desc_pool_id,
  1032. struct dp_tx_msdu_info_s *msdu_info,
  1033. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1034. {
  1035. uint8_t align_pad;
  1036. uint8_t is_exception = 0;
  1037. uint8_t htt_hdr_size;
  1038. struct dp_tx_desc_s *tx_desc;
  1039. struct dp_pdev *pdev = vdev->pdev;
  1040. struct dp_soc *soc = pdev->soc;
  1041. if (dp_tx_limit_check(vdev, nbuf))
  1042. return NULL;
  1043. /* Allocate software Tx descriptor */
  1044. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  1045. if (qdf_unlikely(!tx_desc)) {
  1046. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1047. DP_STATS_INC(vdev, tx_i.dropped.desc_na_exc_alloc_fail.num, 1);
  1048. return NULL;
  1049. }
  1050. dp_tx_outstanding_inc(pdev);
  1051. /* Initialize the SW tx descriptor */
  1052. tx_desc->nbuf = nbuf;
  1053. tx_desc->frm_type = dp_tx_frm_std;
  1054. tx_desc->tx_encap_type = ((tx_exc_metadata &&
  1055. (tx_exc_metadata->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE)) ?
  1056. tx_exc_metadata->tx_encap_type : vdev->tx_encap_type);
  1057. tx_desc->vdev_id = vdev->vdev_id;
  1058. tx_desc->pdev = pdev;
  1059. tx_desc->msdu_ext_desc = NULL;
  1060. tx_desc->pkt_offset = 0;
  1061. tx_desc->length = qdf_nbuf_headlen(nbuf);
  1062. dp_tx_trace_pkt(soc, nbuf, tx_desc->id, vdev->vdev_id,
  1063. vdev->qdf_opmode);
  1064. if (qdf_unlikely(vdev->multipass_en)) {
  1065. if (!dp_tx_multipass_process(soc, vdev, nbuf, msdu_info))
  1066. goto failure;
  1067. }
  1068. /* Packets marked by upper layer (OS-IF) to be sent to FW */
  1069. if (dp_tx_is_nbuf_marked_exception(soc, nbuf))
  1070. is_exception = 1;
  1071. /* for BE chipsets if wds extension was enbled will not mark FW
  1072. * in desc will mark ast index based search for ast index.
  1073. */
  1074. if (dp_tx_is_wds_ast_override_en(soc, tx_exc_metadata))
  1075. return tx_desc;
  1076. /*
  1077. * For special modes (vdev_type == ocb or mesh), data frames should be
  1078. * transmitted using varying transmit parameters (tx spec) which include
  1079. * transmit rate, power, priority, channel, channel bandwidth , nss etc.
  1080. * These are filled in HTT MSDU descriptor and sent in frame pre-header.
  1081. * These frames are sent as exception packets to firmware.
  1082. *
  1083. * HW requirement is that metadata should always point to a
  1084. * 8-byte aligned address. So we add alignment pad to start of buffer.
  1085. * HTT Metadata should be ensured to be multiple of 8-bytes,
  1086. * to get 8-byte aligned start address along with align_pad added
  1087. *
  1088. * |-----------------------------|
  1089. * | |
  1090. * |-----------------------------| <-----Buffer Pointer Address given
  1091. * | | ^ in HW descriptor (aligned)
  1092. * | HTT Metadata | |
  1093. * | | |
  1094. * | | | Packet Offset given in descriptor
  1095. * | | |
  1096. * |-----------------------------| |
  1097. * | Alignment Pad | v
  1098. * |-----------------------------| <----- Actual buffer start address
  1099. * | SKB Data | (Unaligned)
  1100. * | |
  1101. * | |
  1102. * | |
  1103. * | |
  1104. * | |
  1105. * |-----------------------------|
  1106. */
  1107. if (qdf_unlikely((msdu_info->exception_fw)) ||
  1108. (vdev->opmode == wlan_op_mode_ocb) ||
  1109. (tx_exc_metadata &&
  1110. tx_exc_metadata->is_tx_sniffer)) {
  1111. align_pad = ((unsigned long) qdf_nbuf_data(nbuf)) & 0x7;
  1112. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) < align_pad)) {
  1113. DP_STATS_INC(vdev,
  1114. tx_i.dropped.headroom_insufficient, 1);
  1115. goto failure;
  1116. }
  1117. if (qdf_nbuf_push_head(nbuf, align_pad) == NULL) {
  1118. dp_tx_err("qdf_nbuf_push_head failed");
  1119. goto failure;
  1120. }
  1121. htt_hdr_size = dp_tx_prepare_htt_metadata(vdev, nbuf,
  1122. msdu_info);
  1123. if (htt_hdr_size == 0)
  1124. goto failure;
  1125. tx_desc->length = qdf_nbuf_headlen(nbuf);
  1126. tx_desc->pkt_offset = align_pad + htt_hdr_size;
  1127. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1128. dp_tx_traffic_end_indication_set_desc_flag(tx_desc,
  1129. msdu_info);
  1130. is_exception = 1;
  1131. tx_desc->length -= tx_desc->pkt_offset;
  1132. }
  1133. #if !TQM_BYPASS_WAR
  1134. if (is_exception || tx_exc_metadata)
  1135. #endif
  1136. {
  1137. /* Temporary WAR due to TQM VP issues */
  1138. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1139. qdf_atomic_inc(&soc->num_tx_exception);
  1140. }
  1141. return tx_desc;
  1142. failure:
  1143. dp_tx_desc_release(soc, tx_desc, desc_pool_id);
  1144. return NULL;
  1145. }
  1146. /**
  1147. * dp_tx_prepare_desc() - Allocate and prepare Tx descriptor for multisegment
  1148. * frame
  1149. * @vdev: DP vdev handle
  1150. * @nbuf: skb
  1151. * @msdu_info: Info to be setup in MSDU descriptor and MSDU extension descriptor
  1152. * @desc_pool_id : Descriptor Pool ID
  1153. *
  1154. * Allocate and prepare Tx descriptor with msdu and fragment descritor
  1155. * information. For frames with fragments, allocate and prepare
  1156. * an MSDU extension descriptor
  1157. *
  1158. * Return: Pointer to Tx Descriptor on success,
  1159. * NULL on failure
  1160. */
  1161. static struct dp_tx_desc_s *dp_tx_prepare_desc(struct dp_vdev *vdev,
  1162. qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info,
  1163. uint8_t desc_pool_id)
  1164. {
  1165. struct dp_tx_desc_s *tx_desc;
  1166. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  1167. struct dp_pdev *pdev = vdev->pdev;
  1168. struct dp_soc *soc = pdev->soc;
  1169. if (dp_tx_limit_check(vdev, nbuf))
  1170. return NULL;
  1171. /* Allocate software Tx descriptor */
  1172. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  1173. if (!tx_desc) {
  1174. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1175. return NULL;
  1176. }
  1177. dp_tx_tso_seg_history_add(soc, msdu_info->u.tso_info.curr_seg,
  1178. nbuf, tx_desc->id, DP_TX_DESC_COOKIE);
  1179. dp_tx_outstanding_inc(pdev);
  1180. /* Initialize the SW tx descriptor */
  1181. tx_desc->nbuf = nbuf;
  1182. tx_desc->frm_type = msdu_info->frm_type;
  1183. tx_desc->tx_encap_type = vdev->tx_encap_type;
  1184. tx_desc->vdev_id = vdev->vdev_id;
  1185. tx_desc->pdev = pdev;
  1186. tx_desc->pkt_offset = 0;
  1187. dp_tx_trace_pkt(soc, nbuf, tx_desc->id, vdev->vdev_id,
  1188. vdev->qdf_opmode);
  1189. /* Handle scattered frames - TSO/SG/ME */
  1190. /* Allocate and prepare an extension descriptor for scattered frames */
  1191. msdu_ext_desc = dp_tx_prepare_ext_desc(vdev, msdu_info, desc_pool_id);
  1192. if (!msdu_ext_desc) {
  1193. dp_tx_info("Tx Extension Descriptor Alloc Fail");
  1194. goto failure;
  1195. }
  1196. #if !TQM_BYPASS_WAR
  1197. if (qdf_unlikely(msdu_info->exception_fw) ||
  1198. dp_tx_is_nbuf_marked_exception(soc, nbuf))
  1199. #endif
  1200. {
  1201. /* Temporary WAR due to TQM VP issues */
  1202. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1203. qdf_atomic_inc(&soc->num_tx_exception);
  1204. }
  1205. tx_desc->msdu_ext_desc = msdu_ext_desc;
  1206. tx_desc->flags |= DP_TX_DESC_FLAG_FRAG;
  1207. msdu_ext_desc->tso_desc = msdu_info->u.tso_info.curr_seg;
  1208. msdu_ext_desc->tso_num_desc = msdu_info->u.tso_info.tso_num_seg_list;
  1209. tx_desc->dma_addr = msdu_ext_desc->paddr;
  1210. if (msdu_ext_desc->flags & DP_TX_EXT_DESC_FLAG_METADATA_VALID)
  1211. tx_desc->length = HAL_TX_EXT_DESC_WITH_META_DATA;
  1212. else
  1213. tx_desc->length = HAL_TX_EXTENSION_DESC_LEN_BYTES;
  1214. return tx_desc;
  1215. failure:
  1216. dp_tx_desc_release(soc, tx_desc, desc_pool_id);
  1217. return NULL;
  1218. }
  1219. /**
  1220. * dp_tx_prepare_raw() - Prepare RAW packet TX
  1221. * @vdev: DP vdev handle
  1222. * @nbuf: buffer pointer
  1223. * @seg_info: Pointer to Segment info Descriptor to be prepared
  1224. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension
  1225. * descriptor
  1226. *
  1227. * Return:
  1228. */
  1229. static qdf_nbuf_t dp_tx_prepare_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1230. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  1231. {
  1232. qdf_nbuf_t curr_nbuf = NULL;
  1233. uint16_t total_len = 0;
  1234. qdf_dma_addr_t paddr;
  1235. int32_t i;
  1236. int32_t mapped_buf_num = 0;
  1237. struct dp_tx_sg_info_s *sg_info = &msdu_info->u.sg_info;
  1238. qdf_dot3_qosframe_t *qos_wh = (qdf_dot3_qosframe_t *) nbuf->data;
  1239. DP_STATS_INC_PKT(vdev, tx_i.raw.raw_pkt, 1, qdf_nbuf_len(nbuf));
  1240. /* Continue only if frames are of DATA type */
  1241. if (!DP_FRAME_IS_DATA(qos_wh)) {
  1242. DP_STATS_INC(vdev, tx_i.raw.invalid_raw_pkt_datatype, 1);
  1243. dp_tx_debug("Pkt. recd is of not data type");
  1244. goto error;
  1245. }
  1246. /* SWAR for HW: Enable WEP bit in the AMSDU frames for RAW mode */
  1247. if (vdev->raw_mode_war &&
  1248. (qos_wh->i_fc[0] & QDF_IEEE80211_FC0_SUBTYPE_QOS) &&
  1249. (qos_wh->i_qos[0] & IEEE80211_QOS_AMSDU))
  1250. qos_wh->i_fc[1] |= IEEE80211_FC1_WEP;
  1251. for (curr_nbuf = nbuf, i = 0; curr_nbuf;
  1252. curr_nbuf = qdf_nbuf_next(curr_nbuf), i++) {
  1253. /*
  1254. * Number of nbuf's must not exceed the size of the frags
  1255. * array in seg_info.
  1256. */
  1257. if (i >= DP_TX_MAX_NUM_FRAGS) {
  1258. dp_err_rl("nbuf cnt exceeds the max number of segs");
  1259. DP_STATS_INC(vdev, tx_i.raw.num_frags_overflow_err, 1);
  1260. goto error;
  1261. }
  1262. if (QDF_STATUS_SUCCESS !=
  1263. qdf_nbuf_map_nbytes_single(vdev->osdev,
  1264. curr_nbuf,
  1265. QDF_DMA_TO_DEVICE,
  1266. curr_nbuf->len)) {
  1267. dp_tx_err("%s dma map error ", __func__);
  1268. DP_STATS_INC(vdev, tx_i.raw.dma_map_error, 1);
  1269. goto error;
  1270. }
  1271. /* Update the count of mapped nbuf's */
  1272. mapped_buf_num++;
  1273. paddr = qdf_nbuf_get_frag_paddr(curr_nbuf, 0);
  1274. seg_info->frags[i].paddr_lo = paddr;
  1275. seg_info->frags[i].paddr_hi = ((uint64_t)paddr >> 32);
  1276. seg_info->frags[i].len = qdf_nbuf_len(curr_nbuf);
  1277. seg_info->frags[i].vaddr = (void *) curr_nbuf;
  1278. total_len += qdf_nbuf_len(curr_nbuf);
  1279. }
  1280. seg_info->frag_cnt = i;
  1281. seg_info->total_len = total_len;
  1282. seg_info->next = NULL;
  1283. sg_info->curr_seg = seg_info;
  1284. msdu_info->frm_type = dp_tx_frm_raw;
  1285. msdu_info->num_seg = 1;
  1286. return nbuf;
  1287. error:
  1288. i = 0;
  1289. while (nbuf) {
  1290. curr_nbuf = nbuf;
  1291. if (i < mapped_buf_num) {
  1292. qdf_nbuf_unmap_nbytes_single(vdev->osdev, curr_nbuf,
  1293. QDF_DMA_TO_DEVICE,
  1294. curr_nbuf->len);
  1295. i++;
  1296. }
  1297. nbuf = qdf_nbuf_next(nbuf);
  1298. qdf_nbuf_free(curr_nbuf);
  1299. }
  1300. return NULL;
  1301. }
  1302. /**
  1303. * dp_tx_raw_prepare_unset() - unmap the chain of nbufs belonging to RAW frame.
  1304. * @soc: DP soc handle
  1305. * @nbuf: Buffer pointer
  1306. *
  1307. * unmap the chain of nbufs that belong to this RAW frame.
  1308. *
  1309. * Return: None
  1310. */
  1311. static void dp_tx_raw_prepare_unset(struct dp_soc *soc,
  1312. qdf_nbuf_t nbuf)
  1313. {
  1314. qdf_nbuf_t cur_nbuf = nbuf;
  1315. do {
  1316. qdf_nbuf_unmap_nbytes_single(soc->osdev, cur_nbuf,
  1317. QDF_DMA_TO_DEVICE,
  1318. cur_nbuf->len);
  1319. cur_nbuf = qdf_nbuf_next(cur_nbuf);
  1320. } while (cur_nbuf);
  1321. }
  1322. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1323. void dp_vdev_peer_stats_update_protocol_cnt_tx(struct dp_vdev *vdev_hdl,
  1324. qdf_nbuf_t nbuf)
  1325. {
  1326. qdf_nbuf_t nbuf_local;
  1327. struct dp_vdev *vdev_local = vdev_hdl;
  1328. do {
  1329. if (qdf_likely(!((vdev_local)->peer_protocol_count_track)))
  1330. break;
  1331. nbuf_local = nbuf;
  1332. if (qdf_unlikely(((vdev_local)->tx_encap_type) ==
  1333. htt_cmn_pkt_type_raw))
  1334. break;
  1335. else if (qdf_unlikely(qdf_nbuf_is_nonlinear((nbuf_local))))
  1336. break;
  1337. else if (qdf_nbuf_is_tso((nbuf_local)))
  1338. break;
  1339. dp_vdev_peer_stats_update_protocol_cnt((vdev_local),
  1340. (nbuf_local),
  1341. NULL, 1, 0);
  1342. } while (0);
  1343. }
  1344. #endif
  1345. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1346. void dp_tx_update_stats(struct dp_soc *soc,
  1347. struct dp_tx_desc_s *tx_desc,
  1348. uint8_t ring_id)
  1349. {
  1350. uint32_t stats_len = dp_tx_get_pkt_len(tx_desc);
  1351. DP_STATS_INC_PKT(soc, tx.egress[ring_id], 1, stats_len);
  1352. }
  1353. int
  1354. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  1355. struct dp_tx_desc_s *tx_desc,
  1356. uint8_t tid,
  1357. struct dp_tx_msdu_info_s *msdu_info,
  1358. uint8_t ring_id)
  1359. {
  1360. struct dp_swlm *swlm = &soc->swlm;
  1361. union swlm_data swlm_query_data;
  1362. struct dp_swlm_tcl_data tcl_data;
  1363. QDF_STATUS status;
  1364. int ret;
  1365. if (!swlm->is_enabled)
  1366. return msdu_info->skip_hp_update;
  1367. tcl_data.nbuf = tx_desc->nbuf;
  1368. tcl_data.tid = tid;
  1369. tcl_data.ring_id = ring_id;
  1370. tcl_data.pkt_len = dp_tx_get_pkt_len(tx_desc);
  1371. tcl_data.num_ll_connections = vdev->num_latency_critical_conn;
  1372. swlm_query_data.tcl_data = &tcl_data;
  1373. status = dp_swlm_tcl_pre_check(soc, &tcl_data);
  1374. if (QDF_IS_STATUS_ERROR(status)) {
  1375. dp_swlm_tcl_reset_session_data(soc, ring_id);
  1376. DP_STATS_INC(swlm, tcl[ring_id].coalesce_fail, 1);
  1377. return 0;
  1378. }
  1379. ret = dp_swlm_query_policy(soc, TCL_DATA, swlm_query_data);
  1380. if (ret) {
  1381. DP_STATS_INC(swlm, tcl[ring_id].coalesce_success, 1);
  1382. } else {
  1383. DP_STATS_INC(swlm, tcl[ring_id].coalesce_fail, 1);
  1384. }
  1385. return ret;
  1386. }
  1387. void
  1388. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  1389. int coalesce)
  1390. {
  1391. if (coalesce)
  1392. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1393. else
  1394. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  1395. }
  1396. static inline void
  1397. dp_tx_is_hp_update_required(uint32_t i, struct dp_tx_msdu_info_s *msdu_info)
  1398. {
  1399. if (((i + 1) < msdu_info->num_seg))
  1400. msdu_info->skip_hp_update = 1;
  1401. else
  1402. msdu_info->skip_hp_update = 0;
  1403. }
  1404. static inline void
  1405. dp_flush_tcp_hp(struct dp_soc *soc, uint8_t ring_id)
  1406. {
  1407. hal_ring_handle_t hal_ring_hdl =
  1408. dp_tx_get_hal_ring_hdl(soc, ring_id);
  1409. if (dp_tx_hal_ring_access_start(soc, hal_ring_hdl)) {
  1410. dp_err("Fillmore: SRNG access start failed");
  1411. return;
  1412. }
  1413. dp_tx_ring_access_end_wrapper(soc, hal_ring_hdl, 0);
  1414. }
  1415. static inline void
  1416. dp_tx_check_and_flush_hp(struct dp_soc *soc,
  1417. QDF_STATUS status,
  1418. struct dp_tx_msdu_info_s *msdu_info)
  1419. {
  1420. if (QDF_IS_STATUS_ERROR(status) && !msdu_info->skip_hp_update) {
  1421. dp_flush_tcp_hp(soc,
  1422. (msdu_info->tx_queue.ring_id & DP_TX_QUEUE_MASK));
  1423. }
  1424. }
  1425. #else
  1426. static inline void
  1427. dp_tx_is_hp_update_required(uint32_t i, struct dp_tx_msdu_info_s *msdu_info)
  1428. {
  1429. }
  1430. static inline void
  1431. dp_tx_check_and_flush_hp(struct dp_soc *soc,
  1432. QDF_STATUS status,
  1433. struct dp_tx_msdu_info_s *msdu_info)
  1434. {
  1435. }
  1436. #endif
  1437. #ifdef FEATURE_RUNTIME_PM
  1438. void
  1439. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1440. hal_ring_handle_t hal_ring_hdl,
  1441. int coalesce)
  1442. {
  1443. int ret;
  1444. /*
  1445. * Avoid runtime get and put APIs under high throughput scenarios.
  1446. */
  1447. if (dp_get_rtpm_tput_policy_requirement(soc)) {
  1448. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1449. return;
  1450. }
  1451. ret = hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_DP);
  1452. if (QDF_IS_STATUS_SUCCESS(ret)) {
  1453. if (hif_system_pm_state_check(soc->hif_handle)) {
  1454. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1455. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1456. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1457. } else {
  1458. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1459. }
  1460. hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_DP);
  1461. } else {
  1462. dp_runtime_get(soc);
  1463. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1464. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1465. qdf_atomic_inc(&soc->tx_pending_rtpm);
  1466. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1467. dp_runtime_put(soc);
  1468. }
  1469. }
  1470. #else
  1471. #ifdef DP_POWER_SAVE
  1472. void
  1473. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1474. hal_ring_handle_t hal_ring_hdl,
  1475. int coalesce)
  1476. {
  1477. if (hif_system_pm_state_check(soc->hif_handle)) {
  1478. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1479. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1480. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1481. } else {
  1482. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1483. }
  1484. }
  1485. #endif
  1486. #endif
  1487. /**
  1488. * dp_tx_get_tid() - Obtain TID to be used for this frame
  1489. * @vdev: DP vdev handle
  1490. * @nbuf: skb
  1491. * @msdu_info: msdu descriptor
  1492. *
  1493. * Extract the DSCP or PCP information from frame and map into TID value.
  1494. *
  1495. * Return: void
  1496. */
  1497. static void dp_tx_get_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1498. struct dp_tx_msdu_info_s *msdu_info)
  1499. {
  1500. uint8_t tos = 0, dscp_tid_override = 0;
  1501. uint8_t *hdr_ptr, *L3datap;
  1502. uint8_t is_mcast = 0;
  1503. qdf_ether_header_t *eh = NULL;
  1504. qdf_ethervlan_header_t *evh = NULL;
  1505. uint16_t ether_type;
  1506. qdf_llc_t *llcHdr;
  1507. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  1508. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1509. if (qdf_likely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1510. eh = (qdf_ether_header_t *)nbuf->data;
  1511. hdr_ptr = (uint8_t *)(eh->ether_dhost);
  1512. L3datap = hdr_ptr + sizeof(qdf_ether_header_t);
  1513. } else {
  1514. qdf_dot3_qosframe_t *qos_wh =
  1515. (qdf_dot3_qosframe_t *) nbuf->data;
  1516. msdu_info->tid = qos_wh->i_fc[0] & DP_FC0_SUBTYPE_QOS ?
  1517. qos_wh->i_qos[0] & DP_QOS_TID : 0;
  1518. return;
  1519. }
  1520. is_mcast = DP_FRAME_IS_MULTICAST(hdr_ptr);
  1521. ether_type = eh->ether_type;
  1522. llcHdr = (qdf_llc_t *)(nbuf->data + sizeof(qdf_ether_header_t));
  1523. /*
  1524. * Check if packet is dot3 or eth2 type.
  1525. */
  1526. if (DP_FRAME_IS_LLC(ether_type) && DP_FRAME_IS_SNAP(llcHdr)) {
  1527. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE +
  1528. sizeof(*llcHdr));
  1529. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1530. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t) +
  1531. sizeof(*llcHdr);
  1532. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE
  1533. + sizeof(*llcHdr) +
  1534. sizeof(qdf_net_vlanhdr_t));
  1535. } else {
  1536. L3datap = hdr_ptr + sizeof(qdf_ether_header_t) +
  1537. sizeof(*llcHdr);
  1538. }
  1539. } else {
  1540. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1541. evh = (qdf_ethervlan_header_t *) eh;
  1542. ether_type = evh->ether_type;
  1543. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t);
  1544. }
  1545. }
  1546. /*
  1547. * Find priority from IP TOS DSCP field
  1548. */
  1549. if (qdf_nbuf_is_ipv4_pkt(nbuf)) {
  1550. qdf_net_iphdr_t *ip = (qdf_net_iphdr_t *) L3datap;
  1551. if (qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) {
  1552. /* Only for unicast frames */
  1553. if (!is_mcast) {
  1554. /* send it on VO queue */
  1555. msdu_info->tid = DP_VO_TID;
  1556. }
  1557. } else {
  1558. /*
  1559. * IP frame: exclude ECN bits 0-1 and map DSCP bits 2-7
  1560. * from TOS byte.
  1561. */
  1562. tos = ip->ip_tos;
  1563. dscp_tid_override = 1;
  1564. }
  1565. } else if (qdf_nbuf_is_ipv6_pkt(nbuf)) {
  1566. /* TODO
  1567. * use flowlabel
  1568. *igmpmld cases to be handled in phase 2
  1569. */
  1570. unsigned long ver_pri_flowlabel;
  1571. unsigned long pri;
  1572. ver_pri_flowlabel = *(unsigned long *) L3datap;
  1573. pri = (ntohl(ver_pri_flowlabel) & IPV6_FLOWINFO_PRIORITY) >>
  1574. DP_IPV6_PRIORITY_SHIFT;
  1575. tos = pri;
  1576. dscp_tid_override = 1;
  1577. } else if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf))
  1578. msdu_info->tid = DP_VO_TID;
  1579. else if (qdf_nbuf_is_ipv4_arp_pkt(nbuf)) {
  1580. /* Only for unicast frames */
  1581. if (!is_mcast) {
  1582. /* send ucast arp on VO queue */
  1583. msdu_info->tid = DP_VO_TID;
  1584. }
  1585. }
  1586. /*
  1587. * Assign all MCAST packets to BE
  1588. */
  1589. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1590. if (is_mcast) {
  1591. tos = 0;
  1592. dscp_tid_override = 1;
  1593. }
  1594. }
  1595. if (dscp_tid_override == 1) {
  1596. tos = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  1597. msdu_info->tid = pdev->dscp_tid_map[vdev->dscp_tid_map_id][tos];
  1598. }
  1599. if (msdu_info->tid >= CDP_MAX_DATA_TIDS)
  1600. msdu_info->tid = CDP_MAX_DATA_TIDS - 1;
  1601. return;
  1602. }
  1603. /**
  1604. * dp_tx_classify_tid() - Obtain TID to be used for this frame
  1605. * @vdev: DP vdev handle
  1606. * @nbuf: skb
  1607. * @msdu_info: msdu descriptor
  1608. *
  1609. * Software based TID classification is required when more than 2 DSCP-TID
  1610. * mapping tables are needed.
  1611. * Hardware supports 2 DSCP-TID mapping tables for HKv1 and 48 for HKv2.
  1612. *
  1613. * Return: void
  1614. */
  1615. static inline void dp_tx_classify_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1616. struct dp_tx_msdu_info_s *msdu_info)
  1617. {
  1618. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1619. /*
  1620. * skip_sw_tid_classification flag will set in below cases-
  1621. * 1. vdev->dscp_tid_map_id < pdev->soc->num_hw_dscp_tid_map
  1622. * 2. hlos_tid_override enabled for vdev
  1623. * 3. mesh mode enabled for vdev
  1624. */
  1625. if (qdf_likely(vdev->skip_sw_tid_classification)) {
  1626. /* Update tid in msdu_info from skb priority */
  1627. if (qdf_unlikely(vdev->skip_sw_tid_classification
  1628. & DP_TXRX_HLOS_TID_OVERRIDE_ENABLED)) {
  1629. uint32_t tid = qdf_nbuf_get_priority(nbuf);
  1630. if (tid == DP_TX_INVALID_QOS_TAG)
  1631. return;
  1632. msdu_info->tid = tid;
  1633. return;
  1634. }
  1635. return;
  1636. }
  1637. dp_tx_get_tid(vdev, nbuf, msdu_info);
  1638. }
  1639. #ifdef FEATURE_WLAN_TDLS
  1640. /**
  1641. * dp_tx_update_tdls_flags() - Update descriptor flags for TDLS frame
  1642. * @soc: datapath SOC
  1643. * @vdev: datapath vdev
  1644. * @tx_desc: TX descriptor
  1645. *
  1646. * Return: None
  1647. */
  1648. static void dp_tx_update_tdls_flags(struct dp_soc *soc,
  1649. struct dp_vdev *vdev,
  1650. struct dp_tx_desc_s *tx_desc)
  1651. {
  1652. if (vdev) {
  1653. if (vdev->is_tdls_frame) {
  1654. tx_desc->flags |= DP_TX_DESC_FLAG_TDLS_FRAME;
  1655. vdev->is_tdls_frame = false;
  1656. }
  1657. }
  1658. }
  1659. static uint8_t dp_htt_tx_comp_get_status(struct dp_soc *soc, char *htt_desc)
  1660. {
  1661. uint8_t tx_status = HTT_TX_FW2WBM_TX_STATUS_MAX;
  1662. switch (soc->arch_id) {
  1663. case CDP_ARCH_TYPE_LI:
  1664. tx_status = HTT_TX_WBM_COMPLETION_V2_TX_STATUS_GET(htt_desc[0]);
  1665. break;
  1666. case CDP_ARCH_TYPE_BE:
  1667. tx_status = HTT_TX_WBM_COMPLETION_V3_TX_STATUS_GET(htt_desc[0]);
  1668. break;
  1669. case CDP_ARCH_TYPE_RH:
  1670. {
  1671. uint32_t *msg_word = (uint32_t *)htt_desc;
  1672. tx_status = HTT_TX_MSDU_INFO_RELEASE_REASON_GET(
  1673. *(msg_word + 3));
  1674. }
  1675. break;
  1676. default:
  1677. dp_err("Incorrect CDP_ARCH %d", soc->arch_id);
  1678. QDF_BUG(0);
  1679. }
  1680. return tx_status;
  1681. }
  1682. /**
  1683. * dp_non_std_htt_tx_comp_free_buff() - Free the non std tx packet buffer
  1684. * @soc: dp_soc handle
  1685. * @tx_desc: TX descriptor
  1686. *
  1687. * Return: None
  1688. */
  1689. static void dp_non_std_htt_tx_comp_free_buff(struct dp_soc *soc,
  1690. struct dp_tx_desc_s *tx_desc)
  1691. {
  1692. uint8_t tx_status = 0;
  1693. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  1694. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1695. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, tx_desc->vdev_id,
  1696. DP_MOD_ID_TDLS);
  1697. if (qdf_unlikely(!vdev)) {
  1698. dp_err_rl("vdev is null!");
  1699. goto error;
  1700. }
  1701. hal_tx_comp_get_htt_desc(&tx_desc->comp, htt_tx_status);
  1702. tx_status = dp_htt_tx_comp_get_status(soc, htt_tx_status);
  1703. dp_debug("vdev_id: %d tx_status: %d", tx_desc->vdev_id, tx_status);
  1704. if (vdev->tx_non_std_data_callback.func) {
  1705. qdf_nbuf_set_next(nbuf, NULL);
  1706. vdev->tx_non_std_data_callback.func(
  1707. vdev->tx_non_std_data_callback.ctxt,
  1708. nbuf, tx_status);
  1709. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  1710. return;
  1711. } else {
  1712. dp_err_rl("callback func is null");
  1713. }
  1714. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  1715. error:
  1716. qdf_nbuf_unmap_single(soc->osdev, nbuf, QDF_DMA_TO_DEVICE);
  1717. qdf_nbuf_free(nbuf);
  1718. }
  1719. /**
  1720. * dp_tx_msdu_single_map() - do nbuf map
  1721. * @vdev: DP vdev handle
  1722. * @tx_desc: DP TX descriptor pointer
  1723. * @nbuf: skb pointer
  1724. *
  1725. * For TDLS frame, use qdf_nbuf_map_single() to align with the unmap
  1726. * operation done in other component.
  1727. *
  1728. * Return: QDF_STATUS
  1729. */
  1730. static inline QDF_STATUS dp_tx_msdu_single_map(struct dp_vdev *vdev,
  1731. struct dp_tx_desc_s *tx_desc,
  1732. qdf_nbuf_t nbuf)
  1733. {
  1734. if (qdf_likely(!(tx_desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME)))
  1735. return qdf_nbuf_map_nbytes_single(vdev->osdev,
  1736. nbuf,
  1737. QDF_DMA_TO_DEVICE,
  1738. nbuf->len);
  1739. else
  1740. return qdf_nbuf_map_single(vdev->osdev, nbuf,
  1741. QDF_DMA_TO_DEVICE);
  1742. }
  1743. #else
  1744. static inline void dp_tx_update_tdls_flags(struct dp_soc *soc,
  1745. struct dp_vdev *vdev,
  1746. struct dp_tx_desc_s *tx_desc)
  1747. {
  1748. }
  1749. static inline void dp_non_std_htt_tx_comp_free_buff(struct dp_soc *soc,
  1750. struct dp_tx_desc_s *tx_desc)
  1751. {
  1752. }
  1753. static inline QDF_STATUS dp_tx_msdu_single_map(struct dp_vdev *vdev,
  1754. struct dp_tx_desc_s *tx_desc,
  1755. qdf_nbuf_t nbuf)
  1756. {
  1757. return qdf_nbuf_map_nbytes_single(vdev->osdev,
  1758. nbuf,
  1759. QDF_DMA_TO_DEVICE,
  1760. nbuf->len);
  1761. }
  1762. #endif
  1763. static inline
  1764. qdf_dma_addr_t dp_tx_nbuf_map_regular(struct dp_vdev *vdev,
  1765. struct dp_tx_desc_s *tx_desc,
  1766. qdf_nbuf_t nbuf)
  1767. {
  1768. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1769. ret = dp_tx_msdu_single_map(vdev, tx_desc, nbuf);
  1770. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret)))
  1771. return 0;
  1772. return qdf_nbuf_mapped_paddr_get(nbuf);
  1773. }
  1774. static inline
  1775. void dp_tx_nbuf_unmap_regular(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1776. {
  1777. qdf_nbuf_unmap_nbytes_single_paddr(soc->osdev,
  1778. desc->nbuf,
  1779. desc->dma_addr,
  1780. QDF_DMA_TO_DEVICE,
  1781. desc->length);
  1782. }
  1783. #ifdef QCA_DP_TX_RMNET_OPTIMIZATION
  1784. static inline bool
  1785. is_nbuf_frm_rmnet(qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info)
  1786. {
  1787. struct net_device *ingress_dev;
  1788. skb_frag_t *frag;
  1789. uint16_t buf_len = 0;
  1790. uint16_t linear_data_len = 0;
  1791. uint8_t *payload_addr = NULL;
  1792. ingress_dev = dev_get_by_index(dev_net(nbuf->dev), nbuf->skb_iif);
  1793. if (!ingress_dev)
  1794. return false;
  1795. if ((ingress_dev->priv_flags & IFF_PHONY_HEADROOM)) {
  1796. qdf_net_if_release_dev((struct qdf_net_if *)ingress_dev);
  1797. frag = &(skb_shinfo(nbuf)->frags[0]);
  1798. buf_len = skb_frag_size(frag);
  1799. payload_addr = (uint8_t *)skb_frag_address(frag);
  1800. linear_data_len = skb_headlen(nbuf);
  1801. buf_len += linear_data_len;
  1802. payload_addr = payload_addr - linear_data_len;
  1803. memcpy(payload_addr, nbuf->data, linear_data_len);
  1804. msdu_info->frm_type = dp_tx_frm_rmnet;
  1805. msdu_info->buf_len = buf_len;
  1806. msdu_info->payload_addr = payload_addr;
  1807. return true;
  1808. }
  1809. qdf_net_if_release_dev((struct qdf_net_if *)ingress_dev);
  1810. return false;
  1811. }
  1812. static inline
  1813. qdf_dma_addr_t dp_tx_rmnet_nbuf_map(struct dp_tx_msdu_info_s *msdu_info,
  1814. struct dp_tx_desc_s *tx_desc)
  1815. {
  1816. qdf_dma_addr_t paddr;
  1817. paddr = (qdf_dma_addr_t)qdf_mem_virt_to_phys(msdu_info->payload_addr);
  1818. tx_desc->length = msdu_info->buf_len;
  1819. qdf_nbuf_dma_clean_range((void *)msdu_info->payload_addr,
  1820. (void *)(msdu_info->payload_addr +
  1821. msdu_info->buf_len));
  1822. tx_desc->flags |= DP_TX_DESC_FLAG_RMNET;
  1823. return paddr;
  1824. }
  1825. #else
  1826. static inline bool
  1827. is_nbuf_frm_rmnet(qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info)
  1828. {
  1829. return false;
  1830. }
  1831. static inline
  1832. qdf_dma_addr_t dp_tx_rmnet_nbuf_map(struct dp_tx_msdu_info_s *msdu_info,
  1833. struct dp_tx_desc_s *tx_desc)
  1834. {
  1835. return 0;
  1836. }
  1837. #endif
  1838. #if defined(QCA_DP_TX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  1839. static inline
  1840. qdf_dma_addr_t dp_tx_nbuf_map(struct dp_vdev *vdev,
  1841. struct dp_tx_desc_s *tx_desc,
  1842. qdf_nbuf_t nbuf)
  1843. {
  1844. if (qdf_likely(tx_desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  1845. qdf_nbuf_dma_clean_range((void *)nbuf->data,
  1846. (void *)(nbuf->data + nbuf->len));
  1847. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  1848. } else {
  1849. return dp_tx_nbuf_map_regular(vdev, tx_desc, nbuf);
  1850. }
  1851. }
  1852. static inline
  1853. void dp_tx_nbuf_unmap(struct dp_soc *soc,
  1854. struct dp_tx_desc_s *desc)
  1855. {
  1856. if (qdf_unlikely(!(desc->flags &
  1857. (DP_TX_DESC_FLAG_SIMPLE | DP_TX_DESC_FLAG_RMNET))))
  1858. return dp_tx_nbuf_unmap_regular(soc, desc);
  1859. }
  1860. #else
  1861. static inline
  1862. qdf_dma_addr_t dp_tx_nbuf_map(struct dp_vdev *vdev,
  1863. struct dp_tx_desc_s *tx_desc,
  1864. qdf_nbuf_t nbuf)
  1865. {
  1866. return dp_tx_nbuf_map_regular(vdev, tx_desc, nbuf);
  1867. }
  1868. static inline
  1869. void dp_tx_nbuf_unmap(struct dp_soc *soc,
  1870. struct dp_tx_desc_s *desc)
  1871. {
  1872. return dp_tx_nbuf_unmap_regular(soc, desc);
  1873. }
  1874. #endif
  1875. #if defined(WLAN_TX_PKT_CAPTURE_ENH) || defined(FEATURE_PERPKT_INFO)
  1876. static inline
  1877. void dp_tx_enh_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1878. {
  1879. if (qdf_likely(!(desc->flags & DP_TX_DESC_FLAG_UNMAP_DONE))) {
  1880. dp_tx_nbuf_unmap(soc, desc);
  1881. desc->flags |= DP_TX_DESC_FLAG_UNMAP_DONE;
  1882. }
  1883. }
  1884. static inline void dp_tx_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1885. {
  1886. if (qdf_likely(!(desc->flags & DP_TX_DESC_FLAG_UNMAP_DONE)))
  1887. dp_tx_nbuf_unmap(soc, desc);
  1888. }
  1889. #else
  1890. static inline
  1891. void dp_tx_enh_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1892. {
  1893. }
  1894. static inline void dp_tx_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1895. {
  1896. dp_tx_nbuf_unmap(soc, desc);
  1897. }
  1898. #endif
  1899. #ifdef MESH_MODE_SUPPORT
  1900. /**
  1901. * dp_tx_update_mesh_flags() - Update descriptor flags for mesh VAP
  1902. * @soc: datapath SOC
  1903. * @vdev: datapath vdev
  1904. * @tx_desc: TX descriptor
  1905. *
  1906. * Return: None
  1907. */
  1908. static inline void dp_tx_update_mesh_flags(struct dp_soc *soc,
  1909. struct dp_vdev *vdev,
  1910. struct dp_tx_desc_s *tx_desc)
  1911. {
  1912. if (qdf_unlikely(vdev->mesh_vdev))
  1913. tx_desc->flags |= DP_TX_DESC_FLAG_MESH_MODE;
  1914. }
  1915. /**
  1916. * dp_mesh_tx_comp_free_buff() - Free the mesh tx packet buffer
  1917. * @soc: dp_soc handle
  1918. * @tx_desc: TX descriptor
  1919. * @delayed_free: delay the nbuf free
  1920. *
  1921. * Return: nbuf to be freed late
  1922. */
  1923. static inline qdf_nbuf_t dp_mesh_tx_comp_free_buff(struct dp_soc *soc,
  1924. struct dp_tx_desc_s *tx_desc,
  1925. bool delayed_free)
  1926. {
  1927. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1928. struct dp_vdev *vdev = NULL;
  1929. vdev = dp_vdev_get_ref_by_id(soc, tx_desc->vdev_id, DP_MOD_ID_MESH);
  1930. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW) {
  1931. if (vdev)
  1932. DP_STATS_INC(vdev, tx_i.mesh.completion_fw, 1);
  1933. if (delayed_free)
  1934. return nbuf;
  1935. qdf_nbuf_free(nbuf);
  1936. } else {
  1937. if (vdev && vdev->osif_tx_free_ext) {
  1938. vdev->osif_tx_free_ext((nbuf));
  1939. } else {
  1940. if (delayed_free)
  1941. return nbuf;
  1942. qdf_nbuf_free(nbuf);
  1943. }
  1944. }
  1945. if (vdev)
  1946. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  1947. return NULL;
  1948. }
  1949. #else
  1950. static inline void dp_tx_update_mesh_flags(struct dp_soc *soc,
  1951. struct dp_vdev *vdev,
  1952. struct dp_tx_desc_s *tx_desc)
  1953. {
  1954. }
  1955. static inline qdf_nbuf_t dp_mesh_tx_comp_free_buff(struct dp_soc *soc,
  1956. struct dp_tx_desc_s *tx_desc,
  1957. bool delayed_free)
  1958. {
  1959. return NULL;
  1960. }
  1961. #endif
  1962. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac)
  1963. {
  1964. struct dp_pdev *pdev = NULL;
  1965. struct dp_ast_entry *src_ast_entry = NULL;
  1966. struct dp_ast_entry *dst_ast_entry = NULL;
  1967. struct dp_soc *soc = NULL;
  1968. qdf_assert(vdev);
  1969. pdev = vdev->pdev;
  1970. qdf_assert(pdev);
  1971. soc = pdev->soc;
  1972. dst_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1973. (soc, dstmac, vdev->pdev->pdev_id);
  1974. src_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1975. (soc, srcmac, vdev->pdev->pdev_id);
  1976. if (dst_ast_entry && src_ast_entry) {
  1977. if (dst_ast_entry->peer_id ==
  1978. src_ast_entry->peer_id)
  1979. return 1;
  1980. }
  1981. return 0;
  1982. }
  1983. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  1984. defined(WLAN_MCAST_MLO)
  1985. /* MLO peer id for reinject*/
  1986. #define DP_MLO_MCAST_REINJECT_PEER_ID 0XFFFD
  1987. /* MLO vdev id inc offset */
  1988. #define DP_MLO_VDEV_ID_OFFSET 0x80
  1989. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1990. static inline bool
  1991. dp_tx_wds_ext_check(struct cdp_tx_exception_metadata *tx_exc_metadata)
  1992. {
  1993. if (tx_exc_metadata && tx_exc_metadata->is_wds_extended)
  1994. return true;
  1995. return false;
  1996. }
  1997. #else
  1998. static inline bool
  1999. dp_tx_wds_ext_check(struct cdp_tx_exception_metadata *tx_exc_metadata)
  2000. {
  2001. return false;
  2002. }
  2003. #endif
  2004. static inline void
  2005. dp_tx_bypass_reinjection(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  2006. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2007. {
  2008. /* wds ext enabled will not set the TO_FW bit */
  2009. if (dp_tx_wds_ext_check(tx_exc_metadata))
  2010. return;
  2011. if (!(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)) {
  2012. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  2013. qdf_atomic_inc(&soc->num_tx_exception);
  2014. }
  2015. }
  2016. static inline void
  2017. dp_tx_update_mcast_param(uint16_t peer_id,
  2018. uint16_t *htt_tcl_metadata,
  2019. struct dp_vdev *vdev,
  2020. struct dp_tx_msdu_info_s *msdu_info)
  2021. {
  2022. if (peer_id == DP_MLO_MCAST_REINJECT_PEER_ID) {
  2023. *htt_tcl_metadata = 0;
  2024. DP_TX_TCL_METADATA_TYPE_SET(
  2025. *htt_tcl_metadata,
  2026. HTT_TCL_METADATA_V2_TYPE_GLOBAL_SEQ_BASED);
  2027. HTT_TX_TCL_METADATA_GLBL_SEQ_NO_SET(*htt_tcl_metadata,
  2028. msdu_info->gsn);
  2029. msdu_info->vdev_id = vdev->vdev_id + DP_MLO_VDEV_ID_OFFSET;
  2030. HTT_TX_TCL_METADATA_GLBL_SEQ_HOST_INSPECTED_SET(
  2031. *htt_tcl_metadata, 1);
  2032. } else {
  2033. msdu_info->vdev_id = vdev->vdev_id;
  2034. }
  2035. }
  2036. #else
  2037. static inline void
  2038. dp_tx_bypass_reinjection(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  2039. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2040. {
  2041. }
  2042. static inline void
  2043. dp_tx_update_mcast_param(uint16_t peer_id,
  2044. uint16_t *htt_tcl_metadata,
  2045. struct dp_vdev *vdev,
  2046. struct dp_tx_msdu_info_s *msdu_info)
  2047. {
  2048. }
  2049. #endif
  2050. #ifdef DP_TX_SW_DROP_STATS_INC
  2051. static void tx_sw_drop_stats_inc(struct dp_pdev *pdev,
  2052. qdf_nbuf_t nbuf,
  2053. enum cdp_tx_sw_drop drop_code)
  2054. {
  2055. /* EAPOL Drop stats */
  2056. if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) {
  2057. switch (drop_code) {
  2058. case TX_DESC_ERR:
  2059. DP_STATS_INC(pdev, eap_drop_stats.tx_desc_err, 1);
  2060. break;
  2061. case TX_HAL_RING_ACCESS_ERR:
  2062. DP_STATS_INC(pdev,
  2063. eap_drop_stats.tx_hal_ring_access_err, 1);
  2064. break;
  2065. case TX_DMA_MAP_ERR:
  2066. DP_STATS_INC(pdev, eap_drop_stats.tx_dma_map_err, 1);
  2067. break;
  2068. case TX_HW_ENQUEUE:
  2069. DP_STATS_INC(pdev, eap_drop_stats.tx_hw_enqueue, 1);
  2070. break;
  2071. case TX_SW_ENQUEUE:
  2072. DP_STATS_INC(pdev, eap_drop_stats.tx_sw_enqueue, 1);
  2073. break;
  2074. default:
  2075. dp_info_rl("Invalid eapol_drop code: %d", drop_code);
  2076. break;
  2077. }
  2078. }
  2079. }
  2080. #else
  2081. static void tx_sw_drop_stats_inc(struct dp_pdev *pdev,
  2082. qdf_nbuf_t nbuf,
  2083. enum cdp_tx_sw_drop drop_code)
  2084. {
  2085. }
  2086. #endif
  2087. qdf_nbuf_t
  2088. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2089. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  2090. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2091. {
  2092. struct dp_pdev *pdev = vdev->pdev;
  2093. struct dp_soc *soc = pdev->soc;
  2094. struct dp_tx_desc_s *tx_desc;
  2095. QDF_STATUS status;
  2096. struct dp_tx_queue *tx_q = &(msdu_info->tx_queue);
  2097. uint16_t htt_tcl_metadata = 0;
  2098. enum cdp_tx_sw_drop drop_code = TX_MAX_DROP;
  2099. uint8_t tid = msdu_info->tid;
  2100. struct cdp_tid_tx_stats *tid_stats = NULL;
  2101. qdf_dma_addr_t paddr;
  2102. /* Setup Tx descriptor for an MSDU, and MSDU extension descriptor */
  2103. tx_desc = dp_tx_prepare_desc_single(vdev, nbuf, tx_q->desc_pool_id,
  2104. msdu_info, tx_exc_metadata);
  2105. if (!tx_desc) {
  2106. dp_err_rl("Tx_desc prepare Fail vdev_id %d vdev %pK queue %d",
  2107. vdev->vdev_id, vdev, tx_q->desc_pool_id);
  2108. drop_code = TX_DESC_ERR;
  2109. goto fail_return;
  2110. }
  2111. dp_tx_update_tdls_flags(soc, vdev, tx_desc);
  2112. if (qdf_unlikely(peer_id == DP_INVALID_PEER)) {
  2113. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2114. DP_TX_TCL_METADATA_HOST_INSPECTED_SET(htt_tcl_metadata, 1);
  2115. } else if (qdf_unlikely(peer_id != HTT_INVALID_PEER)) {
  2116. DP_TX_TCL_METADATA_TYPE_SET(htt_tcl_metadata,
  2117. DP_TCL_METADATA_TYPE_PEER_BASED);
  2118. DP_TX_TCL_METADATA_PEER_ID_SET(htt_tcl_metadata,
  2119. peer_id);
  2120. dp_tx_bypass_reinjection(soc, tx_desc, tx_exc_metadata);
  2121. } else
  2122. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2123. if (msdu_info->exception_fw)
  2124. DP_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  2125. dp_tx_desc_update_fast_comp_flag(soc, tx_desc,
  2126. !pdev->enhanced_stats_en);
  2127. dp_tx_update_mesh_flags(soc, vdev, tx_desc);
  2128. if (qdf_unlikely(msdu_info->frm_type == dp_tx_frm_rmnet))
  2129. paddr = dp_tx_rmnet_nbuf_map(msdu_info, tx_desc);
  2130. else
  2131. paddr = dp_tx_nbuf_map(vdev, tx_desc, nbuf);
  2132. if (!paddr) {
  2133. /* Handle failure */
  2134. dp_err("qdf_nbuf_map failed");
  2135. DP_STATS_INC(vdev, tx_i.dropped.dma_error, 1);
  2136. drop_code = TX_DMA_MAP_ERR;
  2137. goto release_desc;
  2138. }
  2139. tx_desc->dma_addr = paddr;
  2140. dp_tx_desc_history_add(soc, tx_desc->dma_addr, nbuf,
  2141. tx_desc->id, DP_TX_DESC_MAP);
  2142. dp_tx_update_mcast_param(peer_id, &htt_tcl_metadata, vdev, msdu_info);
  2143. /* Enqueue the Tx MSDU descriptor to HW for transmit */
  2144. status = soc->arch_ops.tx_hw_enqueue(soc, vdev, tx_desc,
  2145. htt_tcl_metadata,
  2146. tx_exc_metadata, msdu_info);
  2147. if (status != QDF_STATUS_SUCCESS) {
  2148. dp_tx_err_rl("Tx_hw_enqueue Fail tx_desc %pK queue %d",
  2149. tx_desc, tx_q->ring_id);
  2150. dp_tx_desc_history_add(soc, tx_desc->dma_addr, nbuf,
  2151. tx_desc->id, DP_TX_DESC_UNMAP);
  2152. dp_tx_nbuf_unmap(soc, tx_desc);
  2153. drop_code = TX_HW_ENQUEUE;
  2154. goto release_desc;
  2155. }
  2156. tx_sw_drop_stats_inc(pdev, nbuf, drop_code);
  2157. return NULL;
  2158. release_desc:
  2159. dp_tx_desc_release(soc, tx_desc, tx_q->desc_pool_id);
  2160. fail_return:
  2161. dp_tx_get_tid(vdev, nbuf, msdu_info);
  2162. tx_sw_drop_stats_inc(pdev, nbuf, drop_code);
  2163. tid_stats = &pdev->stats.tid_stats.
  2164. tid_tx_stats[tx_q->ring_id][tid];
  2165. tid_stats->swdrop_cnt[drop_code]++;
  2166. return nbuf;
  2167. }
  2168. /**
  2169. * dp_tdls_tx_comp_free_buff() - Free non std buffer when TDLS flag is set
  2170. * @soc: Soc handle
  2171. * @desc: software Tx descriptor to be processed
  2172. *
  2173. * Return: 0 if Success
  2174. */
  2175. #ifdef FEATURE_WLAN_TDLS
  2176. static inline int
  2177. dp_tdls_tx_comp_free_buff(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  2178. {
  2179. /* If it is TDLS mgmt, don't unmap or free the frame */
  2180. if (desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME) {
  2181. dp_non_std_htt_tx_comp_free_buff(soc, desc);
  2182. return 0;
  2183. }
  2184. return 1;
  2185. }
  2186. #else
  2187. static inline int
  2188. dp_tdls_tx_comp_free_buff(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  2189. {
  2190. return 1;
  2191. }
  2192. #endif
  2193. qdf_nbuf_t dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc,
  2194. bool delayed_free)
  2195. {
  2196. qdf_nbuf_t nbuf = desc->nbuf;
  2197. enum dp_tx_event_type type = dp_tx_get_event_type(desc->flags);
  2198. /* nbuf already freed in vdev detach path */
  2199. if (!nbuf)
  2200. return NULL;
  2201. if (!dp_tdls_tx_comp_free_buff(soc, desc))
  2202. return NULL;
  2203. /* 0 : MSDU buffer, 1 : MLE */
  2204. if (desc->msdu_ext_desc) {
  2205. /* TSO free */
  2206. if (hal_tx_ext_desc_get_tso_enable(
  2207. desc->msdu_ext_desc->vaddr)) {
  2208. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf,
  2209. desc->id, DP_TX_COMP_MSDU_EXT);
  2210. dp_tx_tso_seg_history_add(soc,
  2211. desc->msdu_ext_desc->tso_desc,
  2212. desc->nbuf, desc->id, type);
  2213. /* unmap eash TSO seg before free the nbuf */
  2214. dp_tx_tso_unmap_segment(soc,
  2215. desc->msdu_ext_desc->tso_desc,
  2216. desc->msdu_ext_desc->
  2217. tso_num_desc);
  2218. goto nbuf_free;
  2219. }
  2220. if (qdf_unlikely(desc->frm_type == dp_tx_frm_sg)) {
  2221. void *msdu_ext_desc = desc->msdu_ext_desc->vaddr;
  2222. qdf_dma_addr_t iova;
  2223. uint32_t frag_len;
  2224. uint32_t i;
  2225. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  2226. QDF_DMA_TO_DEVICE,
  2227. qdf_nbuf_headlen(nbuf));
  2228. for (i = 1; i < DP_TX_MAX_NUM_FRAGS; i++) {
  2229. hal_tx_ext_desc_get_frag_info(msdu_ext_desc, i,
  2230. &iova,
  2231. &frag_len);
  2232. if (!iova || !frag_len)
  2233. break;
  2234. qdf_mem_unmap_page(soc->osdev, iova, frag_len,
  2235. QDF_DMA_TO_DEVICE);
  2236. }
  2237. goto nbuf_free;
  2238. }
  2239. }
  2240. /* If it's ME frame, dont unmap the cloned nbuf's */
  2241. if ((desc->flags & DP_TX_DESC_FLAG_ME) && qdf_nbuf_is_cloned(nbuf))
  2242. goto nbuf_free;
  2243. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf, desc->id, type);
  2244. dp_tx_unmap(soc, desc);
  2245. if (desc->flags & DP_TX_DESC_FLAG_MESH_MODE)
  2246. return dp_mesh_tx_comp_free_buff(soc, desc, delayed_free);
  2247. if (dp_tx_traffic_end_indication_enq_ind_pkt(soc, desc, nbuf))
  2248. return NULL;
  2249. nbuf_free:
  2250. if (delayed_free)
  2251. return nbuf;
  2252. qdf_nbuf_free(nbuf);
  2253. return NULL;
  2254. }
  2255. /**
  2256. * dp_tx_sg_unmap_buf() - Unmap scatter gather fragments
  2257. * @soc: DP soc handle
  2258. * @nbuf: skb
  2259. * @msdu_info: MSDU info
  2260. *
  2261. * Return: None
  2262. */
  2263. static inline void
  2264. dp_tx_sg_unmap_buf(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2265. struct dp_tx_msdu_info_s *msdu_info)
  2266. {
  2267. uint32_t cur_idx;
  2268. struct dp_tx_seg_info_s *seg = msdu_info->u.sg_info.curr_seg;
  2269. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf, QDF_DMA_TO_DEVICE,
  2270. qdf_nbuf_headlen(nbuf));
  2271. for (cur_idx = 1; cur_idx < seg->frag_cnt; cur_idx++)
  2272. qdf_mem_unmap_page(soc->osdev, (qdf_dma_addr_t)
  2273. (seg->frags[cur_idx].paddr_lo | ((uint64_t)
  2274. seg->frags[cur_idx].paddr_hi) << 32),
  2275. seg->frags[cur_idx].len,
  2276. QDF_DMA_TO_DEVICE);
  2277. }
  2278. #if QDF_LOCK_STATS
  2279. noinline
  2280. #else
  2281. #endif
  2282. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2283. struct dp_tx_msdu_info_s *msdu_info)
  2284. {
  2285. uint32_t i;
  2286. struct dp_pdev *pdev = vdev->pdev;
  2287. struct dp_soc *soc = pdev->soc;
  2288. struct dp_tx_desc_s *tx_desc;
  2289. bool is_cce_classified = false;
  2290. QDF_STATUS status;
  2291. uint16_t htt_tcl_metadata = 0;
  2292. struct dp_tx_queue *tx_q = &msdu_info->tx_queue;
  2293. struct cdp_tid_tx_stats *tid_stats = NULL;
  2294. uint8_t prep_desc_fail = 0, hw_enq_fail = 0;
  2295. if (msdu_info->frm_type == dp_tx_frm_me)
  2296. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  2297. i = 0;
  2298. /* Print statement to track i and num_seg */
  2299. /*
  2300. * For each segment (maps to 1 MSDU) , prepare software and hardware
  2301. * descriptors using information in msdu_info
  2302. */
  2303. while (i < msdu_info->num_seg) {
  2304. /*
  2305. * Setup Tx descriptor for an MSDU, and MSDU extension
  2306. * descriptor
  2307. */
  2308. tx_desc = dp_tx_prepare_desc(vdev, nbuf, msdu_info,
  2309. tx_q->desc_pool_id);
  2310. if (!tx_desc) {
  2311. if (msdu_info->frm_type == dp_tx_frm_me) {
  2312. prep_desc_fail++;
  2313. dp_tx_me_free_buf(pdev,
  2314. (void *)(msdu_info->u.sg_info
  2315. .curr_seg->frags[0].vaddr));
  2316. if (prep_desc_fail == msdu_info->num_seg) {
  2317. /*
  2318. * Unmap is needed only if descriptor
  2319. * preparation failed for all segments.
  2320. */
  2321. qdf_nbuf_unmap(soc->osdev,
  2322. msdu_info->u.sg_info.
  2323. curr_seg->nbuf,
  2324. QDF_DMA_TO_DEVICE);
  2325. }
  2326. /*
  2327. * Free the nbuf for the current segment
  2328. * and make it point to the next in the list.
  2329. * For me, there are as many segments as there
  2330. * are no of clients.
  2331. */
  2332. qdf_nbuf_free(msdu_info->u.sg_info
  2333. .curr_seg->nbuf);
  2334. if (msdu_info->u.sg_info.curr_seg->next) {
  2335. msdu_info->u.sg_info.curr_seg =
  2336. msdu_info->u.sg_info
  2337. .curr_seg->next;
  2338. nbuf = msdu_info->u.sg_info
  2339. .curr_seg->nbuf;
  2340. }
  2341. i++;
  2342. continue;
  2343. }
  2344. if (msdu_info->frm_type == dp_tx_frm_tso) {
  2345. dp_tx_tso_seg_history_add(
  2346. soc,
  2347. msdu_info->u.tso_info.curr_seg,
  2348. nbuf, 0, DP_TX_DESC_UNMAP);
  2349. dp_tx_tso_unmap_segment(soc,
  2350. msdu_info->u.tso_info.
  2351. curr_seg,
  2352. msdu_info->u.tso_info.
  2353. tso_num_seg_list);
  2354. if (msdu_info->u.tso_info.curr_seg->next) {
  2355. msdu_info->u.tso_info.curr_seg =
  2356. msdu_info->u.tso_info.curr_seg->next;
  2357. i++;
  2358. continue;
  2359. }
  2360. }
  2361. if (msdu_info->frm_type == dp_tx_frm_sg)
  2362. dp_tx_sg_unmap_buf(soc, nbuf, msdu_info);
  2363. goto done;
  2364. }
  2365. if (msdu_info->frm_type == dp_tx_frm_me) {
  2366. tx_desc->msdu_ext_desc->me_buffer =
  2367. (struct dp_tx_me_buf_t *)msdu_info->
  2368. u.sg_info.curr_seg->frags[0].vaddr;
  2369. tx_desc->flags |= DP_TX_DESC_FLAG_ME;
  2370. }
  2371. if (is_cce_classified)
  2372. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  2373. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2374. if (msdu_info->exception_fw) {
  2375. DP_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  2376. }
  2377. dp_tx_is_hp_update_required(i, msdu_info);
  2378. /*
  2379. * For frames with multiple segments (TSO, ME), jump to next
  2380. * segment.
  2381. */
  2382. if (msdu_info->frm_type == dp_tx_frm_tso) {
  2383. if (msdu_info->u.tso_info.curr_seg->next) {
  2384. msdu_info->u.tso_info.curr_seg =
  2385. msdu_info->u.tso_info.curr_seg->next;
  2386. /*
  2387. * If this is a jumbo nbuf, then increment the
  2388. * number of nbuf users for each additional
  2389. * segment of the msdu. This will ensure that
  2390. * the skb is freed only after receiving tx
  2391. * completion for all segments of an nbuf
  2392. */
  2393. qdf_nbuf_inc_users(nbuf);
  2394. /* Check with MCL if this is needed */
  2395. /* nbuf = msdu_info->u.tso_info.curr_seg->nbuf;
  2396. */
  2397. }
  2398. }
  2399. dp_tx_update_mcast_param(DP_INVALID_PEER,
  2400. &htt_tcl_metadata,
  2401. vdev,
  2402. msdu_info);
  2403. /*
  2404. * Enqueue the Tx MSDU descriptor to HW for transmit
  2405. */
  2406. status = soc->arch_ops.tx_hw_enqueue(soc, vdev, tx_desc,
  2407. htt_tcl_metadata,
  2408. NULL, msdu_info);
  2409. dp_tx_check_and_flush_hp(soc, status, msdu_info);
  2410. if (status != QDF_STATUS_SUCCESS) {
  2411. dp_info_rl("Tx_hw_enqueue Fail tx_desc %pK queue %d",
  2412. tx_desc, tx_q->ring_id);
  2413. dp_tx_get_tid(vdev, nbuf, msdu_info);
  2414. tid_stats = &pdev->stats.tid_stats.
  2415. tid_tx_stats[tx_q->ring_id][msdu_info->tid];
  2416. tid_stats->swdrop_cnt[TX_HW_ENQUEUE]++;
  2417. if (msdu_info->frm_type == dp_tx_frm_me) {
  2418. hw_enq_fail++;
  2419. if (hw_enq_fail == msdu_info->num_seg) {
  2420. /*
  2421. * Unmap is needed only if enqueue
  2422. * failed for all segments.
  2423. */
  2424. qdf_nbuf_unmap(soc->osdev,
  2425. msdu_info->u.sg_info.
  2426. curr_seg->nbuf,
  2427. QDF_DMA_TO_DEVICE);
  2428. }
  2429. /*
  2430. * Free the nbuf for the current segment
  2431. * and make it point to the next in the list.
  2432. * For me, there are as many segments as there
  2433. * are no of clients.
  2434. */
  2435. qdf_nbuf_free(msdu_info->u.sg_info
  2436. .curr_seg->nbuf);
  2437. dp_tx_desc_release(soc, tx_desc,
  2438. tx_q->desc_pool_id);
  2439. if (msdu_info->u.sg_info.curr_seg->next) {
  2440. msdu_info->u.sg_info.curr_seg =
  2441. msdu_info->u.sg_info
  2442. .curr_seg->next;
  2443. nbuf = msdu_info->u.sg_info
  2444. .curr_seg->nbuf;
  2445. } else
  2446. break;
  2447. i++;
  2448. continue;
  2449. }
  2450. /*
  2451. * For TSO frames, the nbuf users increment done for
  2452. * the current segment has to be reverted, since the
  2453. * hw enqueue for this segment failed
  2454. */
  2455. if (msdu_info->frm_type == dp_tx_frm_tso &&
  2456. msdu_info->u.tso_info.curr_seg) {
  2457. /*
  2458. * unmap and free current,
  2459. * retransmit remaining segments
  2460. */
  2461. dp_tx_comp_free_buf(soc, tx_desc, false);
  2462. i++;
  2463. dp_tx_desc_release(soc, tx_desc,
  2464. tx_q->desc_pool_id);
  2465. continue;
  2466. }
  2467. if (msdu_info->frm_type == dp_tx_frm_sg)
  2468. dp_tx_sg_unmap_buf(soc, nbuf, msdu_info);
  2469. dp_tx_desc_release(soc, tx_desc, tx_q->desc_pool_id);
  2470. goto done;
  2471. }
  2472. /*
  2473. * TODO
  2474. * if tso_info structure can be modified to have curr_seg
  2475. * as first element, following 2 blocks of code (for TSO and SG)
  2476. * can be combined into 1
  2477. */
  2478. /*
  2479. * For Multicast-Unicast converted packets,
  2480. * each converted frame (for a client) is represented as
  2481. * 1 segment
  2482. */
  2483. if ((msdu_info->frm_type == dp_tx_frm_sg) ||
  2484. (msdu_info->frm_type == dp_tx_frm_me)) {
  2485. if (msdu_info->u.sg_info.curr_seg->next) {
  2486. msdu_info->u.sg_info.curr_seg =
  2487. msdu_info->u.sg_info.curr_seg->next;
  2488. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  2489. } else
  2490. break;
  2491. }
  2492. i++;
  2493. }
  2494. nbuf = NULL;
  2495. done:
  2496. return nbuf;
  2497. }
  2498. /**
  2499. * dp_tx_prepare_sg()- Extract SG info from NBUF and prepare msdu_info
  2500. * for SG frames
  2501. * @vdev: DP vdev handle
  2502. * @nbuf: skb
  2503. * @seg_info: Pointer to Segment info Descriptor to be prepared
  2504. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2505. *
  2506. * Return: NULL on success,
  2507. * nbuf when it fails to send
  2508. */
  2509. static qdf_nbuf_t dp_tx_prepare_sg(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2510. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  2511. {
  2512. uint32_t cur_frag, nr_frags, i;
  2513. qdf_dma_addr_t paddr;
  2514. struct dp_tx_sg_info_s *sg_info;
  2515. sg_info = &msdu_info->u.sg_info;
  2516. nr_frags = qdf_nbuf_get_nr_frags(nbuf);
  2517. if (QDF_STATUS_SUCCESS !=
  2518. qdf_nbuf_map_nbytes_single(vdev->osdev, nbuf,
  2519. QDF_DMA_TO_DEVICE,
  2520. qdf_nbuf_headlen(nbuf))) {
  2521. dp_tx_err("dma map error");
  2522. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  2523. qdf_nbuf_free(nbuf);
  2524. return NULL;
  2525. }
  2526. paddr = qdf_nbuf_mapped_paddr_get(nbuf);
  2527. seg_info->frags[0].paddr_lo = paddr;
  2528. seg_info->frags[0].paddr_hi = ((uint64_t) paddr) >> 32;
  2529. seg_info->frags[0].len = qdf_nbuf_headlen(nbuf);
  2530. seg_info->frags[0].vaddr = (void *) nbuf;
  2531. for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) {
  2532. if (QDF_STATUS_SUCCESS != qdf_nbuf_frag_map(vdev->osdev,
  2533. nbuf, 0,
  2534. QDF_DMA_TO_DEVICE,
  2535. cur_frag)) {
  2536. dp_tx_err("frag dma map error");
  2537. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  2538. goto map_err;
  2539. }
  2540. paddr = qdf_nbuf_get_tx_frag_paddr(nbuf);
  2541. seg_info->frags[cur_frag + 1].paddr_lo = paddr;
  2542. seg_info->frags[cur_frag + 1].paddr_hi =
  2543. ((uint64_t) paddr) >> 32;
  2544. seg_info->frags[cur_frag + 1].len =
  2545. qdf_nbuf_get_frag_size(nbuf, cur_frag);
  2546. }
  2547. seg_info->frag_cnt = (cur_frag + 1);
  2548. seg_info->total_len = qdf_nbuf_len(nbuf);
  2549. seg_info->next = NULL;
  2550. sg_info->curr_seg = seg_info;
  2551. msdu_info->frm_type = dp_tx_frm_sg;
  2552. msdu_info->num_seg = 1;
  2553. return nbuf;
  2554. map_err:
  2555. /* restore paddr into nbuf before calling unmap */
  2556. qdf_nbuf_mapped_paddr_set(nbuf,
  2557. (qdf_dma_addr_t)(seg_info->frags[0].paddr_lo |
  2558. ((uint64_t)
  2559. seg_info->frags[0].paddr_hi) << 32));
  2560. qdf_nbuf_unmap_nbytes_single(vdev->osdev, nbuf,
  2561. QDF_DMA_TO_DEVICE,
  2562. seg_info->frags[0].len);
  2563. for (i = 1; i <= cur_frag; i++) {
  2564. qdf_mem_unmap_page(vdev->osdev, (qdf_dma_addr_t)
  2565. (seg_info->frags[i].paddr_lo | ((uint64_t)
  2566. seg_info->frags[i].paddr_hi) << 32),
  2567. seg_info->frags[i].len,
  2568. QDF_DMA_TO_DEVICE);
  2569. }
  2570. qdf_nbuf_free(nbuf);
  2571. return NULL;
  2572. }
  2573. /**
  2574. * dp_tx_add_tx_sniffer_meta_data()- Add tx_sniffer meta hdr info
  2575. * @vdev: DP vdev handle
  2576. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2577. * @ppdu_cookie: PPDU cookie that should be replayed in the ppdu completions
  2578. *
  2579. * Return: NULL on failure,
  2580. * nbuf when extracted successfully
  2581. */
  2582. static
  2583. void dp_tx_add_tx_sniffer_meta_data(struct dp_vdev *vdev,
  2584. struct dp_tx_msdu_info_s *msdu_info,
  2585. uint16_t ppdu_cookie)
  2586. {
  2587. struct htt_tx_msdu_desc_ext2_t *meta_data =
  2588. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  2589. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  2590. HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_SET
  2591. (msdu_info->meta_data[5], 1);
  2592. HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_SET
  2593. (msdu_info->meta_data[5], 1);
  2594. HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_SET
  2595. (msdu_info->meta_data[6], ppdu_cookie);
  2596. msdu_info->exception_fw = 1;
  2597. msdu_info->is_tx_sniffer = 1;
  2598. }
  2599. #ifdef MESH_MODE_SUPPORT
  2600. /**
  2601. * dp_tx_extract_mesh_meta_data()- Extract mesh meta hdr info from nbuf
  2602. * and prepare msdu_info for mesh frames.
  2603. * @vdev: DP vdev handle
  2604. * @nbuf: skb
  2605. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2606. *
  2607. * Return: NULL on failure,
  2608. * nbuf when extracted successfully
  2609. */
  2610. static
  2611. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2612. struct dp_tx_msdu_info_s *msdu_info)
  2613. {
  2614. struct meta_hdr_s *mhdr;
  2615. struct htt_tx_msdu_desc_ext2_t *meta_data =
  2616. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  2617. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  2618. if (CB_FTYPE_MESH_TX_INFO != qdf_nbuf_get_tx_ftype(nbuf)) {
  2619. msdu_info->exception_fw = 0;
  2620. goto remove_meta_hdr;
  2621. }
  2622. msdu_info->exception_fw = 1;
  2623. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  2624. meta_data->host_tx_desc_pool = 1;
  2625. meta_data->update_peer_cache = 1;
  2626. meta_data->learning_frame = 1;
  2627. if (!(mhdr->flags & METAHDR_FLAG_AUTO_RATE)) {
  2628. meta_data->power = mhdr->power;
  2629. meta_data->mcs_mask = 1 << mhdr->rate_info[0].mcs;
  2630. meta_data->nss_mask = 1 << mhdr->rate_info[0].nss;
  2631. meta_data->pream_type = mhdr->rate_info[0].preamble_type;
  2632. meta_data->retry_limit = mhdr->rate_info[0].max_tries;
  2633. meta_data->dyn_bw = 1;
  2634. meta_data->valid_pwr = 1;
  2635. meta_data->valid_mcs_mask = 1;
  2636. meta_data->valid_nss_mask = 1;
  2637. meta_data->valid_preamble_type = 1;
  2638. meta_data->valid_retries = 1;
  2639. meta_data->valid_bw_info = 1;
  2640. }
  2641. if (mhdr->flags & METAHDR_FLAG_NOENCRYPT) {
  2642. meta_data->encrypt_type = 0;
  2643. meta_data->valid_encrypt_type = 1;
  2644. meta_data->learning_frame = 0;
  2645. }
  2646. meta_data->valid_key_flags = 1;
  2647. meta_data->key_flags = (mhdr->keyix & 0x3);
  2648. remove_meta_hdr:
  2649. if (qdf_nbuf_pull_head(nbuf, sizeof(struct meta_hdr_s)) == NULL) {
  2650. dp_tx_err("qdf_nbuf_pull_head failed");
  2651. qdf_nbuf_free(nbuf);
  2652. return NULL;
  2653. }
  2654. msdu_info->tid = qdf_nbuf_get_priority(nbuf);
  2655. dp_tx_info("Meta hdr %0x %0x %0x %0x %0x %0x"
  2656. " tid %d to_fw %d",
  2657. msdu_info->meta_data[0],
  2658. msdu_info->meta_data[1],
  2659. msdu_info->meta_data[2],
  2660. msdu_info->meta_data[3],
  2661. msdu_info->meta_data[4],
  2662. msdu_info->meta_data[5],
  2663. msdu_info->tid, msdu_info->exception_fw);
  2664. return nbuf;
  2665. }
  2666. #else
  2667. static
  2668. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2669. struct dp_tx_msdu_info_s *msdu_info)
  2670. {
  2671. return nbuf;
  2672. }
  2673. #endif
  2674. /**
  2675. * dp_check_exc_metadata() - Checks if parameters are valid
  2676. * @tx_exc: holds all exception path parameters
  2677. *
  2678. * Return: true when all the parameters are valid else false
  2679. *
  2680. */
  2681. static bool dp_check_exc_metadata(struct cdp_tx_exception_metadata *tx_exc)
  2682. {
  2683. bool invalid_tid = (tx_exc->tid >= DP_MAX_TIDS && tx_exc->tid !=
  2684. HTT_INVALID_TID);
  2685. bool invalid_encap_type =
  2686. (tx_exc->tx_encap_type > htt_cmn_pkt_num_types &&
  2687. tx_exc->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE);
  2688. bool invalid_sec_type = (tx_exc->sec_type > cdp_num_sec_types &&
  2689. tx_exc->sec_type != CDP_INVALID_SEC_TYPE);
  2690. bool invalid_cookie = (tx_exc->is_tx_sniffer == 1 &&
  2691. tx_exc->ppdu_cookie == 0);
  2692. if (tx_exc->is_intrabss_fwd)
  2693. return true;
  2694. if (invalid_tid || invalid_encap_type || invalid_sec_type ||
  2695. invalid_cookie) {
  2696. return false;
  2697. }
  2698. return true;
  2699. }
  2700. #ifdef ATH_SUPPORT_IQUE
  2701. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2702. {
  2703. qdf_ether_header_t *eh;
  2704. /* Mcast to Ucast Conversion*/
  2705. if (qdf_likely(!vdev->mcast_enhancement_en))
  2706. return true;
  2707. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2708. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) &&
  2709. !DP_FRAME_IS_BROADCAST((eh)->ether_dhost)) {
  2710. dp_verbose_debug("Mcast frm for ME %pK", vdev);
  2711. qdf_nbuf_set_next(nbuf, NULL);
  2712. DP_STATS_INC_PKT(vdev, tx_i.mcast_en.mcast_pkt, 1,
  2713. qdf_nbuf_len(nbuf));
  2714. if (dp_tx_prepare_send_me(vdev, nbuf) ==
  2715. QDF_STATUS_SUCCESS) {
  2716. return false;
  2717. }
  2718. if (qdf_unlikely(vdev->igmp_mcast_enhanc_en > 0)) {
  2719. if (dp_tx_prepare_send_igmp_me(vdev, nbuf) ==
  2720. QDF_STATUS_SUCCESS) {
  2721. return false;
  2722. }
  2723. }
  2724. }
  2725. return true;
  2726. }
  2727. #else
  2728. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2729. {
  2730. return true;
  2731. }
  2732. #endif
  2733. #ifdef QCA_SUPPORT_WDS_EXTENDED
  2734. /**
  2735. * dp_tx_mcast_drop() - Drop mcast frame if drop_tx_mcast is set in WDS_EXT
  2736. * @vdev: vdev handle
  2737. * @nbuf: skb
  2738. *
  2739. * Return: true if frame is dropped, false otherwise
  2740. */
  2741. static inline bool dp_tx_mcast_drop(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2742. {
  2743. /* Drop tx mcast and WDS Extended feature check */
  2744. if (qdf_unlikely((vdev->drop_tx_mcast) && (vdev->wds_ext_enabled))) {
  2745. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  2746. qdf_nbuf_data(nbuf);
  2747. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  2748. DP_STATS_INC(vdev, tx_i.dropped.tx_mcast_drop, 1);
  2749. return true;
  2750. }
  2751. }
  2752. return false;
  2753. }
  2754. #else
  2755. static inline bool dp_tx_mcast_drop(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2756. {
  2757. return false;
  2758. }
  2759. #endif
  2760. /**
  2761. * dp_tx_per_pkt_vdev_id_check() - vdev id check for frame
  2762. * @nbuf: qdf_nbuf_t
  2763. * @vdev: struct dp_vdev *
  2764. *
  2765. * Allow packet for processing only if it is for peer client which is
  2766. * connected with same vap. Drop packet if client is connected to
  2767. * different vap.
  2768. *
  2769. * Return: QDF_STATUS
  2770. */
  2771. static inline QDF_STATUS
  2772. dp_tx_per_pkt_vdev_id_check(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  2773. {
  2774. struct dp_ast_entry *dst_ast_entry = NULL;
  2775. qdf_ether_header_t *eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2776. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) ||
  2777. DP_FRAME_IS_BROADCAST((eh)->ether_dhost))
  2778. return QDF_STATUS_SUCCESS;
  2779. qdf_spin_lock_bh(&vdev->pdev->soc->ast_lock);
  2780. dst_ast_entry = dp_peer_ast_hash_find_by_vdevid(vdev->pdev->soc,
  2781. eh->ether_dhost,
  2782. vdev->vdev_id);
  2783. /* If there is no ast entry, return failure */
  2784. if (qdf_unlikely(!dst_ast_entry)) {
  2785. qdf_spin_unlock_bh(&vdev->pdev->soc->ast_lock);
  2786. return QDF_STATUS_E_FAILURE;
  2787. }
  2788. qdf_spin_unlock_bh(&vdev->pdev->soc->ast_lock);
  2789. return QDF_STATUS_SUCCESS;
  2790. }
  2791. /**
  2792. * dp_tx_nawds_handler() - NAWDS handler
  2793. *
  2794. * @soc: DP soc handle
  2795. * @vdev: DP vdev handle
  2796. * @msdu_info: msdu_info required to create HTT metadata
  2797. * @nbuf: skb
  2798. * @sa_peer_id:
  2799. *
  2800. * This API transfers the multicast frames with the peer id
  2801. * on NAWDS enabled peer.
  2802. *
  2803. * Return: none
  2804. */
  2805. void dp_tx_nawds_handler(struct dp_soc *soc, struct dp_vdev *vdev,
  2806. struct dp_tx_msdu_info_s *msdu_info,
  2807. qdf_nbuf_t nbuf, uint16_t sa_peer_id)
  2808. {
  2809. struct dp_peer *peer = NULL;
  2810. qdf_nbuf_t nbuf_clone = NULL;
  2811. uint16_t peer_id = DP_INVALID_PEER;
  2812. struct dp_txrx_peer *txrx_peer;
  2813. uint8_t link_id = 0;
  2814. /* This check avoids pkt forwarding which is entered
  2815. * in the ast table but still doesn't have valid peerid.
  2816. */
  2817. if (sa_peer_id == HTT_INVALID_PEER)
  2818. return;
  2819. qdf_spin_lock_bh(&vdev->peer_list_lock);
  2820. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2821. txrx_peer = dp_get_txrx_peer(peer);
  2822. if (!txrx_peer)
  2823. continue;
  2824. if (!txrx_peer->bss_peer && txrx_peer->nawds_enabled) {
  2825. peer_id = peer->peer_id;
  2826. if (!dp_peer_is_primary_link_peer(peer))
  2827. continue;
  2828. /* In the case of wds ext peer mcast traffic will be
  2829. * sent as part of VLAN interface
  2830. */
  2831. if (dp_peer_is_wds_ext_peer(txrx_peer))
  2832. continue;
  2833. /* Multicast packets needs to be
  2834. * dropped in case of intra bss forwarding
  2835. */
  2836. if (sa_peer_id == txrx_peer->peer_id) {
  2837. dp_tx_debug("multicast packet");
  2838. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2839. tx.nawds_mcast_drop,
  2840. 1, link_id);
  2841. continue;
  2842. }
  2843. nbuf_clone = qdf_nbuf_clone(nbuf);
  2844. if (!nbuf_clone) {
  2845. QDF_TRACE(QDF_MODULE_ID_DP,
  2846. QDF_TRACE_LEVEL_ERROR,
  2847. FL("nbuf clone failed"));
  2848. break;
  2849. }
  2850. nbuf_clone = dp_tx_send_msdu_single(vdev, nbuf_clone,
  2851. msdu_info, peer_id,
  2852. NULL);
  2853. if (nbuf_clone) {
  2854. dp_tx_debug("pkt send failed");
  2855. qdf_nbuf_free(nbuf_clone);
  2856. } else {
  2857. if (peer_id != DP_INVALID_PEER)
  2858. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  2859. tx.nawds_mcast,
  2860. 1, qdf_nbuf_len(nbuf), link_id);
  2861. }
  2862. }
  2863. }
  2864. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  2865. }
  2866. #ifdef WLAN_MCAST_MLO
  2867. static inline bool
  2868. dp_tx_check_mesh_vdev(struct dp_vdev *vdev,
  2869. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2870. {
  2871. if (!tx_exc_metadata->is_mlo_mcast && qdf_unlikely(vdev->mesh_vdev))
  2872. return true;
  2873. return false;
  2874. }
  2875. #else
  2876. static inline bool
  2877. dp_tx_check_mesh_vdev(struct dp_vdev *vdev,
  2878. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2879. {
  2880. if (qdf_unlikely(vdev->mesh_vdev))
  2881. return true;
  2882. return false;
  2883. }
  2884. #endif
  2885. qdf_nbuf_t
  2886. dp_tx_send_exception(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  2887. qdf_nbuf_t nbuf,
  2888. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2889. {
  2890. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2891. struct dp_tx_msdu_info_s msdu_info;
  2892. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  2893. DP_MOD_ID_TX_EXCEPTION);
  2894. if (qdf_unlikely(!vdev))
  2895. goto fail;
  2896. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  2897. if (!tx_exc_metadata)
  2898. goto fail;
  2899. msdu_info.tid = tx_exc_metadata->tid;
  2900. dp_verbose_debug("skb "QDF_MAC_ADDR_FMT,
  2901. QDF_MAC_ADDR_REF(nbuf->data));
  2902. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  2903. if (qdf_unlikely(!dp_check_exc_metadata(tx_exc_metadata))) {
  2904. dp_tx_err("Invalid parameters in exception path");
  2905. goto fail;
  2906. }
  2907. /* for peer based metadata check if peer is valid */
  2908. if (tx_exc_metadata->peer_id != CDP_INVALID_PEER) {
  2909. struct dp_peer *peer = NULL;
  2910. peer = dp_peer_get_ref_by_id(vdev->pdev->soc,
  2911. tx_exc_metadata->peer_id,
  2912. DP_MOD_ID_TX_EXCEPTION);
  2913. if (qdf_unlikely(!peer)) {
  2914. DP_STATS_INC(vdev,
  2915. tx_i.dropped.invalid_peer_id_in_exc_path,
  2916. 1);
  2917. goto fail;
  2918. }
  2919. dp_peer_unref_delete(peer, DP_MOD_ID_TX_EXCEPTION);
  2920. }
  2921. /* Basic sanity checks for unsupported packets */
  2922. /* MESH mode */
  2923. if (dp_tx_check_mesh_vdev(vdev, tx_exc_metadata)) {
  2924. dp_tx_err("Mesh mode is not supported in exception path");
  2925. goto fail;
  2926. }
  2927. /*
  2928. * Classify the frame and call corresponding
  2929. * "prepare" function which extracts the segment (TSO)
  2930. * and fragmentation information (for TSO , SG, ME, or Raw)
  2931. * into MSDU_INFO structure which is later used to fill
  2932. * SW and HW descriptors.
  2933. */
  2934. if (qdf_nbuf_is_tso(nbuf)) {
  2935. dp_verbose_debug("TSO frame %pK", vdev);
  2936. DP_STATS_INC_PKT(vdev->pdev, tso_stats.num_tso_pkts, 1,
  2937. qdf_nbuf_len(nbuf));
  2938. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  2939. DP_STATS_INC_PKT(vdev->pdev, tso_stats.dropped_host, 1,
  2940. qdf_nbuf_len(nbuf));
  2941. goto fail;
  2942. }
  2943. DP_STATS_INC(vdev, tx_i.rcvd.num, msdu_info.num_seg - 1);
  2944. goto send_multiple;
  2945. }
  2946. /* SG */
  2947. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  2948. struct dp_tx_seg_info_s seg_info = {0};
  2949. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info, &msdu_info);
  2950. if (!nbuf)
  2951. goto fail;
  2952. dp_verbose_debug("non-TSO SG frame %pK", vdev);
  2953. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  2954. qdf_nbuf_len(nbuf));
  2955. goto send_multiple;
  2956. }
  2957. if (qdf_likely(tx_exc_metadata->is_tx_sniffer)) {
  2958. DP_STATS_INC_PKT(vdev, tx_i.sniffer_rcvd, 1,
  2959. qdf_nbuf_len(nbuf));
  2960. dp_tx_add_tx_sniffer_meta_data(vdev, &msdu_info,
  2961. tx_exc_metadata->ppdu_cookie);
  2962. }
  2963. /*
  2964. * Get HW Queue to use for this frame.
  2965. * TCL supports upto 4 DMA rings, out of which 3 rings are
  2966. * dedicated for data and 1 for command.
  2967. * "queue_id" maps to one hardware ring.
  2968. * With each ring, we also associate a unique Tx descriptor pool
  2969. * to minimize lock contention for these resources.
  2970. */
  2971. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  2972. DP_STATS_INC(vdev, tx_i.rcvd_per_core[msdu_info.tx_queue.desc_pool_id],
  2973. 1);
  2974. /*
  2975. * if the packet is mcast packet send through mlo_macst handler
  2976. * for all prnt_vdevs
  2977. */
  2978. if (soc->arch_ops.dp_tx_mlo_mcast_send) {
  2979. nbuf = soc->arch_ops.dp_tx_mlo_mcast_send(soc, vdev,
  2980. nbuf,
  2981. tx_exc_metadata);
  2982. if (!nbuf)
  2983. goto fail;
  2984. }
  2985. if (qdf_likely(tx_exc_metadata->is_intrabss_fwd)) {
  2986. if (qdf_unlikely(vdev->nawds_enabled)) {
  2987. /*
  2988. * This is a multicast packet
  2989. */
  2990. dp_tx_nawds_handler(soc, vdev, &msdu_info, nbuf,
  2991. tx_exc_metadata->peer_id);
  2992. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  2993. 1, qdf_nbuf_len(nbuf));
  2994. }
  2995. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  2996. DP_INVALID_PEER, NULL);
  2997. } else {
  2998. /*
  2999. * Check exception descriptors
  3000. */
  3001. if (dp_tx_exception_limit_check(vdev))
  3002. goto fail;
  3003. /* Single linear frame */
  3004. /*
  3005. * If nbuf is a simple linear frame, use send_single function to
  3006. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  3007. * SRNG. There is no need to setup a MSDU extension descriptor.
  3008. */
  3009. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  3010. tx_exc_metadata->peer_id,
  3011. tx_exc_metadata);
  3012. }
  3013. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3014. return nbuf;
  3015. send_multiple:
  3016. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  3017. fail:
  3018. if (vdev)
  3019. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3020. dp_verbose_debug("pkt send failed");
  3021. return nbuf;
  3022. }
  3023. qdf_nbuf_t
  3024. dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc_hdl,
  3025. uint8_t vdev_id, qdf_nbuf_t nbuf,
  3026. struct cdp_tx_exception_metadata *tx_exc_metadata)
  3027. {
  3028. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3029. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  3030. DP_MOD_ID_TX_EXCEPTION);
  3031. if (qdf_unlikely(!vdev))
  3032. goto fail;
  3033. if (qdf_unlikely(dp_tx_per_pkt_vdev_id_check(nbuf, vdev)
  3034. == QDF_STATUS_E_FAILURE)) {
  3035. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  3036. goto fail;
  3037. }
  3038. /* Unref count as it will again be taken inside dp_tx_exception */
  3039. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3040. return dp_tx_send_exception(soc_hdl, vdev_id, nbuf, tx_exc_metadata);
  3041. fail:
  3042. if (vdev)
  3043. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3044. dp_verbose_debug("pkt send failed");
  3045. return nbuf;
  3046. }
  3047. #ifdef MESH_MODE_SUPPORT
  3048. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3049. qdf_nbuf_t nbuf)
  3050. {
  3051. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3052. struct meta_hdr_s *mhdr;
  3053. qdf_nbuf_t nbuf_mesh = NULL;
  3054. qdf_nbuf_t nbuf_clone = NULL;
  3055. struct dp_vdev *vdev;
  3056. uint8_t no_enc_frame = 0;
  3057. nbuf_mesh = qdf_nbuf_unshare(nbuf);
  3058. if (!nbuf_mesh) {
  3059. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3060. "qdf_nbuf_unshare failed");
  3061. return nbuf;
  3062. }
  3063. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_MESH);
  3064. if (!vdev) {
  3065. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3066. "vdev is NULL for vdev_id %d", vdev_id);
  3067. return nbuf;
  3068. }
  3069. nbuf = nbuf_mesh;
  3070. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  3071. if ((vdev->sec_type != cdp_sec_type_none) &&
  3072. (mhdr->flags & METAHDR_FLAG_NOENCRYPT))
  3073. no_enc_frame = 1;
  3074. if (mhdr->flags & METAHDR_FLAG_NOQOS)
  3075. qdf_nbuf_set_priority(nbuf, HTT_TX_EXT_TID_NON_QOS_MCAST_BCAST);
  3076. if ((mhdr->flags & METAHDR_FLAG_INFO_UPDATED) &&
  3077. !no_enc_frame) {
  3078. nbuf_clone = qdf_nbuf_clone(nbuf);
  3079. if (!nbuf_clone) {
  3080. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3081. "qdf_nbuf_clone failed");
  3082. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  3083. return nbuf;
  3084. }
  3085. qdf_nbuf_set_tx_ftype(nbuf_clone, CB_FTYPE_MESH_TX_INFO);
  3086. }
  3087. if (nbuf_clone) {
  3088. if (!dp_tx_send(soc_hdl, vdev_id, nbuf_clone)) {
  3089. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  3090. } else {
  3091. qdf_nbuf_free(nbuf_clone);
  3092. }
  3093. }
  3094. if (no_enc_frame)
  3095. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_MESH_TX_INFO);
  3096. else
  3097. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_INVALID);
  3098. nbuf = dp_tx_send(soc_hdl, vdev_id, nbuf);
  3099. if ((!nbuf) && no_enc_frame) {
  3100. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  3101. }
  3102. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  3103. return nbuf;
  3104. }
  3105. #else
  3106. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3107. qdf_nbuf_t nbuf)
  3108. {
  3109. return dp_tx_send(soc_hdl, vdev_id, nbuf);
  3110. }
  3111. #endif
  3112. #ifdef QCA_DP_TX_NBUF_AND_NBUF_DATA_PREFETCH
  3113. static inline
  3114. void dp_tx_prefetch_nbuf_data(qdf_nbuf_t nbuf)
  3115. {
  3116. if (nbuf) {
  3117. qdf_prefetch(&nbuf->len);
  3118. qdf_prefetch(&nbuf->data);
  3119. }
  3120. }
  3121. #else
  3122. static inline
  3123. void dp_tx_prefetch_nbuf_data(qdf_nbuf_t nbuf)
  3124. {
  3125. }
  3126. #endif
  3127. #ifdef DP_UMAC_HW_RESET_SUPPORT
  3128. qdf_nbuf_t dp_tx_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3129. qdf_nbuf_t nbuf)
  3130. {
  3131. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3132. struct dp_vdev *vdev = NULL;
  3133. vdev = soc->vdev_id_map[vdev_id];
  3134. if (qdf_unlikely(!vdev))
  3135. return nbuf;
  3136. DP_STATS_INC(vdev, tx_i.dropped.drop_ingress, 1);
  3137. return nbuf;
  3138. }
  3139. qdf_nbuf_t dp_tx_exc_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3140. qdf_nbuf_t nbuf,
  3141. struct cdp_tx_exception_metadata *tx_exc_metadata)
  3142. {
  3143. return dp_tx_drop(soc_hdl, vdev_id, nbuf);
  3144. }
  3145. #endif
  3146. #ifdef FEATURE_DIRECT_LINK
  3147. /**
  3148. * dp_vdev_tx_mark_to_fw() - Mark to_fw bit for the tx packet
  3149. * @nbuf: skb
  3150. * @vdev: DP vdev handle
  3151. *
  3152. * Return: None
  3153. */
  3154. static inline void dp_vdev_tx_mark_to_fw(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  3155. {
  3156. if (qdf_unlikely(vdev->to_fw))
  3157. QDF_NBUF_CB_TX_PACKET_TO_FW(nbuf) = 1;
  3158. }
  3159. #else
  3160. static inline void dp_vdev_tx_mark_to_fw(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  3161. {
  3162. }
  3163. #endif
  3164. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3165. qdf_nbuf_t nbuf)
  3166. {
  3167. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3168. uint16_t peer_id = HTT_INVALID_PEER;
  3169. /*
  3170. * doing a memzero is causing additional function call overhead
  3171. * so doing static stack clearing
  3172. */
  3173. struct dp_tx_msdu_info_s msdu_info = {0};
  3174. struct dp_vdev *vdev = NULL;
  3175. qdf_nbuf_t end_nbuf = NULL;
  3176. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  3177. return nbuf;
  3178. /*
  3179. * dp_vdev_get_ref_by_id does does a atomic operation avoid using
  3180. * this in per packet path.
  3181. *
  3182. * As in this path vdev memory is already protected with netdev
  3183. * tx lock
  3184. */
  3185. vdev = soc->vdev_id_map[vdev_id];
  3186. if (qdf_unlikely(!vdev))
  3187. return nbuf;
  3188. dp_vdev_tx_mark_to_fw(nbuf, vdev);
  3189. /*
  3190. * Set Default Host TID value to invalid TID
  3191. * (TID override disabled)
  3192. */
  3193. msdu_info.tid = HTT_TX_EXT_TID_INVALID;
  3194. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  3195. if (qdf_unlikely(vdev->mesh_vdev)) {
  3196. qdf_nbuf_t nbuf_mesh = dp_tx_extract_mesh_meta_data(vdev, nbuf,
  3197. &msdu_info);
  3198. if (!nbuf_mesh) {
  3199. dp_verbose_debug("Extracting mesh metadata failed");
  3200. return nbuf;
  3201. }
  3202. nbuf = nbuf_mesh;
  3203. }
  3204. /*
  3205. * Get HW Queue to use for this frame.
  3206. * TCL supports upto 4 DMA rings, out of which 3 rings are
  3207. * dedicated for data and 1 for command.
  3208. * "queue_id" maps to one hardware ring.
  3209. * With each ring, we also associate a unique Tx descriptor pool
  3210. * to minimize lock contention for these resources.
  3211. */
  3212. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  3213. DP_STATS_INC(vdev, tx_i.rcvd_per_core[msdu_info.tx_queue.desc_pool_id],
  3214. 1);
  3215. /*
  3216. * TCL H/W supports 2 DSCP-TID mapping tables.
  3217. * Table 1 - Default DSCP-TID mapping table
  3218. * Table 2 - 1 DSCP-TID override table
  3219. *
  3220. * If we need a different DSCP-TID mapping for this vap,
  3221. * call tid_classify to extract DSCP/ToS from frame and
  3222. * map to a TID and store in msdu_info. This is later used
  3223. * to fill in TCL Input descriptor (per-packet TID override).
  3224. */
  3225. dp_tx_classify_tid(vdev, nbuf, &msdu_info);
  3226. /*
  3227. * Classify the frame and call corresponding
  3228. * "prepare" function which extracts the segment (TSO)
  3229. * and fragmentation information (for TSO , SG, ME, or Raw)
  3230. * into MSDU_INFO structure which is later used to fill
  3231. * SW and HW descriptors.
  3232. */
  3233. if (qdf_nbuf_is_tso(nbuf)) {
  3234. dp_verbose_debug("TSO frame %pK", vdev);
  3235. DP_STATS_INC_PKT(vdev->pdev, tso_stats.num_tso_pkts, 1,
  3236. qdf_nbuf_len(nbuf));
  3237. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  3238. DP_STATS_INC_PKT(vdev->pdev, tso_stats.dropped_host, 1,
  3239. qdf_nbuf_len(nbuf));
  3240. return nbuf;
  3241. }
  3242. DP_STATS_INC(vdev, tx_i.rcvd.num, msdu_info.num_seg - 1);
  3243. goto send_multiple;
  3244. }
  3245. /* SG */
  3246. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  3247. if (qdf_nbuf_get_nr_frags(nbuf) > DP_TX_MAX_NUM_FRAGS - 1) {
  3248. if (qdf_unlikely(qdf_nbuf_linearize(nbuf)))
  3249. return nbuf;
  3250. } else {
  3251. struct dp_tx_seg_info_s seg_info = {0};
  3252. if (qdf_unlikely(is_nbuf_frm_rmnet(nbuf, &msdu_info)))
  3253. goto send_single;
  3254. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info,
  3255. &msdu_info);
  3256. if (!nbuf)
  3257. return NULL;
  3258. dp_verbose_debug("non-TSO SG frame %pK", vdev);
  3259. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  3260. qdf_nbuf_len(nbuf));
  3261. goto send_multiple;
  3262. }
  3263. }
  3264. if (qdf_unlikely(!dp_tx_mcast_enhance(vdev, nbuf)))
  3265. return NULL;
  3266. if (qdf_unlikely(dp_tx_mcast_drop(vdev, nbuf)))
  3267. return nbuf;
  3268. /* RAW */
  3269. if (qdf_unlikely(vdev->tx_encap_type == htt_cmn_pkt_type_raw)) {
  3270. struct dp_tx_seg_info_s seg_info = {0};
  3271. nbuf = dp_tx_prepare_raw(vdev, nbuf, &seg_info, &msdu_info);
  3272. if (!nbuf)
  3273. return NULL;
  3274. dp_verbose_debug("Raw frame %pK", vdev);
  3275. goto send_multiple;
  3276. }
  3277. if (qdf_unlikely(vdev->nawds_enabled)) {
  3278. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  3279. qdf_nbuf_data(nbuf);
  3280. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  3281. uint16_t sa_peer_id = DP_INVALID_PEER;
  3282. if (!soc->ast_offload_support) {
  3283. struct dp_ast_entry *ast_entry = NULL;
  3284. qdf_spin_lock_bh(&soc->ast_lock);
  3285. ast_entry = dp_peer_ast_hash_find_by_pdevid
  3286. (soc,
  3287. (uint8_t *)(eh->ether_shost),
  3288. vdev->pdev->pdev_id);
  3289. if (ast_entry)
  3290. sa_peer_id = ast_entry->peer_id;
  3291. qdf_spin_unlock_bh(&soc->ast_lock);
  3292. }
  3293. dp_tx_nawds_handler(soc, vdev, &msdu_info, nbuf,
  3294. sa_peer_id);
  3295. }
  3296. peer_id = DP_INVALID_PEER;
  3297. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  3298. 1, qdf_nbuf_len(nbuf));
  3299. }
  3300. send_single:
  3301. /* Single linear frame */
  3302. /*
  3303. * If nbuf is a simple linear frame, use send_single function to
  3304. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  3305. * SRNG. There is no need to setup a MSDU extension descriptor.
  3306. */
  3307. dp_tx_prefetch_nbuf_data(nbuf);
  3308. nbuf = dp_tx_send_msdu_single_wrapper(vdev, nbuf, &msdu_info,
  3309. peer_id, end_nbuf);
  3310. return nbuf;
  3311. send_multiple:
  3312. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  3313. if (qdf_unlikely(nbuf && msdu_info.frm_type == dp_tx_frm_raw))
  3314. dp_tx_raw_prepare_unset(vdev->pdev->soc, nbuf);
  3315. return nbuf;
  3316. }
  3317. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc_hdl,
  3318. uint8_t vdev_id, qdf_nbuf_t nbuf)
  3319. {
  3320. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3321. struct dp_vdev *vdev = NULL;
  3322. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  3323. return nbuf;
  3324. /*
  3325. * dp_vdev_get_ref_by_id does does a atomic operation avoid using
  3326. * this in per packet path.
  3327. *
  3328. * As in this path vdev memory is already protected with netdev
  3329. * tx lock
  3330. */
  3331. vdev = soc->vdev_id_map[vdev_id];
  3332. if (qdf_unlikely(!vdev))
  3333. return nbuf;
  3334. if (qdf_unlikely(dp_tx_per_pkt_vdev_id_check(nbuf, vdev)
  3335. == QDF_STATUS_E_FAILURE)) {
  3336. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  3337. return nbuf;
  3338. }
  3339. return dp_tx_send(soc_hdl, vdev_id, nbuf);
  3340. }
  3341. #ifdef UMAC_SUPPORT_PROXY_ARP
  3342. /**
  3343. * dp_tx_proxy_arp() - Tx proxy arp handler
  3344. * @vdev: datapath vdev handle
  3345. * @nbuf: sk buffer
  3346. *
  3347. * Return: status
  3348. */
  3349. int dp_tx_proxy_arp(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  3350. {
  3351. if (vdev->osif_proxy_arp)
  3352. return vdev->osif_proxy_arp(vdev->osif_vdev, nbuf);
  3353. /*
  3354. * when UMAC_SUPPORT_PROXY_ARP is defined, we expect
  3355. * osif_proxy_arp has a valid function pointer assigned
  3356. * to it
  3357. */
  3358. dp_tx_err("valid function pointer for osif_proxy_arp is expected!!\n");
  3359. return QDF_STATUS_NOT_INITIALIZED;
  3360. }
  3361. #else
  3362. int dp_tx_proxy_arp(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  3363. {
  3364. return QDF_STATUS_SUCCESS;
  3365. }
  3366. #endif
  3367. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  3368. !defined(CONFIG_MLO_SINGLE_DEV)
  3369. #ifdef WLAN_MCAST_MLO
  3370. static bool
  3371. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3372. struct dp_tx_desc_s *tx_desc,
  3373. qdf_nbuf_t nbuf,
  3374. uint8_t reinject_reason)
  3375. {
  3376. if (reinject_reason == HTT_TX_FW2WBM_REINJECT_REASON_MLO_MCAST) {
  3377. if (soc->arch_ops.dp_tx_mcast_handler)
  3378. soc->arch_ops.dp_tx_mcast_handler(soc, vdev, nbuf);
  3379. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3380. return true;
  3381. }
  3382. return false;
  3383. }
  3384. #else /* WLAN_MCAST_MLO */
  3385. static inline bool
  3386. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3387. struct dp_tx_desc_s *tx_desc,
  3388. qdf_nbuf_t nbuf,
  3389. uint8_t reinject_reason)
  3390. {
  3391. return false;
  3392. }
  3393. #endif /* WLAN_MCAST_MLO */
  3394. #else
  3395. static inline bool
  3396. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3397. struct dp_tx_desc_s *tx_desc,
  3398. qdf_nbuf_t nbuf,
  3399. uint8_t reinject_reason)
  3400. {
  3401. return false;
  3402. }
  3403. #endif
  3404. void dp_tx_reinject_handler(struct dp_soc *soc,
  3405. struct dp_vdev *vdev,
  3406. struct dp_tx_desc_s *tx_desc,
  3407. uint8_t *status,
  3408. uint8_t reinject_reason)
  3409. {
  3410. struct dp_peer *peer = NULL;
  3411. uint32_t peer_id = HTT_INVALID_PEER;
  3412. qdf_nbuf_t nbuf = tx_desc->nbuf;
  3413. qdf_nbuf_t nbuf_copy = NULL;
  3414. struct dp_tx_msdu_info_s msdu_info;
  3415. #ifdef WDS_VENDOR_EXTENSION
  3416. int is_mcast = 0, is_ucast = 0;
  3417. int num_peers_3addr = 0;
  3418. qdf_ether_header_t *eth_hdr = (qdf_ether_header_t *)(qdf_nbuf_data(nbuf));
  3419. struct ieee80211_frame_addr4 *wh = (struct ieee80211_frame_addr4 *)(qdf_nbuf_data(nbuf));
  3420. #endif
  3421. struct dp_txrx_peer *txrx_peer;
  3422. qdf_assert(vdev);
  3423. dp_tx_debug("Tx reinject path");
  3424. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  3425. qdf_nbuf_len(tx_desc->nbuf));
  3426. if (dp_tx_reinject_mlo_hdl(soc, vdev, tx_desc, nbuf, reinject_reason))
  3427. return;
  3428. #ifdef WDS_VENDOR_EXTENSION
  3429. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  3430. is_mcast = (IS_MULTICAST(wh->i_addr1)) ? 1 : 0;
  3431. } else {
  3432. is_mcast = (IS_MULTICAST(eth_hdr->ether_dhost)) ? 1 : 0;
  3433. }
  3434. is_ucast = !is_mcast;
  3435. qdf_spin_lock_bh(&vdev->peer_list_lock);
  3436. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3437. txrx_peer = dp_get_txrx_peer(peer);
  3438. if (!txrx_peer || txrx_peer->bss_peer)
  3439. continue;
  3440. /* Detect wds peers that use 3-addr framing for mcast.
  3441. * if there are any, the bss_peer is used to send the
  3442. * the mcast frame using 3-addr format. all wds enabled
  3443. * peers that use 4-addr framing for mcast frames will
  3444. * be duplicated and sent as 4-addr frames below.
  3445. */
  3446. if (!txrx_peer->wds_enabled ||
  3447. !txrx_peer->wds_ecm.wds_tx_mcast_4addr) {
  3448. num_peers_3addr = 1;
  3449. break;
  3450. }
  3451. }
  3452. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  3453. #endif
  3454. if (qdf_unlikely(vdev->mesh_vdev)) {
  3455. DP_TX_FREE_SINGLE_BUF(vdev->pdev->soc, tx_desc->nbuf);
  3456. } else {
  3457. qdf_spin_lock_bh(&vdev->peer_list_lock);
  3458. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3459. txrx_peer = dp_get_txrx_peer(peer);
  3460. if (!txrx_peer)
  3461. continue;
  3462. if ((txrx_peer->peer_id != HTT_INVALID_PEER) &&
  3463. #ifdef WDS_VENDOR_EXTENSION
  3464. /*
  3465. * . if 3-addr STA, then send on BSS Peer
  3466. * . if Peer WDS enabled and accept 4-addr mcast,
  3467. * send mcast on that peer only
  3468. * . if Peer WDS enabled and accept 4-addr ucast,
  3469. * send ucast on that peer only
  3470. */
  3471. ((txrx_peer->bss_peer && num_peers_3addr && is_mcast) ||
  3472. (txrx_peer->wds_enabled &&
  3473. ((is_mcast && txrx_peer->wds_ecm.wds_tx_mcast_4addr) ||
  3474. (is_ucast &&
  3475. txrx_peer->wds_ecm.wds_tx_ucast_4addr))))) {
  3476. #else
  3477. (txrx_peer->bss_peer &&
  3478. (dp_tx_proxy_arp(vdev, nbuf) == QDF_STATUS_SUCCESS))) {
  3479. #endif
  3480. peer_id = DP_INVALID_PEER;
  3481. nbuf_copy = qdf_nbuf_copy(nbuf);
  3482. if (!nbuf_copy) {
  3483. dp_tx_debug("nbuf copy failed");
  3484. break;
  3485. }
  3486. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  3487. dp_tx_get_queue(vdev, nbuf,
  3488. &msdu_info.tx_queue);
  3489. nbuf_copy = dp_tx_send_msdu_single(vdev,
  3490. nbuf_copy,
  3491. &msdu_info,
  3492. peer_id,
  3493. NULL);
  3494. if (nbuf_copy) {
  3495. dp_tx_debug("pkt send failed");
  3496. qdf_nbuf_free(nbuf_copy);
  3497. }
  3498. }
  3499. }
  3500. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  3501. qdf_nbuf_unmap_nbytes_single(vdev->osdev, nbuf,
  3502. QDF_DMA_TO_DEVICE, nbuf->len);
  3503. qdf_nbuf_free(nbuf);
  3504. }
  3505. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3506. }
  3507. void dp_tx_inspect_handler(struct dp_soc *soc,
  3508. struct dp_vdev *vdev,
  3509. struct dp_tx_desc_s *tx_desc,
  3510. uint8_t *status)
  3511. {
  3512. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3513. "%s Tx inspect path",
  3514. __func__);
  3515. DP_STATS_INC_PKT(vdev, tx_i.inspect_pkts, 1,
  3516. qdf_nbuf_len(tx_desc->nbuf));
  3517. DP_TX_FREE_SINGLE_BUF(soc, tx_desc->nbuf);
  3518. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3519. }
  3520. #ifdef MESH_MODE_SUPPORT
  3521. /**
  3522. * dp_tx_comp_fill_tx_completion_stats() - Fill per packet Tx completion stats
  3523. * in mesh meta header
  3524. * @tx_desc: software descriptor head pointer
  3525. * @ts: pointer to tx completion stats
  3526. * Return: none
  3527. */
  3528. static
  3529. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  3530. struct hal_tx_completion_status *ts)
  3531. {
  3532. qdf_nbuf_t netbuf = tx_desc->nbuf;
  3533. if (!tx_desc->msdu_ext_desc) {
  3534. if (qdf_nbuf_pull_head(netbuf, tx_desc->pkt_offset) == NULL) {
  3535. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3536. "netbuf %pK offset %d",
  3537. netbuf, tx_desc->pkt_offset);
  3538. return;
  3539. }
  3540. }
  3541. }
  3542. #else
  3543. static
  3544. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  3545. struct hal_tx_completion_status *ts)
  3546. {
  3547. }
  3548. #endif
  3549. #ifdef CONFIG_SAWF
  3550. static void dp_tx_update_peer_sawf_stats(struct dp_soc *soc,
  3551. struct dp_vdev *vdev,
  3552. struct dp_txrx_peer *txrx_peer,
  3553. struct dp_tx_desc_s *tx_desc,
  3554. struct hal_tx_completion_status *ts,
  3555. uint8_t tid)
  3556. {
  3557. dp_sawf_tx_compl_update_peer_stats(soc, vdev, txrx_peer, tx_desc,
  3558. ts, tid);
  3559. }
  3560. static void dp_tx_compute_delay_avg(struct cdp_delay_tx_stats *tx_delay,
  3561. uint32_t nw_delay,
  3562. uint32_t sw_delay,
  3563. uint32_t hw_delay)
  3564. {
  3565. dp_peer_tid_delay_avg(tx_delay,
  3566. nw_delay,
  3567. sw_delay,
  3568. hw_delay);
  3569. }
  3570. #else
  3571. static void dp_tx_update_peer_sawf_stats(struct dp_soc *soc,
  3572. struct dp_vdev *vdev,
  3573. struct dp_txrx_peer *txrx_peer,
  3574. struct dp_tx_desc_s *tx_desc,
  3575. struct hal_tx_completion_status *ts,
  3576. uint8_t tid)
  3577. {
  3578. }
  3579. static inline void
  3580. dp_tx_compute_delay_avg(struct cdp_delay_tx_stats *tx_delay,
  3581. uint32_t nw_delay, uint32_t sw_delay,
  3582. uint32_t hw_delay)
  3583. {
  3584. }
  3585. #endif
  3586. #ifdef QCA_PEER_EXT_STATS
  3587. #ifdef WLAN_CONFIG_TX_DELAY
  3588. static void dp_tx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  3589. struct dp_tx_desc_s *tx_desc,
  3590. struct hal_tx_completion_status *ts,
  3591. struct dp_vdev *vdev)
  3592. {
  3593. struct dp_soc *soc = vdev->pdev->soc;
  3594. struct cdp_delay_tx_stats *tx_delay = &stats->tx_delay;
  3595. int64_t timestamp_ingress, timestamp_hw_enqueue;
  3596. uint32_t sw_enqueue_delay, fwhw_transmit_delay = 0;
  3597. if (!ts->valid)
  3598. return;
  3599. timestamp_ingress = qdf_nbuf_get_timestamp_us(tx_desc->nbuf);
  3600. timestamp_hw_enqueue = qdf_ktime_to_us(tx_desc->timestamp);
  3601. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3602. dp_hist_update_stats(&tx_delay->tx_swq_delay, sw_enqueue_delay);
  3603. if (soc->arch_ops.dp_tx_compute_hw_delay)
  3604. if (!soc->arch_ops.dp_tx_compute_hw_delay(soc, vdev, ts,
  3605. &fwhw_transmit_delay))
  3606. dp_hist_update_stats(&tx_delay->hwtx_delay,
  3607. fwhw_transmit_delay);
  3608. dp_tx_compute_delay_avg(tx_delay, 0, sw_enqueue_delay,
  3609. fwhw_transmit_delay);
  3610. }
  3611. #else
  3612. /**
  3613. * dp_tx_compute_tid_delay() - Compute per TID delay
  3614. * @stats: Per TID delay stats
  3615. * @tx_desc: Software Tx descriptor
  3616. * @ts: Tx completion status
  3617. * @vdev: vdev
  3618. *
  3619. * Compute the software enqueue and hw enqueue delays and
  3620. * update the respective histograms
  3621. *
  3622. * Return: void
  3623. */
  3624. static void dp_tx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  3625. struct dp_tx_desc_s *tx_desc,
  3626. struct hal_tx_completion_status *ts,
  3627. struct dp_vdev *vdev)
  3628. {
  3629. struct cdp_delay_tx_stats *tx_delay = &stats->tx_delay;
  3630. int64_t current_timestamp, timestamp_ingress, timestamp_hw_enqueue;
  3631. uint32_t sw_enqueue_delay, fwhw_transmit_delay;
  3632. current_timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  3633. timestamp_ingress = qdf_nbuf_get_timestamp(tx_desc->nbuf);
  3634. timestamp_hw_enqueue = qdf_ktime_to_ms(tx_desc->timestamp);
  3635. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3636. fwhw_transmit_delay = (uint32_t)(current_timestamp -
  3637. timestamp_hw_enqueue);
  3638. /*
  3639. * Update the Tx software enqueue delay and HW enque-Completion delay.
  3640. */
  3641. dp_hist_update_stats(&tx_delay->tx_swq_delay, sw_enqueue_delay);
  3642. dp_hist_update_stats(&tx_delay->hwtx_delay, fwhw_transmit_delay);
  3643. }
  3644. #endif
  3645. /**
  3646. * dp_tx_update_peer_delay_stats() - Update the peer delay stats
  3647. * @txrx_peer: DP peer context
  3648. * @tx_desc: Tx software descriptor
  3649. * @ts: Tx completion status
  3650. * @ring_id: Rx CPU context ID/CPU_ID
  3651. *
  3652. * Update the peer extended stats. These are enhanced other
  3653. * delay stats per msdu level.
  3654. *
  3655. * Return: void
  3656. */
  3657. static void dp_tx_update_peer_delay_stats(struct dp_txrx_peer *txrx_peer,
  3658. struct dp_tx_desc_s *tx_desc,
  3659. struct hal_tx_completion_status *ts,
  3660. uint8_t ring_id)
  3661. {
  3662. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  3663. struct dp_soc *soc = NULL;
  3664. struct dp_peer_delay_stats *delay_stats = NULL;
  3665. uint8_t tid;
  3666. soc = pdev->soc;
  3667. if (qdf_likely(!wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx)))
  3668. return;
  3669. if (!txrx_peer->delay_stats)
  3670. return;
  3671. tid = ts->tid;
  3672. delay_stats = txrx_peer->delay_stats;
  3673. qdf_assert(ring < CDP_MAX_TXRX_CTX);
  3674. /*
  3675. * For non-TID packets use the TID 9
  3676. */
  3677. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  3678. tid = CDP_MAX_DATA_TIDS - 1;
  3679. dp_tx_compute_tid_delay(&delay_stats->delay_tid_stats[tid][ring_id],
  3680. tx_desc, ts, txrx_peer->vdev);
  3681. }
  3682. #else
  3683. static inline
  3684. void dp_tx_update_peer_delay_stats(struct dp_txrx_peer *txrx_peer,
  3685. struct dp_tx_desc_s *tx_desc,
  3686. struct hal_tx_completion_status *ts,
  3687. uint8_t ring_id)
  3688. {
  3689. }
  3690. #endif
  3691. #ifdef WLAN_PEER_JITTER
  3692. /**
  3693. * dp_tx_jitter_get_avg_jitter() - compute the average jitter
  3694. * @curr_delay: Current delay
  3695. * @prev_delay: Previous delay
  3696. * @avg_jitter: Average Jitter
  3697. * Return: Newly Computed Average Jitter
  3698. */
  3699. static uint32_t dp_tx_jitter_get_avg_jitter(uint32_t curr_delay,
  3700. uint32_t prev_delay,
  3701. uint32_t avg_jitter)
  3702. {
  3703. uint32_t curr_jitter;
  3704. int32_t jitter_diff;
  3705. curr_jitter = qdf_abs(curr_delay - prev_delay);
  3706. if (!avg_jitter)
  3707. return curr_jitter;
  3708. jitter_diff = curr_jitter - avg_jitter;
  3709. if (jitter_diff < 0)
  3710. avg_jitter = avg_jitter -
  3711. (qdf_abs(jitter_diff) >> DP_AVG_JITTER_WEIGHT_DENOM);
  3712. else
  3713. avg_jitter = avg_jitter +
  3714. (qdf_abs(jitter_diff) >> DP_AVG_JITTER_WEIGHT_DENOM);
  3715. return avg_jitter;
  3716. }
  3717. /**
  3718. * dp_tx_jitter_get_avg_delay() - compute the average delay
  3719. * @curr_delay: Current delay
  3720. * @avg_delay: Average delay
  3721. * Return: Newly Computed Average Delay
  3722. */
  3723. static uint32_t dp_tx_jitter_get_avg_delay(uint32_t curr_delay,
  3724. uint32_t avg_delay)
  3725. {
  3726. int32_t delay_diff;
  3727. if (!avg_delay)
  3728. return curr_delay;
  3729. delay_diff = curr_delay - avg_delay;
  3730. if (delay_diff < 0)
  3731. avg_delay = avg_delay - (qdf_abs(delay_diff) >>
  3732. DP_AVG_DELAY_WEIGHT_DENOM);
  3733. else
  3734. avg_delay = avg_delay + (qdf_abs(delay_diff) >>
  3735. DP_AVG_DELAY_WEIGHT_DENOM);
  3736. return avg_delay;
  3737. }
  3738. #ifdef WLAN_CONFIG_TX_DELAY
  3739. /**
  3740. * dp_tx_compute_cur_delay() - get the current delay
  3741. * @soc: soc handle
  3742. * @vdev: vdev structure for data path state
  3743. * @ts: Tx completion status
  3744. * @curr_delay: current delay
  3745. * @tx_desc: tx descriptor
  3746. * Return: void
  3747. */
  3748. static
  3749. QDF_STATUS dp_tx_compute_cur_delay(struct dp_soc *soc,
  3750. struct dp_vdev *vdev,
  3751. struct hal_tx_completion_status *ts,
  3752. uint32_t *curr_delay,
  3753. struct dp_tx_desc_s *tx_desc)
  3754. {
  3755. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  3756. if (soc->arch_ops.dp_tx_compute_hw_delay)
  3757. status = soc->arch_ops.dp_tx_compute_hw_delay(soc, vdev, ts,
  3758. curr_delay);
  3759. return status;
  3760. }
  3761. #else
  3762. static
  3763. QDF_STATUS dp_tx_compute_cur_delay(struct dp_soc *soc,
  3764. struct dp_vdev *vdev,
  3765. struct hal_tx_completion_status *ts,
  3766. uint32_t *curr_delay,
  3767. struct dp_tx_desc_s *tx_desc)
  3768. {
  3769. int64_t current_timestamp, timestamp_hw_enqueue;
  3770. current_timestamp = qdf_ktime_to_us(qdf_ktime_real_get());
  3771. timestamp_hw_enqueue = qdf_ktime_to_us(tx_desc->timestamp);
  3772. *curr_delay = (uint32_t)(current_timestamp - timestamp_hw_enqueue);
  3773. return QDF_STATUS_SUCCESS;
  3774. }
  3775. #endif
  3776. /**
  3777. * dp_tx_compute_tid_jitter() - compute per tid per ring jitter
  3778. * @jitter: per tid per ring jitter stats
  3779. * @ts: Tx completion status
  3780. * @vdev: vdev structure for data path state
  3781. * @tx_desc: tx descriptor
  3782. * Return: void
  3783. */
  3784. static void dp_tx_compute_tid_jitter(struct cdp_peer_tid_stats *jitter,
  3785. struct hal_tx_completion_status *ts,
  3786. struct dp_vdev *vdev,
  3787. struct dp_tx_desc_s *tx_desc)
  3788. {
  3789. uint32_t curr_delay, avg_delay, avg_jitter, prev_delay;
  3790. struct dp_soc *soc = vdev->pdev->soc;
  3791. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  3792. if (ts->status != HAL_TX_TQM_RR_FRAME_ACKED) {
  3793. jitter->tx_drop += 1;
  3794. return;
  3795. }
  3796. status = dp_tx_compute_cur_delay(soc, vdev, ts, &curr_delay,
  3797. tx_desc);
  3798. if (QDF_IS_STATUS_SUCCESS(status)) {
  3799. avg_delay = jitter->tx_avg_delay;
  3800. avg_jitter = jitter->tx_avg_jitter;
  3801. prev_delay = jitter->tx_prev_delay;
  3802. avg_jitter = dp_tx_jitter_get_avg_jitter(curr_delay,
  3803. prev_delay,
  3804. avg_jitter);
  3805. avg_delay = dp_tx_jitter_get_avg_delay(curr_delay, avg_delay);
  3806. jitter->tx_avg_delay = avg_delay;
  3807. jitter->tx_avg_jitter = avg_jitter;
  3808. jitter->tx_prev_delay = curr_delay;
  3809. jitter->tx_total_success += 1;
  3810. } else if (status == QDF_STATUS_E_FAILURE) {
  3811. jitter->tx_avg_err += 1;
  3812. }
  3813. }
  3814. /* dp_tx_update_peer_jitter_stats() - Update the peer jitter stats
  3815. * @txrx_peer: DP peer context
  3816. * @tx_desc: Tx software descriptor
  3817. * @ts: Tx completion status
  3818. * @ring_id: Rx CPU context ID/CPU_ID
  3819. * Return: void
  3820. */
  3821. static void dp_tx_update_peer_jitter_stats(struct dp_txrx_peer *txrx_peer,
  3822. struct dp_tx_desc_s *tx_desc,
  3823. struct hal_tx_completion_status *ts,
  3824. uint8_t ring_id)
  3825. {
  3826. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  3827. struct dp_soc *soc = pdev->soc;
  3828. struct cdp_peer_tid_stats *jitter_stats = NULL;
  3829. uint8_t tid;
  3830. struct cdp_peer_tid_stats *rx_tid = NULL;
  3831. if (qdf_likely(!wlan_cfg_is_peer_jitter_stats_enabled(soc->wlan_cfg_ctx)))
  3832. return;
  3833. tid = ts->tid;
  3834. jitter_stats = txrx_peer->jitter_stats;
  3835. qdf_assert_always(jitter_stats);
  3836. qdf_assert(ring < CDP_MAX_TXRX_CTX);
  3837. /*
  3838. * For non-TID packets use the TID 9
  3839. */
  3840. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  3841. tid = CDP_MAX_DATA_TIDS - 1;
  3842. rx_tid = &jitter_stats[tid * CDP_MAX_TXRX_CTX + ring_id];
  3843. dp_tx_compute_tid_jitter(rx_tid,
  3844. ts, txrx_peer->vdev, tx_desc);
  3845. }
  3846. #else
  3847. static void dp_tx_update_peer_jitter_stats(struct dp_txrx_peer *txrx_peer,
  3848. struct dp_tx_desc_s *tx_desc,
  3849. struct hal_tx_completion_status *ts,
  3850. uint8_t ring_id)
  3851. {
  3852. }
  3853. #endif
  3854. #ifdef HW_TX_DELAY_STATS_ENABLE
  3855. /**
  3856. * dp_update_tx_delay_stats() - update the delay stats
  3857. * @vdev: vdev handle
  3858. * @delay: delay in ms or us based on the flag delay_in_us
  3859. * @tid: tid value
  3860. * @mode: type of tx delay mode
  3861. * @ring_id: ring number
  3862. * @delay_in_us: flag to indicate whether the delay is in ms or us
  3863. *
  3864. * Return: none
  3865. */
  3866. static inline
  3867. void dp_update_tx_delay_stats(struct dp_vdev *vdev, uint32_t delay, uint8_t tid,
  3868. uint8_t mode, uint8_t ring_id, bool delay_in_us)
  3869. {
  3870. struct cdp_tid_tx_stats *tstats =
  3871. &vdev->stats.tid_tx_stats[ring_id][tid];
  3872. dp_update_delay_stats(tstats, NULL, delay, tid, mode, ring_id,
  3873. delay_in_us);
  3874. }
  3875. #else
  3876. static inline
  3877. void dp_update_tx_delay_stats(struct dp_vdev *vdev, uint32_t delay, uint8_t tid,
  3878. uint8_t mode, uint8_t ring_id, bool delay_in_us)
  3879. {
  3880. struct cdp_tid_tx_stats *tstats =
  3881. &vdev->pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  3882. dp_update_delay_stats(tstats, NULL, delay, tid, mode, ring_id,
  3883. delay_in_us);
  3884. }
  3885. #endif
  3886. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  3887. uint8_t tid, uint8_t ring_id)
  3888. {
  3889. int64_t current_timestamp, timestamp_ingress, timestamp_hw_enqueue;
  3890. uint32_t sw_enqueue_delay, fwhw_transmit_delay, interframe_delay;
  3891. uint32_t fwhw_transmit_delay_us;
  3892. if (qdf_likely(!vdev->pdev->delay_stats_flag) &&
  3893. qdf_likely(!dp_is_vdev_tx_delay_stats_enabled(vdev)))
  3894. return;
  3895. if (dp_is_vdev_tx_delay_stats_enabled(vdev)) {
  3896. fwhw_transmit_delay_us =
  3897. qdf_ktime_to_us(qdf_ktime_real_get()) -
  3898. qdf_ktime_to_us(tx_desc->timestamp);
  3899. /*
  3900. * Delay between packet enqueued to HW and Tx completion in us
  3901. */
  3902. dp_update_tx_delay_stats(vdev, fwhw_transmit_delay_us, tid,
  3903. CDP_DELAY_STATS_FW_HW_TRANSMIT,
  3904. ring_id, true);
  3905. /*
  3906. * For MCL, only enqueue to completion delay is required
  3907. * so return if the vdev flag is enabled.
  3908. */
  3909. return;
  3910. }
  3911. current_timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  3912. timestamp_hw_enqueue = qdf_ktime_to_ms(tx_desc->timestamp);
  3913. fwhw_transmit_delay = (uint32_t)(current_timestamp -
  3914. timestamp_hw_enqueue);
  3915. if (!timestamp_hw_enqueue)
  3916. return;
  3917. /*
  3918. * Delay between packet enqueued to HW and Tx completion in ms
  3919. */
  3920. dp_update_tx_delay_stats(vdev, fwhw_transmit_delay, tid,
  3921. CDP_DELAY_STATS_FW_HW_TRANSMIT, ring_id,
  3922. false);
  3923. timestamp_ingress = qdf_nbuf_get_timestamp(tx_desc->nbuf);
  3924. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3925. interframe_delay = (uint32_t)(timestamp_ingress -
  3926. vdev->prev_tx_enq_tstamp);
  3927. /*
  3928. * Delay in software enqueue
  3929. */
  3930. dp_update_tx_delay_stats(vdev, sw_enqueue_delay, tid,
  3931. CDP_DELAY_STATS_SW_ENQ, ring_id,
  3932. false);
  3933. /*
  3934. * Update interframe delay stats calculated at hardstart receive point.
  3935. * Value of vdev->prev_tx_enq_tstamp will be 0 for 1st frame, so
  3936. * interframe delay will not be calculate correctly for 1st frame.
  3937. * On the other side, this will help in avoiding extra per packet check
  3938. * of !vdev->prev_tx_enq_tstamp.
  3939. */
  3940. dp_update_tx_delay_stats(vdev, interframe_delay, tid,
  3941. CDP_DELAY_STATS_TX_INTERFRAME, ring_id,
  3942. false);
  3943. vdev->prev_tx_enq_tstamp = timestamp_ingress;
  3944. }
  3945. #ifdef DISABLE_DP_STATS
  3946. static
  3947. inline void dp_update_no_ack_stats(qdf_nbuf_t nbuf,
  3948. struct dp_txrx_peer *txrx_peer,
  3949. uint8_t link_id)
  3950. {
  3951. }
  3952. #else
  3953. static inline void
  3954. dp_update_no_ack_stats(qdf_nbuf_t nbuf, struct dp_txrx_peer *txrx_peer,
  3955. uint8_t link_id)
  3956. {
  3957. enum qdf_proto_subtype subtype = QDF_PROTO_INVALID;
  3958. DPTRACE(qdf_dp_track_noack_check(nbuf, &subtype));
  3959. if (subtype != QDF_PROTO_INVALID)
  3960. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.no_ack_count[subtype],
  3961. 1, link_id);
  3962. }
  3963. #endif
  3964. #ifndef QCA_ENHANCED_STATS_SUPPORT
  3965. #ifdef DP_PEER_EXTENDED_API
  3966. static inline uint8_t
  3967. dp_tx_get_mpdu_retry_threshold(struct dp_txrx_peer *txrx_peer)
  3968. {
  3969. return txrx_peer->mpdu_retry_threshold;
  3970. }
  3971. #else
  3972. static inline uint8_t
  3973. dp_tx_get_mpdu_retry_threshold(struct dp_txrx_peer *txrx_peer)
  3974. {
  3975. return 0;
  3976. }
  3977. #endif
  3978. /**
  3979. * dp_tx_update_peer_extd_stats()- Update Tx extended path stats for peer
  3980. *
  3981. * @ts: Tx compltion status
  3982. * @txrx_peer: datapath txrx_peer handle
  3983. * @link_id: Link id
  3984. *
  3985. * Return: void
  3986. */
  3987. static inline void
  3988. dp_tx_update_peer_extd_stats(struct hal_tx_completion_status *ts,
  3989. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  3990. {
  3991. uint8_t mcs, pkt_type, dst_mcs_idx;
  3992. uint8_t retry_threshold = dp_tx_get_mpdu_retry_threshold(txrx_peer);
  3993. mcs = ts->mcs;
  3994. pkt_type = ts->pkt_type;
  3995. /* do HW to SW pkt type conversion */
  3996. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  3997. hal_2_dp_pkt_type_map[pkt_type]);
  3998. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  3999. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  4000. DP_PEER_EXTD_STATS_INC(txrx_peer,
  4001. tx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  4002. 1, link_id);
  4003. DP_PEER_EXTD_STATS_INC(txrx_peer, tx.sgi_count[ts->sgi], 1, link_id);
  4004. DP_PEER_EXTD_STATS_INC(txrx_peer, tx.bw[ts->bw], 1, link_id);
  4005. DP_PEER_EXTD_STATS_UPD(txrx_peer, tx.last_ack_rssi, ts->ack_frame_rssi,
  4006. link_id);
  4007. DP_PEER_EXTD_STATS_INC(txrx_peer,
  4008. tx.wme_ac_type[TID_TO_WME_AC(ts->tid)], 1,
  4009. link_id);
  4010. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.stbc, 1, ts->stbc, link_id);
  4011. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.ldpc, 1, ts->ldpc, link_id);
  4012. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.retries, 1, ts->transmit_cnt > 1,
  4013. link_id);
  4014. if (ts->first_msdu) {
  4015. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.retries_mpdu, 1,
  4016. ts->transmit_cnt > 1, link_id);
  4017. if (!retry_threshold)
  4018. return;
  4019. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.mpdu_success_with_retries,
  4020. qdf_do_div(ts->transmit_cnt,
  4021. retry_threshold),
  4022. ts->transmit_cnt > retry_threshold,
  4023. link_id);
  4024. }
  4025. }
  4026. #else
  4027. static inline void
  4028. dp_tx_update_peer_extd_stats(struct hal_tx_completion_status *ts,
  4029. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  4030. {
  4031. }
  4032. #endif
  4033. #if defined(WLAN_FEATURE_11BE_MLO) && \
  4034. (defined(QCA_ENHANCED_STATS_SUPPORT) || \
  4035. defined(DP_MLO_LINK_STATS_SUPPORT))
  4036. static inline uint8_t
  4037. dp_tx_get_link_id_from_ppdu_id(struct dp_soc *soc,
  4038. struct hal_tx_completion_status *ts,
  4039. struct dp_txrx_peer *txrx_peer,
  4040. struct dp_vdev *vdev)
  4041. {
  4042. uint8_t hw_link_id = 0;
  4043. uint32_t ppdu_id;
  4044. uint8_t link_id_offset, link_id_bits;
  4045. if (!txrx_peer->is_mld_peer || !vdev->pdev->link_peer_stats)
  4046. return 0;
  4047. link_id_offset = soc->link_id_offset;
  4048. link_id_bits = soc->link_id_bits;
  4049. ppdu_id = ts->ppdu_id;
  4050. hw_link_id = ((DP_GET_HW_LINK_ID_FRM_PPDU_ID(ppdu_id, link_id_offset,
  4051. link_id_bits)) + 1);
  4052. if (hw_link_id > DP_MAX_MLO_LINKS) {
  4053. hw_link_id = 0;
  4054. DP_PEER_PER_PKT_STATS_INC(
  4055. txrx_peer,
  4056. tx.inval_link_id_pkt_cnt, 1, hw_link_id);
  4057. }
  4058. return hw_link_id;
  4059. }
  4060. #else
  4061. static inline uint8_t
  4062. dp_tx_get_link_id_from_ppdu_id(struct dp_soc *soc,
  4063. struct hal_tx_completion_status *ts,
  4064. struct dp_txrx_peer *txrx_peer,
  4065. struct dp_vdev *vdev)
  4066. {
  4067. return 0;
  4068. }
  4069. #endif
  4070. /**
  4071. * dp_tx_update_peer_stats() - Update peer stats from Tx completion indications
  4072. * per wbm ring
  4073. *
  4074. * @tx_desc: software descriptor head pointer
  4075. * @ts: Tx completion status
  4076. * @txrx_peer: peer handle
  4077. * @ring_id: ring number
  4078. * @link_id: Link id
  4079. *
  4080. * Return: None
  4081. */
  4082. static inline void
  4083. dp_tx_update_peer_stats(struct dp_tx_desc_s *tx_desc,
  4084. struct hal_tx_completion_status *ts,
  4085. struct dp_txrx_peer *txrx_peer, uint8_t ring_id,
  4086. uint8_t link_id)
  4087. {
  4088. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  4089. uint8_t tid = ts->tid;
  4090. uint32_t length;
  4091. struct cdp_tid_tx_stats *tid_stats;
  4092. if (!pdev)
  4093. return;
  4094. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  4095. tid = CDP_MAX_DATA_TIDS - 1;
  4096. tid_stats = &pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  4097. if (ts->release_src != HAL_TX_COMP_RELEASE_SOURCE_TQM) {
  4098. dp_err_rl("Release source:%d is not from TQM", ts->release_src);
  4099. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.release_src_not_tqm, 1,
  4100. link_id);
  4101. return;
  4102. }
  4103. length = qdf_nbuf_len(tx_desc->nbuf);
  4104. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4105. if (qdf_unlikely(pdev->delay_stats_flag) ||
  4106. qdf_unlikely(dp_is_vdev_tx_delay_stats_enabled(txrx_peer->vdev)))
  4107. dp_tx_compute_delay(txrx_peer->vdev, tx_desc, tid, ring_id);
  4108. if (ts->status < CDP_MAX_TX_TQM_STATUS) {
  4109. tid_stats->tqm_status_cnt[ts->status]++;
  4110. }
  4111. if (qdf_likely(ts->status == HAL_TX_TQM_RR_FRAME_ACKED)) {
  4112. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.retry_count, 1,
  4113. ts->transmit_cnt > 1, link_id);
  4114. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.multiple_retry_count,
  4115. 1, ts->transmit_cnt > 2, link_id);
  4116. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.ofdma, 1, ts->ofdma,
  4117. link_id);
  4118. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.amsdu_cnt, 1,
  4119. ts->msdu_part_of_amsdu, link_id);
  4120. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.non_amsdu_cnt, 1,
  4121. !ts->msdu_part_of_amsdu, link_id);
  4122. txrx_peer->stats[link_id].per_pkt_stats.tx.last_tx_ts =
  4123. qdf_system_ticks();
  4124. dp_tx_update_peer_extd_stats(ts, txrx_peer, link_id);
  4125. return;
  4126. }
  4127. /*
  4128. * tx_failed is ideally supposed to be updated from HTT ppdu
  4129. * completion stats. But in IPQ807X/IPQ6018 chipsets owing to
  4130. * hw limitation there are no completions for failed cases.
  4131. * Hence updating tx_failed from data path. Please note that
  4132. * if tx_failed is fixed to be from ppdu, then this has to be
  4133. * removed
  4134. */
  4135. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4136. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.failed_retry_count, 1,
  4137. ts->transmit_cnt > DP_RETRY_COUNT,
  4138. link_id);
  4139. dp_update_no_ack_stats(tx_desc->nbuf, txrx_peer, link_id);
  4140. if (ts->status == HAL_TX_TQM_RR_REM_CMD_AGED) {
  4141. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.age_out, 1,
  4142. link_id);
  4143. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_REM) {
  4144. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.dropped.fw_rem, 1,
  4145. length, link_id);
  4146. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_NOTX) {
  4147. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_rem_notx, 1,
  4148. link_id);
  4149. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_TX) {
  4150. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_rem_tx, 1,
  4151. link_id);
  4152. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON1) {
  4153. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason1, 1,
  4154. link_id);
  4155. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON2) {
  4156. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason2, 1,
  4157. link_id);
  4158. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON3) {
  4159. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason3, 1,
  4160. link_id);
  4161. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_DISABLE_QUEUE) {
  4162. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4163. tx.dropped.fw_rem_queue_disable, 1,
  4164. link_id);
  4165. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_TILL_NONMATCHING) {
  4166. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4167. tx.dropped.fw_rem_no_match, 1,
  4168. link_id);
  4169. } else if (ts->status == HAL_TX_TQM_RR_DROP_THRESHOLD) {
  4170. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4171. tx.dropped.drop_threshold, 1,
  4172. link_id);
  4173. } else if (ts->status == HAL_TX_TQM_RR_LINK_DESC_UNAVAILABLE) {
  4174. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4175. tx.dropped.drop_link_desc_na, 1,
  4176. link_id);
  4177. } else if (ts->status == HAL_TX_TQM_RR_DROP_OR_INVALID_MSDU) {
  4178. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4179. tx.dropped.invalid_drop, 1,
  4180. link_id);
  4181. } else if (ts->status == HAL_TX_TQM_RR_MULTICAST_DROP) {
  4182. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4183. tx.dropped.mcast_vdev_drop, 1,
  4184. link_id);
  4185. } else {
  4186. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.invalid_rr, 1,
  4187. link_id);
  4188. }
  4189. }
  4190. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  4191. /**
  4192. * dp_tx_flow_pool_lock() - take flow pool lock
  4193. * @soc: core txrx main context
  4194. * @tx_desc: tx desc
  4195. *
  4196. * Return: None
  4197. */
  4198. static inline
  4199. void dp_tx_flow_pool_lock(struct dp_soc *soc,
  4200. struct dp_tx_desc_s *tx_desc)
  4201. {
  4202. struct dp_tx_desc_pool_s *pool;
  4203. uint8_t desc_pool_id;
  4204. desc_pool_id = tx_desc->pool_id;
  4205. pool = &soc->tx_desc[desc_pool_id];
  4206. qdf_spin_lock_bh(&pool->flow_pool_lock);
  4207. }
  4208. /**
  4209. * dp_tx_flow_pool_unlock() - release flow pool lock
  4210. * @soc: core txrx main context
  4211. * @tx_desc: tx desc
  4212. *
  4213. * Return: None
  4214. */
  4215. static inline
  4216. void dp_tx_flow_pool_unlock(struct dp_soc *soc,
  4217. struct dp_tx_desc_s *tx_desc)
  4218. {
  4219. struct dp_tx_desc_pool_s *pool;
  4220. uint8_t desc_pool_id;
  4221. desc_pool_id = tx_desc->pool_id;
  4222. pool = &soc->tx_desc[desc_pool_id];
  4223. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  4224. }
  4225. #else
  4226. static inline
  4227. void dp_tx_flow_pool_lock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  4228. {
  4229. }
  4230. static inline
  4231. void dp_tx_flow_pool_unlock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  4232. {
  4233. }
  4234. #endif
  4235. /**
  4236. * dp_tx_notify_completion() - Notify tx completion for this desc
  4237. * @soc: core txrx main context
  4238. * @vdev: datapath vdev handle
  4239. * @tx_desc: tx desc
  4240. * @netbuf: buffer
  4241. * @status: tx status
  4242. *
  4243. * Return: none
  4244. */
  4245. static inline void dp_tx_notify_completion(struct dp_soc *soc,
  4246. struct dp_vdev *vdev,
  4247. struct dp_tx_desc_s *tx_desc,
  4248. qdf_nbuf_t netbuf,
  4249. uint8_t status)
  4250. {
  4251. void *osif_dev;
  4252. ol_txrx_completion_fp tx_compl_cbk = NULL;
  4253. uint16_t flag = BIT(QDF_TX_RX_STATUS_DOWNLOAD_SUCC);
  4254. qdf_assert(tx_desc);
  4255. if (!vdev ||
  4256. !vdev->osif_vdev) {
  4257. return;
  4258. }
  4259. osif_dev = vdev->osif_vdev;
  4260. tx_compl_cbk = vdev->tx_comp;
  4261. if (status == HAL_TX_TQM_RR_FRAME_ACKED)
  4262. flag |= BIT(QDF_TX_RX_STATUS_OK);
  4263. if (tx_compl_cbk)
  4264. tx_compl_cbk(netbuf, osif_dev, flag);
  4265. }
  4266. /**
  4267. * dp_tx_sojourn_stats_process() - Collect sojourn stats
  4268. * @pdev: pdev handle
  4269. * @txrx_peer: DP peer context
  4270. * @tid: tid value
  4271. * @txdesc_ts: timestamp from txdesc
  4272. * @ppdu_id: ppdu id
  4273. * @link_id: link id
  4274. *
  4275. * Return: none
  4276. */
  4277. #ifdef FEATURE_PERPKT_INFO
  4278. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  4279. struct dp_txrx_peer *txrx_peer,
  4280. uint8_t tid,
  4281. uint64_t txdesc_ts,
  4282. uint32_t ppdu_id,
  4283. uint8_t link_id)
  4284. {
  4285. uint64_t delta_ms;
  4286. struct cdp_tx_sojourn_stats *sojourn_stats;
  4287. struct dp_peer *primary_link_peer = NULL;
  4288. struct dp_soc *link_peer_soc = NULL;
  4289. if (qdf_unlikely(!pdev->enhanced_stats_en))
  4290. return;
  4291. if (qdf_unlikely(tid == HTT_INVALID_TID ||
  4292. tid >= CDP_DATA_TID_MAX))
  4293. return;
  4294. if (qdf_unlikely(!pdev->sojourn_buf))
  4295. return;
  4296. primary_link_peer = dp_get_primary_link_peer_by_id(pdev->soc,
  4297. txrx_peer->peer_id,
  4298. DP_MOD_ID_TX_COMP);
  4299. if (qdf_unlikely(!primary_link_peer))
  4300. return;
  4301. sojourn_stats = (struct cdp_tx_sojourn_stats *)
  4302. qdf_nbuf_data(pdev->sojourn_buf);
  4303. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  4304. sojourn_stats->cookie = (void *)
  4305. dp_monitor_peer_get_peerstats_ctx(link_peer_soc,
  4306. primary_link_peer);
  4307. delta_ms = qdf_ktime_to_ms(qdf_ktime_real_get()) -
  4308. txdesc_ts;
  4309. qdf_ewma_tx_lag_add(&txrx_peer->stats[link_id].per_pkt_stats.tx.avg_sojourn_msdu[tid],
  4310. delta_ms);
  4311. sojourn_stats->sum_sojourn_msdu[tid] = delta_ms;
  4312. sojourn_stats->num_msdus[tid] = 1;
  4313. sojourn_stats->avg_sojourn_msdu[tid].internal =
  4314. txrx_peer->stats[link_id].
  4315. per_pkt_stats.tx.avg_sojourn_msdu[tid].internal;
  4316. dp_wdi_event_handler(WDI_EVENT_TX_SOJOURN_STAT, pdev->soc,
  4317. pdev->sojourn_buf, HTT_INVALID_PEER,
  4318. WDI_NO_VAL, pdev->pdev_id);
  4319. sojourn_stats->sum_sojourn_msdu[tid] = 0;
  4320. sojourn_stats->num_msdus[tid] = 0;
  4321. sojourn_stats->avg_sojourn_msdu[tid].internal = 0;
  4322. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_TX_COMP);
  4323. }
  4324. #else
  4325. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  4326. struct dp_txrx_peer *txrx_peer,
  4327. uint8_t tid,
  4328. uint64_t txdesc_ts,
  4329. uint32_t ppdu_id)
  4330. {
  4331. }
  4332. #endif
  4333. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  4334. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  4335. struct dp_tx_desc_s *desc,
  4336. struct hal_tx_completion_status *ts)
  4337. {
  4338. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_TX_DATA, soc,
  4339. desc, ts->peer_id,
  4340. WDI_NO_VAL, desc->pdev->pdev_id);
  4341. }
  4342. #endif
  4343. void
  4344. dp_tx_comp_process_desc(struct dp_soc *soc,
  4345. struct dp_tx_desc_s *desc,
  4346. struct hal_tx_completion_status *ts,
  4347. struct dp_txrx_peer *txrx_peer)
  4348. {
  4349. uint64_t time_latency = 0;
  4350. uint16_t peer_id = DP_INVALID_PEER_ID;
  4351. /*
  4352. * m_copy/tx_capture modes are not supported for
  4353. * scatter gather packets
  4354. */
  4355. if (qdf_unlikely(!!desc->pdev->latency_capture_enable)) {
  4356. time_latency = (qdf_ktime_to_ms(qdf_ktime_real_get()) -
  4357. qdf_ktime_to_ms(desc->timestamp));
  4358. }
  4359. dp_send_completion_to_pkt_capture(soc, desc, ts);
  4360. if (dp_tx_pkt_tracepoints_enabled())
  4361. qdf_trace_dp_packet(desc->nbuf, QDF_TX,
  4362. desc->msdu_ext_desc ?
  4363. desc->msdu_ext_desc->tso_desc : NULL,
  4364. qdf_ktime_to_us(desc->timestamp));
  4365. if (!(desc->msdu_ext_desc)) {
  4366. dp_tx_enh_unmap(soc, desc);
  4367. if (txrx_peer)
  4368. peer_id = txrx_peer->peer_id;
  4369. if (QDF_STATUS_SUCCESS ==
  4370. dp_monitor_tx_add_to_comp_queue(soc, desc, ts, peer_id)) {
  4371. return;
  4372. }
  4373. if (QDF_STATUS_SUCCESS ==
  4374. dp_get_completion_indication_for_stack(soc,
  4375. desc->pdev,
  4376. txrx_peer, ts,
  4377. desc->nbuf,
  4378. time_latency)) {
  4379. dp_send_completion_to_stack(soc,
  4380. desc->pdev,
  4381. ts->peer_id,
  4382. ts->ppdu_id,
  4383. desc->nbuf);
  4384. return;
  4385. }
  4386. }
  4387. desc->flags |= DP_TX_DESC_FLAG_COMPLETED_TX;
  4388. dp_tx_comp_free_buf(soc, desc, false);
  4389. }
  4390. #ifdef DISABLE_DP_STATS
  4391. /**
  4392. * dp_tx_update_connectivity_stats() - update tx connectivity stats
  4393. * @soc: core txrx main context
  4394. * @vdev: virtual device instance
  4395. * @tx_desc: tx desc
  4396. * @status: tx status
  4397. *
  4398. * Return: none
  4399. */
  4400. static inline
  4401. void dp_tx_update_connectivity_stats(struct dp_soc *soc,
  4402. struct dp_vdev *vdev,
  4403. struct dp_tx_desc_s *tx_desc,
  4404. uint8_t status)
  4405. {
  4406. }
  4407. #else
  4408. static inline
  4409. void dp_tx_update_connectivity_stats(struct dp_soc *soc,
  4410. struct dp_vdev *vdev,
  4411. struct dp_tx_desc_s *tx_desc,
  4412. uint8_t status)
  4413. {
  4414. void *osif_dev;
  4415. ol_txrx_stats_rx_fp stats_cbk;
  4416. uint8_t pkt_type;
  4417. qdf_assert(tx_desc);
  4418. if (!vdev ||
  4419. !vdev->osif_vdev ||
  4420. !vdev->stats_cb)
  4421. return;
  4422. osif_dev = vdev->osif_vdev;
  4423. stats_cbk = vdev->stats_cb;
  4424. stats_cbk(tx_desc->nbuf, osif_dev, PKT_TYPE_TX_HOST_FW_SENT, &pkt_type);
  4425. if (status == HAL_TX_TQM_RR_FRAME_ACKED)
  4426. stats_cbk(tx_desc->nbuf, osif_dev, PKT_TYPE_TX_ACK_CNT,
  4427. &pkt_type);
  4428. }
  4429. #endif
  4430. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(WLAN_CONFIG_TX_DELAY)
  4431. /* Mask for bit29 ~ bit31 */
  4432. #define DP_TX_TS_BIT29_31_MASK 0xE0000000
  4433. /* Timestamp value (unit us) if bit29 is set */
  4434. #define DP_TX_TS_BIT29_SET_VALUE BIT(29)
  4435. /**
  4436. * dp_tx_adjust_enqueue_buffer_ts() - adjust the enqueue buffer_timestamp
  4437. * @ack_ts: OTA ack timestamp, unit us.
  4438. * @enqueue_ts: TCL enqueue TX data to TQM timestamp, unit us.
  4439. * @base_delta_ts: base timestamp delta for ack_ts and enqueue_ts
  4440. *
  4441. * this function will restore the bit29 ~ bit31 3 bits value for
  4442. * buffer_timestamp in wbm2sw ring entry, currently buffer_timestamp only
  4443. * can support 0x7FFF * 1024 us (29 bits), but if the timestamp is >
  4444. * 0x7FFF * 1024 us, bit29~ bit31 will be lost.
  4445. *
  4446. * Return: the adjusted buffer_timestamp value
  4447. */
  4448. static inline
  4449. uint32_t dp_tx_adjust_enqueue_buffer_ts(uint32_t ack_ts,
  4450. uint32_t enqueue_ts,
  4451. uint32_t base_delta_ts)
  4452. {
  4453. uint32_t ack_buffer_ts;
  4454. uint32_t ack_buffer_ts_bit29_31;
  4455. uint32_t adjusted_enqueue_ts;
  4456. /* corresponding buffer_timestamp value when receive OTA Ack */
  4457. ack_buffer_ts = ack_ts - base_delta_ts;
  4458. ack_buffer_ts_bit29_31 = ack_buffer_ts & DP_TX_TS_BIT29_31_MASK;
  4459. /* restore the bit29 ~ bit31 value */
  4460. adjusted_enqueue_ts = ack_buffer_ts_bit29_31 | enqueue_ts;
  4461. /*
  4462. * if actual enqueue_ts value occupied 29 bits only, this enqueue_ts
  4463. * value + real UL delay overflow 29 bits, then 30th bit (bit-29)
  4464. * should not be marked, otherwise extra 0x20000000 us is added to
  4465. * enqueue_ts.
  4466. */
  4467. if (qdf_unlikely(adjusted_enqueue_ts > ack_buffer_ts))
  4468. adjusted_enqueue_ts -= DP_TX_TS_BIT29_SET_VALUE;
  4469. return adjusted_enqueue_ts;
  4470. }
  4471. QDF_STATUS
  4472. dp_tx_compute_hw_delay_us(struct hal_tx_completion_status *ts,
  4473. uint32_t delta_tsf,
  4474. uint32_t *delay_us)
  4475. {
  4476. uint32_t buffer_ts;
  4477. uint32_t delay;
  4478. if (!delay_us)
  4479. return QDF_STATUS_E_INVAL;
  4480. /* Tx_rate_stats_info_valid is 0 and tsf is invalid then */
  4481. if (!ts->valid)
  4482. return QDF_STATUS_E_INVAL;
  4483. /* buffer_timestamp is in units of 1024 us and is [31:13] of
  4484. * WBM_RELEASE_RING_4. After left shift 10 bits, it's
  4485. * valid up to 29 bits.
  4486. */
  4487. buffer_ts = ts->buffer_timestamp << 10;
  4488. buffer_ts = dp_tx_adjust_enqueue_buffer_ts(ts->tsf,
  4489. buffer_ts, delta_tsf);
  4490. delay = ts->tsf - buffer_ts - delta_tsf;
  4491. if (qdf_unlikely(delay & 0x80000000)) {
  4492. dp_err_rl("delay = 0x%x (-ve)\n"
  4493. "release_src = %d\n"
  4494. "ppdu_id = 0x%x\n"
  4495. "peer_id = 0x%x\n"
  4496. "tid = 0x%x\n"
  4497. "release_reason = %d\n"
  4498. "tsf = %u (0x%x)\n"
  4499. "buffer_timestamp = %u (0x%x)\n"
  4500. "delta_tsf = %u (0x%x)\n",
  4501. delay, ts->release_src, ts->ppdu_id, ts->peer_id,
  4502. ts->tid, ts->status, ts->tsf, ts->tsf,
  4503. ts->buffer_timestamp, ts->buffer_timestamp,
  4504. delta_tsf, delta_tsf);
  4505. delay = 0;
  4506. goto end;
  4507. }
  4508. delay &= 0x1FFFFFFF; /* mask 29 BITS */
  4509. if (delay > 0x1000000) {
  4510. dp_info_rl("----------------------\n"
  4511. "Tx completion status:\n"
  4512. "----------------------\n"
  4513. "release_src = %d\n"
  4514. "ppdu_id = 0x%x\n"
  4515. "release_reason = %d\n"
  4516. "tsf = %u (0x%x)\n"
  4517. "buffer_timestamp = %u (0x%x)\n"
  4518. "delta_tsf = %u (0x%x)\n",
  4519. ts->release_src, ts->ppdu_id, ts->status,
  4520. ts->tsf, ts->tsf, ts->buffer_timestamp,
  4521. ts->buffer_timestamp, delta_tsf, delta_tsf);
  4522. return QDF_STATUS_E_FAILURE;
  4523. }
  4524. end:
  4525. *delay_us = delay;
  4526. return QDF_STATUS_SUCCESS;
  4527. }
  4528. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  4529. uint32_t delta_tsf)
  4530. {
  4531. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4532. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  4533. DP_MOD_ID_CDP);
  4534. if (!vdev) {
  4535. dp_err_rl("vdev %d does not exist", vdev_id);
  4536. return;
  4537. }
  4538. vdev->delta_tsf = delta_tsf;
  4539. dp_debug("vdev id %u delta_tsf %u", vdev_id, delta_tsf);
  4540. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4541. }
  4542. #endif
  4543. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  4544. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  4545. uint8_t vdev_id, bool enable)
  4546. {
  4547. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4548. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  4549. DP_MOD_ID_CDP);
  4550. if (!vdev) {
  4551. dp_err_rl("vdev %d does not exist", vdev_id);
  4552. return QDF_STATUS_E_FAILURE;
  4553. }
  4554. qdf_atomic_set(&vdev->ul_delay_report, enable);
  4555. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4556. return QDF_STATUS_SUCCESS;
  4557. }
  4558. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  4559. uint32_t *val)
  4560. {
  4561. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4562. struct dp_vdev *vdev;
  4563. uint32_t delay_accum;
  4564. uint32_t pkts_accum;
  4565. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_CDP);
  4566. if (!vdev) {
  4567. dp_err_rl("vdev %d does not exist", vdev_id);
  4568. return QDF_STATUS_E_FAILURE;
  4569. }
  4570. if (!qdf_atomic_read(&vdev->ul_delay_report)) {
  4571. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4572. return QDF_STATUS_E_FAILURE;
  4573. }
  4574. /* Average uplink delay based on current accumulated values */
  4575. delay_accum = qdf_atomic_read(&vdev->ul_delay_accum);
  4576. pkts_accum = qdf_atomic_read(&vdev->ul_pkts_accum);
  4577. *val = delay_accum / pkts_accum;
  4578. dp_debug("uplink_delay %u delay_accum %u pkts_accum %u", *val,
  4579. delay_accum, pkts_accum);
  4580. /* Reset accumulated values to 0 */
  4581. qdf_atomic_set(&vdev->ul_delay_accum, 0);
  4582. qdf_atomic_set(&vdev->ul_pkts_accum, 0);
  4583. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4584. return QDF_STATUS_SUCCESS;
  4585. }
  4586. static void dp_tx_update_uplink_delay(struct dp_soc *soc, struct dp_vdev *vdev,
  4587. struct hal_tx_completion_status *ts)
  4588. {
  4589. uint32_t ul_delay;
  4590. if (qdf_unlikely(!vdev)) {
  4591. dp_info_rl("vdev is null or delete in progress");
  4592. return;
  4593. }
  4594. if (!qdf_atomic_read(&vdev->ul_delay_report))
  4595. return;
  4596. if (QDF_IS_STATUS_ERROR(dp_tx_compute_hw_delay_us(ts,
  4597. vdev->delta_tsf,
  4598. &ul_delay)))
  4599. return;
  4600. ul_delay /= 1000; /* in unit of ms */
  4601. qdf_atomic_add(ul_delay, &vdev->ul_delay_accum);
  4602. qdf_atomic_inc(&vdev->ul_pkts_accum);
  4603. }
  4604. #else /* !WLAN_FEATURE_TSF_UPLINK_DELAY */
  4605. static inline
  4606. void dp_tx_update_uplink_delay(struct dp_soc *soc, struct dp_vdev *vdev,
  4607. struct hal_tx_completion_status *ts)
  4608. {
  4609. }
  4610. #endif /* WLAN_FEATURE_TSF_UPLINK_DELAY */
  4611. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  4612. struct dp_tx_desc_s *tx_desc,
  4613. struct hal_tx_completion_status *ts,
  4614. struct dp_txrx_peer *txrx_peer,
  4615. uint8_t ring_id)
  4616. {
  4617. uint32_t length;
  4618. qdf_ether_header_t *eh;
  4619. struct dp_vdev *vdev = NULL;
  4620. qdf_nbuf_t nbuf = tx_desc->nbuf;
  4621. enum qdf_dp_tx_rx_status dp_status;
  4622. uint8_t link_id = 0;
  4623. enum QDF_OPMODE op_mode = QDF_MAX_NO_OF_MODE;
  4624. if (!nbuf) {
  4625. dp_info_rl("invalid tx descriptor. nbuf NULL");
  4626. goto out;
  4627. }
  4628. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  4629. length = dp_tx_get_pkt_len(tx_desc);
  4630. dp_status = dp_tx_hw_to_qdf(ts->status);
  4631. dp_tx_comp_debug("-------------------- \n"
  4632. "Tx Completion Stats: \n"
  4633. "-------------------- \n"
  4634. "ack_frame_rssi = %d \n"
  4635. "first_msdu = %d \n"
  4636. "last_msdu = %d \n"
  4637. "msdu_part_of_amsdu = %d \n"
  4638. "rate_stats valid = %d \n"
  4639. "bw = %d \n"
  4640. "pkt_type = %d \n"
  4641. "stbc = %d \n"
  4642. "ldpc = %d \n"
  4643. "sgi = %d \n"
  4644. "mcs = %d \n"
  4645. "ofdma = %d \n"
  4646. "tones_in_ru = %d \n"
  4647. "tsf = %d \n"
  4648. "ppdu_id = %d \n"
  4649. "transmit_cnt = %d \n"
  4650. "tid = %d \n"
  4651. "peer_id = %d\n"
  4652. "tx_status = %d\n"
  4653. "tx_release_source = %d\n",
  4654. ts->ack_frame_rssi, ts->first_msdu,
  4655. ts->last_msdu, ts->msdu_part_of_amsdu,
  4656. ts->valid, ts->bw, ts->pkt_type, ts->stbc,
  4657. ts->ldpc, ts->sgi, ts->mcs, ts->ofdma,
  4658. ts->tones_in_ru, ts->tsf, ts->ppdu_id,
  4659. ts->transmit_cnt, ts->tid, ts->peer_id,
  4660. ts->status, ts->release_src);
  4661. /* Update SoC level stats */
  4662. DP_STATS_INCC(soc, tx.dropped_fw_removed, 1,
  4663. (ts->status == HAL_TX_TQM_RR_REM_CMD_REM));
  4664. if (!txrx_peer) {
  4665. dp_info_rl("peer is null or deletion in progress");
  4666. DP_STATS_INC_PKT(soc, tx.tx_invalid_peer, 1, length);
  4667. goto out_log;
  4668. }
  4669. vdev = txrx_peer->vdev;
  4670. link_id = dp_tx_get_link_id_from_ppdu_id(soc, ts, txrx_peer, vdev);
  4671. dp_tx_set_nbuf_band(nbuf, txrx_peer, link_id);
  4672. op_mode = vdev->qdf_opmode;
  4673. dp_tx_update_connectivity_stats(soc, vdev, tx_desc, ts->status);
  4674. dp_tx_update_uplink_delay(soc, vdev, ts);
  4675. /* check tx complete notification */
  4676. if (qdf_nbuf_tx_notify_comp_get(nbuf))
  4677. dp_tx_notify_completion(soc, vdev, tx_desc,
  4678. nbuf, ts->status);
  4679. /* Update per-packet stats for mesh mode */
  4680. if (qdf_unlikely(vdev->mesh_vdev) &&
  4681. !(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW))
  4682. dp_tx_comp_fill_tx_completion_stats(tx_desc, ts);
  4683. /* Update peer level stats */
  4684. if (qdf_unlikely(txrx_peer->bss_peer &&
  4685. vdev->opmode == wlan_op_mode_ap)) {
  4686. if (ts->status != HAL_TX_TQM_RR_REM_CMD_REM) {
  4687. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.mcast, 1,
  4688. length, link_id);
  4689. if (txrx_peer->vdev->tx_encap_type ==
  4690. htt_cmn_pkt_type_ethernet &&
  4691. QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  4692. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  4693. tx.bcast, 1,
  4694. length, link_id);
  4695. }
  4696. }
  4697. } else {
  4698. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.ucast, 1, length,
  4699. link_id);
  4700. if (ts->status == HAL_TX_TQM_RR_FRAME_ACKED) {
  4701. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.tx_success,
  4702. 1, length, link_id);
  4703. if (qdf_unlikely(txrx_peer->in_twt)) {
  4704. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  4705. tx.tx_success_twt,
  4706. 1, length,
  4707. link_id);
  4708. }
  4709. }
  4710. }
  4711. dp_tx_update_peer_stats(tx_desc, ts, txrx_peer, ring_id, link_id);
  4712. dp_tx_update_peer_delay_stats(txrx_peer, tx_desc, ts, ring_id);
  4713. dp_tx_update_peer_jitter_stats(txrx_peer, tx_desc, ts, ring_id);
  4714. dp_tx_update_peer_sawf_stats(soc, vdev, txrx_peer, tx_desc,
  4715. ts, ts->tid);
  4716. dp_tx_send_pktlog(soc, vdev->pdev, tx_desc, nbuf, dp_status);
  4717. #ifdef QCA_SUPPORT_RDK_STATS
  4718. if (soc->peerstats_enabled)
  4719. dp_tx_sojourn_stats_process(vdev->pdev, txrx_peer, ts->tid,
  4720. qdf_ktime_to_ms(tx_desc->timestamp),
  4721. ts->ppdu_id, link_id);
  4722. #endif
  4723. out_log:
  4724. DPTRACE(qdf_dp_trace_ptr(tx_desc->nbuf,
  4725. QDF_DP_TRACE_LI_DP_FREE_PACKET_PTR_RECORD,
  4726. QDF_TRACE_DEFAULT_PDEV_ID,
  4727. qdf_nbuf_data_addr(nbuf),
  4728. sizeof(qdf_nbuf_data(nbuf)),
  4729. tx_desc->id, ts->status, dp_status, op_mode));
  4730. out:
  4731. return;
  4732. }
  4733. #if defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT) && \
  4734. defined(QCA_ENHANCED_STATS_SUPPORT)
  4735. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4736. uint32_t length, uint8_t tx_status,
  4737. bool update)
  4738. {
  4739. if (update || (!txrx_peer->hw_txrx_stats_en)) {
  4740. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4741. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4742. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4743. }
  4744. }
  4745. #elif defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT)
  4746. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4747. uint32_t length, uint8_t tx_status,
  4748. bool update)
  4749. {
  4750. if (!txrx_peer->hw_txrx_stats_en) {
  4751. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4752. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4753. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4754. }
  4755. }
  4756. #else
  4757. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4758. uint32_t length, uint8_t tx_status,
  4759. bool update)
  4760. {
  4761. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4762. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4763. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4764. }
  4765. #endif
  4766. /**
  4767. * dp_tx_prefetch_next_nbuf_data(): Prefetch nbuf and nbuf data
  4768. * @next: descriptor of the nrxt buffer
  4769. *
  4770. * Return: none
  4771. */
  4772. #ifdef QCA_DP_RX_NBUF_AND_NBUF_DATA_PREFETCH
  4773. static inline
  4774. void dp_tx_prefetch_next_nbuf_data(struct dp_tx_desc_s *next)
  4775. {
  4776. qdf_nbuf_t nbuf = NULL;
  4777. if (next)
  4778. nbuf = next->nbuf;
  4779. if (nbuf)
  4780. qdf_prefetch(nbuf);
  4781. }
  4782. #else
  4783. static inline
  4784. void dp_tx_prefetch_next_nbuf_data(struct dp_tx_desc_s *next)
  4785. {
  4786. }
  4787. #endif
  4788. /**
  4789. * dp_tx_mcast_reinject_handler() - Tx reinjected multicast packets handler
  4790. * @soc: core txrx main context
  4791. * @desc: software descriptor
  4792. *
  4793. * Return: true when packet is reinjected
  4794. */
  4795. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  4796. defined(WLAN_MCAST_MLO) && !defined(CONFIG_MLO_SINGLE_DEV)
  4797. static inline bool
  4798. dp_tx_mcast_reinject_handler(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  4799. {
  4800. struct dp_vdev *vdev = NULL;
  4801. if (desc->tx_status == HAL_TX_TQM_RR_MULTICAST_DROP) {
  4802. if (!soc->arch_ops.dp_tx_mcast_handler ||
  4803. !soc->arch_ops.dp_tx_is_mcast_primary)
  4804. return false;
  4805. vdev = dp_vdev_get_ref_by_id(soc, desc->vdev_id,
  4806. DP_MOD_ID_REINJECT);
  4807. if (qdf_unlikely(!vdev)) {
  4808. dp_tx_comp_info_rl("Unable to get vdev ref %d",
  4809. desc->id);
  4810. return false;
  4811. }
  4812. if (!(soc->arch_ops.dp_tx_is_mcast_primary(soc, vdev))) {
  4813. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_REINJECT);
  4814. return false;
  4815. }
  4816. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  4817. qdf_nbuf_len(desc->nbuf));
  4818. soc->arch_ops.dp_tx_mcast_handler(soc, vdev, desc->nbuf);
  4819. dp_tx_desc_release(soc, desc, desc->pool_id);
  4820. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_REINJECT);
  4821. return true;
  4822. }
  4823. return false;
  4824. }
  4825. #else
  4826. static inline bool
  4827. dp_tx_mcast_reinject_handler(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  4828. {
  4829. return false;
  4830. }
  4831. #endif
  4832. #ifdef QCA_DP_TX_NBUF_LIST_FREE
  4833. static inline void
  4834. dp_tx_nbuf_queue_head_init(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4835. {
  4836. qdf_nbuf_queue_head_init(nbuf_queue_head);
  4837. }
  4838. static inline void
  4839. dp_tx_nbuf_dev_queue_free(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4840. struct dp_tx_desc_s *desc)
  4841. {
  4842. qdf_nbuf_t nbuf = NULL;
  4843. nbuf = desc->nbuf;
  4844. if (qdf_likely(desc->flags & DP_TX_DESC_FLAG_FAST))
  4845. qdf_nbuf_dev_queue_head(nbuf_queue_head, nbuf);
  4846. else
  4847. qdf_nbuf_free(nbuf);
  4848. }
  4849. static inline void
  4850. dp_tx_nbuf_dev_queue_free_no_flag(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4851. qdf_nbuf_t nbuf)
  4852. {
  4853. if (!nbuf)
  4854. return;
  4855. if (nbuf->is_from_recycler)
  4856. qdf_nbuf_dev_queue_head(nbuf_queue_head, nbuf);
  4857. else
  4858. qdf_nbuf_free(nbuf);
  4859. }
  4860. static inline void
  4861. dp_tx_nbuf_dev_kfree_list(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4862. {
  4863. qdf_nbuf_dev_kfree_list(nbuf_queue_head);
  4864. }
  4865. #else
  4866. static inline void
  4867. dp_tx_nbuf_queue_head_init(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4868. {
  4869. }
  4870. static inline void
  4871. dp_tx_nbuf_dev_queue_free(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4872. struct dp_tx_desc_s *desc)
  4873. {
  4874. qdf_nbuf_free(desc->nbuf);
  4875. }
  4876. static inline void
  4877. dp_tx_nbuf_dev_queue_free_no_flag(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4878. qdf_nbuf_t nbuf)
  4879. {
  4880. qdf_nbuf_free(nbuf);
  4881. }
  4882. static inline void
  4883. dp_tx_nbuf_dev_kfree_list(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4884. {
  4885. }
  4886. #endif
  4887. #ifdef WLAN_SUPPORT_PPEDS
  4888. static inline void
  4889. dp_tx_update_ppeds_tx_comp_stats(struct dp_soc *soc,
  4890. struct dp_txrx_peer *txrx_peer,
  4891. struct hal_tx_completion_status *ts,
  4892. struct dp_tx_desc_s *desc,
  4893. uint8_t ring_id)
  4894. {
  4895. uint8_t link_id = 0;
  4896. struct dp_vdev *vdev = NULL;
  4897. if (qdf_likely(txrx_peer)) {
  4898. if (!(desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  4899. hal_tx_comp_get_status(&desc->comp,
  4900. ts,
  4901. soc->hal_soc);
  4902. vdev = txrx_peer->vdev;
  4903. link_id = dp_tx_get_link_id_from_ppdu_id(soc,
  4904. ts,
  4905. txrx_peer,
  4906. vdev);
  4907. if (link_id < 1 || link_id > DP_MAX_MLO_LINKS)
  4908. link_id = 0;
  4909. dp_tx_update_peer_stats(desc, ts,
  4910. txrx_peer,
  4911. ring_id,
  4912. link_id);
  4913. } else {
  4914. dp_tx_update_peer_basic_stats(txrx_peer, desc->length,
  4915. desc->tx_status, false);
  4916. }
  4917. }
  4918. }
  4919. #else
  4920. static inline void
  4921. dp_tx_update_ppeds_tx_comp_stats(struct dp_soc *soc,
  4922. struct dp_txrx_peer *txrx_peer,
  4923. struct hal_tx_completion_status *ts,
  4924. struct dp_tx_desc_s *desc,
  4925. uint8_t ring_id)
  4926. {
  4927. }
  4928. #endif
  4929. void
  4930. dp_tx_comp_process_desc_list_fast(struct dp_soc *soc,
  4931. struct dp_tx_desc_s *head_desc,
  4932. struct dp_tx_desc_s *tail_desc,
  4933. uint8_t ring_id,
  4934. uint32_t fast_desc_count)
  4935. {
  4936. struct dp_tx_desc_pool_s *pool = &soc->tx_desc[head_desc->pool_id];
  4937. dp_tx_outstanding_sub(head_desc->pdev, fast_desc_count);
  4938. dp_tx_desc_free_list(pool, head_desc, tail_desc, fast_desc_count);
  4939. }
  4940. void
  4941. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  4942. struct dp_tx_desc_s *comp_head, uint8_t ring_id)
  4943. {
  4944. struct dp_tx_desc_s *desc;
  4945. struct dp_tx_desc_s *next;
  4946. struct hal_tx_completion_status ts;
  4947. struct dp_txrx_peer *txrx_peer = NULL;
  4948. uint16_t peer_id = DP_INVALID_PEER;
  4949. dp_txrx_ref_handle txrx_ref_handle = NULL;
  4950. qdf_nbuf_queue_head_t h;
  4951. desc = comp_head;
  4952. dp_tx_nbuf_queue_head_init(&h);
  4953. while (desc) {
  4954. next = desc->next;
  4955. dp_tx_prefetch_next_nbuf_data(next);
  4956. if (peer_id != desc->peer_id) {
  4957. if (txrx_peer)
  4958. dp_txrx_peer_unref_delete(txrx_ref_handle,
  4959. DP_MOD_ID_TX_COMP);
  4960. peer_id = desc->peer_id;
  4961. txrx_peer =
  4962. dp_txrx_peer_get_ref_by_id(soc, peer_id,
  4963. &txrx_ref_handle,
  4964. DP_MOD_ID_TX_COMP);
  4965. }
  4966. if (dp_tx_mcast_reinject_handler(soc, desc)) {
  4967. desc = next;
  4968. continue;
  4969. }
  4970. if (desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  4971. qdf_nbuf_t nbuf;
  4972. dp_tx_update_ppeds_tx_comp_stats(soc, txrx_peer, &ts,
  4973. desc, ring_id);
  4974. if (desc->pool_id != DP_TX_PPEDS_POOL_ID) {
  4975. nbuf = desc->nbuf;
  4976. dp_tx_nbuf_dev_queue_free_no_flag(&h, nbuf);
  4977. dp_tx_desc_free(soc, desc, desc->pool_id);
  4978. __dp_tx_outstanding_dec(soc);
  4979. } else {
  4980. nbuf = dp_ppeds_tx_desc_free(soc, desc);
  4981. dp_tx_nbuf_dev_queue_free_no_flag(&h, nbuf);
  4982. }
  4983. desc = next;
  4984. continue;
  4985. }
  4986. if (qdf_likely(desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  4987. struct dp_pdev *pdev = desc->pdev;
  4988. if (qdf_likely(txrx_peer))
  4989. dp_tx_update_peer_basic_stats(txrx_peer,
  4990. desc->length,
  4991. desc->tx_status,
  4992. false);
  4993. qdf_assert(pdev);
  4994. dp_tx_outstanding_dec(pdev);
  4995. /*
  4996. * Calling a QDF WRAPPER here is creating significant
  4997. * performance impact so avoided the wrapper call here
  4998. */
  4999. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf,
  5000. desc->id, DP_TX_COMP_UNMAP);
  5001. dp_tx_nbuf_unmap(soc, desc);
  5002. dp_tx_nbuf_dev_queue_free(&h, desc);
  5003. dp_tx_desc_free(soc, desc, desc->pool_id);
  5004. desc = next;
  5005. continue;
  5006. }
  5007. hal_tx_comp_get_status(&desc->comp, &ts, soc->hal_soc);
  5008. dp_tx_comp_process_tx_status(soc, desc, &ts, txrx_peer,
  5009. ring_id);
  5010. dp_tx_comp_process_desc(soc, desc, &ts, txrx_peer);
  5011. dp_tx_desc_release(soc, desc, desc->pool_id);
  5012. desc = next;
  5013. }
  5014. dp_tx_nbuf_dev_kfree_list(&h);
  5015. if (txrx_peer)
  5016. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_TX_COMP);
  5017. }
  5018. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  5019. static inline
  5020. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  5021. int max_reap_limit)
  5022. {
  5023. bool limit_hit = false;
  5024. limit_hit =
  5025. (num_reaped >= max_reap_limit) ? true : false;
  5026. if (limit_hit)
  5027. DP_STATS_INC(soc, tx.tx_comp_loop_pkt_limit_hit, 1);
  5028. return limit_hit;
  5029. }
  5030. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  5031. {
  5032. return soc->wlan_cfg_ctx->tx_comp_enable_eol_data_check;
  5033. }
  5034. static inline int dp_tx_comp_get_loop_pkt_limit(struct dp_soc *soc)
  5035. {
  5036. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  5037. return cfg->tx_comp_loop_pkt_limit;
  5038. }
  5039. #else
  5040. static inline
  5041. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  5042. int max_reap_limit)
  5043. {
  5044. return false;
  5045. }
  5046. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  5047. {
  5048. return false;
  5049. }
  5050. static inline int dp_tx_comp_get_loop_pkt_limit(struct dp_soc *soc)
  5051. {
  5052. return 0;
  5053. }
  5054. #endif
  5055. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  5056. static inline int
  5057. dp_srng_test_and_update_nf_params(struct dp_soc *soc, struct dp_srng *dp_srng,
  5058. int *max_reap_limit)
  5059. {
  5060. return soc->arch_ops.dp_srng_test_and_update_nf_params(soc, dp_srng,
  5061. max_reap_limit);
  5062. }
  5063. #else
  5064. static inline int
  5065. dp_srng_test_and_update_nf_params(struct dp_soc *soc, struct dp_srng *dp_srng,
  5066. int *max_reap_limit)
  5067. {
  5068. return 0;
  5069. }
  5070. #endif
  5071. #ifdef DP_TX_TRACKING
  5072. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  5073. {
  5074. if ((tx_desc->magic != DP_TX_MAGIC_PATTERN_INUSE) &&
  5075. (tx_desc->magic != DP_TX_MAGIC_PATTERN_FREE)) {
  5076. dp_err_rl("tx_desc %u is corrupted", tx_desc->id);
  5077. qdf_trigger_self_recovery(NULL, QDF_TX_DESC_LEAK);
  5078. }
  5079. }
  5080. #endif
  5081. #ifndef WLAN_SOFTUMAC_SUPPORT
  5082. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  5083. hal_ring_handle_t hal_ring_hdl, uint8_t ring_id,
  5084. uint32_t quota)
  5085. {
  5086. void *tx_comp_hal_desc;
  5087. void *last_prefetched_hw_desc = NULL;
  5088. struct dp_tx_desc_s *last_prefetched_sw_desc = NULL;
  5089. hal_soc_handle_t hal_soc;
  5090. uint8_t buffer_src;
  5091. struct dp_tx_desc_s *tx_desc = NULL;
  5092. struct dp_tx_desc_s *head_desc = NULL;
  5093. struct dp_tx_desc_s *tail_desc = NULL;
  5094. struct dp_tx_desc_s *fast_head_desc = NULL;
  5095. struct dp_tx_desc_s *fast_tail_desc = NULL;
  5096. uint32_t num_processed = 0;
  5097. uint32_t fast_desc_count = 0;
  5098. uint32_t count;
  5099. uint32_t num_avail_for_reap = 0;
  5100. bool force_break = false;
  5101. struct dp_srng *tx_comp_ring = &soc->tx_comp_ring[ring_id];
  5102. int max_reap_limit, ring_near_full;
  5103. uint32_t num_entries;
  5104. qdf_nbuf_queue_head_t h;
  5105. DP_HIST_INIT();
  5106. num_entries = hal_srng_get_num_entries(soc->hal_soc, hal_ring_hdl);
  5107. more_data:
  5108. hal_soc = soc->hal_soc;
  5109. /* Re-initialize local variables to be re-used */
  5110. head_desc = NULL;
  5111. tail_desc = NULL;
  5112. count = 0;
  5113. max_reap_limit = dp_tx_comp_get_loop_pkt_limit(soc);
  5114. ring_near_full = dp_srng_test_and_update_nf_params(soc, tx_comp_ring,
  5115. &max_reap_limit);
  5116. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  5117. dp_err("HAL RING Access Failed -- %pK", hal_ring_hdl);
  5118. return 0;
  5119. }
  5120. if (!num_avail_for_reap)
  5121. num_avail_for_reap = hal_srng_dst_num_valid(hal_soc,
  5122. hal_ring_hdl, 0);
  5123. if (num_avail_for_reap >= quota)
  5124. num_avail_for_reap = quota;
  5125. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_avail_for_reap);
  5126. last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
  5127. hal_ring_hdl,
  5128. num_avail_for_reap);
  5129. dp_tx_nbuf_queue_head_init(&h);
  5130. /* Find head descriptor from completion ring */
  5131. while (qdf_likely(num_avail_for_reap--)) {
  5132. tx_comp_hal_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  5133. if (qdf_unlikely(!tx_comp_hal_desc))
  5134. break;
  5135. buffer_src = hal_tx_comp_get_buffer_source(hal_soc,
  5136. tx_comp_hal_desc);
  5137. /* If this buffer was not released by TQM or FW, then it is not
  5138. * Tx completion indication, assert */
  5139. if (qdf_unlikely(buffer_src !=
  5140. HAL_TX_COMP_RELEASE_SOURCE_TQM) &&
  5141. (qdf_unlikely(buffer_src !=
  5142. HAL_TX_COMP_RELEASE_SOURCE_FW))) {
  5143. uint8_t wbm_internal_error;
  5144. dp_err_rl(
  5145. "Tx comp release_src != TQM | FW but from %d",
  5146. buffer_src);
  5147. hal_dump_comp_desc(tx_comp_hal_desc);
  5148. DP_STATS_INC(soc, tx.invalid_release_source, 1);
  5149. /* When WBM sees NULL buffer_addr_info in any of
  5150. * ingress rings it sends an error indication,
  5151. * with wbm_internal_error=1, to a specific ring.
  5152. * The WBM2SW ring used to indicate these errors is
  5153. * fixed in HW, and that ring is being used as Tx
  5154. * completion ring. These errors are not related to
  5155. * Tx completions, and should just be ignored
  5156. */
  5157. wbm_internal_error = hal_get_wbm_internal_error(
  5158. hal_soc,
  5159. tx_comp_hal_desc);
  5160. if (wbm_internal_error) {
  5161. dp_err_rl("Tx comp wbm_internal_error!!");
  5162. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_ALL], 1);
  5163. if (HAL_TX_COMP_RELEASE_SOURCE_REO ==
  5164. buffer_src)
  5165. dp_handle_wbm_internal_error(
  5166. soc,
  5167. tx_comp_hal_desc,
  5168. hal_tx_comp_get_buffer_type(
  5169. tx_comp_hal_desc));
  5170. } else {
  5171. dp_err_rl("Tx comp wbm_internal_error false");
  5172. DP_STATS_INC(soc, tx.non_wbm_internal_err, 1);
  5173. }
  5174. continue;
  5175. }
  5176. soc->arch_ops.tx_comp_get_params_from_hal_desc(soc,
  5177. tx_comp_hal_desc,
  5178. &tx_desc);
  5179. if (qdf_unlikely(!tx_desc)) {
  5180. dp_err("unable to retrieve tx_desc!");
  5181. hal_dump_comp_desc(tx_comp_hal_desc);
  5182. DP_STATS_INC(soc, tx.invalid_tx_comp_desc, 1);
  5183. QDF_BUG(0);
  5184. continue;
  5185. }
  5186. tx_desc->buffer_src = buffer_src;
  5187. if (tx_desc->flags & DP_TX_DESC_FLAG_FASTPATH_SIMPLE ||
  5188. tx_desc->flags & DP_TX_DESC_FLAG_PPEDS)
  5189. goto add_to_pool2;
  5190. /*
  5191. * If the release source is FW, process the HTT status
  5192. */
  5193. if (qdf_unlikely(buffer_src ==
  5194. HAL_TX_COMP_RELEASE_SOURCE_FW)) {
  5195. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  5196. hal_tx_comp_get_htt_desc(tx_comp_hal_desc,
  5197. htt_tx_status);
  5198. /* Collect hw completion contents */
  5199. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  5200. &tx_desc->comp, 1);
  5201. soc->arch_ops.dp_tx_process_htt_completion(
  5202. soc,
  5203. tx_desc,
  5204. htt_tx_status,
  5205. ring_id);
  5206. } else {
  5207. tx_desc->tx_status =
  5208. hal_tx_comp_get_tx_status(tx_comp_hal_desc);
  5209. tx_desc->buffer_src = buffer_src;
  5210. /*
  5211. * If the fast completion mode is enabled extended
  5212. * metadata from descriptor is not copied
  5213. */
  5214. if (qdf_likely(tx_desc->flags &
  5215. DP_TX_DESC_FLAG_SIMPLE))
  5216. goto add_to_pool;
  5217. /*
  5218. * If the descriptor is already freed in vdev_detach,
  5219. * continue to next descriptor
  5220. */
  5221. if (qdf_unlikely
  5222. ((tx_desc->vdev_id == DP_INVALID_VDEV_ID) &&
  5223. !tx_desc->flags)) {
  5224. dp_tx_comp_info_rl("Descriptor freed in vdev_detach %d",
  5225. tx_desc->id);
  5226. DP_STATS_INC(soc, tx.tx_comp_exception, 1);
  5227. dp_tx_desc_check_corruption(tx_desc);
  5228. continue;
  5229. }
  5230. if (qdf_unlikely(tx_desc->pdev->is_pdev_down)) {
  5231. dp_tx_comp_info_rl("pdev in down state %d",
  5232. tx_desc->id);
  5233. tx_desc->flags |= DP_TX_DESC_FLAG_TX_COMP_ERR;
  5234. dp_tx_comp_free_buf(soc, tx_desc, false);
  5235. dp_tx_desc_release(soc, tx_desc,
  5236. tx_desc->pool_id);
  5237. goto next_desc;
  5238. }
  5239. if (!(tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED) ||
  5240. !(tx_desc->flags & DP_TX_DESC_FLAG_QUEUED_TX)) {
  5241. dp_tx_comp_alert("Txdesc invalid, flgs = %x,id = %d",
  5242. tx_desc->flags, tx_desc->id);
  5243. qdf_assert_always(0);
  5244. }
  5245. /* Collect hw completion contents */
  5246. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  5247. &tx_desc->comp, 1);
  5248. add_to_pool:
  5249. DP_HIST_PACKET_COUNT_INC(tx_desc->pdev->pdev_id);
  5250. add_to_pool2:
  5251. /* First ring descriptor on the cycle */
  5252. if (tx_desc->flags & DP_TX_DESC_FLAG_FASTPATH_SIMPLE ||
  5253. tx_desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  5254. dp_tx_nbuf_dev_queue_free(&h, tx_desc);
  5255. fast_desc_count++;
  5256. if (!fast_head_desc) {
  5257. fast_head_desc = tx_desc;
  5258. fast_tail_desc = tx_desc;
  5259. }
  5260. fast_tail_desc->next = tx_desc;
  5261. fast_tail_desc = tx_desc;
  5262. dp_tx_desc_clear(tx_desc);
  5263. } else {
  5264. if (!head_desc) {
  5265. head_desc = tx_desc;
  5266. tail_desc = tx_desc;
  5267. }
  5268. tail_desc->next = tx_desc;
  5269. tx_desc->next = NULL;
  5270. tail_desc = tx_desc;
  5271. }
  5272. }
  5273. next_desc:
  5274. num_processed += !(count & DP_TX_NAPI_BUDGET_DIV_MASK);
  5275. /*
  5276. * Processed packet count is more than given quota
  5277. * stop to processing
  5278. */
  5279. count++;
  5280. dp_tx_prefetch_hw_sw_nbuf_desc(soc, hal_soc,
  5281. num_avail_for_reap,
  5282. hal_ring_hdl,
  5283. &last_prefetched_hw_desc,
  5284. &last_prefetched_sw_desc);
  5285. if (dp_tx_comp_loop_pkt_limit_hit(soc, count, max_reap_limit))
  5286. break;
  5287. }
  5288. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  5289. /* Process the reaped descriptors that were sent via fast path */
  5290. if (fast_head_desc) {
  5291. dp_tx_comp_process_desc_list_fast(soc, fast_head_desc,
  5292. fast_tail_desc, ring_id,
  5293. fast_desc_count);
  5294. dp_tx_nbuf_dev_kfree_list(&h);
  5295. }
  5296. /* Process the reaped descriptors */
  5297. if (head_desc)
  5298. dp_tx_comp_process_desc_list(soc, head_desc, ring_id);
  5299. DP_STATS_INC(soc, tx.tx_comp[ring_id], count);
  5300. /*
  5301. * If we are processing in near-full condition, there are 3 scenario
  5302. * 1) Ring entries has reached critical state
  5303. * 2) Ring entries are still near high threshold
  5304. * 3) Ring entries are below the safe level
  5305. *
  5306. * One more loop will move the state to normal processing and yield
  5307. */
  5308. if (ring_near_full)
  5309. goto more_data;
  5310. if (dp_tx_comp_enable_eol_data_check(soc)) {
  5311. if (num_processed >= quota)
  5312. force_break = true;
  5313. if (!force_break &&
  5314. hal_srng_dst_peek_sync_locked(soc->hal_soc,
  5315. hal_ring_hdl)) {
  5316. DP_STATS_INC(soc, tx.hp_oos2, 1);
  5317. if (!hif_exec_should_yield(soc->hif_handle,
  5318. int_ctx->dp_intr_id))
  5319. goto more_data;
  5320. num_avail_for_reap =
  5321. hal_srng_dst_num_valid_locked(soc->hal_soc,
  5322. hal_ring_hdl,
  5323. true);
  5324. if (qdf_unlikely(num_entries &&
  5325. (num_avail_for_reap >=
  5326. num_entries >> 1))) {
  5327. DP_STATS_INC(soc, tx.near_full, 1);
  5328. goto more_data;
  5329. }
  5330. }
  5331. }
  5332. DP_TX_HIST_STATS_PER_PDEV();
  5333. return num_processed;
  5334. }
  5335. #endif
  5336. #ifdef FEATURE_WLAN_TDLS
  5337. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  5338. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list)
  5339. {
  5340. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  5341. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  5342. DP_MOD_ID_TDLS);
  5343. if (!vdev) {
  5344. dp_err("vdev handle for id %d is NULL", vdev_id);
  5345. return NULL;
  5346. }
  5347. if (tx_spec & OL_TX_SPEC_NO_FREE)
  5348. vdev->is_tdls_frame = true;
  5349. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  5350. return dp_tx_send(soc_hdl, vdev_id, msdu_list);
  5351. }
  5352. #endif
  5353. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  5354. {
  5355. int pdev_id;
  5356. /*
  5357. * Fill HTT TCL Metadata with Vdev ID and MAC ID
  5358. */
  5359. DP_TX_TCL_METADATA_TYPE_SET(vdev->htt_tcl_metadata,
  5360. DP_TCL_METADATA_TYPE_VDEV_BASED);
  5361. DP_TX_TCL_METADATA_VDEV_ID_SET(vdev->htt_tcl_metadata,
  5362. vdev->vdev_id);
  5363. pdev_id =
  5364. dp_get_target_pdev_id_for_host_pdev_id(vdev->pdev->soc,
  5365. vdev->pdev->pdev_id);
  5366. DP_TX_TCL_METADATA_PDEV_ID_SET(vdev->htt_tcl_metadata, pdev_id);
  5367. /*
  5368. * Set HTT Extension Valid bit to 0 by default
  5369. */
  5370. DP_TX_TCL_METADATA_VALID_HTT_SET(vdev->htt_tcl_metadata, 0);
  5371. dp_tx_vdev_update_search_flags(vdev);
  5372. return QDF_STATUS_SUCCESS;
  5373. }
  5374. #ifndef FEATURE_WDS
  5375. static inline bool dp_tx_da_search_override(struct dp_vdev *vdev)
  5376. {
  5377. return false;
  5378. }
  5379. #endif
  5380. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  5381. {
  5382. struct dp_soc *soc = vdev->pdev->soc;
  5383. /*
  5384. * Enable both AddrY (SA based search) and AddrX (Da based search)
  5385. * for TDLS link
  5386. *
  5387. * Enable AddrY (SA based search) only for non-WDS STA and
  5388. * ProxySTA VAP (in HKv1) modes.
  5389. *
  5390. * In all other VAP modes, only DA based search should be
  5391. * enabled
  5392. */
  5393. if (vdev->opmode == wlan_op_mode_sta &&
  5394. vdev->tdls_link_connected)
  5395. vdev->hal_desc_addr_search_flags =
  5396. (HAL_TX_DESC_ADDRX_EN | HAL_TX_DESC_ADDRY_EN);
  5397. else if ((vdev->opmode == wlan_op_mode_sta) &&
  5398. !dp_tx_da_search_override(vdev))
  5399. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRY_EN;
  5400. else
  5401. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRX_EN;
  5402. if (vdev->opmode == wlan_op_mode_sta && !vdev->tdls_link_connected)
  5403. vdev->search_type = soc->sta_mode_search_policy;
  5404. else
  5405. vdev->search_type = HAL_TX_ADDR_SEARCH_DEFAULT;
  5406. }
  5407. #ifdef WLAN_SUPPORT_PPEDS
  5408. static inline bool
  5409. dp_is_tx_desc_flush_match(struct dp_pdev *pdev,
  5410. struct dp_vdev *vdev,
  5411. struct dp_tx_desc_s *tx_desc)
  5412. {
  5413. if (!(tx_desc && (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)))
  5414. return false;
  5415. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS)
  5416. return true;
  5417. /*
  5418. * if vdev is given, then only check whether desc
  5419. * vdev match. if vdev is NULL, then check whether
  5420. * desc pdev match.
  5421. */
  5422. return vdev ? (tx_desc->vdev_id == vdev->vdev_id) :
  5423. (tx_desc->pdev == pdev);
  5424. }
  5425. #else
  5426. static inline bool
  5427. dp_is_tx_desc_flush_match(struct dp_pdev *pdev,
  5428. struct dp_vdev *vdev,
  5429. struct dp_tx_desc_s *tx_desc)
  5430. {
  5431. if (!(tx_desc && (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)))
  5432. return false;
  5433. /*
  5434. * if vdev is given, then only check whether desc
  5435. * vdev match. if vdev is NULL, then check whether
  5436. * desc pdev match.
  5437. */
  5438. return vdev ? (tx_desc->vdev_id == vdev->vdev_id) :
  5439. (tx_desc->pdev == pdev);
  5440. }
  5441. #endif
  5442. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5443. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  5444. bool force_free)
  5445. {
  5446. uint8_t i;
  5447. uint32_t j;
  5448. uint32_t num_desc, page_id, offset;
  5449. uint16_t num_desc_per_page;
  5450. struct dp_soc *soc = pdev->soc;
  5451. struct dp_tx_desc_s *tx_desc = NULL;
  5452. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  5453. if (!vdev && !force_free) {
  5454. dp_err("Reset TX desc vdev, Vdev param is required!");
  5455. return;
  5456. }
  5457. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  5458. tx_desc_pool = &soc->tx_desc[i];
  5459. if (!(tx_desc_pool->pool_size) ||
  5460. IS_TX_DESC_POOL_STATUS_INACTIVE(tx_desc_pool) ||
  5461. !(tx_desc_pool->desc_pages.cacheable_pages))
  5462. continue;
  5463. /*
  5464. * Add flow pool lock protection in case pool is freed
  5465. * due to all tx_desc is recycled when handle TX completion.
  5466. * this is not necessary when do force flush as:
  5467. * a. double lock will happen if dp_tx_desc_release is
  5468. * also trying to acquire it.
  5469. * b. dp interrupt has been disabled before do force TX desc
  5470. * flush in dp_pdev_deinit().
  5471. */
  5472. if (!force_free)
  5473. qdf_spin_lock_bh(&tx_desc_pool->flow_pool_lock);
  5474. num_desc = tx_desc_pool->pool_size;
  5475. num_desc_per_page =
  5476. tx_desc_pool->desc_pages.num_element_per_page;
  5477. for (j = 0; j < num_desc; j++) {
  5478. page_id = j / num_desc_per_page;
  5479. offset = j % num_desc_per_page;
  5480. if (qdf_unlikely(!(tx_desc_pool->
  5481. desc_pages.cacheable_pages)))
  5482. break;
  5483. tx_desc = dp_tx_desc_find(soc, i, page_id, offset);
  5484. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  5485. /*
  5486. * Free TX desc if force free is
  5487. * required, otherwise only reset vdev
  5488. * in this TX desc.
  5489. */
  5490. if (force_free) {
  5491. tx_desc->flags |= DP_TX_DESC_FLAG_FLUSH;
  5492. dp_tx_comp_free_buf(soc, tx_desc,
  5493. false);
  5494. dp_tx_desc_release(soc, tx_desc, i);
  5495. } else {
  5496. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  5497. }
  5498. }
  5499. }
  5500. if (!force_free)
  5501. qdf_spin_unlock_bh(&tx_desc_pool->flow_pool_lock);
  5502. }
  5503. }
  5504. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  5505. /**
  5506. * dp_tx_desc_reset_vdev() - reset vdev to NULL in TX Desc
  5507. *
  5508. * @soc: Handle to DP soc structure
  5509. * @tx_desc: pointer of one TX desc
  5510. * @desc_pool_id: TX Desc pool id
  5511. */
  5512. static inline void
  5513. dp_tx_desc_reset_vdev(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  5514. uint8_t desc_pool_id)
  5515. {
  5516. TX_DESC_LOCK_LOCK(&soc->tx_desc[desc_pool_id].lock);
  5517. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  5518. TX_DESC_LOCK_UNLOCK(&soc->tx_desc[desc_pool_id].lock);
  5519. }
  5520. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  5521. bool force_free)
  5522. {
  5523. uint8_t i, num_pool;
  5524. uint32_t j;
  5525. uint32_t num_desc, num_desc_t, page_id, offset;
  5526. uint16_t num_desc_per_page;
  5527. struct dp_soc *soc = pdev->soc;
  5528. struct dp_tx_desc_s *tx_desc = NULL;
  5529. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  5530. if (!vdev && !force_free) {
  5531. dp_err("Reset TX desc vdev, Vdev param is required!");
  5532. return;
  5533. }
  5534. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5535. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5536. for (i = 0; i < num_pool; i++) {
  5537. tx_desc_pool = &soc->tx_desc[i];
  5538. if (!tx_desc_pool->desc_pages.cacheable_pages)
  5539. continue;
  5540. num_desc_t = dp_get_updated_tx_desc(soc->ctrl_psoc, i,
  5541. num_desc);
  5542. num_desc_per_page =
  5543. tx_desc_pool->desc_pages.num_element_per_page;
  5544. for (j = 0; j < num_desc_t; j++) {
  5545. page_id = j / num_desc_per_page;
  5546. offset = j % num_desc_per_page;
  5547. tx_desc = dp_tx_desc_find(soc, i, page_id, offset);
  5548. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  5549. if (force_free) {
  5550. dp_tx_comp_free_buf(soc, tx_desc,
  5551. false);
  5552. dp_tx_desc_release(soc, tx_desc, i);
  5553. } else {
  5554. dp_tx_desc_reset_vdev(soc, tx_desc,
  5555. i);
  5556. }
  5557. }
  5558. }
  5559. }
  5560. }
  5561. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  5562. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  5563. {
  5564. struct dp_pdev *pdev = vdev->pdev;
  5565. /* Reset TX desc associated to this Vdev as NULL */
  5566. dp_tx_desc_flush(pdev, vdev, false);
  5567. return QDF_STATUS_SUCCESS;
  5568. }
  5569. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5570. /* Pools will be allocated dynamically */
  5571. static QDF_STATUS dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  5572. int num_desc)
  5573. {
  5574. uint8_t i;
  5575. for (i = 0; i < num_pool; i++) {
  5576. qdf_spinlock_create(&soc->tx_desc[i].flow_pool_lock);
  5577. soc->tx_desc[i].status = FLOW_POOL_INACTIVE;
  5578. }
  5579. return QDF_STATUS_SUCCESS;
  5580. }
  5581. static QDF_STATUS dp_tx_init_static_pools(struct dp_soc *soc, int num_pool,
  5582. uint32_t num_desc)
  5583. {
  5584. return QDF_STATUS_SUCCESS;
  5585. }
  5586. static void dp_tx_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5587. {
  5588. }
  5589. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  5590. {
  5591. uint8_t i;
  5592. for (i = 0; i < num_pool; i++)
  5593. qdf_spinlock_destroy(&soc->tx_desc[i].flow_pool_lock);
  5594. }
  5595. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  5596. static QDF_STATUS dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  5597. uint32_t num_desc)
  5598. {
  5599. uint8_t i, count;
  5600. /* Allocate software Tx descriptor pools */
  5601. for (i = 0; i < num_pool; i++) {
  5602. if (dp_tx_desc_pool_alloc(soc, i, num_desc)) {
  5603. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5604. FL("Tx Desc Pool alloc %d failed %pK"),
  5605. i, soc);
  5606. goto fail;
  5607. }
  5608. }
  5609. return QDF_STATUS_SUCCESS;
  5610. fail:
  5611. for (count = 0; count < i; count++)
  5612. dp_tx_desc_pool_free(soc, count);
  5613. return QDF_STATUS_E_NOMEM;
  5614. }
  5615. static QDF_STATUS dp_tx_init_static_pools(struct dp_soc *soc, int num_pool,
  5616. uint32_t num_desc)
  5617. {
  5618. uint8_t i;
  5619. for (i = 0; i < num_pool; i++) {
  5620. if (dp_tx_desc_pool_init(soc, i, num_desc)) {
  5621. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5622. FL("Tx Desc Pool init %d failed %pK"),
  5623. i, soc);
  5624. return QDF_STATUS_E_NOMEM;
  5625. }
  5626. }
  5627. return QDF_STATUS_SUCCESS;
  5628. }
  5629. static void dp_tx_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5630. {
  5631. uint8_t i;
  5632. for (i = 0; i < num_pool; i++)
  5633. dp_tx_desc_pool_deinit(soc, i);
  5634. }
  5635. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  5636. {
  5637. uint8_t i;
  5638. for (i = 0; i < num_pool; i++)
  5639. dp_tx_desc_pool_free(soc, i);
  5640. }
  5641. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  5642. /**
  5643. * dp_tx_tso_cmn_desc_pool_deinit() - de-initialize TSO descriptors
  5644. * @soc: core txrx main context
  5645. * @num_pool: number of pools
  5646. *
  5647. */
  5648. static void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool)
  5649. {
  5650. dp_tx_tso_desc_pool_deinit(soc, num_pool);
  5651. dp_tx_tso_num_seg_pool_deinit(soc, num_pool);
  5652. }
  5653. /**
  5654. * dp_tx_tso_cmn_desc_pool_free() - free TSO descriptors
  5655. * @soc: core txrx main context
  5656. * @num_pool: number of pools
  5657. *
  5658. */
  5659. static void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool)
  5660. {
  5661. dp_tx_tso_desc_pool_free(soc, num_pool);
  5662. dp_tx_tso_num_seg_pool_free(soc, num_pool);
  5663. }
  5664. #ifndef WLAN_SOFTUMAC_SUPPORT
  5665. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  5666. {
  5667. uint8_t num_pool, num_ext_pool;
  5668. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5669. num_ext_pool = dp_get_ext_tx_desc_pool_num(soc);
  5670. dp_tx_tso_cmn_desc_pool_free(soc, num_pool);
  5671. dp_tx_ext_desc_pool_free(soc, num_ext_pool);
  5672. dp_tx_delete_static_pools(soc, num_pool);
  5673. }
  5674. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  5675. {
  5676. uint8_t num_pool, num_ext_pool;
  5677. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5678. num_ext_pool = dp_get_ext_tx_desc_pool_num(soc);
  5679. dp_tx_flow_control_deinit(soc);
  5680. dp_tx_tso_cmn_desc_pool_deinit(soc, num_pool);
  5681. dp_tx_ext_desc_pool_deinit(soc, num_ext_pool);
  5682. dp_tx_deinit_static_pools(soc, num_pool);
  5683. }
  5684. #else
  5685. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  5686. {
  5687. uint8_t num_pool;
  5688. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5689. dp_tx_delete_static_pools(soc, num_pool);
  5690. }
  5691. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  5692. {
  5693. uint8_t num_pool;
  5694. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5695. dp_tx_flow_control_deinit(soc);
  5696. dp_tx_deinit_static_pools(soc, num_pool);
  5697. }
  5698. #endif /*WLAN_SOFTUMAC_SUPPORT*/
  5699. /**
  5700. * dp_tx_tso_cmn_desc_pool_alloc() - TSO cmn desc pool allocator
  5701. * @soc: DP soc handle
  5702. * @num_pool: Number of pools
  5703. * @num_desc: Number of descriptors
  5704. *
  5705. * Reserve TSO descriptor buffers
  5706. *
  5707. * Return: QDF_STATUS_E_FAILURE on failure or
  5708. * QDF_STATUS_SUCCESS on success
  5709. */
  5710. static QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  5711. uint8_t num_pool,
  5712. uint32_t num_desc)
  5713. {
  5714. if (dp_tx_tso_desc_pool_alloc(soc, num_pool, num_desc)) {
  5715. dp_err("TSO Desc Pool alloc %d failed %pK", num_pool, soc);
  5716. return QDF_STATUS_E_FAILURE;
  5717. }
  5718. if (dp_tx_tso_num_seg_pool_alloc(soc, num_pool, num_desc)) {
  5719. dp_err("TSO Num of seg Pool alloc %d failed %pK",
  5720. num_pool, soc);
  5721. return QDF_STATUS_E_FAILURE;
  5722. }
  5723. return QDF_STATUS_SUCCESS;
  5724. }
  5725. /**
  5726. * dp_tx_tso_cmn_desc_pool_init() - TSO cmn desc pool init
  5727. * @soc: DP soc handle
  5728. * @num_pool: Number of pools
  5729. * @num_desc: Number of descriptors
  5730. *
  5731. * Initialize TSO descriptor pools
  5732. *
  5733. * Return: QDF_STATUS_E_FAILURE on failure or
  5734. * QDF_STATUS_SUCCESS on success
  5735. */
  5736. static QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  5737. uint8_t num_pool,
  5738. uint32_t num_desc)
  5739. {
  5740. if (dp_tx_tso_desc_pool_init(soc, num_pool, num_desc)) {
  5741. dp_err("TSO Desc Pool alloc %d failed %pK", num_pool, soc);
  5742. return QDF_STATUS_E_FAILURE;
  5743. }
  5744. if (dp_tx_tso_num_seg_pool_init(soc, num_pool, num_desc)) {
  5745. dp_err("TSO Num of seg Pool alloc %d failed %pK",
  5746. num_pool, soc);
  5747. return QDF_STATUS_E_FAILURE;
  5748. }
  5749. return QDF_STATUS_SUCCESS;
  5750. }
  5751. #ifndef WLAN_SOFTUMAC_SUPPORT
  5752. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  5753. {
  5754. uint8_t num_pool, num_ext_pool;
  5755. uint32_t num_desc;
  5756. uint32_t num_ext_desc;
  5757. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5758. num_ext_pool = dp_get_ext_tx_desc_pool_num(soc);
  5759. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5760. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5761. dp_info("Tx Desc Alloc num_pool: %d descs: %d", num_pool, num_desc);
  5762. if ((num_pool > MAX_TXDESC_POOLS) ||
  5763. (num_ext_pool > MAX_TXDESC_POOLS) ||
  5764. (num_desc > WLAN_CFG_NUM_TX_DESC_MAX))
  5765. goto fail1;
  5766. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  5767. goto fail1;
  5768. if (dp_tx_ext_desc_pool_alloc(soc, num_ext_pool, num_ext_desc))
  5769. goto fail2;
  5770. if (wlan_cfg_is_tso_desc_attach_defer(soc->wlan_cfg_ctx))
  5771. return QDF_STATUS_SUCCESS;
  5772. if (dp_tx_tso_cmn_desc_pool_alloc(soc, num_ext_pool, num_ext_desc))
  5773. goto fail3;
  5774. return QDF_STATUS_SUCCESS;
  5775. fail3:
  5776. dp_tx_ext_desc_pool_free(soc, num_ext_pool);
  5777. fail2:
  5778. dp_tx_delete_static_pools(soc, num_pool);
  5779. fail1:
  5780. return QDF_STATUS_E_RESOURCES;
  5781. }
  5782. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  5783. {
  5784. uint8_t num_pool, num_ext_pool;
  5785. uint32_t num_desc;
  5786. uint32_t num_ext_desc;
  5787. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5788. num_ext_pool = dp_get_ext_tx_desc_pool_num(soc);
  5789. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5790. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5791. if (dp_tx_init_static_pools(soc, num_pool, num_desc))
  5792. goto fail1;
  5793. if (dp_tx_ext_desc_pool_init(soc, num_ext_pool, num_ext_desc))
  5794. goto fail2;
  5795. if (wlan_cfg_is_tso_desc_attach_defer(soc->wlan_cfg_ctx))
  5796. return QDF_STATUS_SUCCESS;
  5797. if (dp_tx_tso_cmn_desc_pool_init(soc, num_ext_pool, num_ext_desc))
  5798. goto fail3;
  5799. dp_tx_flow_control_init(soc);
  5800. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  5801. return QDF_STATUS_SUCCESS;
  5802. fail3:
  5803. dp_tx_ext_desc_pool_deinit(soc, num_ext_pool);
  5804. fail2:
  5805. dp_tx_deinit_static_pools(soc, num_pool);
  5806. fail1:
  5807. return QDF_STATUS_E_RESOURCES;
  5808. }
  5809. #else
  5810. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  5811. {
  5812. uint8_t num_pool;
  5813. uint32_t num_desc;
  5814. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5815. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5816. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5817. "%s Tx Desc Alloc num_pool = %d, descs = %d",
  5818. __func__, num_pool, num_desc);
  5819. if ((num_pool > MAX_TXDESC_POOLS) ||
  5820. (num_desc > WLAN_CFG_NUM_TX_DESC_MAX))
  5821. return QDF_STATUS_E_RESOURCES;
  5822. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  5823. return QDF_STATUS_E_RESOURCES;
  5824. return QDF_STATUS_SUCCESS;
  5825. }
  5826. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  5827. {
  5828. uint8_t num_pool;
  5829. uint32_t num_desc;
  5830. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5831. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5832. if (dp_tx_init_static_pools(soc, num_pool, num_desc))
  5833. return QDF_STATUS_E_RESOURCES;
  5834. dp_tx_flow_control_init(soc);
  5835. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  5836. return QDF_STATUS_SUCCESS;
  5837. }
  5838. #endif
  5839. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc)
  5840. {
  5841. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  5842. uint8_t num_ext_desc_pool;
  5843. uint32_t num_ext_desc;
  5844. num_ext_desc_pool = dp_get_ext_tx_desc_pool_num(soc);
  5845. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5846. if (dp_tx_tso_cmn_desc_pool_alloc(soc, num_ext_desc_pool, num_ext_desc))
  5847. return QDF_STATUS_E_FAILURE;
  5848. if (dp_tx_tso_cmn_desc_pool_init(soc, num_ext_desc_pool, num_ext_desc))
  5849. return QDF_STATUS_E_FAILURE;
  5850. return QDF_STATUS_SUCCESS;
  5851. }
  5852. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc)
  5853. {
  5854. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  5855. uint8_t num_ext_desc_pool = dp_get_ext_tx_desc_pool_num(soc);
  5856. dp_tx_tso_cmn_desc_pool_deinit(soc, num_ext_desc_pool);
  5857. dp_tx_tso_cmn_desc_pool_free(soc, num_ext_desc_pool);
  5858. return QDF_STATUS_SUCCESS;
  5859. }
  5860. #ifdef CONFIG_DP_PKT_ADD_TIMESTAMP
  5861. void dp_pkt_add_timestamp(struct dp_vdev *vdev,
  5862. enum qdf_pkt_timestamp_index index, uint64_t time,
  5863. qdf_nbuf_t nbuf)
  5864. {
  5865. if (qdf_unlikely(qdf_is_dp_pkt_timestamp_enabled())) {
  5866. uint64_t tsf_time;
  5867. if (vdev->get_tsf_time) {
  5868. vdev->get_tsf_time(vdev->osif_vdev, time, &tsf_time);
  5869. qdf_add_dp_pkt_timestamp(nbuf, index, tsf_time);
  5870. }
  5871. }
  5872. }
  5873. void dp_pkt_get_timestamp(uint64_t *time)
  5874. {
  5875. if (qdf_unlikely(qdf_is_dp_pkt_timestamp_enabled()))
  5876. *time = qdf_get_log_timestamp();
  5877. }
  5878. #endif
  5879. #ifdef QCA_MULTIPASS_SUPPORT
  5880. void dp_tx_add_groupkey_metadata(struct dp_vdev *vdev,
  5881. struct dp_tx_msdu_info_s *msdu_info,
  5882. uint16_t group_key)
  5883. {
  5884. struct htt_tx_msdu_desc_ext2_t *meta_data =
  5885. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  5886. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  5887. /*
  5888. * When attempting to send a multicast packet with multi-passphrase,
  5889. * host shall add HTT EXT meta data "struct htt_tx_msdu_desc_ext2_t"
  5890. * ref htt.h indicating the group_id field in "key_flags" also having
  5891. * "valid_key_flags" as 1. Assign “key_flags = group_key_ix”.
  5892. */
  5893. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_SET(msdu_info->meta_data[0],
  5894. 1);
  5895. HTT_TX_MSDU_EXT2_DESC_KEY_FLAGS_SET(msdu_info->meta_data[2], group_key);
  5896. }
  5897. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  5898. defined(WLAN_MCAST_MLO)
  5899. /**
  5900. * dp_tx_need_mcast_reinject() - If frame needs to be processed in reinject path
  5901. * @vdev: DP vdev handle
  5902. *
  5903. * Return: true if reinject handling is required else false
  5904. */
  5905. static inline bool
  5906. dp_tx_need_mcast_reinject(struct dp_vdev *vdev)
  5907. {
  5908. if (vdev->mlo_vdev && vdev->opmode == wlan_op_mode_ap)
  5909. return true;
  5910. return false;
  5911. }
  5912. #else
  5913. static inline bool
  5914. dp_tx_need_mcast_reinject(struct dp_vdev *vdev)
  5915. {
  5916. return false;
  5917. }
  5918. #endif
  5919. /**
  5920. * dp_tx_need_multipass_process() - If frame needs multipass phrase processing
  5921. * @soc: dp soc handle
  5922. * @vdev: DP vdev handle
  5923. * @buf: frame
  5924. * @vlan_id: vlan id of frame
  5925. *
  5926. * Return: whether peer is special or classic
  5927. */
  5928. static
  5929. uint8_t dp_tx_need_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  5930. qdf_nbuf_t buf, uint16_t *vlan_id)
  5931. {
  5932. struct dp_txrx_peer *txrx_peer = NULL;
  5933. struct dp_peer *peer = NULL;
  5934. qdf_ether_header_t *eh = (qdf_ether_header_t *)qdf_nbuf_data(buf);
  5935. struct vlan_ethhdr *veh = NULL;
  5936. bool not_vlan = ((vdev->tx_encap_type == htt_cmn_pkt_type_raw) ||
  5937. (htons(eh->ether_type) != ETH_P_8021Q));
  5938. if (qdf_unlikely(not_vlan))
  5939. return DP_VLAN_UNTAGGED;
  5940. veh = (struct vlan_ethhdr *)eh;
  5941. *vlan_id = (ntohs(veh->h_vlan_TCI) & VLAN_VID_MASK);
  5942. if (qdf_unlikely(DP_FRAME_IS_MULTICAST((eh)->ether_dhost))) {
  5943. /* look for handling of multicast packets in reinject path */
  5944. if (dp_tx_need_mcast_reinject(vdev))
  5945. return DP_VLAN_UNTAGGED;
  5946. qdf_spin_lock_bh(&vdev->mpass_peer_mutex);
  5947. TAILQ_FOREACH(txrx_peer, &vdev->mpass_peer_list,
  5948. mpass_peer_list_elem) {
  5949. if (*vlan_id == txrx_peer->vlan_id) {
  5950. qdf_spin_unlock_bh(&vdev->mpass_peer_mutex);
  5951. return DP_VLAN_TAGGED_MULTICAST;
  5952. }
  5953. }
  5954. qdf_spin_unlock_bh(&vdev->mpass_peer_mutex);
  5955. return DP_VLAN_UNTAGGED;
  5956. }
  5957. peer = dp_peer_find_hash_find(soc, eh->ether_dhost, 0, DP_VDEV_ALL,
  5958. DP_MOD_ID_TX_MULTIPASS);
  5959. if (qdf_unlikely(!peer))
  5960. return DP_VLAN_UNTAGGED;
  5961. /*
  5962. * Do not drop the frame when vlan_id doesn't match.
  5963. * Send the frame as it is.
  5964. */
  5965. if (*vlan_id == peer->txrx_peer->vlan_id) {
  5966. dp_peer_unref_delete(peer, DP_MOD_ID_TX_MULTIPASS);
  5967. return DP_VLAN_TAGGED_UNICAST;
  5968. }
  5969. dp_peer_unref_delete(peer, DP_MOD_ID_TX_MULTIPASS);
  5970. return DP_VLAN_UNTAGGED;
  5971. }
  5972. #ifndef WLAN_REPEATER_NOT_SUPPORTED
  5973. static inline void
  5974. dp_tx_multipass_send_pkt_to_repeater(struct dp_soc *soc, struct dp_vdev *vdev,
  5975. qdf_nbuf_t nbuf,
  5976. struct dp_tx_msdu_info_s *msdu_info)
  5977. {
  5978. qdf_nbuf_t nbuf_copy = NULL;
  5979. /* AP can have classic clients, special clients &
  5980. * classic repeaters.
  5981. * 1. Classic clients & special client:
  5982. * Remove vlan header, find corresponding group key
  5983. * index, fill in metaheader and enqueue multicast
  5984. * frame to TCL.
  5985. * 2. Classic repeater:
  5986. * Pass through to classic repeater with vlan tag
  5987. * intact without any group key index. Hardware
  5988. * will know which key to use to send frame to
  5989. * repeater.
  5990. */
  5991. nbuf_copy = qdf_nbuf_copy(nbuf);
  5992. /*
  5993. * Send multicast frame to special peers even
  5994. * if pass through to classic repeater fails.
  5995. */
  5996. if (nbuf_copy) {
  5997. struct dp_tx_msdu_info_s msdu_info_copy;
  5998. qdf_mem_zero(&msdu_info_copy, sizeof(msdu_info_copy));
  5999. msdu_info_copy.tid = HTT_TX_EXT_TID_INVALID;
  6000. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_SET(msdu_info_copy.meta_data[0], 1);
  6001. nbuf_copy = dp_tx_send_msdu_single(vdev, nbuf_copy,
  6002. &msdu_info_copy,
  6003. HTT_INVALID_PEER, NULL);
  6004. if (nbuf_copy) {
  6005. qdf_nbuf_free(nbuf_copy);
  6006. dp_info_rl("nbuf_copy send failed");
  6007. }
  6008. }
  6009. }
  6010. #else
  6011. static inline void
  6012. dp_tx_multipass_send_pkt_to_repeater(struct dp_soc *soc, struct dp_vdev *vdev,
  6013. qdf_nbuf_t nbuf,
  6014. struct dp_tx_msdu_info_s *msdu_info)
  6015. {
  6016. }
  6017. #endif
  6018. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  6019. qdf_nbuf_t nbuf,
  6020. struct dp_tx_msdu_info_s *msdu_info)
  6021. {
  6022. uint16_t vlan_id = 0;
  6023. uint16_t group_key = 0;
  6024. uint8_t is_spcl_peer = DP_VLAN_UNTAGGED;
  6025. if (HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_GET(msdu_info->meta_data[0]))
  6026. return true;
  6027. is_spcl_peer = dp_tx_need_multipass_process(soc, vdev, nbuf, &vlan_id);
  6028. if ((is_spcl_peer != DP_VLAN_TAGGED_MULTICAST) &&
  6029. (is_spcl_peer != DP_VLAN_TAGGED_UNICAST))
  6030. return true;
  6031. if (is_spcl_peer == DP_VLAN_TAGGED_UNICAST) {
  6032. dp_tx_remove_vlan_tag(vdev, nbuf);
  6033. return true;
  6034. }
  6035. dp_tx_multipass_send_pkt_to_repeater(soc, vdev, nbuf, msdu_info);
  6036. group_key = vdev->iv_vlan_map[vlan_id];
  6037. /*
  6038. * If group key is not installed, drop the frame.
  6039. */
  6040. if (!group_key)
  6041. return false;
  6042. dp_tx_remove_vlan_tag(vdev, nbuf);
  6043. dp_tx_add_groupkey_metadata(vdev, msdu_info, group_key);
  6044. msdu_info->exception_fw = 1;
  6045. return true;
  6046. }
  6047. #endif /* QCA_MULTIPASS_SUPPORT */