qmi.c 103 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define CE_MSI_NAME "CE"
  39. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  40. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  41. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  43. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  44. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  45. #define DMS_QMI_MAX_MSG_LEN SZ_256
  46. #define MAX_SHADOW_REG_RESERVED 2
  47. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  48. MAX_SHADOW_REG_RESERVED)
  49. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  50. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  51. #ifdef CONFIG_CNSS2_DEBUG
  52. static bool ignore_qmi_failure;
  53. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  54. void cnss_ignore_qmi_failure(bool ignore)
  55. {
  56. ignore_qmi_failure = ignore;
  57. }
  58. #else
  59. #define CNSS_QMI_ASSERT() do { } while (0)
  60. void cnss_ignore_qmi_failure(bool ignore) { }
  61. #endif
  62. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  63. {
  64. switch (mode) {
  65. case CNSS_MISSION:
  66. return "MISSION";
  67. case CNSS_FTM:
  68. return "FTM";
  69. case CNSS_EPPING:
  70. return "EPPING";
  71. case CNSS_WALTEST:
  72. return "WALTEST";
  73. case CNSS_OFF:
  74. return "OFF";
  75. case CNSS_CCPM:
  76. return "CCPM";
  77. case CNSS_QVIT:
  78. return "QVIT";
  79. case CNSS_CALIBRATION:
  80. return "CALIBRATION";
  81. default:
  82. return "UNKNOWN";
  83. }
  84. }
  85. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  86. struct qmi_elem_info *req_ei,
  87. struct qmi_elem_info *rsp_ei,
  88. int req_id, size_t req_len,
  89. unsigned long timeout)
  90. {
  91. struct qmi_txn txn;
  92. int ret;
  93. char *err_msg;
  94. struct qmi_response_type_v01 *resp = rsp;
  95. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  96. if (ret < 0) {
  97. err_msg = "Qmi fail: fail to init txn,";
  98. goto out;
  99. }
  100. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  101. req_len, req_ei, req);
  102. if (ret < 0) {
  103. qmi_txn_cancel(&txn);
  104. err_msg = "Qmi fail: fail to send req,";
  105. goto out;
  106. }
  107. ret = qmi_txn_wait(&txn, timeout);
  108. if (ret < 0) {
  109. err_msg = "Qmi fail: wait timeout,";
  110. goto out;
  111. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  112. err_msg = "Qmi fail: request rejected,";
  113. cnss_pr_err("Qmi fail: respons with error:%d\n",
  114. resp->error);
  115. ret = -resp->result;
  116. goto out;
  117. }
  118. cnss_pr_dbg("req %x success\n", req_id);
  119. return 0;
  120. out:
  121. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  122. return ret;
  123. }
  124. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  125. {
  126. struct wlfw_ind_register_req_msg_v01 *req;
  127. struct wlfw_ind_register_resp_msg_v01 *resp;
  128. struct qmi_txn txn;
  129. int ret = 0;
  130. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  131. plat_priv->driver_state);
  132. req = kzalloc(sizeof(*req), GFP_KERNEL);
  133. if (!req)
  134. return -ENOMEM;
  135. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  136. if (!resp) {
  137. kfree(req);
  138. return -ENOMEM;
  139. }
  140. req->client_id_valid = 1;
  141. req->client_id = WLFW_CLIENT_ID;
  142. req->request_mem_enable_valid = 1;
  143. req->request_mem_enable = 1;
  144. req->fw_mem_ready_enable_valid = 1;
  145. req->fw_mem_ready_enable = 1;
  146. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  147. req->fw_init_done_enable_valid = 1;
  148. req->fw_init_done_enable = 1;
  149. req->pin_connect_result_enable_valid = 1;
  150. req->pin_connect_result_enable = 1;
  151. req->cal_done_enable_valid = 1;
  152. req->cal_done_enable = 1;
  153. req->qdss_trace_req_mem_enable_valid = 1;
  154. req->qdss_trace_req_mem_enable = 1;
  155. req->qdss_trace_save_enable_valid = 1;
  156. req->qdss_trace_save_enable = 1;
  157. req->qdss_trace_free_enable_valid = 1;
  158. req->qdss_trace_free_enable = 1;
  159. req->respond_get_info_enable_valid = 1;
  160. req->respond_get_info_enable = 1;
  161. req->wfc_call_twt_config_enable_valid = 1;
  162. req->wfc_call_twt_config_enable = 1;
  163. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  164. wlfw_ind_register_resp_msg_v01_ei, resp);
  165. if (ret < 0) {
  166. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  167. ret);
  168. goto out;
  169. }
  170. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  171. QMI_WLFW_IND_REGISTER_REQ_V01,
  172. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  173. wlfw_ind_register_req_msg_v01_ei, req);
  174. if (ret < 0) {
  175. qmi_txn_cancel(&txn);
  176. cnss_pr_err("Failed to send indication register request, err: %d\n",
  177. ret);
  178. goto out;
  179. }
  180. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  181. if (ret < 0) {
  182. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  183. ret);
  184. goto out;
  185. }
  186. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  187. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  188. resp->resp.result, resp->resp.error);
  189. ret = -resp->resp.result;
  190. goto out;
  191. }
  192. if (resp->fw_status_valid) {
  193. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  194. ret = -EALREADY;
  195. goto qmi_registered;
  196. }
  197. }
  198. kfree(req);
  199. kfree(resp);
  200. return 0;
  201. out:
  202. CNSS_QMI_ASSERT();
  203. qmi_registered:
  204. kfree(req);
  205. kfree(resp);
  206. return ret;
  207. }
  208. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  209. struct wlfw_host_cap_req_msg_v01 *req)
  210. {
  211. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  212. plat_priv->device_id == MANGO_DEVICE_ID ||
  213. plat_priv->device_id == PEACH_DEVICE_ID) {
  214. req->mlo_capable_valid = 1;
  215. req->mlo_capable = 1;
  216. req->mlo_chip_id_valid = 1;
  217. req->mlo_chip_id = 0;
  218. req->mlo_group_id_valid = 1;
  219. req->mlo_group_id = 0;
  220. req->max_mlo_peer_valid = 1;
  221. /* Max peer number generally won't change for the same device
  222. * but needs to be synced with host driver.
  223. */
  224. req->max_mlo_peer = 32;
  225. req->mlo_num_chips_valid = 1;
  226. req->mlo_num_chips = 1;
  227. req->mlo_chip_info_valid = 1;
  228. req->mlo_chip_info[0].chip_id = 0;
  229. req->mlo_chip_info[0].num_local_links = 2;
  230. req->mlo_chip_info[0].hw_link_id[0] = 0;
  231. req->mlo_chip_info[0].hw_link_id[1] = 1;
  232. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  233. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  234. }
  235. }
  236. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  237. {
  238. struct wlfw_host_cap_req_msg_v01 *req;
  239. struct wlfw_host_cap_resp_msg_v01 *resp;
  240. struct qmi_txn txn;
  241. int ret = 0;
  242. u64 iova_start = 0, iova_size = 0,
  243. iova_ipa_start = 0, iova_ipa_size = 0;
  244. u64 feature_list = 0;
  245. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  246. plat_priv->driver_state);
  247. req = kzalloc(sizeof(*req), GFP_KERNEL);
  248. if (!req)
  249. return -ENOMEM;
  250. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  251. if (!resp) {
  252. kfree(req);
  253. return -ENOMEM;
  254. }
  255. req->num_clients_valid = 1;
  256. req->num_clients = 1;
  257. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  258. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  259. if (req->wake_msi) {
  260. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  261. req->wake_msi_valid = 1;
  262. }
  263. req->bdf_support_valid = 1;
  264. req->bdf_support = 1;
  265. req->m3_support_valid = 1;
  266. req->m3_support = 1;
  267. req->m3_cache_support_valid = 1;
  268. req->m3_cache_support = 1;
  269. req->cal_done_valid = 1;
  270. req->cal_done = plat_priv->cal_done;
  271. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  272. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  273. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  274. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  275. &iova_ipa_size)) {
  276. req->ddr_range_valid = 1;
  277. req->ddr_range[0].start = iova_start;
  278. req->ddr_range[0].size = iova_size + iova_ipa_size;
  279. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  280. req->ddr_range[0].start, req->ddr_range[0].size);
  281. }
  282. req->host_build_type_valid = 1;
  283. req->host_build_type = cnss_get_host_build_type();
  284. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  285. ret = cnss_get_feature_list(plat_priv, &feature_list);
  286. if (!ret) {
  287. req->feature_list_valid = 1;
  288. req->feature_list = feature_list;
  289. cnss_pr_dbg("Sending feature list 0x%llx\n",
  290. req->feature_list);
  291. }
  292. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  293. wlfw_host_cap_resp_msg_v01_ei, resp);
  294. if (ret < 0) {
  295. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  296. ret);
  297. goto out;
  298. }
  299. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  300. QMI_WLFW_HOST_CAP_REQ_V01,
  301. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  302. wlfw_host_cap_req_msg_v01_ei, req);
  303. if (ret < 0) {
  304. qmi_txn_cancel(&txn);
  305. cnss_pr_err("Failed to send host capability request, err: %d\n",
  306. ret);
  307. goto out;
  308. }
  309. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  310. if (ret < 0) {
  311. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  312. ret);
  313. goto out;
  314. }
  315. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  316. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  317. resp->resp.result, resp->resp.error);
  318. ret = -resp->resp.result;
  319. goto out;
  320. }
  321. kfree(req);
  322. kfree(resp);
  323. return 0;
  324. out:
  325. CNSS_QMI_ASSERT();
  326. kfree(req);
  327. kfree(resp);
  328. return ret;
  329. }
  330. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  331. {
  332. struct wlfw_respond_mem_req_msg_v01 *req;
  333. struct wlfw_respond_mem_resp_msg_v01 *resp;
  334. struct qmi_txn txn;
  335. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  336. int ret = 0, i;
  337. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  338. plat_priv->driver_state);
  339. req = kzalloc(sizeof(*req), GFP_KERNEL);
  340. if (!req)
  341. return -ENOMEM;
  342. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  343. if (!resp) {
  344. kfree(req);
  345. return -ENOMEM;
  346. }
  347. if (plat_priv->fw_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  348. cnss_pr_err("Invalid seg len %u\n", plat_priv->fw_mem_seg_len);
  349. ret = -EINVAL;
  350. goto out;
  351. }
  352. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  353. for (i = 0; i < req->mem_seg_len; i++) {
  354. if (!fw_mem[i].pa || !fw_mem[i].size) {
  355. if (fw_mem[i].type == 0) {
  356. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  357. i);
  358. ret = -EINVAL;
  359. goto out;
  360. }
  361. cnss_pr_err("Memory for FW is not available for type: %u\n",
  362. fw_mem[i].type);
  363. ret = -ENOMEM;
  364. goto out;
  365. }
  366. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  367. fw_mem[i].va, &fw_mem[i].pa,
  368. fw_mem[i].size, fw_mem[i].type);
  369. req->mem_seg[i].addr = fw_mem[i].pa;
  370. req->mem_seg[i].size = fw_mem[i].size;
  371. req->mem_seg[i].type = fw_mem[i].type;
  372. }
  373. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  374. wlfw_respond_mem_resp_msg_v01_ei, resp);
  375. if (ret < 0) {
  376. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  377. ret);
  378. goto out;
  379. }
  380. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  381. QMI_WLFW_RESPOND_MEM_REQ_V01,
  382. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  383. wlfw_respond_mem_req_msg_v01_ei, req);
  384. if (ret < 0) {
  385. qmi_txn_cancel(&txn);
  386. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  387. ret);
  388. goto out;
  389. }
  390. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  391. if (ret < 0) {
  392. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  393. ret);
  394. goto out;
  395. }
  396. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  397. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  398. resp->resp.result, resp->resp.error);
  399. ret = -resp->resp.result;
  400. goto out;
  401. }
  402. kfree(req);
  403. kfree(resp);
  404. return 0;
  405. out:
  406. CNSS_QMI_ASSERT();
  407. kfree(req);
  408. kfree(resp);
  409. return ret;
  410. }
  411. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  412. {
  413. struct wlfw_cap_req_msg_v01 *req;
  414. struct wlfw_cap_resp_msg_v01 *resp;
  415. struct qmi_txn txn;
  416. char *fw_build_timestamp;
  417. int ret = 0, i;
  418. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  419. plat_priv->driver_state);
  420. req = kzalloc(sizeof(*req), GFP_KERNEL);
  421. if (!req)
  422. return -ENOMEM;
  423. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  424. if (!resp) {
  425. kfree(req);
  426. return -ENOMEM;
  427. }
  428. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  429. wlfw_cap_resp_msg_v01_ei, resp);
  430. if (ret < 0) {
  431. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  432. ret);
  433. goto out;
  434. }
  435. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  436. QMI_WLFW_CAP_REQ_V01,
  437. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  438. wlfw_cap_req_msg_v01_ei, req);
  439. if (ret < 0) {
  440. qmi_txn_cancel(&txn);
  441. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  442. ret);
  443. goto out;
  444. }
  445. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  446. if (ret < 0) {
  447. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  448. ret);
  449. goto out;
  450. }
  451. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  452. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  453. resp->resp.result, resp->resp.error);
  454. ret = -resp->resp.result;
  455. goto out;
  456. }
  457. if (resp->chip_info_valid) {
  458. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  459. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  460. }
  461. if (resp->board_info_valid)
  462. plat_priv->board_info.board_id = resp->board_info.board_id;
  463. else
  464. plat_priv->board_info.board_id = 0xFF;
  465. if (resp->soc_info_valid)
  466. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  467. if (resp->fw_version_info_valid) {
  468. plat_priv->fw_version_info.fw_version =
  469. resp->fw_version_info.fw_version;
  470. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  471. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  472. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  473. resp->fw_version_info.fw_build_timestamp,
  474. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  475. }
  476. if (resp->fw_build_id_valid) {
  477. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  478. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  479. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  480. }
  481. /* FW will send aop retention volatage for qca6490 */
  482. if (resp->voltage_mv_valid) {
  483. plat_priv->cpr_info.voltage = resp->voltage_mv;
  484. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  485. plat_priv->cpr_info.voltage);
  486. cnss_update_cpr_info(plat_priv);
  487. }
  488. if (resp->time_freq_hz_valid) {
  489. plat_priv->device_freq_hz = resp->time_freq_hz;
  490. cnss_pr_dbg("Device frequency is %d HZ\n",
  491. plat_priv->device_freq_hz);
  492. }
  493. if (resp->otp_version_valid)
  494. plat_priv->otp_version = resp->otp_version;
  495. if (resp->dev_mem_info_valid) {
  496. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  497. plat_priv->dev_mem_info[i].start =
  498. resp->dev_mem_info[i].start;
  499. plat_priv->dev_mem_info[i].size =
  500. resp->dev_mem_info[i].size;
  501. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  502. i, plat_priv->dev_mem_info[i].start,
  503. plat_priv->dev_mem_info[i].size);
  504. }
  505. }
  506. if (resp->fw_caps_valid) {
  507. plat_priv->fw_pcie_gen_switch =
  508. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  509. plat_priv->fw_caps = resp->fw_caps;
  510. }
  511. if (resp->hang_data_length_valid &&
  512. resp->hang_data_length &&
  513. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  514. plat_priv->hang_event_data_len = resp->hang_data_length;
  515. else
  516. plat_priv->hang_event_data_len = 0;
  517. if (resp->hang_data_addr_offset_valid)
  518. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  519. else
  520. plat_priv->hang_data_addr_offset = 0;
  521. if (resp->hwid_bitmap_valid)
  522. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  523. if (resp->ol_cpr_cfg_valid)
  524. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  525. /* Disable WLAN PDC in AOP firmware for boards which support on chip PMIC
  526. * so AOP will ignore SW_CTRL changes and do not update regulator votes.
  527. **/
  528. for (i = 0; i < plat_priv->on_chip_pmic_devices_count; i++) {
  529. if (plat_priv->board_info.board_id ==
  530. plat_priv->on_chip_pmic_board_ids[i]) {
  531. cnss_pr_dbg("Disabling WLAN PDC for board_id: %02x\n",
  532. plat_priv->board_info.board_id);
  533. ret = cnss_aop_send_msg(plat_priv,
  534. "{class: wlan_pdc, ss: rf, res: pdc, enable: 0}");
  535. if (ret < 0)
  536. cnss_pr_dbg("Failed to Send AOP Msg");
  537. break;
  538. }
  539. }
  540. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  541. plat_priv->chip_info.chip_id,
  542. plat_priv->chip_info.chip_family,
  543. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  544. plat_priv->otp_version);
  545. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  546. plat_priv->fw_version_info.fw_version,
  547. plat_priv->fw_version_info.fw_build_timestamp,
  548. plat_priv->fw_build_id,
  549. plat_priv->hwid_bitmap);
  550. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  551. plat_priv->hang_event_data_len,
  552. plat_priv->hang_data_addr_offset);
  553. kfree(req);
  554. kfree(resp);
  555. return 0;
  556. out:
  557. CNSS_QMI_ASSERT();
  558. kfree(req);
  559. kfree(resp);
  560. return ret;
  561. }
  562. static char *cnss_bdf_type_to_str(enum cnss_bdf_type bdf_type)
  563. {
  564. switch (bdf_type) {
  565. case CNSS_BDF_BIN:
  566. case CNSS_BDF_ELF:
  567. return "BDF";
  568. case CNSS_BDF_REGDB:
  569. return "REGDB";
  570. case CNSS_BDF_HDS:
  571. return "HDS";
  572. default:
  573. return "UNKNOWN";
  574. }
  575. }
  576. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  577. u32 bdf_type, char *filename,
  578. u32 filename_len)
  579. {
  580. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  581. int ret = 0;
  582. switch (bdf_type) {
  583. case CNSS_BDF_ELF:
  584. /* Board ID will be equal or less than 0xFF in GF mask case */
  585. if (plat_priv->board_info.board_id == 0xFF) {
  586. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  587. snprintf(filename_tmp, filename_len,
  588. ELF_BDF_FILE_NAME_GF);
  589. else
  590. snprintf(filename_tmp, filename_len,
  591. ELF_BDF_FILE_NAME);
  592. } else if (plat_priv->board_info.board_id < 0xFF) {
  593. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  594. snprintf(filename_tmp, filename_len,
  595. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  596. plat_priv->board_info.board_id);
  597. else
  598. snprintf(filename_tmp, filename_len,
  599. ELF_BDF_FILE_NAME_PREFIX "%02x",
  600. plat_priv->board_info.board_id);
  601. } else {
  602. snprintf(filename_tmp, filename_len,
  603. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  604. plat_priv->board_info.board_id >> 8 & 0xFF,
  605. plat_priv->board_info.board_id & 0xFF);
  606. }
  607. break;
  608. case CNSS_BDF_BIN:
  609. if (plat_priv->board_info.board_id == 0xFF) {
  610. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  611. snprintf(filename_tmp, filename_len,
  612. BIN_BDF_FILE_NAME_GF);
  613. else
  614. snprintf(filename_tmp, filename_len,
  615. BIN_BDF_FILE_NAME);
  616. } else if (plat_priv->board_info.board_id < 0xFF) {
  617. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  618. snprintf(filename_tmp, filename_len,
  619. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  620. plat_priv->board_info.board_id);
  621. else
  622. snprintf(filename_tmp, filename_len,
  623. BIN_BDF_FILE_NAME_PREFIX "%02x",
  624. plat_priv->board_info.board_id);
  625. } else {
  626. snprintf(filename_tmp, filename_len,
  627. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  628. plat_priv->board_info.board_id >> 8 & 0xFF,
  629. plat_priv->board_info.board_id & 0xFF);
  630. }
  631. break;
  632. case CNSS_BDF_REGDB:
  633. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  634. break;
  635. case CNSS_BDF_HDS:
  636. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  637. break;
  638. default:
  639. cnss_pr_err("Invalid BDF type: %d\n",
  640. plat_priv->ctrl_params.bdf_type);
  641. ret = -EINVAL;
  642. break;
  643. }
  644. if (!ret)
  645. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  646. return ret;
  647. }
  648. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  649. enum wlfw_ini_file_type_v01 file_type)
  650. {
  651. struct wlfw_ini_file_download_req_msg_v01 *req;
  652. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  653. struct qmi_txn txn;
  654. int ret = 0;
  655. const struct firmware *fw;
  656. char filename[INI_FILE_NAME_LEN] = {0};
  657. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  658. const u8 *temp;
  659. unsigned int remaining;
  660. bool backup_supported = false;
  661. req = kzalloc(sizeof(*req), GFP_KERNEL);
  662. if (!req)
  663. return -ENOMEM;
  664. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  665. if (!resp) {
  666. kfree(req);
  667. return -ENOMEM;
  668. }
  669. switch (file_type) {
  670. case WLFW_CONN_ROAM_INI_V01:
  671. snprintf(tmp_filename, sizeof(tmp_filename),
  672. CONN_ROAM_FILE_NAME);
  673. backup_supported = true;
  674. break;
  675. default:
  676. cnss_pr_err("Invalid file type: %u\n", file_type);
  677. ret = -EINVAL;
  678. goto err_req_fw;
  679. }
  680. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  681. /* Fetch the file */
  682. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  683. if (ret) {
  684. if (!backup_supported)
  685. goto err_req_fw;
  686. snprintf(filename, sizeof(filename),
  687. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  688. ret = firmware_request_nowarn(&fw, filename,
  689. &plat_priv->plat_dev->dev);
  690. if (ret)
  691. goto err_req_fw;
  692. }
  693. temp = fw->data;
  694. remaining = fw->size;
  695. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  696. remaining);
  697. while (remaining) {
  698. req->file_type_valid = 1;
  699. req->file_type = file_type;
  700. req->total_size_valid = 1;
  701. req->total_size = remaining;
  702. req->seg_id_valid = 1;
  703. req->data_valid = 1;
  704. req->end_valid = 1;
  705. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  706. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  707. } else {
  708. req->data_len = remaining;
  709. req->end = 1;
  710. }
  711. memcpy(req->data, temp, req->data_len);
  712. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  713. wlfw_ini_file_download_resp_msg_v01_ei,
  714. resp);
  715. if (ret < 0) {
  716. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  717. ret);
  718. goto err;
  719. }
  720. ret = qmi_send_request
  721. (&plat_priv->qmi_wlfw, NULL, &txn,
  722. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  723. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  724. wlfw_ini_file_download_req_msg_v01_ei, req);
  725. if (ret < 0) {
  726. qmi_txn_cancel(&txn);
  727. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  728. ret);
  729. goto err;
  730. }
  731. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  732. if (ret < 0) {
  733. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  734. ret);
  735. goto err;
  736. }
  737. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  738. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  739. resp->resp.result, resp->resp.error);
  740. ret = -resp->resp.result;
  741. goto err;
  742. }
  743. remaining -= req->data_len;
  744. temp += req->data_len;
  745. req->seg_id++;
  746. }
  747. release_firmware(fw);
  748. kfree(req);
  749. kfree(resp);
  750. return 0;
  751. err:
  752. release_firmware(fw);
  753. err_req_fw:
  754. kfree(req);
  755. kfree(resp);
  756. return ret;
  757. }
  758. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  759. u32 bdf_type)
  760. {
  761. struct wlfw_bdf_download_req_msg_v01 *req;
  762. struct wlfw_bdf_download_resp_msg_v01 *resp;
  763. struct qmi_txn txn;
  764. char filename[MAX_FIRMWARE_NAME_LEN];
  765. const struct firmware *fw_entry = NULL;
  766. const u8 *temp;
  767. unsigned int remaining;
  768. int ret = 0;
  769. cnss_pr_dbg("Sending QMI_WLFW_BDF_DOWNLOAD_REQ_V01 message for bdf_type: %d (%s), state: 0x%lx\n",
  770. bdf_type, cnss_bdf_type_to_str(bdf_type), plat_priv->driver_state);
  771. req = kzalloc(sizeof(*req), GFP_KERNEL);
  772. if (!req)
  773. return -ENOMEM;
  774. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  775. if (!resp) {
  776. kfree(req);
  777. return -ENOMEM;
  778. }
  779. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  780. filename, sizeof(filename));
  781. if (ret)
  782. goto err_req_fw;
  783. if (bdf_type == CNSS_BDF_REGDB)
  784. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  785. filename);
  786. else
  787. ret = firmware_request_nowarn(&fw_entry, filename,
  788. &plat_priv->plat_dev->dev);
  789. if (ret) {
  790. cnss_pr_err("Failed to load %s: %s, ret: %d\n",
  791. cnss_bdf_type_to_str(bdf_type), filename, ret);
  792. goto err_req_fw;
  793. }
  794. temp = fw_entry->data;
  795. remaining = fw_entry->size;
  796. cnss_pr_dbg("Downloading %s: %s, size: %u\n",
  797. cnss_bdf_type_to_str(bdf_type), filename, remaining);
  798. while (remaining) {
  799. req->valid = 1;
  800. req->file_id_valid = 1;
  801. req->file_id = plat_priv->board_info.board_id;
  802. req->total_size_valid = 1;
  803. req->total_size = remaining;
  804. req->seg_id_valid = 1;
  805. req->data_valid = 1;
  806. req->end_valid = 1;
  807. req->bdf_type_valid = 1;
  808. req->bdf_type = bdf_type;
  809. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  810. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  811. } else {
  812. req->data_len = remaining;
  813. req->end = 1;
  814. }
  815. memcpy(req->data, temp, req->data_len);
  816. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  817. wlfw_bdf_download_resp_msg_v01_ei, resp);
  818. if (ret < 0) {
  819. cnss_pr_err("Failed to initialize txn for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  820. cnss_bdf_type_to_str(bdf_type), ret);
  821. goto err_send;
  822. }
  823. ret = qmi_send_request
  824. (&plat_priv->qmi_wlfw, NULL, &txn,
  825. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  826. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  827. wlfw_bdf_download_req_msg_v01_ei, req);
  828. if (ret < 0) {
  829. qmi_txn_cancel(&txn);
  830. cnss_pr_err("Failed to send QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  831. cnss_bdf_type_to_str(bdf_type), ret);
  832. goto err_send;
  833. }
  834. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  835. if (ret < 0) {
  836. cnss_pr_err("Timeout while waiting for FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, err: %d\n",
  837. cnss_bdf_type_to_str(bdf_type), ret);
  838. goto err_send;
  839. }
  840. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  841. cnss_pr_err("FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s failed, result: %d, err: %d\n",
  842. cnss_bdf_type_to_str(bdf_type), resp->resp.result,
  843. resp->resp.error);
  844. ret = -resp->resp.result;
  845. goto err_send;
  846. }
  847. remaining -= req->data_len;
  848. temp += req->data_len;
  849. req->seg_id++;
  850. }
  851. release_firmware(fw_entry);
  852. if (resp->host_bdf_data_valid) {
  853. /* QCA6490 enable S3E regulator for IPA configuration only */
  854. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  855. cnss_enable_int_pow_amp_vreg(plat_priv);
  856. plat_priv->cbc_file_download =
  857. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  858. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  859. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  860. plat_priv->cbc_file_download);
  861. }
  862. kfree(req);
  863. kfree(resp);
  864. return 0;
  865. err_send:
  866. release_firmware(fw_entry);
  867. err_req_fw:
  868. if (!(bdf_type == CNSS_BDF_REGDB ||
  869. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  870. ret == -EAGAIN))
  871. CNSS_QMI_ASSERT();
  872. kfree(req);
  873. kfree(resp);
  874. return ret;
  875. }
  876. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  877. {
  878. struct wlfw_m3_info_req_msg_v01 *req;
  879. struct wlfw_m3_info_resp_msg_v01 *resp;
  880. struct qmi_txn txn;
  881. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  882. int ret = 0;
  883. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  884. plat_priv->driver_state);
  885. req = kzalloc(sizeof(*req), GFP_KERNEL);
  886. if (!req)
  887. return -ENOMEM;
  888. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  889. if (!resp) {
  890. kfree(req);
  891. return -ENOMEM;
  892. }
  893. if (!m3_mem->pa || !m3_mem->size) {
  894. cnss_pr_err("Memory for M3 is not available\n");
  895. ret = -ENOMEM;
  896. goto out;
  897. }
  898. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  899. m3_mem->va, &m3_mem->pa, m3_mem->size);
  900. req->addr = plat_priv->m3_mem.pa;
  901. req->size = plat_priv->m3_mem.size;
  902. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  903. wlfw_m3_info_resp_msg_v01_ei, resp);
  904. if (ret < 0) {
  905. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  906. ret);
  907. goto out;
  908. }
  909. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  910. QMI_WLFW_M3_INFO_REQ_V01,
  911. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  912. wlfw_m3_info_req_msg_v01_ei, req);
  913. if (ret < 0) {
  914. qmi_txn_cancel(&txn);
  915. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  916. ret);
  917. goto out;
  918. }
  919. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  920. if (ret < 0) {
  921. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  922. ret);
  923. goto out;
  924. }
  925. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  926. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  927. resp->resp.result, resp->resp.error);
  928. ret = -resp->resp.result;
  929. goto out;
  930. }
  931. kfree(req);
  932. kfree(resp);
  933. return 0;
  934. out:
  935. CNSS_QMI_ASSERT();
  936. kfree(req);
  937. kfree(resp);
  938. return ret;
  939. }
  940. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  941. u8 *mac, u32 mac_len)
  942. {
  943. struct wlfw_mac_addr_req_msg_v01 req;
  944. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  945. struct qmi_txn txn;
  946. int ret;
  947. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  948. return -EINVAL;
  949. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  950. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  951. if (ret < 0) {
  952. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  953. ret);
  954. ret = -EIO;
  955. goto out;
  956. }
  957. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  958. mac, plat_priv->driver_state);
  959. memcpy(req.mac_addr, mac, mac_len);
  960. req.mac_addr_valid = 1;
  961. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  962. QMI_WLFW_MAC_ADDR_REQ_V01,
  963. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  964. wlfw_mac_addr_req_msg_v01_ei, &req);
  965. if (ret < 0) {
  966. qmi_txn_cancel(&txn);
  967. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  968. ret = -EIO;
  969. goto out;
  970. }
  971. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  972. if (ret < 0) {
  973. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  974. ret);
  975. ret = -EIO;
  976. goto out;
  977. }
  978. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  979. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  980. resp.resp.result);
  981. ret = -resp.resp.result;
  982. }
  983. out:
  984. return ret;
  985. }
  986. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  987. u32 total_size)
  988. {
  989. int ret = 0;
  990. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  991. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  992. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  993. unsigned int remaining;
  994. struct qmi_txn txn;
  995. cnss_pr_dbg("%s\n", __func__);
  996. req = kzalloc(sizeof(*req), GFP_KERNEL);
  997. if (!req)
  998. return -ENOMEM;
  999. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1000. if (!resp) {
  1001. kfree(req);
  1002. return -ENOMEM;
  1003. }
  1004. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  1005. if (!p_qdss_trace_data) {
  1006. ret = ENOMEM;
  1007. goto end;
  1008. }
  1009. remaining = total_size;
  1010. p_qdss_trace_data_temp = p_qdss_trace_data;
  1011. while (remaining && resp->end == 0) {
  1012. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1013. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  1014. if (ret < 0) {
  1015. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  1016. ret);
  1017. goto fail;
  1018. }
  1019. ret = qmi_send_request
  1020. (&plat_priv->qmi_wlfw, NULL, &txn,
  1021. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  1022. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  1023. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  1024. if (ret < 0) {
  1025. qmi_txn_cancel(&txn);
  1026. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  1027. ret);
  1028. goto fail;
  1029. }
  1030. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1031. if (ret < 0) {
  1032. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  1033. ret);
  1034. goto fail;
  1035. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1036. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1037. resp->resp.result, resp->resp.error);
  1038. ret = -resp->resp.result;
  1039. goto fail;
  1040. } else {
  1041. ret = 0;
  1042. }
  1043. cnss_pr_dbg("%s: response total size %d data len %d",
  1044. __func__, resp->total_size, resp->data_len);
  1045. if ((resp->total_size_valid == 1 &&
  1046. resp->total_size == total_size) &&
  1047. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1048. (resp->data_valid == 1 &&
  1049. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01) &&
  1050. resp->data_len <= remaining) {
  1051. memcpy(p_qdss_trace_data_temp,
  1052. resp->data, resp->data_len);
  1053. } else {
  1054. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1055. __func__,
  1056. total_size, req->seg_id,
  1057. resp->total_size_valid,
  1058. resp->total_size,
  1059. resp->seg_id_valid,
  1060. resp->seg_id,
  1061. resp->data_valid,
  1062. resp->data_len);
  1063. ret = -1;
  1064. goto fail;
  1065. }
  1066. remaining -= resp->data_len;
  1067. p_qdss_trace_data_temp += resp->data_len;
  1068. req->seg_id++;
  1069. }
  1070. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1071. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1072. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1073. total_size);
  1074. if (ret < 0) {
  1075. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1076. ret);
  1077. ret = -1;
  1078. goto fail;
  1079. }
  1080. } else {
  1081. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1082. __func__,
  1083. remaining, resp->end_valid, resp->end);
  1084. ret = -1;
  1085. goto fail;
  1086. }
  1087. fail:
  1088. kfree(p_qdss_trace_data);
  1089. end:
  1090. kfree(req);
  1091. kfree(resp);
  1092. return ret;
  1093. }
  1094. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1095. char *filename, u32 filename_len)
  1096. {
  1097. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1098. char *debug_str = QDSS_DEBUG_FILE_STR;
  1099. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1100. plat_priv->device_id == MANGO_DEVICE_ID ||
  1101. plat_priv->device_id == PEACH_DEVICE_ID)
  1102. debug_str = "";
  1103. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1104. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1105. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1106. else
  1107. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1108. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1109. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1110. }
  1111. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1112. {
  1113. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1114. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1115. struct qmi_txn txn;
  1116. const struct firmware *fw_entry = NULL;
  1117. const u8 *temp;
  1118. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1119. unsigned int remaining;
  1120. int ret = 0;
  1121. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1122. plat_priv->driver_state);
  1123. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1124. if (!req)
  1125. return -ENOMEM;
  1126. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1127. if (!resp) {
  1128. kfree(req);
  1129. return -ENOMEM;
  1130. }
  1131. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1132. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1133. qdss_cfg_filename);
  1134. if (ret) {
  1135. cnss_pr_dbg("Unable to load %s\n",
  1136. qdss_cfg_filename);
  1137. goto err_req_fw;
  1138. }
  1139. temp = fw_entry->data;
  1140. remaining = fw_entry->size;
  1141. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1142. qdss_cfg_filename, remaining);
  1143. while (remaining) {
  1144. req->total_size_valid = 1;
  1145. req->total_size = remaining;
  1146. req->seg_id_valid = 1;
  1147. req->data_valid = 1;
  1148. req->end_valid = 1;
  1149. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1150. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1151. } else {
  1152. req->data_len = remaining;
  1153. req->end = 1;
  1154. }
  1155. memcpy(req->data, temp, req->data_len);
  1156. ret = qmi_txn_init
  1157. (&plat_priv->qmi_wlfw, &txn,
  1158. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1159. resp);
  1160. if (ret < 0) {
  1161. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1162. ret);
  1163. goto err_send;
  1164. }
  1165. ret = qmi_send_request
  1166. (&plat_priv->qmi_wlfw, NULL, &txn,
  1167. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1168. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1169. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1170. if (ret < 0) {
  1171. qmi_txn_cancel(&txn);
  1172. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1173. ret);
  1174. goto err_send;
  1175. }
  1176. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1177. if (ret < 0) {
  1178. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1179. ret);
  1180. goto err_send;
  1181. }
  1182. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1183. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1184. resp->resp.result, resp->resp.error);
  1185. ret = -resp->resp.result;
  1186. goto err_send;
  1187. }
  1188. remaining -= req->data_len;
  1189. temp += req->data_len;
  1190. req->seg_id++;
  1191. }
  1192. release_firmware(fw_entry);
  1193. kfree(req);
  1194. kfree(resp);
  1195. return 0;
  1196. err_send:
  1197. release_firmware(fw_entry);
  1198. err_req_fw:
  1199. kfree(req);
  1200. kfree(resp);
  1201. return ret;
  1202. }
  1203. static int wlfw_send_qdss_trace_mode_req
  1204. (struct cnss_plat_data *plat_priv,
  1205. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1206. unsigned long long option)
  1207. {
  1208. int rc = 0;
  1209. int tmp = 0;
  1210. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1211. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1212. struct qmi_txn txn;
  1213. if (!plat_priv)
  1214. return -ENODEV;
  1215. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1216. if (!req)
  1217. return -ENOMEM;
  1218. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1219. if (!resp) {
  1220. kfree(req);
  1221. return -ENOMEM;
  1222. }
  1223. req->mode_valid = 1;
  1224. req->mode = mode;
  1225. req->option_valid = 1;
  1226. req->option = option;
  1227. tmp = plat_priv->hw_trc_override;
  1228. req->hw_trc_disable_override_valid = 1;
  1229. req->hw_trc_disable_override =
  1230. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1231. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1232. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1233. __func__, mode, option, req->hw_trc_disable_override);
  1234. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1235. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1236. if (rc < 0) {
  1237. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1238. rc);
  1239. goto out;
  1240. }
  1241. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1242. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1243. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1244. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1245. if (rc < 0) {
  1246. qmi_txn_cancel(&txn);
  1247. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1248. goto out;
  1249. }
  1250. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1251. if (rc < 0) {
  1252. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1253. rc);
  1254. goto out;
  1255. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1256. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1257. resp->resp.result, resp->resp.error);
  1258. rc = -resp->resp.result;
  1259. goto out;
  1260. }
  1261. kfree(resp);
  1262. kfree(req);
  1263. return rc;
  1264. out:
  1265. kfree(resp);
  1266. kfree(req);
  1267. CNSS_QMI_ASSERT();
  1268. return rc;
  1269. }
  1270. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1271. {
  1272. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1273. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1274. }
  1275. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1276. {
  1277. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1278. option);
  1279. }
  1280. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1281. enum cnss_driver_mode mode)
  1282. {
  1283. struct wlfw_wlan_mode_req_msg_v01 *req;
  1284. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1285. struct qmi_txn txn;
  1286. int ret = 0;
  1287. if (!plat_priv)
  1288. return -ENODEV;
  1289. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1290. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1291. if (mode == CNSS_OFF &&
  1292. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1293. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1294. return 0;
  1295. }
  1296. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1297. if (!req)
  1298. return -ENOMEM;
  1299. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1300. if (!resp) {
  1301. kfree(req);
  1302. return -ENOMEM;
  1303. }
  1304. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1305. req->hw_debug_valid = 1;
  1306. req->hw_debug = 0;
  1307. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1308. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1309. if (ret < 0) {
  1310. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1311. cnss_qmi_mode_to_str(mode), mode, ret);
  1312. goto out;
  1313. }
  1314. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1315. QMI_WLFW_WLAN_MODE_REQ_V01,
  1316. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1317. wlfw_wlan_mode_req_msg_v01_ei, req);
  1318. if (ret < 0) {
  1319. qmi_txn_cancel(&txn);
  1320. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1321. cnss_qmi_mode_to_str(mode), mode, ret);
  1322. goto out;
  1323. }
  1324. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1325. if (ret < 0) {
  1326. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1327. cnss_qmi_mode_to_str(mode), mode, ret);
  1328. goto out;
  1329. }
  1330. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1331. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1332. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1333. resp->resp.error);
  1334. ret = -resp->resp.result;
  1335. goto out;
  1336. }
  1337. kfree(req);
  1338. kfree(resp);
  1339. return 0;
  1340. out:
  1341. if (mode == CNSS_OFF) {
  1342. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1343. ret = 0;
  1344. } else {
  1345. CNSS_QMI_ASSERT();
  1346. }
  1347. kfree(req);
  1348. kfree(resp);
  1349. return ret;
  1350. }
  1351. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1352. struct cnss_wlan_enable_cfg *config,
  1353. const char *host_version)
  1354. {
  1355. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1356. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1357. struct qmi_txn txn;
  1358. u32 i, ce_id, num_vectors, user_base_data, base_vector;
  1359. int ret = 0;
  1360. if (!plat_priv)
  1361. return -ENODEV;
  1362. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1363. plat_priv->driver_state);
  1364. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1365. if (!req)
  1366. return -ENOMEM;
  1367. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1368. if (!resp) {
  1369. kfree(req);
  1370. return -ENOMEM;
  1371. }
  1372. req->host_version_valid = 1;
  1373. strlcpy(req->host_version, host_version,
  1374. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1375. req->tgt_cfg_valid = 1;
  1376. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1377. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1378. else
  1379. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1380. for (i = 0; i < req->tgt_cfg_len; i++) {
  1381. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1382. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1383. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1384. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1385. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1386. }
  1387. req->svc_cfg_valid = 1;
  1388. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1389. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1390. else
  1391. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1392. for (i = 0; i < req->svc_cfg_len; i++) {
  1393. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1394. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1395. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1396. }
  1397. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1398. plat_priv->device_id != MANGO_DEVICE_ID &&
  1399. plat_priv->device_id != PEACH_DEVICE_ID) {
  1400. if (plat_priv->device_id == QCN7605_DEVICE_ID &&
  1401. config->num_shadow_reg_cfg) {
  1402. req->shadow_reg_valid = 1;
  1403. if (config->num_shadow_reg_cfg >
  1404. QMI_WLFW_MAX_NUM_SHADOW_REG_V01)
  1405. req->shadow_reg_len =
  1406. QMI_WLFW_MAX_NUM_SHADOW_REG_V01;
  1407. else
  1408. req->shadow_reg_len =
  1409. config->num_shadow_reg_cfg;
  1410. memcpy(req->shadow_reg, config->shadow_reg_cfg,
  1411. sizeof(struct wlfw_shadow_reg_cfg_s_v01) *
  1412. req->shadow_reg_len);
  1413. } else {
  1414. req->shadow_reg_v2_valid = 1;
  1415. if (config->num_shadow_reg_v2_cfg >
  1416. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1417. req->shadow_reg_v2_len =
  1418. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1419. else
  1420. req->shadow_reg_v2_len =
  1421. config->num_shadow_reg_v2_cfg;
  1422. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1423. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01) *
  1424. req->shadow_reg_v2_len);
  1425. }
  1426. } else {
  1427. req->shadow_reg_v3_valid = 1;
  1428. if (config->num_shadow_reg_v3_cfg >
  1429. MAX_NUM_SHADOW_REG_V3)
  1430. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1431. else
  1432. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1433. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1434. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1435. plat_priv->num_shadow_regs_v3);
  1436. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1437. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01) *
  1438. req->shadow_reg_v3_len);
  1439. }
  1440. if (config->rri_over_ddr_cfg_valid) {
  1441. req->rri_over_ddr_cfg_valid = 1;
  1442. req->rri_over_ddr_cfg.base_addr_low =
  1443. config->rri_over_ddr_cfg.base_addr_low;
  1444. req->rri_over_ddr_cfg.base_addr_high =
  1445. config->rri_over_ddr_cfg.base_addr_high;
  1446. }
  1447. if (config->send_msi_ce) {
  1448. ret = cnss_bus_get_msi_assignment(plat_priv,
  1449. CE_MSI_NAME,
  1450. &num_vectors,
  1451. &user_base_data,
  1452. &base_vector);
  1453. if (!ret) {
  1454. req->msi_cfg_valid = 1;
  1455. req->msi_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1456. for (ce_id = 0; ce_id < QMI_WLFW_MAX_NUM_CE_V01;
  1457. ce_id++) {
  1458. req->msi_cfg[ce_id].ce_id = ce_id;
  1459. req->msi_cfg[ce_id].msi_vector =
  1460. (ce_id % num_vectors) + base_vector;
  1461. }
  1462. }
  1463. }
  1464. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1465. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1466. if (ret < 0) {
  1467. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1468. ret);
  1469. goto out;
  1470. }
  1471. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1472. QMI_WLFW_WLAN_CFG_REQ_V01,
  1473. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1474. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1475. if (ret < 0) {
  1476. qmi_txn_cancel(&txn);
  1477. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1478. ret);
  1479. goto out;
  1480. }
  1481. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1482. if (ret < 0) {
  1483. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1484. ret);
  1485. goto out;
  1486. }
  1487. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1488. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1489. resp->resp.result, resp->resp.error);
  1490. ret = -resp->resp.result;
  1491. goto out;
  1492. }
  1493. kfree(req);
  1494. kfree(resp);
  1495. return 0;
  1496. out:
  1497. CNSS_QMI_ASSERT();
  1498. kfree(req);
  1499. kfree(resp);
  1500. return ret;
  1501. }
  1502. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1503. u32 offset, u32 mem_type,
  1504. u32 data_len, u8 *data)
  1505. {
  1506. struct wlfw_athdiag_read_req_msg_v01 *req;
  1507. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1508. struct qmi_txn txn;
  1509. int ret = 0;
  1510. if (!plat_priv)
  1511. return -ENODEV;
  1512. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1513. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1514. data, data_len);
  1515. return -EINVAL;
  1516. }
  1517. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1518. plat_priv->driver_state, offset, mem_type, data_len);
  1519. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1520. if (!req)
  1521. return -ENOMEM;
  1522. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1523. if (!resp) {
  1524. kfree(req);
  1525. return -ENOMEM;
  1526. }
  1527. req->offset = offset;
  1528. req->mem_type = mem_type;
  1529. req->data_len = data_len;
  1530. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1531. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1532. if (ret < 0) {
  1533. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1534. ret);
  1535. goto out;
  1536. }
  1537. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1538. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1539. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1540. wlfw_athdiag_read_req_msg_v01_ei, req);
  1541. if (ret < 0) {
  1542. qmi_txn_cancel(&txn);
  1543. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1544. ret);
  1545. goto out;
  1546. }
  1547. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1548. if (ret < 0) {
  1549. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1550. ret);
  1551. goto out;
  1552. }
  1553. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1554. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1555. resp->resp.result, resp->resp.error);
  1556. ret = -resp->resp.result;
  1557. goto out;
  1558. }
  1559. if (!resp->data_valid || resp->data_len != data_len) {
  1560. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1561. resp->data_valid, resp->data_len);
  1562. ret = -EINVAL;
  1563. goto out;
  1564. }
  1565. memcpy(data, resp->data, resp->data_len);
  1566. kfree(req);
  1567. kfree(resp);
  1568. return 0;
  1569. out:
  1570. kfree(req);
  1571. kfree(resp);
  1572. return ret;
  1573. }
  1574. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1575. u32 offset, u32 mem_type,
  1576. u32 data_len, u8 *data)
  1577. {
  1578. struct wlfw_athdiag_write_req_msg_v01 *req;
  1579. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1580. struct qmi_txn txn;
  1581. int ret = 0;
  1582. if (!plat_priv)
  1583. return -ENODEV;
  1584. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1585. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1586. data, data_len);
  1587. return -EINVAL;
  1588. }
  1589. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1590. plat_priv->driver_state, offset, mem_type, data_len, data);
  1591. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1592. if (!req)
  1593. return -ENOMEM;
  1594. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1595. if (!resp) {
  1596. kfree(req);
  1597. return -ENOMEM;
  1598. }
  1599. req->offset = offset;
  1600. req->mem_type = mem_type;
  1601. req->data_len = data_len;
  1602. memcpy(req->data, data, data_len);
  1603. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1604. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1605. if (ret < 0) {
  1606. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1607. ret);
  1608. goto out;
  1609. }
  1610. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1611. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1612. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1613. wlfw_athdiag_write_req_msg_v01_ei, req);
  1614. if (ret < 0) {
  1615. qmi_txn_cancel(&txn);
  1616. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1617. ret);
  1618. goto out;
  1619. }
  1620. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1621. if (ret < 0) {
  1622. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1623. ret);
  1624. goto out;
  1625. }
  1626. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1627. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1628. resp->resp.result, resp->resp.error);
  1629. ret = -resp->resp.result;
  1630. goto out;
  1631. }
  1632. kfree(req);
  1633. kfree(resp);
  1634. return 0;
  1635. out:
  1636. kfree(req);
  1637. kfree(resp);
  1638. return ret;
  1639. }
  1640. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1641. u8 fw_log_mode)
  1642. {
  1643. struct wlfw_ini_req_msg_v01 *req;
  1644. struct wlfw_ini_resp_msg_v01 *resp;
  1645. struct qmi_txn txn;
  1646. int ret = 0;
  1647. if (!plat_priv)
  1648. return -ENODEV;
  1649. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1650. plat_priv->driver_state, fw_log_mode);
  1651. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1652. if (!req)
  1653. return -ENOMEM;
  1654. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1655. if (!resp) {
  1656. kfree(req);
  1657. return -ENOMEM;
  1658. }
  1659. req->enablefwlog_valid = 1;
  1660. req->enablefwlog = fw_log_mode;
  1661. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1662. wlfw_ini_resp_msg_v01_ei, resp);
  1663. if (ret < 0) {
  1664. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1665. fw_log_mode, ret);
  1666. goto out;
  1667. }
  1668. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1669. QMI_WLFW_INI_REQ_V01,
  1670. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1671. wlfw_ini_req_msg_v01_ei, req);
  1672. if (ret < 0) {
  1673. qmi_txn_cancel(&txn);
  1674. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1675. fw_log_mode, ret);
  1676. goto out;
  1677. }
  1678. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1679. if (ret < 0) {
  1680. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1681. fw_log_mode, ret);
  1682. goto out;
  1683. }
  1684. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1685. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1686. fw_log_mode, resp->resp.result, resp->resp.error);
  1687. ret = -resp->resp.result;
  1688. goto out;
  1689. }
  1690. kfree(req);
  1691. kfree(resp);
  1692. return 0;
  1693. out:
  1694. kfree(req);
  1695. kfree(resp);
  1696. return ret;
  1697. }
  1698. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1699. {
  1700. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1701. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1702. struct qmi_txn txn;
  1703. int ret = 0;
  1704. if (!plat_priv)
  1705. return -ENODEV;
  1706. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1707. !plat_priv->fw_pcie_gen_switch) {
  1708. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1709. return 0;
  1710. }
  1711. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1712. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1713. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1714. plat_priv->pcie_gen_speed;
  1715. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1716. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1717. if (ret < 0) {
  1718. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1719. ret);
  1720. goto out;
  1721. }
  1722. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1723. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1724. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1725. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1726. if (ret < 0) {
  1727. qmi_txn_cancel(&txn);
  1728. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1729. goto out;
  1730. }
  1731. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1732. if (ret < 0) {
  1733. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1734. ret);
  1735. goto out;
  1736. }
  1737. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1738. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1739. plat_priv->pcie_gen_speed, resp.resp.result,
  1740. resp.resp.error);
  1741. ret = -resp.resp.result;
  1742. }
  1743. out:
  1744. /* Reset PCIE Gen speed after one time use */
  1745. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1746. return ret;
  1747. }
  1748. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1749. {
  1750. struct wlfw_antenna_switch_req_msg_v01 *req;
  1751. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1752. struct qmi_txn txn;
  1753. int ret = 0;
  1754. if (!plat_priv)
  1755. return -ENODEV;
  1756. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1757. plat_priv->driver_state);
  1758. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1759. if (!req)
  1760. return -ENOMEM;
  1761. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1762. if (!resp) {
  1763. kfree(req);
  1764. return -ENOMEM;
  1765. }
  1766. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1767. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1768. if (ret < 0) {
  1769. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1770. ret);
  1771. goto out;
  1772. }
  1773. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1774. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1775. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1776. wlfw_antenna_switch_req_msg_v01_ei, req);
  1777. if (ret < 0) {
  1778. qmi_txn_cancel(&txn);
  1779. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1780. ret);
  1781. goto out;
  1782. }
  1783. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1784. if (ret < 0) {
  1785. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1786. ret);
  1787. goto out;
  1788. }
  1789. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1790. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1791. resp->resp.result, resp->resp.error);
  1792. ret = -resp->resp.result;
  1793. goto out;
  1794. }
  1795. if (resp->antenna_valid)
  1796. plat_priv->antenna = resp->antenna;
  1797. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1798. resp->antenna_valid, resp->antenna);
  1799. kfree(req);
  1800. kfree(resp);
  1801. return 0;
  1802. out:
  1803. kfree(req);
  1804. kfree(resp);
  1805. return ret;
  1806. }
  1807. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1808. {
  1809. struct wlfw_antenna_grant_req_msg_v01 *req;
  1810. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1811. struct qmi_txn txn;
  1812. int ret = 0;
  1813. if (!plat_priv)
  1814. return -ENODEV;
  1815. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1816. plat_priv->driver_state, plat_priv->grant);
  1817. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1818. if (!req)
  1819. return -ENOMEM;
  1820. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1821. if (!resp) {
  1822. kfree(req);
  1823. return -ENOMEM;
  1824. }
  1825. req->grant_valid = 1;
  1826. req->grant = plat_priv->grant;
  1827. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1828. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1829. if (ret < 0) {
  1830. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1831. ret);
  1832. goto out;
  1833. }
  1834. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1835. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1836. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1837. wlfw_antenna_grant_req_msg_v01_ei, req);
  1838. if (ret < 0) {
  1839. qmi_txn_cancel(&txn);
  1840. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1841. ret);
  1842. goto out;
  1843. }
  1844. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1845. if (ret < 0) {
  1846. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1847. ret);
  1848. goto out;
  1849. }
  1850. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1851. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1852. resp->resp.result, resp->resp.error);
  1853. ret = -resp->resp.result;
  1854. goto out;
  1855. }
  1856. kfree(req);
  1857. kfree(resp);
  1858. return 0;
  1859. out:
  1860. kfree(req);
  1861. kfree(resp);
  1862. return ret;
  1863. }
  1864. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1865. {
  1866. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1867. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1868. struct qmi_txn txn;
  1869. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1870. int ret = 0;
  1871. int i;
  1872. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1873. plat_priv->driver_state);
  1874. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1875. if (!req)
  1876. return -ENOMEM;
  1877. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1878. if (!resp) {
  1879. kfree(req);
  1880. return -ENOMEM;
  1881. }
  1882. if (plat_priv->qdss_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  1883. cnss_pr_err("Invalid seg len %u\n", plat_priv->qdss_mem_seg_len);
  1884. ret = -EINVAL;
  1885. goto out;
  1886. }
  1887. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1888. for (i = 0; i < req->mem_seg_len; i++) {
  1889. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1890. qdss_mem[i].va, &qdss_mem[i].pa,
  1891. qdss_mem[i].size, qdss_mem[i].type);
  1892. req->mem_seg[i].addr = qdss_mem[i].pa;
  1893. req->mem_seg[i].size = qdss_mem[i].size;
  1894. req->mem_seg[i].type = qdss_mem[i].type;
  1895. }
  1896. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1897. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1898. if (ret < 0) {
  1899. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1900. ret);
  1901. goto out;
  1902. }
  1903. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1904. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1905. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1906. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1907. if (ret < 0) {
  1908. qmi_txn_cancel(&txn);
  1909. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1910. ret);
  1911. goto out;
  1912. }
  1913. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1914. if (ret < 0) {
  1915. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1916. ret);
  1917. goto out;
  1918. }
  1919. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1920. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1921. resp->resp.result, resp->resp.error);
  1922. ret = -resp->resp.result;
  1923. goto out;
  1924. }
  1925. kfree(req);
  1926. kfree(resp);
  1927. return 0;
  1928. out:
  1929. kfree(req);
  1930. kfree(resp);
  1931. return ret;
  1932. }
  1933. int cnss_wlfw_send_host_wfc_call_status(struct cnss_plat_data *plat_priv,
  1934. struct cnss_wfc_cfg cfg)
  1935. {
  1936. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1937. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1938. struct qmi_txn txn;
  1939. int ret = 0;
  1940. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1941. cnss_pr_err("Drop host WFC indication as FW not initialized\n");
  1942. return -EINVAL;
  1943. }
  1944. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1945. if (!req)
  1946. return -ENOMEM;
  1947. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1948. if (!resp) {
  1949. kfree(req);
  1950. return -ENOMEM;
  1951. }
  1952. req->wfc_call_active_valid = 1;
  1953. req->wfc_call_active = cfg.mode;
  1954. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1955. plat_priv->driver_state);
  1956. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1957. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1958. if (ret < 0) {
  1959. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1960. ret);
  1961. goto out;
  1962. }
  1963. cnss_pr_dbg("Send WFC Mode: %d\n", cfg.mode);
  1964. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1965. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1966. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1967. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1968. if (ret < 0) {
  1969. qmi_txn_cancel(&txn);
  1970. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1971. ret);
  1972. goto out;
  1973. }
  1974. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1975. if (ret < 0) {
  1976. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1977. ret);
  1978. goto out;
  1979. }
  1980. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1981. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1982. resp->resp.result, resp->resp.error);
  1983. ret = -EINVAL;
  1984. goto out;
  1985. }
  1986. ret = 0;
  1987. out:
  1988. kfree(req);
  1989. kfree(resp);
  1990. return ret;
  1991. }
  1992. static int cnss_wlfw_wfc_call_status_send_sync
  1993. (struct cnss_plat_data *plat_priv,
  1994. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1995. {
  1996. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1997. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1998. struct qmi_txn txn;
  1999. int ret = 0;
  2000. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2001. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  2002. return -EINVAL;
  2003. }
  2004. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2005. if (!req)
  2006. return -ENOMEM;
  2007. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2008. if (!resp) {
  2009. kfree(req);
  2010. return -ENOMEM;
  2011. }
  2012. /**
  2013. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  2014. * But in r2 update QMI structure is expanded and as an effect qmi
  2015. * decoded structures have padding. Thus we cannot use buffer design.
  2016. * For backward compatibility for r1 design copy only wfc_call_active
  2017. * value in hex buffer.
  2018. */
  2019. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  2020. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  2021. /* wfc_call_active is mandatory in IMS indication */
  2022. req->wfc_call_active_valid = 1;
  2023. req->wfc_call_active = ind_msg->wfc_call_active;
  2024. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  2025. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  2026. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  2027. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  2028. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  2029. req->twt_ims_start = ind_msg->twt_ims_start;
  2030. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  2031. req->twt_ims_int = ind_msg->twt_ims_int;
  2032. req->media_quality_valid = ind_msg->media_quality_valid;
  2033. req->media_quality =
  2034. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  2035. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  2036. plat_priv->driver_state);
  2037. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2038. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  2039. if (ret < 0) {
  2040. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  2041. ret);
  2042. goto out;
  2043. }
  2044. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2045. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  2046. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  2047. wlfw_wfc_call_status_req_msg_v01_ei, req);
  2048. if (ret < 0) {
  2049. qmi_txn_cancel(&txn);
  2050. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  2051. ret);
  2052. goto out;
  2053. }
  2054. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2055. if (ret < 0) {
  2056. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  2057. ret);
  2058. goto out;
  2059. }
  2060. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2061. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  2062. resp->resp.result, resp->resp.error);
  2063. ret = -resp->resp.result;
  2064. goto out;
  2065. }
  2066. ret = 0;
  2067. out:
  2068. kfree(req);
  2069. kfree(resp);
  2070. return ret;
  2071. }
  2072. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  2073. {
  2074. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  2075. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  2076. struct qmi_txn txn;
  2077. int ret = 0;
  2078. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  2079. plat_priv->dynamic_feature,
  2080. plat_priv->driver_state);
  2081. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2082. if (!req)
  2083. return -ENOMEM;
  2084. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2085. if (!resp) {
  2086. kfree(req);
  2087. return -ENOMEM;
  2088. }
  2089. req->mask_valid = 1;
  2090. req->mask = plat_priv->dynamic_feature;
  2091. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2092. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  2093. if (ret < 0) {
  2094. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  2095. ret);
  2096. goto out;
  2097. }
  2098. ret = qmi_send_request
  2099. (&plat_priv->qmi_wlfw, NULL, &txn,
  2100. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  2101. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  2102. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  2103. if (ret < 0) {
  2104. qmi_txn_cancel(&txn);
  2105. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  2106. ret);
  2107. goto out;
  2108. }
  2109. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2110. if (ret < 0) {
  2111. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  2112. ret);
  2113. goto out;
  2114. }
  2115. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2116. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  2117. resp->resp.result, resp->resp.error);
  2118. ret = -resp->resp.result;
  2119. goto out;
  2120. }
  2121. out:
  2122. kfree(req);
  2123. kfree(resp);
  2124. return ret;
  2125. }
  2126. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  2127. void *cmd, int cmd_len)
  2128. {
  2129. struct wlfw_get_info_req_msg_v01 *req;
  2130. struct wlfw_get_info_resp_msg_v01 *resp;
  2131. struct qmi_txn txn;
  2132. int ret = 0;
  2133. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  2134. type, cmd_len, plat_priv->driver_state);
  2135. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  2136. return -EINVAL;
  2137. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2138. if (!req)
  2139. return -ENOMEM;
  2140. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2141. if (!resp) {
  2142. kfree(req);
  2143. return -ENOMEM;
  2144. }
  2145. req->type = type;
  2146. req->data_len = cmd_len;
  2147. memcpy(req->data, cmd, req->data_len);
  2148. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2149. wlfw_get_info_resp_msg_v01_ei, resp);
  2150. if (ret < 0) {
  2151. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2152. ret);
  2153. goto out;
  2154. }
  2155. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2156. QMI_WLFW_GET_INFO_REQ_V01,
  2157. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2158. wlfw_get_info_req_msg_v01_ei, req);
  2159. if (ret < 0) {
  2160. qmi_txn_cancel(&txn);
  2161. cnss_pr_err("Failed to send get info request, err: %d\n",
  2162. ret);
  2163. goto out;
  2164. }
  2165. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2166. if (ret < 0) {
  2167. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2168. ret);
  2169. goto out;
  2170. }
  2171. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2172. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2173. resp->resp.result, resp->resp.error);
  2174. ret = -resp->resp.result;
  2175. goto out;
  2176. }
  2177. kfree(req);
  2178. kfree(resp);
  2179. return 0;
  2180. out:
  2181. kfree(req);
  2182. kfree(resp);
  2183. return ret;
  2184. }
  2185. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2186. {
  2187. return QMI_WLFW_TIMEOUT_MS;
  2188. }
  2189. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2190. struct sockaddr_qrtr *sq,
  2191. struct qmi_txn *txn, const void *data)
  2192. {
  2193. struct cnss_plat_data *plat_priv =
  2194. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2195. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2196. int i;
  2197. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2198. if (!txn) {
  2199. cnss_pr_err("Spurious indication\n");
  2200. return;
  2201. }
  2202. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2203. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2204. return;
  2205. }
  2206. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2207. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2208. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2209. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2210. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2211. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2212. if (!plat_priv->fw_mem[i].va &&
  2213. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2214. plat_priv->fw_mem[i].attrs |=
  2215. DMA_ATTR_FORCE_CONTIGUOUS;
  2216. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2217. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2218. }
  2219. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2220. 0, NULL);
  2221. }
  2222. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2223. struct sockaddr_qrtr *sq,
  2224. struct qmi_txn *txn, const void *data)
  2225. {
  2226. struct cnss_plat_data *plat_priv =
  2227. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2228. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2229. if (!txn) {
  2230. cnss_pr_err("Spurious indication\n");
  2231. return;
  2232. }
  2233. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2234. 0, NULL);
  2235. }
  2236. /**
  2237. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2238. *
  2239. * This event is not required for HST/ HSP as FW calibration done is
  2240. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2241. */
  2242. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2243. struct sockaddr_qrtr *sq,
  2244. struct qmi_txn *txn, const void *data)
  2245. {
  2246. struct cnss_plat_data *plat_priv =
  2247. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2248. struct cnss_cal_info *cal_info;
  2249. if (!txn) {
  2250. cnss_pr_err("Spurious indication\n");
  2251. return;
  2252. }
  2253. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2254. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2255. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2256. return;
  2257. }
  2258. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2259. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2260. if (!cal_info)
  2261. return;
  2262. cal_info->cal_status = CNSS_CAL_DONE;
  2263. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2264. 0, cal_info);
  2265. }
  2266. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2267. struct sockaddr_qrtr *sq,
  2268. struct qmi_txn *txn, const void *data)
  2269. {
  2270. struct cnss_plat_data *plat_priv =
  2271. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2272. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2273. if (!txn) {
  2274. cnss_pr_err("Spurious indication\n");
  2275. return;
  2276. }
  2277. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2278. }
  2279. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2280. struct sockaddr_qrtr *sq,
  2281. struct qmi_txn *txn, const void *data)
  2282. {
  2283. struct cnss_plat_data *plat_priv =
  2284. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2285. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2286. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2287. if (!txn) {
  2288. cnss_pr_err("Spurious indication\n");
  2289. return;
  2290. }
  2291. if (ind_msg->pwr_pin_result_valid)
  2292. plat_priv->pin_result.fw_pwr_pin_result =
  2293. ind_msg->pwr_pin_result;
  2294. if (ind_msg->phy_io_pin_result_valid)
  2295. plat_priv->pin_result.fw_phy_io_pin_result =
  2296. ind_msg->phy_io_pin_result;
  2297. if (ind_msg->rf_pin_result_valid)
  2298. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2299. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2300. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2301. ind_msg->rf_pin_result);
  2302. }
  2303. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2304. u32 cal_file_download_size)
  2305. {
  2306. struct wlfw_cal_report_req_msg_v01 req = {0};
  2307. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2308. struct qmi_txn txn;
  2309. int ret = 0;
  2310. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2311. cal_file_download_size, plat_priv->driver_state);
  2312. req.cal_file_download_size_valid = 1;
  2313. req.cal_file_download_size = cal_file_download_size;
  2314. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2315. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2316. if (ret < 0) {
  2317. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2318. ret);
  2319. goto out;
  2320. }
  2321. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2322. QMI_WLFW_CAL_REPORT_REQ_V01,
  2323. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2324. wlfw_cal_report_req_msg_v01_ei, &req);
  2325. if (ret < 0) {
  2326. qmi_txn_cancel(&txn);
  2327. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2328. ret);
  2329. goto out;
  2330. }
  2331. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2332. if (ret < 0) {
  2333. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2334. ret);
  2335. goto out;
  2336. }
  2337. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2338. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2339. resp.resp.result, resp.resp.error);
  2340. ret = -resp.resp.result;
  2341. goto out;
  2342. }
  2343. out:
  2344. return ret;
  2345. }
  2346. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2347. struct sockaddr_qrtr *sq,
  2348. struct qmi_txn *txn, const void *data)
  2349. {
  2350. struct cnss_plat_data *plat_priv =
  2351. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2352. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2353. struct cnss_cal_info *cal_info;
  2354. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2355. ind->cal_file_upload_size);
  2356. cnss_pr_info("Calibration took %d ms\n",
  2357. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2358. if (!txn) {
  2359. cnss_pr_err("Spurious indication\n");
  2360. return;
  2361. }
  2362. if (ind->cal_file_upload_size_valid)
  2363. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2364. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2365. if (!cal_info)
  2366. return;
  2367. cal_info->cal_status = CNSS_CAL_DONE;
  2368. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2369. 0, cal_info);
  2370. }
  2371. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2372. struct sockaddr_qrtr *sq,
  2373. struct qmi_txn *txn,
  2374. const void *data)
  2375. {
  2376. struct cnss_plat_data *plat_priv =
  2377. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2378. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2379. int i;
  2380. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2381. if (!txn) {
  2382. cnss_pr_err("Spurious indication\n");
  2383. return;
  2384. }
  2385. if (plat_priv->qdss_mem_seg_len) {
  2386. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2387. plat_priv->qdss_mem_seg_len);
  2388. return;
  2389. }
  2390. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2391. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2392. return;
  2393. }
  2394. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2395. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2396. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2397. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2398. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2399. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2400. }
  2401. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2402. 0, NULL);
  2403. }
  2404. /**
  2405. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2406. *
  2407. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2408. * fw memory segment for dumping to file system. Only one type of mem can be
  2409. * saved per indication and is provided in mem seg index 0.
  2410. *
  2411. * Return: None
  2412. */
  2413. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2414. struct sockaddr_qrtr *sq,
  2415. struct qmi_txn *txn,
  2416. const void *data)
  2417. {
  2418. struct cnss_plat_data *plat_priv =
  2419. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2420. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2421. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2422. int i = 0;
  2423. if (!txn || !data) {
  2424. cnss_pr_err("Spurious indication\n");
  2425. return;
  2426. }
  2427. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2428. ind_msg->source, ind_msg->mem_seg_valid,
  2429. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2430. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2431. if (!event_data)
  2432. return;
  2433. event_data->mem_type = ind_msg->mem_seg[0].type;
  2434. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2435. event_data->total_size = ind_msg->total_size;
  2436. if (ind_msg->mem_seg_valid) {
  2437. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2438. cnss_pr_err("Invalid seg len indication\n");
  2439. goto free_event_data;
  2440. }
  2441. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2442. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2443. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2444. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2445. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2446. goto free_event_data;
  2447. }
  2448. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2449. i, ind_msg->mem_seg[i].addr,
  2450. ind_msg->mem_seg[i].size);
  2451. }
  2452. }
  2453. if (ind_msg->file_name_valid)
  2454. strlcpy(event_data->file_name, ind_msg->file_name,
  2455. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2456. if (ind_msg->source == 1) {
  2457. if (!ind_msg->file_name_valid)
  2458. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2459. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2460. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2461. 0, event_data);
  2462. } else {
  2463. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2464. if (!ind_msg->file_name_valid)
  2465. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2466. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2467. } else {
  2468. if (!ind_msg->file_name_valid)
  2469. strlcpy(event_data->file_name, "fw_mem_dump",
  2470. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2471. }
  2472. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2473. 0, event_data);
  2474. }
  2475. return;
  2476. free_event_data:
  2477. kfree(event_data);
  2478. }
  2479. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2480. struct sockaddr_qrtr *sq,
  2481. struct qmi_txn *txn,
  2482. const void *data)
  2483. {
  2484. struct cnss_plat_data *plat_priv =
  2485. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2486. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2487. 0, NULL);
  2488. }
  2489. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2490. struct sockaddr_qrtr *sq,
  2491. struct qmi_txn *txn,
  2492. const void *data)
  2493. {
  2494. struct cnss_plat_data *plat_priv =
  2495. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2496. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2497. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2498. if (!txn) {
  2499. cnss_pr_err("Spurious indication\n");
  2500. return;
  2501. }
  2502. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2503. ind_msg->data_len, ind_msg->type,
  2504. ind_msg->is_last, ind_msg->seq_no);
  2505. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2506. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2507. (void *)ind_msg->data,
  2508. ind_msg->data_len);
  2509. }
  2510. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2511. (struct cnss_plat_data *plat_priv,
  2512. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2513. {
  2514. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2515. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2516. struct qmi_txn txn;
  2517. int ret = 0;
  2518. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2519. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2520. return -EINVAL;
  2521. }
  2522. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2523. if (!req)
  2524. return -ENOMEM;
  2525. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2526. if (!resp) {
  2527. kfree(req);
  2528. return -ENOMEM;
  2529. }
  2530. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2531. req->twt_sta_start = ind_msg->twt_sta_start;
  2532. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2533. req->twt_sta_int = ind_msg->twt_sta_int;
  2534. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2535. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2536. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2537. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2538. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2539. req->twt_sta_dl = req->twt_sta_dl;
  2540. req->twt_sta_config_changed_valid =
  2541. ind_msg->twt_sta_config_changed_valid;
  2542. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2543. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2544. plat_priv->driver_state);
  2545. ret =
  2546. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2547. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2548. resp);
  2549. if (ret < 0) {
  2550. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2551. ret);
  2552. goto out;
  2553. }
  2554. ret =
  2555. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2556. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2557. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2558. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2559. if (ret < 0) {
  2560. qmi_txn_cancel(&txn);
  2561. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2562. goto out;
  2563. }
  2564. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2565. if (ret < 0) {
  2566. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2567. goto out;
  2568. }
  2569. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2570. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2571. resp->resp.result, resp->resp.error);
  2572. ret = -resp->resp.result;
  2573. goto out;
  2574. }
  2575. ret = 0;
  2576. out:
  2577. kfree(req);
  2578. kfree(resp);
  2579. return ret;
  2580. }
  2581. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2582. void *data)
  2583. {
  2584. int ret;
  2585. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2586. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2587. kfree(data);
  2588. return ret;
  2589. }
  2590. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2591. struct sockaddr_qrtr *sq,
  2592. struct qmi_txn *txn,
  2593. const void *data)
  2594. {
  2595. struct cnss_plat_data *plat_priv =
  2596. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2597. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2598. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2599. if (!txn) {
  2600. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2601. return;
  2602. }
  2603. if (!ind_msg) {
  2604. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2605. return;
  2606. }
  2607. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2608. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2609. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2610. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2611. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2612. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2613. ind_msg->twt_sta_config_changed_valid,
  2614. ind_msg->twt_sta_config_changed);
  2615. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2616. if (!event_data)
  2617. return;
  2618. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2619. event_data);
  2620. }
  2621. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2622. {
  2623. .type = QMI_INDICATION,
  2624. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2625. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2626. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2627. .fn = cnss_wlfw_request_mem_ind_cb
  2628. },
  2629. {
  2630. .type = QMI_INDICATION,
  2631. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2632. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2633. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2634. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2635. },
  2636. {
  2637. .type = QMI_INDICATION,
  2638. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2639. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2640. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2641. .fn = cnss_wlfw_fw_ready_ind_cb
  2642. },
  2643. {
  2644. .type = QMI_INDICATION,
  2645. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2646. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2647. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2648. .fn = cnss_wlfw_fw_init_done_ind_cb
  2649. },
  2650. {
  2651. .type = QMI_INDICATION,
  2652. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2653. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2654. .decoded_size =
  2655. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2656. .fn = cnss_wlfw_pin_result_ind_cb
  2657. },
  2658. {
  2659. .type = QMI_INDICATION,
  2660. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2661. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2662. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2663. .fn = cnss_wlfw_cal_done_ind_cb
  2664. },
  2665. {
  2666. .type = QMI_INDICATION,
  2667. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2668. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2669. .decoded_size =
  2670. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2671. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2672. },
  2673. {
  2674. .type = QMI_INDICATION,
  2675. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2676. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2677. .decoded_size =
  2678. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2679. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2680. },
  2681. {
  2682. .type = QMI_INDICATION,
  2683. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2684. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2685. .decoded_size =
  2686. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2687. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2688. },
  2689. {
  2690. .type = QMI_INDICATION,
  2691. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2692. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2693. .decoded_size =
  2694. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2695. .fn = cnss_wlfw_respond_get_info_ind_cb
  2696. },
  2697. {
  2698. .type = QMI_INDICATION,
  2699. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2700. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2701. .decoded_size =
  2702. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2703. .fn = cnss_wlfw_process_twt_cfg_ind
  2704. },
  2705. {}
  2706. };
  2707. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2708. void *data)
  2709. {
  2710. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2711. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2712. struct sockaddr_qrtr sq = { 0 };
  2713. int ret = 0;
  2714. if (!event_data)
  2715. return -EINVAL;
  2716. sq.sq_family = AF_QIPCRTR;
  2717. sq.sq_node = event_data->node;
  2718. sq.sq_port = event_data->port;
  2719. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2720. sizeof(sq), 0);
  2721. if (ret < 0) {
  2722. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2723. goto out;
  2724. }
  2725. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2726. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2727. plat_priv->driver_state);
  2728. kfree(data);
  2729. return 0;
  2730. out:
  2731. CNSS_QMI_ASSERT();
  2732. kfree(data);
  2733. return ret;
  2734. }
  2735. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2736. {
  2737. int ret = 0;
  2738. if (!plat_priv)
  2739. return -ENODEV;
  2740. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2741. cnss_pr_err("Unexpected WLFW server arrive\n");
  2742. CNSS_ASSERT(0);
  2743. return -EINVAL;
  2744. }
  2745. cnss_ignore_qmi_failure(false);
  2746. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2747. if (ret < 0)
  2748. goto out;
  2749. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2750. if (ret < 0) {
  2751. if (ret == -EALREADY)
  2752. ret = 0;
  2753. goto out;
  2754. }
  2755. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2756. if (ret < 0)
  2757. goto out;
  2758. return 0;
  2759. out:
  2760. return ret;
  2761. }
  2762. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2763. {
  2764. int ret;
  2765. if (!plat_priv)
  2766. return -ENODEV;
  2767. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2768. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2769. plat_priv->driver_state);
  2770. cnss_qmi_deinit(plat_priv);
  2771. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2772. ret = cnss_qmi_init(plat_priv);
  2773. if (ret < 0) {
  2774. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2775. CNSS_ASSERT(0);
  2776. }
  2777. return 0;
  2778. }
  2779. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2780. struct qmi_service *service)
  2781. {
  2782. struct cnss_plat_data *plat_priv =
  2783. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2784. struct cnss_qmi_event_server_arrive_data *event_data;
  2785. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2786. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2787. plat_priv->driver_state);
  2788. return 0;
  2789. }
  2790. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2791. service->node, service->port);
  2792. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2793. if (!event_data)
  2794. return -ENOMEM;
  2795. event_data->node = service->node;
  2796. event_data->port = service->port;
  2797. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2798. 0, event_data);
  2799. return 0;
  2800. }
  2801. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2802. struct qmi_service *service)
  2803. {
  2804. struct cnss_plat_data *plat_priv =
  2805. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2806. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2807. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2808. plat_priv->driver_state);
  2809. return;
  2810. }
  2811. cnss_pr_dbg("WLFW server exiting\n");
  2812. if (plat_priv) {
  2813. cnss_ignore_qmi_failure(true);
  2814. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2815. }
  2816. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2817. 0, NULL);
  2818. }
  2819. static struct qmi_ops qmi_wlfw_ops = {
  2820. .new_server = wlfw_new_server,
  2821. .del_server = wlfw_del_server,
  2822. };
  2823. static int cnss_qmi_add_lookup(struct cnss_plat_data *plat_priv)
  2824. {
  2825. unsigned int id = WLFW_SERVICE_INS_ID_V01;
  2826. /* In order to support dual wlan card attach case,
  2827. * need separate qmi service instance id for each dev
  2828. */
  2829. if (cnss_is_dual_wlan_enabled() && plat_priv->qrtr_node_id != 0 &&
  2830. plat_priv->wlfw_service_instance_id != 0)
  2831. id = plat_priv->wlfw_service_instance_id;
  2832. return qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2833. WLFW_SERVICE_VERS_V01, id);
  2834. }
  2835. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2836. {
  2837. int ret = 0;
  2838. cnss_get_qrtr_info(plat_priv);
  2839. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2840. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2841. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2842. if (ret < 0) {
  2843. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2844. ret);
  2845. goto out;
  2846. }
  2847. ret = cnss_qmi_add_lookup(plat_priv);
  2848. if (ret < 0)
  2849. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2850. out:
  2851. return ret;
  2852. }
  2853. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2854. {
  2855. qmi_handle_release(&plat_priv->qmi_wlfw);
  2856. }
  2857. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2858. {
  2859. struct dms_get_mac_address_req_msg_v01 req;
  2860. struct dms_get_mac_address_resp_msg_v01 resp;
  2861. struct qmi_txn txn;
  2862. int ret = 0;
  2863. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2864. cnss_pr_err("DMS QMI connection not established\n");
  2865. return -EINVAL;
  2866. }
  2867. cnss_pr_dbg("Requesting DMS MAC address");
  2868. memset(&resp, 0, sizeof(resp));
  2869. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2870. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2871. if (ret < 0) {
  2872. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2873. ret);
  2874. goto out;
  2875. }
  2876. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2877. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2878. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2879. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2880. dms_get_mac_address_req_msg_v01_ei, &req);
  2881. if (ret < 0) {
  2882. qmi_txn_cancel(&txn);
  2883. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2884. ret);
  2885. goto out;
  2886. }
  2887. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2888. if (ret < 0) {
  2889. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2890. ret);
  2891. goto out;
  2892. }
  2893. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2894. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2895. resp.resp.result, resp.resp.error);
  2896. ret = -resp.resp.result;
  2897. goto out;
  2898. }
  2899. if (!resp.mac_address_valid ||
  2900. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2901. cnss_pr_err("Invalid MAC address received from DMS\n");
  2902. plat_priv->dms.mac_valid = false;
  2903. goto out;
  2904. }
  2905. plat_priv->dms.mac_valid = true;
  2906. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2907. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2908. out:
  2909. return ret;
  2910. }
  2911. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2912. unsigned int node, unsigned int port)
  2913. {
  2914. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2915. struct sockaddr_qrtr sq = {0};
  2916. int ret = 0;
  2917. sq.sq_family = AF_QIPCRTR;
  2918. sq.sq_node = node;
  2919. sq.sq_port = port;
  2920. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2921. sizeof(sq), 0);
  2922. if (ret < 0) {
  2923. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2924. node, port);
  2925. goto out;
  2926. }
  2927. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2928. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2929. plat_priv->driver_state);
  2930. out:
  2931. return ret;
  2932. }
  2933. static int dms_new_server(struct qmi_handle *qmi_dms,
  2934. struct qmi_service *service)
  2935. {
  2936. struct cnss_plat_data *plat_priv =
  2937. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2938. if (!service)
  2939. return -EINVAL;
  2940. return cnss_dms_connect_to_server(plat_priv, service->node,
  2941. service->port);
  2942. }
  2943. static void cnss_dms_server_exit_work(struct work_struct *work)
  2944. {
  2945. int ret;
  2946. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  2947. cnss_dms_deinit(plat_priv);
  2948. cnss_pr_info("QMI DMS Server Exit");
  2949. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2950. ret = cnss_dms_init(plat_priv);
  2951. if (ret < 0)
  2952. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  2953. }
  2954. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  2955. static void dms_del_server(struct qmi_handle *qmi_dms,
  2956. struct qmi_service *service)
  2957. {
  2958. struct cnss_plat_data *plat_priv =
  2959. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2960. if (!plat_priv)
  2961. return;
  2962. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  2963. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  2964. plat_priv->driver_state);
  2965. return;
  2966. }
  2967. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2968. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2969. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2970. plat_priv->driver_state);
  2971. schedule_work(&cnss_dms_del_work);
  2972. }
  2973. void cnss_cancel_dms_work(void)
  2974. {
  2975. cancel_work_sync(&cnss_dms_del_work);
  2976. }
  2977. static struct qmi_ops qmi_dms_ops = {
  2978. .new_server = dms_new_server,
  2979. .del_server = dms_del_server,
  2980. };
  2981. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2982. {
  2983. int ret = 0;
  2984. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2985. &qmi_dms_ops, NULL);
  2986. if (ret < 0) {
  2987. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2988. goto out;
  2989. }
  2990. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2991. DMS_SERVICE_VERS_V01, 0);
  2992. if (ret < 0)
  2993. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2994. out:
  2995. return ret;
  2996. }
  2997. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2998. {
  2999. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  3000. qmi_handle_release(&plat_priv->qmi_dms);
  3001. }
  3002. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  3003. {
  3004. int ret;
  3005. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  3006. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  3007. struct qmi_txn txn;
  3008. if (!plat_priv)
  3009. return -ENODEV;
  3010. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  3011. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3012. if (!req)
  3013. return -ENOMEM;
  3014. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3015. if (!resp) {
  3016. kfree(req);
  3017. return -ENOMEM;
  3018. }
  3019. req->antenna = plat_priv->antenna;
  3020. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3021. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  3022. if (ret < 0) {
  3023. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  3024. ret);
  3025. goto out;
  3026. }
  3027. ret = qmi_send_request
  3028. (&plat_priv->coex_qmi, NULL, &txn,
  3029. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  3030. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  3031. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  3032. if (ret < 0) {
  3033. qmi_txn_cancel(&txn);
  3034. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  3035. ret);
  3036. goto out;
  3037. }
  3038. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3039. if (ret < 0) {
  3040. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  3041. ret);
  3042. goto out;
  3043. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3044. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  3045. resp->resp.result, resp->resp.error);
  3046. ret = -resp->resp.result;
  3047. goto out;
  3048. }
  3049. if (resp->grant_valid)
  3050. plat_priv->grant = resp->grant;
  3051. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  3052. kfree(resp);
  3053. kfree(req);
  3054. return 0;
  3055. out:
  3056. kfree(resp);
  3057. kfree(req);
  3058. return ret;
  3059. }
  3060. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  3061. {
  3062. int ret;
  3063. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  3064. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  3065. struct qmi_txn txn;
  3066. if (!plat_priv)
  3067. return -ENODEV;
  3068. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  3069. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3070. if (!req)
  3071. return -ENOMEM;
  3072. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3073. if (!resp) {
  3074. kfree(req);
  3075. return -ENOMEM;
  3076. }
  3077. req->antenna = plat_priv->antenna;
  3078. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3079. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  3080. if (ret < 0) {
  3081. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  3082. ret);
  3083. goto out;
  3084. }
  3085. ret = qmi_send_request
  3086. (&plat_priv->coex_qmi, NULL, &txn,
  3087. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  3088. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  3089. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  3090. if (ret < 0) {
  3091. qmi_txn_cancel(&txn);
  3092. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  3093. ret);
  3094. goto out;
  3095. }
  3096. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3097. if (ret < 0) {
  3098. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  3099. ret);
  3100. goto out;
  3101. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3102. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  3103. resp->resp.result, resp->resp.error);
  3104. ret = -resp->resp.result;
  3105. goto out;
  3106. }
  3107. kfree(resp);
  3108. kfree(req);
  3109. return 0;
  3110. out:
  3111. kfree(resp);
  3112. kfree(req);
  3113. return ret;
  3114. }
  3115. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  3116. {
  3117. int ret;
  3118. struct wlfw_subsys_restart_level_req_msg_v01 req;
  3119. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  3120. u8 pcss_enabled;
  3121. if (!plat_priv)
  3122. return -ENODEV;
  3123. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3124. cnss_pr_dbg("Can't send pcss cmd before fw ready\n");
  3125. return 0;
  3126. }
  3127. pcss_enabled = plat_priv->recovery_pcss_enabled;
  3128. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  3129. req.restart_level_type_valid = 1;
  3130. req.restart_level_type = pcss_enabled;
  3131. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  3132. wlfw_subsys_restart_level_req_msg_v01_ei,
  3133. wlfw_subsys_restart_level_resp_msg_v01_ei,
  3134. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  3135. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  3136. QMI_WLFW_TIMEOUT_JF);
  3137. if (ret < 0)
  3138. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  3139. return ret;
  3140. }
  3141. static int coex_new_server(struct qmi_handle *qmi,
  3142. struct qmi_service *service)
  3143. {
  3144. struct cnss_plat_data *plat_priv =
  3145. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3146. struct sockaddr_qrtr sq = { 0 };
  3147. int ret = 0;
  3148. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  3149. service->node, service->port);
  3150. sq.sq_family = AF_QIPCRTR;
  3151. sq.sq_node = service->node;
  3152. sq.sq_port = service->port;
  3153. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3154. if (ret < 0) {
  3155. cnss_pr_err("Fail to connect to remote service port\n");
  3156. return ret;
  3157. }
  3158. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3159. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  3160. plat_priv->driver_state);
  3161. return 0;
  3162. }
  3163. static void coex_del_server(struct qmi_handle *qmi,
  3164. struct qmi_service *service)
  3165. {
  3166. struct cnss_plat_data *plat_priv =
  3167. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3168. cnss_pr_dbg("COEX server exit\n");
  3169. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3170. }
  3171. static struct qmi_ops coex_qmi_ops = {
  3172. .new_server = coex_new_server,
  3173. .del_server = coex_del_server,
  3174. };
  3175. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3176. { int ret;
  3177. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3178. COEX_SERVICE_MAX_MSG_LEN,
  3179. &coex_qmi_ops, NULL);
  3180. if (ret < 0)
  3181. return ret;
  3182. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3183. COEX_SERVICE_VERS_V01, 0);
  3184. return ret;
  3185. }
  3186. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3187. {
  3188. qmi_handle_release(&plat_priv->coex_qmi);
  3189. }
  3190. /* IMS Service */
  3191. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3192. {
  3193. int ret;
  3194. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3195. struct qmi_txn *txn;
  3196. if (!plat_priv)
  3197. return -ENODEV;
  3198. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3199. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3200. if (!req)
  3201. return -ENOMEM;
  3202. req->wfc_call_status_valid = 1;
  3203. req->wfc_call_status = 1;
  3204. txn = &plat_priv->txn;
  3205. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3206. if (ret < 0) {
  3207. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3208. ret);
  3209. goto out;
  3210. }
  3211. ret = qmi_send_request
  3212. (&plat_priv->ims_qmi, NULL, txn,
  3213. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3214. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3215. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3216. if (ret < 0) {
  3217. qmi_txn_cancel(txn);
  3218. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3219. ret);
  3220. goto out;
  3221. }
  3222. kfree(req);
  3223. return 0;
  3224. out:
  3225. kfree(req);
  3226. return ret;
  3227. }
  3228. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3229. struct sockaddr_qrtr *sq,
  3230. struct qmi_txn *txn,
  3231. const void *data)
  3232. {
  3233. const
  3234. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3235. data;
  3236. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3237. if (!txn) {
  3238. cnss_pr_err("spurious response\n");
  3239. return;
  3240. }
  3241. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3242. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3243. resp->resp.result, resp->resp.error);
  3244. txn->result = -resp->resp.result;
  3245. }
  3246. }
  3247. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3248. void *data)
  3249. {
  3250. int ret;
  3251. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3252. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3253. kfree(data);
  3254. return ret;
  3255. }
  3256. static void
  3257. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3258. struct sockaddr_qrtr *sq,
  3259. struct qmi_txn *txn, const void *data)
  3260. {
  3261. struct cnss_plat_data *plat_priv =
  3262. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3263. const
  3264. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3265. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3266. if (!txn) {
  3267. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3268. return;
  3269. }
  3270. if (!ind_msg) {
  3271. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3272. return;
  3273. }
  3274. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3275. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3276. ind_msg->all_wfc_calls_held,
  3277. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3278. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3279. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3280. ind_msg->media_quality_valid, ind_msg->media_quality);
  3281. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3282. if (!event_data)
  3283. return;
  3284. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3285. 0, event_data);
  3286. }
  3287. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3288. {
  3289. .type = QMI_RESPONSE,
  3290. .msg_id =
  3291. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3292. .ei =
  3293. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3294. .decoded_size = sizeof(struct
  3295. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3296. .fn = ims_subscribe_for_indication_resp_cb
  3297. },
  3298. {
  3299. .type = QMI_INDICATION,
  3300. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3301. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3302. .decoded_size =
  3303. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3304. .fn = cnss_ims_process_wfc_call_ind_cb
  3305. },
  3306. {}
  3307. };
  3308. static int ims_new_server(struct qmi_handle *qmi,
  3309. struct qmi_service *service)
  3310. {
  3311. struct cnss_plat_data *plat_priv =
  3312. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3313. struct sockaddr_qrtr sq = { 0 };
  3314. int ret = 0;
  3315. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3316. service->node, service->port);
  3317. sq.sq_family = AF_QIPCRTR;
  3318. sq.sq_node = service->node;
  3319. sq.sq_port = service->port;
  3320. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3321. if (ret < 0) {
  3322. cnss_pr_err("Fail to connect to remote service port\n");
  3323. return ret;
  3324. }
  3325. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3326. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3327. plat_priv->driver_state);
  3328. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3329. return ret;
  3330. }
  3331. static void ims_del_server(struct qmi_handle *qmi,
  3332. struct qmi_service *service)
  3333. {
  3334. struct cnss_plat_data *plat_priv =
  3335. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3336. cnss_pr_dbg("IMS server exit\n");
  3337. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3338. }
  3339. static struct qmi_ops ims_qmi_ops = {
  3340. .new_server = ims_new_server,
  3341. .del_server = ims_del_server,
  3342. };
  3343. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3344. { int ret;
  3345. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3346. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3347. &ims_qmi_ops, qmi_ims_msg_handlers);
  3348. if (ret < 0)
  3349. return ret;
  3350. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3351. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3352. return ret;
  3353. }
  3354. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3355. {
  3356. qmi_handle_release(&plat_priv->ims_qmi);
  3357. }