dp_be_rx.c 61 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_tx.h"
  24. #include "dp_be_rx.h"
  25. #include "dp_peer.h"
  26. #include "hal_rx.h"
  27. #include "hal_be_rx.h"
  28. #include "hal_api.h"
  29. #include "hal_be_api.h"
  30. #include "qdf_nbuf.h"
  31. #ifdef MESH_MODE_SUPPORT
  32. #include "if_meta_hdr.h"
  33. #endif
  34. #include "dp_internal.h"
  35. #include "dp_ipa.h"
  36. #ifdef FEATURE_WDS
  37. #include "dp_txrx_wds.h"
  38. #endif
  39. #include "dp_hist.h"
  40. #include "dp_rx_buffer_pool.h"
  41. #ifdef WLAN_SUPPORT_RX_FLOW_TAG
  42. static inline void
  43. dp_rx_update_flow_info(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  44. {
  45. /* Set the flow idx valid flag only when there is no timeout */
  46. if (hal_rx_msdu_flow_idx_timeout_be(rx_tlv_hdr))
  47. return;
  48. qdf_nbuf_set_rx_flow_idx_valid(nbuf,
  49. !hal_rx_msdu_flow_idx_invalid_be(rx_tlv_hdr));
  50. }
  51. #else
  52. static inline void
  53. dp_rx_update_flow_info(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  54. {
  55. }
  56. #endif
  57. #ifndef AST_OFFLOAD_ENABLE
  58. static void
  59. dp_rx_wds_learn(struct dp_soc *soc,
  60. struct dp_vdev *vdev,
  61. uint8_t *rx_tlv_hdr,
  62. struct dp_txrx_peer *txrx_peer,
  63. qdf_nbuf_t nbuf)
  64. {
  65. struct hal_rx_msdu_metadata msdu_metadata;
  66. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr, &msdu_metadata);
  67. /* WDS Source Port Learning */
  68. if (qdf_likely(vdev->wds_enabled))
  69. dp_rx_wds_srcport_learn(soc,
  70. rx_tlv_hdr,
  71. txrx_peer,
  72. nbuf,
  73. msdu_metadata);
  74. }
  75. #else
  76. #ifdef QCA_SUPPORT_WDS_EXTENDED
  77. /**
  78. * dp_wds_ext_peer_learn_be() - function to send event to control
  79. * path on receiving 1st 4-address frame from backhaul.
  80. * @soc: DP soc
  81. * @ta_txrx_peer: WDS repeater txrx peer
  82. * @rx_tlv_hdr: start address of rx tlvs
  83. * @nbuf: RX packet buffer
  84. *
  85. * Return: void
  86. */
  87. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  88. struct dp_txrx_peer *ta_txrx_peer,
  89. uint8_t *rx_tlv_hdr,
  90. qdf_nbuf_t nbuf)
  91. {
  92. uint8_t wds_ext_src_mac[QDF_MAC_ADDR_SIZE];
  93. struct dp_peer *ta_base_peer;
  94. /* instead of checking addr4 is valid or not in per packet path
  95. * check for init bit, which will be set on reception of
  96. * first addr4 valid packet.
  97. */
  98. if (!ta_txrx_peer->vdev->wds_ext_enabled ||
  99. qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT,
  100. &ta_txrx_peer->wds_ext.init))
  101. return;
  102. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  103. (qdf_nbuf_is_fr_ds_set(nbuf) && qdf_nbuf_is_to_ds_set(nbuf))) {
  104. qdf_atomic_test_and_set_bit(WDS_EXT_PEER_INIT_BIT,
  105. &ta_txrx_peer->wds_ext.init);
  106. if (qdf_unlikely(ta_txrx_peer->nawds_enabled &&
  107. ta_txrx_peer->mld_peer)) {
  108. ta_base_peer = dp_get_primary_link_peer_by_id(
  109. soc,
  110. ta_txrx_peer->peer_id,
  111. DP_MOD_ID_RX);
  112. } else {
  113. ta_base_peer = dp_peer_get_ref_by_id(
  114. soc,
  115. ta_txrx_peer->peer_id,
  116. DP_MOD_ID_RX);
  117. }
  118. if (!ta_base_peer)
  119. return;
  120. qdf_mem_copy(wds_ext_src_mac, &ta_base_peer->mac_addr.raw[0],
  121. QDF_MAC_ADDR_SIZE);
  122. dp_peer_unref_delete(ta_base_peer, DP_MOD_ID_RX);
  123. soc->cdp_soc.ol_ops->rx_wds_ext_peer_learn(
  124. soc->ctrl_psoc,
  125. ta_txrx_peer->peer_id,
  126. ta_txrx_peer->vdev->vdev_id,
  127. wds_ext_src_mac);
  128. }
  129. }
  130. #else
  131. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  132. struct dp_txrx_peer *ta_txrx_peer,
  133. uint8_t *rx_tlv_hdr,
  134. qdf_nbuf_t nbuf)
  135. {
  136. }
  137. #endif
  138. static void
  139. dp_rx_wds_learn(struct dp_soc *soc,
  140. struct dp_vdev *vdev,
  141. uint8_t *rx_tlv_hdr,
  142. struct dp_txrx_peer *ta_txrx_peer,
  143. qdf_nbuf_t nbuf)
  144. {
  145. dp_wds_ext_peer_learn_be(soc, ta_txrx_peer, rx_tlv_hdr, nbuf);
  146. }
  147. #endif
  148. uint32_t dp_rx_process_be(struct dp_intr *int_ctx,
  149. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  150. uint32_t quota)
  151. {
  152. hal_ring_desc_t ring_desc;
  153. hal_ring_desc_t last_prefetched_hw_desc;
  154. hal_soc_handle_t hal_soc;
  155. struct dp_rx_desc *rx_desc = NULL;
  156. struct dp_rx_desc *last_prefetched_sw_desc = NULL;
  157. qdf_nbuf_t nbuf, next;
  158. bool near_full;
  159. union dp_rx_desc_list_elem_t *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  160. union dp_rx_desc_list_elem_t *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  161. uint32_t num_pending = 0;
  162. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  163. uint16_t msdu_len = 0;
  164. uint16_t peer_id;
  165. uint8_t vdev_id;
  166. struct dp_txrx_peer *txrx_peer;
  167. dp_txrx_ref_handle txrx_ref_handle = NULL;
  168. struct dp_vdev *vdev;
  169. uint32_t pkt_len = 0;
  170. enum hal_reo_error_status error;
  171. uint8_t *rx_tlv_hdr;
  172. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  173. uint8_t mac_id = 0;
  174. struct dp_pdev *rx_pdev;
  175. bool enh_flag;
  176. struct dp_srng *dp_rxdma_srng;
  177. struct rx_desc_pool *rx_desc_pool;
  178. struct dp_soc *soc = int_ctx->soc;
  179. struct cdp_tid_rx_stats *tid_stats;
  180. qdf_nbuf_t nbuf_head;
  181. qdf_nbuf_t nbuf_tail;
  182. qdf_nbuf_t deliver_list_head;
  183. qdf_nbuf_t deliver_list_tail;
  184. uint32_t num_rx_bufs_reaped = 0;
  185. uint32_t intr_id;
  186. struct hif_opaque_softc *scn;
  187. int32_t tid = 0;
  188. bool is_prev_msdu_last = true;
  189. uint32_t num_entries_avail = 0;
  190. uint32_t rx_ol_pkt_cnt = 0;
  191. uint32_t num_entries = 0;
  192. QDF_STATUS status;
  193. qdf_nbuf_t ebuf_head;
  194. qdf_nbuf_t ebuf_tail;
  195. uint8_t pkt_capture_offload = 0;
  196. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  197. int max_reap_limit, ring_near_full;
  198. struct dp_soc *replenish_soc;
  199. uint8_t chip_id;
  200. uint64_t current_time = 0;
  201. uint32_t old_tid;
  202. uint32_t peer_ext_stats;
  203. uint32_t dsf;
  204. uint32_t l3_pad;
  205. DP_HIST_INIT();
  206. qdf_assert_always(soc && hal_ring_hdl);
  207. hal_soc = soc->hal_soc;
  208. qdf_assert_always(hal_soc);
  209. scn = soc->hif_handle;
  210. intr_id = int_ctx->dp_intr_id;
  211. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  212. dp_runtime_pm_mark_last_busy(soc);
  213. more_data:
  214. /* reset local variables here to be re-used in the function */
  215. nbuf_head = NULL;
  216. nbuf_tail = NULL;
  217. deliver_list_head = NULL;
  218. deliver_list_tail = NULL;
  219. txrx_peer = NULL;
  220. vdev = NULL;
  221. num_rx_bufs_reaped = 0;
  222. ebuf_head = NULL;
  223. ebuf_tail = NULL;
  224. ring_near_full = 0;
  225. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  226. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  227. qdf_mem_zero(head, sizeof(head));
  228. qdf_mem_zero(tail, sizeof(tail));
  229. old_tid = 0xff;
  230. dsf = 0;
  231. peer_ext_stats = 0;
  232. rx_pdev = NULL;
  233. tid_stats = NULL;
  234. dp_pkt_get_timestamp(&current_time);
  235. ring_near_full = _dp_srng_test_and_update_nf_params(soc, rx_ring,
  236. &max_reap_limit);
  237. peer_ext_stats = wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx);
  238. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  239. /*
  240. * Need API to convert from hal_ring pointer to
  241. * Ring Type / Ring Id combo
  242. */
  243. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  244. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  245. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  246. goto done;
  247. }
  248. hal_srng_update_ring_usage_wm_no_lock(soc->hal_soc, hal_ring_hdl);
  249. if (!num_pending)
  250. num_pending = hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, 0);
  251. if (num_pending > quota)
  252. num_pending = quota;
  253. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_pending);
  254. last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
  255. hal_ring_hdl,
  256. num_pending);
  257. /*
  258. * start reaping the buffers from reo ring and queue
  259. * them in per vdev queue.
  260. * Process the received pkts in a different per vdev loop.
  261. */
  262. while (qdf_likely(num_pending)) {
  263. ring_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  264. if (qdf_unlikely(!ring_desc))
  265. break;
  266. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  267. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  268. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  269. soc, hal_ring_hdl, error);
  270. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  271. 1);
  272. /* Don't know how to deal with this -- assert */
  273. qdf_assert(0);
  274. }
  275. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  276. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  277. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  278. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  279. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  280. break;
  281. }
  282. rx_desc = (struct dp_rx_desc *)
  283. hal_rx_get_reo_desc_va(ring_desc);
  284. dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
  285. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  286. ring_desc, rx_desc);
  287. if (QDF_IS_STATUS_ERROR(status)) {
  288. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  289. qdf_assert_always(!rx_desc->unmapped);
  290. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  291. rx_desc->unmapped = 1;
  292. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  293. rx_desc->pool_id);
  294. dp_rx_add_to_free_desc_list(
  295. &head[rx_desc->chip_id][rx_desc->pool_id],
  296. &tail[rx_desc->chip_id][rx_desc->pool_id],
  297. rx_desc);
  298. }
  299. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  300. continue;
  301. }
  302. /*
  303. * this is a unlikely scenario where the host is reaping
  304. * a descriptor which it already reaped just a while ago
  305. * but is yet to replenish it back to HW.
  306. * In this case host will dump the last 128 descriptors
  307. * including the software descriptor rx_desc and assert.
  308. */
  309. if (qdf_unlikely(!rx_desc->in_use)) {
  310. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  311. dp_info_rl("Reaping rx_desc not in use!");
  312. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  313. ring_desc, rx_desc);
  314. /* ignore duplicate RX desc and continue to process */
  315. /* Pop out the descriptor */
  316. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  317. continue;
  318. }
  319. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  320. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  321. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  322. dp_info_rl("Nbuf sanity check failure!");
  323. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  324. ring_desc, rx_desc);
  325. rx_desc->in_err_state = 1;
  326. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  327. continue;
  328. }
  329. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  330. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  331. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  332. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  333. ring_desc, rx_desc);
  334. }
  335. pkt_capture_offload =
  336. dp_rx_copy_desc_info_in_nbuf_cb(soc, ring_desc,
  337. rx_desc->nbuf,
  338. reo_ring_num);
  339. if (qdf_unlikely(qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf))) {
  340. /* In dp_rx_sg_create() until the last buffer,
  341. * end bit should not be set. As continuation bit set,
  342. * this is not a last buffer.
  343. */
  344. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 0);
  345. /* previous msdu has end bit set, so current one is
  346. * the new MPDU
  347. */
  348. if (is_prev_msdu_last) {
  349. /* Get number of entries available in HW ring */
  350. num_entries_avail =
  351. hal_srng_dst_num_valid(hal_soc,
  352. hal_ring_hdl, 1);
  353. /* For new MPDU check if we can read complete
  354. * MPDU by comparing the number of buffers
  355. * available and number of buffers needed to
  356. * reap this MPDU
  357. */
  358. if ((QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) /
  359. (RX_DATA_BUFFER_SIZE -
  360. soc->rx_pkt_tlv_size) + 1) >
  361. num_pending) {
  362. DP_STATS_INC(soc,
  363. rx.msdu_scatter_wait_break,
  364. 1);
  365. dp_rx_cookie_reset_invalid_bit(
  366. ring_desc);
  367. /* As we are going to break out of the
  368. * loop because of unavailability of
  369. * descs to form complete SG, we need to
  370. * reset the TP in the REO destination
  371. * ring.
  372. */
  373. hal_srng_dst_dec_tp(hal_soc,
  374. hal_ring_hdl);
  375. break;
  376. }
  377. is_prev_msdu_last = false;
  378. }
  379. }
  380. if (!is_prev_msdu_last &&
  381. !(qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  382. is_prev_msdu_last = true;
  383. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  384. /*
  385. * move unmap after scattered msdu waiting break logic
  386. * in case double skb unmap happened.
  387. */
  388. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  389. rx_desc->unmapped = 1;
  390. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  391. ebuf_tail, rx_desc);
  392. quota -= 1;
  393. num_pending -= 1;
  394. dp_rx_add_to_free_desc_list
  395. (&head[rx_desc->chip_id][rx_desc->pool_id],
  396. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  397. num_rx_bufs_reaped++;
  398. dp_rx_prefetch_hw_sw_nbuf_32_byte_desc(soc, hal_soc,
  399. num_pending,
  400. hal_ring_hdl,
  401. &last_prefetched_hw_desc,
  402. &last_prefetched_sw_desc);
  403. /*
  404. * only if complete msdu is received for scatter case,
  405. * then allow break.
  406. */
  407. if (is_prev_msdu_last &&
  408. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  409. max_reap_limit))
  410. break;
  411. }
  412. done:
  413. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  414. qdf_dsb();
  415. dp_rx_per_core_stats_update(soc, reo_ring_num, num_rx_bufs_reaped);
  416. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  417. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  418. /*
  419. * continue with next mac_id if no pkts were reaped
  420. * from that pool
  421. */
  422. if (!rx_bufs_reaped[chip_id][mac_id])
  423. continue;
  424. replenish_soc = dp_rx_replensih_soc_get(soc, chip_id);
  425. dp_rxdma_srng =
  426. &replenish_soc->rx_refill_buf_ring[mac_id];
  427. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  428. dp_rx_buffers_replenish_simple(replenish_soc, mac_id,
  429. dp_rxdma_srng,
  430. rx_desc_pool,
  431. rx_bufs_reaped[chip_id][mac_id],
  432. &head[chip_id][mac_id],
  433. &tail[chip_id][mac_id]);
  434. }
  435. }
  436. /* Peer can be NULL is case of LFR */
  437. if (qdf_likely(txrx_peer))
  438. vdev = NULL;
  439. /*
  440. * BIG loop where each nbuf is dequeued from global queue,
  441. * processed and queued back on a per vdev basis. These nbufs
  442. * are sent to stack as and when we run out of nbufs
  443. * or a new nbuf dequeued from global queue has a different
  444. * vdev when compared to previous nbuf.
  445. */
  446. nbuf = nbuf_head;
  447. while (nbuf) {
  448. next = nbuf->next;
  449. dp_rx_prefetch_nbuf_data_be(nbuf, next);
  450. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  451. nbuf = next;
  452. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  453. continue;
  454. }
  455. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  456. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  457. peer_id = dp_rx_get_peer_id_be(nbuf);
  458. if (dp_rx_is_list_ready(deliver_list_head, vdev, txrx_peer,
  459. peer_id, vdev_id)) {
  460. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  461. deliver_list_head,
  462. deliver_list_tail);
  463. deliver_list_head = NULL;
  464. deliver_list_tail = NULL;
  465. }
  466. /* Get TID from struct cb->tid_val, save to tid */
  467. tid = qdf_nbuf_get_tid_val(nbuf);
  468. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS)) {
  469. DP_STATS_INC(soc, rx.err.rx_invalid_tid_err, 1);
  470. dp_rx_nbuf_free(nbuf);
  471. nbuf = next;
  472. continue;
  473. }
  474. if (qdf_unlikely(!txrx_peer)) {
  475. txrx_peer = dp_rx_get_txrx_peer_and_vdev(soc, nbuf,
  476. peer_id,
  477. &txrx_ref_handle,
  478. pkt_capture_offload,
  479. &vdev,
  480. &rx_pdev, &dsf,
  481. &old_tid);
  482. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  483. nbuf = next;
  484. continue;
  485. }
  486. enh_flag = rx_pdev->enhanced_stats_en;
  487. } else if (txrx_peer && txrx_peer->peer_id != peer_id) {
  488. dp_txrx_peer_unref_delete(txrx_ref_handle,
  489. DP_MOD_ID_RX);
  490. txrx_peer = dp_rx_get_txrx_peer_and_vdev(soc, nbuf,
  491. peer_id,
  492. &txrx_ref_handle,
  493. pkt_capture_offload,
  494. &vdev,
  495. &rx_pdev, &dsf,
  496. &old_tid);
  497. if (qdf_unlikely(!txrx_peer) || qdf_unlikely(!vdev)) {
  498. nbuf = next;
  499. continue;
  500. }
  501. enh_flag = rx_pdev->enhanced_stats_en;
  502. }
  503. if (txrx_peer) {
  504. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  505. qdf_dp_trace_set_track(nbuf, QDF_RX);
  506. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  507. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  508. QDF_NBUF_RX_PKT_DATA_TRACK;
  509. }
  510. rx_bufs_used++;
  511. /* when hlos tid override is enabled, save tid in
  512. * skb->priority
  513. */
  514. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  515. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  516. qdf_nbuf_set_priority(nbuf, tid);
  517. DP_RX_TID_SAVE(nbuf, tid);
  518. if (qdf_unlikely(dsf) || qdf_unlikely(peer_ext_stats) ||
  519. dp_rx_pkt_tracepoints_enabled())
  520. qdf_nbuf_set_timestamp(nbuf);
  521. if (qdf_likely(old_tid != tid)) {
  522. tid_stats =
  523. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  524. old_tid = tid;
  525. }
  526. /*
  527. * Check if DMA completed -- msdu_done is the last bit
  528. * to be written
  529. */
  530. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  531. !hal_rx_tlv_msdu_done_get_be(rx_tlv_hdr))) {
  532. dp_err("MSDU DONE failure");
  533. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  534. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  535. QDF_TRACE_LEVEL_INFO);
  536. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  537. dp_rx_nbuf_free(nbuf);
  538. qdf_assert(0);
  539. nbuf = next;
  540. continue;
  541. }
  542. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  543. /*
  544. * First IF condition:
  545. * 802.11 Fragmented pkts are reinjected to REO
  546. * HW block as SG pkts and for these pkts we only
  547. * need to pull the RX TLVS header length.
  548. * Second IF condition:
  549. * The below condition happens when an MSDU is spread
  550. * across multiple buffers. This can happen in two cases
  551. * 1. The nbuf size is smaller then the received msdu.
  552. * ex: we have set the nbuf size to 2048 during
  553. * nbuf_alloc. but we received an msdu which is
  554. * 2304 bytes in size then this msdu is spread
  555. * across 2 nbufs.
  556. *
  557. * 2. AMSDUs when RAW mode is enabled.
  558. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  559. * across 1st nbuf and 2nd nbuf and last MSDU is
  560. * spread across 2nd nbuf and 3rd nbuf.
  561. *
  562. * for these scenarios let us create a skb frag_list and
  563. * append these buffers till the last MSDU of the AMSDU
  564. * Third condition:
  565. * This is the most likely case, we receive 802.3 pkts
  566. * decapsulated by HW, here we need to set the pkt length.
  567. */
  568. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  569. bool is_mcbc, is_sa_vld, is_da_vld;
  570. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  571. rx_tlv_hdr);
  572. is_sa_vld =
  573. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  574. rx_tlv_hdr);
  575. is_da_vld =
  576. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  577. rx_tlv_hdr);
  578. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  579. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  580. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  581. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  582. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  583. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  584. nbuf = dp_rx_sg_create(soc, nbuf);
  585. next = nbuf->next;
  586. if (qdf_nbuf_is_raw_frame(nbuf)) {
  587. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  588. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  589. rx.raw, 1,
  590. msdu_len);
  591. } else {
  592. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  593. if (!dp_rx_is_sg_supported()) {
  594. dp_rx_nbuf_free(nbuf);
  595. dp_info_rl("sg msdu len %d, dropped",
  596. msdu_len);
  597. nbuf = next;
  598. continue;
  599. }
  600. }
  601. } else {
  602. l3_pad = hal_rx_get_l3_pad_bytes_be(nbuf, rx_tlv_hdr);
  603. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  604. pkt_len = msdu_len + l3_pad + soc->rx_pkt_tlv_size;
  605. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  606. dp_rx_skip_tlvs(soc, nbuf, l3_pad);
  607. }
  608. dp_rx_send_pktlog(soc, rx_pdev, nbuf, QDF_TX_RX_STATUS_OK);
  609. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  610. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  611. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  612. rx.policy_check_drop, 1);
  613. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  614. /* Drop & free packet */
  615. dp_rx_nbuf_free(nbuf);
  616. /* Statistics */
  617. nbuf = next;
  618. continue;
  619. }
  620. /*
  621. * Drop non-EAPOL frames from unauthorized peer.
  622. */
  623. if (qdf_likely(txrx_peer) &&
  624. qdf_unlikely(!txrx_peer->authorize) &&
  625. !qdf_nbuf_is_raw_frame(nbuf)) {
  626. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  627. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  628. if (!is_eapol) {
  629. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  630. rx.peer_unauth_rx_pkt_drop,
  631. 1);
  632. dp_rx_nbuf_free(nbuf);
  633. nbuf = next;
  634. continue;
  635. }
  636. }
  637. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  638. dp_rx_update_flow_info(nbuf, rx_tlv_hdr);
  639. if (qdf_unlikely(!rx_pdev->rx_fast_flag)) {
  640. /*
  641. * process frame for mulitpass phrase processing
  642. */
  643. if (qdf_unlikely(vdev->multipass_en)) {
  644. if (dp_rx_multipass_process(txrx_peer, nbuf,
  645. tid) == false) {
  646. DP_PEER_PER_PKT_STATS_INC
  647. (txrx_peer,
  648. rx.multipass_rx_pkt_drop, 1);
  649. dp_rx_nbuf_free(nbuf);
  650. nbuf = next;
  651. continue;
  652. }
  653. }
  654. if (qdf_unlikely(txrx_peer &&
  655. (txrx_peer->nawds_enabled) &&
  656. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  657. (hal_rx_get_mpdu_mac_ad4_valid_be
  658. (rx_tlv_hdr) == false))) {
  659. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  660. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  661. rx.nawds_mcast_drop,
  662. 1);
  663. dp_rx_nbuf_free(nbuf);
  664. nbuf = next;
  665. continue;
  666. }
  667. /* Update the protocol tag in SKB based on CCE metadata
  668. */
  669. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  670. reo_ring_num, false, true);
  671. /* Update the flow tag in SKB based on FSE metadata */
  672. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr,
  673. true);
  674. if (qdf_likely(vdev->rx_decap_type ==
  675. htt_cmn_pkt_type_ethernet) &&
  676. qdf_likely(!vdev->mesh_vdev)) {
  677. dp_rx_wds_learn(soc, vdev,
  678. rx_tlv_hdr,
  679. txrx_peer,
  680. nbuf);
  681. }
  682. if (qdf_unlikely(vdev->mesh_vdev)) {
  683. if (dp_rx_filter_mesh_packets(vdev, nbuf,
  684. rx_tlv_hdr)
  685. == QDF_STATUS_SUCCESS) {
  686. dp_rx_info("%pK: mesh pkt filtered",
  687. soc);
  688. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  689. DP_STATS_INC(vdev->pdev,
  690. dropped.mesh_filter, 1);
  691. dp_rx_nbuf_free(nbuf);
  692. nbuf = next;
  693. continue;
  694. }
  695. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr,
  696. txrx_peer);
  697. }
  698. }
  699. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  700. reo_ring_num, tid_stats);
  701. if (qdf_likely(vdev->rx_decap_type ==
  702. htt_cmn_pkt_type_ethernet) &&
  703. qdf_likely(!vdev->mesh_vdev)) {
  704. /* Intrabss-fwd */
  705. if (dp_rx_check_ap_bridge(vdev))
  706. if (dp_rx_intrabss_fwd_be(soc, txrx_peer,
  707. rx_tlv_hdr,
  708. nbuf)) {
  709. nbuf = next;
  710. tid_stats->intrabss_cnt++;
  711. continue; /* Get next desc */
  712. }
  713. }
  714. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  715. dp_rx_mark_first_packet_after_wow_wakeup(vdev->pdev, rx_tlv_hdr,
  716. nbuf);
  717. dp_rx_update_stats(soc, nbuf);
  718. dp_pkt_add_timestamp(txrx_peer->vdev, QDF_PKT_RX_DRIVER_ENTRY,
  719. current_time, nbuf);
  720. DP_RX_LIST_APPEND(deliver_list_head,
  721. deliver_list_tail,
  722. nbuf);
  723. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  724. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  725. enh_flag);
  726. if (qdf_unlikely(txrx_peer->in_twt))
  727. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  728. rx.to_stack_twt, 1,
  729. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  730. tid_stats->delivered_to_stack++;
  731. nbuf = next;
  732. }
  733. DP_RX_DELIVER_TO_STACK(soc, vdev, txrx_peer, peer_id,
  734. pkt_capture_offload,
  735. deliver_list_head,
  736. deliver_list_tail);
  737. if (qdf_likely(txrx_peer))
  738. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  739. /*
  740. * If we are processing in near-full condition, there are 3 scenario
  741. * 1) Ring entries has reached critical state
  742. * 2) Ring entries are still near high threshold
  743. * 3) Ring entries are below the safe level
  744. *
  745. * One more loop will move the state to normal processing and yield
  746. */
  747. if (ring_near_full && quota)
  748. goto more_data;
  749. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  750. if (quota) {
  751. num_pending =
  752. dp_rx_srng_get_num_pending(hal_soc,
  753. hal_ring_hdl,
  754. num_entries,
  755. &near_full);
  756. if (num_pending) {
  757. DP_STATS_INC(soc, rx.hp_oos2, 1);
  758. if (!hif_exec_should_yield(scn, intr_id))
  759. goto more_data;
  760. if (qdf_unlikely(near_full)) {
  761. DP_STATS_INC(soc, rx.near_full, 1);
  762. goto more_data;
  763. }
  764. }
  765. }
  766. if (vdev && vdev->osif_fisa_flush)
  767. vdev->osif_fisa_flush(soc, reo_ring_num);
  768. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  769. vdev->osif_gro_flush(vdev->osif_vdev,
  770. reo_ring_num);
  771. }
  772. }
  773. /* Update histogram statistics by looping through pdev's */
  774. DP_RX_HIST_STATS_PER_PDEV();
  775. return rx_bufs_used; /* Assume no scale factor for now */
  776. }
  777. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  778. /**
  779. * dp_rx_desc_pool_init_be_cc() - initial RX desc pool for cookie conversion
  780. * @soc: Handle to DP Soc structure
  781. * @rx_desc_pool: Rx descriptor pool handler
  782. * @pool_id: Rx descriptor pool ID
  783. *
  784. * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
  785. */
  786. static QDF_STATUS
  787. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  788. struct rx_desc_pool *rx_desc_pool,
  789. uint32_t pool_id)
  790. {
  791. struct dp_hw_cookie_conversion_t *cc_ctx;
  792. struct dp_soc_be *be_soc;
  793. union dp_rx_desc_list_elem_t *rx_desc_elem;
  794. struct dp_spt_page_desc *page_desc;
  795. uint32_t ppt_idx = 0;
  796. uint32_t avail_entry_index = 0;
  797. if (!rx_desc_pool->pool_size) {
  798. dp_err("desc_num 0 !!");
  799. return QDF_STATUS_E_FAILURE;
  800. }
  801. be_soc = dp_get_be_soc_from_dp_soc(soc);
  802. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  803. page_desc = &cc_ctx->page_desc_base[0];
  804. rx_desc_elem = rx_desc_pool->freelist;
  805. while (rx_desc_elem) {
  806. if (avail_entry_index == 0) {
  807. if (ppt_idx >= cc_ctx->total_page_num) {
  808. dp_alert("insufficient secondary page tables");
  809. qdf_assert_always(0);
  810. }
  811. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  812. }
  813. /* put each RX Desc VA to SPT pages and
  814. * get corresponding ID
  815. */
  816. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  817. avail_entry_index,
  818. &rx_desc_elem->rx_desc);
  819. rx_desc_elem->rx_desc.cookie =
  820. dp_cc_desc_id_generate(page_desc->ppt_index,
  821. avail_entry_index);
  822. rx_desc_elem->rx_desc.chip_id = dp_mlo_get_chip_id(soc);
  823. rx_desc_elem->rx_desc.pool_id = pool_id;
  824. rx_desc_elem->rx_desc.in_use = 0;
  825. rx_desc_elem = rx_desc_elem->next;
  826. avail_entry_index = (avail_entry_index + 1) &
  827. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  828. }
  829. return QDF_STATUS_SUCCESS;
  830. }
  831. #else
  832. static QDF_STATUS
  833. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  834. struct rx_desc_pool *rx_desc_pool,
  835. uint32_t pool_id)
  836. {
  837. struct dp_hw_cookie_conversion_t *cc_ctx;
  838. struct dp_soc_be *be_soc;
  839. struct dp_spt_page_desc *page_desc;
  840. uint32_t ppt_idx = 0;
  841. uint32_t avail_entry_index = 0;
  842. int i = 0;
  843. if (!rx_desc_pool->pool_size) {
  844. dp_err("desc_num 0 !!");
  845. return QDF_STATUS_E_FAILURE;
  846. }
  847. be_soc = dp_get_be_soc_from_dp_soc(soc);
  848. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  849. page_desc = &cc_ctx->page_desc_base[0];
  850. for (i = 0; i <= rx_desc_pool->pool_size - 1; i++) {
  851. if (i == rx_desc_pool->pool_size - 1)
  852. rx_desc_pool->array[i].next = NULL;
  853. else
  854. rx_desc_pool->array[i].next =
  855. &rx_desc_pool->array[i + 1];
  856. if (avail_entry_index == 0) {
  857. if (ppt_idx >= cc_ctx->total_page_num) {
  858. dp_alert("insufficient secondary page tables");
  859. qdf_assert_always(0);
  860. }
  861. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  862. }
  863. /* put each RX Desc VA to SPT pages and
  864. * get corresponding ID
  865. */
  866. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  867. avail_entry_index,
  868. &rx_desc_pool->array[i].rx_desc);
  869. rx_desc_pool->array[i].rx_desc.cookie =
  870. dp_cc_desc_id_generate(page_desc->ppt_index,
  871. avail_entry_index);
  872. rx_desc_pool->array[i].rx_desc.pool_id = pool_id;
  873. rx_desc_pool->array[i].rx_desc.in_use = 0;
  874. rx_desc_pool->array[i].rx_desc.chip_id =
  875. dp_mlo_get_chip_id(soc);
  876. avail_entry_index = (avail_entry_index + 1) &
  877. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  878. }
  879. return QDF_STATUS_SUCCESS;
  880. }
  881. #endif
  882. static void
  883. dp_rx_desc_pool_deinit_be_cc(struct dp_soc *soc,
  884. struct rx_desc_pool *rx_desc_pool,
  885. uint32_t pool_id)
  886. {
  887. struct dp_spt_page_desc *page_desc;
  888. struct dp_soc_be *be_soc;
  889. int i = 0;
  890. struct dp_hw_cookie_conversion_t *cc_ctx;
  891. be_soc = dp_get_be_soc_from_dp_soc(soc);
  892. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  893. for (i = 0; i < cc_ctx->total_page_num; i++) {
  894. page_desc = &cc_ctx->page_desc_base[i];
  895. qdf_mem_zero(page_desc->page_v_addr, qdf_page_size);
  896. }
  897. }
  898. QDF_STATUS dp_rx_desc_pool_init_be(struct dp_soc *soc,
  899. struct rx_desc_pool *rx_desc_pool,
  900. uint32_t pool_id)
  901. {
  902. QDF_STATUS status = QDF_STATUS_SUCCESS;
  903. /* Only regular RX buffer desc pool use HW cookie conversion */
  904. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE) {
  905. dp_info("rx_desc_buf pool init");
  906. status = dp_rx_desc_pool_init_be_cc(soc,
  907. rx_desc_pool,
  908. pool_id);
  909. } else {
  910. dp_info("non_rx_desc_buf_pool init");
  911. status = dp_rx_desc_pool_init_generic(soc, rx_desc_pool,
  912. pool_id);
  913. }
  914. return status;
  915. }
  916. void dp_rx_desc_pool_deinit_be(struct dp_soc *soc,
  917. struct rx_desc_pool *rx_desc_pool,
  918. uint32_t pool_id)
  919. {
  920. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE)
  921. dp_rx_desc_pool_deinit_be_cc(soc, rx_desc_pool, pool_id);
  922. }
  923. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  924. #ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
  925. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  926. void *ring_desc,
  927. struct dp_rx_desc **r_rx_desc)
  928. {
  929. if (hal_rx_wbm_get_cookie_convert_done(ring_desc)) {
  930. /* HW cookie conversion done */
  931. *r_rx_desc = (struct dp_rx_desc *)
  932. hal_rx_wbm_get_desc_va(ring_desc);
  933. } else {
  934. /* SW do cookie conversion */
  935. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  936. *r_rx_desc = (struct dp_rx_desc *)
  937. dp_cc_desc_find(soc, cookie);
  938. }
  939. return QDF_STATUS_SUCCESS;
  940. }
  941. #else
  942. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  943. void *ring_desc,
  944. struct dp_rx_desc **r_rx_desc)
  945. {
  946. *r_rx_desc = (struct dp_rx_desc *)
  947. hal_rx_wbm_get_desc_va(ring_desc);
  948. return QDF_STATUS_SUCCESS;
  949. }
  950. #endif /* DP_HW_COOKIE_CONVERT_EXCEPTION */
  951. #else
  952. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  953. void *ring_desc,
  954. struct dp_rx_desc **r_rx_desc)
  955. {
  956. /* SW do cookie conversion */
  957. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  958. *r_rx_desc = (struct dp_rx_desc *)
  959. dp_cc_desc_find(soc, cookie);
  960. return QDF_STATUS_SUCCESS;
  961. }
  962. #endif /* DP_FEATURE_HW_COOKIE_CONVERSION */
  963. struct dp_rx_desc *dp_rx_desc_cookie_2_va_be(struct dp_soc *soc,
  964. uint32_t cookie)
  965. {
  966. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  967. }
  968. #if defined(WLAN_FEATURE_11BE_MLO)
  969. #if defined(WLAN_MLO_MULTI_CHIP) && defined(WLAN_MCAST_MLO)
  970. #define DP_RANDOM_MAC_ID_BIT_MASK 0xC0
  971. #define DP_RANDOM_MAC_OFFSET 1
  972. #define DP_MAC_LOCAL_ADMBIT_MASK 0x2
  973. #define DP_MAC_LOCAL_ADMBIT_OFFSET 0
  974. static inline void dp_rx_dummy_src_mac(struct dp_vdev *vdev,
  975. qdf_nbuf_t nbuf)
  976. {
  977. qdf_ether_header_t *eh =
  978. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  979. eh->ether_shost[DP_MAC_LOCAL_ADMBIT_OFFSET] =
  980. eh->ether_shost[DP_MAC_LOCAL_ADMBIT_OFFSET] |
  981. DP_MAC_LOCAL_ADMBIT_MASK;
  982. }
  983. #ifdef QCA_SUPPORT_WDS_EXTENDED
  984. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  985. {
  986. return qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT, &peer->wds_ext.init);
  987. }
  988. #else
  989. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  990. {
  991. return false;
  992. }
  993. #endif
  994. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  995. struct dp_vdev *vdev,
  996. struct dp_txrx_peer *peer,
  997. qdf_nbuf_t nbuf)
  998. {
  999. struct dp_vdev *mcast_primary_vdev = NULL;
  1000. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1001. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1002. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1003. struct cdp_tid_rx_stats *tid_stats = &peer->vdev->pdev->stats.
  1004. tid_stats.tid_rx_wbm_stats[0][tid];
  1005. if (!(qdf_nbuf_is_ipv4_igmp_pkt(nbuf) ||
  1006. qdf_nbuf_is_ipv6_igmp_pkt(nbuf)))
  1007. return false;
  1008. if (qdf_unlikely(vdev->multipass_en)) {
  1009. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  1010. DP_PEER_PER_PKT_STATS_INC(peer,
  1011. rx.multipass_rx_pkt_drop, 1);
  1012. return false;
  1013. }
  1014. }
  1015. if (!peer->bss_peer) {
  1016. if (dp_rx_intrabss_mcbc_fwd(soc, peer, NULL, nbuf, tid_stats))
  1017. dp_rx_err("forwarding failed");
  1018. }
  1019. /*
  1020. * In the case of ME6, Backhaul WDS, NAWDS
  1021. * send the igmp pkt on the same link where it received,
  1022. * as these features will use peer based tcl metadata
  1023. */
  1024. qdf_nbuf_set_next(nbuf, NULL);
  1025. if (vdev->mcast_enhancement_en || be_vdev->mcast_primary ||
  1026. peer->nawds_enabled)
  1027. goto send_pkt;
  1028. if (qdf_unlikely(dp_rx_mlo_igmp_wds_ext_handler(peer)))
  1029. goto send_pkt;
  1030. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc, be_vdev,
  1031. DP_MOD_ID_RX);
  1032. if (!mcast_primary_vdev) {
  1033. dp_rx_debug("Non mlo vdev");
  1034. goto send_pkt;
  1035. }
  1036. if (qdf_unlikely(vdev->wrap_vdev)) {
  1037. /* In the case of qwrap repeater send the original
  1038. * packet on the interface where it received,
  1039. * packet with dummy src on the mcast primary interface.
  1040. */
  1041. qdf_nbuf_t nbuf_copy;
  1042. nbuf_copy = qdf_nbuf_copy(nbuf);
  1043. if (qdf_likely(nbuf_copy))
  1044. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf_copy,
  1045. NULL);
  1046. }
  1047. dp_rx_dummy_src_mac(vdev, nbuf);
  1048. dp_rx_deliver_to_stack(mcast_primary_vdev->pdev->soc,
  1049. mcast_primary_vdev,
  1050. peer,
  1051. nbuf,
  1052. NULL);
  1053. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  1054. mcast_primary_vdev,
  1055. DP_MOD_ID_RX);
  1056. return true;
  1057. send_pkt:
  1058. dp_rx_deliver_to_stack(be_vdev->vdev.pdev->soc,
  1059. &be_vdev->vdev,
  1060. peer,
  1061. nbuf,
  1062. NULL);
  1063. return true;
  1064. }
  1065. #else
  1066. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1067. struct dp_vdev *vdev,
  1068. struct dp_txrx_peer *peer,
  1069. qdf_nbuf_t nbuf)
  1070. {
  1071. return false;
  1072. }
  1073. #endif
  1074. #endif
  1075. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1076. uint32_t dp_rx_nf_process(struct dp_intr *int_ctx,
  1077. hal_ring_handle_t hal_ring_hdl,
  1078. uint8_t reo_ring_num,
  1079. uint32_t quota)
  1080. {
  1081. struct dp_soc *soc = int_ctx->soc;
  1082. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  1083. uint32_t work_done = 0;
  1084. if (dp_srng_get_near_full_level(soc, rx_ring) <
  1085. DP_SRNG_THRESH_NEAR_FULL)
  1086. return 0;
  1087. qdf_atomic_set(&rx_ring->near_full, 1);
  1088. work_done++;
  1089. return work_done;
  1090. }
  1091. #endif
  1092. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1093. #ifdef WLAN_FEATURE_11BE_MLO
  1094. /**
  1095. * dp_rx_intrabss_fwd_mlo_allow() - check if MLO forwarding is allowed
  1096. * @ta_peer: transmitter peer handle
  1097. * @da_peer: destination peer handle
  1098. *
  1099. * Return: true - MLO forwarding case, false: not
  1100. */
  1101. static inline bool
  1102. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1103. struct dp_txrx_peer *da_peer)
  1104. {
  1105. /* TA peer and DA peer's vdev should be partner MLO vdevs */
  1106. if (dp_peer_find_mac_addr_cmp(&ta_peer->vdev->mld_mac_addr,
  1107. &da_peer->vdev->mld_mac_addr))
  1108. return false;
  1109. return true;
  1110. }
  1111. #else
  1112. static inline bool
  1113. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1114. struct dp_txrx_peer *da_peer)
  1115. {
  1116. return false;
  1117. }
  1118. #endif
  1119. #ifdef INTRA_BSS_FWD_OFFLOAD
  1120. /**
  1121. * dp_rx_intrabss_ucast_check_be() - Check if intrabss is allowed
  1122. * for unicast frame
  1123. * @nbuf: RX packet buffer
  1124. * @ta_peer: transmitter DP peer handle
  1125. * @rx_tlv_hdr: Rx TLV header
  1126. * @msdu_metadata: MSDU meta data info
  1127. * @params: params to be filled in
  1128. *
  1129. * Return: true - intrabss allowed
  1130. * false - not allow
  1131. */
  1132. static bool
  1133. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1134. struct dp_txrx_peer *ta_peer,
  1135. uint8_t *rx_tlv_hdr,
  1136. struct hal_rx_msdu_metadata *msdu_metadata,
  1137. struct dp_be_intrabss_params *params)
  1138. {
  1139. uint8_t dest_chip_id, dest_chip_pmac_id;
  1140. struct dp_vdev_be *be_vdev =
  1141. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1142. struct dp_soc_be *be_soc =
  1143. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1144. uint16_t da_peer_id;
  1145. struct dp_peer *da_peer = NULL;
  1146. if (!qdf_nbuf_is_intra_bss(nbuf))
  1147. return false;
  1148. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1149. da_peer = dp_peer_get_tgt_peer_by_id(&be_soc->soc, da_peer_id,
  1150. DP_MOD_ID_RX);
  1151. if (da_peer) {
  1152. if (da_peer->bss_peer || (da_peer->txrx_peer == ta_peer)) {
  1153. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1154. return false;
  1155. }
  1156. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1157. }
  1158. hal_rx_tlv_get_dest_chip_pmac_id(rx_tlv_hdr,
  1159. &dest_chip_id,
  1160. &dest_chip_pmac_id);
  1161. qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
  1162. if (dest_chip_id == be_soc->mlo_chip_id) {
  1163. if (dest_chip_pmac_id == ta_peer->vdev->pdev->pdev_id)
  1164. params->tx_vdev_id = ta_peer->vdev->vdev_id;
  1165. else
  1166. params->tx_vdev_id =
  1167. be_vdev->partner_vdev_list[dest_chip_id]
  1168. [dest_chip_pmac_id];
  1169. return true;
  1170. }
  1171. params->tx_vdev_id =
  1172. be_vdev->partner_vdev_list[dest_chip_id][dest_chip_pmac_id];
  1173. params->dest_soc =
  1174. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1175. dest_chip_id);
  1176. if (!params->dest_soc)
  1177. return false;
  1178. return true;
  1179. }
  1180. #else
  1181. #ifdef WLAN_MLO_MULTI_CHIP
  1182. static bool
  1183. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1184. struct dp_txrx_peer *ta_peer,
  1185. uint8_t *rx_tlv_hdr,
  1186. struct hal_rx_msdu_metadata *msdu_metadata,
  1187. struct dp_be_intrabss_params *params)
  1188. {
  1189. uint16_t da_peer_id;
  1190. struct dp_txrx_peer *da_peer;
  1191. bool ret = false;
  1192. uint8_t dest_chip_id;
  1193. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1194. struct dp_vdev_be *be_vdev =
  1195. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1196. struct dp_soc_be *be_soc =
  1197. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1198. if (!(qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf)))
  1199. return false;
  1200. dest_chip_id = HAL_RX_DEST_CHIP_ID_GET(msdu_metadata);
  1201. qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
  1202. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1203. /* use dest chip id when TA is MLD peer and DA is legacy */
  1204. if (be_soc->mlo_enabled &&
  1205. ta_peer->mld_peer &&
  1206. !(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1207. /* validate chip_id, get a ref, and re-assign soc */
  1208. params->dest_soc =
  1209. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1210. dest_chip_id);
  1211. if (!params->dest_soc)
  1212. return false;
  1213. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1214. da_peer_id,
  1215. &txrx_ref_handle,
  1216. DP_MOD_ID_RX);
  1217. if (!da_peer)
  1218. return false;
  1219. } else {
  1220. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1221. da_peer_id,
  1222. &txrx_ref_handle,
  1223. DP_MOD_ID_RX);
  1224. if (!da_peer)
  1225. return false;
  1226. params->dest_soc = da_peer->vdev->pdev->soc;
  1227. if (!params->dest_soc)
  1228. goto rel_da_peer;
  1229. }
  1230. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1231. /* If the source or destination peer in the isolation
  1232. * list then dont forward instead push to bridge stack.
  1233. */
  1234. if (dp_get_peer_isolation(ta_peer) ||
  1235. dp_get_peer_isolation(da_peer)) {
  1236. ret = false;
  1237. goto rel_da_peer;
  1238. }
  1239. if (da_peer->bss_peer || (da_peer == ta_peer)) {
  1240. ret = false;
  1241. goto rel_da_peer;
  1242. }
  1243. /* Same vdev, support Inra-BSS */
  1244. if (da_peer->vdev == ta_peer->vdev) {
  1245. ret = true;
  1246. goto rel_da_peer;
  1247. }
  1248. /* MLO specific Intra-BSS check */
  1249. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1250. /* use dest chip id for legacy dest peer */
  1251. if (!(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1252. if (!(be_vdev->partner_vdev_list[dest_chip_id][0] ==
  1253. params->tx_vdev_id) &&
  1254. !(be_vdev->partner_vdev_list[dest_chip_id][1] ==
  1255. params->tx_vdev_id)) {
  1256. /*dp_soc_unref_delete(soc);*/
  1257. goto rel_da_peer;
  1258. }
  1259. }
  1260. ret = true;
  1261. }
  1262. rel_da_peer:
  1263. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1264. return ret;
  1265. }
  1266. #else
  1267. static bool
  1268. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1269. struct dp_txrx_peer *ta_peer,
  1270. uint8_t *rx_tlv_hdr,
  1271. struct hal_rx_msdu_metadata *msdu_metadata,
  1272. struct dp_be_intrabss_params *params)
  1273. {
  1274. uint16_t da_peer_id;
  1275. struct dp_txrx_peer *da_peer;
  1276. bool ret = false;
  1277. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1278. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  1279. return false;
  1280. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1281. params->dest_soc,
  1282. msdu_metadata->da_idx);
  1283. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1284. &txrx_ref_handle, DP_MOD_ID_RX);
  1285. if (!da_peer)
  1286. return false;
  1287. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1288. /* If the source or destination peer in the isolation
  1289. * list then dont forward instead push to bridge stack.
  1290. */
  1291. if (dp_get_peer_isolation(ta_peer) ||
  1292. dp_get_peer_isolation(da_peer))
  1293. goto rel_da_peer;
  1294. if (da_peer->bss_peer || da_peer == ta_peer)
  1295. goto rel_da_peer;
  1296. /* Same vdev, support Inra-BSS */
  1297. if (da_peer->vdev == ta_peer->vdev) {
  1298. ret = true;
  1299. goto rel_da_peer;
  1300. }
  1301. /* MLO specific Intra-BSS check */
  1302. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1303. ret = true;
  1304. goto rel_da_peer;
  1305. }
  1306. rel_da_peer:
  1307. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1308. return ret;
  1309. }
  1310. #endif /* WLAN_MLO_MULTI_CHIP */
  1311. #endif /* INTRA_BSS_FWD_OFFLOAD */
  1312. #if defined(QCA_MONITOR_2_0_SUPPORT) || defined(CONFIG_WORD_BASED_TLV)
  1313. void dp_rx_word_mask_subscribe_be(struct dp_soc *soc,
  1314. uint32_t *msg_word,
  1315. void *rx_filter)
  1316. {
  1317. struct htt_rx_ring_tlv_filter *tlv_filter =
  1318. (struct htt_rx_ring_tlv_filter *)rx_filter;
  1319. if (!msg_word || !tlv_filter)
  1320. return;
  1321. /* tlv_filter->enable is set to 1 for monitor rings */
  1322. if (tlv_filter->enable)
  1323. return;
  1324. /* if word mask is zero, FW will set the default values */
  1325. if (!(tlv_filter->rx_mpdu_start_wmask > 0 &&
  1326. tlv_filter->rx_msdu_end_wmask > 0)) {
  1327. return;
  1328. }
  1329. HTT_RX_RING_SELECTION_CFG_WORD_MASK_COMPACTION_ENABLE_SET(*msg_word, 1);
  1330. /* word 14 */
  1331. msg_word += 3;
  1332. *msg_word = 0;
  1333. HTT_RX_RING_SELECTION_CFG_RX_MPDU_START_WORD_MASK_SET(
  1334. *msg_word,
  1335. tlv_filter->rx_mpdu_start_wmask);
  1336. /* word 15 */
  1337. msg_word++;
  1338. *msg_word = 0;
  1339. HTT_RX_RING_SELECTION_CFG_RX_MSDU_END_WORD_MASK_SET(
  1340. *msg_word,
  1341. tlv_filter->rx_msdu_end_wmask);
  1342. }
  1343. #else
  1344. void dp_rx_word_mask_subscribe_be(struct dp_soc *soc,
  1345. uint32_t *msg_word,
  1346. void *rx_filter)
  1347. {
  1348. }
  1349. #endif
  1350. #if defined(WLAN_MCAST_MLO) && defined(CONFIG_MLO_SINGLE_DEV)
  1351. static inline
  1352. bool dp_rx_intrabss_mlo_mcbc_fwd(struct dp_soc *soc, struct dp_vdev *vdev,
  1353. qdf_nbuf_t nbuf_copy)
  1354. {
  1355. struct dp_vdev *mcast_primary_vdev = NULL;
  1356. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1357. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1358. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1359. if (!vdev->mlo_vdev)
  1360. return false;
  1361. tx_exc_metadata.is_mlo_mcast = 1;
  1362. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc,
  1363. be_vdev,
  1364. DP_MOD_ID_RX);
  1365. if (!mcast_primary_vdev)
  1366. return false;
  1367. nbuf_copy = dp_tx_send_exception((struct cdp_soc_t *)
  1368. mcast_primary_vdev->pdev->soc,
  1369. mcast_primary_vdev->vdev_id,
  1370. nbuf_copy, &tx_exc_metadata);
  1371. if (nbuf_copy)
  1372. qdf_nbuf_free(nbuf_copy);
  1373. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  1374. mcast_primary_vdev, DP_MOD_ID_RX);
  1375. return true;
  1376. }
  1377. #else
  1378. static inline
  1379. bool dp_rx_intrabss_mlo_mcbc_fwd(struct dp_soc *soc, struct dp_vdev *vdev,
  1380. qdf_nbuf_t nbuf_copy)
  1381. {
  1382. return false;
  1383. }
  1384. #endif
  1385. bool
  1386. dp_rx_intrabss_mcast_handler_be(struct dp_soc *soc,
  1387. struct dp_txrx_peer *ta_txrx_peer,
  1388. qdf_nbuf_t nbuf_copy,
  1389. struct cdp_tid_rx_stats *tid_stats)
  1390. {
  1391. if (qdf_unlikely(ta_txrx_peer->vdev->nawds_enabled)) {
  1392. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1393. uint16_t len = QDF_NBUF_CB_RX_PKT_LEN(nbuf_copy);
  1394. tx_exc_metadata.peer_id = ta_txrx_peer->peer_id;
  1395. tx_exc_metadata.is_intrabss_fwd = 1;
  1396. tx_exc_metadata.tid = HTT_TX_EXT_TID_INVALID;
  1397. if (dp_tx_send_exception((struct cdp_soc_t *)soc,
  1398. ta_txrx_peer->vdev->vdev_id,
  1399. nbuf_copy,
  1400. &tx_exc_metadata)) {
  1401. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1402. rx.intra_bss.fail, 1,
  1403. len);
  1404. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1405. qdf_nbuf_free(nbuf_copy);
  1406. } else {
  1407. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1408. rx.intra_bss.pkts, 1,
  1409. len);
  1410. tid_stats->intrabss_cnt++;
  1411. }
  1412. return true;
  1413. }
  1414. if (dp_rx_intrabss_mlo_mcbc_fwd(soc, ta_txrx_peer->vdev,
  1415. nbuf_copy))
  1416. return true;
  1417. return false;
  1418. }
  1419. bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1420. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1421. {
  1422. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1423. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1424. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  1425. tid_stats.tid_rx_stats[ring_id][tid];
  1426. bool ret = false;
  1427. struct dp_be_intrabss_params params;
  1428. struct hal_rx_msdu_metadata msdu_metadata;
  1429. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  1430. * source, then clone the pkt and send the cloned pkt for
  1431. * intra BSS forwarding and original pkt up the network stack
  1432. * Note: how do we handle multicast pkts. do we forward
  1433. * all multicast pkts as is or let a higher layer module
  1434. * like igmpsnoop decide whether to forward or not with
  1435. * Mcast enhancement.
  1436. */
  1437. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer) {
  1438. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  1439. nbuf, tid_stats);
  1440. }
  1441. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1442. nbuf))
  1443. return true;
  1444. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr, &msdu_metadata);
  1445. params.dest_soc = soc;
  1446. if (dp_rx_intrabss_ucast_check_be(nbuf, ta_peer, rx_tlv_hdr,
  1447. &msdu_metadata, &params)) {
  1448. ret = dp_rx_intrabss_ucast_fwd(params.dest_soc, ta_peer,
  1449. params.tx_vdev_id,
  1450. rx_tlv_hdr, nbuf, tid_stats);
  1451. }
  1452. return ret;
  1453. }
  1454. #endif
  1455. bool dp_rx_chain_msdus_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1456. uint8_t *rx_tlv_hdr, uint8_t mac_id)
  1457. {
  1458. bool mpdu_done = false;
  1459. qdf_nbuf_t curr_nbuf = NULL;
  1460. qdf_nbuf_t tmp_nbuf = NULL;
  1461. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1462. if (!dp_pdev) {
  1463. dp_rx_debug("%pK: pdev is null for mac_id = %d", soc, mac_id);
  1464. return mpdu_done;
  1465. }
  1466. /* if invalid peer SG list has max values free the buffers in list
  1467. * and treat current buffer as start of list
  1468. *
  1469. * current logic to detect the last buffer from attn_tlv is not reliable
  1470. * in OFDMA UL scenario hence add max buffers check to avoid list pile
  1471. * up
  1472. */
  1473. if (!dp_pdev->first_nbuf ||
  1474. (dp_pdev->invalid_peer_head_msdu &&
  1475. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST
  1476. (dp_pdev->invalid_peer_head_msdu) >= DP_MAX_INVALID_BUFFERS)) {
  1477. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1478. dp_pdev->first_nbuf = true;
  1479. /* If the new nbuf received is the first msdu of the
  1480. * amsdu and there are msdus in the invalid peer msdu
  1481. * list, then let us free all the msdus of the invalid
  1482. * peer msdu list.
  1483. * This scenario can happen when we start receiving
  1484. * new a-msdu even before the previous a-msdu is completely
  1485. * received.
  1486. */
  1487. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  1488. while (curr_nbuf) {
  1489. tmp_nbuf = curr_nbuf->next;
  1490. dp_rx_nbuf_free(curr_nbuf);
  1491. curr_nbuf = tmp_nbuf;
  1492. }
  1493. dp_pdev->invalid_peer_head_msdu = NULL;
  1494. dp_pdev->invalid_peer_tail_msdu = NULL;
  1495. dp_monitor_get_mpdu_status(dp_pdev, soc, rx_tlv_hdr);
  1496. }
  1497. if (qdf_nbuf_is_rx_chfrag_end(nbuf) &&
  1498. hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1499. qdf_assert_always(dp_pdev->first_nbuf);
  1500. dp_pdev->first_nbuf = false;
  1501. mpdu_done = true;
  1502. }
  1503. /*
  1504. * For MCL, invalid_peer_head_msdu and invalid_peer_tail_msdu
  1505. * should be NULL here, add the checking for debugging purpose
  1506. * in case some corner case.
  1507. */
  1508. DP_PDEV_INVALID_PEER_MSDU_CHECK(dp_pdev->invalid_peer_head_msdu,
  1509. dp_pdev->invalid_peer_tail_msdu);
  1510. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  1511. dp_pdev->invalid_peer_tail_msdu,
  1512. nbuf);
  1513. return mpdu_done;
  1514. }
  1515. qdf_nbuf_t
  1516. dp_rx_wbm_err_reap_desc_be(struct dp_intr *int_ctx, struct dp_soc *soc,
  1517. hal_ring_handle_t hal_ring_hdl, uint32_t quota,
  1518. uint32_t *rx_bufs_used)
  1519. {
  1520. hal_ring_desc_t ring_desc;
  1521. hal_soc_handle_t hal_soc;
  1522. struct dp_rx_desc *rx_desc;
  1523. union dp_rx_desc_list_elem_t
  1524. *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  1525. union dp_rx_desc_list_elem_t
  1526. *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { NULL } };
  1527. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT] = { { 0 } };
  1528. uint8_t buf_type;
  1529. uint8_t mac_id;
  1530. struct dp_srng *dp_rxdma_srng;
  1531. struct rx_desc_pool *rx_desc_pool;
  1532. qdf_nbuf_t nbuf_head = NULL;
  1533. qdf_nbuf_t nbuf_tail = NULL;
  1534. qdf_nbuf_t nbuf;
  1535. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  1536. uint8_t msdu_continuation = 0;
  1537. bool process_sg_buf = false;
  1538. uint32_t wbm_err_src;
  1539. QDF_STATUS status;
  1540. struct dp_soc *replenish_soc;
  1541. uint8_t chip_id;
  1542. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  1543. qdf_assert(soc && hal_ring_hdl);
  1544. hal_soc = soc->hal_soc;
  1545. qdf_assert(hal_soc);
  1546. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1547. /* TODO */
  1548. /*
  1549. * Need API to convert from hal_ring pointer to
  1550. * Ring Type / Ring Id combo
  1551. */
  1552. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK",
  1553. soc, hal_ring_hdl);
  1554. goto done;
  1555. }
  1556. while (qdf_likely(quota)) {
  1557. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1558. if (qdf_unlikely(!ring_desc))
  1559. break;
  1560. /* XXX */
  1561. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  1562. /*
  1563. * For WBM ring, expect only MSDU buffers
  1564. */
  1565. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  1566. wbm_err_src = hal_rx_wbm_err_src_get(hal_soc, ring_desc);
  1567. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  1568. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  1569. if (soc->arch_ops.dp_wbm_get_rx_desc_from_hal_desc(soc,
  1570. ring_desc,
  1571. &rx_desc)) {
  1572. dp_rx_err_err("get rx desc from hal_desc failed");
  1573. continue;
  1574. }
  1575. qdf_assert_always(rx_desc);
  1576. if (!dp_rx_desc_check_magic(rx_desc)) {
  1577. dp_rx_err_err("%pk: Invalid rx_desc %pk",
  1578. soc, rx_desc);
  1579. continue;
  1580. }
  1581. /*
  1582. * this is a unlikely scenario where the host is reaping
  1583. * a descriptor which it already reaped just a while ago
  1584. * but is yet to replenish it back to HW.
  1585. * In this case host will dump the last 128 descriptors
  1586. * including the software descriptor rx_desc and assert.
  1587. */
  1588. if (qdf_unlikely(!rx_desc->in_use)) {
  1589. DP_STATS_INC(soc, rx.err.hal_wbm_rel_dup, 1);
  1590. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1591. ring_desc, rx_desc);
  1592. continue;
  1593. }
  1594. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
  1595. nbuf = rx_desc->nbuf;
  1596. status = dp_rx_wbm_desc_nbuf_sanity_check(soc, hal_ring_hdl,
  1597. ring_desc, rx_desc);
  1598. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1599. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1600. dp_info_rl("Rx error Nbuf %pk sanity check failure!",
  1601. nbuf);
  1602. rx_desc->in_err_state = 1;
  1603. rx_desc->unmapped = 1;
  1604. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  1605. dp_rx_add_to_free_desc_list(
  1606. &head[rx_desc->chip_id][rx_desc->pool_id],
  1607. &tail[rx_desc->chip_id][rx_desc->pool_id],
  1608. rx_desc);
  1609. continue;
  1610. }
  1611. /* Get MPDU DESC info */
  1612. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc, &mpdu_desc_info);
  1613. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  1614. HAL_MPDU_F_QOS_CONTROL_VALID))
  1615. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  1616. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1617. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1618. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  1619. rx_desc->unmapped = 1;
  1620. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1621. if (qdf_unlikely(
  1622. soc->wbm_release_desc_rx_sg_support &&
  1623. dp_rx_is_sg_formation_required(&wbm_err_info))) {
  1624. /* SG is detected from continuation bit */
  1625. msdu_continuation =
  1626. hal_rx_wbm_err_msdu_continuation_get(hal_soc,
  1627. ring_desc);
  1628. if (msdu_continuation &&
  1629. !(soc->wbm_sg_param.wbm_is_first_msdu_in_sg)) {
  1630. /* Update length from first buffer in SG */
  1631. soc->wbm_sg_param.wbm_sg_desc_msdu_len =
  1632. hal_rx_msdu_start_msdu_len_get(
  1633. soc->hal_soc,
  1634. qdf_nbuf_data(nbuf));
  1635. soc->wbm_sg_param.wbm_is_first_msdu_in_sg =
  1636. true;
  1637. }
  1638. if (msdu_continuation) {
  1639. /* MSDU continued packets */
  1640. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  1641. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1642. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1643. } else {
  1644. /* This is the terminal packet in SG */
  1645. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1646. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1647. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  1648. soc->wbm_sg_param.wbm_sg_desc_msdu_len;
  1649. process_sg_buf = true;
  1650. }
  1651. }
  1652. /*
  1653. * save the wbm desc info in nbuf TLV. We will need this
  1654. * info when we do the actual nbuf processing
  1655. */
  1656. wbm_err_info.pool_id = rx_desc->pool_id;
  1657. hal_rx_priv_info_set_in_tlv(soc->hal_soc,
  1658. qdf_nbuf_data(nbuf),
  1659. (uint8_t *)&wbm_err_info,
  1660. sizeof(wbm_err_info));
  1661. dp_rx_err_tlv_invalidate(soc, nbuf);
  1662. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  1663. if (qdf_nbuf_is_rx_chfrag_cont(nbuf) || process_sg_buf) {
  1664. DP_RX_LIST_APPEND(soc->wbm_sg_param.wbm_sg_nbuf_head,
  1665. soc->wbm_sg_param.wbm_sg_nbuf_tail,
  1666. nbuf);
  1667. if (process_sg_buf) {
  1668. if (!dp_rx_buffer_pool_refill(
  1669. soc,
  1670. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1671. rx_desc->pool_id))
  1672. DP_RX_MERGE_TWO_LIST(
  1673. nbuf_head, nbuf_tail,
  1674. soc->wbm_sg_param.wbm_sg_nbuf_head,
  1675. soc->wbm_sg_param.wbm_sg_nbuf_tail);
  1676. dp_rx_wbm_sg_list_last_msdu_war(soc);
  1677. dp_rx_wbm_sg_list_reset(soc);
  1678. process_sg_buf = false;
  1679. }
  1680. } else if (!dp_rx_buffer_pool_refill(soc, nbuf,
  1681. rx_desc->pool_id)) {
  1682. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, nbuf);
  1683. }
  1684. dp_rx_add_to_free_desc_list
  1685. (&head[rx_desc->chip_id][rx_desc->pool_id],
  1686. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  1687. /*
  1688. * if continuation bit is set then we have MSDU spread
  1689. * across multiple buffers, let us not decrement quota
  1690. * till we reap all buffers of that MSDU.
  1691. */
  1692. if (qdf_likely(!msdu_continuation))
  1693. quota -= 1;
  1694. }
  1695. done:
  1696. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1697. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  1698. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1699. /*
  1700. * continue with next mac_id if no pkts were reaped
  1701. * from that pool
  1702. */
  1703. if (!rx_bufs_reaped[chip_id][mac_id])
  1704. continue;
  1705. replenish_soc =
  1706. soc->arch_ops.dp_rx_replenish_soc_get(soc, chip_id);
  1707. dp_rxdma_srng =
  1708. &replenish_soc->rx_refill_buf_ring[mac_id];
  1709. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  1710. dp_rx_buffers_replenish(replenish_soc, mac_id,
  1711. dp_rxdma_srng,
  1712. rx_desc_pool,
  1713. rx_bufs_reaped[chip_id][mac_id],
  1714. &head[chip_id][mac_id],
  1715. &tail[chip_id][mac_id], false);
  1716. *rx_bufs_used += rx_bufs_reaped[chip_id][mac_id];
  1717. }
  1718. }
  1719. return nbuf_head;
  1720. }
  1721. QDF_STATUS
  1722. dp_rx_null_q_desc_handle_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1723. uint8_t *rx_tlv_hdr, uint8_t pool_id,
  1724. struct dp_txrx_peer *txrx_peer,
  1725. bool is_reo_exception)
  1726. {
  1727. uint32_t pkt_len;
  1728. uint16_t msdu_len;
  1729. struct dp_vdev *vdev;
  1730. uint8_t tid;
  1731. qdf_ether_header_t *eh;
  1732. struct hal_rx_msdu_metadata msdu_metadata;
  1733. uint16_t sa_idx = 0;
  1734. bool is_eapol = 0;
  1735. bool enh_flag;
  1736. qdf_nbuf_set_rx_chfrag_start(
  1737. nbuf,
  1738. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1739. rx_tlv_hdr));
  1740. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1741. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1742. rx_tlv_hdr));
  1743. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1744. rx_tlv_hdr));
  1745. qdf_nbuf_set_da_valid(nbuf,
  1746. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1747. rx_tlv_hdr));
  1748. qdf_nbuf_set_sa_valid(nbuf,
  1749. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1750. rx_tlv_hdr));
  1751. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1752. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1753. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1754. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1755. if (dp_rx_check_pkt_len(soc, pkt_len))
  1756. goto drop_nbuf;
  1757. /* Set length in nbuf */
  1758. qdf_nbuf_set_pktlen(
  1759. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1760. qdf_assert_always(nbuf->data == rx_tlv_hdr);
  1761. }
  1762. /*
  1763. * Check if DMA completed -- msdu_done is the last bit
  1764. * to be written
  1765. */
  1766. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1767. dp_err_rl("MSDU DONE failure");
  1768. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1769. QDF_TRACE_LEVEL_INFO);
  1770. qdf_assert(0);
  1771. }
  1772. if (!txrx_peer &&
  1773. dp_rx_null_q_handle_invalid_peer_id_exception(soc, pool_id,
  1774. rx_tlv_hdr, nbuf))
  1775. return QDF_STATUS_E_FAILURE;
  1776. if (!txrx_peer) {
  1777. bool mpdu_done = false;
  1778. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  1779. if (!pdev) {
  1780. dp_err_rl("pdev is null for pool_id = %d", pool_id);
  1781. return QDF_STATUS_E_FAILURE;
  1782. }
  1783. dp_err_rl("txrx_peer is NULL");
  1784. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1785. qdf_nbuf_len(nbuf));
  1786. /* QCN9000 has the support enabled */
  1787. if (qdf_unlikely(soc->wbm_release_desc_rx_sg_support)) {
  1788. mpdu_done = true;
  1789. nbuf->next = NULL;
  1790. /* Trigger invalid peer handler wrapper */
  1791. dp_rx_process_invalid_peer_wrapper(soc,
  1792. nbuf,
  1793. mpdu_done,
  1794. pool_id);
  1795. } else {
  1796. mpdu_done = soc->arch_ops.dp_rx_chain_msdus(soc, nbuf,
  1797. rx_tlv_hdr,
  1798. pool_id);
  1799. /* Trigger invalid peer handler wrapper */
  1800. dp_rx_process_invalid_peer_wrapper(
  1801. soc,
  1802. pdev->invalid_peer_head_msdu,
  1803. mpdu_done, pool_id);
  1804. }
  1805. if (mpdu_done) {
  1806. pdev->invalid_peer_head_msdu = NULL;
  1807. pdev->invalid_peer_tail_msdu = NULL;
  1808. }
  1809. return QDF_STATUS_E_FAILURE;
  1810. }
  1811. vdev = txrx_peer->vdev;
  1812. if (!vdev) {
  1813. dp_err_rl("Null vdev!");
  1814. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1815. goto drop_nbuf;
  1816. }
  1817. /*
  1818. * Advance the packet start pointer by total size of
  1819. * pre-header TLV's
  1820. */
  1821. if (qdf_nbuf_is_frag(nbuf))
  1822. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1823. else
  1824. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1825. soc->rx_pkt_tlv_size));
  1826. DP_STATS_INC_PKT(vdev, rx_i.null_q_desc_pkt, 1, qdf_nbuf_len(nbuf));
  1827. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1828. if (dp_rx_err_drop_3addr_mcast(vdev, rx_tlv_hdr)) {
  1829. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.mcast_3addr_drop, 1);
  1830. goto drop_nbuf;
  1831. }
  1832. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  1833. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  1834. if ((sa_idx < 0) ||
  1835. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  1836. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1837. goto drop_nbuf;
  1838. }
  1839. }
  1840. if ((!soc->mec_fw_offload) &&
  1841. dp_rx_mcast_echo_check(soc, txrx_peer, rx_tlv_hdr, nbuf)) {
  1842. /* this is a looped back MCBC pkt, drop it */
  1843. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1844. qdf_nbuf_len(nbuf));
  1845. goto drop_nbuf;
  1846. }
  1847. /*
  1848. * In qwrap mode if the received packet matches with any of the vdev
  1849. * mac addresses, drop it. Donot receive multicast packets originated
  1850. * from any proxysta.
  1851. */
  1852. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  1853. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.mec_drop, 1,
  1854. qdf_nbuf_len(nbuf));
  1855. goto drop_nbuf;
  1856. }
  1857. if (qdf_unlikely(txrx_peer->nawds_enabled &&
  1858. hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1859. rx_tlv_hdr))) {
  1860. dp_err_rl("free buffer for multicast packet");
  1861. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.nawds_mcast_drop, 1);
  1862. goto drop_nbuf;
  1863. }
  1864. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  1865. dp_err_rl("mcast Policy Check Drop pkt");
  1866. DP_PEER_PER_PKT_STATS_INC(txrx_peer, rx.policy_check_drop, 1);
  1867. goto drop_nbuf;
  1868. }
  1869. /* WDS Source Port Learning */
  1870. if (!soc->ast_offload_support &&
  1871. qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  1872. vdev->wds_enabled))
  1873. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, txrx_peer, nbuf,
  1874. msdu_metadata);
  1875. if (hal_rx_is_unicast(soc->hal_soc, rx_tlv_hdr)) {
  1876. struct dp_peer *peer;
  1877. struct dp_rx_tid *rx_tid;
  1878. tid = hal_rx_tid_get(soc->hal_soc, rx_tlv_hdr);
  1879. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1880. DP_MOD_ID_RX_ERR);
  1881. if (peer) {
  1882. rx_tid = &peer->rx_tid[tid];
  1883. qdf_spin_lock_bh(&rx_tid->tid_lock);
  1884. if (!peer->rx_tid[tid].hw_qdesc_vaddr_unaligned)
  1885. dp_rx_tid_setup_wifi3(peer, tid, 1,
  1886. IEEE80211_SEQ_MAX);
  1887. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  1888. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  1889. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1890. }
  1891. }
  1892. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1893. if (!txrx_peer->authorize) {
  1894. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1895. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  1896. if (is_eapol) {
  1897. if (!dp_rx_err_match_dhost(eh, vdev))
  1898. goto drop_nbuf;
  1899. } else {
  1900. goto drop_nbuf;
  1901. }
  1902. }
  1903. /*
  1904. * Drop packets in this path if cce_match is found. Packets will come
  1905. * in following path depending on whether tidQ is setup.
  1906. * 1. If tidQ is setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE and
  1907. * cce_match = 1
  1908. * Packets with WIFILI_HAL_RX_WBM_REO_PSH_RSN_ROUTE are already
  1909. * dropped.
  1910. * 2. If tidQ is not setup: WIFILI_HAL_RX_WBM_REO_PSH_RSN_ERROR and
  1911. * cce_match = 1
  1912. * These packets need to be dropped and should not get delivered
  1913. * to stack.
  1914. */
  1915. if (qdf_unlikely(dp_rx_err_cce_drop(soc, vdev, nbuf, rx_tlv_hdr)))
  1916. goto drop_nbuf;
  1917. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1918. qdf_nbuf_set_next(nbuf, NULL);
  1919. dp_rx_deliver_raw(vdev, nbuf, txrx_peer);
  1920. } else {
  1921. enh_flag = vdev->pdev->enhanced_stats_en;
  1922. qdf_nbuf_set_next(nbuf, NULL);
  1923. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1924. enh_flag);
  1925. /*
  1926. * Update the protocol tag in SKB based on
  1927. * CCE metadata
  1928. */
  1929. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1930. EXCEPTION_DEST_RING_ID,
  1931. true, true);
  1932. /* Update the flow tag in SKB based on FSE metadata */
  1933. dp_rx_update_flow_tag(soc, vdev, nbuf,
  1934. rx_tlv_hdr, true);
  1935. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(
  1936. soc->hal_soc, rx_tlv_hdr) &&
  1937. (vdev->rx_decap_type ==
  1938. htt_cmn_pkt_type_ethernet))) {
  1939. DP_PEER_MC_INCC_PKT(txrx_peer, 1, qdf_nbuf_len(nbuf),
  1940. enh_flag);
  1941. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost))
  1942. DP_PEER_BC_INCC_PKT(txrx_peer, 1,
  1943. qdf_nbuf_len(nbuf),
  1944. enh_flag);
  1945. }
  1946. qdf_nbuf_set_exc_frame(nbuf, 1);
  1947. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1948. is_eapol);
  1949. }
  1950. return QDF_STATUS_SUCCESS;
  1951. drop_nbuf:
  1952. dp_rx_nbuf_free(nbuf);
  1953. return QDF_STATUS_E_FAILURE;
  1954. }