msm_cvp_dsp.h 7.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef MSM_CVP_DSP_H
  6. #define MSM_CVP_DSP_H
  7. #include <linux/types.h>
  8. #include <linux/refcount.h>
  9. #include "msm_cvp_debug.h"
  10. #include "cvp_core_hfi.h"
  11. #include <linux/pid.h>
  12. #include <linux/sched.h>
  13. #ifdef CVP_FASTRPC_ENABLED
  14. #include <fastrpc.h>
  15. #else
  16. struct fastrpc_device {
  17. int handle;
  18. };
  19. enum fastrpc_driver_status {
  20. FASTRPC_CVP_B,
  21. };
  22. enum fastrpc_driver_invoke_nums {
  23. FASTRPC_DEV_MAP_DMA = 1,
  24. FASTRPC_DEV_UNMAP_DMA,
  25. FASTRPC_DEV_GET_HLOS_PID,
  26. };
  27. struct fastrpc_driver {
  28. struct device_driver driver;
  29. int handle;
  30. int (*probe)(struct fastrpc_device *dev);
  31. int (*callback)(struct fastrpc_device *dev,
  32. enum fastrpc_driver_status status);
  33. };
  34. #endif /* End of CVP_FASTRPC_ENABLED */
  35. #define CVP_APPS_DSP_GLINK_GUID "cvp-glink-apps-dsp"
  36. #define CVP_APPS_DSP_SMD_GUID "cvp-smd-apps-dsp"
  37. #define VMID_CDSP_Q6 (30)
  38. #define HLOS_VM_NUM 1
  39. #define DSP_VM_NUM 2
  40. #define CVP_DSP_MAX_RESERVED 5
  41. #define CVP_DSP2CPU_RESERVED 8
  42. #define CVP_DSP_RESPONSE_TIMEOUT 300
  43. #define CVP_INVALID_RPMSG_TYPE 0xBADDFACE
  44. #define MAX_FRAME_BUF_NUM 16
  45. #define BITPTRSIZE32 (4)
  46. #define BITPTRSIZE64 (8)
  47. #define HIGH32 (0xFFFFFFFF00000000LL)
  48. #define LOW32 (0xFFFFFFFFLL)
  49. #define CVP_FASTRPC_DRIVER_NAME_SIZE 16
  50. /* Supports up to 8 DSP sessions in 8 processes */
  51. #define MAX_DSP_SESSION_NUM (8)
  52. #define MAX_FASTRPC_DRIVER_NUM (MAX_DSP_SESSION_NUM)
  53. int cvp_dsp_device_init(void);
  54. void cvp_dsp_device_exit(void);
  55. void cvp_dsp_send_hfi_queue(void);
  56. void cvp_dsp_init_hfi_queue_hdr(struct iris_hfi_device *device);
  57. enum CPU2DSP_STATUS {
  58. CPU2DSP_SUCCESS = 0,
  59. CPU2DSP_EFAIL = 1,
  60. CPU2DSP_EFATAL = 2,
  61. CPU2DSP_EUNAVAILABLE = 3,
  62. CPU2DSP_EINVALSTATE = 4,
  63. CPU2DSP_EUNSUPPORTED = 5,
  64. };
  65. enum CVP_DSP_COMMAND {
  66. CPU2DSP_SEND_HFI_QUEUE = 0,
  67. CPU2DSP_SUSPEND = 1,
  68. CPU2DSP_RESUME = 2,
  69. CPU2DSP_SHUTDOWN = 3,
  70. CPU2DSP_REGISTER_BUFFER = 4,
  71. CPU2DSP_DEREGISTER_BUFFER = 5,
  72. CPU2DSP_INIT = 6,
  73. CPU2DSP_SET_DEBUG_LEVEL = 7,
  74. CPU2DSP_MAX_CMD = 8,
  75. DSP2CPU_POWERON = 11,
  76. DSP2CPU_POWEROFF = 12,
  77. DSP2CPU_CREATE_SESSION = 13,
  78. DSP2CPU_DETELE_SESSION = 14,
  79. DSP2CPU_POWER_REQUEST = 15,
  80. DSP2CPU_POWER_CANCEL = 16,
  81. DSP2CPU_REGISTER_BUFFER = 17,
  82. DSP2CPU_DEREGISTER_BUFFER = 18,
  83. DSP2CPU_MEM_ALLOC = 19,
  84. DSP2CPU_MEM_FREE = 20,
  85. DSP2CPU_START_SESSION = 21,
  86. DSP2CPU_STOP_SESSION = 22,
  87. CVP_DSP_MAX_CMD = 23,
  88. };
  89. struct eva_power_req {
  90. uint32_t clock_fdu;
  91. uint32_t clock_ica;
  92. uint32_t clock_od;
  93. uint32_t clock_mpu;
  94. uint32_t clock_fw;
  95. uint32_t bw_ddr;
  96. uint32_t bw_sys_cache;
  97. uint32_t op_clock_fdu;
  98. uint32_t op_clock_ica;
  99. uint32_t op_clock_od;
  100. uint32_t op_clock_mpu;
  101. uint32_t op_clock_fw;
  102. uint32_t op_bw_ddr;
  103. uint32_t op_bw_sys_cache;
  104. };
  105. struct eva_mem_remote {
  106. uint32_t type;
  107. uint32_t size;
  108. uint32_t fd;
  109. uint32_t offset;
  110. uint32_t index;
  111. uint32_t iova;
  112. uint32_t dsp_remote_map;
  113. uint64_t v_dsp_addr;
  114. };
  115. /*
  116. * command: defined as a packet initiated from one party.
  117. * message: defined as a packet sent as response to a command
  118. */
  119. /*
  120. * cvp_dsp_cmd_msg contains
  121. * the message sent from CPU to DSP
  122. * or
  123. * the command sent from CPU to DSP
  124. */
  125. struct cvp_dsp_cmd_msg {
  126. uint32_t type;
  127. int32_t ret;
  128. uint64_t msg_ptr;
  129. uint32_t msg_ptr_len;
  130. uint32_t buff_fd_iova;
  131. uint32_t buff_index;
  132. uint32_t buff_size;
  133. uint32_t session_id;
  134. int32_t ddr_type;
  135. uint32_t buff_fd;
  136. uint32_t buff_offset;
  137. uint32_t buff_fd_size;
  138. uint32_t eva_dsp_debug_mask;
  139. /* Create Session */
  140. uint32_t session_cpu_low;
  141. uint32_t session_cpu_high;
  142. struct eva_mem_remote sbuf;
  143. uint32_t reserved1;
  144. uint32_t reserved2;
  145. };
  146. /* cvp_dsp_rsp_msg contains the message sent from DSP to CPU */
  147. struct cvp_dsp_rsp_msg {
  148. uint32_t type;
  149. int32_t ret;
  150. uint32_t dsp_state;
  151. uint32_t reserved[CVP_DSP_MAX_RESERVED - 1];
  152. };
  153. /* cvp_dsp2cpu_cmd contains the command sent from DSP to cpu*/
  154. struct cvp_dsp2cpu_cmd {
  155. uint32_t type;
  156. uint32_t ver;
  157. uint32_t len;
  158. /* Create Session */
  159. uint32_t session_type;
  160. uint32_t kernel_mask;
  161. uint32_t session_prio;
  162. uint32_t is_secure;
  163. uint32_t dsp_access_mask;
  164. uint32_t session_id;
  165. uint32_t session_cpu_low;
  166. uint32_t session_cpu_high;
  167. int32_t pid;
  168. struct eva_power_req power_req;
  169. struct eva_mem_remote sbuf;
  170. uint32_t data[CVP_DSP2CPU_RESERVED];
  171. };
  172. struct driver_name {
  173. uint32_t status;
  174. char name[CVP_FASTRPC_DRIVER_NAME_SIZE];
  175. };
  176. enum DRIVER_NAME_STATUS {
  177. DRIVER_NAME_INVALID = 0,
  178. DRIVER_NAME_AVAILABLE = 1,
  179. DRIVER_NAME_USED = 2,
  180. };
  181. struct cvp_dsp_fastrpc_driver_entry {
  182. struct list_head list;
  183. uint32_t handle; /*handle is not PID*/
  184. uint32_t session_cnt;
  185. uint32_t driver_name_idx;
  186. atomic_t refcount;
  187. struct fastrpc_driver cvp_fastrpc_driver;
  188. struct fastrpc_device *cvp_fastrpc_device;
  189. struct completion fastrpc_probe_completion;
  190. /* all dsp sessions list */
  191. struct msm_cvp_list dsp_sessions;
  192. };
  193. struct cvp_dsp_apps {
  194. /*
  195. * tx_lock for sending CPU2DSP cmds or msgs
  196. * and dsp state change
  197. */
  198. struct mutex tx_lock;
  199. /* rx_lock for receiving DSP2CPU cmds or msgs */
  200. struct mutex rx_lock;
  201. struct mutex driver_name_lock;
  202. struct rpmsg_device *chan;
  203. uint32_t state;
  204. uint32_t debug_mask;
  205. bool hyp_assigned;
  206. uint64_t addr;
  207. uint32_t size;
  208. struct completion completions[CPU2DSP_MAX_CMD + 1];
  209. struct cvp_dsp2cpu_cmd pending_dsp2cpu_cmd;
  210. struct cvp_dsp_rsp_msg pending_dsp2cpu_rsp;
  211. struct task_struct *dsp_thread;
  212. /* dsp buffer mapping, set of dma function pointer */
  213. const struct file_operations *dmabuf_f_op;
  214. uint32_t buf_num;
  215. struct msm_cvp_list fastrpc_driver_list;
  216. struct driver_name cvp_fastrpc_name[MAX_FASTRPC_DRIVER_NUM];
  217. };
  218. extern struct cvp_dsp_apps gfa_cv;
  219. /*
  220. * API for CVP driver to suspend CVP session during
  221. * power collapse
  222. */
  223. int cvp_dsp_suspend(bool force);
  224. /*
  225. * API for CVP driver to resume CVP session during
  226. * power collapse
  227. */
  228. int cvp_dsp_resume(void);
  229. /*
  230. * API for CVP driver to shutdown CVP session during
  231. * cvp subsystem error.
  232. */
  233. int cvp_dsp_shutdown(void);
  234. /*
  235. * API to register iova buffer address with CDSP
  236. *
  237. * @session_id: cvp session id
  238. * @buff_fd: buffer fd
  239. * @buff_fd_size: total size of fd in bytes
  240. * @buff_size: size in bytes of cvp buffer
  241. * @buff_offset: buffer offset
  242. * @buff_index: buffer index
  243. * @iova_buff_addr: IOVA buffer address
  244. */
  245. int cvp_dsp_register_buffer(uint32_t session_id, uint32_t buff_fd,
  246. uint32_t buff_fd_size, uint32_t buff_size,
  247. uint32_t buff_offset, uint32_t buff_index,
  248. uint32_t buff_fd_iova);
  249. /*
  250. * API to de-register iova buffer address from CDSP
  251. *
  252. * @session_id: cvp session id
  253. * @buff_fd: buffer fd
  254. * @buff_fd_size: total size of fd in bytes
  255. * @buff_size: size in bytes of cvp buffer
  256. * @buff_offset: buffer offset
  257. * @buff_index: buffer index
  258. * @iova_buff_addr: IOVA buffer address
  259. */
  260. int cvp_dsp_deregister_buffer(uint32_t session_id, uint32_t buff_fd,
  261. uint32_t buff_fd_size, uint32_t buff_size,
  262. uint32_t buff_offset, uint32_t buff_index,
  263. uint32_t buff_fd_iova);
  264. int cvp_dsp_fastrpc_unmap(uint32_t handle, struct cvp_internal_buf *buf);
  265. int cvp_dsp_del_sess(uint32_t handle, struct msm_cvp_inst *inst);
  266. void cvp_dsp_send_debug_mask(void);
  267. #endif // MSM_CVP_DSP_H