qmi.c 100 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  39. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  40. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  41. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  43. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  44. #define DMS_QMI_MAX_MSG_LEN SZ_256
  45. #define MAX_SHADOW_REG_RESERVED 2
  46. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  47. MAX_SHADOW_REG_RESERVED)
  48. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  49. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  50. #ifdef CONFIG_CNSS2_DEBUG
  51. static bool ignore_qmi_failure;
  52. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  53. void cnss_ignore_qmi_failure(bool ignore)
  54. {
  55. ignore_qmi_failure = ignore;
  56. }
  57. #else
  58. #define CNSS_QMI_ASSERT() do { } while (0)
  59. void cnss_ignore_qmi_failure(bool ignore) { }
  60. #endif
  61. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  62. {
  63. switch (mode) {
  64. case CNSS_MISSION:
  65. return "MISSION";
  66. case CNSS_FTM:
  67. return "FTM";
  68. case CNSS_EPPING:
  69. return "EPPING";
  70. case CNSS_WALTEST:
  71. return "WALTEST";
  72. case CNSS_OFF:
  73. return "OFF";
  74. case CNSS_CCPM:
  75. return "CCPM";
  76. case CNSS_QVIT:
  77. return "QVIT";
  78. case CNSS_CALIBRATION:
  79. return "CALIBRATION";
  80. default:
  81. return "UNKNOWN";
  82. }
  83. }
  84. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  85. struct qmi_elem_info *req_ei,
  86. struct qmi_elem_info *rsp_ei,
  87. int req_id, size_t req_len,
  88. unsigned long timeout)
  89. {
  90. struct qmi_txn txn;
  91. int ret;
  92. char *err_msg;
  93. struct qmi_response_type_v01 *resp = rsp;
  94. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  95. if (ret < 0) {
  96. err_msg = "Qmi fail: fail to init txn,";
  97. goto out;
  98. }
  99. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  100. req_len, req_ei, req);
  101. if (ret < 0) {
  102. qmi_txn_cancel(&txn);
  103. err_msg = "Qmi fail: fail to send req,";
  104. goto out;
  105. }
  106. ret = qmi_txn_wait(&txn, timeout);
  107. if (ret < 0) {
  108. err_msg = "Qmi fail: wait timeout,";
  109. goto out;
  110. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  111. err_msg = "Qmi fail: request rejected,";
  112. cnss_pr_err("Qmi fail: respons with error:%d\n",
  113. resp->error);
  114. ret = -resp->result;
  115. goto out;
  116. }
  117. cnss_pr_dbg("req %x success\n", req_id);
  118. return 0;
  119. out:
  120. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  121. return ret;
  122. }
  123. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  124. {
  125. struct wlfw_ind_register_req_msg_v01 *req;
  126. struct wlfw_ind_register_resp_msg_v01 *resp;
  127. struct qmi_txn txn;
  128. int ret = 0;
  129. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  130. plat_priv->driver_state);
  131. req = kzalloc(sizeof(*req), GFP_KERNEL);
  132. if (!req)
  133. return -ENOMEM;
  134. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  135. if (!resp) {
  136. kfree(req);
  137. return -ENOMEM;
  138. }
  139. req->client_id_valid = 1;
  140. req->client_id = WLFW_CLIENT_ID;
  141. req->request_mem_enable_valid = 1;
  142. req->request_mem_enable = 1;
  143. req->fw_mem_ready_enable_valid = 1;
  144. req->fw_mem_ready_enable = 1;
  145. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  146. req->fw_init_done_enable_valid = 1;
  147. req->fw_init_done_enable = 1;
  148. req->pin_connect_result_enable_valid = 1;
  149. req->pin_connect_result_enable = 1;
  150. req->cal_done_enable_valid = 1;
  151. req->cal_done_enable = 1;
  152. req->qdss_trace_req_mem_enable_valid = 1;
  153. req->qdss_trace_req_mem_enable = 1;
  154. req->qdss_trace_save_enable_valid = 1;
  155. req->qdss_trace_save_enable = 1;
  156. req->qdss_trace_free_enable_valid = 1;
  157. req->qdss_trace_free_enable = 1;
  158. req->respond_get_info_enable_valid = 1;
  159. req->respond_get_info_enable = 1;
  160. req->wfc_call_twt_config_enable_valid = 1;
  161. req->wfc_call_twt_config_enable = 1;
  162. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  163. wlfw_ind_register_resp_msg_v01_ei, resp);
  164. if (ret < 0) {
  165. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  166. ret);
  167. goto out;
  168. }
  169. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  170. QMI_WLFW_IND_REGISTER_REQ_V01,
  171. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  172. wlfw_ind_register_req_msg_v01_ei, req);
  173. if (ret < 0) {
  174. qmi_txn_cancel(&txn);
  175. cnss_pr_err("Failed to send indication register request, err: %d\n",
  176. ret);
  177. goto out;
  178. }
  179. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  180. if (ret < 0) {
  181. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  182. ret);
  183. goto out;
  184. }
  185. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  186. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  187. resp->resp.result, resp->resp.error);
  188. ret = -resp->resp.result;
  189. goto out;
  190. }
  191. if (resp->fw_status_valid) {
  192. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  193. ret = -EALREADY;
  194. goto qmi_registered;
  195. }
  196. }
  197. kfree(req);
  198. kfree(resp);
  199. return 0;
  200. out:
  201. CNSS_QMI_ASSERT();
  202. qmi_registered:
  203. kfree(req);
  204. kfree(resp);
  205. return ret;
  206. }
  207. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  208. struct wlfw_host_cap_req_msg_v01 *req)
  209. {
  210. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  211. plat_priv->device_id == MANGO_DEVICE_ID) {
  212. req->mlo_capable_valid = 1;
  213. req->mlo_capable = 1;
  214. req->mlo_chip_id_valid = 1;
  215. req->mlo_chip_id = 0;
  216. req->mlo_group_id_valid = 1;
  217. req->mlo_group_id = 0;
  218. req->max_mlo_peer_valid = 1;
  219. /* Max peer number generally won't change for the same device
  220. * but needs to be synced with host driver.
  221. */
  222. req->max_mlo_peer = 32;
  223. req->mlo_num_chips_valid = 1;
  224. req->mlo_num_chips = 1;
  225. req->mlo_chip_info_valid = 1;
  226. req->mlo_chip_info[0].chip_id = 0;
  227. req->mlo_chip_info[0].num_local_links = 2;
  228. req->mlo_chip_info[0].hw_link_id[0] = 0;
  229. req->mlo_chip_info[0].hw_link_id[1] = 1;
  230. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  231. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  232. }
  233. }
  234. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  235. {
  236. struct wlfw_host_cap_req_msg_v01 *req;
  237. struct wlfw_host_cap_resp_msg_v01 *resp;
  238. struct qmi_txn txn;
  239. int ret = 0;
  240. u64 iova_start = 0, iova_size = 0,
  241. iova_ipa_start = 0, iova_ipa_size = 0;
  242. u64 feature_list = 0;
  243. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  244. plat_priv->driver_state);
  245. req = kzalloc(sizeof(*req), GFP_KERNEL);
  246. if (!req)
  247. return -ENOMEM;
  248. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  249. if (!resp) {
  250. kfree(req);
  251. return -ENOMEM;
  252. }
  253. req->num_clients_valid = 1;
  254. req->num_clients = 1;
  255. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  256. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  257. if (req->wake_msi) {
  258. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  259. req->wake_msi_valid = 1;
  260. }
  261. req->bdf_support_valid = 1;
  262. req->bdf_support = 1;
  263. req->m3_support_valid = 1;
  264. req->m3_support = 1;
  265. req->m3_cache_support_valid = 1;
  266. req->m3_cache_support = 1;
  267. req->cal_done_valid = 1;
  268. req->cal_done = plat_priv->cal_done;
  269. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  270. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  271. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  272. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  273. &iova_ipa_size)) {
  274. req->ddr_range_valid = 1;
  275. req->ddr_range[0].start = iova_start;
  276. req->ddr_range[0].size = iova_size + iova_ipa_size;
  277. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  278. req->ddr_range[0].start, req->ddr_range[0].size);
  279. }
  280. req->host_build_type_valid = 1;
  281. req->host_build_type = cnss_get_host_build_type();
  282. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  283. ret = cnss_get_feature_list(plat_priv, &feature_list);
  284. if (!ret) {
  285. req->feature_list_valid = 1;
  286. req->feature_list = feature_list;
  287. cnss_pr_dbg("Sending feature list 0x%llx\n",
  288. req->feature_list);
  289. }
  290. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  291. wlfw_host_cap_resp_msg_v01_ei, resp);
  292. if (ret < 0) {
  293. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  294. ret);
  295. goto out;
  296. }
  297. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  298. QMI_WLFW_HOST_CAP_REQ_V01,
  299. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  300. wlfw_host_cap_req_msg_v01_ei, req);
  301. if (ret < 0) {
  302. qmi_txn_cancel(&txn);
  303. cnss_pr_err("Failed to send host capability request, err: %d\n",
  304. ret);
  305. goto out;
  306. }
  307. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  308. if (ret < 0) {
  309. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  310. ret);
  311. goto out;
  312. }
  313. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  314. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  315. resp->resp.result, resp->resp.error);
  316. ret = -resp->resp.result;
  317. goto out;
  318. }
  319. kfree(req);
  320. kfree(resp);
  321. return 0;
  322. out:
  323. CNSS_QMI_ASSERT();
  324. kfree(req);
  325. kfree(resp);
  326. return ret;
  327. }
  328. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  329. {
  330. struct wlfw_respond_mem_req_msg_v01 *req;
  331. struct wlfw_respond_mem_resp_msg_v01 *resp;
  332. struct qmi_txn txn;
  333. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  334. int ret = 0, i;
  335. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  336. plat_priv->driver_state);
  337. req = kzalloc(sizeof(*req), GFP_KERNEL);
  338. if (!req)
  339. return -ENOMEM;
  340. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  341. if (!resp) {
  342. kfree(req);
  343. return -ENOMEM;
  344. }
  345. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  346. for (i = 0; i < req->mem_seg_len; i++) {
  347. if (!fw_mem[i].pa || !fw_mem[i].size) {
  348. if (fw_mem[i].type == 0) {
  349. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  350. i);
  351. ret = -EINVAL;
  352. goto out;
  353. }
  354. cnss_pr_err("Memory for FW is not available for type: %u\n",
  355. fw_mem[i].type);
  356. ret = -ENOMEM;
  357. goto out;
  358. }
  359. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  360. fw_mem[i].va, &fw_mem[i].pa,
  361. fw_mem[i].size, fw_mem[i].type);
  362. req->mem_seg[i].addr = fw_mem[i].pa;
  363. req->mem_seg[i].size = fw_mem[i].size;
  364. req->mem_seg[i].type = fw_mem[i].type;
  365. }
  366. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  367. wlfw_respond_mem_resp_msg_v01_ei, resp);
  368. if (ret < 0) {
  369. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  370. ret);
  371. goto out;
  372. }
  373. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  374. QMI_WLFW_RESPOND_MEM_REQ_V01,
  375. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  376. wlfw_respond_mem_req_msg_v01_ei, req);
  377. if (ret < 0) {
  378. qmi_txn_cancel(&txn);
  379. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  380. ret);
  381. goto out;
  382. }
  383. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  384. if (ret < 0) {
  385. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  386. ret);
  387. goto out;
  388. }
  389. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  390. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  391. resp->resp.result, resp->resp.error);
  392. ret = -resp->resp.result;
  393. goto out;
  394. }
  395. kfree(req);
  396. kfree(resp);
  397. return 0;
  398. out:
  399. CNSS_QMI_ASSERT();
  400. kfree(req);
  401. kfree(resp);
  402. return ret;
  403. }
  404. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  405. {
  406. struct wlfw_cap_req_msg_v01 *req;
  407. struct wlfw_cap_resp_msg_v01 *resp;
  408. struct qmi_txn txn;
  409. char *fw_build_timestamp;
  410. int ret = 0, i;
  411. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  412. plat_priv->driver_state);
  413. req = kzalloc(sizeof(*req), GFP_KERNEL);
  414. if (!req)
  415. return -ENOMEM;
  416. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  417. if (!resp) {
  418. kfree(req);
  419. return -ENOMEM;
  420. }
  421. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  422. wlfw_cap_resp_msg_v01_ei, resp);
  423. if (ret < 0) {
  424. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  425. ret);
  426. goto out;
  427. }
  428. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  429. QMI_WLFW_CAP_REQ_V01,
  430. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  431. wlfw_cap_req_msg_v01_ei, req);
  432. if (ret < 0) {
  433. qmi_txn_cancel(&txn);
  434. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  435. ret);
  436. goto out;
  437. }
  438. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  439. if (ret < 0) {
  440. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  441. ret);
  442. goto out;
  443. }
  444. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  445. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  446. resp->resp.result, resp->resp.error);
  447. ret = -resp->resp.result;
  448. goto out;
  449. }
  450. if (resp->chip_info_valid) {
  451. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  452. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  453. }
  454. if (resp->board_info_valid)
  455. plat_priv->board_info.board_id = resp->board_info.board_id;
  456. else
  457. plat_priv->board_info.board_id = 0xFF;
  458. if (resp->soc_info_valid)
  459. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  460. if (resp->fw_version_info_valid) {
  461. plat_priv->fw_version_info.fw_version =
  462. resp->fw_version_info.fw_version;
  463. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  464. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  465. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  466. resp->fw_version_info.fw_build_timestamp,
  467. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  468. }
  469. if (resp->fw_build_id_valid) {
  470. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  471. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  472. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  473. }
  474. /* FW will send aop retention volatage for qca6490 */
  475. if (resp->voltage_mv_valid) {
  476. plat_priv->cpr_info.voltage = resp->voltage_mv;
  477. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  478. plat_priv->cpr_info.voltage);
  479. cnss_update_cpr_info(plat_priv);
  480. }
  481. if (resp->time_freq_hz_valid) {
  482. plat_priv->device_freq_hz = resp->time_freq_hz;
  483. cnss_pr_dbg("Device frequency is %d HZ\n",
  484. plat_priv->device_freq_hz);
  485. }
  486. if (resp->otp_version_valid)
  487. plat_priv->otp_version = resp->otp_version;
  488. if (resp->dev_mem_info_valid) {
  489. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  490. plat_priv->dev_mem_info[i].start =
  491. resp->dev_mem_info[i].start;
  492. plat_priv->dev_mem_info[i].size =
  493. resp->dev_mem_info[i].size;
  494. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  495. i, plat_priv->dev_mem_info[i].start,
  496. plat_priv->dev_mem_info[i].size);
  497. }
  498. }
  499. if (resp->fw_caps_valid) {
  500. plat_priv->fw_pcie_gen_switch =
  501. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  502. plat_priv->fw_caps = resp->fw_caps;
  503. }
  504. if (resp->hang_data_length_valid &&
  505. resp->hang_data_length &&
  506. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  507. plat_priv->hang_event_data_len = resp->hang_data_length;
  508. else
  509. plat_priv->hang_event_data_len = 0;
  510. if (resp->hang_data_addr_offset_valid)
  511. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  512. else
  513. plat_priv->hang_data_addr_offset = 0;
  514. if (resp->hwid_bitmap_valid)
  515. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  516. if (resp->ol_cpr_cfg_valid)
  517. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  518. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  519. plat_priv->chip_info.chip_id,
  520. plat_priv->chip_info.chip_family,
  521. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  522. plat_priv->otp_version);
  523. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  524. plat_priv->fw_version_info.fw_version,
  525. plat_priv->fw_version_info.fw_build_timestamp,
  526. plat_priv->fw_build_id,
  527. plat_priv->hwid_bitmap);
  528. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  529. plat_priv->hang_event_data_len,
  530. plat_priv->hang_data_addr_offset);
  531. kfree(req);
  532. kfree(resp);
  533. return 0;
  534. out:
  535. CNSS_QMI_ASSERT();
  536. kfree(req);
  537. kfree(resp);
  538. return ret;
  539. }
  540. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  541. u32 bdf_type, char *filename,
  542. u32 filename_len)
  543. {
  544. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  545. int ret = 0;
  546. switch (bdf_type) {
  547. case CNSS_BDF_ELF:
  548. /* Board ID will be equal or less than 0xFF in GF mask case */
  549. if (plat_priv->board_info.board_id == 0xFF) {
  550. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  551. snprintf(filename_tmp, filename_len,
  552. ELF_BDF_FILE_NAME_GF);
  553. else
  554. snprintf(filename_tmp, filename_len,
  555. ELF_BDF_FILE_NAME);
  556. } else if (plat_priv->board_info.board_id < 0xFF) {
  557. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  558. snprintf(filename_tmp, filename_len,
  559. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  560. plat_priv->board_info.board_id);
  561. else
  562. snprintf(filename_tmp, filename_len,
  563. ELF_BDF_FILE_NAME_PREFIX "%02x",
  564. plat_priv->board_info.board_id);
  565. } else {
  566. snprintf(filename_tmp, filename_len,
  567. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  568. plat_priv->board_info.board_id >> 8 & 0xFF,
  569. plat_priv->board_info.board_id & 0xFF);
  570. }
  571. break;
  572. case CNSS_BDF_BIN:
  573. if (plat_priv->board_info.board_id == 0xFF) {
  574. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  575. snprintf(filename_tmp, filename_len,
  576. BIN_BDF_FILE_NAME_GF);
  577. else
  578. snprintf(filename_tmp, filename_len,
  579. BIN_BDF_FILE_NAME);
  580. } else if (plat_priv->board_info.board_id < 0xFF) {
  581. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  582. snprintf(filename_tmp, filename_len,
  583. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  584. plat_priv->board_info.board_id);
  585. else
  586. snprintf(filename_tmp, filename_len,
  587. BIN_BDF_FILE_NAME_PREFIX "%02x",
  588. plat_priv->board_info.board_id);
  589. } else {
  590. snprintf(filename_tmp, filename_len,
  591. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  592. plat_priv->board_info.board_id >> 8 & 0xFF,
  593. plat_priv->board_info.board_id & 0xFF);
  594. }
  595. break;
  596. case CNSS_BDF_REGDB:
  597. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  598. break;
  599. case CNSS_BDF_HDS:
  600. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  601. break;
  602. default:
  603. cnss_pr_err("Invalid BDF type: %d\n",
  604. plat_priv->ctrl_params.bdf_type);
  605. ret = -EINVAL;
  606. break;
  607. }
  608. if (!ret)
  609. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  610. return ret;
  611. }
  612. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  613. enum wlfw_ini_file_type_v01 file_type)
  614. {
  615. struct wlfw_ini_file_download_req_msg_v01 *req;
  616. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  617. struct qmi_txn txn;
  618. int ret = 0;
  619. const struct firmware *fw;
  620. char filename[INI_FILE_NAME_LEN] = {0};
  621. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  622. const u8 *temp;
  623. unsigned int remaining;
  624. bool backup_supported = false;
  625. cnss_pr_info("INI File %u download\n", file_type);
  626. req = kzalloc(sizeof(*req), GFP_KERNEL);
  627. if (!req)
  628. return -ENOMEM;
  629. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  630. if (!resp) {
  631. kfree(req);
  632. return -ENOMEM;
  633. }
  634. switch (file_type) {
  635. case WLFW_CONN_ROAM_INI_V01:
  636. snprintf(tmp_filename, sizeof(tmp_filename),
  637. CONN_ROAM_FILE_NAME);
  638. backup_supported = true;
  639. break;
  640. default:
  641. cnss_pr_err("Invalid file type: %u\n", file_type);
  642. ret = -EINVAL;
  643. goto err_req_fw;
  644. }
  645. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  646. /* Fetch the file */
  647. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  648. if (ret) {
  649. cnss_pr_err("Failed to get INI file %s (%d), Backup file: %s",
  650. filename, ret,
  651. backup_supported ? "Supported" : "Not Supported");
  652. if (!backup_supported)
  653. goto err_req_fw;
  654. snprintf(filename, sizeof(filename),
  655. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  656. ret = firmware_request_nowarn(&fw, filename,
  657. &plat_priv->plat_dev->dev);
  658. if (ret) {
  659. cnss_pr_err("Failed to get INI file %s (%d)", filename,
  660. ret);
  661. goto err_req_fw;
  662. }
  663. }
  664. temp = fw->data;
  665. remaining = fw->size;
  666. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  667. remaining);
  668. while (remaining) {
  669. req->file_type_valid = 1;
  670. req->file_type = file_type;
  671. req->total_size_valid = 1;
  672. req->total_size = remaining;
  673. req->seg_id_valid = 1;
  674. req->data_valid = 1;
  675. req->end_valid = 1;
  676. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  677. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  678. } else {
  679. req->data_len = remaining;
  680. req->end = 1;
  681. }
  682. memcpy(req->data, temp, req->data_len);
  683. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  684. wlfw_ini_file_download_resp_msg_v01_ei,
  685. resp);
  686. if (ret < 0) {
  687. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  688. ret);
  689. goto err;
  690. }
  691. ret = qmi_send_request
  692. (&plat_priv->qmi_wlfw, NULL, &txn,
  693. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  694. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  695. wlfw_ini_file_download_req_msg_v01_ei, req);
  696. if (ret < 0) {
  697. qmi_txn_cancel(&txn);
  698. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  699. ret);
  700. goto err;
  701. }
  702. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  703. if (ret < 0) {
  704. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  705. ret);
  706. goto err;
  707. }
  708. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  709. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  710. resp->resp.result, resp->resp.error);
  711. ret = -resp->resp.result;
  712. goto err;
  713. }
  714. remaining -= req->data_len;
  715. temp += req->data_len;
  716. req->seg_id++;
  717. }
  718. release_firmware(fw);
  719. kfree(req);
  720. kfree(resp);
  721. return 0;
  722. err:
  723. release_firmware(fw);
  724. err_req_fw:
  725. kfree(req);
  726. kfree(resp);
  727. return ret;
  728. }
  729. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  730. u32 bdf_type)
  731. {
  732. struct wlfw_bdf_download_req_msg_v01 *req;
  733. struct wlfw_bdf_download_resp_msg_v01 *resp;
  734. struct qmi_txn txn;
  735. char filename[MAX_FIRMWARE_NAME_LEN];
  736. const struct firmware *fw_entry = NULL;
  737. const u8 *temp;
  738. unsigned int remaining;
  739. int ret = 0;
  740. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  741. plat_priv->driver_state, bdf_type);
  742. req = kzalloc(sizeof(*req), GFP_KERNEL);
  743. if (!req)
  744. return -ENOMEM;
  745. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  746. if (!resp) {
  747. kfree(req);
  748. return -ENOMEM;
  749. }
  750. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  751. filename, sizeof(filename));
  752. if (ret)
  753. goto err_req_fw;
  754. if (bdf_type == CNSS_BDF_REGDB)
  755. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  756. filename);
  757. else
  758. ret = firmware_request_nowarn(&fw_entry, filename,
  759. &plat_priv->plat_dev->dev);
  760. if (ret) {
  761. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  762. goto err_req_fw;
  763. }
  764. temp = fw_entry->data;
  765. remaining = fw_entry->size;
  766. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  767. while (remaining) {
  768. req->valid = 1;
  769. req->file_id_valid = 1;
  770. req->file_id = plat_priv->board_info.board_id;
  771. req->total_size_valid = 1;
  772. req->total_size = remaining;
  773. req->seg_id_valid = 1;
  774. req->data_valid = 1;
  775. req->end_valid = 1;
  776. req->bdf_type_valid = 1;
  777. req->bdf_type = bdf_type;
  778. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  779. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  780. } else {
  781. req->data_len = remaining;
  782. req->end = 1;
  783. }
  784. memcpy(req->data, temp, req->data_len);
  785. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  786. wlfw_bdf_download_resp_msg_v01_ei, resp);
  787. if (ret < 0) {
  788. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  789. ret);
  790. goto err_send;
  791. }
  792. ret = qmi_send_request
  793. (&plat_priv->qmi_wlfw, NULL, &txn,
  794. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  795. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  796. wlfw_bdf_download_req_msg_v01_ei, req);
  797. if (ret < 0) {
  798. qmi_txn_cancel(&txn);
  799. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  800. ret);
  801. goto err_send;
  802. }
  803. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  804. if (ret < 0) {
  805. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  806. ret);
  807. goto err_send;
  808. }
  809. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  810. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  811. resp->resp.result, resp->resp.error);
  812. ret = -resp->resp.result;
  813. goto err_send;
  814. }
  815. remaining -= req->data_len;
  816. temp += req->data_len;
  817. req->seg_id++;
  818. }
  819. release_firmware(fw_entry);
  820. if (resp->host_bdf_data_valid) {
  821. /* QCA6490 enable S3E regulator for IPA configuration only */
  822. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  823. cnss_enable_int_pow_amp_vreg(plat_priv);
  824. plat_priv->cbc_file_download =
  825. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  826. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  827. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  828. plat_priv->cbc_file_download);
  829. }
  830. kfree(req);
  831. kfree(resp);
  832. return 0;
  833. err_send:
  834. release_firmware(fw_entry);
  835. err_req_fw:
  836. if (!(bdf_type == CNSS_BDF_REGDB ||
  837. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  838. ret == -EAGAIN))
  839. CNSS_QMI_ASSERT();
  840. kfree(req);
  841. kfree(resp);
  842. return ret;
  843. }
  844. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  845. {
  846. struct wlfw_m3_info_req_msg_v01 *req;
  847. struct wlfw_m3_info_resp_msg_v01 *resp;
  848. struct qmi_txn txn;
  849. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  850. int ret = 0;
  851. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  852. plat_priv->driver_state);
  853. req = kzalloc(sizeof(*req), GFP_KERNEL);
  854. if (!req)
  855. return -ENOMEM;
  856. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  857. if (!resp) {
  858. kfree(req);
  859. return -ENOMEM;
  860. }
  861. if (!m3_mem->pa || !m3_mem->size) {
  862. cnss_pr_err("Memory for M3 is not available\n");
  863. ret = -ENOMEM;
  864. goto out;
  865. }
  866. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  867. m3_mem->va, &m3_mem->pa, m3_mem->size);
  868. req->addr = plat_priv->m3_mem.pa;
  869. req->size = plat_priv->m3_mem.size;
  870. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  871. wlfw_m3_info_resp_msg_v01_ei, resp);
  872. if (ret < 0) {
  873. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  874. ret);
  875. goto out;
  876. }
  877. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  878. QMI_WLFW_M3_INFO_REQ_V01,
  879. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  880. wlfw_m3_info_req_msg_v01_ei, req);
  881. if (ret < 0) {
  882. qmi_txn_cancel(&txn);
  883. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  884. ret);
  885. goto out;
  886. }
  887. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  888. if (ret < 0) {
  889. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  890. ret);
  891. goto out;
  892. }
  893. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  894. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  895. resp->resp.result, resp->resp.error);
  896. ret = -resp->resp.result;
  897. goto out;
  898. }
  899. kfree(req);
  900. kfree(resp);
  901. return 0;
  902. out:
  903. CNSS_QMI_ASSERT();
  904. kfree(req);
  905. kfree(resp);
  906. return ret;
  907. }
  908. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  909. u8 *mac, u32 mac_len)
  910. {
  911. struct wlfw_mac_addr_req_msg_v01 req;
  912. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  913. struct qmi_txn txn;
  914. int ret;
  915. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  916. return -EINVAL;
  917. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  918. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  919. if (ret < 0) {
  920. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  921. ret);
  922. ret = -EIO;
  923. goto out;
  924. }
  925. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  926. mac, plat_priv->driver_state);
  927. memcpy(req.mac_addr, mac, mac_len);
  928. req.mac_addr_valid = 1;
  929. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  930. QMI_WLFW_MAC_ADDR_REQ_V01,
  931. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  932. wlfw_mac_addr_req_msg_v01_ei, &req);
  933. if (ret < 0) {
  934. qmi_txn_cancel(&txn);
  935. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  936. ret = -EIO;
  937. goto out;
  938. }
  939. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  940. if (ret < 0) {
  941. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  942. ret);
  943. ret = -EIO;
  944. goto out;
  945. }
  946. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  947. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  948. resp.resp.result);
  949. ret = -resp.resp.result;
  950. }
  951. out:
  952. return ret;
  953. }
  954. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  955. u32 total_size)
  956. {
  957. int ret = 0;
  958. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  959. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  960. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  961. unsigned int remaining;
  962. struct qmi_txn txn;
  963. cnss_pr_dbg("%s\n", __func__);
  964. req = kzalloc(sizeof(*req), GFP_KERNEL);
  965. if (!req)
  966. return -ENOMEM;
  967. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  968. if (!resp) {
  969. kfree(req);
  970. return -ENOMEM;
  971. }
  972. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  973. if (!p_qdss_trace_data) {
  974. ret = ENOMEM;
  975. goto end;
  976. }
  977. remaining = total_size;
  978. p_qdss_trace_data_temp = p_qdss_trace_data;
  979. while (remaining && resp->end == 0) {
  980. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  981. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  982. if (ret < 0) {
  983. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  984. ret);
  985. goto fail;
  986. }
  987. ret = qmi_send_request
  988. (&plat_priv->qmi_wlfw, NULL, &txn,
  989. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  990. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  991. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  992. if (ret < 0) {
  993. qmi_txn_cancel(&txn);
  994. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  995. ret);
  996. goto fail;
  997. }
  998. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  999. if (ret < 0) {
  1000. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  1001. ret);
  1002. goto fail;
  1003. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1004. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1005. resp->resp.result, resp->resp.error);
  1006. ret = -resp->resp.result;
  1007. goto fail;
  1008. } else {
  1009. ret = 0;
  1010. }
  1011. cnss_pr_dbg("%s: response total size %d data len %d",
  1012. __func__, resp->total_size, resp->data_len);
  1013. if ((resp->total_size_valid == 1 &&
  1014. resp->total_size == total_size) &&
  1015. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1016. (resp->data_valid == 1 &&
  1017. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01) &&
  1018. resp->data_len <= remaining) {
  1019. memcpy(p_qdss_trace_data_temp,
  1020. resp->data, resp->data_len);
  1021. } else {
  1022. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1023. __func__,
  1024. total_size, req->seg_id,
  1025. resp->total_size_valid,
  1026. resp->total_size,
  1027. resp->seg_id_valid,
  1028. resp->seg_id,
  1029. resp->data_valid,
  1030. resp->data_len);
  1031. ret = -1;
  1032. goto fail;
  1033. }
  1034. remaining -= resp->data_len;
  1035. p_qdss_trace_data_temp += resp->data_len;
  1036. req->seg_id++;
  1037. }
  1038. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1039. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1040. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1041. total_size);
  1042. if (ret < 0) {
  1043. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1044. ret);
  1045. ret = -1;
  1046. goto fail;
  1047. }
  1048. } else {
  1049. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1050. __func__,
  1051. remaining, resp->end_valid, resp->end);
  1052. ret = -1;
  1053. goto fail;
  1054. }
  1055. fail:
  1056. kfree(p_qdss_trace_data);
  1057. end:
  1058. kfree(req);
  1059. kfree(resp);
  1060. return ret;
  1061. }
  1062. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1063. char *filename, u32 filename_len)
  1064. {
  1065. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1066. char *debug_str = QDSS_DEBUG_FILE_STR;
  1067. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1068. plat_priv->device_id == MANGO_DEVICE_ID)
  1069. debug_str = "";
  1070. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1071. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1072. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1073. else
  1074. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1075. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1076. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1077. }
  1078. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1079. {
  1080. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1081. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1082. struct qmi_txn txn;
  1083. const struct firmware *fw_entry = NULL;
  1084. const u8 *temp;
  1085. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1086. unsigned int remaining;
  1087. int ret = 0;
  1088. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1089. plat_priv->driver_state);
  1090. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1091. if (!req)
  1092. return -ENOMEM;
  1093. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1094. if (!resp) {
  1095. kfree(req);
  1096. return -ENOMEM;
  1097. }
  1098. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1099. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1100. qdss_cfg_filename);
  1101. if (ret) {
  1102. cnss_pr_dbg("Unable to load %s\n",
  1103. qdss_cfg_filename);
  1104. goto err_req_fw;
  1105. }
  1106. temp = fw_entry->data;
  1107. remaining = fw_entry->size;
  1108. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1109. qdss_cfg_filename, remaining);
  1110. while (remaining) {
  1111. req->total_size_valid = 1;
  1112. req->total_size = remaining;
  1113. req->seg_id_valid = 1;
  1114. req->data_valid = 1;
  1115. req->end_valid = 1;
  1116. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1117. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1118. } else {
  1119. req->data_len = remaining;
  1120. req->end = 1;
  1121. }
  1122. memcpy(req->data, temp, req->data_len);
  1123. ret = qmi_txn_init
  1124. (&plat_priv->qmi_wlfw, &txn,
  1125. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1126. resp);
  1127. if (ret < 0) {
  1128. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1129. ret);
  1130. goto err_send;
  1131. }
  1132. ret = qmi_send_request
  1133. (&plat_priv->qmi_wlfw, NULL, &txn,
  1134. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1135. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1136. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1137. if (ret < 0) {
  1138. qmi_txn_cancel(&txn);
  1139. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1140. ret);
  1141. goto err_send;
  1142. }
  1143. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1144. if (ret < 0) {
  1145. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1146. ret);
  1147. goto err_send;
  1148. }
  1149. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1150. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1151. resp->resp.result, resp->resp.error);
  1152. ret = -resp->resp.result;
  1153. goto err_send;
  1154. }
  1155. remaining -= req->data_len;
  1156. temp += req->data_len;
  1157. req->seg_id++;
  1158. }
  1159. release_firmware(fw_entry);
  1160. kfree(req);
  1161. kfree(resp);
  1162. return 0;
  1163. err_send:
  1164. release_firmware(fw_entry);
  1165. err_req_fw:
  1166. kfree(req);
  1167. kfree(resp);
  1168. return ret;
  1169. }
  1170. static int wlfw_send_qdss_trace_mode_req
  1171. (struct cnss_plat_data *plat_priv,
  1172. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1173. unsigned long long option)
  1174. {
  1175. int rc = 0;
  1176. int tmp = 0;
  1177. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1178. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1179. struct qmi_txn txn;
  1180. if (!plat_priv)
  1181. return -ENODEV;
  1182. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1183. if (!req)
  1184. return -ENOMEM;
  1185. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1186. if (!resp) {
  1187. kfree(req);
  1188. return -ENOMEM;
  1189. }
  1190. req->mode_valid = 1;
  1191. req->mode = mode;
  1192. req->option_valid = 1;
  1193. req->option = option;
  1194. tmp = plat_priv->hw_trc_override;
  1195. req->hw_trc_disable_override_valid = 1;
  1196. req->hw_trc_disable_override =
  1197. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1198. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1199. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1200. __func__, mode, option, req->hw_trc_disable_override);
  1201. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1202. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1203. if (rc < 0) {
  1204. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1205. rc);
  1206. goto out;
  1207. }
  1208. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1209. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1210. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1211. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1212. if (rc < 0) {
  1213. qmi_txn_cancel(&txn);
  1214. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1215. goto out;
  1216. }
  1217. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1218. if (rc < 0) {
  1219. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1220. rc);
  1221. goto out;
  1222. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1223. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1224. resp->resp.result, resp->resp.error);
  1225. rc = -resp->resp.result;
  1226. goto out;
  1227. }
  1228. kfree(resp);
  1229. kfree(req);
  1230. return rc;
  1231. out:
  1232. kfree(resp);
  1233. kfree(req);
  1234. CNSS_QMI_ASSERT();
  1235. return rc;
  1236. }
  1237. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1238. {
  1239. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1240. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1241. }
  1242. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1243. {
  1244. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1245. option);
  1246. }
  1247. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1248. enum cnss_driver_mode mode)
  1249. {
  1250. struct wlfw_wlan_mode_req_msg_v01 *req;
  1251. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1252. struct qmi_txn txn;
  1253. int ret = 0;
  1254. if (!plat_priv)
  1255. return -ENODEV;
  1256. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1257. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1258. if (mode == CNSS_OFF &&
  1259. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1260. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1261. return 0;
  1262. }
  1263. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1264. if (!req)
  1265. return -ENOMEM;
  1266. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1267. if (!resp) {
  1268. kfree(req);
  1269. return -ENOMEM;
  1270. }
  1271. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1272. req->hw_debug_valid = 1;
  1273. req->hw_debug = 0;
  1274. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1275. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1276. if (ret < 0) {
  1277. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1278. cnss_qmi_mode_to_str(mode), mode, ret);
  1279. goto out;
  1280. }
  1281. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1282. QMI_WLFW_WLAN_MODE_REQ_V01,
  1283. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1284. wlfw_wlan_mode_req_msg_v01_ei, req);
  1285. if (ret < 0) {
  1286. qmi_txn_cancel(&txn);
  1287. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1288. cnss_qmi_mode_to_str(mode), mode, ret);
  1289. goto out;
  1290. }
  1291. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1292. if (ret < 0) {
  1293. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1294. cnss_qmi_mode_to_str(mode), mode, ret);
  1295. goto out;
  1296. }
  1297. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1298. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1299. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1300. resp->resp.error);
  1301. ret = -resp->resp.result;
  1302. goto out;
  1303. }
  1304. kfree(req);
  1305. kfree(resp);
  1306. return 0;
  1307. out:
  1308. if (mode == CNSS_OFF) {
  1309. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1310. ret = 0;
  1311. } else {
  1312. CNSS_QMI_ASSERT();
  1313. }
  1314. kfree(req);
  1315. kfree(resp);
  1316. return ret;
  1317. }
  1318. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1319. struct cnss_wlan_enable_cfg *config,
  1320. const char *host_version)
  1321. {
  1322. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1323. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1324. struct qmi_txn txn;
  1325. u32 i;
  1326. int ret = 0;
  1327. if (!plat_priv)
  1328. return -ENODEV;
  1329. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1330. plat_priv->driver_state);
  1331. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1332. if (!req)
  1333. return -ENOMEM;
  1334. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1335. if (!resp) {
  1336. kfree(req);
  1337. return -ENOMEM;
  1338. }
  1339. req->host_version_valid = 1;
  1340. strlcpy(req->host_version, host_version,
  1341. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1342. req->tgt_cfg_valid = 1;
  1343. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1344. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1345. else
  1346. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1347. for (i = 0; i < req->tgt_cfg_len; i++) {
  1348. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1349. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1350. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1351. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1352. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1353. }
  1354. req->svc_cfg_valid = 1;
  1355. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1356. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1357. else
  1358. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1359. for (i = 0; i < req->svc_cfg_len; i++) {
  1360. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1361. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1362. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1363. }
  1364. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1365. plat_priv->device_id != MANGO_DEVICE_ID) {
  1366. req->shadow_reg_v2_valid = 1;
  1367. if (config->num_shadow_reg_v2_cfg >
  1368. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1369. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1370. else
  1371. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1372. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1373. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1374. * req->shadow_reg_v2_len);
  1375. } else {
  1376. req->shadow_reg_v3_valid = 1;
  1377. if (config->num_shadow_reg_v3_cfg >
  1378. MAX_NUM_SHADOW_REG_V3)
  1379. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1380. else
  1381. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1382. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1383. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1384. plat_priv->num_shadow_regs_v3);
  1385. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1386. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1387. * req->shadow_reg_v3_len);
  1388. }
  1389. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1390. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1391. if (ret < 0) {
  1392. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1393. ret);
  1394. goto out;
  1395. }
  1396. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1397. QMI_WLFW_WLAN_CFG_REQ_V01,
  1398. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1399. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1400. if (ret < 0) {
  1401. qmi_txn_cancel(&txn);
  1402. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1403. ret);
  1404. goto out;
  1405. }
  1406. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1407. if (ret < 0) {
  1408. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1409. ret);
  1410. goto out;
  1411. }
  1412. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1413. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1414. resp->resp.result, resp->resp.error);
  1415. ret = -resp->resp.result;
  1416. goto out;
  1417. }
  1418. kfree(req);
  1419. kfree(resp);
  1420. return 0;
  1421. out:
  1422. CNSS_QMI_ASSERT();
  1423. kfree(req);
  1424. kfree(resp);
  1425. return ret;
  1426. }
  1427. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1428. u32 offset, u32 mem_type,
  1429. u32 data_len, u8 *data)
  1430. {
  1431. struct wlfw_athdiag_read_req_msg_v01 *req;
  1432. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1433. struct qmi_txn txn;
  1434. int ret = 0;
  1435. if (!plat_priv)
  1436. return -ENODEV;
  1437. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1438. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1439. data, data_len);
  1440. return -EINVAL;
  1441. }
  1442. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1443. plat_priv->driver_state, offset, mem_type, data_len);
  1444. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1445. if (!req)
  1446. return -ENOMEM;
  1447. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1448. if (!resp) {
  1449. kfree(req);
  1450. return -ENOMEM;
  1451. }
  1452. req->offset = offset;
  1453. req->mem_type = mem_type;
  1454. req->data_len = data_len;
  1455. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1456. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1457. if (ret < 0) {
  1458. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1459. ret);
  1460. goto out;
  1461. }
  1462. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1463. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1464. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1465. wlfw_athdiag_read_req_msg_v01_ei, req);
  1466. if (ret < 0) {
  1467. qmi_txn_cancel(&txn);
  1468. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1469. ret);
  1470. goto out;
  1471. }
  1472. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1473. if (ret < 0) {
  1474. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1475. ret);
  1476. goto out;
  1477. }
  1478. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1479. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1480. resp->resp.result, resp->resp.error);
  1481. ret = -resp->resp.result;
  1482. goto out;
  1483. }
  1484. if (!resp->data_valid || resp->data_len != data_len) {
  1485. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1486. resp->data_valid, resp->data_len);
  1487. ret = -EINVAL;
  1488. goto out;
  1489. }
  1490. memcpy(data, resp->data, resp->data_len);
  1491. kfree(req);
  1492. kfree(resp);
  1493. return 0;
  1494. out:
  1495. kfree(req);
  1496. kfree(resp);
  1497. return ret;
  1498. }
  1499. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1500. u32 offset, u32 mem_type,
  1501. u32 data_len, u8 *data)
  1502. {
  1503. struct wlfw_athdiag_write_req_msg_v01 *req;
  1504. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1505. struct qmi_txn txn;
  1506. int ret = 0;
  1507. if (!plat_priv)
  1508. return -ENODEV;
  1509. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1510. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1511. data, data_len);
  1512. return -EINVAL;
  1513. }
  1514. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1515. plat_priv->driver_state, offset, mem_type, data_len, data);
  1516. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1517. if (!req)
  1518. return -ENOMEM;
  1519. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1520. if (!resp) {
  1521. kfree(req);
  1522. return -ENOMEM;
  1523. }
  1524. req->offset = offset;
  1525. req->mem_type = mem_type;
  1526. req->data_len = data_len;
  1527. memcpy(req->data, data, data_len);
  1528. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1529. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1530. if (ret < 0) {
  1531. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1532. ret);
  1533. goto out;
  1534. }
  1535. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1536. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1537. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1538. wlfw_athdiag_write_req_msg_v01_ei, req);
  1539. if (ret < 0) {
  1540. qmi_txn_cancel(&txn);
  1541. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1542. ret);
  1543. goto out;
  1544. }
  1545. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1546. if (ret < 0) {
  1547. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1548. ret);
  1549. goto out;
  1550. }
  1551. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1552. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1553. resp->resp.result, resp->resp.error);
  1554. ret = -resp->resp.result;
  1555. goto out;
  1556. }
  1557. kfree(req);
  1558. kfree(resp);
  1559. return 0;
  1560. out:
  1561. kfree(req);
  1562. kfree(resp);
  1563. return ret;
  1564. }
  1565. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1566. u8 fw_log_mode)
  1567. {
  1568. struct wlfw_ini_req_msg_v01 *req;
  1569. struct wlfw_ini_resp_msg_v01 *resp;
  1570. struct qmi_txn txn;
  1571. int ret = 0;
  1572. if (!plat_priv)
  1573. return -ENODEV;
  1574. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1575. plat_priv->driver_state, fw_log_mode);
  1576. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1577. if (!req)
  1578. return -ENOMEM;
  1579. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1580. if (!resp) {
  1581. kfree(req);
  1582. return -ENOMEM;
  1583. }
  1584. req->enablefwlog_valid = 1;
  1585. req->enablefwlog = fw_log_mode;
  1586. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1587. wlfw_ini_resp_msg_v01_ei, resp);
  1588. if (ret < 0) {
  1589. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1590. fw_log_mode, ret);
  1591. goto out;
  1592. }
  1593. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1594. QMI_WLFW_INI_REQ_V01,
  1595. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1596. wlfw_ini_req_msg_v01_ei, req);
  1597. if (ret < 0) {
  1598. qmi_txn_cancel(&txn);
  1599. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1600. fw_log_mode, ret);
  1601. goto out;
  1602. }
  1603. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1604. if (ret < 0) {
  1605. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1606. fw_log_mode, ret);
  1607. goto out;
  1608. }
  1609. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1610. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1611. fw_log_mode, resp->resp.result, resp->resp.error);
  1612. ret = -resp->resp.result;
  1613. goto out;
  1614. }
  1615. kfree(req);
  1616. kfree(resp);
  1617. return 0;
  1618. out:
  1619. kfree(req);
  1620. kfree(resp);
  1621. return ret;
  1622. }
  1623. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1624. {
  1625. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1626. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1627. struct qmi_txn txn;
  1628. int ret = 0;
  1629. if (!plat_priv)
  1630. return -ENODEV;
  1631. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1632. !plat_priv->fw_pcie_gen_switch) {
  1633. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1634. return 0;
  1635. }
  1636. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1637. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1638. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1639. plat_priv->pcie_gen_speed;
  1640. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1641. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1642. if (ret < 0) {
  1643. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1644. ret);
  1645. goto out;
  1646. }
  1647. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1648. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1649. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1650. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1651. if (ret < 0) {
  1652. qmi_txn_cancel(&txn);
  1653. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1654. goto out;
  1655. }
  1656. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1657. if (ret < 0) {
  1658. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1659. ret);
  1660. goto out;
  1661. }
  1662. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1663. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1664. plat_priv->pcie_gen_speed, resp.resp.result,
  1665. resp.resp.error);
  1666. ret = -resp.resp.result;
  1667. }
  1668. out:
  1669. /* Reset PCIE Gen speed after one time use */
  1670. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1671. return ret;
  1672. }
  1673. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1674. {
  1675. struct wlfw_antenna_switch_req_msg_v01 *req;
  1676. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1677. struct qmi_txn txn;
  1678. int ret = 0;
  1679. if (!plat_priv)
  1680. return -ENODEV;
  1681. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1682. plat_priv->driver_state);
  1683. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1684. if (!req)
  1685. return -ENOMEM;
  1686. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1687. if (!resp) {
  1688. kfree(req);
  1689. return -ENOMEM;
  1690. }
  1691. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1692. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1693. if (ret < 0) {
  1694. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1695. ret);
  1696. goto out;
  1697. }
  1698. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1699. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1700. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1701. wlfw_antenna_switch_req_msg_v01_ei, req);
  1702. if (ret < 0) {
  1703. qmi_txn_cancel(&txn);
  1704. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1705. ret);
  1706. goto out;
  1707. }
  1708. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1709. if (ret < 0) {
  1710. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1711. ret);
  1712. goto out;
  1713. }
  1714. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1715. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1716. resp->resp.result, resp->resp.error);
  1717. ret = -resp->resp.result;
  1718. goto out;
  1719. }
  1720. if (resp->antenna_valid)
  1721. plat_priv->antenna = resp->antenna;
  1722. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1723. resp->antenna_valid, resp->antenna);
  1724. kfree(req);
  1725. kfree(resp);
  1726. return 0;
  1727. out:
  1728. kfree(req);
  1729. kfree(resp);
  1730. return ret;
  1731. }
  1732. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1733. {
  1734. struct wlfw_antenna_grant_req_msg_v01 *req;
  1735. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1736. struct qmi_txn txn;
  1737. int ret = 0;
  1738. if (!plat_priv)
  1739. return -ENODEV;
  1740. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1741. plat_priv->driver_state, plat_priv->grant);
  1742. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1743. if (!req)
  1744. return -ENOMEM;
  1745. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1746. if (!resp) {
  1747. kfree(req);
  1748. return -ENOMEM;
  1749. }
  1750. req->grant_valid = 1;
  1751. req->grant = plat_priv->grant;
  1752. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1753. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1754. if (ret < 0) {
  1755. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1756. ret);
  1757. goto out;
  1758. }
  1759. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1760. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1761. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1762. wlfw_antenna_grant_req_msg_v01_ei, req);
  1763. if (ret < 0) {
  1764. qmi_txn_cancel(&txn);
  1765. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1766. ret);
  1767. goto out;
  1768. }
  1769. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1770. if (ret < 0) {
  1771. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1772. ret);
  1773. goto out;
  1774. }
  1775. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1776. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1777. resp->resp.result, resp->resp.error);
  1778. ret = -resp->resp.result;
  1779. goto out;
  1780. }
  1781. kfree(req);
  1782. kfree(resp);
  1783. return 0;
  1784. out:
  1785. kfree(req);
  1786. kfree(resp);
  1787. return ret;
  1788. }
  1789. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1790. {
  1791. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1792. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1793. struct qmi_txn txn;
  1794. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1795. int ret = 0;
  1796. int i;
  1797. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1798. plat_priv->driver_state);
  1799. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1800. if (!req)
  1801. return -ENOMEM;
  1802. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1803. if (!resp) {
  1804. kfree(req);
  1805. return -ENOMEM;
  1806. }
  1807. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1808. for (i = 0; i < req->mem_seg_len; i++) {
  1809. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1810. qdss_mem[i].va, &qdss_mem[i].pa,
  1811. qdss_mem[i].size, qdss_mem[i].type);
  1812. req->mem_seg[i].addr = qdss_mem[i].pa;
  1813. req->mem_seg[i].size = qdss_mem[i].size;
  1814. req->mem_seg[i].type = qdss_mem[i].type;
  1815. }
  1816. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1817. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1818. if (ret < 0) {
  1819. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1820. ret);
  1821. goto out;
  1822. }
  1823. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1824. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1825. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1826. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1827. if (ret < 0) {
  1828. qmi_txn_cancel(&txn);
  1829. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1830. ret);
  1831. goto out;
  1832. }
  1833. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1834. if (ret < 0) {
  1835. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1836. ret);
  1837. goto out;
  1838. }
  1839. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1840. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1841. resp->resp.result, resp->resp.error);
  1842. ret = -resp->resp.result;
  1843. goto out;
  1844. }
  1845. kfree(req);
  1846. kfree(resp);
  1847. return 0;
  1848. out:
  1849. kfree(req);
  1850. kfree(resp);
  1851. return ret;
  1852. }
  1853. int cnss_wlfw_send_host_wfc_call_status(struct cnss_plat_data *plat_priv,
  1854. struct cnss_wfc_cfg cfg)
  1855. {
  1856. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1857. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1858. struct qmi_txn txn;
  1859. int ret = 0;
  1860. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1861. cnss_pr_err("Drop host WFC indication as FW not initialized\n");
  1862. return -EINVAL;
  1863. }
  1864. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1865. if (!req)
  1866. return -ENOMEM;
  1867. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1868. if (!resp) {
  1869. kfree(req);
  1870. return -ENOMEM;
  1871. }
  1872. req->wfc_call_active_valid = 1;
  1873. req->wfc_call_active = cfg.mode;
  1874. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1875. plat_priv->driver_state);
  1876. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1877. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1878. if (ret < 0) {
  1879. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1880. ret);
  1881. goto out;
  1882. }
  1883. cnss_pr_dbg("Send WFC Mode: %d\n", cfg.mode);
  1884. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1885. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1886. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1887. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1888. if (ret < 0) {
  1889. qmi_txn_cancel(&txn);
  1890. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1891. ret);
  1892. goto out;
  1893. }
  1894. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1895. if (ret < 0) {
  1896. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1897. ret);
  1898. goto out;
  1899. }
  1900. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1901. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1902. resp->resp.result, resp->resp.error);
  1903. ret = -EINVAL;
  1904. goto out;
  1905. }
  1906. ret = 0;
  1907. out:
  1908. kfree(req);
  1909. kfree(resp);
  1910. return ret;
  1911. }
  1912. static int cnss_wlfw_wfc_call_status_send_sync
  1913. (struct cnss_plat_data *plat_priv,
  1914. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1915. {
  1916. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1917. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1918. struct qmi_txn txn;
  1919. int ret = 0;
  1920. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1921. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1922. return -EINVAL;
  1923. }
  1924. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1925. if (!req)
  1926. return -ENOMEM;
  1927. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1928. if (!resp) {
  1929. kfree(req);
  1930. return -ENOMEM;
  1931. }
  1932. /**
  1933. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1934. * But in r2 update QMI structure is expanded and as an effect qmi
  1935. * decoded structures have padding. Thus we cannot use buffer design.
  1936. * For backward compatibility for r1 design copy only wfc_call_active
  1937. * value in hex buffer.
  1938. */
  1939. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1940. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1941. /* wfc_call_active is mandatory in IMS indication */
  1942. req->wfc_call_active_valid = 1;
  1943. req->wfc_call_active = ind_msg->wfc_call_active;
  1944. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1945. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1946. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1947. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1948. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1949. req->twt_ims_start = ind_msg->twt_ims_start;
  1950. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1951. req->twt_ims_int = ind_msg->twt_ims_int;
  1952. req->media_quality_valid = ind_msg->media_quality_valid;
  1953. req->media_quality =
  1954. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1955. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1956. plat_priv->driver_state);
  1957. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1958. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1959. if (ret < 0) {
  1960. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1961. ret);
  1962. goto out;
  1963. }
  1964. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1965. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1966. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1967. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1968. if (ret < 0) {
  1969. qmi_txn_cancel(&txn);
  1970. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1971. ret);
  1972. goto out;
  1973. }
  1974. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1975. if (ret < 0) {
  1976. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1977. ret);
  1978. goto out;
  1979. }
  1980. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1981. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1982. resp->resp.result, resp->resp.error);
  1983. ret = -resp->resp.result;
  1984. goto out;
  1985. }
  1986. ret = 0;
  1987. out:
  1988. kfree(req);
  1989. kfree(resp);
  1990. return ret;
  1991. }
  1992. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1993. {
  1994. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  1995. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  1996. struct qmi_txn txn;
  1997. int ret = 0;
  1998. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  1999. plat_priv->dynamic_feature,
  2000. plat_priv->driver_state);
  2001. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2002. if (!req)
  2003. return -ENOMEM;
  2004. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2005. if (!resp) {
  2006. kfree(req);
  2007. return -ENOMEM;
  2008. }
  2009. req->mask_valid = 1;
  2010. req->mask = plat_priv->dynamic_feature;
  2011. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2012. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  2013. if (ret < 0) {
  2014. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  2015. ret);
  2016. goto out;
  2017. }
  2018. ret = qmi_send_request
  2019. (&plat_priv->qmi_wlfw, NULL, &txn,
  2020. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  2021. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  2022. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  2023. if (ret < 0) {
  2024. qmi_txn_cancel(&txn);
  2025. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  2026. ret);
  2027. goto out;
  2028. }
  2029. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2030. if (ret < 0) {
  2031. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  2032. ret);
  2033. goto out;
  2034. }
  2035. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2036. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  2037. resp->resp.result, resp->resp.error);
  2038. ret = -resp->resp.result;
  2039. goto out;
  2040. }
  2041. out:
  2042. kfree(req);
  2043. kfree(resp);
  2044. return ret;
  2045. }
  2046. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  2047. void *cmd, int cmd_len)
  2048. {
  2049. struct wlfw_get_info_req_msg_v01 *req;
  2050. struct wlfw_get_info_resp_msg_v01 *resp;
  2051. struct qmi_txn txn;
  2052. int ret = 0;
  2053. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  2054. type, cmd_len, plat_priv->driver_state);
  2055. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  2056. return -EINVAL;
  2057. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2058. if (!req)
  2059. return -ENOMEM;
  2060. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2061. if (!resp) {
  2062. kfree(req);
  2063. return -ENOMEM;
  2064. }
  2065. req->type = type;
  2066. req->data_len = cmd_len;
  2067. memcpy(req->data, cmd, req->data_len);
  2068. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2069. wlfw_get_info_resp_msg_v01_ei, resp);
  2070. if (ret < 0) {
  2071. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2072. ret);
  2073. goto out;
  2074. }
  2075. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2076. QMI_WLFW_GET_INFO_REQ_V01,
  2077. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2078. wlfw_get_info_req_msg_v01_ei, req);
  2079. if (ret < 0) {
  2080. qmi_txn_cancel(&txn);
  2081. cnss_pr_err("Failed to send get info request, err: %d\n",
  2082. ret);
  2083. goto out;
  2084. }
  2085. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2086. if (ret < 0) {
  2087. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2088. ret);
  2089. goto out;
  2090. }
  2091. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2092. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2093. resp->resp.result, resp->resp.error);
  2094. ret = -resp->resp.result;
  2095. goto out;
  2096. }
  2097. kfree(req);
  2098. kfree(resp);
  2099. return 0;
  2100. out:
  2101. kfree(req);
  2102. kfree(resp);
  2103. return ret;
  2104. }
  2105. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2106. {
  2107. return QMI_WLFW_TIMEOUT_MS;
  2108. }
  2109. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2110. struct sockaddr_qrtr *sq,
  2111. struct qmi_txn *txn, const void *data)
  2112. {
  2113. struct cnss_plat_data *plat_priv =
  2114. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2115. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2116. int i;
  2117. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2118. if (!txn) {
  2119. cnss_pr_err("Spurious indication\n");
  2120. return;
  2121. }
  2122. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2123. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2124. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2125. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2126. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2127. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2128. if (!plat_priv->fw_mem[i].va &&
  2129. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2130. plat_priv->fw_mem[i].attrs |=
  2131. DMA_ATTR_FORCE_CONTIGUOUS;
  2132. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2133. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2134. }
  2135. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2136. 0, NULL);
  2137. }
  2138. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2139. struct sockaddr_qrtr *sq,
  2140. struct qmi_txn *txn, const void *data)
  2141. {
  2142. struct cnss_plat_data *plat_priv =
  2143. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2144. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2145. if (!txn) {
  2146. cnss_pr_err("Spurious indication\n");
  2147. return;
  2148. }
  2149. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2150. 0, NULL);
  2151. }
  2152. /**
  2153. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2154. *
  2155. * This event is not required for HST/ HSP as FW calibration done is
  2156. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2157. */
  2158. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2159. struct sockaddr_qrtr *sq,
  2160. struct qmi_txn *txn, const void *data)
  2161. {
  2162. struct cnss_plat_data *plat_priv =
  2163. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2164. struct cnss_cal_info *cal_info;
  2165. if (!txn) {
  2166. cnss_pr_err("Spurious indication\n");
  2167. return;
  2168. }
  2169. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2170. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2171. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2172. return;
  2173. }
  2174. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2175. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2176. if (!cal_info)
  2177. return;
  2178. cal_info->cal_status = CNSS_CAL_DONE;
  2179. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2180. 0, cal_info);
  2181. }
  2182. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2183. struct sockaddr_qrtr *sq,
  2184. struct qmi_txn *txn, const void *data)
  2185. {
  2186. struct cnss_plat_data *plat_priv =
  2187. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2188. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2189. if (!txn) {
  2190. cnss_pr_err("Spurious indication\n");
  2191. return;
  2192. }
  2193. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2194. }
  2195. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2196. struct sockaddr_qrtr *sq,
  2197. struct qmi_txn *txn, const void *data)
  2198. {
  2199. struct cnss_plat_data *plat_priv =
  2200. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2201. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2202. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2203. if (!txn) {
  2204. cnss_pr_err("Spurious indication\n");
  2205. return;
  2206. }
  2207. if (ind_msg->pwr_pin_result_valid)
  2208. plat_priv->pin_result.fw_pwr_pin_result =
  2209. ind_msg->pwr_pin_result;
  2210. if (ind_msg->phy_io_pin_result_valid)
  2211. plat_priv->pin_result.fw_phy_io_pin_result =
  2212. ind_msg->phy_io_pin_result;
  2213. if (ind_msg->rf_pin_result_valid)
  2214. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2215. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2216. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2217. ind_msg->rf_pin_result);
  2218. }
  2219. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2220. u32 cal_file_download_size)
  2221. {
  2222. struct wlfw_cal_report_req_msg_v01 req = {0};
  2223. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2224. struct qmi_txn txn;
  2225. int ret = 0;
  2226. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2227. cal_file_download_size, plat_priv->driver_state);
  2228. req.cal_file_download_size_valid = 1;
  2229. req.cal_file_download_size = cal_file_download_size;
  2230. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2231. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2232. if (ret < 0) {
  2233. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2234. ret);
  2235. goto out;
  2236. }
  2237. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2238. QMI_WLFW_CAL_REPORT_REQ_V01,
  2239. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2240. wlfw_cal_report_req_msg_v01_ei, &req);
  2241. if (ret < 0) {
  2242. qmi_txn_cancel(&txn);
  2243. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2244. ret);
  2245. goto out;
  2246. }
  2247. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2248. if (ret < 0) {
  2249. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2250. ret);
  2251. goto out;
  2252. }
  2253. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2254. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2255. resp.resp.result, resp.resp.error);
  2256. ret = -resp.resp.result;
  2257. goto out;
  2258. }
  2259. out:
  2260. return ret;
  2261. }
  2262. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2263. struct sockaddr_qrtr *sq,
  2264. struct qmi_txn *txn, const void *data)
  2265. {
  2266. struct cnss_plat_data *plat_priv =
  2267. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2268. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2269. struct cnss_cal_info *cal_info;
  2270. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2271. ind->cal_file_upload_size);
  2272. cnss_pr_info("Calibration took %d ms\n",
  2273. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2274. if (!txn) {
  2275. cnss_pr_err("Spurious indication\n");
  2276. return;
  2277. }
  2278. if (ind->cal_file_upload_size_valid)
  2279. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2280. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2281. if (!cal_info)
  2282. return;
  2283. cal_info->cal_status = CNSS_CAL_DONE;
  2284. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2285. 0, cal_info);
  2286. }
  2287. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2288. struct sockaddr_qrtr *sq,
  2289. struct qmi_txn *txn,
  2290. const void *data)
  2291. {
  2292. struct cnss_plat_data *plat_priv =
  2293. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2294. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2295. int i;
  2296. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2297. if (!txn) {
  2298. cnss_pr_err("Spurious indication\n");
  2299. return;
  2300. }
  2301. if (plat_priv->qdss_mem_seg_len) {
  2302. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2303. plat_priv->qdss_mem_seg_len);
  2304. return;
  2305. }
  2306. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2307. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2308. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2309. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2310. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2311. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2312. }
  2313. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2314. 0, NULL);
  2315. }
  2316. /**
  2317. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2318. *
  2319. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2320. * fw memory segment for dumping to file system. Only one type of mem can be
  2321. * saved per indication and is provided in mem seg index 0.
  2322. *
  2323. * Return: None
  2324. */
  2325. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2326. struct sockaddr_qrtr *sq,
  2327. struct qmi_txn *txn,
  2328. const void *data)
  2329. {
  2330. struct cnss_plat_data *plat_priv =
  2331. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2332. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2333. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2334. int i = 0;
  2335. if (!txn || !data) {
  2336. cnss_pr_err("Spurious indication\n");
  2337. return;
  2338. }
  2339. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2340. ind_msg->source, ind_msg->mem_seg_valid,
  2341. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2342. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2343. if (!event_data)
  2344. return;
  2345. event_data->mem_type = ind_msg->mem_seg[0].type;
  2346. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2347. event_data->total_size = ind_msg->total_size;
  2348. if (ind_msg->mem_seg_valid) {
  2349. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2350. cnss_pr_err("Invalid seg len indication\n");
  2351. goto free_event_data;
  2352. }
  2353. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2354. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2355. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2356. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2357. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2358. goto free_event_data;
  2359. }
  2360. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2361. i, ind_msg->mem_seg[i].addr,
  2362. ind_msg->mem_seg[i].size);
  2363. }
  2364. }
  2365. if (ind_msg->file_name_valid)
  2366. strlcpy(event_data->file_name, ind_msg->file_name,
  2367. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2368. if (ind_msg->source == 1) {
  2369. if (!ind_msg->file_name_valid)
  2370. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2371. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2372. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2373. 0, event_data);
  2374. } else {
  2375. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2376. if (!ind_msg->file_name_valid)
  2377. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2378. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2379. } else {
  2380. if (!ind_msg->file_name_valid)
  2381. strlcpy(event_data->file_name, "fw_mem_dump",
  2382. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2383. }
  2384. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2385. 0, event_data);
  2386. }
  2387. return;
  2388. free_event_data:
  2389. kfree(event_data);
  2390. }
  2391. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2392. struct sockaddr_qrtr *sq,
  2393. struct qmi_txn *txn,
  2394. const void *data)
  2395. {
  2396. struct cnss_plat_data *plat_priv =
  2397. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2398. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2399. 0, NULL);
  2400. }
  2401. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2402. struct sockaddr_qrtr *sq,
  2403. struct qmi_txn *txn,
  2404. const void *data)
  2405. {
  2406. struct cnss_plat_data *plat_priv =
  2407. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2408. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2409. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2410. if (!txn) {
  2411. cnss_pr_err("Spurious indication\n");
  2412. return;
  2413. }
  2414. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2415. ind_msg->data_len, ind_msg->type,
  2416. ind_msg->is_last, ind_msg->seq_no);
  2417. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2418. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2419. (void *)ind_msg->data,
  2420. ind_msg->data_len);
  2421. }
  2422. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2423. (struct cnss_plat_data *plat_priv,
  2424. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2425. {
  2426. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2427. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2428. struct qmi_txn txn;
  2429. int ret = 0;
  2430. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2431. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2432. return -EINVAL;
  2433. }
  2434. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2435. if (!req)
  2436. return -ENOMEM;
  2437. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2438. if (!resp) {
  2439. kfree(req);
  2440. return -ENOMEM;
  2441. }
  2442. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2443. req->twt_sta_start = ind_msg->twt_sta_start;
  2444. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2445. req->twt_sta_int = ind_msg->twt_sta_int;
  2446. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2447. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2448. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2449. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2450. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2451. req->twt_sta_dl = req->twt_sta_dl;
  2452. req->twt_sta_config_changed_valid =
  2453. ind_msg->twt_sta_config_changed_valid;
  2454. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2455. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2456. plat_priv->driver_state);
  2457. ret =
  2458. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2459. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2460. resp);
  2461. if (ret < 0) {
  2462. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2463. ret);
  2464. goto out;
  2465. }
  2466. ret =
  2467. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2468. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2469. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2470. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2471. if (ret < 0) {
  2472. qmi_txn_cancel(&txn);
  2473. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2474. goto out;
  2475. }
  2476. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2477. if (ret < 0) {
  2478. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2479. goto out;
  2480. }
  2481. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2482. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2483. resp->resp.result, resp->resp.error);
  2484. ret = -resp->resp.result;
  2485. goto out;
  2486. }
  2487. ret = 0;
  2488. out:
  2489. kfree(req);
  2490. kfree(resp);
  2491. return ret;
  2492. }
  2493. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2494. void *data)
  2495. {
  2496. int ret;
  2497. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2498. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2499. kfree(data);
  2500. return ret;
  2501. }
  2502. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2503. struct sockaddr_qrtr *sq,
  2504. struct qmi_txn *txn,
  2505. const void *data)
  2506. {
  2507. struct cnss_plat_data *plat_priv =
  2508. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2509. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2510. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2511. if (!txn) {
  2512. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2513. return;
  2514. }
  2515. if (!ind_msg) {
  2516. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2517. return;
  2518. }
  2519. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2520. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2521. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2522. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2523. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2524. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2525. ind_msg->twt_sta_config_changed_valid,
  2526. ind_msg->twt_sta_config_changed);
  2527. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2528. if (!event_data)
  2529. return;
  2530. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2531. event_data);
  2532. }
  2533. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2534. {
  2535. .type = QMI_INDICATION,
  2536. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2537. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2538. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2539. .fn = cnss_wlfw_request_mem_ind_cb
  2540. },
  2541. {
  2542. .type = QMI_INDICATION,
  2543. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2544. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2545. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2546. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2547. },
  2548. {
  2549. .type = QMI_INDICATION,
  2550. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2551. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2552. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2553. .fn = cnss_wlfw_fw_ready_ind_cb
  2554. },
  2555. {
  2556. .type = QMI_INDICATION,
  2557. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2558. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2559. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2560. .fn = cnss_wlfw_fw_init_done_ind_cb
  2561. },
  2562. {
  2563. .type = QMI_INDICATION,
  2564. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2565. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2566. .decoded_size =
  2567. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2568. .fn = cnss_wlfw_pin_result_ind_cb
  2569. },
  2570. {
  2571. .type = QMI_INDICATION,
  2572. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2573. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2574. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2575. .fn = cnss_wlfw_cal_done_ind_cb
  2576. },
  2577. {
  2578. .type = QMI_INDICATION,
  2579. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2580. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2581. .decoded_size =
  2582. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2583. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2584. },
  2585. {
  2586. .type = QMI_INDICATION,
  2587. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2588. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2589. .decoded_size =
  2590. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2591. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2592. },
  2593. {
  2594. .type = QMI_INDICATION,
  2595. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2596. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2597. .decoded_size =
  2598. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2599. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2600. },
  2601. {
  2602. .type = QMI_INDICATION,
  2603. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2604. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2605. .decoded_size =
  2606. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2607. .fn = cnss_wlfw_respond_get_info_ind_cb
  2608. },
  2609. {
  2610. .type = QMI_INDICATION,
  2611. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2612. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2613. .decoded_size =
  2614. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2615. .fn = cnss_wlfw_process_twt_cfg_ind
  2616. },
  2617. {}
  2618. };
  2619. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2620. void *data)
  2621. {
  2622. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2623. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2624. struct sockaddr_qrtr sq = { 0 };
  2625. int ret = 0;
  2626. if (!event_data)
  2627. return -EINVAL;
  2628. sq.sq_family = AF_QIPCRTR;
  2629. sq.sq_node = event_data->node;
  2630. sq.sq_port = event_data->port;
  2631. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2632. sizeof(sq), 0);
  2633. if (ret < 0) {
  2634. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2635. goto out;
  2636. }
  2637. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2638. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2639. plat_priv->driver_state);
  2640. kfree(data);
  2641. return 0;
  2642. out:
  2643. CNSS_QMI_ASSERT();
  2644. kfree(data);
  2645. return ret;
  2646. }
  2647. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2648. {
  2649. int ret = 0;
  2650. if (!plat_priv)
  2651. return -ENODEV;
  2652. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2653. cnss_pr_err("Unexpected WLFW server arrive\n");
  2654. CNSS_ASSERT(0);
  2655. return -EINVAL;
  2656. }
  2657. cnss_ignore_qmi_failure(false);
  2658. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2659. if (ret < 0)
  2660. goto out;
  2661. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2662. if (ret < 0) {
  2663. if (ret == -EALREADY)
  2664. ret = 0;
  2665. goto out;
  2666. }
  2667. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2668. if (ret < 0)
  2669. goto out;
  2670. return 0;
  2671. out:
  2672. return ret;
  2673. }
  2674. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2675. {
  2676. int ret;
  2677. if (!plat_priv)
  2678. return -ENODEV;
  2679. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2680. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2681. plat_priv->driver_state);
  2682. cnss_qmi_deinit(plat_priv);
  2683. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2684. ret = cnss_qmi_init(plat_priv);
  2685. if (ret < 0) {
  2686. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2687. CNSS_ASSERT(0);
  2688. }
  2689. return 0;
  2690. }
  2691. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2692. struct qmi_service *service)
  2693. {
  2694. struct cnss_plat_data *plat_priv =
  2695. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2696. struct cnss_qmi_event_server_arrive_data *event_data;
  2697. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2698. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2699. plat_priv->driver_state);
  2700. return 0;
  2701. }
  2702. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2703. service->node, service->port);
  2704. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2705. if (!event_data)
  2706. return -ENOMEM;
  2707. event_data->node = service->node;
  2708. event_data->port = service->port;
  2709. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2710. 0, event_data);
  2711. return 0;
  2712. }
  2713. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2714. struct qmi_service *service)
  2715. {
  2716. struct cnss_plat_data *plat_priv =
  2717. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2718. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2719. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2720. plat_priv->driver_state);
  2721. return;
  2722. }
  2723. cnss_pr_dbg("WLFW server exiting\n");
  2724. if (plat_priv) {
  2725. cnss_ignore_qmi_failure(true);
  2726. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2727. }
  2728. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2729. 0, NULL);
  2730. }
  2731. static struct qmi_ops qmi_wlfw_ops = {
  2732. .new_server = wlfw_new_server,
  2733. .del_server = wlfw_del_server,
  2734. };
  2735. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2736. {
  2737. int ret = 0;
  2738. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2739. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2740. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2741. if (ret < 0) {
  2742. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2743. ret);
  2744. goto out;
  2745. }
  2746. ret = qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2747. WLFW_SERVICE_VERS_V01, WLFW_SERVICE_INS_ID_V01);
  2748. if (ret < 0)
  2749. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2750. out:
  2751. return ret;
  2752. }
  2753. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2754. {
  2755. qmi_handle_release(&plat_priv->qmi_wlfw);
  2756. }
  2757. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2758. {
  2759. struct dms_get_mac_address_req_msg_v01 req;
  2760. struct dms_get_mac_address_resp_msg_v01 resp;
  2761. struct qmi_txn txn;
  2762. int ret = 0;
  2763. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2764. cnss_pr_err("DMS QMI connection not established\n");
  2765. return -EINVAL;
  2766. }
  2767. cnss_pr_dbg("Requesting DMS MAC address");
  2768. memset(&resp, 0, sizeof(resp));
  2769. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2770. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2771. if (ret < 0) {
  2772. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2773. ret);
  2774. goto out;
  2775. }
  2776. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2777. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2778. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2779. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2780. dms_get_mac_address_req_msg_v01_ei, &req);
  2781. if (ret < 0) {
  2782. qmi_txn_cancel(&txn);
  2783. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2784. ret);
  2785. goto out;
  2786. }
  2787. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2788. if (ret < 0) {
  2789. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2790. ret);
  2791. goto out;
  2792. }
  2793. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2794. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2795. resp.resp.result, resp.resp.error);
  2796. ret = -resp.resp.result;
  2797. goto out;
  2798. }
  2799. if (!resp.mac_address_valid ||
  2800. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2801. cnss_pr_err("Invalid MAC address received from DMS\n");
  2802. plat_priv->dms.mac_valid = false;
  2803. goto out;
  2804. }
  2805. plat_priv->dms.mac_valid = true;
  2806. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2807. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2808. out:
  2809. return ret;
  2810. }
  2811. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2812. unsigned int node, unsigned int port)
  2813. {
  2814. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2815. struct sockaddr_qrtr sq = {0};
  2816. int ret = 0;
  2817. sq.sq_family = AF_QIPCRTR;
  2818. sq.sq_node = node;
  2819. sq.sq_port = port;
  2820. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2821. sizeof(sq), 0);
  2822. if (ret < 0) {
  2823. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2824. node, port);
  2825. goto out;
  2826. }
  2827. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2828. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2829. plat_priv->driver_state);
  2830. out:
  2831. return ret;
  2832. }
  2833. static int dms_new_server(struct qmi_handle *qmi_dms,
  2834. struct qmi_service *service)
  2835. {
  2836. struct cnss_plat_data *plat_priv =
  2837. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2838. if (!service)
  2839. return -EINVAL;
  2840. return cnss_dms_connect_to_server(plat_priv, service->node,
  2841. service->port);
  2842. }
  2843. static void cnss_dms_server_exit_work(struct work_struct *work)
  2844. {
  2845. int ret;
  2846. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  2847. cnss_dms_deinit(plat_priv);
  2848. cnss_pr_info("QMI DMS Server Exit");
  2849. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2850. ret = cnss_dms_init(plat_priv);
  2851. if (ret < 0)
  2852. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  2853. }
  2854. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  2855. static void dms_del_server(struct qmi_handle *qmi_dms,
  2856. struct qmi_service *service)
  2857. {
  2858. struct cnss_plat_data *plat_priv =
  2859. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2860. if (!plat_priv)
  2861. return;
  2862. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  2863. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  2864. plat_priv->driver_state);
  2865. return;
  2866. }
  2867. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2868. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2869. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2870. plat_priv->driver_state);
  2871. schedule_work(&cnss_dms_del_work);
  2872. }
  2873. void cnss_cancel_dms_work(void)
  2874. {
  2875. cancel_work_sync(&cnss_dms_del_work);
  2876. }
  2877. static struct qmi_ops qmi_dms_ops = {
  2878. .new_server = dms_new_server,
  2879. .del_server = dms_del_server,
  2880. };
  2881. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2882. {
  2883. int ret = 0;
  2884. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2885. &qmi_dms_ops, NULL);
  2886. if (ret < 0) {
  2887. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2888. goto out;
  2889. }
  2890. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2891. DMS_SERVICE_VERS_V01, 0);
  2892. if (ret < 0)
  2893. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2894. out:
  2895. return ret;
  2896. }
  2897. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2898. {
  2899. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2900. qmi_handle_release(&plat_priv->qmi_dms);
  2901. }
  2902. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2903. {
  2904. int ret;
  2905. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2906. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2907. struct qmi_txn txn;
  2908. if (!plat_priv)
  2909. return -ENODEV;
  2910. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2911. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2912. if (!req)
  2913. return -ENOMEM;
  2914. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2915. if (!resp) {
  2916. kfree(req);
  2917. return -ENOMEM;
  2918. }
  2919. req->antenna = plat_priv->antenna;
  2920. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2921. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2922. if (ret < 0) {
  2923. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2924. ret);
  2925. goto out;
  2926. }
  2927. ret = qmi_send_request
  2928. (&plat_priv->coex_qmi, NULL, &txn,
  2929. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2930. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2931. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2932. if (ret < 0) {
  2933. qmi_txn_cancel(&txn);
  2934. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2935. ret);
  2936. goto out;
  2937. }
  2938. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2939. if (ret < 0) {
  2940. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2941. ret);
  2942. goto out;
  2943. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2944. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2945. resp->resp.result, resp->resp.error);
  2946. ret = -resp->resp.result;
  2947. goto out;
  2948. }
  2949. if (resp->grant_valid)
  2950. plat_priv->grant = resp->grant;
  2951. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2952. kfree(resp);
  2953. kfree(req);
  2954. return 0;
  2955. out:
  2956. kfree(resp);
  2957. kfree(req);
  2958. return ret;
  2959. }
  2960. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2961. {
  2962. int ret;
  2963. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2964. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2965. struct qmi_txn txn;
  2966. if (!plat_priv)
  2967. return -ENODEV;
  2968. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2969. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2970. if (!req)
  2971. return -ENOMEM;
  2972. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2973. if (!resp) {
  2974. kfree(req);
  2975. return -ENOMEM;
  2976. }
  2977. req->antenna = plat_priv->antenna;
  2978. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2979. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  2980. if (ret < 0) {
  2981. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  2982. ret);
  2983. goto out;
  2984. }
  2985. ret = qmi_send_request
  2986. (&plat_priv->coex_qmi, NULL, &txn,
  2987. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  2988. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  2989. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  2990. if (ret < 0) {
  2991. qmi_txn_cancel(&txn);
  2992. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  2993. ret);
  2994. goto out;
  2995. }
  2996. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2997. if (ret < 0) {
  2998. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  2999. ret);
  3000. goto out;
  3001. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3002. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  3003. resp->resp.result, resp->resp.error);
  3004. ret = -resp->resp.result;
  3005. goto out;
  3006. }
  3007. kfree(resp);
  3008. kfree(req);
  3009. return 0;
  3010. out:
  3011. kfree(resp);
  3012. kfree(req);
  3013. return ret;
  3014. }
  3015. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  3016. {
  3017. int ret;
  3018. struct wlfw_subsys_restart_level_req_msg_v01 req;
  3019. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  3020. u8 pcss_enabled;
  3021. if (!plat_priv)
  3022. return -ENODEV;
  3023. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3024. cnss_pr_err("Can't send pcss cmd before fw ready\n");
  3025. return -EINVAL;
  3026. }
  3027. pcss_enabled = plat_priv->recovery_pcss_enabled;
  3028. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  3029. req.restart_level_type_valid = 1;
  3030. req.restart_level_type = pcss_enabled;
  3031. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  3032. wlfw_subsys_restart_level_req_msg_v01_ei,
  3033. wlfw_subsys_restart_level_resp_msg_v01_ei,
  3034. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  3035. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  3036. QMI_WLFW_TIMEOUT_JF);
  3037. return ret;
  3038. }
  3039. static int coex_new_server(struct qmi_handle *qmi,
  3040. struct qmi_service *service)
  3041. {
  3042. struct cnss_plat_data *plat_priv =
  3043. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3044. struct sockaddr_qrtr sq = { 0 };
  3045. int ret = 0;
  3046. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  3047. service->node, service->port);
  3048. sq.sq_family = AF_QIPCRTR;
  3049. sq.sq_node = service->node;
  3050. sq.sq_port = service->port;
  3051. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3052. if (ret < 0) {
  3053. cnss_pr_err("Fail to connect to remote service port\n");
  3054. return ret;
  3055. }
  3056. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3057. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  3058. plat_priv->driver_state);
  3059. return 0;
  3060. }
  3061. static void coex_del_server(struct qmi_handle *qmi,
  3062. struct qmi_service *service)
  3063. {
  3064. struct cnss_plat_data *plat_priv =
  3065. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3066. cnss_pr_dbg("COEX server exit\n");
  3067. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3068. }
  3069. static struct qmi_ops coex_qmi_ops = {
  3070. .new_server = coex_new_server,
  3071. .del_server = coex_del_server,
  3072. };
  3073. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3074. { int ret;
  3075. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3076. COEX_SERVICE_MAX_MSG_LEN,
  3077. &coex_qmi_ops, NULL);
  3078. if (ret < 0)
  3079. return ret;
  3080. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3081. COEX_SERVICE_VERS_V01, 0);
  3082. return ret;
  3083. }
  3084. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3085. {
  3086. qmi_handle_release(&plat_priv->coex_qmi);
  3087. }
  3088. /* IMS Service */
  3089. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3090. {
  3091. int ret;
  3092. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3093. struct qmi_txn *txn;
  3094. if (!plat_priv)
  3095. return -ENODEV;
  3096. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3097. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3098. if (!req)
  3099. return -ENOMEM;
  3100. req->wfc_call_status_valid = 1;
  3101. req->wfc_call_status = 1;
  3102. txn = &plat_priv->txn;
  3103. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3104. if (ret < 0) {
  3105. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3106. ret);
  3107. goto out;
  3108. }
  3109. ret = qmi_send_request
  3110. (&plat_priv->ims_qmi, NULL, txn,
  3111. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3112. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3113. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3114. if (ret < 0) {
  3115. qmi_txn_cancel(txn);
  3116. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3117. ret);
  3118. goto out;
  3119. }
  3120. kfree(req);
  3121. return 0;
  3122. out:
  3123. kfree(req);
  3124. return ret;
  3125. }
  3126. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3127. struct sockaddr_qrtr *sq,
  3128. struct qmi_txn *txn,
  3129. const void *data)
  3130. {
  3131. const
  3132. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3133. data;
  3134. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3135. if (!txn) {
  3136. cnss_pr_err("spurious response\n");
  3137. return;
  3138. }
  3139. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3140. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3141. resp->resp.result, resp->resp.error);
  3142. txn->result = -resp->resp.result;
  3143. }
  3144. }
  3145. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3146. void *data)
  3147. {
  3148. int ret;
  3149. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3150. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3151. kfree(data);
  3152. return ret;
  3153. }
  3154. static void
  3155. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3156. struct sockaddr_qrtr *sq,
  3157. struct qmi_txn *txn, const void *data)
  3158. {
  3159. struct cnss_plat_data *plat_priv =
  3160. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3161. const
  3162. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3163. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3164. if (!txn) {
  3165. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3166. return;
  3167. }
  3168. if (!ind_msg) {
  3169. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3170. return;
  3171. }
  3172. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3173. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3174. ind_msg->all_wfc_calls_held,
  3175. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3176. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3177. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3178. ind_msg->media_quality_valid, ind_msg->media_quality);
  3179. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3180. if (!event_data)
  3181. return;
  3182. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3183. 0, event_data);
  3184. }
  3185. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3186. {
  3187. .type = QMI_RESPONSE,
  3188. .msg_id =
  3189. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3190. .ei =
  3191. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3192. .decoded_size = sizeof(struct
  3193. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3194. .fn = ims_subscribe_for_indication_resp_cb
  3195. },
  3196. {
  3197. .type = QMI_INDICATION,
  3198. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3199. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3200. .decoded_size =
  3201. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3202. .fn = cnss_ims_process_wfc_call_ind_cb
  3203. },
  3204. {}
  3205. };
  3206. static int ims_new_server(struct qmi_handle *qmi,
  3207. struct qmi_service *service)
  3208. {
  3209. struct cnss_plat_data *plat_priv =
  3210. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3211. struct sockaddr_qrtr sq = { 0 };
  3212. int ret = 0;
  3213. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3214. service->node, service->port);
  3215. sq.sq_family = AF_QIPCRTR;
  3216. sq.sq_node = service->node;
  3217. sq.sq_port = service->port;
  3218. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3219. if (ret < 0) {
  3220. cnss_pr_err("Fail to connect to remote service port\n");
  3221. return ret;
  3222. }
  3223. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3224. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3225. plat_priv->driver_state);
  3226. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3227. return ret;
  3228. }
  3229. static void ims_del_server(struct qmi_handle *qmi,
  3230. struct qmi_service *service)
  3231. {
  3232. struct cnss_plat_data *plat_priv =
  3233. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3234. cnss_pr_dbg("IMS server exit\n");
  3235. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3236. }
  3237. static struct qmi_ops ims_qmi_ops = {
  3238. .new_server = ims_new_server,
  3239. .del_server = ims_del_server,
  3240. };
  3241. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3242. { int ret;
  3243. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3244. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3245. &ims_qmi_ops, qmi_ims_msg_handlers);
  3246. if (ret < 0)
  3247. return ret;
  3248. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3249. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3250. return ret;
  3251. }
  3252. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3253. {
  3254. qmi_handle_release(&plat_priv->ims_qmi);
  3255. }