main.c 114 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include "main.h"
  47. #include "qmi.h"
  48. #include "debug.h"
  49. #include "power.h"
  50. #include "genl.h"
  51. #define MAX_PROP_SIZE 32
  52. #define NUM_LOG_PAGES 10
  53. #define NUM_LOG_LONG_PAGES 4
  54. #define ICNSS_MAGIC 0x5abc5abc
  55. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  56. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  57. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  58. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  59. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  60. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  61. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  62. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  63. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  64. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  65. #define ICNSS_MAX_PROBE_CNT 2
  66. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  67. #define PROBE_TIMEOUT 15000
  68. #define SMP2P_SOC_WAKE_TIMEOUT 500
  69. #ifdef CONFIG_ICNSS2_DEBUG
  70. static unsigned long qmi_timeout = 3000;
  71. module_param(qmi_timeout, ulong, 0600);
  72. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  73. #else
  74. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  75. #endif
  76. static struct icnss_priv *penv;
  77. static struct work_struct wpss_loader;
  78. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  79. #define ICNSS_EVENT_PENDING 2989
  80. #define ICNSS_EVENT_SYNC BIT(0)
  81. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  82. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  83. ICNSS_EVENT_SYNC)
  84. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  85. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  86. #define SMP2P_GET_MAX_RETRY 4
  87. #define SMP2P_GET_RETRY_DELAY_MS 500
  88. #define RAMDUMP_NUM_DEVICES 256
  89. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  90. #define WLAN_EN_TEMP_THRESHOLD 5000
  91. #define WLAN_EN_DELAY 500
  92. #define ICNSS_RPROC_LEN 10
  93. static DEFINE_IDA(rd_minor_id);
  94. enum icnss_pdr_cause_index {
  95. ICNSS_FW_CRASH,
  96. ICNSS_ROOT_PD_CRASH,
  97. ICNSS_ROOT_PD_SHUTDOWN,
  98. ICNSS_HOST_ERROR,
  99. };
  100. static const char * const icnss_pdr_cause[] = {
  101. [ICNSS_FW_CRASH] = "FW crash",
  102. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  103. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  104. [ICNSS_HOST_ERROR] = "Host error",
  105. };
  106. static void icnss_set_plat_priv(struct icnss_priv *priv)
  107. {
  108. penv = priv;
  109. }
  110. static struct icnss_priv *icnss_get_plat_priv(void)
  111. {
  112. return penv;
  113. }
  114. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  115. struct kobj_attribute *attr,
  116. const char *buf, size_t count)
  117. {
  118. struct icnss_priv *priv = icnss_get_plat_priv();
  119. atomic_set(&priv->is_shutdown, true);
  120. icnss_pr_dbg("Received shutdown indication");
  121. return count;
  122. }
  123. static struct kobj_attribute icnss_sysfs_attribute =
  124. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  125. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  126. {
  127. if (atomic_inc_return(&priv->pm_count) != 1)
  128. return;
  129. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  130. atomic_read(&priv->pm_count));
  131. pm_stay_awake(&priv->pdev->dev);
  132. priv->stats.pm_stay_awake++;
  133. }
  134. static void icnss_pm_relax(struct icnss_priv *priv)
  135. {
  136. int r = atomic_dec_return(&priv->pm_count);
  137. WARN_ON(r < 0);
  138. if (r != 0)
  139. return;
  140. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  141. atomic_read(&priv->pm_count));
  142. pm_relax(&priv->pdev->dev);
  143. priv->stats.pm_relax++;
  144. }
  145. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  146. {
  147. switch (type) {
  148. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  149. return "SERVER_ARRIVE";
  150. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  151. return "SERVER_EXIT";
  152. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  153. return "FW_READY";
  154. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  155. return "REGISTER_DRIVER";
  156. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  157. return "UNREGISTER_DRIVER";
  158. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  159. return "PD_SERVICE_DOWN";
  160. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  161. return "FW_EARLY_CRASH_IND";
  162. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  163. return "IDLE_SHUTDOWN";
  164. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  165. return "IDLE_RESTART";
  166. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  167. return "FW_INIT_DONE";
  168. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  169. return "QDSS_TRACE_REQ_MEM";
  170. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  171. return "QDSS_TRACE_SAVE";
  172. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  173. return "QDSS_TRACE_FREE";
  174. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  175. return "M3_DUMP_UPLOAD";
  176. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  177. return "QDSS_TRACE_REQ_DATA";
  178. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  179. return "SUBSYS_RESTART_LEVEL";
  180. case ICNSS_DRIVER_EVENT_MAX:
  181. return "EVENT_MAX";
  182. }
  183. return "UNKNOWN";
  184. };
  185. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  186. {
  187. switch (type) {
  188. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  189. return "SOC_WAKE_REQUEST";
  190. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  191. return "SOC_WAKE_RELEASE";
  192. case ICNSS_SOC_WAKE_EVENT_MAX:
  193. return "SOC_EVENT_MAX";
  194. }
  195. return "UNKNOWN";
  196. };
  197. int icnss_driver_event_post(struct icnss_priv *priv,
  198. enum icnss_driver_event_type type,
  199. u32 flags, void *data)
  200. {
  201. struct icnss_driver_event *event;
  202. unsigned long irq_flags;
  203. int gfp = GFP_KERNEL;
  204. int ret = 0;
  205. if (!priv)
  206. return -ENODEV;
  207. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  208. icnss_driver_event_to_str(type), type, current->comm,
  209. flags, priv->state);
  210. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  211. icnss_pr_err("Invalid Event type: %d, can't post", type);
  212. return -EINVAL;
  213. }
  214. if (in_interrupt() || irqs_disabled())
  215. gfp = GFP_ATOMIC;
  216. event = kzalloc(sizeof(*event), gfp);
  217. if (event == NULL)
  218. return -ENOMEM;
  219. icnss_pm_stay_awake(priv);
  220. event->type = type;
  221. event->data = data;
  222. init_completion(&event->complete);
  223. event->ret = ICNSS_EVENT_PENDING;
  224. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  225. spin_lock_irqsave(&priv->event_lock, irq_flags);
  226. list_add_tail(&event->list, &priv->event_list);
  227. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  228. priv->stats.events[type].posted++;
  229. queue_work(priv->event_wq, &priv->event_work);
  230. if (!(flags & ICNSS_EVENT_SYNC))
  231. goto out;
  232. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  233. wait_for_completion(&event->complete);
  234. else
  235. ret = wait_for_completion_interruptible(&event->complete);
  236. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  237. icnss_driver_event_to_str(type), type, priv->state, ret,
  238. event->ret);
  239. spin_lock_irqsave(&priv->event_lock, irq_flags);
  240. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  241. event->sync = false;
  242. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  243. ret = -EINTR;
  244. goto out;
  245. }
  246. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  247. ret = event->ret;
  248. kfree(event);
  249. out:
  250. icnss_pm_relax(priv);
  251. return ret;
  252. }
  253. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  254. enum icnss_soc_wake_event_type type,
  255. u32 flags, void *data)
  256. {
  257. struct icnss_soc_wake_event *event;
  258. unsigned long irq_flags;
  259. int gfp = GFP_KERNEL;
  260. int ret = 0;
  261. if (!priv)
  262. return -ENODEV;
  263. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  264. icnss_soc_wake_event_to_str(type),
  265. type, current->comm, flags, priv->state);
  266. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  267. icnss_pr_err("Invalid Event type: %d, can't post", type);
  268. return -EINVAL;
  269. }
  270. if (in_interrupt() || irqs_disabled())
  271. gfp = GFP_ATOMIC;
  272. event = kzalloc(sizeof(*event), gfp);
  273. if (!event)
  274. return -ENOMEM;
  275. icnss_pm_stay_awake(priv);
  276. event->type = type;
  277. event->data = data;
  278. init_completion(&event->complete);
  279. event->ret = ICNSS_EVENT_PENDING;
  280. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  281. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  282. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  283. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  284. priv->stats.soc_wake_events[type].posted++;
  285. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  286. if (!(flags & ICNSS_EVENT_SYNC))
  287. goto out;
  288. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  289. wait_for_completion(&event->complete);
  290. else
  291. ret = wait_for_completion_interruptible(&event->complete);
  292. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  293. icnss_soc_wake_event_to_str(type),
  294. type, priv->state, ret, event->ret);
  295. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  296. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  297. event->sync = false;
  298. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  299. ret = -EINTR;
  300. goto out;
  301. }
  302. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  303. ret = event->ret;
  304. kfree(event);
  305. out:
  306. icnss_pm_relax(priv);
  307. return ret;
  308. }
  309. bool icnss_is_fw_ready(void)
  310. {
  311. if (!penv)
  312. return false;
  313. else
  314. return test_bit(ICNSS_FW_READY, &penv->state);
  315. }
  316. EXPORT_SYMBOL(icnss_is_fw_ready);
  317. void icnss_block_shutdown(bool status)
  318. {
  319. if (!penv)
  320. return;
  321. if (status) {
  322. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  323. reinit_completion(&penv->unblock_shutdown);
  324. } else {
  325. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  326. complete(&penv->unblock_shutdown);
  327. }
  328. }
  329. EXPORT_SYMBOL(icnss_block_shutdown);
  330. bool icnss_is_fw_down(void)
  331. {
  332. struct icnss_priv *priv = icnss_get_plat_priv();
  333. if (!priv)
  334. return false;
  335. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  336. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  337. test_bit(ICNSS_REJUVENATE, &priv->state);
  338. }
  339. EXPORT_SYMBOL(icnss_is_fw_down);
  340. unsigned long icnss_get_device_config(void)
  341. {
  342. struct icnss_priv *priv = icnss_get_plat_priv();
  343. if (!priv)
  344. return 0;
  345. return priv->device_config;
  346. }
  347. EXPORT_SYMBOL(icnss_get_device_config);
  348. bool icnss_is_rejuvenate(void)
  349. {
  350. if (!penv)
  351. return false;
  352. else
  353. return test_bit(ICNSS_REJUVENATE, &penv->state);
  354. }
  355. EXPORT_SYMBOL(icnss_is_rejuvenate);
  356. bool icnss_is_pdr(void)
  357. {
  358. if (!penv)
  359. return false;
  360. else
  361. return test_bit(ICNSS_PDR, &penv->state);
  362. }
  363. EXPORT_SYMBOL(icnss_is_pdr);
  364. static int icnss_send_smp2p(struct icnss_priv *priv,
  365. enum icnss_smp2p_msg_id msg_id,
  366. enum smp2p_out_entry smp2p_entry)
  367. {
  368. unsigned int value = 0;
  369. int ret;
  370. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  371. return -EINVAL;
  372. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  373. if (msg_id == ICNSS_RESET_MSG) {
  374. priv->smp2p_info[smp2p_entry].seq = 0;
  375. ret = qcom_smem_state_update_bits(
  376. priv->smp2p_info[smp2p_entry].smem_state,
  377. ICNSS_SMEM_VALUE_MASK,
  378. 0);
  379. if (ret)
  380. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  381. ret, icnss_smp2p_str[smp2p_entry]);
  382. return ret;
  383. }
  384. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  385. return -ENODEV;
  386. value |= priv->smp2p_info[smp2p_entry].seq++;
  387. value <<= ICNSS_SMEM_SEQ_NO_POS;
  388. value |= msg_id;
  389. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  390. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  391. reinit_completion(&penv->smp2p_soc_wake_wait);
  392. ret = qcom_smem_state_update_bits(
  393. priv->smp2p_info[smp2p_entry].smem_state,
  394. ICNSS_SMEM_VALUE_MASK,
  395. value);
  396. if (ret) {
  397. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  398. icnss_smp2p_str[smp2p_entry]);
  399. } else {
  400. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  401. msg_id == ICNSS_SOC_WAKE_REL) {
  402. if (!wait_for_completion_timeout(
  403. &priv->smp2p_soc_wake_wait,
  404. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  405. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  406. icnss_smp2p_str[smp2p_entry]);
  407. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  408. ICNSS_ASSERT(0);
  409. }
  410. }
  411. }
  412. return ret;
  413. }
  414. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  415. {
  416. struct icnss_priv *priv = ctx;
  417. if (priv)
  418. priv->force_err_fatal = true;
  419. icnss_pr_err("Received force error fatal request from FW\n");
  420. return IRQ_HANDLED;
  421. }
  422. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  423. {
  424. struct icnss_priv *priv = ctx;
  425. struct icnss_uevent_fw_down_data fw_down_data = {0};
  426. icnss_pr_err("Received early crash indication from FW\n");
  427. if (priv) {
  428. set_bit(ICNSS_FW_DOWN, &priv->state);
  429. icnss_ignore_fw_timeout(true);
  430. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  431. clear_bit(ICNSS_FW_READY, &priv->state);
  432. fw_down_data.crashed = true;
  433. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  434. &fw_down_data);
  435. }
  436. }
  437. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  438. 0, NULL);
  439. return IRQ_HANDLED;
  440. }
  441. static void register_fw_error_notifications(struct device *dev)
  442. {
  443. struct icnss_priv *priv = dev_get_drvdata(dev);
  444. struct device_node *dev_node;
  445. int irq = 0, ret = 0;
  446. if (!priv)
  447. return;
  448. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  449. if (!dev_node) {
  450. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  451. return;
  452. }
  453. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  454. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  455. ret = irq = of_irq_get_byname(dev_node,
  456. "qcom,smp2p-force-fatal-error");
  457. if (ret < 0) {
  458. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  459. irq);
  460. return;
  461. }
  462. }
  463. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  464. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  465. "wlanfw-err", priv);
  466. if (ret < 0) {
  467. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  468. irq, ret);
  469. return;
  470. }
  471. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  472. priv->fw_error_fatal_irq = irq;
  473. }
  474. static void register_early_crash_notifications(struct device *dev)
  475. {
  476. struct icnss_priv *priv = dev_get_drvdata(dev);
  477. struct device_node *dev_node;
  478. int irq = 0, ret = 0;
  479. if (!priv)
  480. return;
  481. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  482. if (!dev_node) {
  483. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  484. return;
  485. }
  486. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  487. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  488. ret = irq = of_irq_get_byname(dev_node,
  489. "qcom,smp2p-early-crash-ind");
  490. if (ret < 0) {
  491. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  492. irq);
  493. return;
  494. }
  495. }
  496. ret = devm_request_threaded_irq(dev, irq, NULL,
  497. fw_crash_indication_handler,
  498. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  499. "wlanfw-early-crash-ind", priv);
  500. if (ret < 0) {
  501. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  502. irq, ret);
  503. return;
  504. }
  505. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  506. priv->fw_early_crash_irq = irq;
  507. }
  508. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  509. {
  510. struct thermal_zone_device *thermal_dev;
  511. const char *tsens;
  512. int ret;
  513. ret = of_property_read_string(priv->pdev->dev.of_node,
  514. "tsens",
  515. &tsens);
  516. if (ret)
  517. return ret;
  518. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  519. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  520. if (IS_ERR(thermal_dev)) {
  521. icnss_pr_err("Fail to get thermal zone. ret: %d",
  522. PTR_ERR(thermal_dev));
  523. return PTR_ERR(thermal_dev);
  524. }
  525. ret = thermal_zone_get_temp(thermal_dev, temp);
  526. if (ret)
  527. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  528. return ret;
  529. }
  530. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  531. {
  532. struct icnss_priv *priv = ctx;
  533. if (priv)
  534. complete(&priv->smp2p_soc_wake_wait);
  535. return IRQ_HANDLED;
  536. }
  537. static void register_soc_wake_notif(struct device *dev)
  538. {
  539. struct icnss_priv *priv = dev_get_drvdata(dev);
  540. struct device_node *dev_node;
  541. int irq = 0, ret = 0;
  542. if (!priv)
  543. return;
  544. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  545. if (!dev_node) {
  546. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  547. return;
  548. }
  549. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  550. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  551. ret = irq = of_irq_get_byname(dev_node,
  552. "qcom,smp2p-soc-wake-ack");
  553. if (ret < 0) {
  554. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  555. irq);
  556. return;
  557. }
  558. }
  559. ret = devm_request_threaded_irq(dev, irq, NULL,
  560. fw_soc_wake_ack_handler,
  561. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  562. IRQF_TRIGGER_FALLING,
  563. "wlanfw-soc-wake-ack", priv);
  564. if (ret < 0) {
  565. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  566. irq, ret);
  567. return;
  568. }
  569. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  570. priv->fw_soc_wake_ack_irq = irq;
  571. }
  572. int icnss_call_driver_uevent(struct icnss_priv *priv,
  573. enum icnss_uevent uevent, void *data)
  574. {
  575. struct icnss_uevent_data uevent_data;
  576. if (!priv->ops || !priv->ops->uevent)
  577. return 0;
  578. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  579. priv->state, uevent);
  580. uevent_data.uevent = uevent;
  581. uevent_data.data = data;
  582. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  583. }
  584. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  585. {
  586. int i;
  587. int ret = 0;
  588. ret = icnss_qmi_get_dms_mac(priv);
  589. if (ret == 0 && priv->dms.mac_valid)
  590. goto qmi_send;
  591. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  592. * Thus assert on failure to get MAC from DMS even after retries
  593. */
  594. if (priv->use_nv_mac) {
  595. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  596. if (priv->dms.mac_valid)
  597. break;
  598. ret = icnss_qmi_get_dms_mac(priv);
  599. if (ret != -EAGAIN)
  600. break;
  601. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  602. }
  603. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  604. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  605. ICNSS_ASSERT(0);
  606. return -EINVAL;
  607. }
  608. }
  609. qmi_send:
  610. if (priv->dms.mac_valid)
  611. ret =
  612. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  613. ARRAY_SIZE(priv->dms.mac));
  614. return ret;
  615. }
  616. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  617. enum smp2p_out_entry smp2p_entry)
  618. {
  619. int retry = 0;
  620. int error;
  621. if (priv->smp2p_info[smp2p_entry].smem_state)
  622. return;
  623. retry:
  624. priv->smp2p_info[smp2p_entry].smem_state =
  625. qcom_smem_state_get(&priv->pdev->dev,
  626. icnss_smp2p_str[smp2p_entry],
  627. &priv->smp2p_info[smp2p_entry].smem_bit);
  628. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  629. if (retry++ < SMP2P_GET_MAX_RETRY) {
  630. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  631. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  632. error, icnss_smp2p_str[smp2p_entry]);
  633. msleep(SMP2P_GET_RETRY_DELAY_MS);
  634. goto retry;
  635. }
  636. ICNSS_ASSERT(0);
  637. return;
  638. }
  639. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  640. }
  641. static inline
  642. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  643. {
  644. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  645. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  646. } else {
  647. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  648. }
  649. }
  650. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  651. {
  652. switch (val) {
  653. case WLAN_RF_SLATE:
  654. return WLFW_WLAN_RF_SLATE_V01;
  655. case WLAN_RF_APACHE:
  656. return WLFW_WLAN_RF_APACHE_V01;
  657. default:
  658. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  659. }
  660. }
  661. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  662. void *data)
  663. {
  664. int ret = 0;
  665. int temp = 0;
  666. bool ignore_assert = false;
  667. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  668. if (!priv)
  669. return -ENODEV;
  670. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  671. clear_bit(ICNSS_FW_DOWN, &priv->state);
  672. clear_bit(ICNSS_FW_READY, &priv->state);
  673. icnss_ignore_fw_timeout(false);
  674. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  675. icnss_pr_err("QMI Server already in Connected State\n");
  676. ICNSS_ASSERT(0);
  677. }
  678. ret = icnss_connect_to_fw_server(priv, data);
  679. if (ret)
  680. goto fail;
  681. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  682. ret = wlfw_ind_register_send_sync_msg(priv);
  683. if (ret < 0) {
  684. if (ret == -EALREADY) {
  685. ret = 0;
  686. goto qmi_registered;
  687. }
  688. ignore_assert = true;
  689. goto fail;
  690. }
  691. if (priv->is_rf_subtype_valid) {
  692. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  693. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  694. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  695. if (ret < 0)
  696. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  697. ret);
  698. } else {
  699. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  700. priv->rf_subtype);
  701. }
  702. }
  703. if (priv->device_id == WCN6750_DEVICE_ID) {
  704. if (!icnss_get_temperature(priv, &temp)) {
  705. icnss_pr_dbg("Temperature: %d\n", temp);
  706. if (temp < WLAN_EN_TEMP_THRESHOLD)
  707. icnss_set_wlan_en_delay(priv);
  708. }
  709. ret = wlfw_host_cap_send_sync(priv);
  710. if (ret < 0)
  711. goto fail;
  712. }
  713. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  714. if (!priv->msa_va) {
  715. icnss_pr_err("Invalid MSA address\n");
  716. ret = -EINVAL;
  717. goto fail;
  718. }
  719. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  720. if (ret < 0) {
  721. ignore_assert = true;
  722. goto fail;
  723. }
  724. ret = wlfw_msa_ready_send_sync_msg(priv);
  725. if (ret < 0) {
  726. ignore_assert = true;
  727. goto fail;
  728. }
  729. }
  730. ret = wlfw_cap_send_sync_msg(priv);
  731. if (ret < 0) {
  732. ignore_assert = true;
  733. goto fail;
  734. }
  735. ret = icnss_hw_power_on(priv);
  736. if (ret)
  737. goto fail;
  738. if (priv->device_id == WCN6750_DEVICE_ID) {
  739. ret = wlfw_device_info_send_msg(priv);
  740. if (ret < 0) {
  741. ignore_assert = true;
  742. goto device_info_failure;
  743. }
  744. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  745. priv->mem_base_pa,
  746. priv->mem_base_size);
  747. if (!priv->mem_base_va) {
  748. icnss_pr_err("Ioremap failed for bar address\n");
  749. goto device_info_failure;
  750. }
  751. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  752. &priv->mem_base_pa,
  753. priv->mem_base_va);
  754. if (priv->mhi_state_info_pa)
  755. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  756. priv->mhi_state_info_pa,
  757. PAGE_SIZE);
  758. if (!priv->mhi_state_info_va)
  759. icnss_pr_err("Ioremap failed for MHI info address\n");
  760. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  761. &priv->mhi_state_info_pa,
  762. priv->mhi_state_info_va);
  763. }
  764. if (priv->bdf_download_support) {
  765. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  766. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  767. priv->ctrl_params.bdf_type);
  768. if (ret < 0)
  769. goto device_info_failure;
  770. }
  771. if (priv->device_id == WCN6750_DEVICE_ID) {
  772. if (!priv->fw_soc_wake_ack_irq)
  773. register_soc_wake_notif(&priv->pdev->dev);
  774. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  775. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  776. }
  777. if (priv->wpss_supported)
  778. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  779. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  780. if (priv->bdf_download_support) {
  781. ret = wlfw_cal_report_req(priv);
  782. if (ret < 0)
  783. goto device_info_failure;
  784. }
  785. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  786. dynamic_feature_mask);
  787. }
  788. if (!priv->fw_error_fatal_irq)
  789. register_fw_error_notifications(&priv->pdev->dev);
  790. if (!priv->fw_early_crash_irq)
  791. register_early_crash_notifications(&priv->pdev->dev);
  792. if (priv->psf_supported)
  793. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  794. return ret;
  795. device_info_failure:
  796. icnss_hw_power_off(priv);
  797. fail:
  798. ICNSS_ASSERT(ignore_assert);
  799. qmi_registered:
  800. return ret;
  801. }
  802. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  803. {
  804. if (!priv)
  805. return -ENODEV;
  806. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  807. icnss_clear_server(priv);
  808. if (priv->psf_supported)
  809. priv->last_updated_voltage = 0;
  810. return 0;
  811. }
  812. static int icnss_call_driver_probe(struct icnss_priv *priv)
  813. {
  814. int ret = 0;
  815. int probe_cnt = 0;
  816. if (!priv->ops || !priv->ops->probe)
  817. return 0;
  818. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  819. return -EINVAL;
  820. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  821. icnss_hw_power_on(priv);
  822. icnss_block_shutdown(true);
  823. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  824. ret = priv->ops->probe(&priv->pdev->dev);
  825. probe_cnt++;
  826. if (ret != -EPROBE_DEFER)
  827. break;
  828. }
  829. if (ret < 0) {
  830. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  831. ret, priv->state, probe_cnt);
  832. icnss_block_shutdown(false);
  833. goto out;
  834. }
  835. icnss_block_shutdown(false);
  836. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  837. return 0;
  838. out:
  839. icnss_hw_power_off(priv);
  840. return ret;
  841. }
  842. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  843. {
  844. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  845. goto out;
  846. if (!priv->ops || !priv->ops->shutdown)
  847. goto out;
  848. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  849. goto out;
  850. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  851. priv->ops->shutdown(&priv->pdev->dev);
  852. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  853. out:
  854. return 0;
  855. }
  856. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  857. {
  858. int ret = 0;
  859. icnss_pm_relax(priv);
  860. icnss_call_driver_shutdown(priv);
  861. clear_bit(ICNSS_PDR, &priv->state);
  862. clear_bit(ICNSS_REJUVENATE, &priv->state);
  863. clear_bit(ICNSS_PD_RESTART, &priv->state);
  864. priv->early_crash_ind = false;
  865. priv->is_ssr = false;
  866. if (!priv->ops || !priv->ops->reinit)
  867. goto out;
  868. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  869. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  870. priv->state);
  871. goto out;
  872. }
  873. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  874. goto call_probe;
  875. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  876. icnss_hw_power_on(priv);
  877. icnss_block_shutdown(true);
  878. ret = priv->ops->reinit(&priv->pdev->dev);
  879. if (ret < 0) {
  880. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  881. ret, priv->state);
  882. if (!priv->allow_recursive_recovery)
  883. ICNSS_ASSERT(false);
  884. icnss_block_shutdown(false);
  885. goto out_power_off;
  886. }
  887. icnss_block_shutdown(false);
  888. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  889. return 0;
  890. call_probe:
  891. return icnss_call_driver_probe(priv);
  892. out_power_off:
  893. icnss_hw_power_off(priv);
  894. out:
  895. return ret;
  896. }
  897. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  898. {
  899. int ret = 0;
  900. if (!priv)
  901. return -ENODEV;
  902. set_bit(ICNSS_FW_READY, &priv->state);
  903. clear_bit(ICNSS_MODE_ON, &priv->state);
  904. atomic_set(&priv->soc_wake_ref_count, 0);
  905. if (priv->device_id == WCN6750_DEVICE_ID)
  906. icnss_free_qdss_mem(priv);
  907. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  908. icnss_hw_power_off(priv);
  909. if (!priv->pdev) {
  910. icnss_pr_err("Device is not ready\n");
  911. ret = -ENODEV;
  912. goto out;
  913. }
  914. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  915. ret = icnss_pd_restart_complete(priv);
  916. } else {
  917. if (priv->wpss_supported)
  918. icnss_setup_dms_mac(priv);
  919. ret = icnss_call_driver_probe(priv);
  920. }
  921. icnss_vreg_unvote(priv);
  922. out:
  923. return ret;
  924. }
  925. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  926. {
  927. int ret = 0;
  928. if (!priv)
  929. return -ENODEV;
  930. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  931. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  932. icnss_pr_info("Failed to download qdss configuration file");
  933. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state))
  934. ret = wlfw_wlan_mode_send_sync_msg(priv,
  935. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  936. else
  937. icnss_driver_event_fw_ready_ind(priv, NULL);
  938. return ret;
  939. }
  940. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  941. {
  942. struct platform_device *pdev = priv->pdev;
  943. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  944. int i, j;
  945. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  946. if (!qdss_mem[i].va && qdss_mem[i].size) {
  947. qdss_mem[i].va =
  948. dma_alloc_coherent(&pdev->dev,
  949. qdss_mem[i].size,
  950. &qdss_mem[i].pa,
  951. GFP_KERNEL);
  952. if (!qdss_mem[i].va) {
  953. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  954. qdss_mem[i].size,
  955. qdss_mem[i].type, i);
  956. break;
  957. }
  958. }
  959. }
  960. /* Best-effort allocation for QDSS trace */
  961. if (i < priv->qdss_mem_seg_len) {
  962. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  963. qdss_mem[j].type = 0;
  964. qdss_mem[j].size = 0;
  965. }
  966. priv->qdss_mem_seg_len = i;
  967. }
  968. return 0;
  969. }
  970. void icnss_free_qdss_mem(struct icnss_priv *priv)
  971. {
  972. struct platform_device *pdev = priv->pdev;
  973. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  974. int i;
  975. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  976. if (qdss_mem[i].va && qdss_mem[i].size) {
  977. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  978. &qdss_mem[i].pa, qdss_mem[i].size,
  979. qdss_mem[i].type);
  980. dma_free_coherent(&pdev->dev,
  981. qdss_mem[i].size, qdss_mem[i].va,
  982. qdss_mem[i].pa);
  983. qdss_mem[i].va = NULL;
  984. qdss_mem[i].pa = 0;
  985. qdss_mem[i].size = 0;
  986. qdss_mem[i].type = 0;
  987. }
  988. }
  989. priv->qdss_mem_seg_len = 0;
  990. }
  991. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  992. {
  993. int ret = 0;
  994. ret = icnss_alloc_qdss_mem(priv);
  995. if (ret < 0)
  996. return ret;
  997. return wlfw_qdss_trace_mem_info_send_sync(priv);
  998. }
  999. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1000. u64 pa, u32 size, int *seg_id)
  1001. {
  1002. int i = 0;
  1003. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1004. u64 offset = 0;
  1005. void *va = NULL;
  1006. u64 local_pa;
  1007. u32 local_size;
  1008. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1009. local_pa = (u64)qdss_mem[i].pa;
  1010. local_size = (u32)qdss_mem[i].size;
  1011. if (pa == local_pa && size <= local_size) {
  1012. va = qdss_mem[i].va;
  1013. break;
  1014. }
  1015. if (pa > local_pa &&
  1016. pa < local_pa + local_size &&
  1017. pa + size <= local_pa + local_size) {
  1018. offset = pa - local_pa;
  1019. va = qdss_mem[i].va + offset;
  1020. break;
  1021. }
  1022. }
  1023. *seg_id = i;
  1024. return va;
  1025. }
  1026. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1027. void *data)
  1028. {
  1029. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1030. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1031. int ret = 0;
  1032. int i;
  1033. void *va = NULL;
  1034. u64 pa;
  1035. u32 size;
  1036. int seg_id = 0;
  1037. if (!priv->qdss_mem_seg_len) {
  1038. icnss_pr_err("Memory for QDSS trace is not available\n");
  1039. return -ENOMEM;
  1040. }
  1041. if (event_data->mem_seg_len == 0) {
  1042. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1043. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1044. ICNSS_GENL_MSG_TYPE_QDSS,
  1045. event_data->file_name,
  1046. qdss_mem[i].size);
  1047. if (ret < 0) {
  1048. icnss_pr_err("Fail to save QDSS data: %d\n",
  1049. ret);
  1050. break;
  1051. }
  1052. }
  1053. } else {
  1054. for (i = 0; i < event_data->mem_seg_len; i++) {
  1055. pa = event_data->mem_seg[i].addr;
  1056. size = event_data->mem_seg[i].size;
  1057. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1058. size, &seg_id);
  1059. if (!va) {
  1060. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1061. &pa);
  1062. ret = -EINVAL;
  1063. break;
  1064. }
  1065. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1066. event_data->file_name, size);
  1067. if (ret < 0) {
  1068. icnss_pr_err("Fail to save QDSS data: %d\n",
  1069. ret);
  1070. break;
  1071. }
  1072. }
  1073. }
  1074. kfree(data);
  1075. return ret;
  1076. }
  1077. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1078. {
  1079. int dec, c = atomic_read(v);
  1080. do {
  1081. dec = c - 1;
  1082. if (unlikely(dec < 1))
  1083. break;
  1084. } while (!atomic_try_cmpxchg(v, &c, dec));
  1085. return dec;
  1086. }
  1087. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1088. void *data)
  1089. {
  1090. int ret = 0;
  1091. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1092. if (!priv)
  1093. return -ENODEV;
  1094. if (!data)
  1095. return -EINVAL;
  1096. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1097. event_data->total_size);
  1098. kfree(data);
  1099. return ret;
  1100. }
  1101. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1102. {
  1103. int ret = 0;
  1104. if (!priv)
  1105. return -ENODEV;
  1106. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1107. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1108. atomic_read(&priv->soc_wake_ref_count));
  1109. return 0;
  1110. }
  1111. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1112. ICNSS_SMP2P_OUT_SOC_WAKE);
  1113. if (!ret)
  1114. atomic_inc(&priv->soc_wake_ref_count);
  1115. return ret;
  1116. }
  1117. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1118. {
  1119. int ret = 0;
  1120. if (!priv)
  1121. return -ENODEV;
  1122. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1123. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1124. priv->soc_wake_ref_count);
  1125. return 0;
  1126. }
  1127. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1128. ICNSS_SMP2P_OUT_SOC_WAKE);
  1129. return ret;
  1130. }
  1131. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1132. void *data)
  1133. {
  1134. int ret = 0;
  1135. int probe_cnt = 0;
  1136. if (priv->ops)
  1137. return -EEXIST;
  1138. priv->ops = data;
  1139. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1140. set_bit(ICNSS_FW_READY, &priv->state);
  1141. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1142. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1143. priv->state);
  1144. return -ENODEV;
  1145. }
  1146. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1147. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1148. priv->state);
  1149. goto out;
  1150. }
  1151. ret = icnss_hw_power_on(priv);
  1152. if (ret)
  1153. goto out;
  1154. icnss_block_shutdown(true);
  1155. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1156. ret = priv->ops->probe(&priv->pdev->dev);
  1157. probe_cnt++;
  1158. if (ret != -EPROBE_DEFER)
  1159. break;
  1160. }
  1161. if (ret) {
  1162. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1163. ret, priv->state, probe_cnt);
  1164. icnss_block_shutdown(false);
  1165. goto power_off;
  1166. }
  1167. icnss_block_shutdown(false);
  1168. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1169. return 0;
  1170. power_off:
  1171. icnss_hw_power_off(priv);
  1172. out:
  1173. return ret;
  1174. }
  1175. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1176. void *data)
  1177. {
  1178. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1179. priv->ops = NULL;
  1180. goto out;
  1181. }
  1182. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1183. icnss_block_shutdown(true);
  1184. if (priv->ops)
  1185. priv->ops->remove(&priv->pdev->dev);
  1186. icnss_block_shutdown(false);
  1187. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1188. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1189. priv->ops = NULL;
  1190. icnss_hw_power_off(priv);
  1191. out:
  1192. return 0;
  1193. }
  1194. static int icnss_fw_crashed(struct icnss_priv *priv,
  1195. struct icnss_event_pd_service_down_data *event_data)
  1196. {
  1197. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1198. set_bit(ICNSS_PD_RESTART, &priv->state);
  1199. clear_bit(ICNSS_FW_READY, &priv->state);
  1200. icnss_pm_stay_awake(priv);
  1201. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1202. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1203. if (event_data && event_data->fw_rejuvenate)
  1204. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1205. return 0;
  1206. }
  1207. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1208. struct icnss_uevent_hang_data *hang_data)
  1209. {
  1210. if (!priv->hang_event_data_va)
  1211. return -EINVAL;
  1212. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1213. priv->hang_event_data_len,
  1214. GFP_ATOMIC);
  1215. if (!priv->hang_event_data)
  1216. return -ENOMEM;
  1217. // Update the hang event params
  1218. hang_data->hang_event_data = priv->hang_event_data;
  1219. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1220. return 0;
  1221. }
  1222. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1223. {
  1224. struct icnss_uevent_hang_data hang_data = {0};
  1225. int ret = 0xFF;
  1226. if (priv->early_crash_ind) {
  1227. ret = icnss_update_hang_event_data(priv, &hang_data);
  1228. if (ret)
  1229. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1230. }
  1231. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1232. &hang_data);
  1233. if (!ret) {
  1234. kfree(priv->hang_event_data);
  1235. priv->hang_event_data = NULL;
  1236. }
  1237. return 0;
  1238. }
  1239. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1240. void *data)
  1241. {
  1242. struct icnss_event_pd_service_down_data *event_data = data;
  1243. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1244. icnss_ignore_fw_timeout(false);
  1245. goto out;
  1246. }
  1247. if (priv->force_err_fatal)
  1248. ICNSS_ASSERT(0);
  1249. if (priv->device_id == WCN6750_DEVICE_ID) {
  1250. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1251. ICNSS_SMP2P_OUT_SOC_WAKE);
  1252. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1253. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1254. }
  1255. if (priv->wpss_supported)
  1256. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1257. ICNSS_SMP2P_OUT_POWER_SAVE);
  1258. icnss_send_hang_event_data(priv);
  1259. if (priv->early_crash_ind) {
  1260. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1261. event_data->crashed, priv->state);
  1262. goto out;
  1263. }
  1264. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1265. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1266. event_data->crashed, priv->state);
  1267. if (!priv->allow_recursive_recovery)
  1268. ICNSS_ASSERT(0);
  1269. goto out;
  1270. }
  1271. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1272. icnss_fw_crashed(priv, event_data);
  1273. out:
  1274. kfree(data);
  1275. return 0;
  1276. }
  1277. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1278. void *data)
  1279. {
  1280. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1281. icnss_ignore_fw_timeout(false);
  1282. goto out;
  1283. }
  1284. priv->early_crash_ind = true;
  1285. icnss_fw_crashed(priv, NULL);
  1286. out:
  1287. kfree(data);
  1288. return 0;
  1289. }
  1290. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1291. void *data)
  1292. {
  1293. int ret = 0;
  1294. if (!priv->ops || !priv->ops->idle_shutdown)
  1295. return 0;
  1296. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1297. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1298. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1299. ret = -EBUSY;
  1300. } else {
  1301. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1302. priv->state);
  1303. icnss_block_shutdown(true);
  1304. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1305. icnss_block_shutdown(false);
  1306. }
  1307. return ret;
  1308. }
  1309. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1310. void *data)
  1311. {
  1312. int ret = 0;
  1313. if (!priv->ops || !priv->ops->idle_restart)
  1314. return 0;
  1315. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1316. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1317. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1318. ret = -EBUSY;
  1319. } else {
  1320. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1321. priv->state);
  1322. icnss_block_shutdown(true);
  1323. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1324. icnss_block_shutdown(false);
  1325. }
  1326. return ret;
  1327. }
  1328. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1329. {
  1330. icnss_free_qdss_mem(priv);
  1331. return 0;
  1332. }
  1333. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1334. void *data)
  1335. {
  1336. struct icnss_m3_upload_segments_req_data *event_data = data;
  1337. struct qcom_dump_segment segment;
  1338. int i, status = 0, ret = 0;
  1339. struct list_head head;
  1340. if (!dump_enabled()) {
  1341. icnss_pr_info("Dump collection is not enabled\n");
  1342. return ret;
  1343. }
  1344. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1345. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1346. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1347. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1348. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1349. return ret;
  1350. INIT_LIST_HEAD(&head);
  1351. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1352. memset(&segment, 0, sizeof(segment));
  1353. segment.va = devm_ioremap(&priv->pdev->dev,
  1354. event_data->m3_segment[i].addr,
  1355. event_data->m3_segment[i].size);
  1356. if (!segment.va) {
  1357. icnss_pr_err("Failed to ioremap M3 Dump region");
  1358. ret = -ENOMEM;
  1359. goto send_resp;
  1360. }
  1361. segment.size = event_data->m3_segment[i].size;
  1362. list_add(&segment.node, &head);
  1363. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1364. event_data->m3_segment[i].name);
  1365. switch (event_data->m3_segment[i].type) {
  1366. case QMI_M3_SEGMENT_PHYAREG_V01:
  1367. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1368. break;
  1369. case QMI_M3_SEGMENT_PHYDBG_V01:
  1370. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1371. break;
  1372. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1373. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1374. break;
  1375. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1376. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1377. break;
  1378. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1379. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1380. break;
  1381. default:
  1382. icnss_pr_err("Invalid Segment type: %d",
  1383. event_data->m3_segment[i].type);
  1384. }
  1385. if (ret) {
  1386. status = ret;
  1387. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1388. event_data->m3_segment[i].name, ret);
  1389. }
  1390. list_del(&segment.node);
  1391. }
  1392. send_resp:
  1393. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1394. status);
  1395. return ret;
  1396. }
  1397. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1398. {
  1399. int ret = 0;
  1400. struct icnss_subsys_restart_level_data *event_data = data;
  1401. if (!priv)
  1402. return -ENODEV;
  1403. if (!data)
  1404. return -EINVAL;
  1405. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1406. kfree(data);
  1407. return ret;
  1408. }
  1409. static void icnss_driver_event_work(struct work_struct *work)
  1410. {
  1411. struct icnss_priv *priv =
  1412. container_of(work, struct icnss_priv, event_work);
  1413. struct icnss_driver_event *event;
  1414. unsigned long flags;
  1415. int ret;
  1416. icnss_pm_stay_awake(priv);
  1417. spin_lock_irqsave(&priv->event_lock, flags);
  1418. while (!list_empty(&priv->event_list)) {
  1419. event = list_first_entry(&priv->event_list,
  1420. struct icnss_driver_event, list);
  1421. list_del(&event->list);
  1422. spin_unlock_irqrestore(&priv->event_lock, flags);
  1423. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1424. icnss_driver_event_to_str(event->type),
  1425. event->sync ? "-sync" : "", event->type,
  1426. priv->state);
  1427. switch (event->type) {
  1428. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1429. ret = icnss_driver_event_server_arrive(priv,
  1430. event->data);
  1431. break;
  1432. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1433. ret = icnss_driver_event_server_exit(priv);
  1434. break;
  1435. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1436. ret = icnss_driver_event_fw_ready_ind(priv,
  1437. event->data);
  1438. break;
  1439. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1440. ret = icnss_driver_event_register_driver(priv,
  1441. event->data);
  1442. break;
  1443. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1444. ret = icnss_driver_event_unregister_driver(priv,
  1445. event->data);
  1446. break;
  1447. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1448. ret = icnss_driver_event_pd_service_down(priv,
  1449. event->data);
  1450. break;
  1451. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1452. ret = icnss_driver_event_early_crash_ind(priv,
  1453. event->data);
  1454. break;
  1455. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1456. ret = icnss_driver_event_idle_shutdown(priv,
  1457. event->data);
  1458. break;
  1459. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1460. ret = icnss_driver_event_idle_restart(priv,
  1461. event->data);
  1462. break;
  1463. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1464. ret = icnss_driver_event_fw_init_done(priv,
  1465. event->data);
  1466. break;
  1467. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1468. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1469. break;
  1470. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1471. ret = icnss_qdss_trace_save_hdlr(priv,
  1472. event->data);
  1473. break;
  1474. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1475. ret = icnss_qdss_trace_free_hdlr(priv);
  1476. break;
  1477. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1478. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1479. break;
  1480. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1481. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1482. event->data);
  1483. break;
  1484. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1485. ret = icnss_subsys_restart_level(priv, event->data);
  1486. break;
  1487. default:
  1488. icnss_pr_err("Invalid Event type: %d", event->type);
  1489. kfree(event);
  1490. continue;
  1491. }
  1492. priv->stats.events[event->type].processed++;
  1493. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1494. icnss_driver_event_to_str(event->type),
  1495. event->sync ? "-sync" : "", event->type, ret,
  1496. priv->state);
  1497. spin_lock_irqsave(&priv->event_lock, flags);
  1498. if (event->sync) {
  1499. event->ret = ret;
  1500. complete(&event->complete);
  1501. continue;
  1502. }
  1503. spin_unlock_irqrestore(&priv->event_lock, flags);
  1504. kfree(event);
  1505. spin_lock_irqsave(&priv->event_lock, flags);
  1506. }
  1507. spin_unlock_irqrestore(&priv->event_lock, flags);
  1508. icnss_pm_relax(priv);
  1509. }
  1510. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1511. {
  1512. struct icnss_priv *priv =
  1513. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1514. struct icnss_soc_wake_event *event;
  1515. unsigned long flags;
  1516. int ret;
  1517. icnss_pm_stay_awake(priv);
  1518. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1519. while (!list_empty(&priv->soc_wake_msg_list)) {
  1520. event = list_first_entry(&priv->soc_wake_msg_list,
  1521. struct icnss_soc_wake_event, list);
  1522. list_del(&event->list);
  1523. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1524. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1525. icnss_soc_wake_event_to_str(event->type),
  1526. event->sync ? "-sync" : "", event->type,
  1527. priv->state);
  1528. switch (event->type) {
  1529. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1530. ret = icnss_event_soc_wake_request(priv,
  1531. event->data);
  1532. break;
  1533. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1534. ret = icnss_event_soc_wake_release(priv,
  1535. event->data);
  1536. break;
  1537. default:
  1538. icnss_pr_err("Invalid Event type: %d", event->type);
  1539. kfree(event);
  1540. continue;
  1541. }
  1542. priv->stats.soc_wake_events[event->type].processed++;
  1543. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1544. icnss_soc_wake_event_to_str(event->type),
  1545. event->sync ? "-sync" : "", event->type, ret,
  1546. priv->state);
  1547. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1548. if (event->sync) {
  1549. event->ret = ret;
  1550. complete(&event->complete);
  1551. continue;
  1552. }
  1553. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1554. kfree(event);
  1555. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1556. }
  1557. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1558. icnss_pm_relax(priv);
  1559. }
  1560. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1561. {
  1562. int ret = 0;
  1563. struct qcom_dump_segment segment;
  1564. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1565. struct list_head head;
  1566. if (!dump_enabled()) {
  1567. icnss_pr_info("Dump collection is not enabled\n");
  1568. return ret;
  1569. }
  1570. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1571. return ret;
  1572. INIT_LIST_HEAD(&head);
  1573. memset(&segment, 0, sizeof(segment));
  1574. segment.va = priv->msa_va;
  1575. segment.size = priv->msa_mem_size;
  1576. list_add(&segment.node, &head);
  1577. if (!msa0_dump_dev->dev) {
  1578. icnss_pr_err("Created Dump Device not found\n");
  1579. return 0;
  1580. }
  1581. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1582. if (ret) {
  1583. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1584. return ret;
  1585. }
  1586. list_del(&segment.node);
  1587. return ret;
  1588. }
  1589. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1590. void *data)
  1591. {
  1592. struct qcom_ssr_notify_data *notif = data;
  1593. int ret = 0;
  1594. if (!notif->crashed) {
  1595. if (atomic_read(&priv->is_shutdown)) {
  1596. atomic_set(&priv->is_shutdown, false);
  1597. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1598. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1599. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1600. clear_bit(ICNSS_FW_READY, &priv->state);
  1601. icnss_driver_event_post(priv,
  1602. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1603. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1604. NULL);
  1605. }
  1606. }
  1607. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1608. if (!wait_for_completion_timeout(
  1609. &priv->unblock_shutdown,
  1610. msecs_to_jiffies(PROBE_TIMEOUT)))
  1611. icnss_pr_err("modem block shutdown timeout\n");
  1612. }
  1613. ret = wlfw_send_modem_shutdown_msg(priv);
  1614. if (ret < 0)
  1615. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1616. ret);
  1617. }
  1618. }
  1619. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1620. {
  1621. switch (code) {
  1622. case QCOM_SSR_BEFORE_POWERUP:
  1623. return "BEFORE_POWERUP";
  1624. case QCOM_SSR_AFTER_POWERUP:
  1625. return "AFTER_POWERUP";
  1626. case QCOM_SSR_BEFORE_SHUTDOWN:
  1627. return "BEFORE_SHUTDOWN";
  1628. case QCOM_SSR_AFTER_SHUTDOWN:
  1629. return "AFTER_SHUTDOWN";
  1630. default:
  1631. return "UNKNOWN";
  1632. }
  1633. };
  1634. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1635. unsigned long code,
  1636. void *data)
  1637. {
  1638. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1639. wpss_early_ssr_nb);
  1640. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1641. icnss_qcom_ssr_notify_state_to_str(code), code);
  1642. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1643. set_bit(ICNSS_FW_DOWN, &priv->state);
  1644. icnss_ignore_fw_timeout(true);
  1645. }
  1646. return NOTIFY_DONE;
  1647. }
  1648. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1649. unsigned long code,
  1650. void *data)
  1651. {
  1652. struct icnss_event_pd_service_down_data *event_data;
  1653. struct qcom_ssr_notify_data *notif = data;
  1654. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1655. wpss_ssr_nb);
  1656. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1657. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1658. icnss_qcom_ssr_notify_state_to_str(code), code);
  1659. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1660. icnss_pr_info("Collecting msa0 segment dump\n");
  1661. icnss_msa0_ramdump(priv);
  1662. goto out;
  1663. }
  1664. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1665. goto out;
  1666. priv->is_ssr = true;
  1667. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1668. priv->state, notif->crashed);
  1669. set_bit(ICNSS_FW_DOWN, &priv->state);
  1670. if (notif->crashed)
  1671. priv->stats.recovery.root_pd_crash++;
  1672. else
  1673. priv->stats.recovery.root_pd_shutdown++;
  1674. icnss_ignore_fw_timeout(true);
  1675. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1676. if (event_data == NULL)
  1677. return notifier_from_errno(-ENOMEM);
  1678. event_data->crashed = notif->crashed;
  1679. fw_down_data.crashed = !!notif->crashed;
  1680. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1681. clear_bit(ICNSS_FW_READY, &priv->state);
  1682. fw_down_data.crashed = !!notif->crashed;
  1683. icnss_call_driver_uevent(priv,
  1684. ICNSS_UEVENT_FW_DOWN,
  1685. &fw_down_data);
  1686. }
  1687. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1688. ICNSS_EVENT_SYNC, event_data);
  1689. out:
  1690. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1691. return NOTIFY_OK;
  1692. }
  1693. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1694. unsigned long code,
  1695. void *data)
  1696. {
  1697. struct icnss_event_pd_service_down_data *event_data;
  1698. struct qcom_ssr_notify_data *notif = data;
  1699. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1700. modem_ssr_nb);
  1701. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1702. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1703. icnss_qcom_ssr_notify_state_to_str(code), code);
  1704. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1705. icnss_pr_info("Collecting msa0 segment dump\n");
  1706. icnss_msa0_ramdump(priv);
  1707. goto out;
  1708. }
  1709. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1710. goto out;
  1711. priv->is_ssr = true;
  1712. if (notif->crashed) {
  1713. priv->stats.recovery.root_pd_crash++;
  1714. priv->root_pd_shutdown = false;
  1715. } else {
  1716. priv->stats.recovery.root_pd_shutdown++;
  1717. priv->root_pd_shutdown = true;
  1718. }
  1719. icnss_update_state_send_modem_shutdown(priv, data);
  1720. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1721. set_bit(ICNSS_FW_DOWN, &priv->state);
  1722. icnss_ignore_fw_timeout(true);
  1723. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1724. clear_bit(ICNSS_FW_READY, &priv->state);
  1725. fw_down_data.crashed = !!notif->crashed;
  1726. icnss_call_driver_uevent(priv,
  1727. ICNSS_UEVENT_FW_DOWN,
  1728. &fw_down_data);
  1729. }
  1730. goto out;
  1731. }
  1732. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1733. priv->state, notif->crashed);
  1734. set_bit(ICNSS_FW_DOWN, &priv->state);
  1735. icnss_ignore_fw_timeout(true);
  1736. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1737. if (event_data == NULL)
  1738. return notifier_from_errno(-ENOMEM);
  1739. event_data->crashed = notif->crashed;
  1740. fw_down_data.crashed = !!notif->crashed;
  1741. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1742. clear_bit(ICNSS_FW_READY, &priv->state);
  1743. fw_down_data.crashed = !!notif->crashed;
  1744. icnss_call_driver_uevent(priv,
  1745. ICNSS_UEVENT_FW_DOWN,
  1746. &fw_down_data);
  1747. }
  1748. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1749. ICNSS_EVENT_SYNC, event_data);
  1750. out:
  1751. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1752. return NOTIFY_OK;
  1753. }
  1754. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1755. {
  1756. int ret = 0;
  1757. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1758. priv->wpss_early_notify_handler =
  1759. qcom_register_early_ssr_notifier("wpss",
  1760. &priv->wpss_early_ssr_nb);
  1761. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1762. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1763. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1764. }
  1765. return ret;
  1766. }
  1767. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1768. {
  1769. int ret = 0;
  1770. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1771. /*
  1772. * Assign priority of icnss wpss notifier callback over IPA
  1773. * modem notifier callback which is 0
  1774. */
  1775. priv->wpss_ssr_nb.priority = 1;
  1776. priv->wpss_notify_handler =
  1777. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1778. if (IS_ERR(priv->wpss_notify_handler)) {
  1779. ret = PTR_ERR(priv->wpss_notify_handler);
  1780. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1781. }
  1782. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1783. return ret;
  1784. }
  1785. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1786. {
  1787. int ret = 0;
  1788. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1789. /*
  1790. * Assign priority of icnss modem notifier callback over IPA
  1791. * modem notifier callback which is 0
  1792. */
  1793. priv->modem_ssr_nb.priority = 1;
  1794. priv->modem_notify_handler =
  1795. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1796. if (IS_ERR(priv->modem_notify_handler)) {
  1797. ret = PTR_ERR(priv->modem_notify_handler);
  1798. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1799. }
  1800. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1801. return ret;
  1802. }
  1803. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1804. {
  1805. if (IS_ERR(priv->wpss_early_notify_handler))
  1806. return;
  1807. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1808. &priv->wpss_early_ssr_nb);
  1809. priv->wpss_early_notify_handler = NULL;
  1810. }
  1811. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1812. {
  1813. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1814. return 0;
  1815. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1816. &priv->wpss_ssr_nb);
  1817. priv->wpss_notify_handler = NULL;
  1818. return 0;
  1819. }
  1820. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1821. {
  1822. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1823. return 0;
  1824. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1825. &priv->modem_ssr_nb);
  1826. priv->modem_notify_handler = NULL;
  1827. return 0;
  1828. }
  1829. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1830. {
  1831. struct icnss_priv *priv = priv_cb;
  1832. struct icnss_event_pd_service_down_data *event_data;
  1833. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1834. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1835. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1836. state, priv->state);
  1837. switch (state) {
  1838. case SERVREG_SERVICE_STATE_DOWN:
  1839. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1840. if (!event_data)
  1841. return;
  1842. event_data->crashed = true;
  1843. if (!priv->is_ssr) {
  1844. set_bit(ICNSS_PDR, &penv->state);
  1845. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1846. cause = ICNSS_HOST_ERROR;
  1847. priv->stats.recovery.pdr_host_error++;
  1848. } else {
  1849. cause = ICNSS_FW_CRASH;
  1850. priv->stats.recovery.pdr_fw_crash++;
  1851. }
  1852. } else if (priv->root_pd_shutdown) {
  1853. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1854. event_data->crashed = false;
  1855. }
  1856. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1857. priv->state, icnss_pdr_cause[cause]);
  1858. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1859. set_bit(ICNSS_FW_DOWN, &priv->state);
  1860. icnss_ignore_fw_timeout(true);
  1861. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1862. clear_bit(ICNSS_FW_READY, &priv->state);
  1863. fw_down_data.crashed = event_data->crashed;
  1864. icnss_call_driver_uevent(priv,
  1865. ICNSS_UEVENT_FW_DOWN,
  1866. &fw_down_data);
  1867. }
  1868. }
  1869. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1870. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1871. ICNSS_EVENT_SYNC, event_data);
  1872. break;
  1873. case SERVREG_SERVICE_STATE_UP:
  1874. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1875. break;
  1876. default:
  1877. break;
  1878. }
  1879. return;
  1880. }
  1881. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1882. {
  1883. struct pdr_handle *handle = NULL;
  1884. struct pdr_service *service = NULL;
  1885. int err = 0;
  1886. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1887. if (IS_ERR_OR_NULL(handle)) {
  1888. err = PTR_ERR(handle);
  1889. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1890. goto out;
  1891. }
  1892. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1893. if (IS_ERR_OR_NULL(service)) {
  1894. err = PTR_ERR(service);
  1895. icnss_pr_err("Failed to add lookup, err %d", err);
  1896. goto out;
  1897. }
  1898. priv->pdr_handle = handle;
  1899. priv->pdr_service = service;
  1900. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1901. icnss_pr_info("PDR registration happened");
  1902. out:
  1903. return err;
  1904. }
  1905. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  1906. {
  1907. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  1908. return;
  1909. pdr_handle_release(priv->pdr_handle);
  1910. }
  1911. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  1912. {
  1913. int ret = 0;
  1914. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  1915. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  1916. ret = PTR_ERR(priv->icnss_ramdump_class);
  1917. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  1918. return ret;
  1919. }
  1920. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  1921. ICNSS_RAMDUMP_NAME);
  1922. if (ret < 0) {
  1923. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  1924. goto fail_alloc_major;
  1925. }
  1926. return 0;
  1927. fail_alloc_major:
  1928. class_destroy(priv->icnss_ramdump_class);
  1929. return ret;
  1930. }
  1931. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  1932. {
  1933. int ret = 0;
  1934. struct icnss_ramdump_info *ramdump_info;
  1935. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  1936. if (!ramdump_info)
  1937. return ERR_PTR(-ENOMEM);
  1938. if (!dev_name) {
  1939. icnss_pr_err("%s: Invalid device name.\n", __func__);
  1940. return NULL;
  1941. }
  1942. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  1943. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  1944. if (ramdump_info->minor < 0) {
  1945. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  1946. ramdump_info->minor);
  1947. ret = -ENODEV;
  1948. goto fail_out_of_minors;
  1949. }
  1950. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  1951. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  1952. ramdump_info->minor),
  1953. ramdump_info, ramdump_info->name);
  1954. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  1955. ret = PTR_ERR(ramdump_info->dev);
  1956. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  1957. ramdump_info->name, ret);
  1958. goto fail_device_create;
  1959. }
  1960. return (void *)ramdump_info;
  1961. fail_device_create:
  1962. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  1963. fail_out_of_minors:
  1964. kfree(ramdump_info);
  1965. return ERR_PTR(ret);
  1966. }
  1967. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  1968. {
  1969. int ret = 0;
  1970. if (!priv || !priv->pdev) {
  1971. icnss_pr_err("Platform priv or pdev is NULL\n");
  1972. return -EINVAL;
  1973. }
  1974. ret = icnss_ramdump_devnode_init(priv);
  1975. if (ret)
  1976. return ret;
  1977. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  1978. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  1979. icnss_pr_err("Failed to create msa0 dump device!");
  1980. return -ENOMEM;
  1981. }
  1982. if (priv->device_id == WCN6750_DEVICE_ID) {
  1983. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  1984. ICNSS_M3_SEGMENT(
  1985. ICNSS_M3_SEGMENT_PHYAREG));
  1986. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1987. !priv->m3_dump_phyareg->dev) {
  1988. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  1989. return -ENOMEM;
  1990. }
  1991. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  1992. ICNSS_M3_SEGMENT(
  1993. ICNSS_M3_SEGMENT_PHYA));
  1994. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1995. !priv->m3_dump_phydbg->dev) {
  1996. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  1997. return -ENOMEM;
  1998. }
  1999. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2000. ICNSS_M3_SEGMENT(
  2001. ICNSS_M3_SEGMENT_WMACREG));
  2002. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2003. !priv->m3_dump_wmac0reg->dev) {
  2004. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2005. return -ENOMEM;
  2006. }
  2007. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2008. ICNSS_M3_SEGMENT(
  2009. ICNSS_M3_SEGMENT_WCSSDBG));
  2010. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2011. !priv->m3_dump_wcssdbg->dev) {
  2012. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2013. return -ENOMEM;
  2014. }
  2015. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2016. ICNSS_M3_SEGMENT(
  2017. ICNSS_M3_SEGMENT_PHYAM3));
  2018. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2019. !priv->m3_dump_phyapdmem->dev) {
  2020. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2021. return -ENOMEM;
  2022. }
  2023. }
  2024. return 0;
  2025. }
  2026. static int icnss_enable_recovery(struct icnss_priv *priv)
  2027. {
  2028. int ret;
  2029. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2030. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2031. return 0;
  2032. }
  2033. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2034. icnss_pr_dbg("SSR disabled through module parameter\n");
  2035. goto enable_pdr;
  2036. }
  2037. ret = icnss_register_ramdump_devices(priv);
  2038. if (ret)
  2039. return ret;
  2040. if (priv->wpss_supported) {
  2041. icnss_wpss_early_ssr_register_notifier(priv);
  2042. icnss_wpss_ssr_register_notifier(priv);
  2043. return 0;
  2044. }
  2045. icnss_modem_ssr_register_notifier(priv);
  2046. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2047. icnss_pr_dbg("PDR disabled through module parameter\n");
  2048. return 0;
  2049. }
  2050. enable_pdr:
  2051. ret = icnss_pd_restart_enable(priv);
  2052. if (ret)
  2053. return ret;
  2054. return 0;
  2055. }
  2056. static int icnss_dev_id_match(struct icnss_priv *priv,
  2057. struct device_info *dev_info)
  2058. {
  2059. while (dev_info->device_id) {
  2060. if (priv->device_id == dev_info->device_id)
  2061. return 1;
  2062. dev_info++;
  2063. }
  2064. return 0;
  2065. }
  2066. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2067. unsigned long *thermal_state)
  2068. {
  2069. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2070. *thermal_state = icnss_tcdev->max_thermal_state;
  2071. return 0;
  2072. }
  2073. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2074. unsigned long *thermal_state)
  2075. {
  2076. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2077. *thermal_state = icnss_tcdev->curr_thermal_state;
  2078. return 0;
  2079. }
  2080. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2081. unsigned long thermal_state)
  2082. {
  2083. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2084. struct device *dev = &penv->pdev->dev;
  2085. int ret = 0;
  2086. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2087. return 0;
  2088. if (thermal_state > icnss_tcdev->max_thermal_state)
  2089. return -EINVAL;
  2090. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2091. thermal_state, icnss_tcdev->tcdev_id);
  2092. mutex_lock(&penv->tcdev_lock);
  2093. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2094. icnss_tcdev->tcdev_id);
  2095. if (!ret)
  2096. icnss_tcdev->curr_thermal_state = thermal_state;
  2097. mutex_unlock(&penv->tcdev_lock);
  2098. if (ret) {
  2099. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2100. ret, icnss_tcdev->tcdev_id);
  2101. return ret;
  2102. }
  2103. return 0;
  2104. }
  2105. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2106. .get_max_state = icnss_tcdev_get_max_state,
  2107. .get_cur_state = icnss_tcdev_get_cur_state,
  2108. .set_cur_state = icnss_tcdev_set_cur_state,
  2109. };
  2110. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2111. int tcdev_id)
  2112. {
  2113. struct icnss_priv *priv = dev_get_drvdata(dev);
  2114. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2115. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2116. struct device_node *dev_node;
  2117. int ret = 0;
  2118. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2119. if (!icnss_tcdev)
  2120. return -ENOMEM;
  2121. icnss_tcdev->tcdev_id = tcdev_id;
  2122. icnss_tcdev->max_thermal_state = max_state;
  2123. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2124. "qcom,icnss_cdev%d", tcdev_id);
  2125. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2126. if (!dev_node) {
  2127. icnss_pr_err("Failed to get cooling device node\n");
  2128. return -EINVAL;
  2129. }
  2130. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2131. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2132. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2133. dev_node,
  2134. cdev_node_name, icnss_tcdev,
  2135. &icnss_cooling_ops);
  2136. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2137. ret = PTR_ERR(icnss_tcdev->tcdev);
  2138. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2139. ret, icnss_tcdev->tcdev_id);
  2140. } else {
  2141. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2142. icnss_tcdev->tcdev_id);
  2143. list_add(&icnss_tcdev->tcdev_list,
  2144. &priv->icnss_tcdev_list);
  2145. }
  2146. } else {
  2147. icnss_pr_dbg("Cooling device registration not supported");
  2148. ret = -EOPNOTSUPP;
  2149. }
  2150. return ret;
  2151. }
  2152. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2153. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2154. {
  2155. struct icnss_priv *priv = dev_get_drvdata(dev);
  2156. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2157. while (!list_empty(&priv->icnss_tcdev_list)) {
  2158. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2159. struct icnss_thermal_cdev,
  2160. tcdev_list);
  2161. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2162. list_del(&icnss_tcdev->tcdev_list);
  2163. kfree(icnss_tcdev);
  2164. }
  2165. }
  2166. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2167. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2168. unsigned long *thermal_state,
  2169. int tcdev_id)
  2170. {
  2171. struct icnss_priv *priv = dev_get_drvdata(dev);
  2172. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2173. mutex_lock(&priv->tcdev_lock);
  2174. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2175. if (icnss_tcdev->tcdev_id != tcdev_id)
  2176. continue;
  2177. *thermal_state = icnss_tcdev->curr_thermal_state;
  2178. mutex_unlock(&priv->tcdev_lock);
  2179. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2180. icnss_tcdev->curr_thermal_state, tcdev_id);
  2181. return 0;
  2182. }
  2183. mutex_unlock(&priv->tcdev_lock);
  2184. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2185. return -EINVAL;
  2186. }
  2187. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2188. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2189. int cmd_len, void *cb_ctx,
  2190. int (*cb)(void *ctx, void *event, int event_len))
  2191. {
  2192. struct icnss_priv *priv = icnss_get_plat_priv();
  2193. int ret;
  2194. if (!priv)
  2195. return -ENODEV;
  2196. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2197. return -EINVAL;
  2198. priv->get_info_cb = cb;
  2199. priv->get_info_cb_ctx = cb_ctx;
  2200. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2201. if (ret) {
  2202. priv->get_info_cb = NULL;
  2203. priv->get_info_cb_ctx = NULL;
  2204. }
  2205. return ret;
  2206. }
  2207. EXPORT_SYMBOL(icnss_qmi_send);
  2208. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2209. struct module *owner, const char *mod_name)
  2210. {
  2211. int ret = 0;
  2212. struct icnss_priv *priv = icnss_get_plat_priv();
  2213. if (!priv || !priv->pdev) {
  2214. ret = -ENODEV;
  2215. goto out;
  2216. }
  2217. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2218. if (priv->ops) {
  2219. icnss_pr_err("Driver already registered\n");
  2220. ret = -EEXIST;
  2221. goto out;
  2222. }
  2223. if (!ops->dev_info) {
  2224. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2225. return -EINVAL;
  2226. }
  2227. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2228. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2229. ops->dev_info->name);
  2230. return -ENODEV;
  2231. }
  2232. if (!ops->probe || !ops->remove) {
  2233. ret = -EINVAL;
  2234. goto out;
  2235. }
  2236. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2237. 0, ops);
  2238. if (ret == -EINTR)
  2239. ret = 0;
  2240. out:
  2241. return ret;
  2242. }
  2243. EXPORT_SYMBOL(__icnss_register_driver);
  2244. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2245. {
  2246. int ret;
  2247. struct icnss_priv *priv = icnss_get_plat_priv();
  2248. if (!priv || !priv->pdev) {
  2249. ret = -ENODEV;
  2250. goto out;
  2251. }
  2252. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2253. if (!priv->ops) {
  2254. icnss_pr_err("Driver not registered\n");
  2255. ret = -ENOENT;
  2256. goto out;
  2257. }
  2258. ret = icnss_driver_event_post(priv,
  2259. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2260. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2261. out:
  2262. return ret;
  2263. }
  2264. EXPORT_SYMBOL(icnss_unregister_driver);
  2265. static struct icnss_msi_config msi_config = {
  2266. .total_vectors = 28,
  2267. .total_users = 2,
  2268. .users = (struct icnss_msi_user[]) {
  2269. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2270. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2271. },
  2272. };
  2273. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2274. {
  2275. priv->msi_config = &msi_config;
  2276. return 0;
  2277. }
  2278. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2279. int *num_vectors, u32 *user_base_data,
  2280. u32 *base_vector)
  2281. {
  2282. struct icnss_priv *priv = dev_get_drvdata(dev);
  2283. struct icnss_msi_config *msi_config;
  2284. int idx;
  2285. if (!priv)
  2286. return -ENODEV;
  2287. msi_config = priv->msi_config;
  2288. if (!msi_config) {
  2289. icnss_pr_err("MSI is not supported.\n");
  2290. return -EINVAL;
  2291. }
  2292. for (idx = 0; idx < msi_config->total_users; idx++) {
  2293. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2294. *num_vectors = msi_config->users[idx].num_vectors;
  2295. *user_base_data = msi_config->users[idx].base_vector
  2296. + priv->msi_base_data;
  2297. *base_vector = msi_config->users[idx].base_vector;
  2298. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2299. user_name, *num_vectors, *user_base_data,
  2300. *base_vector);
  2301. return 0;
  2302. }
  2303. }
  2304. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2305. return -EINVAL;
  2306. }
  2307. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2308. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2309. {
  2310. struct icnss_priv *priv = dev_get_drvdata(dev);
  2311. int irq_num;
  2312. irq_num = priv->srng_irqs[vector];
  2313. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2314. irq_num, vector);
  2315. return irq_num;
  2316. }
  2317. EXPORT_SYMBOL(icnss_get_msi_irq);
  2318. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2319. u32 *msi_addr_high)
  2320. {
  2321. struct icnss_priv *priv = dev_get_drvdata(dev);
  2322. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2323. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2324. }
  2325. EXPORT_SYMBOL(icnss_get_msi_address);
  2326. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2327. irqreturn_t (*handler)(int, void *),
  2328. unsigned long flags, const char *name, void *ctx)
  2329. {
  2330. int ret = 0;
  2331. unsigned int irq;
  2332. struct ce_irq_list *irq_entry;
  2333. struct icnss_priv *priv = dev_get_drvdata(dev);
  2334. if (!priv || !priv->pdev) {
  2335. ret = -ENODEV;
  2336. goto out;
  2337. }
  2338. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2339. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2340. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2341. ret = -EINVAL;
  2342. goto out;
  2343. }
  2344. irq = priv->ce_irqs[ce_id];
  2345. irq_entry = &priv->ce_irq_list[ce_id];
  2346. if (irq_entry->handler || irq_entry->irq) {
  2347. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2348. irq, ce_id);
  2349. ret = -EEXIST;
  2350. goto out;
  2351. }
  2352. ret = request_irq(irq, handler, flags, name, ctx);
  2353. if (ret) {
  2354. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2355. irq, ce_id, ret);
  2356. goto out;
  2357. }
  2358. irq_entry->irq = irq;
  2359. irq_entry->handler = handler;
  2360. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2361. penv->stats.ce_irqs[ce_id].request++;
  2362. out:
  2363. return ret;
  2364. }
  2365. EXPORT_SYMBOL(icnss_ce_request_irq);
  2366. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2367. {
  2368. int ret = 0;
  2369. unsigned int irq;
  2370. struct ce_irq_list *irq_entry;
  2371. if (!penv || !penv->pdev || !dev) {
  2372. ret = -ENODEV;
  2373. goto out;
  2374. }
  2375. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2376. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2377. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2378. ret = -EINVAL;
  2379. goto out;
  2380. }
  2381. irq = penv->ce_irqs[ce_id];
  2382. irq_entry = &penv->ce_irq_list[ce_id];
  2383. if (!irq_entry->handler || !irq_entry->irq) {
  2384. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2385. ret = -EEXIST;
  2386. goto out;
  2387. }
  2388. free_irq(irq, ctx);
  2389. irq_entry->irq = 0;
  2390. irq_entry->handler = NULL;
  2391. penv->stats.ce_irqs[ce_id].free++;
  2392. out:
  2393. return ret;
  2394. }
  2395. EXPORT_SYMBOL(icnss_ce_free_irq);
  2396. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2397. {
  2398. unsigned int irq;
  2399. if (!penv || !penv->pdev || !dev) {
  2400. icnss_pr_err("Platform driver not initialized\n");
  2401. return;
  2402. }
  2403. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2404. penv->state);
  2405. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2406. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2407. return;
  2408. }
  2409. penv->stats.ce_irqs[ce_id].enable++;
  2410. irq = penv->ce_irqs[ce_id];
  2411. enable_irq(irq);
  2412. }
  2413. EXPORT_SYMBOL(icnss_enable_irq);
  2414. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2415. {
  2416. unsigned int irq;
  2417. if (!penv || !penv->pdev || !dev) {
  2418. icnss_pr_err("Platform driver not initialized\n");
  2419. return;
  2420. }
  2421. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2422. penv->state);
  2423. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2424. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2425. ce_id);
  2426. return;
  2427. }
  2428. irq = penv->ce_irqs[ce_id];
  2429. disable_irq(irq);
  2430. penv->stats.ce_irqs[ce_id].disable++;
  2431. }
  2432. EXPORT_SYMBOL(icnss_disable_irq);
  2433. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2434. {
  2435. char *fw_build_timestamp = NULL;
  2436. struct icnss_priv *priv = dev_get_drvdata(dev);
  2437. if (!priv) {
  2438. icnss_pr_err("Platform driver not initialized\n");
  2439. return -EINVAL;
  2440. }
  2441. info->v_addr = priv->mem_base_va;
  2442. info->p_addr = priv->mem_base_pa;
  2443. info->chip_id = priv->chip_info.chip_id;
  2444. info->chip_family = priv->chip_info.chip_family;
  2445. info->board_id = priv->board_id;
  2446. info->soc_id = priv->soc_id;
  2447. info->fw_version = priv->fw_version_info.fw_version;
  2448. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2449. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2450. strlcpy(info->fw_build_timestamp,
  2451. priv->fw_version_info.fw_build_timestamp,
  2452. WLFW_MAX_TIMESTAMP_LEN + 1);
  2453. strlcpy(info->fw_build_id, priv->fw_build_id,
  2454. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2455. return 0;
  2456. }
  2457. EXPORT_SYMBOL(icnss_get_soc_info);
  2458. int icnss_get_mhi_state(struct device *dev)
  2459. {
  2460. struct icnss_priv *priv = dev_get_drvdata(dev);
  2461. if (!priv) {
  2462. icnss_pr_err("Platform driver not initialized\n");
  2463. return -EINVAL;
  2464. }
  2465. if (!priv->mhi_state_info_va)
  2466. return -ENOMEM;
  2467. return ioread32(priv->mhi_state_info_va);
  2468. }
  2469. EXPORT_SYMBOL(icnss_get_mhi_state);
  2470. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2471. {
  2472. int ret;
  2473. struct icnss_priv *priv;
  2474. if (!dev)
  2475. return -ENODEV;
  2476. priv = dev_get_drvdata(dev);
  2477. if (!priv) {
  2478. icnss_pr_err("Platform driver not initialized\n");
  2479. return -EINVAL;
  2480. }
  2481. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2482. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2483. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2484. priv->state);
  2485. return -EINVAL;
  2486. }
  2487. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2488. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2489. if (ret)
  2490. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2491. ret, fw_log_mode);
  2492. return ret;
  2493. }
  2494. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2495. int icnss_force_wake_request(struct device *dev)
  2496. {
  2497. struct icnss_priv *priv;
  2498. if (!dev)
  2499. return -ENODEV;
  2500. priv = dev_get_drvdata(dev);
  2501. if (!priv) {
  2502. icnss_pr_err("Platform driver not initialized\n");
  2503. return -EINVAL;
  2504. }
  2505. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2506. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2507. atomic_read(&priv->soc_wake_ref_count));
  2508. return 0;
  2509. }
  2510. icnss_pr_soc_wake("Calling SOC Wake request");
  2511. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2512. 0, NULL);
  2513. return 0;
  2514. }
  2515. EXPORT_SYMBOL(icnss_force_wake_request);
  2516. int icnss_force_wake_release(struct device *dev)
  2517. {
  2518. struct icnss_priv *priv;
  2519. if (!dev)
  2520. return -ENODEV;
  2521. priv = dev_get_drvdata(dev);
  2522. if (!priv) {
  2523. icnss_pr_err("Platform driver not initialized\n");
  2524. return -EINVAL;
  2525. }
  2526. icnss_pr_soc_wake("Calling SOC Wake response");
  2527. if (atomic_read(&priv->soc_wake_ref_count) &&
  2528. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2529. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2530. atomic_read(&priv->soc_wake_ref_count));
  2531. return 0;
  2532. }
  2533. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2534. 0, NULL);
  2535. return 0;
  2536. }
  2537. EXPORT_SYMBOL(icnss_force_wake_release);
  2538. int icnss_is_device_awake(struct device *dev)
  2539. {
  2540. struct icnss_priv *priv = dev_get_drvdata(dev);
  2541. if (!priv) {
  2542. icnss_pr_err("Platform driver not initialized\n");
  2543. return -EINVAL;
  2544. }
  2545. return atomic_read(&priv->soc_wake_ref_count);
  2546. }
  2547. EXPORT_SYMBOL(icnss_is_device_awake);
  2548. int icnss_is_pci_ep_awake(struct device *dev)
  2549. {
  2550. struct icnss_priv *priv = dev_get_drvdata(dev);
  2551. if (!priv) {
  2552. icnss_pr_err("Platform driver not initialized\n");
  2553. return -EINVAL;
  2554. }
  2555. if (!priv->mhi_state_info_va)
  2556. return -ENOMEM;
  2557. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2558. }
  2559. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2560. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2561. uint32_t mem_type, uint32_t data_len,
  2562. uint8_t *output)
  2563. {
  2564. int ret = 0;
  2565. struct icnss_priv *priv = dev_get_drvdata(dev);
  2566. if (priv->magic != ICNSS_MAGIC) {
  2567. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2568. dev, priv, priv->magic);
  2569. return -EINVAL;
  2570. }
  2571. if (!output || data_len == 0
  2572. || data_len > WLFW_MAX_DATA_SIZE) {
  2573. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2574. output, data_len);
  2575. ret = -EINVAL;
  2576. goto out;
  2577. }
  2578. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2579. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2580. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2581. priv->state);
  2582. ret = -EINVAL;
  2583. goto out;
  2584. }
  2585. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2586. data_len, output);
  2587. out:
  2588. return ret;
  2589. }
  2590. EXPORT_SYMBOL(icnss_athdiag_read);
  2591. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2592. uint32_t mem_type, uint32_t data_len,
  2593. uint8_t *input)
  2594. {
  2595. int ret = 0;
  2596. struct icnss_priv *priv = dev_get_drvdata(dev);
  2597. if (priv->magic != ICNSS_MAGIC) {
  2598. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2599. dev, priv, priv->magic);
  2600. return -EINVAL;
  2601. }
  2602. if (!input || data_len == 0
  2603. || data_len > WLFW_MAX_DATA_SIZE) {
  2604. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2605. input, data_len);
  2606. ret = -EINVAL;
  2607. goto out;
  2608. }
  2609. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2610. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2611. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2612. priv->state);
  2613. ret = -EINVAL;
  2614. goto out;
  2615. }
  2616. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2617. data_len, input);
  2618. out:
  2619. return ret;
  2620. }
  2621. EXPORT_SYMBOL(icnss_athdiag_write);
  2622. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2623. enum icnss_driver_mode mode,
  2624. const char *host_version)
  2625. {
  2626. struct icnss_priv *priv = dev_get_drvdata(dev);
  2627. int temp = 0;
  2628. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2629. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2630. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2631. priv->state);
  2632. return -EINVAL;
  2633. }
  2634. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2635. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2636. priv->state);
  2637. return -EINVAL;
  2638. }
  2639. if (priv->wpss_supported &&
  2640. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2641. icnss_setup_dms_mac(priv);
  2642. if (priv->device_id == WCN6750_DEVICE_ID) {
  2643. if (!icnss_get_temperature(priv, &temp)) {
  2644. icnss_pr_dbg("Temperature: %d\n", temp);
  2645. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2646. icnss_set_wlan_en_delay(priv);
  2647. }
  2648. }
  2649. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2650. }
  2651. EXPORT_SYMBOL(icnss_wlan_enable);
  2652. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2653. {
  2654. struct icnss_priv *priv = dev_get_drvdata(dev);
  2655. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2656. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2657. priv->state);
  2658. return 0;
  2659. }
  2660. return icnss_send_wlan_disable_to_fw(priv);
  2661. }
  2662. EXPORT_SYMBOL(icnss_wlan_disable);
  2663. bool icnss_is_qmi_disable(struct device *dev)
  2664. {
  2665. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2666. }
  2667. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2668. int icnss_get_ce_id(struct device *dev, int irq)
  2669. {
  2670. int i;
  2671. if (!penv || !penv->pdev || !dev)
  2672. return -ENODEV;
  2673. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2674. if (penv->ce_irqs[i] == irq)
  2675. return i;
  2676. }
  2677. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2678. return -EINVAL;
  2679. }
  2680. EXPORT_SYMBOL(icnss_get_ce_id);
  2681. int icnss_get_irq(struct device *dev, int ce_id)
  2682. {
  2683. int irq;
  2684. if (!penv || !penv->pdev || !dev)
  2685. return -ENODEV;
  2686. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2687. return -EINVAL;
  2688. irq = penv->ce_irqs[ce_id];
  2689. return irq;
  2690. }
  2691. EXPORT_SYMBOL(icnss_get_irq);
  2692. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2693. {
  2694. struct icnss_priv *priv = dev_get_drvdata(dev);
  2695. if (!priv) {
  2696. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2697. return NULL;
  2698. }
  2699. return priv->iommu_domain;
  2700. }
  2701. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2702. int icnss_smmu_map(struct device *dev,
  2703. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2704. {
  2705. struct icnss_priv *priv = dev_get_drvdata(dev);
  2706. int flag = IOMMU_READ | IOMMU_WRITE;
  2707. bool dma_coherent = false;
  2708. unsigned long iova;
  2709. int prop_len = 0;
  2710. size_t len;
  2711. int ret = 0;
  2712. if (!priv) {
  2713. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2714. dev, priv);
  2715. return -EINVAL;
  2716. }
  2717. if (!iova_addr) {
  2718. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2719. &paddr, size);
  2720. return -EINVAL;
  2721. }
  2722. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2723. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2724. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2725. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2726. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2727. iova,
  2728. &priv->smmu_iova_ipa_start,
  2729. priv->smmu_iova_ipa_len);
  2730. return -ENOMEM;
  2731. }
  2732. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2733. icnss_pr_dbg("dma-coherent is %s\n",
  2734. dma_coherent ? "enabled" : "disabled");
  2735. if (dma_coherent)
  2736. flag |= IOMMU_CACHE;
  2737. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2738. ret = iommu_map(priv->iommu_domain, iova,
  2739. rounddown(paddr, PAGE_SIZE), len,
  2740. flag);
  2741. if (ret) {
  2742. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2743. return ret;
  2744. }
  2745. priv->smmu_iova_ipa_current = iova + len;
  2746. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2747. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2748. return 0;
  2749. }
  2750. EXPORT_SYMBOL(icnss_smmu_map);
  2751. int icnss_smmu_unmap(struct device *dev,
  2752. uint32_t iova_addr, size_t size)
  2753. {
  2754. struct icnss_priv *priv = dev_get_drvdata(dev);
  2755. unsigned long iova;
  2756. size_t len, unmapped_len;
  2757. if (!priv) {
  2758. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2759. dev, priv);
  2760. return -EINVAL;
  2761. }
  2762. if (!iova_addr) {
  2763. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2764. size);
  2765. return -EINVAL;
  2766. }
  2767. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2768. PAGE_SIZE);
  2769. iova = rounddown(iova_addr, PAGE_SIZE);
  2770. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2771. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2772. iova,
  2773. &priv->smmu_iova_ipa_start,
  2774. priv->smmu_iova_ipa_len);
  2775. return -ENOMEM;
  2776. }
  2777. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2778. iova, len);
  2779. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2780. if (unmapped_len != len) {
  2781. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2782. return -EINVAL;
  2783. }
  2784. priv->smmu_iova_ipa_current = iova;
  2785. return 0;
  2786. }
  2787. EXPORT_SYMBOL(icnss_smmu_unmap);
  2788. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2789. {
  2790. return socinfo_get_serial_number();
  2791. }
  2792. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2793. int icnss_trigger_recovery(struct device *dev)
  2794. {
  2795. int ret = 0;
  2796. struct icnss_priv *priv = dev_get_drvdata(dev);
  2797. if (priv->magic != ICNSS_MAGIC) {
  2798. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2799. ret = -EINVAL;
  2800. goto out;
  2801. }
  2802. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2803. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2804. priv->state);
  2805. ret = -EPERM;
  2806. goto out;
  2807. }
  2808. if (priv->wpss_supported) {
  2809. icnss_pr_vdbg("Initiate Root PD restart");
  2810. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2811. ICNSS_SMP2P_OUT_POWER_SAVE);
  2812. if (!ret)
  2813. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2814. return ret;
  2815. }
  2816. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2817. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2818. priv->state);
  2819. ret = -EOPNOTSUPP;
  2820. goto out;
  2821. }
  2822. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2823. priv->state);
  2824. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2825. if (!ret)
  2826. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2827. out:
  2828. return ret;
  2829. }
  2830. EXPORT_SYMBOL(icnss_trigger_recovery);
  2831. int icnss_idle_shutdown(struct device *dev)
  2832. {
  2833. struct icnss_priv *priv = dev_get_drvdata(dev);
  2834. if (!priv) {
  2835. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2836. return -EINVAL;
  2837. }
  2838. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2839. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2840. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2841. return -EBUSY;
  2842. }
  2843. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2844. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2845. }
  2846. EXPORT_SYMBOL(icnss_idle_shutdown);
  2847. int icnss_idle_restart(struct device *dev)
  2848. {
  2849. struct icnss_priv *priv = dev_get_drvdata(dev);
  2850. if (!priv) {
  2851. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2852. return -EINVAL;
  2853. }
  2854. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2855. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2856. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2857. return -EBUSY;
  2858. }
  2859. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2860. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2861. }
  2862. EXPORT_SYMBOL(icnss_idle_restart);
  2863. int icnss_exit_power_save(struct device *dev)
  2864. {
  2865. struct icnss_priv *priv = dev_get_drvdata(dev);
  2866. icnss_pr_vdbg("Calling Exit Power Save\n");
  2867. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2868. !test_bit(ICNSS_MODE_ON, &priv->state))
  2869. return 0;
  2870. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2871. ICNSS_SMP2P_OUT_POWER_SAVE);
  2872. }
  2873. EXPORT_SYMBOL(icnss_exit_power_save);
  2874. int icnss_prevent_l1(struct device *dev)
  2875. {
  2876. struct icnss_priv *priv = dev_get_drvdata(dev);
  2877. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2878. !test_bit(ICNSS_MODE_ON, &priv->state))
  2879. return 0;
  2880. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2881. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2882. }
  2883. EXPORT_SYMBOL(icnss_prevent_l1);
  2884. void icnss_allow_l1(struct device *dev)
  2885. {
  2886. struct icnss_priv *priv = dev_get_drvdata(dev);
  2887. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2888. !test_bit(ICNSS_MODE_ON, &priv->state))
  2889. return;
  2890. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2891. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2892. }
  2893. EXPORT_SYMBOL(icnss_allow_l1);
  2894. void icnss_allow_recursive_recovery(struct device *dev)
  2895. {
  2896. struct icnss_priv *priv = dev_get_drvdata(dev);
  2897. priv->allow_recursive_recovery = true;
  2898. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2899. }
  2900. void icnss_disallow_recursive_recovery(struct device *dev)
  2901. {
  2902. struct icnss_priv *priv = dev_get_drvdata(dev);
  2903. priv->allow_recursive_recovery = false;
  2904. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  2905. }
  2906. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  2907. {
  2908. struct kobject *icnss_kobject;
  2909. int ret = 0;
  2910. atomic_set(&priv->is_shutdown, false);
  2911. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  2912. if (!icnss_kobject) {
  2913. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  2914. return -EINVAL;
  2915. }
  2916. priv->icnss_kobject = icnss_kobject;
  2917. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  2918. if (ret) {
  2919. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  2920. return ret;
  2921. }
  2922. return ret;
  2923. }
  2924. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  2925. {
  2926. struct kobject *icnss_kobject;
  2927. icnss_kobject = priv->icnss_kobject;
  2928. if (icnss_kobject)
  2929. kobject_put(icnss_kobject);
  2930. }
  2931. static ssize_t qdss_tr_start_store(struct device *dev,
  2932. struct device_attribute *attr,
  2933. const char *buf, size_t count)
  2934. {
  2935. struct icnss_priv *priv = dev_get_drvdata(dev);
  2936. wlfw_qdss_trace_start(priv);
  2937. icnss_pr_dbg("Received QDSS start command\n");
  2938. return count;
  2939. }
  2940. static ssize_t qdss_tr_stop_store(struct device *dev,
  2941. struct device_attribute *attr,
  2942. const char *user_buf, size_t count)
  2943. {
  2944. struct icnss_priv *priv = dev_get_drvdata(dev);
  2945. u32 option = 0;
  2946. if (sscanf(user_buf, "%du", &option) != 1)
  2947. return -EINVAL;
  2948. wlfw_qdss_trace_stop(priv, option);
  2949. icnss_pr_dbg("Received QDSS stop command\n");
  2950. return count;
  2951. }
  2952. static ssize_t qdss_conf_download_store(struct device *dev,
  2953. struct device_attribute *attr,
  2954. const char *buf, size_t count)
  2955. {
  2956. struct icnss_priv *priv = dev_get_drvdata(dev);
  2957. icnss_wlfw_qdss_dnld_send_sync(priv);
  2958. icnss_pr_dbg("Received QDSS download config command\n");
  2959. return count;
  2960. }
  2961. static ssize_t hw_trc_override_store(struct device *dev,
  2962. struct device_attribute *attr,
  2963. const char *buf, size_t count)
  2964. {
  2965. struct icnss_priv *priv = dev_get_drvdata(dev);
  2966. int tmp = 0;
  2967. if (sscanf(buf, "%du", &tmp) != 1)
  2968. return -EINVAL;
  2969. priv->hw_trc_override = tmp;
  2970. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2971. return count;
  2972. }
  2973. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  2974. {
  2975. struct icnss_priv *priv = icnss_get_plat_priv();
  2976. phandle rproc_phandle;
  2977. int ret;
  2978. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  2979. &rproc_phandle)) {
  2980. icnss_pr_err("error reading rproc phandle\n");
  2981. return;
  2982. }
  2983. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  2984. if (IS_ERR_OR_NULL(priv->rproc)) {
  2985. icnss_pr_err("rproc not found");
  2986. return;
  2987. }
  2988. ret = rproc_boot(priv->rproc);
  2989. if (ret) {
  2990. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  2991. rproc_put(priv->rproc);
  2992. }
  2993. }
  2994. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  2995. {
  2996. if (priv && priv->rproc) {
  2997. rproc_shutdown(priv->rproc);
  2998. rproc_put(priv->rproc);
  2999. priv->rproc = NULL;
  3000. }
  3001. }
  3002. static ssize_t wpss_boot_store(struct device *dev,
  3003. struct device_attribute *attr,
  3004. const char *buf, size_t count)
  3005. {
  3006. struct icnss_priv *priv = dev_get_drvdata(dev);
  3007. int wpss_rproc = 0;
  3008. if (!priv->wpss_supported)
  3009. return count;
  3010. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3011. icnss_pr_err("Failed to read wpss rproc info");
  3012. return -EINVAL;
  3013. }
  3014. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3015. if (wpss_rproc == 1)
  3016. schedule_work(&wpss_loader);
  3017. else if (wpss_rproc == 0)
  3018. icnss_wpss_unload(priv);
  3019. return count;
  3020. }
  3021. static ssize_t wlan_en_delay_store(struct device *dev,
  3022. struct device_attribute *attr,
  3023. const char *buf, size_t count)
  3024. {
  3025. struct icnss_priv *priv = dev_get_drvdata(dev);
  3026. uint32_t wlan_en_delay = 0;
  3027. if (priv->device_id != WCN6750_DEVICE_ID)
  3028. return count;
  3029. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3030. icnss_pr_err("Failed to read wlan_en_delay");
  3031. return -EINVAL;
  3032. }
  3033. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3034. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3035. return count;
  3036. }
  3037. static DEVICE_ATTR_WO(qdss_tr_start);
  3038. static DEVICE_ATTR_WO(qdss_tr_stop);
  3039. static DEVICE_ATTR_WO(qdss_conf_download);
  3040. static DEVICE_ATTR_WO(hw_trc_override);
  3041. static DEVICE_ATTR_WO(wpss_boot);
  3042. static DEVICE_ATTR_WO(wlan_en_delay);
  3043. static struct attribute *icnss_attrs[] = {
  3044. &dev_attr_qdss_tr_start.attr,
  3045. &dev_attr_qdss_tr_stop.attr,
  3046. &dev_attr_qdss_conf_download.attr,
  3047. &dev_attr_hw_trc_override.attr,
  3048. &dev_attr_wpss_boot.attr,
  3049. &dev_attr_wlan_en_delay.attr,
  3050. NULL,
  3051. };
  3052. static struct attribute_group icnss_attr_group = {
  3053. .attrs = icnss_attrs,
  3054. };
  3055. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3056. {
  3057. struct device *dev = &priv->pdev->dev;
  3058. int ret;
  3059. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3060. if (ret) {
  3061. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3062. ret);
  3063. goto out;
  3064. }
  3065. return 0;
  3066. out:
  3067. return ret;
  3068. }
  3069. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3070. {
  3071. sysfs_remove_link(kernel_kobj, "icnss");
  3072. }
  3073. static int icnss_sysfs_create(struct icnss_priv *priv)
  3074. {
  3075. int ret = 0;
  3076. ret = devm_device_add_group(&priv->pdev->dev,
  3077. &icnss_attr_group);
  3078. if (ret) {
  3079. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3080. ret);
  3081. goto out;
  3082. }
  3083. icnss_create_sysfs_link(priv);
  3084. ret = icnss_create_shutdown_sysfs(priv);
  3085. if (ret)
  3086. goto remove_icnss_group;
  3087. return 0;
  3088. remove_icnss_group:
  3089. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3090. out:
  3091. return ret;
  3092. }
  3093. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3094. {
  3095. icnss_destroy_shutdown_sysfs(priv);
  3096. icnss_remove_sysfs_link(priv);
  3097. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3098. }
  3099. static int icnss_resource_parse(struct icnss_priv *priv)
  3100. {
  3101. int ret = 0, i = 0;
  3102. struct platform_device *pdev = priv->pdev;
  3103. struct device *dev = &pdev->dev;
  3104. struct resource *res;
  3105. u32 int_prop;
  3106. ret = icnss_get_vreg(priv);
  3107. if (ret) {
  3108. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3109. goto out;
  3110. }
  3111. ret = icnss_get_clk(priv);
  3112. if (ret) {
  3113. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3114. goto put_vreg;
  3115. }
  3116. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3117. ret = icnss_get_psf_info(priv);
  3118. if (ret < 0)
  3119. goto out;
  3120. priv->psf_supported = true;
  3121. }
  3122. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3123. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3124. "membase");
  3125. if (!res) {
  3126. icnss_pr_err("Memory base not found in DT\n");
  3127. ret = -EINVAL;
  3128. goto put_clk;
  3129. }
  3130. priv->mem_base_pa = res->start;
  3131. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3132. resource_size(res));
  3133. if (!priv->mem_base_va) {
  3134. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3135. &priv->mem_base_pa);
  3136. ret = -EINVAL;
  3137. goto put_clk;
  3138. }
  3139. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3140. &priv->mem_base_pa,
  3141. priv->mem_base_va);
  3142. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3143. res = platform_get_resource(priv->pdev,
  3144. IORESOURCE_IRQ, i);
  3145. if (!res) {
  3146. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3147. ret = -ENODEV;
  3148. goto put_clk;
  3149. } else {
  3150. priv->ce_irqs[i] = res->start;
  3151. }
  3152. }
  3153. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3154. &priv->rf_subtype) == 0) {
  3155. priv->is_rf_subtype_valid = true;
  3156. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3157. }
  3158. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3159. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3160. "msi_addr");
  3161. if (!res) {
  3162. icnss_pr_err("MSI address not found in DT\n");
  3163. ret = -EINVAL;
  3164. goto put_clk;
  3165. }
  3166. priv->msi_addr_pa = res->start;
  3167. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3168. PAGE_SIZE,
  3169. DMA_FROM_DEVICE, 0);
  3170. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3171. icnss_pr_err("MSI: failed to map msi address\n");
  3172. priv->msi_addr_iova = 0;
  3173. ret = -ENOMEM;
  3174. goto put_clk;
  3175. }
  3176. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3177. &priv->msi_addr_pa,
  3178. priv->msi_addr_iova);
  3179. ret = of_property_read_u32_index(dev->of_node,
  3180. "interrupts",
  3181. 1,
  3182. &int_prop);
  3183. if (ret) {
  3184. icnss_pr_dbg("Read interrupt prop failed");
  3185. goto put_clk;
  3186. }
  3187. priv->msi_base_data = int_prop + 32;
  3188. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3189. priv->msi_base_data, int_prop);
  3190. icnss_get_msi_assignment(priv);
  3191. for (i = 0; i < msi_config.total_vectors; i++) {
  3192. res = platform_get_resource(priv->pdev,
  3193. IORESOURCE_IRQ, i);
  3194. if (!res) {
  3195. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3196. ret = -ENODEV;
  3197. goto put_clk;
  3198. } else {
  3199. priv->srng_irqs[i] = res->start;
  3200. }
  3201. }
  3202. }
  3203. return 0;
  3204. put_clk:
  3205. icnss_put_clk(priv);
  3206. put_vreg:
  3207. icnss_put_vreg(priv);
  3208. out:
  3209. return ret;
  3210. }
  3211. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3212. {
  3213. int ret = 0;
  3214. struct platform_device *pdev = priv->pdev;
  3215. struct device *dev = &pdev->dev;
  3216. struct device_node *np = NULL;
  3217. u64 prop_size = 0;
  3218. const __be32 *addrp = NULL;
  3219. np = of_parse_phandle(dev->of_node,
  3220. "qcom,wlan-msa-fixed-region", 0);
  3221. if (np) {
  3222. addrp = of_get_address(np, 0, &prop_size, NULL);
  3223. if (!addrp) {
  3224. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3225. ret = -EINVAL;
  3226. of_node_put(np);
  3227. goto out;
  3228. }
  3229. priv->msa_pa = of_translate_address(np, addrp);
  3230. if (priv->msa_pa == OF_BAD_ADDR) {
  3231. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3232. ret = -EINVAL;
  3233. of_node_put(np);
  3234. goto out;
  3235. }
  3236. of_node_put(np);
  3237. priv->msa_va = memremap(priv->msa_pa,
  3238. (unsigned long)prop_size, MEMREMAP_WT);
  3239. if (!priv->msa_va) {
  3240. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3241. &priv->msa_pa);
  3242. ret = -EINVAL;
  3243. goto out;
  3244. }
  3245. priv->msa_mem_size = prop_size;
  3246. } else {
  3247. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3248. &priv->msa_mem_size);
  3249. if (ret || priv->msa_mem_size == 0) {
  3250. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3251. priv->msa_mem_size, ret);
  3252. goto out;
  3253. }
  3254. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3255. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3256. if (!priv->msa_va) {
  3257. icnss_pr_err("DMA alloc failed for MSA\n");
  3258. ret = -ENOMEM;
  3259. goto out;
  3260. }
  3261. }
  3262. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3263. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3264. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3265. "qcom,fw-prefix");
  3266. return 0;
  3267. out:
  3268. return ret;
  3269. }
  3270. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3271. struct device *dev, unsigned long iova,
  3272. int flags, void *handler_token)
  3273. {
  3274. struct icnss_priv *priv = handler_token;
  3275. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3276. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3277. if (!priv) {
  3278. icnss_pr_err("priv is NULL\n");
  3279. return -ENODEV;
  3280. }
  3281. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3282. fw_down_data.crashed = true;
  3283. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3284. &fw_down_data);
  3285. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3286. &fw_down_data);
  3287. }
  3288. icnss_trigger_recovery(&priv->pdev->dev);
  3289. /* IOMMU driver requires non-zero return value to print debug info. */
  3290. return -EINVAL;
  3291. }
  3292. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3293. {
  3294. int ret = 0;
  3295. struct platform_device *pdev = priv->pdev;
  3296. struct device *dev = &pdev->dev;
  3297. const char *iommu_dma_type;
  3298. struct resource *res;
  3299. u32 addr_win[2];
  3300. ret = of_property_read_u32_array(dev->of_node,
  3301. "qcom,iommu-dma-addr-pool",
  3302. addr_win,
  3303. ARRAY_SIZE(addr_win));
  3304. if (ret) {
  3305. icnss_pr_err("SMMU IOVA base not found\n");
  3306. } else {
  3307. priv->smmu_iova_start = addr_win[0];
  3308. priv->smmu_iova_len = addr_win[1];
  3309. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3310. &priv->smmu_iova_start,
  3311. priv->smmu_iova_len);
  3312. priv->iommu_domain =
  3313. iommu_get_domain_for_dev(&pdev->dev);
  3314. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3315. &iommu_dma_type);
  3316. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3317. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3318. priv->smmu_s1_enable = true;
  3319. if (priv->device_id == WCN6750_DEVICE_ID)
  3320. iommu_set_fault_handler(priv->iommu_domain,
  3321. icnss_smmu_fault_handler,
  3322. priv);
  3323. }
  3324. res = platform_get_resource_byname(pdev,
  3325. IORESOURCE_MEM,
  3326. "smmu_iova_ipa");
  3327. if (!res) {
  3328. icnss_pr_err("SMMU IOVA IPA not found\n");
  3329. } else {
  3330. priv->smmu_iova_ipa_start = res->start;
  3331. priv->smmu_iova_ipa_current = res->start;
  3332. priv->smmu_iova_ipa_len = resource_size(res);
  3333. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3334. &priv->smmu_iova_ipa_start,
  3335. priv->smmu_iova_ipa_len);
  3336. }
  3337. }
  3338. return 0;
  3339. }
  3340. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3341. {
  3342. if (!priv)
  3343. return -ENODEV;
  3344. if (!priv->smmu_iova_len)
  3345. return -EINVAL;
  3346. *addr = priv->smmu_iova_start;
  3347. *size = priv->smmu_iova_len;
  3348. return 0;
  3349. }
  3350. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3351. {
  3352. if (!priv)
  3353. return -ENODEV;
  3354. if (!priv->smmu_iova_ipa_len)
  3355. return -EINVAL;
  3356. *addr = priv->smmu_iova_ipa_start;
  3357. *size = priv->smmu_iova_ipa_len;
  3358. return 0;
  3359. }
  3360. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3361. char *name)
  3362. {
  3363. if (!priv)
  3364. return;
  3365. if (!priv->use_prefix_path) {
  3366. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3367. return;
  3368. }
  3369. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3370. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3371. ADRASTEA_PATH_PREFIX "%s", name);
  3372. else
  3373. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3374. QCA6750_PATH_PREFIX "%s", name);
  3375. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3376. }
  3377. static const struct platform_device_id icnss_platform_id_table[] = {
  3378. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3379. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3380. { },
  3381. };
  3382. static const struct of_device_id icnss_dt_match[] = {
  3383. {
  3384. .compatible = "qcom,wcn6750",
  3385. .data = (void *)&icnss_platform_id_table[0]},
  3386. {
  3387. .compatible = "qcom,icnss",
  3388. .data = (void *)&icnss_platform_id_table[1]},
  3389. { },
  3390. };
  3391. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3392. static void icnss_init_control_params(struct icnss_priv *priv)
  3393. {
  3394. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3395. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3396. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3397. if (priv->device_id == WCN6750_DEVICE_ID ||
  3398. of_property_read_bool(priv->pdev->dev.of_node,
  3399. "wpss-support-enable"))
  3400. priv->wpss_supported = true;
  3401. if (of_property_read_bool(priv->pdev->dev.of_node,
  3402. "bdf-download-support"))
  3403. priv->bdf_download_support = true;
  3404. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3405. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3406. }
  3407. static void icnss_read_device_configs(struct icnss_priv *priv)
  3408. {
  3409. if (of_property_read_bool(priv->pdev->dev.of_node,
  3410. "wlan-ipa-disabled")) {
  3411. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3412. }
  3413. }
  3414. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3415. {
  3416. pm_runtime_get_sync(&priv->pdev->dev);
  3417. pm_runtime_forbid(&priv->pdev->dev);
  3418. pm_runtime_set_active(&priv->pdev->dev);
  3419. pm_runtime_enable(&priv->pdev->dev);
  3420. }
  3421. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3422. {
  3423. pm_runtime_disable(&priv->pdev->dev);
  3424. pm_runtime_allow(&priv->pdev->dev);
  3425. pm_runtime_put_sync(&priv->pdev->dev);
  3426. }
  3427. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3428. {
  3429. return of_property_read_bool(priv->pdev->dev.of_node,
  3430. "use-nv-mac");
  3431. }
  3432. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3433. {
  3434. struct icnss_subsys_restart_level_data *restart_level_data;
  3435. icnss_pr_info("rproc name: %s recovery disable: %d",
  3436. rproc->name, rproc->recovery_disabled);
  3437. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3438. if (!restart_level_data)
  3439. return;
  3440. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3441. if (rproc->recovery_disabled)
  3442. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3443. else
  3444. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3445. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3446. 0, restart_level_data);
  3447. }
  3448. }
  3449. static int icnss_probe(struct platform_device *pdev)
  3450. {
  3451. int ret = 0;
  3452. struct device *dev = &pdev->dev;
  3453. struct icnss_priv *priv;
  3454. const struct of_device_id *of_id;
  3455. const struct platform_device_id *device_id;
  3456. if (dev_get_drvdata(dev)) {
  3457. icnss_pr_err("Driver is already initialized\n");
  3458. return -EEXIST;
  3459. }
  3460. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3461. if (!of_id || !of_id->data) {
  3462. icnss_pr_err("Failed to find of match device!\n");
  3463. ret = -ENODEV;
  3464. goto out_reset_drvdata;
  3465. }
  3466. device_id = of_id->data;
  3467. icnss_pr_dbg("Platform driver probe\n");
  3468. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3469. if (!priv)
  3470. return -ENOMEM;
  3471. priv->magic = ICNSS_MAGIC;
  3472. dev_set_drvdata(dev, priv);
  3473. priv->pdev = pdev;
  3474. priv->device_id = device_id->driver_data;
  3475. priv->is_chain1_supported = true;
  3476. INIT_LIST_HEAD(&priv->vreg_list);
  3477. INIT_LIST_HEAD(&priv->clk_list);
  3478. icnss_allow_recursive_recovery(dev);
  3479. icnss_init_control_params(priv);
  3480. icnss_read_device_configs(priv);
  3481. ret = icnss_resource_parse(priv);
  3482. if (ret)
  3483. goto out_reset_drvdata;
  3484. ret = icnss_msa_dt_parse(priv);
  3485. if (ret)
  3486. goto out_free_resources;
  3487. ret = icnss_smmu_dt_parse(priv);
  3488. if (ret)
  3489. goto out_free_resources;
  3490. spin_lock_init(&priv->event_lock);
  3491. spin_lock_init(&priv->on_off_lock);
  3492. spin_lock_init(&priv->soc_wake_msg_lock);
  3493. mutex_init(&priv->dev_lock);
  3494. mutex_init(&priv->tcdev_lock);
  3495. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3496. if (!priv->event_wq) {
  3497. icnss_pr_err("Workqueue creation failed\n");
  3498. ret = -EFAULT;
  3499. goto smmu_cleanup;
  3500. }
  3501. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3502. INIT_LIST_HEAD(&priv->event_list);
  3503. ret = icnss_register_fw_service(priv);
  3504. if (ret < 0) {
  3505. icnss_pr_err("fw service registration failed: %d\n", ret);
  3506. goto out_destroy_wq;
  3507. }
  3508. icnss_enable_recovery(priv);
  3509. icnss_debugfs_create(priv);
  3510. icnss_sysfs_create(priv);
  3511. ret = device_init_wakeup(&priv->pdev->dev, true);
  3512. if (ret)
  3513. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3514. ret);
  3515. icnss_set_plat_priv(priv);
  3516. init_completion(&priv->unblock_shutdown);
  3517. if (priv->device_id == WCN6750_DEVICE_ID) {
  3518. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3519. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3520. if (!priv->soc_wake_wq) {
  3521. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3522. ret = -EFAULT;
  3523. goto out_unregister_fw_service;
  3524. }
  3525. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3526. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3527. ret = icnss_genl_init();
  3528. if (ret < 0)
  3529. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3530. init_completion(&priv->smp2p_soc_wake_wait);
  3531. icnss_runtime_pm_init(priv);
  3532. icnss_aop_mbox_init(priv);
  3533. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3534. priv->bdf_download_support = true;
  3535. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3536. }
  3537. if (priv->wpss_supported) {
  3538. ret = icnss_dms_init(priv);
  3539. if (ret)
  3540. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3541. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3542. icnss_pr_dbg("NV MAC feature is %s\n",
  3543. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3544. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3545. }
  3546. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3547. icnss_pr_info("Platform driver probed successfully\n");
  3548. return 0;
  3549. out_unregister_fw_service:
  3550. icnss_unregister_fw_service(priv);
  3551. out_destroy_wq:
  3552. destroy_workqueue(priv->event_wq);
  3553. smmu_cleanup:
  3554. priv->iommu_domain = NULL;
  3555. out_free_resources:
  3556. icnss_put_resources(priv);
  3557. out_reset_drvdata:
  3558. dev_set_drvdata(dev, NULL);
  3559. return ret;
  3560. }
  3561. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3562. {
  3563. if (IS_ERR_OR_NULL(ramdump_info))
  3564. return;
  3565. device_unregister(ramdump_info->dev);
  3566. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3567. kfree(ramdump_info);
  3568. }
  3569. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3570. {
  3571. if (priv->batt_psy)
  3572. power_supply_put(penv->batt_psy);
  3573. if (priv->psf_supported) {
  3574. flush_workqueue(priv->soc_update_wq);
  3575. destroy_workqueue(priv->soc_update_wq);
  3576. power_supply_unreg_notifier(&priv->psf_nb);
  3577. }
  3578. }
  3579. static int icnss_remove(struct platform_device *pdev)
  3580. {
  3581. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3582. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3583. device_init_wakeup(&priv->pdev->dev, false);
  3584. icnss_debugfs_destroy(priv);
  3585. icnss_unregister_power_supply_notifier(penv);
  3586. icnss_sysfs_destroy(priv);
  3587. complete_all(&priv->unblock_shutdown);
  3588. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3589. if (priv->wpss_supported) {
  3590. icnss_dms_deinit(priv);
  3591. icnss_wpss_early_ssr_unregister_notifier(priv);
  3592. icnss_wpss_ssr_unregister_notifier(priv);
  3593. } else {
  3594. icnss_modem_ssr_unregister_notifier(priv);
  3595. icnss_pdr_unregister_notifier(priv);
  3596. }
  3597. if (priv->device_id == WCN6750_DEVICE_ID) {
  3598. icnss_genl_exit();
  3599. icnss_runtime_pm_deinit(priv);
  3600. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3601. mbox_free_channel(priv->mbox_chan);
  3602. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3603. complete_all(&priv->smp2p_soc_wake_wait);
  3604. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3605. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3606. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3607. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3608. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3609. if (priv->soc_wake_wq)
  3610. destroy_workqueue(priv->soc_wake_wq);
  3611. }
  3612. class_destroy(priv->icnss_ramdump_class);
  3613. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3614. icnss_unregister_fw_service(priv);
  3615. if (priv->event_wq)
  3616. destroy_workqueue(priv->event_wq);
  3617. priv->iommu_domain = NULL;
  3618. icnss_hw_power_off(priv);
  3619. icnss_put_resources(priv);
  3620. dev_set_drvdata(&pdev->dev, NULL);
  3621. return 0;
  3622. }
  3623. #ifdef CONFIG_PM_SLEEP
  3624. static int icnss_pm_suspend(struct device *dev)
  3625. {
  3626. struct icnss_priv *priv = dev_get_drvdata(dev);
  3627. int ret = 0;
  3628. if (priv->magic != ICNSS_MAGIC) {
  3629. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3630. dev, priv, priv->magic);
  3631. return -EINVAL;
  3632. }
  3633. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3634. if (!priv->ops || !priv->ops->pm_suspend ||
  3635. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3636. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3637. return 0;
  3638. ret = priv->ops->pm_suspend(dev);
  3639. if (ret == 0) {
  3640. if (priv->device_id == WCN6750_DEVICE_ID) {
  3641. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3642. !test_bit(ICNSS_MODE_ON, &priv->state))
  3643. return 0;
  3644. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3645. ICNSS_SMP2P_OUT_POWER_SAVE);
  3646. }
  3647. priv->stats.pm_suspend++;
  3648. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3649. } else {
  3650. priv->stats.pm_suspend_err++;
  3651. }
  3652. return ret;
  3653. }
  3654. static int icnss_pm_resume(struct device *dev)
  3655. {
  3656. struct icnss_priv *priv = dev_get_drvdata(dev);
  3657. int ret = 0;
  3658. if (priv->magic != ICNSS_MAGIC) {
  3659. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3660. dev, priv, priv->magic);
  3661. return -EINVAL;
  3662. }
  3663. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3664. if (!priv->ops || !priv->ops->pm_resume ||
  3665. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3666. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3667. goto out;
  3668. ret = priv->ops->pm_resume(dev);
  3669. out:
  3670. if (ret == 0) {
  3671. priv->stats.pm_resume++;
  3672. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3673. } else {
  3674. priv->stats.pm_resume_err++;
  3675. }
  3676. return ret;
  3677. }
  3678. static int icnss_pm_suspend_noirq(struct device *dev)
  3679. {
  3680. struct icnss_priv *priv = dev_get_drvdata(dev);
  3681. int ret = 0;
  3682. if (priv->magic != ICNSS_MAGIC) {
  3683. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3684. dev, priv, priv->magic);
  3685. return -EINVAL;
  3686. }
  3687. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3688. if (!priv->ops || !priv->ops->suspend_noirq ||
  3689. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3690. goto out;
  3691. ret = priv->ops->suspend_noirq(dev);
  3692. out:
  3693. if (ret == 0) {
  3694. priv->stats.pm_suspend_noirq++;
  3695. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3696. } else {
  3697. priv->stats.pm_suspend_noirq_err++;
  3698. }
  3699. return ret;
  3700. }
  3701. static int icnss_pm_resume_noirq(struct device *dev)
  3702. {
  3703. struct icnss_priv *priv = dev_get_drvdata(dev);
  3704. int ret = 0;
  3705. if (priv->magic != ICNSS_MAGIC) {
  3706. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3707. dev, priv, priv->magic);
  3708. return -EINVAL;
  3709. }
  3710. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3711. if (!priv->ops || !priv->ops->resume_noirq ||
  3712. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3713. goto out;
  3714. ret = priv->ops->resume_noirq(dev);
  3715. out:
  3716. if (ret == 0) {
  3717. priv->stats.pm_resume_noirq++;
  3718. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3719. } else {
  3720. priv->stats.pm_resume_noirq_err++;
  3721. }
  3722. return ret;
  3723. }
  3724. static int icnss_pm_runtime_suspend(struct device *dev)
  3725. {
  3726. struct icnss_priv *priv = dev_get_drvdata(dev);
  3727. int ret = 0;
  3728. if (priv->device_id != WCN6750_DEVICE_ID) {
  3729. icnss_pr_err("Ignore runtime suspend:\n");
  3730. goto out;
  3731. }
  3732. if (priv->magic != ICNSS_MAGIC) {
  3733. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3734. dev, priv, priv->magic);
  3735. return -EINVAL;
  3736. }
  3737. if (!priv->ops || !priv->ops->runtime_suspend ||
  3738. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3739. goto out;
  3740. icnss_pr_vdbg("Runtime suspend\n");
  3741. ret = priv->ops->runtime_suspend(dev);
  3742. if (!ret) {
  3743. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3744. !test_bit(ICNSS_MODE_ON, &priv->state))
  3745. return 0;
  3746. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3747. ICNSS_SMP2P_OUT_POWER_SAVE);
  3748. }
  3749. out:
  3750. return ret;
  3751. }
  3752. static int icnss_pm_runtime_resume(struct device *dev)
  3753. {
  3754. struct icnss_priv *priv = dev_get_drvdata(dev);
  3755. int ret = 0;
  3756. if (priv->device_id != WCN6750_DEVICE_ID) {
  3757. icnss_pr_err("Ignore runtime resume:\n");
  3758. goto out;
  3759. }
  3760. if (priv->magic != ICNSS_MAGIC) {
  3761. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3762. dev, priv, priv->magic);
  3763. return -EINVAL;
  3764. }
  3765. if (!priv->ops || !priv->ops->runtime_resume ||
  3766. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3767. goto out;
  3768. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3769. ret = priv->ops->runtime_resume(dev);
  3770. out:
  3771. return ret;
  3772. }
  3773. static int icnss_pm_runtime_idle(struct device *dev)
  3774. {
  3775. struct icnss_priv *priv = dev_get_drvdata(dev);
  3776. if (priv->device_id != WCN6750_DEVICE_ID) {
  3777. icnss_pr_err("Ignore runtime idle:\n");
  3778. goto out;
  3779. }
  3780. icnss_pr_vdbg("Runtime idle\n");
  3781. pm_request_autosuspend(dev);
  3782. out:
  3783. return -EBUSY;
  3784. }
  3785. #endif
  3786. static const struct dev_pm_ops icnss_pm_ops = {
  3787. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3788. icnss_pm_resume)
  3789. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3790. icnss_pm_resume_noirq)
  3791. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3792. icnss_pm_runtime_idle)
  3793. };
  3794. static struct platform_driver icnss_driver = {
  3795. .probe = icnss_probe,
  3796. .remove = icnss_remove,
  3797. .driver = {
  3798. .name = "icnss2",
  3799. .pm = &icnss_pm_ops,
  3800. .of_match_table = icnss_dt_match,
  3801. },
  3802. };
  3803. static int __init icnss_initialize(void)
  3804. {
  3805. icnss_debug_init();
  3806. return platform_driver_register(&icnss_driver);
  3807. }
  3808. static void __exit icnss_exit(void)
  3809. {
  3810. platform_driver_unregister(&icnss_driver);
  3811. icnss_debug_deinit();
  3812. }
  3813. module_init(icnss_initialize);
  3814. module_exit(icnss_exit);
  3815. MODULE_LICENSE("GPL v2");
  3816. MODULE_DESCRIPTION("iWCN CORE platform driver");