Added qcn6432 target header files based on E3R47 under qcn6432 to make fw-api project compatible to host. Change-Id: I3bdf6298281323f4f0fe75aed04db93cd698ee1f CRs-Fixed: 3463782
182 wiersze
6.4 KiB
C
182 wiersze
6.4 KiB
C
/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _RX_PPDU_ACK_REPORT_H_
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#define _RX_PPDU_ACK_REPORT_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "ack_report.h"
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#define NUM_OF_DWORDS_RX_PPDU_ACK_REPORT 2
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#define NUM_OF_QWORDS_RX_PPDU_ACK_REPORT 1
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struct rx_ppdu_ack_report {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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struct ack_report ack_report_details;
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uint32_t tlv64_padding : 32; // [31:0]
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#else
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struct ack_report ack_report_details;
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uint32_t tlv64_padding : 32; // [31:0]
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#endif
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};
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/* Description ACK_REPORT_DETAILS
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Info indicating why the received frame needed a SIFS response.
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*/
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/* Description SELFGEN_RESPONSE_REASON
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Field that indicates why the received frame needs a response
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in SIFS time. The possible responses are listed in order.
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<enum 0 CTS_frame>
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<enum 1 ACK_frame>
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<enum 2 BA_frame >
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<enum 3 Qboost_trigger> Qboost trigger received
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<enum 4 PSPOLL_trigger> PSPOLL trigger received
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<enum 5 UAPSD_trigger > Unscheduled APSD trigger received
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<enum 6 CBF_frame> the CBF frame needs to be send as
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a result of NDP or BRPOLL
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<enum 7 ax_su_trigger> 11ax trigger received for this
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device
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<enum 8 ax_wildcard_trigger> 11ax wildcardtrigger has
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been received
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<enum 9 ax_unassoc_wildcard_trigger> 11ax wildcard trigger
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for unassociated STAs has been received
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<enum 12 eht_su_trigger> EHT R1 trigger received for
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this device
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<enum 10 MU_UL_response_to_response>
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<enum 11 Ranging_NDP_LMR_frames> Ranging NDP + LMR need
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to be sent in response to ranging NDPA + NDP
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<legal 0-12>
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*/
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_OFFSET 0x0000000000000000
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_LSB 0
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_MSB 3
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SELFGEN_RESPONSE_REASON_MASK 0x000000000000000f
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/* Description AX_TRIGGER_TYPE
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Field Only valid when selfgen_response_reason is an 11ax
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related trigger
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The 11AX trigger type/ trigger number:
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It identifies which trigger was received.
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<enum 0 ax_trigger_basic>
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<enum 1 ax_trigger_brpoll>
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<enum 2 ax_trigger_mu_bar>
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<enum 3 ax_trigger_mu_rts>
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<enum 4 ax_trigger_buffer_size>
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<enum 5 ax_trigger_gcr_mu_bar>
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<enum 6 ax_trigger_BQRP>
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<enum 7 ax_trigger_NDP_fb_report_poll>
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<enum 8 ax_tb_ranging_trigger>
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<enum 9 ax_trigger_reserved_9>
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<enum 10 ax_trigger_reserved_10>
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<enum 11 ax_trigger_reserved_11>
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<enum 12 ax_trigger_reserved_12>
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<enum 13 ax_trigger_reserved_13>
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<enum 14 ax_trigger_reserved_14>
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<enum 15 ax_trigger_reserved_15>
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<legal all>
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*/
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_OFFSET 0x0000000000000000
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_LSB 4
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_MSB 7
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_AX_TRIGGER_TYPE_MASK 0x00000000000000f0
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/* Description SR_PPDU
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Field only valid with SRP Responder support
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Indicates if the received frame was sent using SRP as indicated
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by the 'SR PPDU' bit in the 'CAS Control' in the 'HE A-Control'
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in one of the MPDUs received
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<legal all>
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*/
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_OFFSET 0x0000000000000000
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_LSB 8
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_MSB 8
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_SR_PPDU_MASK 0x0000000000000100
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/* Description RESERVED
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<legal 0>
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*/
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_OFFSET 0x0000000000000000
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_LSB 9
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_MSB 15
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_RESERVED_MASK 0x000000000000fe00
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/* Description FRAME_CONTROL
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Field not valid when selfgen_response_reason is MU_UL_response_to_response
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For SU receptions:
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frame control field of the received frame
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In 11ah Mode of Operation, for non-NDP frames the BW information
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is extracted from Frame Control fields [11:8].
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Decode is as follows
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Bits[11] - Dynamic/Static
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Bits[10:8] - Channel BW
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*/
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_OFFSET 0x0000000000000000
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_LSB 16
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_MSB 31
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#define RX_PPDU_ACK_REPORT_ACK_REPORT_DETAILS_FRAME_CONTROL_MASK 0x00000000ffff0000
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/* Description TLV64_PADDING
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Automatic DWORD padding inserted while converting TLV32
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to TLV64 for 64 bit ARCH
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<legal 0>
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*/
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#define RX_PPDU_ACK_REPORT_TLV64_PADDING_OFFSET 0x0000000000000000
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#define RX_PPDU_ACK_REPORT_TLV64_PADDING_LSB 32
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#define RX_PPDU_ACK_REPORT_TLV64_PADDING_MSB 63
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#define RX_PPDU_ACK_REPORT_TLV64_PADDING_MASK 0xffffffff00000000
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#endif // RX_PPDU_ACK_REPORT
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