6753874b3d
This includes all the 11ax headers. Need to cleanup later. Change-Id: I2fce75077802c441999db2d3bb6d21e258f1973e CRs-Fixed: 2124274
725 sor
21 KiB
C
725 sor
21 KiB
C
/*
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* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _REO_DESTINATION_RING_H_
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#define _REO_DESTINATION_RING_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "buffer_addr_info.h"
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#include "rx_mpdu_desc_info.h"
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#include "rx_msdu_desc_info.h"
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// ################ START SUMMARY #################
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//
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// Dword Fields
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// 0-1 struct buffer_addr_info buf_or_link_desc_addr_info;
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// 2-3 struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
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// 4-5 struct rx_msdu_desc_info rx_msdu_desc_info_details;
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// 6 rx_reo_queue_desc_addr_31_0[31:0]
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// 7 rx_reo_queue_desc_addr_39_32[7:0], reo_dest_buffer_type[8], reo_push_reason[10:9], reo_error_code[15:11], receive_queue_number[31:16]
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// 8 soft_reorder_info_valid[0], reorder_opcode[4:1], reorder_slot_index[12:5], reserved_8a[31:13]
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// 9 reserved_9a[31:0]
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// 10 reserved_10a[31:0]
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// 11 reserved_11a[31:0]
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// 12 reserved_12a[31:0]
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// 13 reserved_13a[31:0]
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// 14 reserved_14a[31:0]
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// 15 reserved_15[19:0], ring_id[27:20], looping_count[31:28]
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//
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// ################ END SUMMARY #################
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#define NUM_OF_DWORDS_REO_DESTINATION_RING 16
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struct reo_destination_ring {
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struct buffer_addr_info buf_or_link_desc_addr_info;
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struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
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struct rx_msdu_desc_info rx_msdu_desc_info_details;
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uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0]
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uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0]
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reo_dest_buffer_type : 1, //[8]
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reo_push_reason : 2, //[10:9]
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reo_error_code : 5, //[15:11]
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receive_queue_number : 16; //[31:16]
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uint32_t soft_reorder_info_valid : 1, //[0]
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reorder_opcode : 4, //[4:1]
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reorder_slot_index : 8, //[12:5]
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reserved_8a : 19; //[31:13]
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uint32_t reserved_9a : 32; //[31:0]
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uint32_t reserved_10a : 32; //[31:0]
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uint32_t reserved_11a : 32; //[31:0]
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uint32_t reserved_12a : 32; //[31:0]
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uint32_t reserved_13a : 32; //[31:0]
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uint32_t reserved_14a : 32; //[31:0]
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uint32_t reserved_15 : 20, //[19:0]
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ring_id : 8, //[27:20]
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looping_count : 4; //[31:28]
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};
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/*
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struct buffer_addr_info buf_or_link_desc_addr_info
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Consumer: REO/SW/FW
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Producer: RXDMA
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Details of the physical address of the a buffer or MSDU
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link descriptor
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struct rx_mpdu_desc_info rx_mpdu_desc_info_details
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Consumer: REO/SW/FW
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Producer: RXDMA
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General information related to the MPDU that is passed
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on from REO entrance ring to the REO destination ring
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struct rx_msdu_desc_info rx_msdu_desc_info_details
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General information related to the MSDU that is passed
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on from RXDMA all the way to to the REO destination ring.
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rx_reo_queue_desc_addr_31_0
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Consumer: REO
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Producer: RXDMA
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Address (lower 32 bits) of the REO queue descriptor.
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<legal all>
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rx_reo_queue_desc_addr_39_32
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Consumer: REO
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Producer: RXDMA
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Address (upper 8 bits) of the REO queue descriptor.
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<legal all>
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reo_dest_buffer_type
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Indicates the type of address provided in the
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'Buf_or_link_desc_addr_info'
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<enum 0 MSDU_buf_address> The address of an MSDU buffer
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<enum 1 MSDU_link_desc_address> The address of the MSDU
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link descriptor.
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<legal all>
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reo_push_reason
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Indicates why REO pushed the frame to this exit ring
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<enum 0 reo_error_detected> Reo detected an error an
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pushed this frame to this queue
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<enum 1 reo_routing_instruction> Reo pushed the frame to
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this queue per received routing instructions. No error
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within REO was detected
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<legal 0 - 1>
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reo_error_code
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Field only valid when 'Reo_push_reason' set to
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'reo_error_detected'.
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<enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
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provided in the REO_ENTRANCE ring is set to 0
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<enum 1 reo_queue_desc_not_valid> Reo queue descriptor
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valid bit is NOT set
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<enum 2 ampdu_in_non_ba> AMPDU frame received without BA
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session having been setup.
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<enum 3 non_ba_duplicate> Non-BA session, SN equal to
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SSN, Retry bit set: duplicate frame
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<enum 4 ba_duplicate> BA session, duplicate frame
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<enum 5 regular_frame_2k_jump> A normal (management/data
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frame) received with 2K jump in SN
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<enum 6 bar_frame_2k_jump> A bar received with 2K jump
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in SSN
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<enum 7 regular_frame_OOR> A normal (management/data
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frame) received with SN falling within the OOR window
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<enum 8 bar_frame_OOR> A bar received with SSN falling
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within the OOR window
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<enum 9 bar_frame_no_ba_session> A bar received without
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a BA session
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<enum 10 bar_frame_sn_equals_ssn> A bar received with
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SSN equal to SN
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<enum 11 pn_check_failed> PN Check Failed packet.
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<enum 12 2k_error_handling_flag_set> Frame is forwarded
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as a result of the 'Seq_2k_error_detected_flag' been set in
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the REO Queue descriptor
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<enum 13 pn_error_handling_flag_set> Frame is forwarded
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as a result of the 'pn_error_detected_flag' been set in the
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REO Queue descriptor
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<enum 14 queue_descriptor_blocked_set> Frame is
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forwarded as a result of the queue descriptor(address) being
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blocked as SW/FW seems to be currently in the process of
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making updates to this descriptor...
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<legal 0-14>
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receive_queue_number
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This field indicates the REO MPDU reorder queue ID from
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which this frame originated. This field is populated from a
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field with the same name in the RX_REO_QUEUE descriptor.
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<legal all>
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soft_reorder_info_valid
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When set, REO has been instructed to not perform the
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actual re-ordering of frames for this queue, but just to
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insert the reorder opcodes
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<legal all>
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reorder_opcode
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Field is valid when 'Soft_reorder_info_valid' is set.
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This field is always valid for debug purpose as well.
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Details are in the MLD.
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<enum 0 invalid>
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<enum 1 fwdcur_fwdbuf>
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<enum 2 fwdbuf_fwdcur>
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<enum 3 qcur>
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<enum 4 fwdbuf_qcur>
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<enum 5 fwdbuf_drop>
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<enum 6 fwdall_drop>
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<enum 7 fwdall_qcur>
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<enum 8 reserved_reo_opcode_1>
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<enum 9 dropcur> the error reason code is in
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reo_error_code field.
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<enum 10 reserved_reo_opcode_2>
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<enum 11 reserved_reo_opcode_3>
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<enum 12 reserved_reo_opcode_4>
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<enum 13 reserved_reo_opcode_5>
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<enum 14 reserved_reo_opcode_6>
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<enum 15 reserved_reo_opcode_7>
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<legal all>
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reorder_slot_index
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Field only valid when 'Soft_reorder_info_valid' is set.
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TODO: add description
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<legal all>
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reserved_8a
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<legal 0>
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reserved_9a
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<legal 0>
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reserved_10a
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<legal 0>
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reserved_11a
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<legal 0>
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reserved_12a
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<legal 0>
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reserved_13a
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<legal 0>
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reserved_14a
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<legal 0>
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reserved_15
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<legal 0>
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ring_id
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The buffer pointer ring ID.
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0 refers to the IDLE ring
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1 - N refers to other rings
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Helps with debugging when dumping ring contents.
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<legal all>
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looping_count
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A count value that indicates the number of times the
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producer of entries into this Ring has looped around the
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ring.
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At initialization time, this value is set to 0. On the
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first loop, this value is set to 1. After the max value is
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reached allowed by the number of bits for this field, the
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count value continues with 0 again.
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In case SW is the consumer of the ring entries, it can
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use this field to figure out up to where the producer of
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entries has created new entries. This eliminates the need to
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check where the head pointer' of the ring is located once
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the SW starts processing an interrupt indicating that new
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entries have been put into this ring...
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Also note that SW if it wants only needs to look at the
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LSB bit of this count value.
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<legal all>
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*/
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#define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_OFFSET 0x00000000
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#define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_LSB 28
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#define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_MASK 0xffffffff
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#define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_OFFSET 0x00000004
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#define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_LSB 28
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#define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_MASK 0xffffffff
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#define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET 0x00000008
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#define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_LSB 28
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#define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_MASK 0xffffffff
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#define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET 0x0000000c
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#define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_LSB 28
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#define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_MASK 0xffffffff
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#define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET 0x00000010
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#define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_LSB 28
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#define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_MASK 0xffffffff
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#define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET 0x00000014
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#define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_LSB 28
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#define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_MASK 0xffffffff
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/* Description REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0
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Consumer: REO
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Producer: RXDMA
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Address (lower 32 bits) of the REO queue descriptor.
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<legal all>
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*/
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#define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000018
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#define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0
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#define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff
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/* Description REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32
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Consumer: REO
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Producer: RXDMA
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Address (upper 8 bits) of the REO queue descriptor.
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<legal all>
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*/
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#define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x0000001c
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#define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
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#define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff
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/* Description REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE
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Indicates the type of address provided in the
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'Buf_or_link_desc_addr_info'
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<enum 0 MSDU_buf_address> The address of an MSDU buffer
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<enum 1 MSDU_link_desc_address> The address of the MSDU
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link descriptor.
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<legal all>
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*/
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#define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET 0x0000001c
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#define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB 8
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#define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK 0x00000100
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/* Description REO_DESTINATION_RING_7_REO_PUSH_REASON
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Indicates why REO pushed the frame to this exit ring
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<enum 0 reo_error_detected> Reo detected an error an
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pushed this frame to this queue
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<enum 1 reo_routing_instruction> Reo pushed the frame to
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this queue per received routing instructions. No error
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within REO was detected
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<legal 0 - 1>
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*/
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#define REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET 0x0000001c
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#define REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB 9
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#define REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK 0x00000600
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/* Description REO_DESTINATION_RING_7_REO_ERROR_CODE
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Field only valid when 'Reo_push_reason' set to
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'reo_error_detected'.
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<enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
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provided in the REO_ENTRANCE ring is set to 0
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<enum 1 reo_queue_desc_not_valid> Reo queue descriptor
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valid bit is NOT set
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<enum 2 ampdu_in_non_ba> AMPDU frame received without BA
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session having been setup.
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<enum 3 non_ba_duplicate> Non-BA session, SN equal to
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SSN, Retry bit set: duplicate frame
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<enum 4 ba_duplicate> BA session, duplicate frame
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<enum 5 regular_frame_2k_jump> A normal (management/data
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frame) received with 2K jump in SN
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<enum 6 bar_frame_2k_jump> A bar received with 2K jump
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in SSN
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<enum 7 regular_frame_OOR> A normal (management/data
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frame) received with SN falling within the OOR window
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<enum 8 bar_frame_OOR> A bar received with SSN falling
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within the OOR window
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<enum 9 bar_frame_no_ba_session> A bar received without
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a BA session
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<enum 10 bar_frame_sn_equals_ssn> A bar received with
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SSN equal to SN
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<enum 11 pn_check_failed> PN Check Failed packet.
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<enum 12 2k_error_handling_flag_set> Frame is forwarded
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as a result of the 'Seq_2k_error_detected_flag' been set in
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the REO Queue descriptor
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<enum 13 pn_error_handling_flag_set> Frame is forwarded
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as a result of the 'pn_error_detected_flag' been set in the
|
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REO Queue descriptor
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<enum 14 queue_descriptor_blocked_set> Frame is
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forwarded as a result of the queue descriptor(address) being
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blocked as SW/FW seems to be currently in the process of
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making updates to this descriptor...
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<legal 0-14>
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*/
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#define REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET 0x0000001c
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#define REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB 11
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#define REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK 0x0000f800
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/* Description REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER
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This field indicates the REO MPDU reorder queue ID from
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which this frame originated. This field is populated from a
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field with the same name in the RX_REO_QUEUE descriptor.
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<legal all>
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*/
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#define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000001c
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#define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB 16
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#define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK 0xffff0000
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/* Description REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID
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When set, REO has been instructed to not perform the
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actual re-ordering of frames for this queue, but just to
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insert the reorder opcodes
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<legal all>
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*/
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#define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_OFFSET 0x00000020
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#define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_LSB 0
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#define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_MASK 0x00000001
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/* Description REO_DESTINATION_RING_8_REORDER_OPCODE
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Field is valid when 'Soft_reorder_info_valid' is set.
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This field is always valid for debug purpose as well.
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Details are in the MLD.
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<enum 0 invalid>
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<enum 1 fwdcur_fwdbuf>
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<enum 2 fwdbuf_fwdcur>
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<enum 3 qcur>
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<enum 4 fwdbuf_qcur>
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<enum 5 fwdbuf_drop>
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<enum 6 fwdall_drop>
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<enum 7 fwdall_qcur>
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<enum 8 reserved_reo_opcode_1>
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<enum 9 dropcur> the error reason code is in
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reo_error_code field.
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<enum 10 reserved_reo_opcode_2>
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<enum 11 reserved_reo_opcode_3>
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<enum 12 reserved_reo_opcode_4>
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<enum 13 reserved_reo_opcode_5>
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<enum 14 reserved_reo_opcode_6>
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<enum 15 reserved_reo_opcode_7>
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<legal all>
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*/
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#define REO_DESTINATION_RING_8_REORDER_OPCODE_OFFSET 0x00000020
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#define REO_DESTINATION_RING_8_REORDER_OPCODE_LSB 1
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#define REO_DESTINATION_RING_8_REORDER_OPCODE_MASK 0x0000001e
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/* Description REO_DESTINATION_RING_8_REORDER_SLOT_INDEX
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Field only valid when 'Soft_reorder_info_valid' is set.
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TODO: add description
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<legal all>
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*/
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#define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_OFFSET 0x00000020
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#define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_LSB 5
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#define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_MASK 0x00001fe0
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/* Description REO_DESTINATION_RING_8_RESERVED_8A
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<legal 0>
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*/
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#define REO_DESTINATION_RING_8_RESERVED_8A_OFFSET 0x00000020
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#define REO_DESTINATION_RING_8_RESERVED_8A_LSB 13
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#define REO_DESTINATION_RING_8_RESERVED_8A_MASK 0xffffe000
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/* Description REO_DESTINATION_RING_9_RESERVED_9A
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<legal 0>
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*/
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#define REO_DESTINATION_RING_9_RESERVED_9A_OFFSET 0x00000024
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#define REO_DESTINATION_RING_9_RESERVED_9A_LSB 0
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#define REO_DESTINATION_RING_9_RESERVED_9A_MASK 0xffffffff
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/* Description REO_DESTINATION_RING_10_RESERVED_10A
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<legal 0>
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*/
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#define REO_DESTINATION_RING_10_RESERVED_10A_OFFSET 0x00000028
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#define REO_DESTINATION_RING_10_RESERVED_10A_LSB 0
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#define REO_DESTINATION_RING_10_RESERVED_10A_MASK 0xffffffff
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/* Description REO_DESTINATION_RING_11_RESERVED_11A
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<legal 0>
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*/
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#define REO_DESTINATION_RING_11_RESERVED_11A_OFFSET 0x0000002c
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#define REO_DESTINATION_RING_11_RESERVED_11A_LSB 0
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#define REO_DESTINATION_RING_11_RESERVED_11A_MASK 0xffffffff
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/* Description REO_DESTINATION_RING_12_RESERVED_12A
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<legal 0>
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*/
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#define REO_DESTINATION_RING_12_RESERVED_12A_OFFSET 0x00000030
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#define REO_DESTINATION_RING_12_RESERVED_12A_LSB 0
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#define REO_DESTINATION_RING_12_RESERVED_12A_MASK 0xffffffff
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/* Description REO_DESTINATION_RING_13_RESERVED_13A
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<legal 0>
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*/
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#define REO_DESTINATION_RING_13_RESERVED_13A_OFFSET 0x00000034
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#define REO_DESTINATION_RING_13_RESERVED_13A_LSB 0
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#define REO_DESTINATION_RING_13_RESERVED_13A_MASK 0xffffffff
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/* Description REO_DESTINATION_RING_14_RESERVED_14A
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<legal 0>
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*/
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#define REO_DESTINATION_RING_14_RESERVED_14A_OFFSET 0x00000038
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#define REO_DESTINATION_RING_14_RESERVED_14A_LSB 0
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#define REO_DESTINATION_RING_14_RESERVED_14A_MASK 0xffffffff
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/* Description REO_DESTINATION_RING_15_RESERVED_15
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<legal 0>
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*/
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#define REO_DESTINATION_RING_15_RESERVED_15_OFFSET 0x0000003c
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#define REO_DESTINATION_RING_15_RESERVED_15_LSB 0
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#define REO_DESTINATION_RING_15_RESERVED_15_MASK 0x000fffff
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/* Description REO_DESTINATION_RING_15_RING_ID
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The buffer pointer ring ID.
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0 refers to the IDLE ring
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1 - N refers to other rings
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Helps with debugging when dumping ring contents.
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<legal all>
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*/
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#define REO_DESTINATION_RING_15_RING_ID_OFFSET 0x0000003c
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#define REO_DESTINATION_RING_15_RING_ID_LSB 20
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#define REO_DESTINATION_RING_15_RING_ID_MASK 0x0ff00000
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/* Description REO_DESTINATION_RING_15_LOOPING_COUNT
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A count value that indicates the number of times the
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producer of entries into this Ring has looped around the
|
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ring.
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At initialization time, this value is set to 0. On the
|
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first loop, this value is set to 1. After the max value is
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reached allowed by the number of bits for this field, the
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count value continues with 0 again.
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In case SW is the consumer of the ring entries, it can
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use this field to figure out up to where the producer of
|
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entries has created new entries. This eliminates the need to
|
|
check where the head pointer' of the ring is located once
|
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the SW starts processing an interrupt indicating that new
|
|
entries have been put into this ring...
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Also note that SW if it wants only needs to look at the
|
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LSB bit of this count value.
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<legal all>
|
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*/
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#define REO_DESTINATION_RING_15_LOOPING_COUNT_OFFSET 0x0000003c
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#define REO_DESTINATION_RING_15_LOOPING_COUNT_LSB 28
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#define REO_DESTINATION_RING_15_LOOPING_COUNT_MASK 0xf0000000
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#endif // _REO_DESTINATION_RING_H_
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