3e42fefa2f
AQT1000 codec is a hifi headset that supports audio playback and recording on headset. It also supports playback of fractional sampling rates. Audio playback and recording is transferred through I2S interface. Add driver for AQT1000 codec Change-Id: Iba163e9203d67216cdbf87727b06801356a001e3 Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
116 خطوط
2.6 KiB
C
116 خطوط
2.6 KiB
C
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _AQT1000_CLSH_H
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#define _AQT1000_CLSH_H
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <sound/soc.h>
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#include <linux/kernel.h>
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#define CLSH_REQ_ENABLE true
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#define CLSH_REQ_DISABLE false
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#define AQT_CLSH_EVENT_PRE_DAC 0x01
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#define AQT_CLSH_EVENT_POST_PA 0x02
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/*
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* Basic states for Class H state machine.
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* represented as a bit mask within a u8 data type
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* bit 0: HPH Left mode
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* bit 1: HPH Right mode
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*/
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#define AQT_CLSH_STATE_IDLE 0x00
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#define AQT_CLSH_STATE_HPHL (0x01 << 0)
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#define AQT_CLSH_STATE_HPHR (0x01 << 1)
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/*
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* Though number of CLSH states are 2, max state shoulbe be 3
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* because state array index starts from 1.
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*/
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#define AQT_CLSH_STATE_MAX 3
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#define NUM_CLSH_STATES (0x01 << AQT_CLSH_STATE_MAX)
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/* Derived State: Bits 1 and 2 should be set for Headphone stereo */
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#define AQT_CLSH_STATE_HPH_ST (AQT_CLSH_STATE_HPHL | \
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AQT_CLSH_STATE_HPHR)
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enum {
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CLS_H_NORMAL = 0, /* Class-H Default */
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CLS_H_HIFI, /* Class-H HiFi */
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CLS_H_LP, /* Class-H Low Power */
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CLS_AB, /* Class-AB Low HIFI*/
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CLS_H_LOHIFI, /* LoHIFI */
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CLS_H_ULP, /* Ultra Low power */
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CLS_AB_HIFI, /* Class-AB */
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CLS_NONE, /* None of the above modes */
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};
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enum {
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DAC_GAIN_0DB = 0,
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DAC_GAIN_0P2DB,
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DAC_GAIN_0P4DB,
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DAC_GAIN_0P6DB,
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DAC_GAIN_0P8DB,
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DAC_GAIN_M0P2DB,
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DAC_GAIN_M0P4DB,
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DAC_GAIN_M0P6DB,
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};
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enum {
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VREF_FILT_R_0OHM = 0,
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VREF_FILT_R_25KOHM,
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VREF_FILT_R_50KOHM,
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VREF_FILT_R_100KOHM,
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};
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enum {
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DELTA_I_0MA,
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DELTA_I_10MA,
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DELTA_I_20MA,
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DELTA_I_30MA,
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DELTA_I_40MA,
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DELTA_I_50MA,
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};
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struct aqt_imped_val {
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u32 imped_val;
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u8 index;
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};
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struct aqt_clsh_cdc_data {
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u8 state;
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int flyback_users;
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int buck_users;
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int clsh_users;
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int interpolator_modes[AQT_CLSH_STATE_MAX];
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};
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struct aqt_reg_mask_val {
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u16 reg;
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u8 mask;
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u8 val;
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};
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extern void aqt_clsh_fsm(struct snd_soc_codec *codec,
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struct aqt_clsh_cdc_data *cdc_clsh_d,
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u8 clsh_event, u8 req_state,
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int int_mode);
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extern void aqt_clsh_init(struct aqt_clsh_cdc_data *clsh);
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extern int aqt_clsh_get_clsh_state(struct aqt_clsh_cdc_data *clsh);
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extern void aqt_clsh_imped_config(struct snd_soc_codec *codec, int imped,
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bool reset);
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#endif /* _AQT1000_CLSH_H */
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