dsi_panel.c 117 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  34. {
  35. char *bp;
  36. bp = buf;
  37. /* First 7 bytes are cmd header */
  38. *bp++ = 0x0A;
  39. *bp++ = 1;
  40. *bp++ = 0;
  41. *bp++ = 0;
  42. *bp++ = pps_delay_ms;
  43. *bp++ = 0;
  44. *bp++ = 128;
  45. }
  46. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  47. char *buf, int pps_id, u32 size)
  48. {
  49. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  50. buf += DSI_CMD_PPS_HDR_SIZE;
  51. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  52. size);
  53. }
  54. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  55. char *buf, int pps_id, u32 size)
  56. {
  57. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  58. buf += DSI_CMD_PPS_HDR_SIZE;
  59. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  60. size);
  61. }
  62. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  63. {
  64. int rc = 0;
  65. int i;
  66. struct regulator *vreg = NULL;
  67. for (i = 0; i < panel->power_info.count; i++) {
  68. vreg = devm_regulator_get(panel->parent,
  69. panel->power_info.vregs[i].vreg_name);
  70. rc = PTR_ERR_OR_ZERO(vreg);
  71. if (rc) {
  72. DSI_ERR("failed to get %s regulator\n",
  73. panel->power_info.vregs[i].vreg_name);
  74. goto error_put;
  75. }
  76. panel->power_info.vregs[i].vreg = vreg;
  77. }
  78. return rc;
  79. error_put:
  80. for (i = i - 1; i >= 0; i--) {
  81. devm_regulator_put(panel->power_info.vregs[i].vreg);
  82. panel->power_info.vregs[i].vreg = NULL;
  83. }
  84. return rc;
  85. }
  86. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  87. {
  88. int rc = 0;
  89. int i;
  90. for (i = panel->power_info.count - 1; i >= 0; i--)
  91. devm_regulator_put(panel->power_info.vregs[i].vreg);
  92. return rc;
  93. }
  94. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  95. {
  96. int rc = 0;
  97. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  98. if (gpio_is_valid(r_config->reset_gpio)) {
  99. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  100. if (rc) {
  101. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  102. goto error;
  103. }
  104. }
  105. if (gpio_is_valid(r_config->disp_en_gpio)) {
  106. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  107. if (rc) {
  108. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  109. goto error_release_reset;
  110. }
  111. }
  112. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  113. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  114. if (rc) {
  115. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  116. goto error_release_disp_en;
  117. }
  118. }
  119. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  120. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  121. if (rc) {
  122. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  123. goto error_release_mode_sel;
  124. }
  125. }
  126. if (gpio_is_valid(panel->panel_test_gpio)) {
  127. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  128. if (rc) {
  129. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  130. rc);
  131. panel->panel_test_gpio = -1;
  132. rc = 0;
  133. }
  134. }
  135. goto error;
  136. error_release_mode_sel:
  137. if (gpio_is_valid(panel->bl_config.en_gpio))
  138. gpio_free(panel->bl_config.en_gpio);
  139. error_release_disp_en:
  140. if (gpio_is_valid(r_config->disp_en_gpio))
  141. gpio_free(r_config->disp_en_gpio);
  142. error_release_reset:
  143. if (gpio_is_valid(r_config->reset_gpio))
  144. gpio_free(r_config->reset_gpio);
  145. error:
  146. return rc;
  147. }
  148. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  149. {
  150. int rc = 0;
  151. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  152. if (gpio_is_valid(r_config->reset_gpio))
  153. gpio_free(r_config->reset_gpio);
  154. if (gpio_is_valid(r_config->disp_en_gpio))
  155. gpio_free(r_config->disp_en_gpio);
  156. if (gpio_is_valid(panel->bl_config.en_gpio))
  157. gpio_free(panel->bl_config.en_gpio);
  158. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  159. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  160. if (gpio_is_valid(panel->panel_test_gpio))
  161. gpio_free(panel->panel_test_gpio);
  162. return rc;
  163. }
  164. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel, bool trusted_vm_env)
  165. {
  166. if (!panel) {
  167. DSI_ERR("Invalid panel param\n");
  168. return -EINVAL;
  169. }
  170. /* toggle reset-gpio by writing directly to register in trusted-vm */
  171. if (trusted_vm_env) {
  172. struct dsi_tlmm_gpio *gpio = NULL;
  173. void __iomem *io;
  174. u32 offset = 0x4;
  175. int i;
  176. for (i = 0; i < panel->tlmm_gpio_count; i++)
  177. if (!strcmp(panel->tlmm_gpio[i].name, "reset-gpio"))
  178. gpio = &panel->tlmm_gpio[i];
  179. if (!gpio) {
  180. DSI_ERR("reset gpio not found\n");
  181. return -EINVAL;
  182. }
  183. io = ioremap(gpio->addr, gpio->size);
  184. writel_relaxed(0, io + offset);
  185. iounmap(io);
  186. } else {
  187. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  188. if (!r_config) {
  189. DSI_ERR("Invalid panel reset configuration\n");
  190. return -EINVAL;
  191. }
  192. if (!gpio_is_valid(r_config->reset_gpio)) {
  193. DSI_ERR("failed to pull down gpio\n");
  194. return -EINVAL;
  195. }
  196. gpio_set_value(r_config->reset_gpio, 0);
  197. }
  198. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  199. DSI_INFO("GPIO pulled low to simulate ESD\n");
  200. return 0;
  201. }
  202. static int dsi_panel_reset(struct dsi_panel *panel)
  203. {
  204. int rc = 0;
  205. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  206. int i;
  207. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  208. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  209. if (rc) {
  210. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  211. goto exit;
  212. }
  213. }
  214. if (r_config->count) {
  215. rc = gpio_direction_output(r_config->reset_gpio,
  216. r_config->sequence[0].level);
  217. if (rc) {
  218. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  219. goto exit;
  220. }
  221. }
  222. for (i = 0; i < r_config->count; i++) {
  223. gpio_set_value(r_config->reset_gpio,
  224. r_config->sequence[i].level);
  225. if (r_config->sequence[i].sleep_ms)
  226. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  227. (r_config->sequence[i].sleep_ms * 1000) + 100);
  228. }
  229. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  230. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  231. if (rc)
  232. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  233. }
  234. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  235. bool out = true;
  236. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  237. || (panel->reset_config.mode_sel_state
  238. == MODE_GPIO_LOW))
  239. out = false;
  240. else if ((panel->reset_config.mode_sel_state
  241. == MODE_SEL_SINGLE_PORT) ||
  242. (panel->reset_config.mode_sel_state
  243. == MODE_GPIO_HIGH))
  244. out = true;
  245. rc = gpio_direction_output(
  246. panel->reset_config.lcd_mode_sel_gpio, out);
  247. if (rc)
  248. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  249. }
  250. if (gpio_is_valid(panel->panel_test_gpio)) {
  251. rc = gpio_direction_input(panel->panel_test_gpio);
  252. if (rc)
  253. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  254. rc);
  255. }
  256. exit:
  257. return rc;
  258. }
  259. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  260. {
  261. int rc = 0;
  262. struct pinctrl_state *state;
  263. if (panel->host_config.ext_bridge_mode)
  264. return 0;
  265. if (!panel->pinctrl.pinctrl)
  266. return 0;
  267. if (enable)
  268. state = panel->pinctrl.active;
  269. else
  270. state = panel->pinctrl.suspend;
  271. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  272. if (rc)
  273. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  274. panel->name, rc);
  275. return rc;
  276. }
  277. static int dsi_panel_power_on(struct dsi_panel *panel)
  278. {
  279. int rc = 0;
  280. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  281. if (rc) {
  282. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  283. panel->name, rc);
  284. goto exit;
  285. }
  286. rc = dsi_panel_set_pinctrl_state(panel, true);
  287. if (rc) {
  288. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  289. goto error_disable_vregs;
  290. }
  291. rc = dsi_panel_reset(panel);
  292. if (rc) {
  293. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  294. goto error_disable_gpio;
  295. }
  296. goto exit;
  297. error_disable_gpio:
  298. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  299. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  300. if (gpio_is_valid(panel->bl_config.en_gpio))
  301. gpio_set_value(panel->bl_config.en_gpio, 0);
  302. (void)dsi_panel_set_pinctrl_state(panel, false);
  303. error_disable_vregs:
  304. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  305. exit:
  306. return rc;
  307. }
  308. static int dsi_panel_power_off(struct dsi_panel *panel)
  309. {
  310. int rc = 0;
  311. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  312. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  313. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  314. !panel->reset_gpio_always_on)
  315. gpio_set_value(panel->reset_config.reset_gpio, 0);
  316. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  317. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  318. if (gpio_is_valid(panel->panel_test_gpio)) {
  319. rc = gpio_direction_input(panel->panel_test_gpio);
  320. if (rc)
  321. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  322. rc);
  323. }
  324. rc = dsi_panel_set_pinctrl_state(panel, false);
  325. if (rc) {
  326. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  327. rc);
  328. }
  329. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  330. if (rc)
  331. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  332. panel->name, rc);
  333. return rc;
  334. }
  335. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  336. enum dsi_cmd_set_type type)
  337. {
  338. int rc = 0, i = 0;
  339. ssize_t len;
  340. struct dsi_cmd_desc *cmds;
  341. u32 count;
  342. enum dsi_cmd_set_state state;
  343. struct dsi_display_mode *mode;
  344. if (!panel || !panel->cur_mode)
  345. return -EINVAL;
  346. mode = panel->cur_mode;
  347. cmds = mode->priv_info->cmd_sets[type].cmds;
  348. count = mode->priv_info->cmd_sets[type].count;
  349. state = mode->priv_info->cmd_sets[type].state;
  350. SDE_EVT32(type, state, count);
  351. if (count == 0) {
  352. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  353. panel->name, type);
  354. goto error;
  355. }
  356. for (i = 0; i < count; i++) {
  357. if (state == DSI_CMD_SET_STATE_LP)
  358. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  359. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  360. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  361. len = dsi_host_transfer_sub(panel->host, cmds);
  362. if (len < 0) {
  363. rc = len;
  364. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  365. goto error;
  366. }
  367. if (cmds->post_wait_ms)
  368. usleep_range(cmds->post_wait_ms*1000,
  369. ((cmds->post_wait_ms*1000)+10));
  370. cmds++;
  371. }
  372. error:
  373. return rc;
  374. }
  375. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  376. {
  377. int rc = 0;
  378. if (panel->host_config.ext_bridge_mode)
  379. return 0;
  380. devm_pinctrl_put(panel->pinctrl.pinctrl);
  381. return rc;
  382. }
  383. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  384. {
  385. int rc = 0;
  386. if (panel->host_config.ext_bridge_mode)
  387. return 0;
  388. /* TODO: pinctrl is defined in dsi dt node */
  389. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  390. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  391. rc = PTR_ERR(panel->pinctrl.pinctrl);
  392. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  393. goto error;
  394. }
  395. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  396. "panel_active");
  397. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  398. rc = PTR_ERR(panel->pinctrl.active);
  399. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  400. goto error;
  401. }
  402. panel->pinctrl.suspend =
  403. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  404. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  405. rc = PTR_ERR(panel->pinctrl.suspend);
  406. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  407. goto error;
  408. }
  409. panel->pinctrl.pwm_pin =
  410. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  411. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  412. panel->pinctrl.pwm_pin = NULL;
  413. DSI_DEBUG("failed to get pinctrl pwm_pin");
  414. }
  415. error:
  416. return rc;
  417. }
  418. static int dsi_panel_wled_register(struct dsi_panel *panel,
  419. struct dsi_backlight_config *bl)
  420. {
  421. struct backlight_device *bd;
  422. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  423. if (!bd) {
  424. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  425. panel->name, -EPROBE_DEFER);
  426. return -EPROBE_DEFER;
  427. }
  428. bl->raw_bd = bd;
  429. return 0;
  430. }
  431. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  432. u32 bl_lvl)
  433. {
  434. int rc = 0;
  435. unsigned long mode_flags = 0;
  436. struct mipi_dsi_device *dsi = NULL;
  437. if (!panel || (bl_lvl > 0xffff)) {
  438. DSI_ERR("invalid params\n");
  439. return -EINVAL;
  440. }
  441. dsi = &panel->mipi_device;
  442. if (unlikely(panel->bl_config.lp_mode)) {
  443. mode_flags = dsi->mode_flags;
  444. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  445. }
  446. if (panel->bl_config.bl_inverted_dbv)
  447. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  448. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  449. if (rc < 0)
  450. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  451. if (unlikely(panel->bl_config.lp_mode))
  452. dsi->mode_flags = mode_flags;
  453. return rc;
  454. }
  455. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  456. u32 bl_lvl)
  457. {
  458. int rc = 0;
  459. u32 duty = 0;
  460. u32 period_ns = 0;
  461. struct dsi_backlight_config *bl;
  462. if (!panel) {
  463. DSI_ERR("Invalid Params\n");
  464. return -EINVAL;
  465. }
  466. bl = &panel->bl_config;
  467. if (!bl->pwm_bl) {
  468. DSI_ERR("pwm device not found\n");
  469. return -EINVAL;
  470. }
  471. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  472. duty = bl_lvl * period_ns;
  473. duty /= bl->bl_max_level;
  474. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  475. if (rc) {
  476. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  477. rc);
  478. goto error;
  479. }
  480. if (bl_lvl == 0 && bl->pwm_enabled) {
  481. pwm_disable(bl->pwm_bl);
  482. bl->pwm_enabled = false;
  483. return 0;
  484. }
  485. if (bl_lvl != 0 && !bl->pwm_enabled) {
  486. rc = pwm_enable(bl->pwm_bl);
  487. if (rc) {
  488. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  489. rc);
  490. goto error;
  491. }
  492. bl->pwm_enabled = true;
  493. }
  494. error:
  495. return rc;
  496. }
  497. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  498. {
  499. int rc = 0;
  500. struct dsi_backlight_config *bl = &panel->bl_config;
  501. if (panel->host_config.ext_bridge_mode)
  502. return 0;
  503. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  504. switch (bl->type) {
  505. case DSI_BACKLIGHT_WLED:
  506. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  507. break;
  508. case DSI_BACKLIGHT_DCS:
  509. rc = dsi_panel_update_backlight(panel, bl_lvl);
  510. break;
  511. case DSI_BACKLIGHT_EXTERNAL:
  512. break;
  513. case DSI_BACKLIGHT_PWM:
  514. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  515. break;
  516. default:
  517. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  518. rc = -ENOTSUPP;
  519. }
  520. return rc;
  521. }
  522. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  523. {
  524. u32 cur_bl_level;
  525. struct backlight_device *bd = bl->raw_bd;
  526. /* default the brightness level to 50% */
  527. cur_bl_level = bl->bl_max_level >> 1;
  528. switch (bl->type) {
  529. case DSI_BACKLIGHT_WLED:
  530. /* Try to query the backlight level from the backlight device */
  531. if (bd->ops && bd->ops->get_brightness)
  532. cur_bl_level = bd->ops->get_brightness(bd);
  533. break;
  534. case DSI_BACKLIGHT_DCS:
  535. case DSI_BACKLIGHT_EXTERNAL:
  536. case DSI_BACKLIGHT_PWM:
  537. default:
  538. /*
  539. * Ideally, we should read the backlight level from the
  540. * panel. For now, just set it default value.
  541. */
  542. break;
  543. }
  544. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  545. return cur_bl_level;
  546. }
  547. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  548. {
  549. struct dsi_backlight_config *bl = &panel->bl_config;
  550. bl->bl_level = dsi_panel_get_brightness(bl);
  551. }
  552. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  553. {
  554. int rc = 0;
  555. struct dsi_backlight_config *bl = &panel->bl_config;
  556. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  557. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  558. rc = PTR_ERR(bl->pwm_bl);
  559. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  560. rc);
  561. return rc;
  562. }
  563. if (panel->pinctrl.pwm_pin) {
  564. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  565. panel->pinctrl.pwm_pin);
  566. if (rc)
  567. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  568. panel->name, rc);
  569. }
  570. return 0;
  571. }
  572. static int dsi_panel_bl_register(struct dsi_panel *panel)
  573. {
  574. int rc = 0;
  575. struct dsi_backlight_config *bl = &panel->bl_config;
  576. if (panel->host_config.ext_bridge_mode)
  577. return 0;
  578. switch (bl->type) {
  579. case DSI_BACKLIGHT_WLED:
  580. rc = dsi_panel_wled_register(panel, bl);
  581. break;
  582. case DSI_BACKLIGHT_DCS:
  583. break;
  584. case DSI_BACKLIGHT_EXTERNAL:
  585. break;
  586. case DSI_BACKLIGHT_PWM:
  587. rc = dsi_panel_pwm_register(panel);
  588. break;
  589. default:
  590. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  591. rc = -ENOTSUPP;
  592. goto error;
  593. }
  594. error:
  595. return rc;
  596. }
  597. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  598. {
  599. struct dsi_backlight_config *bl = &panel->bl_config;
  600. devm_pwm_put(panel->parent, bl->pwm_bl);
  601. }
  602. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  603. {
  604. int rc = 0;
  605. struct dsi_backlight_config *bl = &panel->bl_config;
  606. if (panel->host_config.ext_bridge_mode)
  607. return 0;
  608. switch (bl->type) {
  609. case DSI_BACKLIGHT_WLED:
  610. break;
  611. case DSI_BACKLIGHT_DCS:
  612. break;
  613. case DSI_BACKLIGHT_EXTERNAL:
  614. break;
  615. case DSI_BACKLIGHT_PWM:
  616. dsi_panel_pwm_unregister(panel);
  617. break;
  618. default:
  619. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  620. rc = -ENOTSUPP;
  621. goto error;
  622. }
  623. error:
  624. return rc;
  625. }
  626. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  627. struct dsi_parser_utils *utils)
  628. {
  629. int rc = 0;
  630. u64 tmp64 = 0;
  631. struct dsi_display_mode *display_mode;
  632. struct dsi_display_mode_priv_info *priv_info;
  633. display_mode = container_of(mode, struct dsi_display_mode, timing);
  634. priv_info = display_mode->priv_info;
  635. rc = utils->read_u64(utils->data,
  636. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  637. if (rc == -EOVERFLOW) {
  638. tmp64 = 0;
  639. rc = utils->read_u32(utils->data,
  640. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  641. }
  642. mode->clk_rate_hz = !rc ? tmp64 : 0;
  643. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  644. mode->pclk_scale.numer = 1;
  645. mode->pclk_scale.denom = 1;
  646. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  647. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  648. &mode->mdp_transfer_time_us);
  649. if (!rc)
  650. display_mode->priv_info->mdp_transfer_time_us =
  651. mode->mdp_transfer_time_us;
  652. else
  653. display_mode->priv_info->mdp_transfer_time_us = 0;
  654. rc = utils->read_u32(utils->data,
  655. "qcom,mdss-dsi-panel-framerate",
  656. &mode->refresh_rate);
  657. if (rc) {
  658. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  659. rc);
  660. goto error;
  661. }
  662. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  663. &mode->h_active);
  664. if (rc) {
  665. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  666. rc);
  667. goto error;
  668. }
  669. rc = utils->read_u32(utils->data,
  670. "qcom,mdss-dsi-h-front-porch",
  671. &mode->h_front_porch);
  672. if (rc) {
  673. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  674. rc);
  675. goto error;
  676. }
  677. rc = utils->read_u32(utils->data,
  678. "qcom,mdss-dsi-h-back-porch",
  679. &mode->h_back_porch);
  680. if (rc) {
  681. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  682. rc);
  683. goto error;
  684. }
  685. rc = utils->read_u32(utils->data,
  686. "qcom,mdss-dsi-h-pulse-width",
  687. &mode->h_sync_width);
  688. if (rc) {
  689. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  690. rc);
  691. goto error;
  692. }
  693. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  694. &mode->h_skew);
  695. if (rc)
  696. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  697. rc);
  698. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  699. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  700. mode->h_sync_width);
  701. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  702. &mode->v_active);
  703. if (rc) {
  704. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  705. rc);
  706. goto error;
  707. }
  708. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  709. &mode->v_back_porch);
  710. if (rc) {
  711. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  712. rc);
  713. goto error;
  714. }
  715. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  716. &mode->v_front_porch);
  717. if (rc) {
  718. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  719. rc);
  720. goto error;
  721. }
  722. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  723. &mode->v_sync_width);
  724. if (rc) {
  725. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  726. rc);
  727. goto error;
  728. }
  729. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  730. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  731. mode->v_sync_width);
  732. error:
  733. return rc;
  734. }
  735. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  736. struct dsi_parser_utils *utils,
  737. const char *name)
  738. {
  739. int rc = 0;
  740. u32 bpp = 0;
  741. enum dsi_pixel_format fmt;
  742. const char *packing;
  743. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  744. if (rc) {
  745. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  746. name, rc);
  747. return rc;
  748. }
  749. host->bpp = bpp;
  750. switch (bpp) {
  751. case 3:
  752. fmt = DSI_PIXEL_FORMAT_RGB111;
  753. break;
  754. case 8:
  755. fmt = DSI_PIXEL_FORMAT_RGB332;
  756. break;
  757. case 12:
  758. fmt = DSI_PIXEL_FORMAT_RGB444;
  759. break;
  760. case 16:
  761. fmt = DSI_PIXEL_FORMAT_RGB565;
  762. break;
  763. case 18:
  764. fmt = DSI_PIXEL_FORMAT_RGB666;
  765. break;
  766. case 24:
  767. default:
  768. fmt = DSI_PIXEL_FORMAT_RGB888;
  769. break;
  770. }
  771. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  772. packing = utils->get_property(utils->data,
  773. "qcom,mdss-dsi-pixel-packing",
  774. NULL);
  775. if (packing && !strcmp(packing, "loose"))
  776. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  777. }
  778. host->dst_format = fmt;
  779. return rc;
  780. }
  781. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  782. struct dsi_parser_utils *utils,
  783. const char *name)
  784. {
  785. int rc = 0;
  786. bool lane_enabled;
  787. u32 num_of_lanes = 0;
  788. lane_enabled = utils->read_bool(utils->data,
  789. "qcom,mdss-dsi-lane-0-state");
  790. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  791. lane_enabled = utils->read_bool(utils->data,
  792. "qcom,mdss-dsi-lane-1-state");
  793. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  794. lane_enabled = utils->read_bool(utils->data,
  795. "qcom,mdss-dsi-lane-2-state");
  796. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  797. lane_enabled = utils->read_bool(utils->data,
  798. "qcom,mdss-dsi-lane-3-state");
  799. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  800. if (host->data_lanes & DSI_DATA_LANE_0)
  801. num_of_lanes++;
  802. if (host->data_lanes & DSI_DATA_LANE_1)
  803. num_of_lanes++;
  804. if (host->data_lanes & DSI_DATA_LANE_2)
  805. num_of_lanes++;
  806. if (host->data_lanes & DSI_DATA_LANE_3)
  807. num_of_lanes++;
  808. host->num_data_lanes = num_of_lanes;
  809. if (host->data_lanes == 0) {
  810. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  811. rc = -EINVAL;
  812. }
  813. return rc;
  814. }
  815. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  816. struct dsi_parser_utils *utils,
  817. const char *name)
  818. {
  819. int rc = 0;
  820. const char *swap_mode;
  821. swap_mode = utils->get_property(utils->data,
  822. "qcom,mdss-dsi-color-order", NULL);
  823. if (swap_mode) {
  824. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  825. host->swap_mode = DSI_COLOR_SWAP_RGB;
  826. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  827. host->swap_mode = DSI_COLOR_SWAP_RBG;
  828. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  829. host->swap_mode = DSI_COLOR_SWAP_BRG;
  830. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  831. host->swap_mode = DSI_COLOR_SWAP_GRB;
  832. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  833. host->swap_mode = DSI_COLOR_SWAP_GBR;
  834. } else {
  835. DSI_ERR("[%s] Unrecognized color order-%s\n",
  836. name, swap_mode);
  837. rc = -EINVAL;
  838. }
  839. } else {
  840. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  841. host->swap_mode = DSI_COLOR_SWAP_RGB;
  842. }
  843. /* bit swap on color channel is not defined in dt */
  844. host->bit_swap_red = false;
  845. host->bit_swap_green = false;
  846. host->bit_swap_blue = false;
  847. return rc;
  848. }
  849. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  850. struct dsi_parser_utils *utils,
  851. const char *name)
  852. {
  853. const char *trig;
  854. int rc = 0;
  855. trig = utils->get_property(utils->data,
  856. "qcom,mdss-dsi-mdp-trigger", NULL);
  857. if (trig) {
  858. if (!strcmp(trig, "none")) {
  859. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  860. } else if (!strcmp(trig, "trigger_te")) {
  861. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  862. } else if (!strcmp(trig, "trigger_sw")) {
  863. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  864. } else if (!strcmp(trig, "trigger_sw_te")) {
  865. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  866. } else {
  867. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  868. name, trig);
  869. rc = -EINVAL;
  870. }
  871. } else {
  872. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  873. name);
  874. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  875. }
  876. trig = utils->get_property(utils->data,
  877. "qcom,mdss-dsi-dma-trigger", NULL);
  878. if (trig) {
  879. if (!strcmp(trig, "none")) {
  880. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  881. } else if (!strcmp(trig, "trigger_te")) {
  882. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  883. } else if (!strcmp(trig, "trigger_sw")) {
  884. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  885. } else if (!strcmp(trig, "trigger_sw_seof")) {
  886. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  887. } else if (!strcmp(trig, "trigger_sw_te")) {
  888. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  889. } else {
  890. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  891. name, trig);
  892. rc = -EINVAL;
  893. }
  894. } else {
  895. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  896. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  897. }
  898. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  899. &host->te_mode);
  900. if (rc) {
  901. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  902. host->te_mode = 1;
  903. rc = 0;
  904. }
  905. return rc;
  906. }
  907. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  908. struct dsi_parser_utils *utils,
  909. const char *name)
  910. {
  911. u32 val = 0, line_no = 0, window = 0;
  912. int rc = 0;
  913. bool panel_cphy_mode = false;
  914. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  915. if (!rc) {
  916. host->t_clk_post = val;
  917. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  918. }
  919. val = 0;
  920. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  921. if (!rc) {
  922. host->t_clk_pre = val;
  923. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  924. }
  925. host->ignore_rx_eot = utils->read_bool(utils->data,
  926. "qcom,mdss-dsi-rx-eot-ignore");
  927. host->append_tx_eot = utils->read_bool(utils->data,
  928. "qcom,mdss-dsi-tx-eot-append");
  929. host->ext_bridge_mode = utils->read_bool(utils->data,
  930. "qcom,mdss-dsi-ext-bridge-mode");
  931. host->force_hs_clk_lane = utils->read_bool(utils->data,
  932. "qcom,mdss-dsi-force-clock-lane-hs");
  933. panel_cphy_mode = utils->read_bool(utils->data,
  934. "qcom,panel-cphy-mode");
  935. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  936. : DSI_PHY_TYPE_DPHY;
  937. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  938. &line_no);
  939. if (rc)
  940. host->dma_sched_line = 0;
  941. else
  942. host->dma_sched_line = line_no;
  943. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  944. &window);
  945. if (rc)
  946. host->dma_sched_window = 0;
  947. else
  948. host->dma_sched_window = window;
  949. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  950. host->dma_sched_line, host->dma_sched_window);
  951. return 0;
  952. }
  953. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  954. struct dsi_parser_utils *utils,
  955. const char *name)
  956. {
  957. int rc = 0;
  958. u32 val = 0;
  959. bool supported = false;
  960. struct dsi_split_link_config *split_link = &host->split_link;
  961. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  962. if (!supported) {
  963. DSI_DEBUG("[%s] Split link is not supported\n", name);
  964. split_link->split_link_enabled = false;
  965. return;
  966. }
  967. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  968. if (rc || val < 1) {
  969. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  970. split_link->num_sublinks = 2;
  971. } else {
  972. split_link->num_sublinks = val;
  973. }
  974. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  975. if (rc || val < 1) {
  976. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  977. split_link->lanes_per_sublink = 2;
  978. } else {
  979. split_link->lanes_per_sublink = val;
  980. }
  981. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  982. split_link->num_sublinks, split_link->lanes_per_sublink);
  983. split_link->split_link_enabled = true;
  984. }
  985. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  986. {
  987. int rc = 0;
  988. struct dsi_parser_utils *utils = &panel->utils;
  989. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  990. panel->name);
  991. if (rc) {
  992. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  993. panel->name, rc);
  994. goto error;
  995. }
  996. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  997. panel->name);
  998. if (rc) {
  999. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1000. panel->name, rc);
  1001. goto error;
  1002. }
  1003. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1004. panel->name);
  1005. if (rc) {
  1006. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1007. panel->name, rc);
  1008. goto error;
  1009. }
  1010. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1011. panel->name);
  1012. if (rc) {
  1013. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1014. panel->name, rc);
  1015. goto error;
  1016. }
  1017. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1018. panel->name);
  1019. if (rc) {
  1020. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1021. panel->name, rc);
  1022. goto error;
  1023. }
  1024. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1025. panel->name);
  1026. error:
  1027. return rc;
  1028. }
  1029. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1030. struct device_node *of_node)
  1031. {
  1032. int rc = 0;
  1033. u32 val = 0, i;
  1034. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1035. struct dsi_parser_utils *utils = &panel->utils;
  1036. const char *name = panel->name;
  1037. /**
  1038. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1039. * video mode when there is only one qsync min fps present.
  1040. */
  1041. rc = of_property_read_u32(of_node,
  1042. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1043. &val);
  1044. if (rc)
  1045. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1046. panel->name, rc);
  1047. qsync_caps->qsync_min_fps = val;
  1048. /**
  1049. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1050. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1051. * is defined.
  1052. */
  1053. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1054. "qcom,dsi-supported-qsync-min-fps-list");
  1055. if (qsync_caps->qsync_min_fps_list_len < 1)
  1056. goto qsync_support;
  1057. /**
  1058. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1059. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1060. */
  1061. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1062. qsync_caps->qsync_min_fps) {
  1063. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1064. name);
  1065. rc = -EINVAL;
  1066. goto error;
  1067. }
  1068. if (panel->dfps_caps.dfps_list_len !=
  1069. qsync_caps->qsync_min_fps_list_len) {
  1070. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1071. rc = -EINVAL;
  1072. goto error;
  1073. }
  1074. qsync_caps->qsync_min_fps_list =
  1075. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1076. GFP_KERNEL);
  1077. if (!qsync_caps->qsync_min_fps_list) {
  1078. rc = -ENOMEM;
  1079. goto error;
  1080. }
  1081. rc = utils->read_u32_array(utils->data,
  1082. "qcom,dsi-supported-qsync-min-fps-list",
  1083. qsync_caps->qsync_min_fps_list,
  1084. qsync_caps->qsync_min_fps_list_len);
  1085. if (rc) {
  1086. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1087. rc = -EINVAL;
  1088. goto error;
  1089. }
  1090. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1091. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1092. if (qsync_caps->qsync_min_fps_list[i] <
  1093. qsync_caps->qsync_min_fps)
  1094. qsync_caps->qsync_min_fps =
  1095. qsync_caps->qsync_min_fps_list[i];
  1096. }
  1097. qsync_support:
  1098. /* allow qsync support only if DFPS is with VFP approach */
  1099. if ((panel->dfps_caps.dfps_support) &&
  1100. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  1101. panel->qsync_caps.qsync_min_fps = 0;
  1102. error:
  1103. if (rc < 0) {
  1104. qsync_caps->qsync_min_fps = 0;
  1105. qsync_caps->qsync_min_fps_list_len = 0;
  1106. }
  1107. return rc;
  1108. }
  1109. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1110. {
  1111. int rc = 0;
  1112. bool supported = false;
  1113. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1114. struct dsi_parser_utils *utils = &panel->utils;
  1115. const char *name = panel->name;
  1116. const char *type;
  1117. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1118. if (!supported) {
  1119. dyn_clk_caps->dyn_clk_support = false;
  1120. return rc;
  1121. }
  1122. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1123. "qcom,dsi-dyn-clk-list");
  1124. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1125. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1126. return -EINVAL;
  1127. }
  1128. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1129. sizeof(u32), GFP_KERNEL);
  1130. if (!dyn_clk_caps->bit_clk_list)
  1131. return -ENOMEM;
  1132. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1133. dyn_clk_caps->bit_clk_list,
  1134. dyn_clk_caps->bit_clk_list_len);
  1135. if (rc) {
  1136. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1137. return -EINVAL;
  1138. }
  1139. dyn_clk_caps->dyn_clk_support = true;
  1140. type = utils->get_property(utils->data,
  1141. "qcom,dsi-dyn-clk-type", NULL);
  1142. if (!type) {
  1143. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1144. dyn_clk_caps->maintain_const_fps = false;
  1145. return 0;
  1146. }
  1147. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1148. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1149. dyn_clk_caps->maintain_const_fps = true;
  1150. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1151. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1152. dyn_clk_caps->maintain_const_fps = true;
  1153. } else {
  1154. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1155. dyn_clk_caps->maintain_const_fps = false;
  1156. }
  1157. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1158. return 0;
  1159. }
  1160. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1161. {
  1162. int rc = 0;
  1163. bool supported = false;
  1164. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1165. struct dsi_parser_utils *utils = &panel->utils;
  1166. const char *name = panel->name;
  1167. const char *type;
  1168. u32 i;
  1169. supported = utils->read_bool(utils->data,
  1170. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1171. if (!supported) {
  1172. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1173. dfps_caps->dfps_support = false;
  1174. return rc;
  1175. }
  1176. type = utils->get_property(utils->data,
  1177. "qcom,mdss-dsi-pan-fps-update", NULL);
  1178. if (!type) {
  1179. DSI_ERR("[%s] dfps type not defined\n", name);
  1180. rc = -EINVAL;
  1181. goto error;
  1182. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1183. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1184. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1185. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1186. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1187. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1188. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1189. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1190. } else {
  1191. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1192. rc = -EINVAL;
  1193. goto error;
  1194. }
  1195. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1196. "qcom,dsi-supported-dfps-list");
  1197. if (dfps_caps->dfps_list_len < 1) {
  1198. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1199. rc = -EINVAL;
  1200. goto error;
  1201. }
  1202. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1203. GFP_KERNEL);
  1204. if (!dfps_caps->dfps_list) {
  1205. rc = -ENOMEM;
  1206. goto error;
  1207. }
  1208. rc = utils->read_u32_array(utils->data,
  1209. "qcom,dsi-supported-dfps-list",
  1210. dfps_caps->dfps_list,
  1211. dfps_caps->dfps_list_len);
  1212. if (rc) {
  1213. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1214. rc = -EINVAL;
  1215. goto error;
  1216. }
  1217. dfps_caps->dfps_support = true;
  1218. /* calculate max and min fps */
  1219. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1220. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1221. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1222. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1223. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1224. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1225. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1226. }
  1227. error:
  1228. return rc;
  1229. }
  1230. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1231. struct dsi_parser_utils *utils,
  1232. const char *name)
  1233. {
  1234. int rc = 0;
  1235. const char *traffic_mode;
  1236. u32 vc_id = 0;
  1237. u32 val = 0;
  1238. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1239. if (rc) {
  1240. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1241. cfg->pulse_mode_hsa_he = false;
  1242. } else if (val == 1) {
  1243. cfg->pulse_mode_hsa_he = true;
  1244. } else if (val == 0) {
  1245. cfg->pulse_mode_hsa_he = false;
  1246. } else {
  1247. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1248. name);
  1249. rc = -EINVAL;
  1250. goto error;
  1251. }
  1252. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1253. "qcom,mdss-dsi-hfp-power-mode");
  1254. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1255. "qcom,mdss-dsi-hbp-power-mode");
  1256. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1257. "qcom,mdss-dsi-hsa-power-mode");
  1258. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1259. "qcom,mdss-dsi-last-line-interleave");
  1260. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1261. "qcom,mdss-dsi-bllp-eof-power-mode");
  1262. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1263. "qcom,mdss-dsi-bllp-power-mode");
  1264. traffic_mode = utils->get_property(utils->data,
  1265. "qcom,mdss-dsi-traffic-mode",
  1266. NULL);
  1267. if (!traffic_mode) {
  1268. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1269. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1270. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1271. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1272. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1273. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1274. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1275. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1276. } else {
  1277. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1278. traffic_mode);
  1279. rc = -EINVAL;
  1280. goto error;
  1281. }
  1282. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1283. &vc_id);
  1284. if (rc) {
  1285. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1286. cfg->vc_id = 0;
  1287. } else {
  1288. cfg->vc_id = vc_id;
  1289. }
  1290. error:
  1291. return rc;
  1292. }
  1293. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1294. struct dsi_parser_utils *utils,
  1295. const char *name)
  1296. {
  1297. u32 val = 0;
  1298. int rc = 0;
  1299. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1300. if (rc) {
  1301. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1302. cfg->wr_mem_start = 0x2C;
  1303. } else {
  1304. cfg->wr_mem_start = val;
  1305. }
  1306. val = 0;
  1307. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1308. &val);
  1309. if (rc) {
  1310. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1311. cfg->wr_mem_continue = 0x3C;
  1312. } else {
  1313. cfg->wr_mem_continue = val;
  1314. }
  1315. /* TODO: fix following */
  1316. cfg->max_cmd_packets_interleave = 0;
  1317. val = 0;
  1318. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1319. &val);
  1320. if (rc) {
  1321. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1322. cfg->insert_dcs_command = true;
  1323. } else if (val == 1) {
  1324. cfg->insert_dcs_command = true;
  1325. } else if (val == 0) {
  1326. cfg->insert_dcs_command = false;
  1327. } else {
  1328. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1329. name);
  1330. rc = -EINVAL;
  1331. goto error;
  1332. }
  1333. error:
  1334. return rc;
  1335. }
  1336. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1337. {
  1338. int rc = 0;
  1339. struct dsi_parser_utils *utils = &panel->utils;
  1340. bool panel_mode_switch_enabled;
  1341. enum dsi_op_mode panel_mode;
  1342. const char *mode;
  1343. mode = utils->get_property(utils->data,
  1344. "qcom,mdss-dsi-panel-type", NULL);
  1345. if (!mode) {
  1346. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1347. panel_mode = DSI_OP_VIDEO_MODE;
  1348. } else if (!strcmp(mode, "dsi_video_mode")) {
  1349. panel_mode = DSI_OP_VIDEO_MODE;
  1350. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1351. panel_mode = DSI_OP_CMD_MODE;
  1352. } else {
  1353. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1354. rc = -EINVAL;
  1355. goto error;
  1356. }
  1357. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1358. "qcom,mdss-dsi-panel-mode-switch");
  1359. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1360. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1361. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1362. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1363. utils,
  1364. panel->name);
  1365. if (rc) {
  1366. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1367. panel->name, rc);
  1368. goto error;
  1369. }
  1370. }
  1371. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1372. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1373. utils,
  1374. panel->name);
  1375. if (rc) {
  1376. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1377. panel->name, rc);
  1378. goto error;
  1379. }
  1380. }
  1381. panel->poms_align_vsync = utils->read_bool(utils->data,
  1382. "qcom,poms-align-panel-vsync");
  1383. panel->panel_mode = panel_mode;
  1384. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1385. error:
  1386. return rc;
  1387. }
  1388. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1389. {
  1390. int rc = 0;
  1391. u32 val = 0;
  1392. const char *str;
  1393. struct dsi_panel_phy_props *props = &panel->phy_props;
  1394. struct dsi_parser_utils *utils = &panel->utils;
  1395. const char *name = panel->name;
  1396. rc = utils->read_u32(utils->data,
  1397. "qcom,mdss-pan-physical-width-dimension", &val);
  1398. if (rc) {
  1399. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1400. props->panel_width_mm = 0;
  1401. rc = 0;
  1402. } else {
  1403. props->panel_width_mm = val;
  1404. }
  1405. rc = utils->read_u32(utils->data,
  1406. "qcom,mdss-pan-physical-height-dimension",
  1407. &val);
  1408. if (rc) {
  1409. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1410. props->panel_height_mm = 0;
  1411. rc = 0;
  1412. } else {
  1413. props->panel_height_mm = val;
  1414. }
  1415. str = utils->get_property(utils->data,
  1416. "qcom,mdss-dsi-panel-orientation", NULL);
  1417. if (!str) {
  1418. props->rotation = DSI_PANEL_ROTATE_NONE;
  1419. } else if (!strcmp(str, "180")) {
  1420. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1421. } else if (!strcmp(str, "hflip")) {
  1422. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1423. } else if (!strcmp(str, "vflip")) {
  1424. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1425. } else {
  1426. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1427. rc = -EINVAL;
  1428. goto error;
  1429. }
  1430. error:
  1431. return rc;
  1432. }
  1433. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1434. "qcom,mdss-dsi-pre-on-command",
  1435. "qcom,mdss-dsi-on-command",
  1436. "qcom,vid-on-commands",
  1437. "qcom,cmd-on-commands",
  1438. "qcom,mdss-dsi-post-panel-on-command",
  1439. "qcom,mdss-dsi-pre-off-command",
  1440. "qcom,mdss-dsi-off-command",
  1441. "qcom,mdss-dsi-post-off-command",
  1442. "qcom,mdss-dsi-pre-res-switch",
  1443. "qcom,mdss-dsi-res-switch",
  1444. "qcom,mdss-dsi-post-res-switch",
  1445. "qcom,video-mode-switch-in-commands",
  1446. "qcom,video-mode-switch-out-commands",
  1447. "qcom,cmd-mode-switch-in-commands",
  1448. "qcom,cmd-mode-switch-out-commands",
  1449. "qcom,mdss-dsi-panel-status-command",
  1450. "qcom,mdss-dsi-lp1-command",
  1451. "qcom,mdss-dsi-lp2-command",
  1452. "qcom,mdss-dsi-nolp-command",
  1453. "PPS not parsed from DTSI, generated dynamically",
  1454. "ROI not parsed from DTSI, generated dynamically",
  1455. "qcom,mdss-dsi-timing-switch-command",
  1456. "qcom,mdss-dsi-post-mode-switch-on-command",
  1457. "qcom,mdss-dsi-qsync-on-commands",
  1458. "qcom,mdss-dsi-qsync-off-commands",
  1459. };
  1460. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1461. "qcom,mdss-dsi-pre-on-command-state",
  1462. "qcom,mdss-dsi-on-command-state",
  1463. "qcom,vid-on-commands-state",
  1464. "qcom,cmd-on-commands-state",
  1465. "qcom,mdss-dsi-post-on-command-state",
  1466. "qcom,mdss-dsi-pre-off-command-state",
  1467. "qcom,mdss-dsi-off-command-state",
  1468. "qcom,mdss-dsi-post-off-command-state",
  1469. "qcom,mdss-dsi-pre-res-switch-state",
  1470. "qcom,mdss-dsi-res-switch-state",
  1471. "qcom,mdss-dsi-post-res-switch-state",
  1472. "qcom,video-mode-switch-in-commands-state",
  1473. "qcom,video-mode-switch-out-commands-state",
  1474. "qcom,cmd-mode-switch-in-commands-state",
  1475. "qcom,cmd-mode-switch-out-commands-state",
  1476. "qcom,mdss-dsi-panel-status-command-state",
  1477. "qcom,mdss-dsi-lp1-command-state",
  1478. "qcom,mdss-dsi-lp2-command-state",
  1479. "qcom,mdss-dsi-nolp-command-state",
  1480. "PPS not parsed from DTSI, generated dynamically",
  1481. "ROI not parsed from DTSI, generated dynamically",
  1482. "qcom,mdss-dsi-timing-switch-command-state",
  1483. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1484. "qcom,mdss-dsi-qsync-on-commands-state",
  1485. "qcom,mdss-dsi-qsync-off-commands-state",
  1486. };
  1487. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1488. {
  1489. const u32 cmd_set_min_size = 7;
  1490. u32 count = 0;
  1491. u32 packet_length;
  1492. u32 tmp;
  1493. while (length >= cmd_set_min_size) {
  1494. packet_length = cmd_set_min_size;
  1495. tmp = ((data[5] << 8) | (data[6]));
  1496. packet_length += tmp;
  1497. if (packet_length > length) {
  1498. DSI_ERR("format error\n");
  1499. return -EINVAL;
  1500. }
  1501. length -= packet_length;
  1502. data += packet_length;
  1503. count++;
  1504. }
  1505. *cnt = count;
  1506. return 0;
  1507. }
  1508. int dsi_panel_create_cmd_packets(const char *data,
  1509. u32 length,
  1510. u32 count,
  1511. struct dsi_cmd_desc *cmd)
  1512. {
  1513. int rc = 0;
  1514. int i, j;
  1515. u8 *payload;
  1516. for (i = 0; i < count; i++) {
  1517. u32 size;
  1518. cmd[i].msg.type = data[0];
  1519. cmd[i].msg.channel = data[2];
  1520. cmd[i].msg.flags |= data[3];
  1521. cmd[i].ctrl = 0;
  1522. cmd[i].post_wait_ms = data[4];
  1523. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1524. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1525. cmd[i].last_command = false;
  1526. else
  1527. cmd[i].last_command = true;
  1528. size = cmd[i].msg.tx_len * sizeof(u8);
  1529. payload = kzalloc(size, GFP_KERNEL);
  1530. if (!payload) {
  1531. rc = -ENOMEM;
  1532. goto error_free_payloads;
  1533. }
  1534. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1535. payload[j] = data[7 + j];
  1536. cmd[i].msg.tx_buf = payload;
  1537. data += (7 + cmd[i].msg.tx_len);
  1538. }
  1539. return rc;
  1540. error_free_payloads:
  1541. for (i = i - 1; i >= 0; i--) {
  1542. cmd--;
  1543. kfree(cmd->msg.tx_buf);
  1544. }
  1545. return rc;
  1546. }
  1547. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1548. {
  1549. u32 i = 0;
  1550. struct dsi_cmd_desc *cmd;
  1551. for (i = 0; i < set->count; i++) {
  1552. cmd = &set->cmds[i];
  1553. kfree(cmd->msg.tx_buf);
  1554. }
  1555. }
  1556. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1557. {
  1558. kfree(set->cmds);
  1559. }
  1560. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1561. u32 packet_count)
  1562. {
  1563. u32 size;
  1564. size = packet_count * sizeof(*cmd->cmds);
  1565. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1566. if (!cmd->cmds)
  1567. return -ENOMEM;
  1568. cmd->count = packet_count;
  1569. return 0;
  1570. }
  1571. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1572. enum dsi_cmd_set_type type,
  1573. struct dsi_parser_utils *utils)
  1574. {
  1575. int rc = 0;
  1576. u32 length = 0;
  1577. const char *data;
  1578. const char *state;
  1579. u32 packet_count = 0;
  1580. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1581. &length);
  1582. if (!data) {
  1583. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1584. rc = -ENOTSUPP;
  1585. goto error;
  1586. }
  1587. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1588. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1589. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1590. if (rc) {
  1591. DSI_ERR("commands failed, rc=%d\n", rc);
  1592. goto error;
  1593. }
  1594. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1595. packet_count, length);
  1596. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1597. if (rc) {
  1598. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1599. goto error;
  1600. }
  1601. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1602. cmd->cmds);
  1603. if (rc) {
  1604. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1605. goto error_free_mem;
  1606. }
  1607. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1608. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1609. cmd->state = DSI_CMD_SET_STATE_LP;
  1610. } else if (!strcmp(state, "dsi_hs_mode")) {
  1611. cmd->state = DSI_CMD_SET_STATE_HS;
  1612. } else {
  1613. DSI_ERR("[%s] command state unrecognized-%s\n",
  1614. cmd_set_state_map[type], state);
  1615. goto error_free_mem;
  1616. }
  1617. return rc;
  1618. error_free_mem:
  1619. kfree(cmd->cmds);
  1620. cmd->cmds = NULL;
  1621. error:
  1622. return rc;
  1623. }
  1624. static int dsi_panel_parse_cmd_sets(
  1625. struct dsi_display_mode_priv_info *priv_info,
  1626. struct dsi_parser_utils *utils)
  1627. {
  1628. int rc = 0;
  1629. struct dsi_panel_cmd_set *set;
  1630. u32 i;
  1631. if (!priv_info) {
  1632. DSI_ERR("invalid mode priv info\n");
  1633. return -EINVAL;
  1634. }
  1635. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1636. set = &priv_info->cmd_sets[i];
  1637. set->type = i;
  1638. set->count = 0;
  1639. if (i == DSI_CMD_SET_PPS) {
  1640. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1641. if (rc)
  1642. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1643. i, rc);
  1644. set->state = DSI_CMD_SET_STATE_LP;
  1645. } else {
  1646. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1647. if (rc)
  1648. DSI_DEBUG("failed to parse set %d\n", i);
  1649. }
  1650. }
  1651. rc = 0;
  1652. return rc;
  1653. }
  1654. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1655. {
  1656. int rc = 0;
  1657. int i;
  1658. u32 length = 0;
  1659. u32 count = 0;
  1660. u32 size = 0;
  1661. u32 *arr_32 = NULL;
  1662. const u32 *arr;
  1663. struct dsi_parser_utils *utils = &panel->utils;
  1664. struct dsi_reset_seq *seq;
  1665. if (panel->host_config.ext_bridge_mode)
  1666. return 0;
  1667. arr = utils->get_property(utils->data,
  1668. "qcom,mdss-dsi-reset-sequence", &length);
  1669. if (!arr) {
  1670. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1671. rc = -EINVAL;
  1672. goto error;
  1673. }
  1674. if (length & 0x1) {
  1675. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1676. panel->name);
  1677. rc = -EINVAL;
  1678. goto error;
  1679. }
  1680. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1681. length = length / sizeof(u32);
  1682. size = length * sizeof(u32);
  1683. arr_32 = kzalloc(size, GFP_KERNEL);
  1684. if (!arr_32) {
  1685. rc = -ENOMEM;
  1686. goto error;
  1687. }
  1688. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1689. arr_32, length);
  1690. if (rc) {
  1691. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1692. goto error_free_arr_32;
  1693. }
  1694. count = length / 2;
  1695. size = count * sizeof(*seq);
  1696. seq = kzalloc(size, GFP_KERNEL);
  1697. if (!seq) {
  1698. rc = -ENOMEM;
  1699. goto error_free_arr_32;
  1700. }
  1701. panel->reset_config.sequence = seq;
  1702. panel->reset_config.count = count;
  1703. for (i = 0; i < length; i += 2) {
  1704. seq->level = arr_32[i];
  1705. seq->sleep_ms = arr_32[i + 1];
  1706. seq++;
  1707. }
  1708. error_free_arr_32:
  1709. kfree(arr_32);
  1710. error:
  1711. return rc;
  1712. }
  1713. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1714. {
  1715. struct dsi_parser_utils *utils = &panel->utils;
  1716. const char *string;
  1717. int i, rc = 0;
  1718. panel->ulps_feature_enabled =
  1719. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1720. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1721. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1722. panel->ulps_suspend_enabled =
  1723. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1724. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1725. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1726. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1727. "qcom,mdss-dsi-te-using-wd");
  1728. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1729. "qcom,cmd-sync-wait-broadcast");
  1730. panel->lp11_init = utils->read_bool(utils->data,
  1731. "qcom,mdss-dsi-lp11-init");
  1732. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1733. "qcom,platform-reset-gpio-always-on");
  1734. panel->spr_info.enable = false;
  1735. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1736. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1737. if (!rc) {
  1738. // find match for pack-type string
  1739. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1740. if (msm_spr_pack_type_str[i] &&
  1741. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1742. panel->spr_info.enable = true;
  1743. panel->spr_info.pack_type = i;
  1744. break;
  1745. }
  1746. }
  1747. }
  1748. pr_debug("%s source side spr packing, pack-type %s\n",
  1749. panel->spr_info.enable ? "enable" : "disable",
  1750. panel->spr_info.enable ?
  1751. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1752. return 0;
  1753. }
  1754. static int dsi_panel_parse_jitter_config(
  1755. struct dsi_display_mode *mode,
  1756. struct dsi_parser_utils *utils)
  1757. {
  1758. int rc;
  1759. struct dsi_display_mode_priv_info *priv_info;
  1760. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1761. u64 jitter_val = 0;
  1762. priv_info = mode->priv_info;
  1763. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1764. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1765. if (rc) {
  1766. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1767. } else {
  1768. jitter_val = jitter[0];
  1769. jitter_val = div_u64(jitter_val, jitter[1]);
  1770. }
  1771. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1772. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1773. priv_info->panel_jitter_denom =
  1774. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1775. } else {
  1776. priv_info->panel_jitter_numer = jitter[0];
  1777. priv_info->panel_jitter_denom = jitter[1];
  1778. }
  1779. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1780. &priv_info->panel_prefill_lines);
  1781. if (rc) {
  1782. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1783. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1784. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1785. } else if (priv_info->panel_prefill_lines >=
  1786. DSI_V_TOTAL(&mode->timing)) {
  1787. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1788. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1789. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1790. }
  1791. return 0;
  1792. }
  1793. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1794. {
  1795. int rc = 0;
  1796. char *supply_name;
  1797. if (panel->host_config.ext_bridge_mode)
  1798. return 0;
  1799. if (!strcmp(panel->type, "primary"))
  1800. supply_name = "qcom,panel-supply-entries";
  1801. else
  1802. supply_name = "qcom,panel-sec-supply-entries";
  1803. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1804. &panel->power_info, supply_name);
  1805. if (rc) {
  1806. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1807. goto error;
  1808. }
  1809. error:
  1810. return rc;
  1811. }
  1812. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1813. struct msm_io_res *io_res)
  1814. {
  1815. struct list_head temp_head;
  1816. struct msm_io_mem_entry *io_mem, *pos, *tmp;
  1817. struct list_head *mem_list = &io_res->mem;
  1818. int i, rc = 0;
  1819. INIT_LIST_HEAD(&temp_head);
  1820. for (i = 0; i < panel->tlmm_gpio_count; i++) {
  1821. io_mem = kzalloc(sizeof(*io_mem), GFP_KERNEL);
  1822. if (!io_mem) {
  1823. rc = -ENOMEM;
  1824. goto parse_fail;
  1825. }
  1826. io_mem->base = panel->tlmm_gpio[i].addr;
  1827. io_mem->size = panel->tlmm_gpio[i].size;
  1828. list_add(&io_mem->list, &temp_head);
  1829. }
  1830. list_splice(&temp_head, mem_list);
  1831. goto end;
  1832. parse_fail:
  1833. list_for_each_entry_safe(pos, tmp, &temp_head, list) {
  1834. list_del(&pos->list);
  1835. kfree(pos);
  1836. }
  1837. end:
  1838. return rc;
  1839. }
  1840. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1841. {
  1842. int rc = 0;
  1843. const char *data;
  1844. struct dsi_parser_utils *utils = &panel->utils;
  1845. char *reset_gpio_name, *mode_set_gpio_name;
  1846. if (!strcmp(panel->type, "primary")) {
  1847. reset_gpio_name = "qcom,platform-reset-gpio";
  1848. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1849. } else {
  1850. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1851. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1852. }
  1853. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1854. reset_gpio_name, 0);
  1855. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1856. !panel->host_config.ext_bridge_mode) {
  1857. rc = panel->reset_config.reset_gpio;
  1858. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1859. goto error;
  1860. }
  1861. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1862. "qcom,5v-boost-gpio",
  1863. 0);
  1864. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1865. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1866. panel->name, rc);
  1867. panel->reset_config.disp_en_gpio =
  1868. utils->get_named_gpio(utils->data,
  1869. "qcom,platform-en-gpio", 0);
  1870. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1871. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1872. panel->name, rc);
  1873. }
  1874. }
  1875. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1876. utils->data, mode_set_gpio_name, 0);
  1877. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1878. DSI_DEBUG("mode gpio not specified\n");
  1879. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1880. data = utils->get_property(utils->data,
  1881. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1882. if (data) {
  1883. if (!strcmp(data, "single_port"))
  1884. panel->reset_config.mode_sel_state =
  1885. MODE_SEL_SINGLE_PORT;
  1886. else if (!strcmp(data, "dual_port"))
  1887. panel->reset_config.mode_sel_state =
  1888. MODE_SEL_DUAL_PORT;
  1889. else if (!strcmp(data, "high"))
  1890. panel->reset_config.mode_sel_state =
  1891. MODE_GPIO_HIGH;
  1892. else if (!strcmp(data, "low"))
  1893. panel->reset_config.mode_sel_state =
  1894. MODE_GPIO_LOW;
  1895. } else {
  1896. /* Set default mode as SPLIT mode */
  1897. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1898. }
  1899. /* TODO: release memory */
  1900. rc = dsi_panel_parse_reset_sequence(panel);
  1901. if (rc) {
  1902. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1903. panel->name, rc);
  1904. goto error;
  1905. }
  1906. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1907. "qcom,mdss-dsi-panel-test-pin",
  1908. 0);
  1909. if (!gpio_is_valid(panel->panel_test_gpio))
  1910. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1911. __LINE__);
  1912. error:
  1913. return rc;
  1914. }
  1915. static int dsi_panel_parse_tlmm_gpio(struct dsi_panel *panel)
  1916. {
  1917. struct dsi_parser_utils *utils = &panel->utils;
  1918. u32 base, size, pin;
  1919. int pin_count, address_count, name_count, i;
  1920. address_count = of_property_count_u32_elems(utils->data,
  1921. "qcom,dsi-panel-gpio-address");
  1922. if (address_count != 2) {
  1923. DSI_DEBUG("panel gpio address not defined\n");
  1924. return 0;
  1925. }
  1926. of_property_read_u32_index(utils->data,
  1927. "qcom,dsi-panel-gpio-address", 0, &base);
  1928. of_property_read_u32_index(utils->data,
  1929. "qcom,dsi-panel-gpio-address", 1, &size);
  1930. pin_count = of_property_count_u32_elems(utils->data,
  1931. "qcom,dsi-panel-gpio-pins");
  1932. name_count = of_property_count_strings(utils->data,
  1933. "qcom,dsi-panel-gpio-names");
  1934. if ((pin_count < 0) || (name_count < 0) || (pin_count != name_count)) {
  1935. DSI_ERR("invalid gpio pins/names\n");
  1936. return -EINVAL;
  1937. }
  1938. panel->tlmm_gpio = kcalloc(pin_count,
  1939. sizeof(struct dsi_tlmm_gpio), GFP_KERNEL);
  1940. if (!panel->tlmm_gpio)
  1941. return -ENOMEM;
  1942. panel->tlmm_gpio_count = pin_count;
  1943. for (i = 0; i < pin_count; i++) {
  1944. of_property_read_u32_index(utils->data,
  1945. "qcom,dsi-panel-gpio-pins", i, &pin);
  1946. panel->tlmm_gpio[i].num = pin;
  1947. panel->tlmm_gpio[i].addr = base + (pin * size);
  1948. panel->tlmm_gpio[i].size = size;
  1949. of_property_read_string_index(utils->data,
  1950. "qcom,dsi-panel-gpio-names", i,
  1951. &(panel->tlmm_gpio[i].name));
  1952. }
  1953. return 0;
  1954. }
  1955. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1956. {
  1957. int rc = 0;
  1958. u32 val;
  1959. struct dsi_backlight_config *config = &panel->bl_config;
  1960. struct dsi_parser_utils *utils = &panel->utils;
  1961. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1962. &val);
  1963. if (rc) {
  1964. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1965. goto error;
  1966. }
  1967. config->pwm_period_usecs = val;
  1968. error:
  1969. return rc;
  1970. }
  1971. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1972. {
  1973. int rc = 0;
  1974. u32 val = 0;
  1975. const char *bl_type = NULL;
  1976. const char *data = NULL;
  1977. const char *state = NULL;
  1978. struct dsi_parser_utils *utils = &panel->utils;
  1979. char *bl_name = NULL;
  1980. if (!strcmp(panel->type, "primary"))
  1981. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1982. else
  1983. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1984. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1985. if (!bl_type) {
  1986. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1987. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1988. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1989. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1990. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1991. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1992. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1993. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1994. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1995. } else {
  1996. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1997. panel->name, bl_type);
  1998. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1999. }
  2000. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2001. if (!data) {
  2002. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2003. } else if (!strcmp(data, "delay_until_first_frame")) {
  2004. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2005. } else {
  2006. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2007. panel->name, data);
  2008. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2009. }
  2010. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2011. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2012. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2013. if (rc) {
  2014. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2015. panel->name);
  2016. panel->bl_config.bl_min_level = 0;
  2017. } else {
  2018. panel->bl_config.bl_min_level = val;
  2019. }
  2020. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2021. if (rc) {
  2022. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2023. panel->name);
  2024. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2025. } else {
  2026. panel->bl_config.bl_max_level = val;
  2027. }
  2028. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2029. &val);
  2030. if (rc) {
  2031. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2032. panel->name);
  2033. panel->bl_config.brightness_max_level = 255;
  2034. rc = 0;
  2035. } else {
  2036. panel->bl_config.brightness_max_level = val;
  2037. }
  2038. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2039. "qcom,mdss-dsi-bl-inverted-dbv");
  2040. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2041. if (!state || !strcmp(state, "dsi_hs_mode"))
  2042. panel->bl_config.lp_mode = false;
  2043. else if (!strcmp(state, "dsi_lp_mode"))
  2044. panel->bl_config.lp_mode = true;
  2045. else
  2046. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2047. state);
  2048. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2049. rc = dsi_panel_parse_bl_pwm_config(panel);
  2050. if (rc) {
  2051. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2052. panel->name, rc);
  2053. goto error;
  2054. }
  2055. }
  2056. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2057. "qcom,platform-bklight-en-gpio",
  2058. 0);
  2059. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2060. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2061. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2062. panel->name, rc);
  2063. rc = -EPROBE_DEFER;
  2064. goto error;
  2065. } else {
  2066. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2067. panel->name, rc);
  2068. rc = 0;
  2069. goto error;
  2070. }
  2071. }
  2072. error:
  2073. return rc;
  2074. }
  2075. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2076. struct dsi_parser_utils *utils)
  2077. {
  2078. const char *data;
  2079. u32 len, i;
  2080. int rc = 0;
  2081. struct dsi_display_mode_priv_info *priv_info;
  2082. u64 pixel_clk_khz;
  2083. if (!mode || !mode->priv_info)
  2084. return -EINVAL;
  2085. priv_info = mode->priv_info;
  2086. data = utils->get_property(utils->data,
  2087. "qcom,mdss-dsi-panel-phy-timings", &len);
  2088. if (!data) {
  2089. DSI_DEBUG("Unable to read Phy timing settings\n");
  2090. } else {
  2091. priv_info->phy_timing_val =
  2092. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2093. if (!priv_info->phy_timing_val)
  2094. return -EINVAL;
  2095. for (i = 0; i < len; i++)
  2096. priv_info->phy_timing_val[i] = data[i];
  2097. priv_info->phy_timing_len = len;
  2098. }
  2099. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2100. /*
  2101. * For command mode we update the pclk as part of
  2102. * function dsi_panel_calc_dsi_transfer_time( )
  2103. * as we set it based on dsi clock or mdp transfer time.
  2104. */
  2105. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2106. DSI_V_TOTAL(&mode->timing) *
  2107. mode->timing.refresh_rate);
  2108. do_div(pixel_clk_khz, 1000);
  2109. mode->pixel_clk_khz = pixel_clk_khz;
  2110. }
  2111. return rc;
  2112. }
  2113. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2114. struct dsi_parser_utils *utils)
  2115. {
  2116. u32 data;
  2117. int rc = -EINVAL;
  2118. int intf_width;
  2119. const char *compression;
  2120. struct dsi_display_mode_priv_info *priv_info;
  2121. if (!mode || !mode->priv_info)
  2122. return -EINVAL;
  2123. priv_info = mode->priv_info;
  2124. priv_info->dsc_enabled = false;
  2125. compression = utils->get_property(utils->data,
  2126. "qcom,compression-mode", NULL);
  2127. if (compression && !strcmp(compression, "dsc"))
  2128. priv_info->dsc_enabled = true;
  2129. if (!priv_info->dsc_enabled) {
  2130. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2131. return 0;
  2132. }
  2133. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2134. if (rc) {
  2135. priv_info->dsc.config.dsc_version_major = 0x1;
  2136. priv_info->dsc.config.dsc_version_minor = 0x1;
  2137. rc = 0;
  2138. } else {
  2139. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2140. * major version information
  2141. */
  2142. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2143. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2144. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2145. ((priv_info->dsc.config.dsc_version_minor
  2146. != 0x1) &&
  2147. (priv_info->dsc.config.dsc_version_minor
  2148. != 0x2))) {
  2149. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2150. __func__,
  2151. priv_info->dsc.config.dsc_version_major,
  2152. priv_info->dsc.config.dsc_version_minor
  2153. );
  2154. rc = -EINVAL;
  2155. goto error;
  2156. }
  2157. }
  2158. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2159. if (rc) {
  2160. priv_info->dsc.scr_rev = 0x0;
  2161. rc = 0;
  2162. } else {
  2163. priv_info->dsc.scr_rev = data & 0xff;
  2164. /* only one scr rev supported */
  2165. if (priv_info->dsc.scr_rev > 0x1) {
  2166. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2167. __func__, priv_info->dsc.scr_rev);
  2168. rc = -EINVAL;
  2169. goto error;
  2170. }
  2171. }
  2172. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2173. if (rc) {
  2174. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2175. goto error;
  2176. }
  2177. priv_info->dsc.config.slice_height = data;
  2178. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2179. if (rc) {
  2180. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2181. goto error;
  2182. }
  2183. priv_info->dsc.config.slice_width = data;
  2184. intf_width = mode->timing.h_active;
  2185. if (intf_width % priv_info->dsc.config.slice_width) {
  2186. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2187. intf_width, priv_info->dsc.config.slice_width);
  2188. rc = -EINVAL;
  2189. goto error;
  2190. }
  2191. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2192. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2193. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2194. if (rc) {
  2195. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2196. goto error;
  2197. } else if (!data || (data > 2)) {
  2198. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2199. goto error;
  2200. }
  2201. priv_info->dsc.slice_per_pkt = data;
  2202. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2203. &data);
  2204. if (rc) {
  2205. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2206. goto error;
  2207. }
  2208. priv_info->dsc.config.bits_per_component = data;
  2209. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2210. if (rc) {
  2211. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2212. data = 0;
  2213. }
  2214. priv_info->dsc.pps_delay_ms = data;
  2215. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2216. &data);
  2217. if (rc) {
  2218. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2219. goto error;
  2220. }
  2221. priv_info->dsc.config.bits_per_pixel = data << 4;
  2222. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2223. &data);
  2224. if (rc) {
  2225. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2226. rc = 0;
  2227. data = MSM_CHROMA_444;
  2228. }
  2229. priv_info->dsc.chroma_format = data;
  2230. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2231. &data);
  2232. if (rc) {
  2233. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2234. rc = 0;
  2235. data = MSM_RGB;
  2236. }
  2237. priv_info->dsc.source_color_space = data;
  2238. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2239. "qcom,mdss-dsc-block-prediction-enable");
  2240. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2241. priv_info->dsc.config.slice_width);
  2242. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2243. priv_info->dsc.scr_rev);
  2244. if (rc) {
  2245. DSI_DEBUG("failed populating dsc params\n");
  2246. rc = -EINVAL;
  2247. goto error;
  2248. }
  2249. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2250. if (rc) {
  2251. DSI_DEBUG("failed populating other dsc params\n");
  2252. rc = -EINVAL;
  2253. goto error;
  2254. }
  2255. priv_info->pclk_scale.numer =
  2256. priv_info->dsc.config.bits_per_pixel >> 4;
  2257. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2258. priv_info->dsc.chroma_format,
  2259. priv_info->dsc.config.bits_per_component);
  2260. mode->timing.dsc_enabled = true;
  2261. mode->timing.dsc = &priv_info->dsc;
  2262. mode->timing.pclk_scale = priv_info->pclk_scale;
  2263. error:
  2264. return rc;
  2265. }
  2266. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2267. struct dsi_parser_utils *utils, int traffic_mode)
  2268. {
  2269. u32 data;
  2270. int rc = -EINVAL;
  2271. const char *compression;
  2272. struct dsi_display_mode_priv_info *priv_info;
  2273. int intf_width;
  2274. if (!mode || !mode->priv_info)
  2275. return -EINVAL;
  2276. priv_info = mode->priv_info;
  2277. priv_info->vdc_enabled = false;
  2278. compression = utils->get_property(utils->data,
  2279. "qcom,compression-mode", NULL);
  2280. if (compression && !strcmp(compression, "vdc"))
  2281. priv_info->vdc_enabled = true;
  2282. if (!priv_info->vdc_enabled) {
  2283. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2284. return 0;
  2285. }
  2286. priv_info->vdc.traffic_mode = traffic_mode;
  2287. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2288. if (rc) {
  2289. priv_info->vdc.version_major = 0x1;
  2290. priv_info->vdc.version_minor = 0x2;
  2291. priv_info->vdc.version_release = 0x0;
  2292. rc = 0;
  2293. } else {
  2294. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2295. * major version information
  2296. */
  2297. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2298. priv_info->vdc.version_minor = data & 0x0F;
  2299. if ((priv_info->vdc.version_major != 0x1) &&
  2300. ((priv_info->vdc.version_minor
  2301. != 0x2))) {
  2302. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2303. __func__,
  2304. priv_info->vdc.version_major,
  2305. priv_info->vdc.version_minor
  2306. );
  2307. rc = -EINVAL;
  2308. goto error;
  2309. }
  2310. }
  2311. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2312. if (rc) {
  2313. priv_info->vdc.version_release = 0x0;
  2314. rc = 0;
  2315. } else {
  2316. priv_info->vdc.version_release = data & 0xff;
  2317. /* only one release version is supported */
  2318. if (priv_info->vdc.version_release != 0x0) {
  2319. DSI_ERR("unsupported vdc release version %d\n",
  2320. priv_info->vdc.version_release);
  2321. rc = -EINVAL;
  2322. goto error;
  2323. }
  2324. }
  2325. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2326. priv_info->vdc.version_major,
  2327. priv_info->vdc.version_minor,
  2328. priv_info->vdc.version_release);
  2329. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2330. if (rc) {
  2331. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2332. goto error;
  2333. }
  2334. priv_info->vdc.slice_height = data;
  2335. /* slice height should be atleast 16 lines */
  2336. if (priv_info->vdc.slice_height < 16) {
  2337. DSI_ERR("invalid slice height %d\n",
  2338. priv_info->vdc.slice_height);
  2339. rc = -EINVAL;
  2340. goto error;
  2341. }
  2342. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2343. if (rc) {
  2344. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2345. goto error;
  2346. }
  2347. priv_info->vdc.slice_width = data;
  2348. /*
  2349. * slide-width should be multiple of 8
  2350. * slice-width should be atlease 64 pixels
  2351. */
  2352. if ((priv_info->vdc.slice_width & 7) ||
  2353. (priv_info->vdc.slice_width < 64)) {
  2354. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2355. rc = -EINVAL;
  2356. goto error;
  2357. }
  2358. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2359. if (rc) {
  2360. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2361. goto error;
  2362. } else if (!data || (data > 2)) {
  2363. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2364. rc = -EINVAL;
  2365. goto error;
  2366. }
  2367. intf_width = mode->timing.h_active;
  2368. priv_info->vdc.slice_per_pkt = data;
  2369. priv_info->vdc.frame_width = mode->timing.h_active;
  2370. priv_info->vdc.frame_height = mode->timing.v_active;
  2371. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2372. &data);
  2373. if (rc) {
  2374. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2375. goto error;
  2376. }
  2377. priv_info->vdc.bits_per_component = data;
  2378. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2379. if (rc) {
  2380. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2381. data = 0;
  2382. }
  2383. priv_info->vdc.pps_delay_ms = data;
  2384. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2385. &data);
  2386. if (rc) {
  2387. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2388. goto error;
  2389. }
  2390. priv_info->vdc.bits_per_pixel = data << 4;
  2391. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2392. &data);
  2393. if (rc) {
  2394. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2395. rc = 0;
  2396. data = MSM_CHROMA_444;
  2397. }
  2398. priv_info->vdc.chroma_format = data;
  2399. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2400. &data);
  2401. if (rc) {
  2402. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2403. rc = 0;
  2404. data = MSM_RGB;
  2405. }
  2406. priv_info->vdc.source_color_space = data;
  2407. rc = sde_vdc_populate_config(&priv_info->vdc,
  2408. intf_width, traffic_mode);
  2409. if (rc) {
  2410. DSI_DEBUG("failed populating vdc config\n");
  2411. rc = -EINVAL;
  2412. goto error;
  2413. }
  2414. priv_info->pclk_scale.numer =
  2415. priv_info->vdc.bits_per_pixel >> 4;
  2416. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2417. priv_info->vdc.chroma_format,
  2418. priv_info->vdc.bits_per_component);
  2419. mode->timing.vdc_enabled = true;
  2420. mode->timing.vdc = &priv_info->vdc;
  2421. mode->timing.pclk_scale = priv_info->pclk_scale;
  2422. error:
  2423. return rc;
  2424. }
  2425. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2426. {
  2427. int rc = 0;
  2428. struct drm_panel_hdr_properties *hdr_prop;
  2429. struct dsi_parser_utils *utils = &panel->utils;
  2430. hdr_prop = &panel->hdr_props;
  2431. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2432. "qcom,mdss-dsi-panel-hdr-enabled");
  2433. if (hdr_prop->hdr_enabled) {
  2434. rc = utils->read_u32_array(utils->data,
  2435. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2436. hdr_prop->display_primaries,
  2437. DISPLAY_PRIMARIES_MAX);
  2438. if (rc) {
  2439. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2440. __func__, __LINE__, rc);
  2441. hdr_prop->hdr_enabled = false;
  2442. return rc;
  2443. }
  2444. rc = utils->read_u32(utils->data,
  2445. "qcom,mdss-dsi-panel-peak-brightness",
  2446. &(hdr_prop->peak_brightness));
  2447. if (rc) {
  2448. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2449. __func__, __LINE__, rc);
  2450. hdr_prop->hdr_enabled = false;
  2451. return rc;
  2452. }
  2453. rc = utils->read_u32(utils->data,
  2454. "qcom,mdss-dsi-panel-blackness-level",
  2455. &(hdr_prop->blackness_level));
  2456. if (rc) {
  2457. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2458. __func__, __LINE__, rc);
  2459. hdr_prop->hdr_enabled = false;
  2460. return rc;
  2461. }
  2462. }
  2463. return 0;
  2464. }
  2465. static int dsi_panel_parse_topology(
  2466. struct dsi_display_mode_priv_info *priv_info,
  2467. struct dsi_parser_utils *utils,
  2468. int topology_override)
  2469. {
  2470. struct msm_display_topology *topology;
  2471. u32 top_count, top_sel, *array = NULL;
  2472. int i, len = 0;
  2473. int rc = -EINVAL;
  2474. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2475. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2476. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2477. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2478. return rc;
  2479. }
  2480. top_count = len / TOPOLOGY_SET_LEN;
  2481. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2482. if (!array)
  2483. return -ENOMEM;
  2484. rc = utils->read_u32_array(utils->data,
  2485. "qcom,display-topology", array, len);
  2486. if (rc) {
  2487. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2488. goto read_fail;
  2489. }
  2490. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2491. if (!topology) {
  2492. rc = -ENOMEM;
  2493. goto read_fail;
  2494. }
  2495. for (i = 0; i < top_count; i++) {
  2496. struct msm_display_topology *top = &topology[i];
  2497. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2498. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2499. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2500. }
  2501. if (topology_override >= 0 && topology_override < top_count) {
  2502. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2503. topology_override,
  2504. topology[topology_override].num_lm,
  2505. topology[topology_override].num_enc,
  2506. topology[topology_override].num_intf);
  2507. top_sel = topology_override;
  2508. goto parse_done;
  2509. }
  2510. rc = utils->read_u32(utils->data,
  2511. "qcom,default-topology-index", &top_sel);
  2512. if (rc) {
  2513. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2514. goto parse_fail;
  2515. }
  2516. if (top_sel >= top_count) {
  2517. rc = -EINVAL;
  2518. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2519. rc);
  2520. goto parse_fail;
  2521. }
  2522. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2523. topology[top_sel].num_lm,
  2524. topology[top_sel].num_enc,
  2525. topology[top_sel].num_intf);
  2526. parse_done:
  2527. memcpy(&priv_info->topology, &topology[top_sel],
  2528. sizeof(struct msm_display_topology));
  2529. parse_fail:
  2530. kfree(topology);
  2531. read_fail:
  2532. kfree(array);
  2533. return rc;
  2534. }
  2535. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2536. struct msm_roi_alignment *align)
  2537. {
  2538. int len = 0, rc = 0;
  2539. u32 value[6];
  2540. struct property *data;
  2541. if (!align)
  2542. return -EINVAL;
  2543. memset(align, 0, sizeof(*align));
  2544. data = utils->find_property(utils->data,
  2545. "qcom,panel-roi-alignment", &len);
  2546. len /= sizeof(u32);
  2547. if (!data) {
  2548. DSI_ERR("panel roi alignment not found\n");
  2549. rc = -EINVAL;
  2550. } else if (len != 6) {
  2551. DSI_ERR("incorrect roi alignment len %d\n", len);
  2552. rc = -EINVAL;
  2553. } else {
  2554. rc = utils->read_u32_array(utils->data,
  2555. "qcom,panel-roi-alignment", value, len);
  2556. if (rc)
  2557. DSI_DEBUG("error reading panel roi alignment values\n");
  2558. else {
  2559. align->xstart_pix_align = value[0];
  2560. align->ystart_pix_align = value[1];
  2561. align->width_pix_align = value[2];
  2562. align->height_pix_align = value[3];
  2563. align->min_width = value[4];
  2564. align->min_height = value[5];
  2565. }
  2566. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2567. align->xstart_pix_align,
  2568. align->width_pix_align,
  2569. align->ystart_pix_align,
  2570. align->height_pix_align,
  2571. align->min_width,
  2572. align->min_height);
  2573. }
  2574. return rc;
  2575. }
  2576. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2577. struct dsi_parser_utils *utils)
  2578. {
  2579. struct msm_roi_caps *roi_caps = NULL;
  2580. const char *data;
  2581. int rc = 0;
  2582. if (!mode || !mode->priv_info) {
  2583. DSI_ERR("invalid arguments\n");
  2584. return -EINVAL;
  2585. }
  2586. roi_caps = &mode->priv_info->roi_caps;
  2587. memset(roi_caps, 0, sizeof(*roi_caps));
  2588. data = utils->get_property(utils->data,
  2589. "qcom,partial-update-enabled", NULL);
  2590. if (data) {
  2591. if (!strcmp(data, "dual_roi"))
  2592. roi_caps->num_roi = 2;
  2593. else if (!strcmp(data, "single_roi"))
  2594. roi_caps->num_roi = 1;
  2595. else {
  2596. DSI_INFO(
  2597. "invalid value for qcom,partial-update-enabled: %s\n",
  2598. data);
  2599. return 0;
  2600. }
  2601. } else {
  2602. DSI_DEBUG("partial update disabled as the property is not set\n");
  2603. return 0;
  2604. }
  2605. roi_caps->merge_rois = utils->read_bool(utils->data,
  2606. "qcom,partial-update-roi-merge");
  2607. roi_caps->enabled = roi_caps->num_roi > 0;
  2608. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2609. roi_caps->enabled);
  2610. if (roi_caps->enabled)
  2611. rc = dsi_panel_parse_roi_alignment(utils,
  2612. &roi_caps->align);
  2613. if (rc)
  2614. memset(roi_caps, 0, sizeof(*roi_caps));
  2615. return rc;
  2616. }
  2617. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2618. struct dsi_parser_utils *utils)
  2619. {
  2620. if (!mode || !mode->priv_info) {
  2621. DSI_ERR("invalid arguments\n");
  2622. return false;
  2623. }
  2624. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2625. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2626. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2627. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2628. if (!mode->panel_mode_caps)
  2629. return false;
  2630. return true;
  2631. };
  2632. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2633. {
  2634. int dms_enabled;
  2635. const char *data;
  2636. struct dsi_parser_utils *utils = &panel->utils;
  2637. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2638. dms_enabled = utils->read_bool(utils->data,
  2639. "qcom,dynamic-mode-switch-enabled");
  2640. if (!dms_enabled)
  2641. return 0;
  2642. data = utils->get_property(utils->data,
  2643. "qcom,dynamic-mode-switch-type", NULL);
  2644. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2645. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2646. } else {
  2647. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2648. panel->name, data);
  2649. return -EINVAL;
  2650. }
  2651. return 0;
  2652. };
  2653. /*
  2654. * The length of all the valid values to be checked should not be greater
  2655. * than the length of returned data from read command.
  2656. */
  2657. static bool
  2658. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2659. {
  2660. int i;
  2661. struct drm_panel_esd_config *config = &panel->esd_config;
  2662. for (i = 0; i < count; ++i) {
  2663. if (config->status_valid_params[i] >
  2664. config->status_cmds_rlen[i]) {
  2665. DSI_DEBUG("ignore valid params\n");
  2666. return false;
  2667. }
  2668. }
  2669. return true;
  2670. }
  2671. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2672. char *prop_key, u32 **target, u32 cmd_cnt)
  2673. {
  2674. int tmp;
  2675. if (!utils->find_property(utils->data, prop_key, &tmp))
  2676. return false;
  2677. tmp /= sizeof(u32);
  2678. if (tmp != cmd_cnt) {
  2679. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2680. tmp, cmd_cnt);
  2681. return false;
  2682. }
  2683. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2684. if (IS_ERR_OR_NULL(*target)) {
  2685. DSI_ERR("Error allocating memory for property\n");
  2686. return false;
  2687. }
  2688. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2689. DSI_ERR("cannot get values from dts\n");
  2690. kfree(*target);
  2691. *target = NULL;
  2692. return false;
  2693. }
  2694. return true;
  2695. }
  2696. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2697. {
  2698. kfree(esd_config->status_buf);
  2699. kfree(esd_config->return_buf);
  2700. kfree(esd_config->status_value);
  2701. kfree(esd_config->status_valid_params);
  2702. kfree(esd_config->status_cmds_rlen);
  2703. kfree(esd_config->status_cmd.cmds);
  2704. }
  2705. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2706. {
  2707. struct drm_panel_esd_config *esd_config;
  2708. int rc = 0;
  2709. u32 tmp;
  2710. u32 i, status_len, *lenp;
  2711. struct property *data;
  2712. struct dsi_parser_utils *utils = &panel->utils;
  2713. if (!panel) {
  2714. DSI_ERR("Invalid Params\n");
  2715. return -EINVAL;
  2716. }
  2717. esd_config = &panel->esd_config;
  2718. if (!esd_config)
  2719. return -EINVAL;
  2720. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2721. DSI_CMD_SET_PANEL_STATUS, utils);
  2722. if (!esd_config->status_cmd.count) {
  2723. DSI_ERR("panel status command parsing failed\n");
  2724. rc = -EINVAL;
  2725. goto error;
  2726. }
  2727. if (!dsi_panel_parse_esd_status_len(utils,
  2728. "qcom,mdss-dsi-panel-status-read-length",
  2729. &panel->esd_config.status_cmds_rlen,
  2730. esd_config->status_cmd.count)) {
  2731. DSI_ERR("Invalid status read length\n");
  2732. rc = -EINVAL;
  2733. goto error1;
  2734. }
  2735. if (dsi_panel_parse_esd_status_len(utils,
  2736. "qcom,mdss-dsi-panel-status-valid-params",
  2737. &panel->esd_config.status_valid_params,
  2738. esd_config->status_cmd.count)) {
  2739. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2740. esd_config->status_cmd.count)) {
  2741. rc = -EINVAL;
  2742. goto error2;
  2743. }
  2744. }
  2745. status_len = 0;
  2746. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2747. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2748. status_len += lenp[i];
  2749. if (!status_len) {
  2750. rc = -EINVAL;
  2751. goto error2;
  2752. }
  2753. /*
  2754. * Some panel may need multiple read commands to properly
  2755. * check panel status. Do a sanity check for proper status
  2756. * value which will be compared with the value read by dsi
  2757. * controller during ESD check. Also check if multiple read
  2758. * commands are there then, there should be corresponding
  2759. * status check values for each read command.
  2760. */
  2761. data = utils->find_property(utils->data,
  2762. "qcom,mdss-dsi-panel-status-value", &tmp);
  2763. tmp /= sizeof(u32);
  2764. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2765. esd_config->groups = tmp / status_len;
  2766. } else {
  2767. DSI_ERR("error parse panel-status-value\n");
  2768. rc = -EINVAL;
  2769. goto error2;
  2770. }
  2771. esd_config->status_value =
  2772. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2773. GFP_KERNEL);
  2774. if (!esd_config->status_value) {
  2775. rc = -ENOMEM;
  2776. goto error2;
  2777. }
  2778. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2779. sizeof(unsigned char), GFP_KERNEL);
  2780. if (!esd_config->return_buf) {
  2781. rc = -ENOMEM;
  2782. goto error3;
  2783. }
  2784. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2785. if (!esd_config->status_buf) {
  2786. rc = -ENOMEM;
  2787. goto error4;
  2788. }
  2789. rc = utils->read_u32_array(utils->data,
  2790. "qcom,mdss-dsi-panel-status-value",
  2791. esd_config->status_value, esd_config->groups * status_len);
  2792. if (rc) {
  2793. DSI_DEBUG("error reading panel status values\n");
  2794. memset(esd_config->status_value, 0,
  2795. esd_config->groups * status_len);
  2796. }
  2797. return 0;
  2798. error4:
  2799. kfree(esd_config->return_buf);
  2800. error3:
  2801. kfree(esd_config->status_value);
  2802. error2:
  2803. kfree(esd_config->status_valid_params);
  2804. kfree(esd_config->status_cmds_rlen);
  2805. error1:
  2806. kfree(esd_config->status_cmd.cmds);
  2807. error:
  2808. return rc;
  2809. }
  2810. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2811. {
  2812. int rc = 0;
  2813. const char *string;
  2814. struct drm_panel_esd_config *esd_config;
  2815. struct dsi_parser_utils *utils = &panel->utils;
  2816. u8 *esd_mode = NULL;
  2817. esd_config = &panel->esd_config;
  2818. esd_config->status_mode = ESD_MODE_MAX;
  2819. esd_config->esd_enabled = utils->read_bool(utils->data,
  2820. "qcom,esd-check-enabled");
  2821. if (!esd_config->esd_enabled)
  2822. return 0;
  2823. rc = utils->read_string(utils->data,
  2824. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2825. if (!rc) {
  2826. if (!strcmp(string, "bta_check")) {
  2827. esd_config->status_mode = ESD_MODE_SW_BTA;
  2828. } else if (!strcmp(string, "reg_read")) {
  2829. esd_config->status_mode = ESD_MODE_REG_READ;
  2830. } else if (!strcmp(string, "te_signal_check")) {
  2831. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2832. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2833. } else {
  2834. DSI_ERR("TE-ESD not valid for video mode\n");
  2835. rc = -EINVAL;
  2836. goto error;
  2837. }
  2838. } else {
  2839. DSI_ERR("No valid panel-status-check-mode string\n");
  2840. rc = -EINVAL;
  2841. goto error;
  2842. }
  2843. } else {
  2844. DSI_DEBUG("status check method not defined!\n");
  2845. rc = -EINVAL;
  2846. goto error;
  2847. }
  2848. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2849. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2850. if (rc) {
  2851. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2852. rc);
  2853. goto error;
  2854. }
  2855. esd_mode = "register_read";
  2856. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2857. esd_mode = "bta_trigger";
  2858. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2859. esd_mode = "te_check";
  2860. }
  2861. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2862. return 0;
  2863. error:
  2864. panel->esd_config.esd_enabled = false;
  2865. return rc;
  2866. }
  2867. static void dsi_panel_update_util(struct dsi_panel *panel,
  2868. struct device_node *parser_node)
  2869. {
  2870. struct dsi_parser_utils *utils = &panel->utils;
  2871. if (parser_node) {
  2872. *utils = *dsi_parser_get_parser_utils();
  2873. utils->data = parser_node;
  2874. DSI_DEBUG("switching to parser APIs\n");
  2875. goto end;
  2876. }
  2877. *utils = *dsi_parser_get_of_utils();
  2878. utils->data = panel->panel_of_node;
  2879. end:
  2880. utils->node = panel->panel_of_node;
  2881. }
  2882. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2883. {
  2884. return 0;
  2885. }
  2886. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2887. {
  2888. if (trusted_vm_env) {
  2889. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2890. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2891. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2892. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2893. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2894. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2895. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2896. } else {
  2897. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2898. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2899. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2900. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2901. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2902. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2903. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2904. }
  2905. }
  2906. struct dsi_panel *dsi_panel_get(struct device *parent,
  2907. struct device_node *of_node,
  2908. struct device_node *parser_node,
  2909. const char *type,
  2910. int topology_override,
  2911. bool trusted_vm_env)
  2912. {
  2913. struct dsi_panel *panel;
  2914. struct dsi_parser_utils *utils;
  2915. const char *panel_physical_type;
  2916. int rc = 0;
  2917. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2918. if (!panel)
  2919. return ERR_PTR(-ENOMEM);
  2920. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2921. panel->panel_of_node = of_node;
  2922. panel->parent = parent;
  2923. panel->type = type;
  2924. dsi_panel_update_util(panel, parser_node);
  2925. utils = &panel->utils;
  2926. panel->name = utils->get_property(utils->data,
  2927. "qcom,mdss-dsi-panel-name", NULL);
  2928. if (!panel->name)
  2929. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2930. /*
  2931. * Set panel type to LCD as default.
  2932. */
  2933. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2934. panel_physical_type = utils->get_property(utils->data,
  2935. "qcom,mdss-dsi-panel-physical-type", NULL);
  2936. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2937. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2938. rc = dsi_panel_parse_host_config(panel);
  2939. if (rc) {
  2940. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2941. rc);
  2942. goto error;
  2943. }
  2944. rc = dsi_panel_parse_panel_mode(panel);
  2945. if (rc) {
  2946. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2947. rc);
  2948. goto error;
  2949. }
  2950. rc = dsi_panel_parse_dfps_caps(panel);
  2951. if (rc)
  2952. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2953. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2954. if (rc)
  2955. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2956. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2957. if (rc)
  2958. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2959. rc = dsi_panel_parse_phy_props(panel);
  2960. if (rc) {
  2961. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2962. rc);
  2963. goto error;
  2964. }
  2965. rc = panel->panel_ops.parse_gpios(panel);
  2966. if (rc) {
  2967. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2968. goto error;
  2969. }
  2970. rc = dsi_panel_parse_tlmm_gpio(panel);
  2971. if (rc) {
  2972. DSI_ERR("failed to parse panel tlmm gpios, rc=%d\n", rc);
  2973. goto error;
  2974. }
  2975. rc = dsi_panel_parse_power_cfg(panel);
  2976. if (rc)
  2977. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2978. rc = dsi_panel_parse_bl_config(panel);
  2979. if (rc) {
  2980. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2981. if (rc == -EPROBE_DEFER)
  2982. goto error;
  2983. }
  2984. rc = dsi_panel_parse_misc_features(panel);
  2985. if (rc)
  2986. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2987. rc = dsi_panel_parse_hdr_config(panel);
  2988. if (rc)
  2989. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2990. rc = dsi_panel_get_mode_count(panel);
  2991. if (rc) {
  2992. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2993. goto error;
  2994. }
  2995. rc = dsi_panel_parse_dms_info(panel);
  2996. if (rc)
  2997. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2998. rc = dsi_panel_parse_esd_config(panel);
  2999. if (rc)
  3000. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3001. rc = dsi_panel_vreg_get(panel);
  3002. if (rc) {
  3003. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3004. panel->name, rc);
  3005. goto error;
  3006. }
  3007. panel->power_mode = SDE_MODE_DPMS_OFF;
  3008. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3009. NULL, DRM_MODE_CONNECTOR_DSI);
  3010. panel->mipi_device.dev.of_node = of_node;
  3011. drm_panel_add(&panel->drm_panel);
  3012. mutex_init(&panel->panel_lock);
  3013. return panel;
  3014. error:
  3015. kfree(panel);
  3016. return ERR_PTR(rc);
  3017. }
  3018. void dsi_panel_put(struct dsi_panel *panel)
  3019. {
  3020. drm_panel_remove(&panel->drm_panel);
  3021. /* free resources allocated for ESD check */
  3022. dsi_panel_esd_config_deinit(&panel->esd_config);
  3023. kfree(panel);
  3024. }
  3025. int dsi_panel_drv_init(struct dsi_panel *panel,
  3026. struct mipi_dsi_host *host)
  3027. {
  3028. int rc = 0;
  3029. struct mipi_dsi_device *dev;
  3030. if (!panel || !host) {
  3031. DSI_ERR("invalid params\n");
  3032. return -EINVAL;
  3033. }
  3034. mutex_lock(&panel->panel_lock);
  3035. dev = &panel->mipi_device;
  3036. dev->host = host;
  3037. /*
  3038. * We dont have device structure since panel is not a device node.
  3039. * When using drm panel framework, the device is probed when the host is
  3040. * create.
  3041. */
  3042. dev->channel = 0;
  3043. dev->lanes = 4;
  3044. panel->host = host;
  3045. rc = panel->panel_ops.pinctrl_init(panel);
  3046. if (rc) {
  3047. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3048. panel->name, rc);
  3049. goto exit;
  3050. }
  3051. rc = panel->panel_ops.gpio_request(panel);
  3052. if (rc) {
  3053. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3054. rc);
  3055. goto error_pinctrl_deinit;
  3056. }
  3057. rc = panel->panel_ops.bl_register(panel);
  3058. if (rc) {
  3059. if (rc != -EPROBE_DEFER)
  3060. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3061. panel->name, rc);
  3062. goto error_gpio_release;
  3063. }
  3064. goto exit;
  3065. error_gpio_release:
  3066. (void)dsi_panel_gpio_release(panel);
  3067. error_pinctrl_deinit:
  3068. (void)dsi_panel_pinctrl_deinit(panel);
  3069. exit:
  3070. mutex_unlock(&panel->panel_lock);
  3071. return rc;
  3072. }
  3073. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3074. {
  3075. int rc = 0;
  3076. if (!panel) {
  3077. DSI_ERR("invalid params\n");
  3078. return -EINVAL;
  3079. }
  3080. mutex_lock(&panel->panel_lock);
  3081. rc = panel->panel_ops.bl_unregister(panel);
  3082. if (rc)
  3083. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3084. panel->name, rc);
  3085. rc = panel->panel_ops.gpio_release(panel);
  3086. if (rc)
  3087. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3088. rc);
  3089. rc = panel->panel_ops.pinctrl_deinit(panel);
  3090. if (rc)
  3091. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3092. rc);
  3093. rc = dsi_panel_vreg_put(panel);
  3094. if (rc)
  3095. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3096. kfree(panel->tlmm_gpio);
  3097. panel->host = NULL;
  3098. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3099. mutex_unlock(&panel->panel_lock);
  3100. return rc;
  3101. }
  3102. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3103. struct dsi_display_mode *mode)
  3104. {
  3105. return 0;
  3106. }
  3107. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3108. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3109. {
  3110. const char *compression;
  3111. u32 *array = NULL, top_count, len, i;
  3112. int rc = -EINVAL;
  3113. bool dsc_enable = false;
  3114. *dsc_count = 0;
  3115. *lm_count = 0;
  3116. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3117. if (compression && !strcmp(compression, "dsc"))
  3118. dsc_enable = true;
  3119. len = utils->count_u32_elems(node, "qcom,display-topology");
  3120. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3121. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3122. return rc;
  3123. top_count = len / TOPOLOGY_SET_LEN;
  3124. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3125. if (!array)
  3126. return -ENOMEM;
  3127. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3128. if (rc) {
  3129. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3130. goto read_fail;
  3131. }
  3132. for (i = 0; i < top_count; i++) {
  3133. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3134. if (dsc_enable)
  3135. *dsc_count = max(*dsc_count,
  3136. array[i * TOPOLOGY_SET_LEN + 1]);
  3137. }
  3138. read_fail:
  3139. kfree(array);
  3140. return 0;
  3141. }
  3142. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3143. {
  3144. const u32 SINGLE_MODE_SUPPORT = 1;
  3145. struct dsi_parser_utils *utils;
  3146. struct device_node *timings_np, *child_np;
  3147. int num_dfps_rates, num_bit_clks;
  3148. int num_video_modes = 0, num_cmd_modes = 0;
  3149. int count, rc = 0;
  3150. u32 dsc_count = 0, lm_count = 0;
  3151. if (!panel) {
  3152. DSI_ERR("invalid params\n");
  3153. return -EINVAL;
  3154. }
  3155. utils = &panel->utils;
  3156. panel->num_timing_nodes = 0;
  3157. timings_np = utils->get_child_by_name(utils->data,
  3158. "qcom,mdss-dsi-display-timings");
  3159. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3160. DSI_ERR("no display timing nodes defined\n");
  3161. rc = -EINVAL;
  3162. goto error;
  3163. }
  3164. count = utils->get_child_count(timings_np);
  3165. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3166. count > DSI_MODE_MAX) {
  3167. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3168. rc = -EINVAL;
  3169. goto error;
  3170. }
  3171. /* No multiresolution support is available for video mode panels.
  3172. * Multi-mode is supported for video mode during POMS is enabled.
  3173. */
  3174. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3175. !panel->host_config.ext_bridge_mode &&
  3176. !panel->panel_mode_switch_enabled)
  3177. count = SINGLE_MODE_SUPPORT;
  3178. panel->num_timing_nodes = count;
  3179. dsi_for_each_child_node(timings_np, child_np) {
  3180. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3181. num_video_modes++;
  3182. else if (utils->read_bool(child_np,
  3183. "qcom,mdss-dsi-cmd-mode"))
  3184. num_cmd_modes++;
  3185. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3186. num_video_modes++;
  3187. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3188. num_cmd_modes++;
  3189. dsi_panel_get_max_res_count(utils, child_np,
  3190. &dsc_count, &lm_count);
  3191. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3192. panel->lm_count = max(lm_count, panel->lm_count);
  3193. }
  3194. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3195. panel->dfps_caps.dfps_list_len;
  3196. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  3197. panel->dyn_clk_caps.bit_clk_list_len;
  3198. /*
  3199. * Inflate num_of_modes by fps and bit clks in dfps.
  3200. * Single command mode for video mode panels supporting
  3201. * panel operating mode switch.
  3202. */
  3203. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  3204. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3205. (panel->panel_mode_switch_enabled))
  3206. num_cmd_modes = 1;
  3207. else
  3208. num_cmd_modes = num_cmd_modes * num_bit_clks;
  3209. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3210. error:
  3211. return rc;
  3212. }
  3213. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3214. struct dsi_panel_phy_props *phy_props)
  3215. {
  3216. int rc = 0;
  3217. if (!panel || !phy_props) {
  3218. DSI_ERR("invalid params\n");
  3219. return -EINVAL;
  3220. }
  3221. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3222. return rc;
  3223. }
  3224. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3225. struct dsi_dfps_capabilities *dfps_caps)
  3226. {
  3227. int rc = 0;
  3228. if (!panel || !dfps_caps) {
  3229. DSI_ERR("invalid params\n");
  3230. return -EINVAL;
  3231. }
  3232. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3233. return rc;
  3234. }
  3235. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3236. {
  3237. int i;
  3238. if (!mode->priv_info)
  3239. return;
  3240. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3241. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3242. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3243. }
  3244. kfree(mode->priv_info);
  3245. }
  3246. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3247. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3248. {
  3249. u32 frame_time_us, nslices;
  3250. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3251. dsi_transfer_time_us, pixel_clk_khz;
  3252. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3253. struct dsi_mode_info *timing = &mode->timing;
  3254. struct dsi_display_mode *display_mode;
  3255. u32 jitter_numer, jitter_denom, prefill_lines;
  3256. u32 min_threshold_us, prefill_time_us, max_transfer_us;
  3257. u16 bpp;
  3258. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3259. * + 1 byte dcs data command.
  3260. */
  3261. const u32 packet_overhead = 56;
  3262. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3263. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3264. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3265. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3266. if (timing->refresh_rate >= 120)
  3267. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3268. if (timing->dsc_enabled) {
  3269. nslices = (timing->h_active)/(dsc->config.slice_width);
  3270. /* (slice width x bit-per-pixel + packet overhead) x
  3271. * number of slices x height x fps / lane
  3272. */
  3273. bpp = DSC_BPP(dsc->config);
  3274. bits_per_line = ((dsc->config.slice_width * bpp) +
  3275. packet_overhead) * nslices;
  3276. bits_per_line = bits_per_line / (config->num_data_lanes);
  3277. min_bitclk_hz = (bits_per_line * timing->v_active *
  3278. timing->refresh_rate);
  3279. } else {
  3280. total_active_pixels = ((dsi_h_active_dce(timing)
  3281. * timing->v_active));
  3282. /* calculate the actual bitclk needed to transfer the frame */
  3283. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3284. (config->bpp));
  3285. do_div(min_bitclk_hz, config->num_data_lanes);
  3286. }
  3287. timing->min_dsi_clk_hz = min_bitclk_hz;
  3288. min_threshold_us = mult_frac(frame_time_us,
  3289. jitter_numer, (jitter_denom * 100));
  3290. /*
  3291. * Increase the prefill_lines proportionately as recommended
  3292. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3293. */
  3294. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3295. timing->refresh_rate, 60);
  3296. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3297. (timing->v_active));
  3298. /*
  3299. * Threshold is sum of panel jitter time, prefill line time
  3300. * plus 64usec buffer time.
  3301. */
  3302. min_threshold_us = min_threshold_us + 64 + prefill_time_us;
  3303. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3304. if (timing->clk_rate_hz) {
  3305. /* adjust the transfer time proportionately for bit clk*/
  3306. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3307. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3308. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3309. } else if (mode->priv_info->mdp_transfer_time_us) {
  3310. max_transfer_us = frame_time_us - min_threshold_us;
  3311. mode->priv_info->mdp_transfer_time_us = min(
  3312. mode->priv_info->mdp_transfer_time_us,
  3313. max_transfer_us);
  3314. timing->dsi_transfer_time_us =
  3315. mode->priv_info->mdp_transfer_time_us;
  3316. } else {
  3317. if (min_threshold_us > frame_threshold_us)
  3318. frame_threshold_us = min_threshold_us;
  3319. timing->dsi_transfer_time_us = frame_time_us -
  3320. frame_threshold_us;
  3321. }
  3322. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3323. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3324. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3325. timing->mdp_transfer_time_us =
  3326. mode->priv_info->mdp_transfer_time_us;
  3327. }
  3328. /* Calculate pclk_khz to update modeinfo */
  3329. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3330. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3331. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3332. do_div(pixel_clk_khz, config->bpp);
  3333. display_mode->pixel_clk_khz = pixel_clk_khz;
  3334. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3335. }
  3336. int dsi_panel_get_mode(struct dsi_panel *panel,
  3337. u32 index, struct dsi_display_mode *mode,
  3338. int topology_override)
  3339. {
  3340. struct device_node *timings_np, *child_np;
  3341. struct dsi_parser_utils *utils;
  3342. struct dsi_display_mode_priv_info *prv_info;
  3343. u32 child_idx = 0;
  3344. int rc = 0, num_timings;
  3345. int traffic_mode;
  3346. void *utils_data = NULL;
  3347. if (!panel || !mode) {
  3348. DSI_ERR("invalid params\n");
  3349. return -EINVAL;
  3350. }
  3351. mutex_lock(&panel->panel_lock);
  3352. utils = &panel->utils;
  3353. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3354. if (!mode->priv_info) {
  3355. rc = -ENOMEM;
  3356. goto done;
  3357. }
  3358. prv_info = mode->priv_info;
  3359. timings_np = utils->get_child_by_name(utils->data,
  3360. "qcom,mdss-dsi-display-timings");
  3361. if (!timings_np) {
  3362. DSI_ERR("no display timing nodes defined\n");
  3363. rc = -EINVAL;
  3364. goto parse_fail;
  3365. }
  3366. num_timings = utils->get_child_count(timings_np);
  3367. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3368. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3369. rc = -EINVAL;
  3370. goto parse_fail;
  3371. }
  3372. utils_data = utils->data;
  3373. traffic_mode = panel->video_config.traffic_mode;
  3374. dsi_for_each_child_node(timings_np, child_np) {
  3375. if (index != child_idx++)
  3376. continue;
  3377. utils->data = child_np;
  3378. if (panel->panel_mode_switch_enabled) {
  3379. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3380. mode->panel_mode_caps = panel->panel_mode;
  3381. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3382. child_idx);
  3383. }
  3384. } else {
  3385. mode->panel_mode_caps = panel->panel_mode;
  3386. }
  3387. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3388. if (rc) {
  3389. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3390. goto parse_fail;
  3391. }
  3392. rc = dsi_panel_parse_dsc_params(mode, utils);
  3393. if (rc) {
  3394. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3395. goto parse_fail;
  3396. }
  3397. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3398. if (rc) {
  3399. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3400. goto parse_fail;
  3401. }
  3402. rc = dsi_panel_parse_topology(prv_info, utils,
  3403. topology_override);
  3404. if (rc) {
  3405. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3406. goto parse_fail;
  3407. }
  3408. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3409. if (rc) {
  3410. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3411. goto parse_fail;
  3412. }
  3413. rc = dsi_panel_parse_jitter_config(mode, utils);
  3414. if (rc)
  3415. DSI_ERR(
  3416. "failed to parse panel jitter config, rc=%d\n", rc);
  3417. rc = dsi_panel_parse_phy_timing(mode, utils);
  3418. if (rc) {
  3419. DSI_ERR(
  3420. "failed to parse panel phy timings, rc=%d\n", rc);
  3421. goto parse_fail;
  3422. }
  3423. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3424. if (rc)
  3425. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3426. }
  3427. goto done;
  3428. parse_fail:
  3429. kfree(mode->priv_info);
  3430. mode->priv_info = NULL;
  3431. done:
  3432. utils->data = utils_data;
  3433. mutex_unlock(&panel->panel_lock);
  3434. return rc;
  3435. }
  3436. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3437. struct dsi_display_mode *mode,
  3438. struct dsi_host_config *config)
  3439. {
  3440. int rc = 0;
  3441. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3442. if (!panel || !mode || !config) {
  3443. DSI_ERR("invalid params\n");
  3444. return -EINVAL;
  3445. }
  3446. mutex_lock(&panel->panel_lock);
  3447. config->panel_mode = panel->panel_mode;
  3448. memcpy(&config->common_config, &panel->host_config,
  3449. sizeof(config->common_config));
  3450. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3451. memcpy(&config->u.video_engine, &panel->video_config,
  3452. sizeof(config->u.video_engine));
  3453. } else {
  3454. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3455. sizeof(config->u.cmd_engine));
  3456. }
  3457. memcpy(&config->video_timing, &mode->timing,
  3458. sizeof(config->video_timing));
  3459. config->video_timing.mdp_transfer_time_us =
  3460. mode->priv_info->mdp_transfer_time_us;
  3461. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3462. config->video_timing.dsc = &mode->priv_info->dsc;
  3463. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3464. config->video_timing.vdc = &mode->priv_info->vdc;
  3465. if (dyn_clk_caps->dyn_clk_support)
  3466. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3467. else
  3468. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3469. config->esc_clk_rate_hz = 19200000;
  3470. mutex_unlock(&panel->panel_lock);
  3471. return rc;
  3472. }
  3473. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3474. {
  3475. int rc = 0;
  3476. if (!panel) {
  3477. DSI_ERR("invalid params\n");
  3478. return -EINVAL;
  3479. }
  3480. mutex_lock(&panel->panel_lock);
  3481. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3482. if (panel->lp11_init)
  3483. goto error;
  3484. rc = dsi_panel_power_on(panel);
  3485. if (rc) {
  3486. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3487. goto error;
  3488. }
  3489. error:
  3490. mutex_unlock(&panel->panel_lock);
  3491. return rc;
  3492. }
  3493. int dsi_panel_update_pps(struct dsi_panel *panel)
  3494. {
  3495. int rc = 0;
  3496. struct dsi_panel_cmd_set *set = NULL;
  3497. struct dsi_display_mode_priv_info *priv_info = NULL;
  3498. if (!panel || !panel->cur_mode) {
  3499. DSI_ERR("invalid params\n");
  3500. return -EINVAL;
  3501. }
  3502. mutex_lock(&panel->panel_lock);
  3503. priv_info = panel->cur_mode->priv_info;
  3504. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3505. if (priv_info->dsc_enabled)
  3506. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3507. panel->dce_pps_cmd, 0,
  3508. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3509. else if (priv_info->vdc_enabled)
  3510. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3511. panel->dce_pps_cmd, 0,
  3512. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3513. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3514. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3515. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3516. if (rc) {
  3517. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3518. goto error;
  3519. }
  3520. }
  3521. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3522. if (rc) {
  3523. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3524. panel->name, rc);
  3525. }
  3526. dsi_panel_destroy_cmd_packets(set);
  3527. error:
  3528. mutex_unlock(&panel->panel_lock);
  3529. return rc;
  3530. }
  3531. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3532. {
  3533. int rc = 0;
  3534. if (!panel) {
  3535. DSI_ERR("invalid params\n");
  3536. return -EINVAL;
  3537. }
  3538. mutex_lock(&panel->panel_lock);
  3539. if (!panel->panel_initialized)
  3540. goto exit;
  3541. /*
  3542. * Consider LP1->LP2->LP1.
  3543. * If the panel is already in LP mode, do not need to
  3544. * set the regulator.
  3545. * IBB and AB power mode would be set at the same time
  3546. * in PMIC driver, so we only call ibb setting that is enough.
  3547. */
  3548. if (dsi_panel_is_type_oled(panel) &&
  3549. panel->power_mode != SDE_MODE_DPMS_LP2)
  3550. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3551. "ibb", REGULATOR_MODE_IDLE);
  3552. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3553. if (rc)
  3554. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3555. panel->name, rc);
  3556. exit:
  3557. mutex_unlock(&panel->panel_lock);
  3558. return rc;
  3559. }
  3560. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3561. {
  3562. int rc = 0;
  3563. if (!panel) {
  3564. DSI_ERR("invalid params\n");
  3565. return -EINVAL;
  3566. }
  3567. mutex_lock(&panel->panel_lock);
  3568. if (!panel->panel_initialized)
  3569. goto exit;
  3570. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3571. if (rc)
  3572. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3573. panel->name, rc);
  3574. exit:
  3575. mutex_unlock(&panel->panel_lock);
  3576. return rc;
  3577. }
  3578. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3579. {
  3580. int rc = 0;
  3581. if (!panel) {
  3582. DSI_ERR("invalid params\n");
  3583. return -EINVAL;
  3584. }
  3585. mutex_lock(&panel->panel_lock);
  3586. if (!panel->panel_initialized)
  3587. goto exit;
  3588. /*
  3589. * Consider about LP1->LP2->NOLP.
  3590. */
  3591. if (dsi_panel_is_type_oled(panel) &&
  3592. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3593. panel->power_mode == SDE_MODE_DPMS_LP2))
  3594. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3595. "ibb", REGULATOR_MODE_NORMAL);
  3596. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3597. if (rc)
  3598. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3599. panel->name, rc);
  3600. exit:
  3601. mutex_unlock(&panel->panel_lock);
  3602. return rc;
  3603. }
  3604. int dsi_panel_prepare(struct dsi_panel *panel)
  3605. {
  3606. int rc = 0;
  3607. if (!panel) {
  3608. DSI_ERR("invalid params\n");
  3609. return -EINVAL;
  3610. }
  3611. mutex_lock(&panel->panel_lock);
  3612. if (panel->lp11_init) {
  3613. rc = dsi_panel_power_on(panel);
  3614. if (rc) {
  3615. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3616. panel->name, rc);
  3617. goto error;
  3618. }
  3619. }
  3620. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3621. if (rc) {
  3622. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3623. panel->name, rc);
  3624. goto error;
  3625. }
  3626. error:
  3627. mutex_unlock(&panel->panel_lock);
  3628. return rc;
  3629. }
  3630. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3631. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3632. {
  3633. static const int ROI_CMD_LEN = 5;
  3634. int rc = 0;
  3635. /* DTYPE_DCS_LWRITE */
  3636. char *caset, *paset;
  3637. set->cmds = NULL;
  3638. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3639. if (!caset) {
  3640. rc = -ENOMEM;
  3641. goto exit;
  3642. }
  3643. caset[0] = 0x2a;
  3644. caset[1] = (roi->x & 0xFF00) >> 8;
  3645. caset[2] = roi->x & 0xFF;
  3646. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3647. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3648. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3649. if (!paset) {
  3650. rc = -ENOMEM;
  3651. goto error_free_mem;
  3652. }
  3653. paset[0] = 0x2b;
  3654. paset[1] = (roi->y & 0xFF00) >> 8;
  3655. paset[2] = roi->y & 0xFF;
  3656. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3657. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3658. set->type = DSI_CMD_SET_ROI;
  3659. set->state = DSI_CMD_SET_STATE_LP;
  3660. set->count = 2; /* send caset + paset together */
  3661. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3662. if (!set->cmds) {
  3663. rc = -ENOMEM;
  3664. goto error_free_mem;
  3665. }
  3666. set->cmds[0].msg.channel = 0;
  3667. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3668. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3669. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3670. set->cmds[0].msg.tx_buf = caset;
  3671. set->cmds[0].msg.rx_len = 0;
  3672. set->cmds[0].msg.rx_buf = 0;
  3673. set->cmds[0].last_command = 0;
  3674. set->cmds[0].post_wait_ms = 0;
  3675. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3676. set->cmds[1].msg.channel = 0;
  3677. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3678. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3679. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3680. set->cmds[1].msg.tx_buf = paset;
  3681. set->cmds[1].msg.rx_len = 0;
  3682. set->cmds[1].msg.rx_buf = 0;
  3683. set->cmds[1].last_command = 1;
  3684. set->cmds[1].post_wait_ms = 0;
  3685. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3686. goto exit;
  3687. error_free_mem:
  3688. kfree(caset);
  3689. kfree(paset);
  3690. kfree(set->cmds);
  3691. exit:
  3692. return rc;
  3693. }
  3694. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3695. int ctrl_idx)
  3696. {
  3697. int rc = 0;
  3698. if (!panel) {
  3699. DSI_ERR("invalid params\n");
  3700. return -EINVAL;
  3701. }
  3702. mutex_lock(&panel->panel_lock);
  3703. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3704. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3705. if (rc)
  3706. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3707. panel->name, rc);
  3708. mutex_unlock(&panel->panel_lock);
  3709. return rc;
  3710. }
  3711. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3712. int ctrl_idx)
  3713. {
  3714. int rc = 0;
  3715. if (!panel) {
  3716. DSI_ERR("invalid params\n");
  3717. return -EINVAL;
  3718. }
  3719. mutex_lock(&panel->panel_lock);
  3720. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3721. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3722. if (rc)
  3723. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3724. panel->name, rc);
  3725. mutex_unlock(&panel->panel_lock);
  3726. return rc;
  3727. }
  3728. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3729. struct dsi_rect *roi)
  3730. {
  3731. int rc = 0;
  3732. struct dsi_panel_cmd_set *set;
  3733. struct dsi_display_mode_priv_info *priv_info;
  3734. if (!panel || !panel->cur_mode) {
  3735. DSI_ERR("Invalid params\n");
  3736. return -EINVAL;
  3737. }
  3738. priv_info = panel->cur_mode->priv_info;
  3739. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3740. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3741. if (rc) {
  3742. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3743. panel->name, rc);
  3744. return rc;
  3745. }
  3746. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3747. roi->x, roi->y, roi->w, roi->h);
  3748. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3749. mutex_lock(&panel->panel_lock);
  3750. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3751. if (rc)
  3752. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3753. panel->name, rc);
  3754. mutex_unlock(&panel->panel_lock);
  3755. dsi_panel_destroy_cmd_packets(set);
  3756. dsi_panel_dealloc_cmd_packets(set);
  3757. return rc;
  3758. }
  3759. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3760. {
  3761. int rc = 0;
  3762. if (!panel) {
  3763. DSI_ERR("Invalid params\n");
  3764. return -EINVAL;
  3765. }
  3766. mutex_lock(&panel->panel_lock);
  3767. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3768. if (rc)
  3769. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3770. panel->name, rc);
  3771. mutex_unlock(&panel->panel_lock);
  3772. return rc;
  3773. }
  3774. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3775. {
  3776. int rc = 0;
  3777. if (!panel) {
  3778. DSI_ERR("Invalid params\n");
  3779. return -EINVAL;
  3780. }
  3781. mutex_lock(&panel->panel_lock);
  3782. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3783. if (rc)
  3784. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3785. panel->name, rc);
  3786. mutex_unlock(&panel->panel_lock);
  3787. return rc;
  3788. }
  3789. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3790. {
  3791. int rc = 0;
  3792. if (!panel) {
  3793. DSI_ERR("Invalid params\n");
  3794. return -EINVAL;
  3795. }
  3796. mutex_lock(&panel->panel_lock);
  3797. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3798. if (rc)
  3799. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3800. panel->name, rc);
  3801. mutex_unlock(&panel->panel_lock);
  3802. return rc;
  3803. }
  3804. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3805. {
  3806. int rc = 0;
  3807. if (!panel) {
  3808. DSI_ERR("Invalid params\n");
  3809. return -EINVAL;
  3810. }
  3811. mutex_lock(&panel->panel_lock);
  3812. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3813. if (rc)
  3814. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3815. panel->name, rc);
  3816. mutex_unlock(&panel->panel_lock);
  3817. return rc;
  3818. }
  3819. int dsi_panel_switch(struct dsi_panel *panel)
  3820. {
  3821. int rc = 0;
  3822. if (!panel) {
  3823. DSI_ERR("Invalid params\n");
  3824. return -EINVAL;
  3825. }
  3826. mutex_lock(&panel->panel_lock);
  3827. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3828. if (rc)
  3829. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3830. panel->name, rc);
  3831. mutex_unlock(&panel->panel_lock);
  3832. return rc;
  3833. }
  3834. int dsi_panel_post_switch(struct dsi_panel *panel)
  3835. {
  3836. int rc = 0;
  3837. if (!panel) {
  3838. DSI_ERR("Invalid params\n");
  3839. return -EINVAL;
  3840. }
  3841. mutex_lock(&panel->panel_lock);
  3842. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3843. if (rc)
  3844. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3845. panel->name, rc);
  3846. mutex_unlock(&panel->panel_lock);
  3847. return rc;
  3848. }
  3849. int dsi_panel_enable(struct dsi_panel *panel)
  3850. {
  3851. int rc = 0;
  3852. if (!panel) {
  3853. DSI_ERR("Invalid params\n");
  3854. return -EINVAL;
  3855. }
  3856. mutex_lock(&panel->panel_lock);
  3857. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3858. if (rc) {
  3859. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3860. panel->name, rc);
  3861. goto error;
  3862. }
  3863. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3864. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  3865. if (rc) {
  3866. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  3867. panel->name, rc);
  3868. goto error;
  3869. }
  3870. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3871. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  3872. if (rc) {
  3873. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  3874. panel->name, rc);
  3875. goto error;
  3876. }
  3877. }
  3878. panel->panel_initialized = true;
  3879. error:
  3880. mutex_unlock(&panel->panel_lock);
  3881. return rc;
  3882. }
  3883. int dsi_panel_post_enable(struct dsi_panel *panel)
  3884. {
  3885. int rc = 0;
  3886. if (!panel) {
  3887. DSI_ERR("invalid params\n");
  3888. return -EINVAL;
  3889. }
  3890. mutex_lock(&panel->panel_lock);
  3891. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3892. if (rc) {
  3893. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3894. panel->name, rc);
  3895. goto error;
  3896. }
  3897. error:
  3898. mutex_unlock(&panel->panel_lock);
  3899. return rc;
  3900. }
  3901. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3902. {
  3903. int rc = 0;
  3904. if (!panel) {
  3905. DSI_ERR("invalid params\n");
  3906. return -EINVAL;
  3907. }
  3908. mutex_lock(&panel->panel_lock);
  3909. if (gpio_is_valid(panel->bl_config.en_gpio))
  3910. gpio_set_value(panel->bl_config.en_gpio, 0);
  3911. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3912. if (rc) {
  3913. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3914. panel->name, rc);
  3915. goto error;
  3916. }
  3917. error:
  3918. mutex_unlock(&panel->panel_lock);
  3919. return rc;
  3920. }
  3921. int dsi_panel_disable(struct dsi_panel *panel)
  3922. {
  3923. int rc = 0;
  3924. if (!panel) {
  3925. DSI_ERR("invalid params\n");
  3926. return -EINVAL;
  3927. }
  3928. mutex_lock(&panel->panel_lock);
  3929. /* Avoid sending panel off commands when ESD recovery is underway */
  3930. if (!atomic_read(&panel->esd_recovery_pending)) {
  3931. /*
  3932. * Need to set IBB/AB regulator mode to STANDBY,
  3933. * if panel is going off from AOD mode.
  3934. */
  3935. if (dsi_panel_is_type_oled(panel) &&
  3936. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3937. panel->power_mode == SDE_MODE_DPMS_LP2))
  3938. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3939. "ibb", REGULATOR_MODE_STANDBY);
  3940. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3941. if (rc) {
  3942. /*
  3943. * Sending panel off commands may fail when DSI
  3944. * controller is in a bad state. These failures can be
  3945. * ignored since controller will go for full reset on
  3946. * subsequent display enable anyway.
  3947. */
  3948. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3949. panel->name, rc);
  3950. rc = 0;
  3951. }
  3952. }
  3953. panel->panel_initialized = false;
  3954. panel->power_mode = SDE_MODE_DPMS_OFF;
  3955. mutex_unlock(&panel->panel_lock);
  3956. return rc;
  3957. }
  3958. int dsi_panel_unprepare(struct dsi_panel *panel)
  3959. {
  3960. int rc = 0;
  3961. if (!panel) {
  3962. DSI_ERR("invalid params\n");
  3963. return -EINVAL;
  3964. }
  3965. mutex_lock(&panel->panel_lock);
  3966. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3967. if (rc) {
  3968. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3969. panel->name, rc);
  3970. goto error;
  3971. }
  3972. error:
  3973. mutex_unlock(&panel->panel_lock);
  3974. return rc;
  3975. }
  3976. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3977. {
  3978. int rc = 0;
  3979. if (!panel) {
  3980. DSI_ERR("invalid params\n");
  3981. return -EINVAL;
  3982. }
  3983. mutex_lock(&panel->panel_lock);
  3984. rc = dsi_panel_power_off(panel);
  3985. if (rc) {
  3986. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3987. panel->name, rc);
  3988. goto error;
  3989. }
  3990. error:
  3991. mutex_unlock(&panel->panel_lock);
  3992. return rc;
  3993. }