msm_cvp_internal.h 9.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef _MSM_CVP_INTERNAL_H_
  6. #define _MSM_CVP_INTERNAL_H_
  7. #include <linux/atomic.h>
  8. #include <linux/list.h>
  9. #include <linux/time.h>
  10. #include <linux/types.h>
  11. #include <linux/completion.h>
  12. #include <linux/wait.h>
  13. #include <linux/workqueue.h>
  14. #include <linux/interconnect.h>
  15. #include <linux/kref.h>
  16. #include <linux/cdev.h>
  17. #include <linux/slab.h>
  18. #include <linux/kthread.h>
  19. #include <linux/dma-mapping.h>
  20. #include "msm_cvp_core.h"
  21. #include <media/msm_eva_private.h>
  22. #include "cvp_hfi_api.h"
  23. #include "cvp_hfi_helper.h"
  24. #include <synx_api.h>
  25. #define MAX_SUPPORTED_INSTANCES 16
  26. #define MAX_DEBUGFS_NAME 50
  27. #define MAX_DSP_INIT_ATTEMPTS 16
  28. #define FENCE_WAIT_SIGNAL_TIMEOUT 100
  29. #define FENCE_WAIT_SIGNAL_RETRY_TIMES 20
  30. #define FENCE_BIT (1ULL << 63)
  31. #define FENCE_DMM_ICA_ENABLED_IDX 0
  32. #define FENCE_DMM_DS_IDX 1
  33. #define FENCE_DMM_OUTPUT_IDX 7
  34. #define SYS_MSG_START HAL_SYS_INIT_DONE
  35. #define SYS_MSG_END HAL_SYS_ERROR
  36. #define SESSION_MSG_START HAL_SESSION_EVENT_CHANGE
  37. #define SESSION_MSG_END HAL_SESSION_ERROR
  38. #define SYS_MSG_INDEX(__msg) (__msg - SYS_MSG_START)
  39. #define SESSION_MSG_INDEX(__msg) (__msg - SESSION_MSG_START)
  40. #define ARP_BUF_SIZE 0x300000
  41. #define CVP_RT_PRIO_THRESHOLD 1
  42. struct msm_cvp_inst;
  43. enum cvp_core_state {
  44. CVP_CORE_UNINIT = 0,
  45. CVP_CORE_INIT,
  46. CVP_CORE_INIT_DONE,
  47. };
  48. /*
  49. * Do not change the enum values unless
  50. * you know what you are doing
  51. */
  52. enum hw_block {
  53. CVP_FDU = 0x0001,
  54. CVP_ICA,
  55. CVP_MPU,
  56. CVP_OD
  57. };
  58. enum instance_state {
  59. MSM_CVP_CORE_UNINIT_DONE = 0x0001,
  60. MSM_CVP_CORE_INIT,
  61. MSM_CVP_CORE_INIT_DONE,
  62. MSM_CVP_OPEN,
  63. MSM_CVP_OPEN_DONE,
  64. MSM_CVP_CLOSE,
  65. MSM_CVP_CLOSE_DONE,
  66. MSM_CVP_CORE_UNINIT,
  67. MSM_CVP_CORE_INVALID
  68. };
  69. enum dsp_state {
  70. DSP_INVALID,
  71. DSP_UNINIT,
  72. DSP_PROBED,
  73. DSP_READY,
  74. DSP_SUSPEND,
  75. DSP_INACTIVE,
  76. };
  77. struct msm_cvp_common_data {
  78. char key[128];
  79. int value;
  80. };
  81. enum sku_version {
  82. SKU_VERSION_0 = 0,
  83. SKU_VERSION_1,
  84. SKU_VERSION_2,
  85. };
  86. enum vpu_version {
  87. VPU_VERSION_4 = 1,
  88. VPU_VERSION_5,
  89. };
  90. struct msm_cvp_ubwc_config_data {
  91. struct {
  92. u32 max_channel_override : 1;
  93. u32 mal_length_override : 1;
  94. u32 hb_override : 1;
  95. u32 bank_swzl_level_override : 1;
  96. u32 bank_spreading_override : 1;
  97. u32 reserved : 27;
  98. } override_bit_info;
  99. u32 max_channels;
  100. u32 mal_length;
  101. u32 highest_bank_bit;
  102. u32 bank_swzl_level;
  103. u32 bank_spreading;
  104. };
  105. struct msm_cvp_qos_setting {
  106. u32 axi_qos;
  107. u32 prioritylut_low;
  108. u32 prioritylut_high;
  109. u32 urgency_low;
  110. u32 dangerlut_low;
  111. u32 safelut_low;
  112. };
  113. struct msm_cvp_platform_data {
  114. struct msm_cvp_common_data *common_data;
  115. unsigned int common_data_length;
  116. unsigned int sku_version;
  117. uint32_t vpu_ver;
  118. unsigned int vm_id; /* pvm: 1; tvm: 2 */
  119. struct msm_cvp_ubwc_config_data *ubwc_config;
  120. struct msm_cvp_qos_setting *noc_qos;
  121. };
  122. struct msm_cvp_drv {
  123. struct mutex lock;
  124. struct list_head cores;
  125. int num_cores;
  126. struct dentry *debugfs_root;
  127. int thermal_level;
  128. u32 sku_version;
  129. struct kmem_cache *msg_cache;
  130. struct kmem_cache *frame_cache;
  131. struct kmem_cache *buf_cache;
  132. struct kmem_cache *smem_cache;
  133. char fw_version[CVP_VERSION_LENGTH];
  134. };
  135. enum profiling_points {
  136. SYS_INIT = 0,
  137. SESSION_INIT,
  138. LOAD_RESOURCES,
  139. FRAME_PROCESSING,
  140. FW_IDLE,
  141. MAX_PROFILING_POINTS,
  142. };
  143. struct cvp_clock_data {
  144. int buffer_counter;
  145. int load;
  146. int load_low;
  147. int load_norm;
  148. int load_high;
  149. int min_threshold;
  150. int max_threshold;
  151. unsigned long bitrate;
  152. unsigned long min_freq;
  153. unsigned long curr_freq;
  154. u32 ddr_bw;
  155. u32 sys_cache_bw;
  156. u32 operating_rate;
  157. u32 core_id;
  158. bool low_latency_mode;
  159. bool turbo_mode;
  160. };
  161. struct cvp_profile_data {
  162. int start;
  163. int stop;
  164. int cumulative;
  165. char name[64];
  166. int sampling;
  167. int average;
  168. };
  169. struct msm_cvp_debug {
  170. struct cvp_profile_data pdata[MAX_PROFILING_POINTS];
  171. int profile;
  172. int samples;
  173. };
  174. enum msm_cvp_modes {
  175. CVP_SECURE = BIT(0),
  176. CVP_TURBO = BIT(1),
  177. CVP_THUMBNAIL = BIT(2),
  178. CVP_LOW_POWER = BIT(3),
  179. CVP_REALTIME = BIT(4),
  180. };
  181. #define MAX_NUM_MSGS_PER_SESSION 128
  182. #define CVP_MAX_WAIT_TIME 2000
  183. struct cvp_session_msg {
  184. struct list_head node;
  185. struct cvp_hfi_msg_session_hdr_ext pkt;
  186. };
  187. struct cvp_session_queue {
  188. spinlock_t lock;
  189. enum queue_state state;
  190. unsigned int msg_count;
  191. struct list_head msgs;
  192. wait_queue_head_t wq;
  193. };
  194. #define CVP_CYCLE_STAT_SIZE 8
  195. struct cvp_cycle_stat {
  196. u32 busy[CVP_CYCLE_STAT_SIZE];
  197. u32 total;
  198. u32 idx;
  199. u32 size;
  200. };
  201. struct cvp_cycle_info {
  202. u32 sum_fps[HFI_MAX_HW_THREADS];
  203. u32 hi_ctrl_lim[HFI_MAX_HW_THREADS];
  204. u32 lo_ctrl_lim[HFI_MAX_HW_THREADS];
  205. struct cvp_cycle_stat cycle[HFI_MAX_HW_THREADS];
  206. unsigned long conf_freq;
  207. };
  208. struct cvp_session_prop {
  209. u32 type;
  210. u32 kernel_mask;
  211. u32 priority;
  212. u32 is_secure;
  213. u32 dsp_mask;
  214. u32 fthread_nr;
  215. u32 fdu_cycles;
  216. u32 od_cycles;
  217. u32 mpu_cycles;
  218. u32 ica_cycles;
  219. u32 fw_cycles;
  220. u32 fdu_op_cycles;
  221. u32 od_op_cycles;
  222. u32 mpu_op_cycles;
  223. u32 ica_op_cycles;
  224. u32 fw_op_cycles;
  225. u32 ddr_bw;
  226. u32 ddr_op_bw;
  227. u32 ddr_cache;
  228. u32 ddr_op_cache;
  229. u32 fps[HFI_MAX_HW_THREADS];
  230. u32 dump_offset;
  231. u32 dump_size;
  232. };
  233. enum cvp_event_t {
  234. CVP_NO_EVENT,
  235. CVP_SSR_EVENT = 1,
  236. CVP_SYS_ERROR_EVENT,
  237. CVP_MAX_CLIENTS_EVENT,
  238. CVP_HW_UNSUPPORTED_EVENT,
  239. CVP_INVALID_EVENT,
  240. CVP_DUMP_EVENT,
  241. };
  242. struct cvp_session_event {
  243. spinlock_t lock;
  244. enum cvp_event_t event;
  245. wait_queue_head_t wq;
  246. };
  247. #define MAX_ENTRIES 64
  248. struct smem_data {
  249. u32 size;
  250. u32 flags;
  251. u32 device_addr;
  252. u32 bitmap_index;
  253. u32 refcount;
  254. u32 pkt_type;
  255. u32 buf_idx;
  256. };
  257. struct cvp_buf_data {
  258. u32 device_addr;
  259. u32 size;
  260. };
  261. struct inst_snapshot {
  262. void *session;
  263. u32 smem_index;
  264. u32 dsp_index;
  265. u32 persist_index;
  266. struct smem_data smem_log[MAX_ENTRIES];
  267. struct cvp_buf_data dsp_buf_log[MAX_ENTRIES];
  268. struct cvp_buf_data persist_buf_log[MAX_ENTRIES];
  269. };
  270. struct cvp_noc_log {
  271. u32 used;
  272. u32 err_ctrl_swid_low;
  273. u32 err_ctrl_swid_high;
  274. u32 err_ctrl_mainctl_low;
  275. u32 err_ctrl_errvld_low;
  276. u32 err_ctrl_errclr_low;
  277. u32 err_ctrl_errlog0_low;
  278. u32 err_ctrl_errlog0_high;
  279. u32 err_ctrl_errlog1_low;
  280. u32 err_ctrl_errlog1_high;
  281. u32 err_ctrl_errlog2_low;
  282. u32 err_ctrl_errlog2_high;
  283. u32 err_ctrl_errlog3_low;
  284. u32 err_ctrl_errlog3_high;
  285. u32 err_core_swid_low;
  286. u32 err_core_swid_high;
  287. u32 err_core_mainctl_low;
  288. u32 err_core_errvld_low;
  289. u32 err_core_errclr_low;
  290. u32 err_core_errlog0_low;
  291. u32 err_core_errlog0_high;
  292. u32 err_core_errlog1_low;
  293. u32 err_core_errlog1_high;
  294. u32 err_core_errlog2_low;
  295. u32 err_core_errlog2_high;
  296. u32 err_core_errlog3_low;
  297. u32 err_core_errlog3_high;
  298. u32 arp_test_bus[16];
  299. u32 dma_test_bus[512];
  300. };
  301. struct cvp_debug_log {
  302. struct cvp_noc_log noc_log;
  303. u32 snapshot_index;
  304. struct inst_snapshot snapshot[16];
  305. };
  306. struct msm_cvp_core {
  307. struct list_head list;
  308. struct mutex lock;
  309. struct mutex clk_lock;
  310. int id;
  311. dev_t dev_num;
  312. struct cdev cdev;
  313. struct class *class;
  314. struct device *dev;
  315. struct cvp_hfi_device *device;
  316. struct msm_cvp_platform_data *platform_data;
  317. struct msm_cvp_synx_ops *synx_ftbl;
  318. struct list_head instances;
  319. struct dentry *debugfs_root;
  320. enum cvp_core_state state;
  321. struct completion completions[SYS_MSG_END - SYS_MSG_START + 1];
  322. enum msm_cvp_hfi_type hfi_type;
  323. struct msm_cvp_platform_resources resources;
  324. struct msm_cvp_capability *capabilities;
  325. struct delayed_work fw_unload_work;
  326. struct work_struct ssr_work;
  327. enum hal_ssr_trigger_type ssr_type;
  328. u32 smmu_fault_count;
  329. u32 last_fault_addr;
  330. u32 ssr_count;
  331. bool trigger_ssr;
  332. unsigned long curr_freq;
  333. unsigned long orig_core_sum;
  334. struct cvp_cycle_info dyn_clk;
  335. atomic64_t kernel_trans_id;
  336. struct cvp_debug_log log;
  337. };
  338. struct msm_cvp_inst {
  339. struct list_head list;
  340. struct list_head dsp_list;
  341. struct mutex sync_lock, lock;
  342. struct msm_cvp_core *core;
  343. enum session_type session_type;
  344. u32 process_id;
  345. struct task_struct *task;
  346. struct cvp_session_queue session_queue;
  347. struct cvp_session_queue session_queue_fence;
  348. struct cvp_session_event event_handler;
  349. void *session;
  350. enum instance_state state;
  351. struct msm_cvp_list freqs;
  352. struct msm_cvp_list persistbufs;
  353. struct cvp_dmamap_cache dma_cache;
  354. struct msm_cvp_list cvpdspbufs;
  355. struct msm_cvp_list cvpwnccbufs;
  356. struct msm_cvp_list frames;
  357. u32 cvpwnccbufs_num;
  358. struct msm_cvp_wncc_buffer* cvpwnccbufs_table;
  359. struct completion completions[SESSION_MSG_END - SESSION_MSG_START + 1];
  360. struct dentry *debugfs_root;
  361. struct msm_cvp_debug debug;
  362. struct cvp_clock_data clk_data;
  363. enum msm_cvp_modes flags;
  364. struct msm_cvp_capability capability;
  365. struct kref kref;
  366. struct cvp_session_prop prop;
  367. /* error_code will be cleared after being returned to user mode */
  368. u32 error_code;
  369. /* prev_error_code saves value of error_code before it's cleared */
  370. u32 prev_error_code;
  371. struct synx_session synx_session_id;
  372. struct cvp_fence_queue fence_cmd_queue;
  373. };
  374. extern struct msm_cvp_drv *cvp_driver;
  375. void cvp_handle_cmd_response(enum hal_command_response cmd, void *data);
  376. int msm_cvp_trigger_ssr(struct msm_cvp_core *core,
  377. enum hal_ssr_trigger_type type);
  378. int msm_cvp_noc_error_info(struct msm_cvp_core *core);
  379. void msm_cvp_comm_handle_thermal_event(void);
  380. void msm_cvp_fw_unload_handler(struct work_struct *work);
  381. void msm_cvp_ssr_handler(struct work_struct *work);
  382. /*
  383. * XXX: normally should be in msm_cvp_core.h, but that's meant for public APIs,
  384. * whereas this is private
  385. */
  386. int msm_cvp_destroy(struct msm_cvp_inst *inst);
  387. void *cvp_get_drv_data(struct device *dev);
  388. #endif