cvp_hfi.c 117 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <asm/memory.h>
  6. #include <linux/coresight-stm.h>
  7. #include <linux/delay.h>
  8. #include <linux/devfreq.h>
  9. #include <linux/hash.h>
  10. #include <linux/io.h>
  11. #include <linux/iommu.h>
  12. #include <linux/iopoll.h>
  13. #include <linux/of.h>
  14. #include <linux/pm_qos.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/slab.h>
  17. #include <linux/workqueue.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/soc/qcom/llcc-qcom.h>
  20. #include <linux/qcom_scm.h>
  21. #include <linux/soc/qcom/smem.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/reset.h>
  24. #include <linux/pm_wakeup.h>
  25. #include "hfi_packetization.h"
  26. #include "msm_cvp_debug.h"
  27. #include "cvp_core_hfi.h"
  28. #include "cvp_hfi_helper.h"
  29. #include "cvp_hfi_io.h"
  30. #include "msm_cvp_dsp.h"
  31. #include "msm_cvp_clocks.h"
  32. #include "vm/cvp_vm.h"
  33. #include "cvp_dump.h"
  34. #define REG_ADDR_OFFSET_BITMASK 0x000FFFFF
  35. #define QDSS_IOVA_START 0x80001000
  36. #define MIN_PAYLOAD_SIZE 3
  37. struct cvp_tzbsp_memprot {
  38. u32 cp_start;
  39. u32 cp_size;
  40. u32 cp_nonpixel_start;
  41. u32 cp_nonpixel_size;
  42. };
  43. #define TZBSP_PIL_SET_STATE 0xA
  44. #define TZBSP_CVP_PAS_ID 26
  45. /* Poll interval in uS */
  46. #define POLL_INTERVAL_US 50
  47. enum tzbsp_subsys_state {
  48. TZ_SUBSYS_STATE_SUSPEND = 0,
  49. TZ_SUBSYS_STATE_RESUME = 1,
  50. TZ_SUBSYS_STATE_RESTORE_THRESHOLD = 2,
  51. };
  52. const struct msm_cvp_gov_data CVP_DEFAULT_BUS_VOTE = {
  53. .data = NULL,
  54. .data_count = 0,
  55. };
  56. const int cvp_max_packets = 32;
  57. static void iris_hfi_pm_handler(struct work_struct *work);
  58. static DECLARE_DELAYED_WORK(iris_hfi_pm_work, iris_hfi_pm_handler);
  59. static inline int __resume(struct iris_hfi_device *device);
  60. static inline int __suspend(struct iris_hfi_device *device);
  61. static int __disable_regulator(struct iris_hfi_device *device,
  62. const char *name);
  63. static int __enable_regulator(struct iris_hfi_device *device,
  64. const char *name);
  65. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet);
  66. static int __initialize_packetization(struct iris_hfi_device *device);
  67. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  68. u32 session_id);
  69. static bool __is_session_valid(struct iris_hfi_device *device,
  70. struct cvp_hal_session *session, const char *func);
  71. static int __iface_cmdq_write(struct iris_hfi_device *device,
  72. void *pkt);
  73. static int __load_fw(struct iris_hfi_device *device);
  74. static void __unload_fw(struct iris_hfi_device *device);
  75. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state);
  76. static int __enable_subcaches(struct iris_hfi_device *device);
  77. static int __set_subcaches(struct iris_hfi_device *device);
  78. static int __release_subcaches(struct iris_hfi_device *device);
  79. static int __disable_subcaches(struct iris_hfi_device *device);
  80. static int __power_collapse(struct iris_hfi_device *device, bool force);
  81. static int iris_hfi_noc_error_info(void *dev);
  82. static void interrupt_init_iris2(struct iris_hfi_device *device);
  83. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device);
  84. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device);
  85. static int reset_ahb2axi_bridge(struct iris_hfi_device *device);
  86. static void power_off_iris2(struct iris_hfi_device *device);
  87. static int __set_ubwc_config(struct iris_hfi_device *device);
  88. static void __noc_error_info_iris2(struct iris_hfi_device *device);
  89. static int __enable_hw_power_collapse(struct iris_hfi_device *device);
  90. static int __power_off_controller(struct iris_hfi_device *device);
  91. static struct iris_hfi_vpu_ops iris2_ops = {
  92. .interrupt_init = interrupt_init_iris2,
  93. .setup_dsp_uc_memmap = setup_dsp_uc_memmap_vpu5,
  94. .clock_config_on_enable = clock_config_on_enable_vpu5,
  95. .reset_ahb2axi_bridge = reset_ahb2axi_bridge,
  96. .power_off = power_off_iris2,
  97. .noc_error_info = __noc_error_info_iris2,
  98. };
  99. /**
  100. * Utility function to enforce some of our assumptions. Spam calls to this
  101. * in hotspots in code to double check some of the assumptions that we hold.
  102. */
  103. static inline void __strict_check(struct iris_hfi_device *device)
  104. {
  105. msm_cvp_res_handle_fatal_hw_error(device->res,
  106. !mutex_is_locked(&device->lock));
  107. }
  108. static inline void __set_state(struct iris_hfi_device *device,
  109. enum iris_hfi_state state)
  110. {
  111. device->state = state;
  112. }
  113. static inline bool __core_in_valid_state(struct iris_hfi_device *device)
  114. {
  115. return device->state != IRIS_STATE_DEINIT;
  116. }
  117. static inline bool is_sys_cache_present(struct iris_hfi_device *device)
  118. {
  119. return device->res->sys_cache_present;
  120. }
  121. #define ROW_SIZE 32
  122. int get_hfi_version(void)
  123. {
  124. struct msm_cvp_core *core;
  125. struct iris_hfi_device *hfi;
  126. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  127. hfi = (struct iris_hfi_device *)core->device->hfi_device_data;
  128. return hfi->version;
  129. }
  130. unsigned int get_msg_size(struct cvp_hfi_msg_session_hdr *hdr)
  131. {
  132. struct msm_cvp_core *core;
  133. struct iris_hfi_device *device;
  134. u32 minor_ver;
  135. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  136. if (core)
  137. device = core->device->hfi_device_data;
  138. else
  139. return 0;
  140. if (!device) {
  141. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  142. return 0;
  143. }
  144. minor_ver = (device->version & HFI_VERSION_MINOR_MASK) >>
  145. HFI_VERSION_MINOR_SHIFT;
  146. if (minor_ver < 2)
  147. return sizeof(struct cvp_hfi_msg_session_hdr);
  148. if (hdr->packet_type == HFI_MSG_SESSION_CVP_FD)
  149. return sizeof(struct cvp_hfi_msg_session_hdr_ext);
  150. else
  151. return sizeof(struct cvp_hfi_msg_session_hdr);
  152. }
  153. unsigned int get_msg_session_id(void *msg)
  154. {
  155. struct cvp_hfi_msg_session_hdr *hdr =
  156. (struct cvp_hfi_msg_session_hdr *)msg;
  157. return hdr->session_id;
  158. }
  159. unsigned int get_msg_errorcode(void *msg)
  160. {
  161. struct cvp_hfi_msg_session_hdr *hdr =
  162. (struct cvp_hfi_msg_session_hdr *)msg;
  163. return hdr->error_type;
  164. }
  165. int get_msg_opconfigs(void *msg, unsigned int *session_id,
  166. unsigned int *error_type, unsigned int *config_id)
  167. {
  168. struct cvp_hfi_msg_session_op_cfg_packet *cfg =
  169. (struct cvp_hfi_msg_session_op_cfg_packet *)msg;
  170. *session_id = cfg->session_id;
  171. *error_type = cfg->error_type;
  172. *config_id = cfg->op_conf_id;
  173. return 0;
  174. }
  175. static void __dump_packet(u8 *packet, enum cvp_msg_prio log_level)
  176. {
  177. u32 c = 0, packet_size = *(u32 *)packet;
  178. /*
  179. * row must contain enough for 0xdeadbaad * 8 to be converted into
  180. * "de ad ba ab " * 8 + '\0'
  181. */
  182. char row[3 * ROW_SIZE];
  183. for (c = 0; c * ROW_SIZE < packet_size; ++c) {
  184. int bytes_to_read = ((c + 1) * ROW_SIZE > packet_size) ?
  185. packet_size % ROW_SIZE : ROW_SIZE;
  186. hex_dump_to_buffer(packet + c * ROW_SIZE, bytes_to_read,
  187. ROW_SIZE, 4, row, sizeof(row), false);
  188. dprintk(log_level, "%s\n", row);
  189. }
  190. }
  191. static int __dsp_suspend(struct iris_hfi_device *device, bool force, u32 flags)
  192. {
  193. int rc;
  194. struct cvp_hal_session *temp;
  195. if (msm_cvp_dsp_disable)
  196. return 0;
  197. list_for_each_entry(temp, &device->sess_head, list) {
  198. /* if forceful suspend, don't check session pause info */
  199. if (force)
  200. continue;
  201. /* don't suspend if cvp session is not paused */
  202. if (!(temp->flags & SESSION_PAUSE)) {
  203. dprintk(CVP_DSP,
  204. "%s: cvp session %x not paused\n",
  205. __func__, hash32_ptr(temp));
  206. return -EBUSY;
  207. }
  208. }
  209. dprintk(CVP_DSP, "%s: suspend dsp\n", __func__);
  210. rc = cvp_dsp_suspend(flags);
  211. if (rc) {
  212. dprintk(CVP_ERR, "%s: dsp suspend failed with error %d\n",
  213. __func__, rc);
  214. return -EINVAL;
  215. }
  216. dprintk(CVP_DSP, "%s: dsp suspended\n", __func__);
  217. return 0;
  218. }
  219. static int __dsp_resume(struct iris_hfi_device *device, u32 flags)
  220. {
  221. int rc;
  222. if (msm_cvp_dsp_disable)
  223. return 0;
  224. dprintk(CVP_DSP, "%s: resume dsp\n", __func__);
  225. rc = cvp_dsp_resume(flags);
  226. if (rc) {
  227. dprintk(CVP_ERR,
  228. "%s: dsp resume failed with error %d\n",
  229. __func__, rc);
  230. return rc;
  231. }
  232. dprintk(CVP_DSP, "%s: dsp resumed\n", __func__);
  233. return rc;
  234. }
  235. static int __dsp_shutdown(struct iris_hfi_device *device, u32 flags)
  236. {
  237. int rc;
  238. if (msm_cvp_dsp_disable)
  239. return 0;
  240. dprintk(CVP_DSP, "%s: shutdown dsp\n", __func__);
  241. rc = cvp_dsp_shutdown(flags);
  242. if (rc) {
  243. dprintk(CVP_ERR,
  244. "%s: dsp shutdown failed with error %d\n",
  245. __func__, rc);
  246. WARN_ON(1);
  247. }
  248. dprintk(CVP_DSP, "%s: dsp shutdown successful\n", __func__);
  249. return rc;
  250. }
  251. static int __acquire_regulator(struct regulator_info *rinfo,
  252. struct iris_hfi_device *device)
  253. {
  254. int rc = 0;
  255. if (rinfo->has_hw_power_collapse) {
  256. rc = regulator_set_mode(rinfo->regulator,
  257. REGULATOR_MODE_NORMAL);
  258. if (rc) {
  259. /*
  260. * This is somewhat fatal, but nothing we can do
  261. * about it. We can't disable the regulator w/o
  262. * getting it back under s/w control
  263. */
  264. dprintk(CVP_WARN,
  265. "Failed to acquire regulator control: %s\n",
  266. rinfo->name);
  267. } else {
  268. dprintk(CVP_PWR,
  269. "Acquire regulator control from HW: %s\n",
  270. rinfo->name);
  271. }
  272. }
  273. if (!regulator_is_enabled(rinfo->regulator)) {
  274. dprintk(CVP_WARN, "Regulator is not enabled %s\n",
  275. rinfo->name);
  276. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  277. }
  278. return rc;
  279. }
  280. static int __hand_off_regulator(struct regulator_info *rinfo)
  281. {
  282. int rc = 0;
  283. if (rinfo->has_hw_power_collapse) {
  284. rc = regulator_set_mode(rinfo->regulator,
  285. REGULATOR_MODE_FAST);
  286. if (rc) {
  287. dprintk(CVP_WARN,
  288. "Failed to hand off regulator control: %s\n",
  289. rinfo->name);
  290. } else {
  291. dprintk(CVP_PWR,
  292. "Hand off regulator control to HW: %s\n",
  293. rinfo->name);
  294. }
  295. }
  296. return rc;
  297. }
  298. static int __hand_off_regulators(struct iris_hfi_device *device)
  299. {
  300. struct regulator_info *rinfo;
  301. int rc = 0, c = 0;
  302. iris_hfi_for_each_regulator(device, rinfo) {
  303. rc = __hand_off_regulator(rinfo);
  304. /*
  305. * If one regulator hand off failed, driver should take
  306. * the control for other regulators back.
  307. */
  308. if (rc)
  309. goto err_reg_handoff_failed;
  310. c++;
  311. }
  312. return rc;
  313. err_reg_handoff_failed:
  314. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  315. __acquire_regulator(rinfo, device);
  316. return rc;
  317. }
  318. static int __write_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  319. bool *rx_req_is_set)
  320. {
  321. struct cvp_hfi_queue_header *queue;
  322. u32 packet_size_in_words, new_write_idx;
  323. u32 empty_space, read_idx, write_idx;
  324. u32 *write_ptr;
  325. if (!qinfo || !packet) {
  326. dprintk(CVP_ERR, "Invalid Params\n");
  327. return -EINVAL;
  328. } else if (!qinfo->q_array.align_virtual_addr) {
  329. dprintk(CVP_WARN, "Queues have already been freed\n");
  330. return -EINVAL;
  331. }
  332. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  333. if (!queue) {
  334. dprintk(CVP_ERR, "queue not present\n");
  335. return -ENOENT;
  336. }
  337. if (msm_cvp_debug & CVP_PKT) {
  338. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  339. __dump_packet(packet, CVP_PKT);
  340. }
  341. packet_size_in_words = (*(u32 *)packet) >> 2;
  342. if (!packet_size_in_words || packet_size_in_words >
  343. qinfo->q_array.mem_size>>2) {
  344. dprintk(CVP_ERR, "Invalid packet size\n");
  345. return -ENODATA;
  346. }
  347. spin_lock(&qinfo->hfi_lock);
  348. read_idx = queue->qhdr_read_idx;
  349. write_idx = queue->qhdr_write_idx;
  350. empty_space = (write_idx >= read_idx) ?
  351. ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) :
  352. (read_idx - write_idx);
  353. if (empty_space <= packet_size_in_words) {
  354. queue->qhdr_tx_req = 1;
  355. spin_unlock(&qinfo->hfi_lock);
  356. dprintk(CVP_ERR, "Insufficient size (%d) to write (%d)\n",
  357. empty_space, packet_size_in_words);
  358. return -ENOTEMPTY;
  359. }
  360. queue->qhdr_tx_req = 0;
  361. new_write_idx = write_idx + packet_size_in_words;
  362. write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  363. (write_idx << 2));
  364. if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  365. write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  366. qinfo->q_array.mem_size)) {
  367. spin_unlock(&qinfo->hfi_lock);
  368. dprintk(CVP_ERR, "Invalid write index\n");
  369. return -ENODATA;
  370. }
  371. if (new_write_idx < (qinfo->q_array.mem_size >> 2)) {
  372. memcpy(write_ptr, packet, packet_size_in_words << 2);
  373. } else {
  374. new_write_idx -= qinfo->q_array.mem_size >> 2;
  375. memcpy(write_ptr, packet, (packet_size_in_words -
  376. new_write_idx) << 2);
  377. memcpy((void *)qinfo->q_array.align_virtual_addr,
  378. packet + ((packet_size_in_words - new_write_idx) << 2),
  379. new_write_idx << 2);
  380. }
  381. /*
  382. * Memory barrier to make sure packet is written before updating the
  383. * write index
  384. */
  385. mb();
  386. queue->qhdr_write_idx = new_write_idx;
  387. if (rx_req_is_set)
  388. *rx_req_is_set = queue->qhdr_rx_req == 1;
  389. /*
  390. * Memory barrier to make sure write index is updated before an
  391. * interrupt is raised.
  392. */
  393. mb();
  394. spin_unlock(&qinfo->hfi_lock);
  395. return 0;
  396. }
  397. static int __read_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  398. u32 *pb_tx_req_is_set)
  399. {
  400. struct cvp_hfi_queue_header *queue;
  401. u32 packet_size_in_words, new_read_idx;
  402. u32 *read_ptr;
  403. u32 receive_request = 0;
  404. u32 read_idx, write_idx;
  405. int rc = 0;
  406. if (!qinfo || !packet || !pb_tx_req_is_set) {
  407. dprintk(CVP_ERR, "Invalid Params\n");
  408. return -EINVAL;
  409. } else if (!qinfo->q_array.align_virtual_addr) {
  410. dprintk(CVP_WARN, "Queues have already been freed\n");
  411. return -EINVAL;
  412. }
  413. /*
  414. * Memory barrier to make sure data is valid before
  415. *reading it
  416. */
  417. mb();
  418. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  419. if (!queue) {
  420. dprintk(CVP_ERR, "Queue memory is not allocated\n");
  421. return -ENOMEM;
  422. }
  423. /*
  424. * Do not set receive request for debug queue, if set,
  425. * Iris generates interrupt for debug messages even
  426. * when there is no response message available.
  427. * In general debug queue will not become full as it
  428. * is being emptied out for every interrupt from Iris.
  429. * Iris will anyway generates interrupt if it is full.
  430. */
  431. spin_lock(&qinfo->hfi_lock);
  432. if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q)
  433. receive_request = 1;
  434. read_idx = queue->qhdr_read_idx;
  435. write_idx = queue->qhdr_write_idx;
  436. if (read_idx == write_idx) {
  437. queue->qhdr_rx_req = receive_request;
  438. /*
  439. * mb() to ensure qhdr is updated in main memory
  440. * so that iris reads the updated header values
  441. */
  442. mb();
  443. *pb_tx_req_is_set = 0;
  444. if (write_idx != queue->qhdr_write_idx) {
  445. queue->qhdr_rx_req = 0;
  446. } else {
  447. spin_unlock(&qinfo->hfi_lock);
  448. dprintk(CVP_HFI,
  449. "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n",
  450. receive_request ? "message" : "debug",
  451. queue->qhdr_rx_req, queue->qhdr_tx_req,
  452. queue->qhdr_read_idx);
  453. return -ENODATA;
  454. }
  455. }
  456. read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  457. (read_idx << 2));
  458. if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  459. read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  460. qinfo->q_array.mem_size - sizeof(*read_ptr))) {
  461. spin_unlock(&qinfo->hfi_lock);
  462. dprintk(CVP_ERR, "Invalid read index\n");
  463. return -ENODATA;
  464. }
  465. packet_size_in_words = (*read_ptr) >> 2;
  466. if (!packet_size_in_words) {
  467. spin_unlock(&qinfo->hfi_lock);
  468. dprintk(CVP_ERR, "Zero packet size\n");
  469. return -ENODATA;
  470. }
  471. new_read_idx = read_idx + packet_size_in_words;
  472. if (((packet_size_in_words << 2) <= CVP_IFACEQ_VAR_HUGE_PKT_SIZE)
  473. && read_idx <= (qinfo->q_array.mem_size >> 2)) {
  474. if (new_read_idx < (qinfo->q_array.mem_size >> 2)) {
  475. memcpy(packet, read_ptr,
  476. packet_size_in_words << 2);
  477. } else {
  478. new_read_idx -= (qinfo->q_array.mem_size >> 2);
  479. memcpy(packet, read_ptr,
  480. (packet_size_in_words - new_read_idx) << 2);
  481. memcpy(packet + ((packet_size_in_words -
  482. new_read_idx) << 2),
  483. (u8 *)qinfo->q_array.align_virtual_addr,
  484. new_read_idx << 2);
  485. }
  486. } else {
  487. dprintk(CVP_WARN,
  488. "BAD packet received, read_idx: %#x, pkt_size: %d\n",
  489. read_idx, packet_size_in_words << 2);
  490. dprintk(CVP_WARN, "Dropping this packet\n");
  491. new_read_idx = write_idx;
  492. rc = -ENODATA;
  493. }
  494. if (new_read_idx != queue->qhdr_write_idx)
  495. queue->qhdr_rx_req = 0;
  496. else
  497. queue->qhdr_rx_req = receive_request;
  498. queue->qhdr_read_idx = new_read_idx;
  499. /*
  500. * mb() to ensure qhdr is updated in main memory
  501. * so that iris reads the updated header values
  502. */
  503. mb();
  504. *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0;
  505. spin_unlock(&qinfo->hfi_lock);
  506. if ((msm_cvp_debug & CVP_PKT) &&
  507. !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) {
  508. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  509. __dump_packet(packet, CVP_PKT);
  510. }
  511. return rc;
  512. }
  513. static int __smem_alloc(struct iris_hfi_device *dev, struct cvp_mem_addr *mem,
  514. u32 size, u32 align, u32 flags)
  515. {
  516. struct msm_cvp_smem *alloc = &mem->mem_data;
  517. int rc = 0;
  518. if (!dev || !mem || !size) {
  519. dprintk(CVP_ERR, "Invalid Params\n");
  520. return -EINVAL;
  521. }
  522. dprintk(CVP_INFO, "start to alloc size: %d, flags: %d\n", size, flags);
  523. alloc->flags = flags;
  524. rc = msm_cvp_smem_alloc(size, align, 1, (void *)dev->res, alloc);
  525. if (rc) {
  526. dprintk(CVP_ERR, "Alloc failed\n");
  527. rc = -ENOMEM;
  528. goto fail_smem_alloc;
  529. }
  530. dprintk(CVP_MEM, "%s: ptr = %pK, size = %d\n", __func__,
  531. alloc->kvaddr, size);
  532. mem->mem_size = alloc->size;
  533. mem->align_virtual_addr = alloc->kvaddr;
  534. mem->align_device_addr = alloc->device_addr;
  535. alloc->pkt_type = 0;
  536. alloc->buf_idx = 0;
  537. return rc;
  538. fail_smem_alloc:
  539. return rc;
  540. }
  541. static void __smem_free(struct iris_hfi_device *dev, struct msm_cvp_smem *mem)
  542. {
  543. if (!dev || !mem) {
  544. dprintk(CVP_ERR, "invalid param %pK %pK\n", dev, mem);
  545. return;
  546. }
  547. msm_cvp_smem_free(mem);
  548. }
  549. static void __write_register(struct iris_hfi_device *device,
  550. u32 reg, u32 value)
  551. {
  552. u32 hwiosymaddr = reg;
  553. u8 *base_addr;
  554. if (!device) {
  555. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  556. return;
  557. }
  558. __strict_check(device);
  559. if (!device->power_enabled) {
  560. dprintk(CVP_WARN,
  561. "HFI Write register failed : Power is OFF\n");
  562. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  563. return;
  564. }
  565. base_addr = device->cvp_hal_data->register_base;
  566. dprintk(CVP_REG, "Base addr: %pK, written to: %#x, Value: %#x...\n",
  567. base_addr, hwiosymaddr, value);
  568. base_addr += hwiosymaddr;
  569. writel_relaxed(value, base_addr);
  570. /*
  571. * Memory barrier to make sure value is written into the register.
  572. */
  573. wmb();
  574. }
  575. static int __read_gcc_register(struct iris_hfi_device *device, u32 reg)
  576. {
  577. int rc = 0;
  578. u8 *base_addr;
  579. if (!device) {
  580. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  581. return -EINVAL;
  582. }
  583. __strict_check(device);
  584. if (!device->power_enabled) {
  585. dprintk(CVP_WARN,
  586. "%s HFI Read register failed : Power is OFF\n",
  587. __func__);
  588. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  589. return -EINVAL;
  590. }
  591. base_addr = device->cvp_hal_data->gcc_reg_base;
  592. rc = readl_relaxed(base_addr + reg);
  593. /*
  594. * Memory barrier to make sure value is read correctly from the
  595. * register.
  596. */
  597. rmb();
  598. dprintk(CVP_REG,
  599. "GCC Base addr: %pK, read from: %#x, value: %#x...\n",
  600. base_addr, reg, rc);
  601. return rc;
  602. }
  603. static int __read_register(struct iris_hfi_device *device, u32 reg)
  604. {
  605. int rc = 0;
  606. u8 *base_addr;
  607. if (!device) {
  608. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  609. return -EINVAL;
  610. }
  611. __strict_check(device);
  612. if (!device->power_enabled) {
  613. dprintk(CVP_WARN,
  614. "HFI Read register failed : Power is OFF\n");
  615. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  616. return -EINVAL;
  617. }
  618. base_addr = device->cvp_hal_data->register_base;
  619. rc = readl_relaxed(base_addr + reg);
  620. /*
  621. * Memory barrier to make sure value is read correctly from the
  622. * register.
  623. */
  624. rmb();
  625. dprintk(CVP_REG, "Base addr: %pK, read from: %#x, value: %#x...\n",
  626. base_addr, reg, rc);
  627. return rc;
  628. }
  629. static void __set_registers(struct iris_hfi_device *device)
  630. {
  631. struct msm_cvp_core *core;
  632. struct msm_cvp_platform_data *pdata;
  633. struct reg_set *reg_set;
  634. int i;
  635. if (!device->res) {
  636. dprintk(CVP_ERR,
  637. "device resources null, cannot set registers\n");
  638. return;
  639. }
  640. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  641. pdata = core->platform_data;
  642. reg_set = &device->res->reg_set;
  643. for (i = 0; i < reg_set->count; i++) {
  644. __write_register(device, reg_set->reg_tbl[i].reg,
  645. reg_set->reg_tbl[i].value);
  646. dprintk(CVP_REG, "write_reg offset=%x, val=%x\n",
  647. reg_set->reg_tbl[i].reg,
  648. reg_set->reg_tbl[i].value);
  649. }
  650. __write_register(device, CVP_CPU_CS_AXI4_QOS,
  651. pdata->noc_qos->axi_qos);
  652. __write_register(device, CVP_NOC_PRIORITYLUT_LOW,
  653. pdata->noc_qos->prioritylut_low);
  654. __write_register(device, CVP_NOC_PRIORITYLUT_HIGH,
  655. pdata->noc_qos->prioritylut_high);
  656. __write_register(device, CVP_NOC_URGENCY_LOW,
  657. pdata->noc_qos->urgency_low);
  658. __write_register(device, CVP_NOC_DANGERLUT_LOW,
  659. pdata->noc_qos->dangerlut_low);
  660. __write_register(device, CVP_NOC_SAFELUT_LOW,
  661. pdata->noc_qos->safelut_low);
  662. }
  663. /*
  664. * The existence of this function is a hack for 8996 (or certain Iris versions)
  665. * to overcome a hardware bug. Whenever the GDSCs momentarily power collapse
  666. * (after calling __hand_off_regulators()), the values of the threshold
  667. * registers (typically programmed by TZ) are incorrectly reset. As a result
  668. * reprogram these registers at certain agreed upon points.
  669. */
  670. static void __set_threshold_registers(struct iris_hfi_device *device)
  671. {
  672. u32 version = __read_register(device, CVP_WRAPPER_HW_VERSION);
  673. version &= ~GENMASK(15, 0);
  674. if (version != (0x3 << 28 | 0x43 << 16))
  675. return;
  676. if (__tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESTORE_THRESHOLD))
  677. dprintk(CVP_ERR, "Failed to restore threshold values\n");
  678. }
  679. static int __unvote_buses(struct iris_hfi_device *device)
  680. {
  681. int rc = 0;
  682. struct bus_info *bus = NULL;
  683. kfree(device->bus_vote.data);
  684. device->bus_vote.data = NULL;
  685. device->bus_vote.data_count = 0;
  686. iris_hfi_for_each_bus(device, bus) {
  687. rc = msm_cvp_set_bw(bus, 0);
  688. if (rc) {
  689. dprintk(CVP_ERR,
  690. "%s: Failed unvoting bus\n", __func__);
  691. goto err_unknown_device;
  692. }
  693. }
  694. err_unknown_device:
  695. return rc;
  696. }
  697. static int __vote_buses(struct iris_hfi_device *device,
  698. struct cvp_bus_vote_data *data, int num_data)
  699. {
  700. int rc = 0;
  701. struct bus_info *bus = NULL;
  702. struct cvp_bus_vote_data *new_data = NULL;
  703. if (!num_data) {
  704. dprintk(CVP_PWR, "No vote data available\n");
  705. goto no_data_count;
  706. } else if (!data) {
  707. dprintk(CVP_ERR, "Invalid voting data\n");
  708. return -EINVAL;
  709. }
  710. new_data = kmemdup(data, num_data * sizeof(*new_data), GFP_KERNEL);
  711. if (!new_data) {
  712. dprintk(CVP_ERR, "Can't alloc memory to cache bus votes\n");
  713. rc = -ENOMEM;
  714. goto err_no_mem;
  715. }
  716. no_data_count:
  717. kfree(device->bus_vote.data);
  718. device->bus_vote.data = new_data;
  719. device->bus_vote.data_count = num_data;
  720. iris_hfi_for_each_bus(device, bus) {
  721. if (bus) {
  722. rc = msm_cvp_set_bw(bus, bus->range[1]);
  723. if (rc)
  724. dprintk(CVP_ERR,
  725. "Failed voting bus %s to ab %u\n",
  726. bus->name, bus->range[1]*1000);
  727. }
  728. }
  729. err_no_mem:
  730. return rc;
  731. }
  732. static int iris_hfi_vote_buses(void *dev, struct cvp_bus_vote_data *d, int n)
  733. {
  734. int rc = 0;
  735. struct iris_hfi_device *device = dev;
  736. if (!device)
  737. return -EINVAL;
  738. mutex_lock(&device->lock);
  739. rc = __vote_buses(device, d, n);
  740. mutex_unlock(&device->lock);
  741. return rc;
  742. }
  743. static int __core_set_resource(struct iris_hfi_device *device,
  744. struct cvp_resource_hdr *resource_hdr, void *resource_value)
  745. {
  746. struct cvp_hfi_cmd_sys_set_resource_packet *pkt;
  747. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  748. int rc = 0;
  749. if (!device || !resource_hdr || !resource_value) {
  750. dprintk(CVP_ERR, "set_res: Invalid Params\n");
  751. return -EINVAL;
  752. }
  753. pkt = (struct cvp_hfi_cmd_sys_set_resource_packet *) packet;
  754. rc = call_hfi_pkt_op(device, sys_set_resource,
  755. pkt, resource_hdr, resource_value);
  756. if (rc) {
  757. dprintk(CVP_ERR, "set_res: failed to create packet\n");
  758. goto err_create_pkt;
  759. }
  760. rc = __iface_cmdq_write(device, pkt);
  761. if (rc)
  762. rc = -ENOTEMPTY;
  763. err_create_pkt:
  764. return rc;
  765. }
  766. static int __core_release_resource(struct iris_hfi_device *device,
  767. struct cvp_resource_hdr *resource_hdr)
  768. {
  769. struct cvp_hfi_cmd_sys_release_resource_packet *pkt;
  770. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  771. int rc = 0;
  772. if (!device || !resource_hdr) {
  773. dprintk(CVP_ERR, "release_res: Invalid Params\n");
  774. return -EINVAL;
  775. }
  776. pkt = (struct cvp_hfi_cmd_sys_release_resource_packet *) packet;
  777. rc = call_hfi_pkt_op(device, sys_release_resource,
  778. pkt, resource_hdr);
  779. if (rc) {
  780. dprintk(CVP_ERR, "release_res: failed to create packet\n");
  781. goto err_create_pkt;
  782. }
  783. rc = __iface_cmdq_write(device, pkt);
  784. if (rc)
  785. rc = -ENOTEMPTY;
  786. err_create_pkt:
  787. return rc;
  788. }
  789. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state)
  790. {
  791. int rc = 0;
  792. rc = qcom_scm_set_remote_state(state, TZBSP_CVP_PAS_ID);
  793. dprintk(CVP_CORE, "Set state %d, resp %d\n", state, rc);
  794. if (rc) {
  795. dprintk(CVP_ERR, "Failed qcom_scm_set_remote_state %d\n", rc);
  796. return rc;
  797. }
  798. return 0;
  799. }
  800. static inline int __boot_firmware(struct iris_hfi_device *device)
  801. {
  802. int rc = 0, loop = 10;
  803. u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000;
  804. u32 reg_gdsc;
  805. /*
  806. * Hand off control of regulators to h/w _after_ enabling clocks.
  807. * Note that the GDSC will turn off when switching from normal
  808. * (s/w triggered) to fast (HW triggered) unless the h/w vote is
  809. * present. Since Iris isn't up yet, the GDSC will be off briefly.
  810. */
  811. if (__enable_hw_power_collapse(device))
  812. dprintk(CVP_ERR, "Failed to enabled inter-frame PC\n");
  813. while (loop) {
  814. reg_gdsc = __read_register(device, CVP_CC_MVS1_GDSCR);
  815. if (reg_gdsc & 0x80000000) {
  816. usleep_range(100, 200);
  817. loop--;
  818. } else {
  819. break;
  820. }
  821. }
  822. if (!loop)
  823. dprintk(CVP_ERR, "fail to power off CORE during resume\n");
  824. ctrl_init_val = BIT(0);
  825. __write_register(device, CVP_CTRL_INIT, ctrl_init_val);
  826. while (!ctrl_status && count < max_tries) {
  827. ctrl_status = __read_register(device, CVP_CTRL_STATUS);
  828. if ((ctrl_status & CVP_CTRL_ERROR_STATUS__M) == 0x4) {
  829. dprintk(CVP_ERR, "invalid setting for UC_REGION\n");
  830. rc = -ENODATA;
  831. break;
  832. }
  833. /* Reduce to 500, 1000 on silicon */
  834. usleep_range(500, 1000);
  835. count++;
  836. }
  837. if (!(ctrl_status & CVP_CTRL_INIT_STATUS__M)) {
  838. dprintk(CVP_ERR, "Failed to boot FW status: %x\n",
  839. ctrl_status);
  840. rc = -ENODEV;
  841. }
  842. /* Enable interrupt before sending commands to tensilica */
  843. __write_register(device, CVP_CPU_CS_H2XSOFTINTEN, 0x1);
  844. __write_register(device, CVP_CPU_CS_X2RPMh, 0x0);
  845. return rc;
  846. }
  847. static int iris_hfi_resume(void *dev)
  848. {
  849. int rc = 0;
  850. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  851. if (!device) {
  852. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  853. return -EINVAL;
  854. }
  855. dprintk(CVP_CORE, "Resuming Iris\n");
  856. mutex_lock(&device->lock);
  857. rc = __resume(device);
  858. mutex_unlock(&device->lock);
  859. return rc;
  860. }
  861. static int iris_hfi_suspend(void *dev)
  862. {
  863. int rc = 0;
  864. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  865. if (!device) {
  866. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  867. return -EINVAL;
  868. } else if (!device->res->sw_power_collapsible) {
  869. return -ENOTSUPP;
  870. }
  871. dprintk(CVP_CORE, "Suspending Iris\n");
  872. mutex_lock(&device->lock);
  873. rc = __power_collapse(device, true);
  874. if (rc) {
  875. dprintk(CVP_WARN, "%s: Iris is busy\n", __func__);
  876. rc = -EBUSY;
  877. }
  878. mutex_unlock(&device->lock);
  879. /* Cancel pending delayed works if any */
  880. if (!rc)
  881. cancel_delayed_work(&iris_hfi_pm_work);
  882. return rc;
  883. }
  884. static void cvp_dump_csr(struct iris_hfi_device *dev)
  885. {
  886. u32 reg;
  887. if (!dev)
  888. return;
  889. if (!dev->power_enabled || dev->reg_dumped)
  890. return;
  891. reg = __read_register(dev, CVP_WRAPPER_CPU_STATUS);
  892. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_STATUS: %x\n", reg);
  893. reg = __read_register(dev, CVP_CPU_CS_SCIACMDARG0);
  894. dprintk(CVP_ERR, "CVP_CPU_CS_SCIACMDARG0: %x\n", reg);
  895. reg = __read_register(dev, CVP_WRAPPER_CPU_CLOCK_CONFIG);
  896. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_CLOCK_CONFIG: %x\n", reg);
  897. reg = __read_register(dev, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  898. dprintk(CVP_ERR, "CVP_WRAPPER_CORE_CLOCK_CONFIG: %x\n", reg);
  899. reg = __read_register(dev, CVP_WRAPPER_INTR_STATUS);
  900. dprintk(CVP_ERR, "CVP_WRAPPER_INTR_STATUS: %x\n", reg);
  901. reg = __read_register(dev, CVP_CPU_CS_H2ASOFTINT);
  902. dprintk(CVP_ERR, "CVP_CPU_CS_H2ASOFTINT: %x\n", reg);
  903. reg = __read_register(dev, CVP_CPU_CS_A2HSOFTINT);
  904. dprintk(CVP_ERR, "CVP_CPU_CS_A2HSOFTINT: %x\n", reg);
  905. reg = __read_register(dev, CVP_CC_MVS1C_GDSCR);
  906. dprintk(CVP_ERR, "CVP_CC_MVS1C_GDSCR: %x\n", reg);
  907. reg = __read_register(dev, CVP_CC_MVS1C_CBCR);
  908. dprintk(CVP_ERR, "CVP_CC_MVS1C_CBCR: %x\n", reg);
  909. dev->reg_dumped = true;
  910. }
  911. static int iris_hfi_flush_debug_queue(void *dev)
  912. {
  913. int rc = 0;
  914. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  915. if (!device) {
  916. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  917. return -EINVAL;
  918. }
  919. cvp_dump_csr(device);
  920. mutex_lock(&device->lock);
  921. if (!device->power_enabled) {
  922. dprintk(CVP_WARN, "%s: iris power off\n", __func__);
  923. rc = -EINVAL;
  924. goto exit;
  925. }
  926. __flush_debug_queue(device, NULL);
  927. exit:
  928. mutex_unlock(&device->lock);
  929. return rc;
  930. }
  931. static int iris_hfi_scale_clocks(void *dev, u32 freq)
  932. {
  933. int rc = 0;
  934. struct iris_hfi_device *device = dev;
  935. if (!device) {
  936. dprintk(CVP_ERR, "Invalid args: %pK\n", device);
  937. return -EINVAL;
  938. }
  939. mutex_lock(&device->lock);
  940. if (__resume(device)) {
  941. dprintk(CVP_ERR, "Resume from power collapse failed\n");
  942. rc = -ENODEV;
  943. goto exit;
  944. }
  945. rc = msm_cvp_set_clocks_impl(device, freq);
  946. exit:
  947. mutex_unlock(&device->lock);
  948. return rc;
  949. }
  950. /* Writes into cmdq without raising an interrupt */
  951. static int __iface_cmdq_write_relaxed(struct iris_hfi_device *device,
  952. void *pkt, bool *requires_interrupt)
  953. {
  954. struct cvp_iface_q_info *q_info;
  955. struct cvp_hal_cmd_pkt_hdr *cmd_packet;
  956. int result = -E2BIG;
  957. if (!device || !pkt) {
  958. dprintk(CVP_ERR, "Invalid Params\n");
  959. return -EINVAL;
  960. }
  961. __strict_check(device);
  962. if (!__core_in_valid_state(device)) {
  963. dprintk(CVP_ERR, "%s - fw not in init state\n", __func__);
  964. result = -EINVAL;
  965. goto err_q_null;
  966. }
  967. cmd_packet = (struct cvp_hal_cmd_pkt_hdr *)pkt;
  968. device->last_packet_type = cmd_packet->packet_type;
  969. q_info = &device->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  970. if (!q_info) {
  971. dprintk(CVP_ERR, "cannot write to shared Q's\n");
  972. goto err_q_null;
  973. }
  974. if (!q_info->q_array.align_virtual_addr) {
  975. dprintk(CVP_ERR, "cannot write to shared CMD Q's\n");
  976. result = -ENODATA;
  977. goto err_q_null;
  978. }
  979. if (__resume(device)) {
  980. dprintk(CVP_ERR, "%s: Power on failed\n", __func__);
  981. goto err_q_write;
  982. }
  983. if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) {
  984. if (device->res->sw_power_collapsible) {
  985. cancel_delayed_work(&iris_hfi_pm_work);
  986. if (!queue_delayed_work(device->iris_pm_workq,
  987. &iris_hfi_pm_work,
  988. msecs_to_jiffies(
  989. device->res->msm_cvp_pwr_collapse_delay))) {
  990. dprintk(CVP_PWR,
  991. "PM work already scheduled\n");
  992. }
  993. }
  994. result = 0;
  995. } else {
  996. dprintk(CVP_ERR, "__iface_cmdq_write: queue full\n");
  997. }
  998. err_q_write:
  999. err_q_null:
  1000. return result;
  1001. }
  1002. static int __iface_cmdq_write(struct iris_hfi_device *device, void *pkt)
  1003. {
  1004. bool needs_interrupt = false;
  1005. int rc = __iface_cmdq_write_relaxed(device, pkt, &needs_interrupt);
  1006. if (!rc && needs_interrupt) {
  1007. /* Consumer of cmdq prefers that we raise an interrupt */
  1008. rc = 0;
  1009. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1010. }
  1011. return rc;
  1012. }
  1013. static int __iface_msgq_read(struct iris_hfi_device *device, void *pkt)
  1014. {
  1015. u32 tx_req_is_set = 0;
  1016. int rc = 0;
  1017. struct cvp_iface_q_info *q_info;
  1018. if (!pkt) {
  1019. dprintk(CVP_ERR, "Invalid Params\n");
  1020. return -EINVAL;
  1021. }
  1022. __strict_check(device);
  1023. if (!__core_in_valid_state(device)) {
  1024. dprintk(CVP_WARN, "%s - fw not in init state\n", __func__);
  1025. rc = -EINVAL;
  1026. goto read_error_null;
  1027. }
  1028. q_info = &device->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1029. if (q_info->q_array.align_virtual_addr == NULL) {
  1030. dprintk(CVP_ERR, "cannot read from shared MSG Q's\n");
  1031. rc = -ENODATA;
  1032. goto read_error_null;
  1033. }
  1034. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1035. if (tx_req_is_set)
  1036. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1037. rc = 0;
  1038. } else
  1039. rc = -ENODATA;
  1040. read_error_null:
  1041. return rc;
  1042. }
  1043. static int __iface_dbgq_read(struct iris_hfi_device *device, void *pkt)
  1044. {
  1045. u32 tx_req_is_set = 0;
  1046. int rc = 0;
  1047. struct cvp_iface_q_info *q_info;
  1048. if (!pkt) {
  1049. dprintk(CVP_ERR, "Invalid Params\n");
  1050. return -EINVAL;
  1051. }
  1052. __strict_check(device);
  1053. q_info = &device->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1054. if (q_info->q_array.align_virtual_addr == NULL) {
  1055. dprintk(CVP_ERR, "cannot read from shared DBG Q's\n");
  1056. rc = -ENODATA;
  1057. goto dbg_error_null;
  1058. }
  1059. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1060. if (tx_req_is_set)
  1061. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1062. rc = 0;
  1063. } else
  1064. rc = -ENODATA;
  1065. dbg_error_null:
  1066. return rc;
  1067. }
  1068. static void __set_queue_hdr_defaults(struct cvp_hfi_queue_header *q_hdr)
  1069. {
  1070. q_hdr->qhdr_status = 0x1;
  1071. q_hdr->qhdr_type = CVP_IFACEQ_DFLT_QHDR;
  1072. q_hdr->qhdr_q_size = CVP_IFACEQ_QUEUE_SIZE / 4;
  1073. q_hdr->qhdr_pkt_size = 0;
  1074. q_hdr->qhdr_rx_wm = 0x1;
  1075. q_hdr->qhdr_tx_wm = 0x1;
  1076. q_hdr->qhdr_rx_req = 0x1;
  1077. q_hdr->qhdr_tx_req = 0x0;
  1078. q_hdr->qhdr_rx_irq_status = 0x0;
  1079. q_hdr->qhdr_tx_irq_status = 0x0;
  1080. q_hdr->qhdr_read_idx = 0x0;
  1081. q_hdr->qhdr_write_idx = 0x0;
  1082. }
  1083. /*
  1084. *Unused, keep for reference
  1085. */
  1086. /*
  1087. static void __interface_dsp_queues_release(struct iris_hfi_device *device)
  1088. {
  1089. int i;
  1090. struct msm_cvp_smem *mem_data = &device->dsp_iface_q_table.mem_data;
  1091. struct context_bank_info *cb = mem_data->mapping_info.cb_info;
  1092. if (!device->dsp_iface_q_table.align_virtual_addr) {
  1093. dprintk(CVP_ERR, "%s: already released\n", __func__);
  1094. return;
  1095. }
  1096. dma_unmap_single_attrs(cb->dev, mem_data->device_addr,
  1097. mem_data->size, DMA_BIDIRECTIONAL, 0);
  1098. dma_free_coherent(device->res->mem_cdsp.dev, mem_data->size,
  1099. mem_data->kvaddr, mem_data->dma_handle);
  1100. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1101. device->dsp_iface_queues[i].q_hdr = NULL;
  1102. device->dsp_iface_queues[i].q_array.align_virtual_addr = NULL;
  1103. device->dsp_iface_queues[i].q_array.align_device_addr = 0;
  1104. }
  1105. device->dsp_iface_q_table.align_virtual_addr = NULL;
  1106. device->dsp_iface_q_table.align_device_addr = 0;
  1107. }
  1108. */
  1109. static int __interface_dsp_queues_init(struct iris_hfi_device *dev)
  1110. {
  1111. int rc = 0;
  1112. u32 i;
  1113. struct cvp_iface_q_info *iface_q;
  1114. int offset = 0;
  1115. phys_addr_t fw_bias = 0;
  1116. size_t q_size;
  1117. struct msm_cvp_smem *mem_data;
  1118. void *kvaddr;
  1119. dma_addr_t dma_handle;
  1120. dma_addr_t iova;
  1121. struct context_bank_info *cb;
  1122. q_size = ALIGN(QUEUE_SIZE, SZ_1M);
  1123. mem_data = &dev->dsp_iface_q_table.mem_data;
  1124. if (mem_data->kvaddr) {
  1125. memset((void *)mem_data->kvaddr, 0, q_size);
  1126. cvp_dsp_init_hfi_queue_hdr(dev);
  1127. return 0;
  1128. }
  1129. /* Allocate dsp queues from CDSP device memory */
  1130. kvaddr = dma_alloc_coherent(dev->res->mem_cdsp.dev, q_size,
  1131. &dma_handle, GFP_KERNEL);
  1132. if (IS_ERR_OR_NULL(kvaddr)) {
  1133. dprintk(CVP_ERR, "%s: failed dma allocation\n", __func__);
  1134. goto fail_dma_alloc;
  1135. }
  1136. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1137. if (!cb) {
  1138. dprintk(CVP_ERR,
  1139. "%s: failed to get context bank\n", __func__);
  1140. goto fail_dma_map;
  1141. }
  1142. iova = dma_map_single_attrs(cb->dev, phys_to_virt(dma_handle),
  1143. q_size, DMA_BIDIRECTIONAL, 0);
  1144. if (dma_mapping_error(cb->dev, iova)) {
  1145. dprintk(CVP_ERR, "%s: failed dma mapping\n", __func__);
  1146. goto fail_dma_map;
  1147. }
  1148. dprintk(CVP_DSP,
  1149. "%s: kvaddr %pK dma_handle %#llx iova %#llx size %zd\n",
  1150. __func__, kvaddr, dma_handle, iova, q_size);
  1151. memset(mem_data, 0, sizeof(struct msm_cvp_smem));
  1152. mem_data->kvaddr = kvaddr;
  1153. mem_data->device_addr = iova;
  1154. mem_data->dma_handle = dma_handle;
  1155. mem_data->size = q_size;
  1156. mem_data->mapping_info.cb_info = cb;
  1157. if (!is_iommu_present(dev->res))
  1158. fw_bias = dev->cvp_hal_data->firmware_base;
  1159. dev->dsp_iface_q_table.align_virtual_addr = kvaddr;
  1160. dev->dsp_iface_q_table.align_device_addr = iova - fw_bias;
  1161. dev->dsp_iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1162. offset = dev->dsp_iface_q_table.mem_size;
  1163. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1164. iface_q = &dev->dsp_iface_queues[i];
  1165. iface_q->q_array.align_device_addr = iova + offset - fw_bias;
  1166. iface_q->q_array.align_virtual_addr = kvaddr + offset;
  1167. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1168. offset += iface_q->q_array.mem_size;
  1169. spin_lock_init(&iface_q->hfi_lock);
  1170. }
  1171. cvp_dsp_init_hfi_queue_hdr(dev);
  1172. return rc;
  1173. fail_dma_map:
  1174. dma_free_coherent(dev->res->mem_cdsp.dev, q_size, kvaddr, dma_handle);
  1175. fail_dma_alloc:
  1176. return -ENOMEM;
  1177. }
  1178. static void __interface_queues_release(struct iris_hfi_device *device)
  1179. {
  1180. #ifdef CONFIG_EVA_TVM
  1181. int i;
  1182. struct cvp_hfi_mem_map_table *qdss;
  1183. struct cvp_hfi_mem_map *mem_map;
  1184. int num_entries = device->res->qdss_addr_set.count;
  1185. unsigned long mem_map_table_base_addr;
  1186. struct context_bank_info *cb;
  1187. if (device->qdss.align_virtual_addr) {
  1188. qdss = (struct cvp_hfi_mem_map_table *)
  1189. device->qdss.align_virtual_addr;
  1190. qdss->mem_map_num_entries = num_entries;
  1191. mem_map_table_base_addr =
  1192. device->qdss.align_device_addr +
  1193. sizeof(struct cvp_hfi_mem_map_table);
  1194. qdss->mem_map_table_base_addr =
  1195. (u32)mem_map_table_base_addr;
  1196. if ((unsigned long)qdss->mem_map_table_base_addr !=
  1197. mem_map_table_base_addr) {
  1198. dprintk(CVP_ERR,
  1199. "Invalid mem_map_table_base_addr %#lx",
  1200. mem_map_table_base_addr);
  1201. }
  1202. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1203. cb = msm_cvp_smem_get_context_bank(device->res, 0);
  1204. for (i = 0; cb && i < num_entries; i++) {
  1205. iommu_unmap(cb->domain,
  1206. mem_map[i].virtual_addr,
  1207. mem_map[i].size);
  1208. }
  1209. __smem_free(device, &device->qdss.mem_data);
  1210. }
  1211. __smem_free(device, &device->iface_q_table.mem_data);
  1212. __smem_free(device, &device->sfr.mem_data);
  1213. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1214. device->iface_queues[i].q_hdr = NULL;
  1215. device->iface_queues[i].q_array.align_virtual_addr = NULL;
  1216. device->iface_queues[i].q_array.align_device_addr = 0;
  1217. }
  1218. device->iface_q_table.align_virtual_addr = NULL;
  1219. device->iface_q_table.align_device_addr = 0;
  1220. device->qdss.align_virtual_addr = NULL;
  1221. device->qdss.align_device_addr = 0;
  1222. device->sfr.align_virtual_addr = NULL;
  1223. device->sfr.align_device_addr = 0;
  1224. device->mem_addr.align_virtual_addr = NULL;
  1225. device->mem_addr.align_device_addr = 0;
  1226. #endif
  1227. }
  1228. static int __get_qdss_iommu_virtual_addr(struct iris_hfi_device *dev,
  1229. struct cvp_hfi_mem_map *mem_map,
  1230. struct iommu_domain *domain)
  1231. {
  1232. int i;
  1233. int rc = 0;
  1234. dma_addr_t iova = QDSS_IOVA_START;
  1235. int num_entries = dev->res->qdss_addr_set.count;
  1236. struct addr_range *qdss_addr_tbl = dev->res->qdss_addr_set.addr_tbl;
  1237. if (!num_entries)
  1238. return -ENODATA;
  1239. for (i = 0; i < num_entries; i++) {
  1240. if (domain) {
  1241. rc = iommu_map(domain, iova,
  1242. qdss_addr_tbl[i].start,
  1243. qdss_addr_tbl[i].size,
  1244. IOMMU_READ | IOMMU_WRITE);
  1245. if (rc) {
  1246. dprintk(CVP_ERR,
  1247. "IOMMU QDSS mapping failed for addr %#x\n",
  1248. qdss_addr_tbl[i].start);
  1249. rc = -ENOMEM;
  1250. break;
  1251. }
  1252. } else {
  1253. iova = qdss_addr_tbl[i].start;
  1254. }
  1255. mem_map[i].virtual_addr = (u32)iova;
  1256. mem_map[i].physical_addr = qdss_addr_tbl[i].start;
  1257. mem_map[i].size = qdss_addr_tbl[i].size;
  1258. mem_map[i].attr = 0x0;
  1259. iova += mem_map[i].size;
  1260. }
  1261. if (i < num_entries) {
  1262. dprintk(CVP_ERR,
  1263. "QDSS mapping failed, Freeing other entries %d\n", i);
  1264. for (--i; domain && i >= 0; i--) {
  1265. iommu_unmap(domain,
  1266. mem_map[i].virtual_addr,
  1267. mem_map[i].size);
  1268. }
  1269. }
  1270. return rc;
  1271. }
  1272. static void __setup_ucregion_memory_map(struct iris_hfi_device *device)
  1273. {
  1274. __write_register(device, CVP_UC_REGION_ADDR,
  1275. (u32)device->iface_q_table.align_device_addr);
  1276. __write_register(device, CVP_UC_REGION_SIZE, SHARED_QSIZE);
  1277. __write_register(device, CVP_QTBL_ADDR,
  1278. (u32)device->iface_q_table.align_device_addr);
  1279. __write_register(device, CVP_QTBL_INFO, 0x01);
  1280. if (device->sfr.align_device_addr)
  1281. __write_register(device, CVP_SFR_ADDR,
  1282. (u32)device->sfr.align_device_addr);
  1283. if (device->qdss.align_device_addr)
  1284. __write_register(device, CVP_MMAP_ADDR,
  1285. (u32)device->qdss.align_device_addr);
  1286. call_iris_op(device, setup_dsp_uc_memmap, device);
  1287. }
  1288. static void __hfi_queue_init(struct iris_hfi_device *dev)
  1289. {
  1290. int i, offset = 0;
  1291. struct cvp_hfi_queue_table_header *q_tbl_hdr;
  1292. struct cvp_iface_q_info *iface_q;
  1293. struct cvp_hfi_queue_header *q_hdr;
  1294. if (!dev)
  1295. return;
  1296. offset += dev->iface_q_table.mem_size;
  1297. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1298. iface_q = &dev->iface_queues[i];
  1299. iface_q->q_array.align_device_addr =
  1300. dev->iface_q_table.align_device_addr + offset;
  1301. iface_q->q_array.align_virtual_addr =
  1302. dev->iface_q_table.align_virtual_addr + offset;
  1303. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1304. offset += iface_q->q_array.mem_size;
  1305. iface_q->q_hdr = CVP_IFACEQ_GET_QHDR_START_ADDR(
  1306. dev->iface_q_table.align_virtual_addr, i);
  1307. __set_queue_hdr_defaults(iface_q->q_hdr);
  1308. spin_lock_init(&iface_q->hfi_lock);
  1309. }
  1310. q_tbl_hdr = (struct cvp_hfi_queue_table_header *)
  1311. dev->iface_q_table.align_virtual_addr;
  1312. q_tbl_hdr->qtbl_version = 0;
  1313. q_tbl_hdr->device_addr = (void *)dev;
  1314. strlcpy(q_tbl_hdr->name, "msm_cvp", sizeof(q_tbl_hdr->name));
  1315. q_tbl_hdr->qtbl_size = CVP_IFACEQ_TABLE_SIZE;
  1316. q_tbl_hdr->qtbl_qhdr0_offset =
  1317. sizeof(struct cvp_hfi_queue_table_header);
  1318. q_tbl_hdr->qtbl_qhdr_size = sizeof(struct cvp_hfi_queue_header);
  1319. q_tbl_hdr->qtbl_num_q = CVP_IFACEQ_NUMQ;
  1320. q_tbl_hdr->qtbl_num_active_q = CVP_IFACEQ_NUMQ;
  1321. iface_q = &dev->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1322. q_hdr = iface_q->q_hdr;
  1323. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1324. q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q;
  1325. iface_q = &dev->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1326. q_hdr = iface_q->q_hdr;
  1327. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1328. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q;
  1329. iface_q = &dev->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1330. q_hdr = iface_q->q_hdr;
  1331. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1332. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q;
  1333. /*
  1334. * Set receive request to zero on debug queue as there is no
  1335. * need of interrupt from cvp hardware for debug messages
  1336. */
  1337. q_hdr->qhdr_rx_req = 0;
  1338. }
  1339. static void __sfr_init(struct iris_hfi_device *dev)
  1340. {
  1341. struct cvp_hfi_sfr_struct *vsfr;
  1342. if (!dev)
  1343. return;
  1344. vsfr = (struct cvp_hfi_sfr_struct *) dev->sfr.align_virtual_addr;
  1345. if (vsfr)
  1346. vsfr->bufSize = ALIGNED_SFR_SIZE;
  1347. }
  1348. static int __interface_queues_init(struct iris_hfi_device *dev)
  1349. {
  1350. int rc = 0;
  1351. struct cvp_hfi_mem_map_table *qdss;
  1352. struct cvp_hfi_mem_map *mem_map;
  1353. struct cvp_mem_addr *mem_addr;
  1354. int num_entries = dev->res->qdss_addr_set.count;
  1355. phys_addr_t fw_bias = 0;
  1356. size_t q_size;
  1357. unsigned long mem_map_table_base_addr;
  1358. struct context_bank_info *cb;
  1359. q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE;
  1360. mem_addr = &dev->mem_addr;
  1361. if (!is_iommu_present(dev->res))
  1362. fw_bias = dev->cvp_hal_data->firmware_base;
  1363. if (dev->iface_q_table.align_virtual_addr) {
  1364. memset((void *)dev->iface_q_table.align_virtual_addr,
  1365. 0, q_size);
  1366. goto hfi_queue_init;
  1367. }
  1368. rc = __smem_alloc(dev, mem_addr, q_size, 1, SMEM_UNCACHED);
  1369. if (rc) {
  1370. dprintk(CVP_ERR, "iface_q_table_alloc_fail\n");
  1371. goto fail_alloc_queue;
  1372. }
  1373. dev->iface_q_table.align_virtual_addr = mem_addr->align_virtual_addr;
  1374. dev->iface_q_table.align_device_addr = mem_addr->align_device_addr -
  1375. fw_bias;
  1376. dev->iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1377. dev->iface_q_table.mem_data = mem_addr->mem_data;
  1378. hfi_queue_init:
  1379. __hfi_queue_init(dev);
  1380. if (dev->sfr.align_virtual_addr) {
  1381. memset((void *)dev->sfr.align_virtual_addr,
  1382. 0, ALIGNED_SFR_SIZE);
  1383. goto sfr_init;
  1384. }
  1385. rc = __smem_alloc(dev, mem_addr, ALIGNED_SFR_SIZE, 1, SMEM_UNCACHED);
  1386. if (rc) {
  1387. dprintk(CVP_WARN, "sfr_alloc_fail: SFR not will work\n");
  1388. dev->sfr.align_device_addr = 0;
  1389. } else {
  1390. dev->sfr.align_device_addr = mem_addr->align_device_addr -
  1391. fw_bias;
  1392. dev->sfr.align_virtual_addr = mem_addr->align_virtual_addr;
  1393. dev->sfr.mem_size = ALIGNED_SFR_SIZE;
  1394. dev->sfr.mem_data = mem_addr->mem_data;
  1395. }
  1396. sfr_init:
  1397. __sfr_init(dev);
  1398. if (dev->qdss.align_virtual_addr)
  1399. goto dsp_hfi_queue_init;
  1400. if ((msm_cvp_fw_debug_mode & HFI_DEBUG_MODE_QDSS) && num_entries) {
  1401. rc = __smem_alloc(dev, mem_addr, ALIGNED_QDSS_SIZE, 1,
  1402. SMEM_UNCACHED);
  1403. if (rc) {
  1404. dprintk(CVP_WARN,
  1405. "qdss_alloc_fail: QDSS messages logging will not work\n");
  1406. dev->qdss.align_device_addr = 0;
  1407. } else {
  1408. dev->qdss.align_device_addr =
  1409. mem_addr->align_device_addr - fw_bias;
  1410. dev->qdss.align_virtual_addr =
  1411. mem_addr->align_virtual_addr;
  1412. dev->qdss.mem_size = ALIGNED_QDSS_SIZE;
  1413. dev->qdss.mem_data = mem_addr->mem_data;
  1414. }
  1415. }
  1416. if (dev->qdss.align_virtual_addr) {
  1417. qdss =
  1418. (struct cvp_hfi_mem_map_table *)dev->qdss.align_virtual_addr;
  1419. qdss->mem_map_num_entries = num_entries;
  1420. mem_map_table_base_addr = dev->qdss.align_device_addr +
  1421. sizeof(struct cvp_hfi_mem_map_table);
  1422. qdss->mem_map_table_base_addr = mem_map_table_base_addr;
  1423. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1424. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1425. if (!cb) {
  1426. dprintk(CVP_ERR,
  1427. "%s: failed to get context bank\n", __func__);
  1428. return -EINVAL;
  1429. }
  1430. rc = __get_qdss_iommu_virtual_addr(dev, mem_map, cb->domain);
  1431. if (rc) {
  1432. dprintk(CVP_ERR,
  1433. "IOMMU mapping failed, Freeing qdss memdata\n");
  1434. __smem_free(dev, &dev->qdss.mem_data);
  1435. dev->qdss.align_virtual_addr = NULL;
  1436. dev->qdss.align_device_addr = 0;
  1437. }
  1438. }
  1439. dsp_hfi_queue_init:
  1440. rc = __interface_dsp_queues_init(dev);
  1441. if (rc) {
  1442. dprintk(CVP_ERR, "dsp_queues_init failed\n");
  1443. goto fail_alloc_queue;
  1444. }
  1445. __setup_ucregion_memory_map(dev);
  1446. return 0;
  1447. fail_alloc_queue:
  1448. return -ENOMEM;
  1449. }
  1450. static int __sys_set_debug(struct iris_hfi_device *device, u32 debug)
  1451. {
  1452. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1453. int rc = 0;
  1454. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1455. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1456. rc = call_hfi_pkt_op(device, sys_debug_config, pkt, debug);
  1457. if (rc) {
  1458. dprintk(CVP_WARN,
  1459. "Debug mode setting to FW failed\n");
  1460. return -ENOTEMPTY;
  1461. }
  1462. if (__iface_cmdq_write(device, pkt))
  1463. return -ENOTEMPTY;
  1464. return 0;
  1465. }
  1466. static int __sys_set_idle_indicator(struct iris_hfi_device *device,
  1467. bool enable)
  1468. {
  1469. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1470. int rc = 0;
  1471. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1472. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1473. rc = call_hfi_pkt_op(device, sys_set_idle_indicator, pkt, enable);
  1474. if (__iface_cmdq_write(device, pkt))
  1475. return -ENOTEMPTY;
  1476. return 0;
  1477. }
  1478. static int __sys_set_coverage(struct iris_hfi_device *device, u32 mode)
  1479. {
  1480. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1481. int rc = 0;
  1482. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1483. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1484. rc = call_hfi_pkt_op(device, sys_coverage_config,
  1485. pkt, mode);
  1486. if (rc) {
  1487. dprintk(CVP_WARN,
  1488. "Coverage mode setting to FW failed\n");
  1489. return -ENOTEMPTY;
  1490. }
  1491. if (__iface_cmdq_write(device, pkt)) {
  1492. dprintk(CVP_WARN, "Failed to send coverage pkt to f/w\n");
  1493. return -ENOTEMPTY;
  1494. }
  1495. return 0;
  1496. }
  1497. static int __sys_set_power_control(struct iris_hfi_device *device,
  1498. bool enable)
  1499. {
  1500. struct regulator_info *rinfo;
  1501. bool supported = false;
  1502. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1503. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1504. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1505. iris_hfi_for_each_regulator(device, rinfo) {
  1506. if (rinfo->has_hw_power_collapse) {
  1507. supported = true;
  1508. break;
  1509. }
  1510. }
  1511. if (!supported)
  1512. return 0;
  1513. call_hfi_pkt_op(device, sys_power_control, pkt, enable);
  1514. if (__iface_cmdq_write(device, pkt))
  1515. return -ENOTEMPTY;
  1516. return 0;
  1517. }
  1518. static void cvp_pm_qos_update(struct iris_hfi_device *device, bool vote_on)
  1519. {
  1520. u32 latency, off_vote_cnt;
  1521. int i, err = 0;
  1522. spin_lock(&device->res->pm_qos.lock);
  1523. off_vote_cnt = device->res->pm_qos.off_vote_cnt;
  1524. spin_unlock(&device->res->pm_qos.lock);
  1525. if (vote_on && off_vote_cnt)
  1526. return;
  1527. latency = vote_on ? device->res->pm_qos.latency_us :
  1528. PM_QOS_RESUME_LATENCY_DEFAULT_VALUE;
  1529. if (device->res->pm_qos.latency_us && device->res->pm_qos.pm_qos_hdls)
  1530. for (i = 0; i < device->res->pm_qos.silver_count; i++) {
  1531. err = dev_pm_qos_update_request(
  1532. &device->res->pm_qos.pm_qos_hdls[i],
  1533. latency);
  1534. if (err < 0) {
  1535. if (vote_on) {
  1536. dprintk(CVP_WARN,
  1537. "pm qos on failed %d\n", err);
  1538. } else {
  1539. dprintk(CVP_WARN,
  1540. "pm qos off failed %d\n", err);
  1541. }
  1542. }
  1543. }
  1544. }
  1545. static int iris_pm_qos_update(void *device)
  1546. {
  1547. struct iris_hfi_device *dev;
  1548. if (!device) {
  1549. dprintk(CVP_ERR, "%s Invalid device\n", __func__);
  1550. return -ENODEV;
  1551. }
  1552. dev = device;
  1553. mutex_lock(&dev->lock);
  1554. cvp_pm_qos_update(dev, true);
  1555. mutex_unlock(&dev->lock);
  1556. return 0;
  1557. }
  1558. static int iris_hfi_core_init(void *device)
  1559. {
  1560. int rc = 0;
  1561. u32 ipcc_iova;
  1562. struct cvp_hfi_cmd_sys_init_packet pkt;
  1563. struct cvp_hfi_cmd_sys_get_property_packet version_pkt;
  1564. struct iris_hfi_device *dev;
  1565. if (!device) {
  1566. dprintk(CVP_ERR, "Invalid device\n");
  1567. return -ENODEV;
  1568. }
  1569. dev = device;
  1570. dprintk(CVP_CORE, "Core initializing\n");
  1571. pm_stay_awake(dev->res->pdev->dev.parent);
  1572. mutex_lock(&dev->lock);
  1573. dev->bus_vote.data =
  1574. kzalloc(sizeof(struct cvp_bus_vote_data), GFP_KERNEL);
  1575. if (!dev->bus_vote.data) {
  1576. dprintk(CVP_ERR, "Bus vote data memory is not allocated\n");
  1577. rc = -ENOMEM;
  1578. goto err_no_mem;
  1579. }
  1580. dev->bus_vote.data_count = 1;
  1581. dev->bus_vote.data->power_mode = CVP_POWER_TURBO;
  1582. rc = __load_fw(dev);
  1583. if (rc) {
  1584. dprintk(CVP_ERR, "Failed to load Iris FW\n");
  1585. goto err_load_fw;
  1586. }
  1587. /* mmrm registration */
  1588. if (msm_cvp_mmrm_enabled) {
  1589. rc = msm_cvp_mmrm_register(device);
  1590. if (rc) {
  1591. dprintk(CVP_ERR, "Failed to register mmrm client\n");
  1592. goto err_core_init;
  1593. }
  1594. }
  1595. __set_state(dev, IRIS_STATE_INIT);
  1596. dev->reg_dumped = false;
  1597. dprintk(CVP_CORE, "Dev_Virt: %pa, Reg_Virt: %pK\n",
  1598. &dev->cvp_hal_data->firmware_base,
  1599. dev->cvp_hal_data->register_base);
  1600. rc = __interface_queues_init(dev);
  1601. if (rc) {
  1602. dprintk(CVP_ERR, "failed to init queues\n");
  1603. rc = -ENOMEM;
  1604. goto err_core_init;
  1605. }
  1606. cvp_register_va_md_region();
  1607. // Add node for dev struct
  1608. add_va_node_to_list(CVP_QUEUE_DUMP, dev,
  1609. sizeof(struct iris_hfi_device),
  1610. "iris_hfi_device-dev", false);
  1611. add_queue_header_to_va_md_list((void*)dev);
  1612. add_hfi_queue_to_va_md_list((void*)dev);
  1613. rc = msm_cvp_map_ipcc_regs(&ipcc_iova);
  1614. if (!rc) {
  1615. dprintk(CVP_CORE, "IPCC iova 0x%x\n", ipcc_iova);
  1616. __write_register(dev, CVP_MMAP_ADDR, ipcc_iova);
  1617. }
  1618. rc = __boot_firmware(dev);
  1619. if (rc) {
  1620. dprintk(CVP_ERR, "Failed to start core\n");
  1621. rc = -ENODEV;
  1622. goto err_core_init;
  1623. }
  1624. dev->version = __read_register(dev, CVP_VERSION_INFO);
  1625. rc = call_hfi_pkt_op(dev, sys_init, &pkt, 0);
  1626. if (rc) {
  1627. dprintk(CVP_ERR, "Failed to create sys init pkt\n");
  1628. goto err_core_init;
  1629. }
  1630. if (__iface_cmdq_write(dev, &pkt)) {
  1631. rc = -ENOTEMPTY;
  1632. goto err_core_init;
  1633. }
  1634. rc = call_hfi_pkt_op(dev, sys_image_version, &version_pkt);
  1635. if (rc || __iface_cmdq_write(dev, &version_pkt))
  1636. dprintk(CVP_WARN, "Failed to send image version pkt to f/w\n");
  1637. __sys_set_debug(device, msm_cvp_fw_debug);
  1638. __enable_subcaches(device);
  1639. __set_subcaches(device);
  1640. __set_ubwc_config(device);
  1641. __sys_set_idle_indicator(device, true);
  1642. if (dev->res->pm_qos.latency_us) {
  1643. int err = 0;
  1644. u32 i, cpu;
  1645. dev->res->pm_qos.pm_qos_hdls = kcalloc(
  1646. dev->res->pm_qos.silver_count,
  1647. sizeof(struct dev_pm_qos_request),
  1648. GFP_KERNEL);
  1649. if (!dev->res->pm_qos.pm_qos_hdls) {
  1650. dprintk(CVP_WARN, "Failed allocate pm_qos_hdls\n");
  1651. goto pm_qos_bail;
  1652. }
  1653. for (i = 0; i < dev->res->pm_qos.silver_count; i++) {
  1654. cpu = dev->res->pm_qos.silver_cores[i];
  1655. err = dev_pm_qos_add_request(
  1656. get_cpu_device(cpu),
  1657. &dev->res->pm_qos.pm_qos_hdls[i],
  1658. DEV_PM_QOS_RESUME_LATENCY,
  1659. dev->res->pm_qos.latency_us);
  1660. if (err < 0)
  1661. dprintk(CVP_WARN,
  1662. "%s pm_qos_add_req %d failed\n",
  1663. __func__, i);
  1664. }
  1665. }
  1666. pm_qos_bail:
  1667. mutex_unlock(&dev->lock);
  1668. cvp_dsp_send_hfi_queue();
  1669. pm_relax(dev->res->pdev->dev.parent);
  1670. dprintk(CVP_CORE, "Core inited successfully\n");
  1671. return 0;
  1672. err_core_init:
  1673. __set_state(dev, IRIS_STATE_DEINIT);
  1674. __unload_fw(dev);
  1675. if (dev->mmrm_cvp)
  1676. {
  1677. msm_cvp_mmrm_deregister(dev);
  1678. }
  1679. err_load_fw:
  1680. err_no_mem:
  1681. dprintk(CVP_ERR, "Core init failed\n");
  1682. mutex_unlock(&dev->lock);
  1683. pm_relax(dev->res->pdev->dev.parent);
  1684. return rc;
  1685. }
  1686. static int iris_hfi_core_release(void *dev)
  1687. {
  1688. int rc = 0, i;
  1689. struct iris_hfi_device *device = dev;
  1690. struct cvp_hal_session *session, *next;
  1691. struct dev_pm_qos_request *qos_hdl;
  1692. if (!device) {
  1693. dprintk(CVP_ERR, "invalid device\n");
  1694. return -ENODEV;
  1695. }
  1696. mutex_lock(&device->lock);
  1697. dprintk(CVP_WARN, "Core releasing\n");
  1698. if (device->res->pm_qos.latency_us &&
  1699. device->res->pm_qos.pm_qos_hdls) {
  1700. for (i = 0; i < device->res->pm_qos.silver_count; i++) {
  1701. qos_hdl = &device->res->pm_qos.pm_qos_hdls[i];
  1702. if ((qos_hdl != NULL) && dev_pm_qos_request_active(qos_hdl))
  1703. dev_pm_qos_remove_request(qos_hdl);
  1704. }
  1705. kfree(device->res->pm_qos.pm_qos_hdls);
  1706. device->res->pm_qos.pm_qos_hdls = NULL;
  1707. }
  1708. __resume(device);
  1709. __set_state(device, IRIS_STATE_DEINIT);
  1710. __dsp_shutdown(device, 0);
  1711. __disable_subcaches(device);
  1712. __unload_fw(device);
  1713. if (msm_cvp_mmrm_enabled) {
  1714. rc = msm_cvp_mmrm_deregister(device);
  1715. if (rc) {
  1716. dprintk(CVP_ERR,
  1717. "%s: Failed msm_cvp_mmrm_deregister:%d\n",
  1718. __func__, rc);
  1719. }
  1720. }
  1721. /* unlink all sessions from device */
  1722. list_for_each_entry_safe(session, next, &device->sess_head, list) {
  1723. list_del(&session->list);
  1724. session->device = NULL;
  1725. }
  1726. dprintk(CVP_CORE, "Core released successfully\n");
  1727. mutex_unlock(&device->lock);
  1728. return rc;
  1729. }
  1730. static void __core_clear_interrupt(struct iris_hfi_device *device)
  1731. {
  1732. u32 intr_status = 0, mask = 0;
  1733. if (!device) {
  1734. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1735. return;
  1736. }
  1737. intr_status = __read_register(device, CVP_WRAPPER_INTR_STATUS);
  1738. mask = (CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK | CVP_FATAL_INTR_BMSK);
  1739. if (intr_status & mask) {
  1740. device->intr_status |= intr_status;
  1741. device->reg_count++;
  1742. dprintk(CVP_CORE,
  1743. "INTERRUPT for device: %pK: times: %d status: %d\n",
  1744. device, device->reg_count, intr_status);
  1745. } else {
  1746. device->spur_count++;
  1747. }
  1748. __write_register(device, CVP_CPU_CS_A2HSOFTINTCLR, 1);
  1749. }
  1750. static int iris_hfi_core_trigger_ssr(void *device,
  1751. enum hal_ssr_trigger_type type)
  1752. {
  1753. struct cvp_hfi_cmd_sys_test_ssr_packet pkt;
  1754. int rc = 0;
  1755. struct iris_hfi_device *dev;
  1756. cvp_free_va_md_list();
  1757. if (!device) {
  1758. dprintk(CVP_ERR, "invalid device\n");
  1759. return -ENODEV;
  1760. }
  1761. dev = device;
  1762. if (mutex_trylock(&dev->lock)) {
  1763. rc = call_hfi_pkt_op(dev, ssr_cmd, type, &pkt);
  1764. if (rc) {
  1765. dprintk(CVP_ERR, "%s: failed to create packet\n",
  1766. __func__);
  1767. goto err_create_pkt;
  1768. }
  1769. if (__iface_cmdq_write(dev, &pkt))
  1770. rc = -ENOTEMPTY;
  1771. } else {
  1772. return -EAGAIN;
  1773. }
  1774. err_create_pkt:
  1775. mutex_unlock(&dev->lock);
  1776. return rc;
  1777. }
  1778. static void __set_default_sys_properties(struct iris_hfi_device *device)
  1779. {
  1780. if (__sys_set_debug(device, msm_cvp_fw_debug))
  1781. dprintk(CVP_WARN, "Setting fw_debug msg ON failed\n");
  1782. if (__sys_set_power_control(device, msm_cvp_fw_low_power_mode))
  1783. dprintk(CVP_WARN, "Setting h/w power collapse ON failed\n");
  1784. }
  1785. static void __session_clean(struct cvp_hal_session *session)
  1786. {
  1787. struct cvp_hal_session *temp, *next;
  1788. struct iris_hfi_device *device;
  1789. if (!session || !session->device) {
  1790. dprintk(CVP_WARN, "%s: invalid params\n", __func__);
  1791. return;
  1792. }
  1793. device = session->device;
  1794. dprintk(CVP_SESS, "deleted the session: %pK\n", session);
  1795. /*
  1796. * session might have been removed from the device list in
  1797. * core_release, so check and remove if it is in the list
  1798. */
  1799. list_for_each_entry_safe(temp, next, &device->sess_head, list) {
  1800. if (session == temp) {
  1801. list_del(&session->list);
  1802. break;
  1803. }
  1804. }
  1805. /* Poison the session handle with zeros */
  1806. *session = (struct cvp_hal_session){ {0} };
  1807. kfree(session);
  1808. }
  1809. static int iris_hfi_session_clean(void *session)
  1810. {
  1811. struct cvp_hal_session *sess_close;
  1812. struct iris_hfi_device *device;
  1813. if (!session) {
  1814. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1815. return -EINVAL;
  1816. }
  1817. sess_close = session;
  1818. device = sess_close->device;
  1819. if (!device) {
  1820. dprintk(CVP_ERR, "Invalid device handle %s\n", __func__);
  1821. return -EINVAL;
  1822. }
  1823. mutex_lock(&device->lock);
  1824. __session_clean(sess_close);
  1825. mutex_unlock(&device->lock);
  1826. return 0;
  1827. }
  1828. static int iris_hfi_session_init(void *device, void *session_id,
  1829. void **new_session)
  1830. {
  1831. struct cvp_hfi_cmd_sys_session_init_packet pkt;
  1832. struct iris_hfi_device *dev;
  1833. struct cvp_hal_session *s;
  1834. if (!device || !new_session) {
  1835. dprintk(CVP_ERR, "%s - invalid input\n", __func__);
  1836. return -EINVAL;
  1837. }
  1838. dev = device;
  1839. mutex_lock(&dev->lock);
  1840. s = kzalloc(sizeof(*s), GFP_KERNEL);
  1841. if (!s) {
  1842. dprintk(CVP_ERR, "new session fail: Out of memory\n");
  1843. goto err_session_init_fail;
  1844. }
  1845. s->session_id = session_id;
  1846. s->device = dev;
  1847. dprintk(CVP_SESS,
  1848. "%s: inst %pK, session %pK\n", __func__, session_id, s);
  1849. list_add_tail(&s->list, &dev->sess_head);
  1850. __set_default_sys_properties(device);
  1851. if (call_hfi_pkt_op(dev, session_init, &pkt, s)) {
  1852. dprintk(CVP_ERR, "session_init: failed to create packet\n");
  1853. goto err_session_init_fail;
  1854. }
  1855. *new_session = s;
  1856. if (__iface_cmdq_write(dev, &pkt))
  1857. goto err_session_init_fail;
  1858. mutex_unlock(&dev->lock);
  1859. return 0;
  1860. err_session_init_fail:
  1861. if (s)
  1862. __session_clean(s);
  1863. *new_session = NULL;
  1864. mutex_unlock(&dev->lock);
  1865. return -EINVAL;
  1866. }
  1867. static int __send_session_cmd(struct cvp_hal_session *session, int pkt_type)
  1868. {
  1869. struct cvp_hal_session_cmd_pkt pkt;
  1870. int rc = 0;
  1871. struct iris_hfi_device *device = session->device;
  1872. if (!__is_session_valid(device, session, __func__))
  1873. return -ECONNRESET;
  1874. rc = call_hfi_pkt_op(device, session_cmd,
  1875. &pkt, pkt_type, session);
  1876. if (rc == -EPERM)
  1877. return 0;
  1878. if (rc) {
  1879. dprintk(CVP_ERR, "send session cmd: create pkt failed\n");
  1880. goto err_create_pkt;
  1881. }
  1882. if (__iface_cmdq_write(session->device, &pkt))
  1883. rc = -ENOTEMPTY;
  1884. err_create_pkt:
  1885. return rc;
  1886. }
  1887. static int iris_hfi_session_end(void *session)
  1888. {
  1889. struct cvp_hal_session *sess;
  1890. struct iris_hfi_device *device;
  1891. int rc = 0;
  1892. if (!session) {
  1893. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1894. return -EINVAL;
  1895. }
  1896. sess = session;
  1897. device = sess->device;
  1898. if (!device) {
  1899. dprintk(CVP_ERR, "Invalid session %s\n", __func__);
  1900. return -EINVAL;
  1901. }
  1902. mutex_lock(&device->lock);
  1903. if (msm_cvp_fw_coverage) {
  1904. if (__sys_set_coverage(sess->device, msm_cvp_fw_coverage))
  1905. dprintk(CVP_WARN, "Fw_coverage msg ON failed\n");
  1906. }
  1907. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_END);
  1908. mutex_unlock(&device->lock);
  1909. return rc;
  1910. }
  1911. static int iris_hfi_session_abort(void *sess)
  1912. {
  1913. struct cvp_hal_session *session = sess;
  1914. struct iris_hfi_device *device;
  1915. int rc = 0;
  1916. if (!session || !session->device) {
  1917. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1918. return -EINVAL;
  1919. }
  1920. device = session->device;
  1921. mutex_lock(&device->lock);
  1922. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_ABORT);
  1923. mutex_unlock(&device->lock);
  1924. return rc;
  1925. }
  1926. static int iris_hfi_session_set_buffers(void *sess, u32 iova, u32 size)
  1927. {
  1928. struct cvp_hfi_cmd_session_set_buffers_packet pkt;
  1929. int rc = 0;
  1930. struct cvp_hal_session *session = sess;
  1931. struct iris_hfi_device *device;
  1932. if (!session || !session->device || !iova || !size) {
  1933. dprintk(CVP_ERR, "Invalid Params\n");
  1934. return -EINVAL;
  1935. }
  1936. device = session->device;
  1937. mutex_lock(&device->lock);
  1938. if (!__is_session_valid(device, session, __func__)) {
  1939. rc = -ECONNRESET;
  1940. goto err_create_pkt;
  1941. }
  1942. rc = call_hfi_pkt_op(device, session_set_buffers,
  1943. &pkt, session, iova, size);
  1944. if (rc) {
  1945. dprintk(CVP_ERR, "set buffers: failed to create packet\n");
  1946. goto err_create_pkt;
  1947. }
  1948. if (__iface_cmdq_write(session->device, &pkt))
  1949. rc = -ENOTEMPTY;
  1950. err_create_pkt:
  1951. mutex_unlock(&device->lock);
  1952. return rc;
  1953. }
  1954. static int iris_hfi_session_release_buffers(void *sess)
  1955. {
  1956. struct cvp_session_release_buffers_packet pkt;
  1957. int rc = 0;
  1958. struct cvp_hal_session *session = sess;
  1959. struct iris_hfi_device *device;
  1960. if (!session || !session->device) {
  1961. dprintk(CVP_ERR, "Invalid Params\n");
  1962. return -EINVAL;
  1963. }
  1964. device = session->device;
  1965. mutex_lock(&device->lock);
  1966. if (!__is_session_valid(device, session, __func__)) {
  1967. rc = -ECONNRESET;
  1968. goto err_create_pkt;
  1969. }
  1970. rc = call_hfi_pkt_op(device, session_release_buffers, &pkt, session);
  1971. if (rc) {
  1972. dprintk(CVP_ERR, "release buffers: failed to create packet\n");
  1973. goto err_create_pkt;
  1974. }
  1975. if (__iface_cmdq_write(session->device, &pkt))
  1976. rc = -ENOTEMPTY;
  1977. err_create_pkt:
  1978. mutex_unlock(&device->lock);
  1979. return rc;
  1980. }
  1981. static int iris_hfi_session_send(void *sess,
  1982. struct eva_kmd_hfi_packet *in_pkt)
  1983. {
  1984. int rc = 0;
  1985. struct eva_kmd_hfi_packet pkt;
  1986. struct cvp_hal_session *session = sess;
  1987. struct iris_hfi_device *device;
  1988. if (!session || !session->device) {
  1989. dprintk(CVP_ERR, "invalid session");
  1990. return -ENODEV;
  1991. }
  1992. device = session->device;
  1993. mutex_lock(&device->lock);
  1994. if (!__is_session_valid(device, session, __func__)) {
  1995. rc = -ECONNRESET;
  1996. goto err_send_pkt;
  1997. }
  1998. rc = call_hfi_pkt_op(device, session_send,
  1999. &pkt, session, in_pkt);
  2000. if (rc) {
  2001. dprintk(CVP_ERR,
  2002. "failed to create pkt\n");
  2003. goto err_send_pkt;
  2004. }
  2005. if (__iface_cmdq_write(session->device, &pkt))
  2006. rc = -ENOTEMPTY;
  2007. err_send_pkt:
  2008. mutex_unlock(&device->lock);
  2009. return rc;
  2010. return rc;
  2011. }
  2012. static int iris_hfi_session_flush(void *sess)
  2013. {
  2014. struct cvp_hal_session *session = sess;
  2015. struct iris_hfi_device *device;
  2016. int rc = 0;
  2017. if (!session || !session->device) {
  2018. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2019. return -EINVAL;
  2020. }
  2021. device = session->device;
  2022. mutex_lock(&device->lock);
  2023. rc = __send_session_cmd(session, HFI_CMD_SESSION_CVP_FLUSH);
  2024. mutex_unlock(&device->lock);
  2025. return rc;
  2026. }
  2027. static void __process_fatal_error(
  2028. struct iris_hfi_device *device)
  2029. {
  2030. struct msm_cvp_cb_cmd_done cmd_done = {0};
  2031. cmd_done.device_id = device->device_id;
  2032. device->callback(HAL_SYS_ERROR, &cmd_done);
  2033. }
  2034. static int __prepare_pc(struct iris_hfi_device *device)
  2035. {
  2036. int rc = 0;
  2037. struct cvp_hfi_cmd_sys_pc_prep_packet pkt;
  2038. rc = call_hfi_pkt_op(device, sys_pc_prep, &pkt);
  2039. if (rc) {
  2040. dprintk(CVP_ERR, "Failed to create sys pc prep pkt\n");
  2041. goto err_pc_prep;
  2042. }
  2043. if (__iface_cmdq_write(device, &pkt))
  2044. rc = -ENOTEMPTY;
  2045. if (rc)
  2046. dprintk(CVP_ERR, "Failed to prepare iris for power off");
  2047. err_pc_prep:
  2048. return rc;
  2049. }
  2050. static void iris_hfi_pm_handler(struct work_struct *work)
  2051. {
  2052. int rc = 0;
  2053. struct msm_cvp_core *core;
  2054. struct iris_hfi_device *device;
  2055. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2056. if (core)
  2057. device = core->device->hfi_device_data;
  2058. else
  2059. return;
  2060. if (!device) {
  2061. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  2062. return;
  2063. }
  2064. dprintk(CVP_PWR,
  2065. "Entering %s\n", __func__);
  2066. /*
  2067. * It is ok to check this variable outside the lock since
  2068. * it is being updated in this context only
  2069. */
  2070. if (device->skip_pc_count >= CVP_MAX_PC_SKIP_COUNT) {
  2071. dprintk(CVP_WARN, "Failed to PC for %d times\n",
  2072. device->skip_pc_count);
  2073. device->skip_pc_count = 0;
  2074. __process_fatal_error(device);
  2075. return;
  2076. }
  2077. mutex_lock(&device->lock);
  2078. if (gfa_cv.state == DSP_SUSPEND)
  2079. rc = __power_collapse(device, true);
  2080. else
  2081. rc = __power_collapse(device, false);
  2082. mutex_unlock(&device->lock);
  2083. switch (rc) {
  2084. case 0:
  2085. device->skip_pc_count = 0;
  2086. /* Cancel pending delayed works if any */
  2087. cancel_delayed_work(&iris_hfi_pm_work);
  2088. dprintk(CVP_PWR, "%s: power collapse successful!\n",
  2089. __func__);
  2090. break;
  2091. case -EBUSY:
  2092. device->skip_pc_count = 0;
  2093. dprintk(CVP_PWR, "%s: retry PC as cvp is busy\n", __func__);
  2094. queue_delayed_work(device->iris_pm_workq,
  2095. &iris_hfi_pm_work, msecs_to_jiffies(
  2096. device->res->msm_cvp_pwr_collapse_delay));
  2097. break;
  2098. case -EAGAIN:
  2099. device->skip_pc_count++;
  2100. dprintk(CVP_WARN, "%s: retry power collapse (count %d)\n",
  2101. __func__, device->skip_pc_count);
  2102. queue_delayed_work(device->iris_pm_workq,
  2103. &iris_hfi_pm_work, msecs_to_jiffies(
  2104. device->res->msm_cvp_pwr_collapse_delay));
  2105. break;
  2106. default:
  2107. dprintk(CVP_ERR, "%s: power collapse failed\n", __func__);
  2108. break;
  2109. }
  2110. }
  2111. static int __power_collapse(struct iris_hfi_device *device, bool force)
  2112. {
  2113. int rc = 0;
  2114. u32 wfi_status = 0, idle_status = 0, pc_ready = 0;
  2115. u32 flags = 0;
  2116. int count = 0;
  2117. const int max_tries = 150;
  2118. if (!device) {
  2119. dprintk(CVP_ERR, "%s: invalid params\n", __func__);
  2120. return -EINVAL;
  2121. }
  2122. if (!device->power_enabled) {
  2123. dprintk(CVP_PWR, "%s: Power already disabled\n",
  2124. __func__);
  2125. goto exit;
  2126. }
  2127. rc = __core_in_valid_state(device);
  2128. if (!rc) {
  2129. dprintk(CVP_WARN,
  2130. "Core is in bad state, Skipping power collapse\n");
  2131. return -EINVAL;
  2132. }
  2133. rc = __dsp_suspend(device, force, flags);
  2134. if (rc == -EBUSY)
  2135. goto exit;
  2136. else if (rc)
  2137. goto skip_power_off;
  2138. __flush_debug_queue(device, device->raw_packet);
  2139. pc_ready = __read_register(device, CVP_CTRL_STATUS) &
  2140. CVP_CTRL_STATUS_PC_READY;
  2141. if (!pc_ready) {
  2142. wfi_status = __read_register(device,
  2143. CVP_WRAPPER_CPU_STATUS);
  2144. idle_status = __read_register(device,
  2145. CVP_CTRL_STATUS);
  2146. if (!(wfi_status & BIT(0))) {
  2147. dprintk(CVP_WARN,
  2148. "Skipping PC as wfi_status (%#x) bit not set\n",
  2149. wfi_status);
  2150. goto skip_power_off;
  2151. }
  2152. if (!(idle_status & BIT(30))) {
  2153. dprintk(CVP_WARN,
  2154. "Skipping PC as idle_status (%#x) bit not set\n",
  2155. idle_status);
  2156. goto skip_power_off;
  2157. }
  2158. rc = __prepare_pc(device);
  2159. if (rc) {
  2160. dprintk(CVP_WARN, "Failed PC %d\n", rc);
  2161. goto skip_power_off;
  2162. }
  2163. while (count < max_tries) {
  2164. wfi_status = __read_register(device,
  2165. CVP_WRAPPER_CPU_STATUS);
  2166. pc_ready = __read_register(device,
  2167. CVP_CTRL_STATUS);
  2168. if ((wfi_status & BIT(0)) && (pc_ready &
  2169. CVP_CTRL_STATUS_PC_READY))
  2170. break;
  2171. usleep_range(150, 250);
  2172. count++;
  2173. }
  2174. if (count == max_tries) {
  2175. dprintk(CVP_ERR,
  2176. "Skip PC. Core is not ready (%#x, %#x)\n",
  2177. wfi_status, pc_ready);
  2178. goto skip_power_off;
  2179. }
  2180. } else {
  2181. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  2182. if (!(wfi_status & BIT(0))) {
  2183. dprintk(CVP_WARN,
  2184. "Skip PC as wfi_status (%#x) bit not set\n",
  2185. wfi_status);
  2186. goto skip_power_off;
  2187. }
  2188. }
  2189. rc = __suspend(device);
  2190. if (rc)
  2191. dprintk(CVP_ERR, "Failed __suspend\n");
  2192. exit:
  2193. return rc;
  2194. skip_power_off:
  2195. dprintk(CVP_PWR, "Skip PC(%#x, %#x, %#x)\n",
  2196. wfi_status, idle_status, pc_ready);
  2197. __flush_debug_queue(device, device->raw_packet);
  2198. return -EAGAIN;
  2199. }
  2200. static void __process_sys_error(struct iris_hfi_device *device)
  2201. {
  2202. struct cvp_hfi_sfr_struct *vsfr = NULL;
  2203. vsfr = (struct cvp_hfi_sfr_struct *)device->sfr.align_virtual_addr;
  2204. if (vsfr) {
  2205. void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
  2206. /*
  2207. * SFR isn't guaranteed to be NULL terminated
  2208. * since SYS_ERROR indicates that Iris is in the
  2209. * process of crashing.
  2210. */
  2211. if (p == NULL)
  2212. vsfr->rg_data[vsfr->bufSize - 1] = '\0';
  2213. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2214. vsfr->rg_data);
  2215. }
  2216. }
  2217. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet)
  2218. {
  2219. bool local_packet = false;
  2220. enum cvp_msg_prio log_level = CVP_FW;
  2221. if (!device) {
  2222. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  2223. return;
  2224. }
  2225. if (!packet) {
  2226. packet = kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  2227. if (!packet) {
  2228. dprintk(CVP_ERR, "In %s() Fail to allocate mem\n",
  2229. __func__);
  2230. return;
  2231. }
  2232. local_packet = true;
  2233. /*
  2234. * Local packek is used when something FATAL occurred.
  2235. * It is good to print these logs by default.
  2236. */
  2237. log_level = CVP_ERR;
  2238. }
  2239. #define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \
  2240. if (pkt_size < pkt_hdr_size || \
  2241. payload_size < MIN_PAYLOAD_SIZE || \
  2242. payload_size > \
  2243. (pkt_size - pkt_hdr_size + sizeof(u8))) { \
  2244. dprintk(CVP_ERR, \
  2245. "%s: invalid msg size - %d\n", \
  2246. __func__, pkt->msg_size); \
  2247. continue; \
  2248. } \
  2249. })
  2250. while (!__iface_dbgq_read(device, packet)) {
  2251. struct cvp_hfi_packet_header *pkt =
  2252. (struct cvp_hfi_packet_header *) packet;
  2253. if (pkt->size < sizeof(struct cvp_hfi_packet_header)) {
  2254. dprintk(CVP_ERR, "Invalid pkt size - %s\n",
  2255. __func__);
  2256. continue;
  2257. }
  2258. if (pkt->packet_type == HFI_MSG_SYS_DEBUG) {
  2259. struct cvp_hfi_msg_sys_debug_packet *pkt =
  2260. (struct cvp_hfi_msg_sys_debug_packet *) packet;
  2261. SKIP_INVALID_PKT(pkt->size,
  2262. pkt->msg_size, sizeof(*pkt));
  2263. /*
  2264. * All fw messages starts with new line character. This
  2265. * causes dprintk to print this message in two lines
  2266. * in the kernel log. Ignoring the first character
  2267. * from the message fixes this to print it in a single
  2268. * line.
  2269. */
  2270. pkt->rg_msg_data[pkt->msg_size-1] = '\0';
  2271. dprintk(log_level, "%s", &pkt->rg_msg_data[1]);
  2272. }
  2273. }
  2274. #undef SKIP_INVALID_PKT
  2275. if (local_packet)
  2276. kfree(packet);
  2277. }
  2278. static bool __is_session_valid(struct iris_hfi_device *device,
  2279. struct cvp_hal_session *session, const char *func)
  2280. {
  2281. struct cvp_hal_session *temp = NULL;
  2282. if (!device || !session)
  2283. goto invalid;
  2284. list_for_each_entry(temp, &device->sess_head, list)
  2285. if (session == temp)
  2286. return true;
  2287. invalid:
  2288. dprintk(CVP_WARN, "%s: device %pK, invalid session %pK\n",
  2289. func, device, session);
  2290. return false;
  2291. }
  2292. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  2293. u32 session_id)
  2294. {
  2295. struct cvp_hal_session *temp = NULL;
  2296. list_for_each_entry(temp, &device->sess_head, list) {
  2297. if (session_id == hash32_ptr(temp))
  2298. return temp;
  2299. }
  2300. return NULL;
  2301. }
  2302. #define _INVALID_MSG_ "Unrecognized MSG (%#x) session (%pK), discarding\n"
  2303. #define _INVALID_STATE_ "Ignore responses from %d to %d invalid state\n"
  2304. #define _DEVFREQ_FAIL_ "Failed to add devfreq device bus %s governor %s: %d\n"
  2305. static void process_system_msg(struct msm_cvp_cb_info *info,
  2306. struct iris_hfi_device *device,
  2307. void *raw_packet)
  2308. {
  2309. struct cvp_hal_sys_init_done sys_init_done = {0};
  2310. switch (info->response_type) {
  2311. case HAL_SYS_ERROR:
  2312. __process_sys_error(device);
  2313. break;
  2314. case HAL_SYS_RELEASE_RESOURCE_DONE:
  2315. dprintk(CVP_CORE, "Received SYS_RELEASE_RESOURCE\n");
  2316. break;
  2317. case HAL_SYS_INIT_DONE:
  2318. dprintk(CVP_CORE, "Received SYS_INIT_DONE\n");
  2319. sys_init_done.capabilities =
  2320. device->sys_init_capabilities;
  2321. cvp_hfi_process_sys_init_done_prop_read(
  2322. (struct cvp_hfi_msg_sys_init_done_packet *)
  2323. raw_packet, &sys_init_done);
  2324. info->response.cmd.data.sys_init_done = sys_init_done;
  2325. break;
  2326. default:
  2327. break;
  2328. }
  2329. }
  2330. static void **get_session_id(struct msm_cvp_cb_info *info)
  2331. {
  2332. void **session_id = NULL;
  2333. /* For session-related packets, validate session */
  2334. switch (info->response_type) {
  2335. case HAL_SESSION_INIT_DONE:
  2336. case HAL_SESSION_END_DONE:
  2337. case HAL_SESSION_ABORT_DONE:
  2338. case HAL_SESSION_STOP_DONE:
  2339. case HAL_SESSION_FLUSH_DONE:
  2340. case HAL_SESSION_SET_BUFFER_DONE:
  2341. case HAL_SESSION_SUSPEND_DONE:
  2342. case HAL_SESSION_RESUME_DONE:
  2343. case HAL_SESSION_SET_PROP_DONE:
  2344. case HAL_SESSION_GET_PROP_DONE:
  2345. case HAL_SESSION_RELEASE_BUFFER_DONE:
  2346. case HAL_SESSION_REGISTER_BUFFER_DONE:
  2347. case HAL_SESSION_UNREGISTER_BUFFER_DONE:
  2348. case HAL_SESSION_PROPERTY_INFO:
  2349. case HAL_SESSION_EVENT_CHANGE:
  2350. case HAL_SESSION_DUMP_NOTIFY:
  2351. session_id = &info->response.cmd.session_id;
  2352. break;
  2353. case HAL_SESSION_ERROR:
  2354. session_id = &info->response.data.session_id;
  2355. break;
  2356. case HAL_RESPONSE_UNUSED:
  2357. default:
  2358. session_id = NULL;
  2359. break;
  2360. }
  2361. return session_id;
  2362. }
  2363. static void print_msg_hdr(void *hdr)
  2364. {
  2365. struct cvp_hfi_msg_session_hdr *new_hdr =
  2366. (struct cvp_hfi_msg_session_hdr *)hdr;
  2367. dprintk(CVP_HFI, "HFI MSG received: %x %x %x %x %x %x %x\n",
  2368. new_hdr->size, new_hdr->packet_type,
  2369. new_hdr->session_id,
  2370. new_hdr->client_data.transaction_id,
  2371. new_hdr->client_data.data1,
  2372. new_hdr->client_data.data2,
  2373. new_hdr->error_type);
  2374. }
  2375. static int __response_handler(struct iris_hfi_device *device)
  2376. {
  2377. struct msm_cvp_cb_info *packets;
  2378. int packet_count = 0;
  2379. u8 *raw_packet = NULL;
  2380. bool requeue_pm_work = true;
  2381. if (!device || device->state != IRIS_STATE_INIT)
  2382. return 0;
  2383. packets = device->response_pkt;
  2384. raw_packet = device->raw_packet;
  2385. if (!raw_packet || !packets) {
  2386. dprintk(CVP_ERR,
  2387. "%s: Invalid args : Res pkt = %pK, Raw pkt = %pK\n",
  2388. __func__, packets, raw_packet);
  2389. return 0;
  2390. }
  2391. if (device->intr_status & CVP_FATAL_INTR_BMSK) {
  2392. struct cvp_hfi_sfr_struct *vsfr = (struct cvp_hfi_sfr_struct *)
  2393. device->sfr.align_virtual_addr;
  2394. struct msm_cvp_cb_info info = {
  2395. .response_type = HAL_SYS_WATCHDOG_TIMEOUT,
  2396. .response.cmd = {
  2397. .device_id = device->device_id,
  2398. }
  2399. };
  2400. if (vsfr)
  2401. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2402. vsfr->rg_data);
  2403. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CPU_NOC_BMSK)
  2404. dprintk(CVP_ERR, "Received Xtensa NOC error\n");
  2405. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CORE_NOC_BMSK)
  2406. dprintk(CVP_ERR, "Received CVP core NOC error\n");
  2407. if (device->intr_status & CVP_WRAPPER_INTR_MASK_A2HWD_BMSK)
  2408. dprintk(CVP_ERR, "Received CVP watchdog timeout\n");
  2409. packets[packet_count++] = info;
  2410. goto exit;
  2411. }
  2412. /* Bleed the msg queue dry of packets */
  2413. while (!__iface_msgq_read(device, raw_packet)) {
  2414. void **session_id = NULL;
  2415. struct msm_cvp_cb_info *info = &packets[packet_count++];
  2416. struct cvp_hfi_msg_session_hdr *hdr =
  2417. (struct cvp_hfi_msg_session_hdr *)raw_packet;
  2418. int rc = 0;
  2419. print_msg_hdr(hdr);
  2420. rc = cvp_hfi_process_msg_packet(device->device_id,
  2421. raw_packet, info);
  2422. if (rc) {
  2423. dprintk(CVP_WARN,
  2424. "Corrupt/unknown packet found, discarding\n");
  2425. --packet_count;
  2426. continue;
  2427. } else if (info->response_type == HAL_NO_RESP) {
  2428. --packet_count;
  2429. continue;
  2430. }
  2431. /* Process the packet types that we're interested in */
  2432. process_system_msg(info, device, raw_packet);
  2433. session_id = get_session_id(info);
  2434. /*
  2435. * hfi_process_msg_packet provides a session_id that's a hashed
  2436. * value of struct cvp_hal_session, we need to coerce the hashed
  2437. * value back to pointer that we can use. Ideally, hfi_process\
  2438. * _msg_packet should take care of this, but it doesn't have
  2439. * required information for it
  2440. */
  2441. if (session_id) {
  2442. struct cvp_hal_session *session = NULL;
  2443. if (upper_32_bits((uintptr_t)*session_id) != 0) {
  2444. dprintk(CVP_ERR,
  2445. "Upper 32-bits != 0 for sess_id=%pK\n",
  2446. *session_id);
  2447. }
  2448. session = __get_session(device,
  2449. (u32)(uintptr_t)*session_id);
  2450. if (!session) {
  2451. dprintk(CVP_ERR, _INVALID_MSG_,
  2452. info->response_type,
  2453. *session_id);
  2454. --packet_count;
  2455. continue;
  2456. }
  2457. *session_id = session->session_id;
  2458. }
  2459. if (packet_count >= cvp_max_packets) {
  2460. dprintk(CVP_WARN,
  2461. "Too many packets in message queue!\n");
  2462. break;
  2463. }
  2464. /* do not read packets after sys error packet */
  2465. if (info->response_type == HAL_SYS_ERROR)
  2466. break;
  2467. }
  2468. if (requeue_pm_work && device->res->sw_power_collapsible) {
  2469. cancel_delayed_work(&iris_hfi_pm_work);
  2470. if (!queue_delayed_work(device->iris_pm_workq,
  2471. &iris_hfi_pm_work,
  2472. msecs_to_jiffies(
  2473. device->res->msm_cvp_pwr_collapse_delay))) {
  2474. dprintk(CVP_ERR, "PM work already scheduled\n");
  2475. }
  2476. }
  2477. exit:
  2478. __flush_debug_queue(device, raw_packet);
  2479. return packet_count;
  2480. }
  2481. static void iris_hfi_core_work_handler(struct work_struct *work)
  2482. {
  2483. struct msm_cvp_core *core;
  2484. struct iris_hfi_device *device;
  2485. int num_responses = 0, i = 0;
  2486. u32 intr_status;
  2487. static bool warning_on = true;
  2488. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2489. if (core)
  2490. device = core->device->hfi_device_data;
  2491. else
  2492. return;
  2493. mutex_lock(&device->lock);
  2494. if (!__core_in_valid_state(device)) {
  2495. if (warning_on) {
  2496. dprintk(CVP_WARN, "%s Core not in init state\n",
  2497. __func__);
  2498. warning_on = false;
  2499. }
  2500. goto err_no_work;
  2501. }
  2502. warning_on = true;
  2503. if (!device->callback) {
  2504. dprintk(CVP_ERR, "No interrupt callback function: %pK\n",
  2505. device);
  2506. goto err_no_work;
  2507. }
  2508. if (__resume(device)) {
  2509. dprintk(CVP_ERR, "%s: Power enable failed\n", __func__);
  2510. goto err_no_work;
  2511. }
  2512. __core_clear_interrupt(device);
  2513. num_responses = __response_handler(device);
  2514. dprintk(CVP_HFI, "%s:: cvp_driver_debug num_responses = %d ",
  2515. __func__, num_responses);
  2516. err_no_work:
  2517. /* Keep the interrupt status before releasing device lock */
  2518. intr_status = device->intr_status;
  2519. mutex_unlock(&device->lock);
  2520. /*
  2521. * Issue the callbacks outside of the locked contex to preserve
  2522. * re-entrancy.
  2523. */
  2524. for (i = 0; !IS_ERR_OR_NULL(device->response_pkt) &&
  2525. i < num_responses; ++i) {
  2526. struct msm_cvp_cb_info *r = &device->response_pkt[i];
  2527. void *rsp = (void *)&r->response;
  2528. if (!__core_in_valid_state(device)) {
  2529. dprintk(CVP_ERR,
  2530. _INVALID_STATE_, (i + 1), num_responses);
  2531. break;
  2532. }
  2533. dprintk(CVP_HFI, "Processing response %d of %d, type %d\n",
  2534. (i + 1), num_responses, r->response_type);
  2535. device->callback(r->response_type, rsp);
  2536. }
  2537. /* We need re-enable the irq which was disabled in ISR handler */
  2538. if (!(intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  2539. enable_irq(device->cvp_hal_data->irq);
  2540. /*
  2541. * XXX: Don't add any code beyond here. Reacquiring locks after release
  2542. * it above doesn't guarantee the atomicity that we're aiming for.
  2543. */
  2544. }
  2545. static DECLARE_WORK(iris_hfi_work, iris_hfi_core_work_handler);
  2546. irqreturn_t cvp_hfi_isr(int irq, void *dev)
  2547. {
  2548. struct iris_hfi_device *device = dev;
  2549. disable_irq_nosync(irq);
  2550. queue_work(device->cvp_workq, &iris_hfi_work);
  2551. return IRQ_HANDLED;
  2552. }
  2553. static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
  2554. int reset_index, enum reset_state state,
  2555. enum power_state pwr_state)
  2556. {
  2557. int rc = 0;
  2558. struct reset_control *rst;
  2559. struct reset_info rst_info;
  2560. struct reset_set *rst_set = &res->reset_set;
  2561. if (!rst_set->reset_tbl)
  2562. return 0;
  2563. rst_info = rst_set->reset_tbl[reset_index];
  2564. rst = rst_info.rst;
  2565. dprintk(CVP_PWR, "reset_clk: name %s reset_state %d rst %pK ps=%d\n",
  2566. rst_set->reset_tbl[reset_index].name, state, rst, pwr_state);
  2567. switch (state) {
  2568. case INIT:
  2569. if (rst)
  2570. goto skip_reset_init;
  2571. rst = devm_reset_control_get(&res->pdev->dev,
  2572. rst_set->reset_tbl[reset_index].name);
  2573. if (IS_ERR(rst))
  2574. rc = PTR_ERR(rst);
  2575. rst_set->reset_tbl[reset_index].rst = rst;
  2576. break;
  2577. case ASSERT:
  2578. if (!rst) {
  2579. rc = PTR_ERR(rst);
  2580. goto failed_to_reset;
  2581. }
  2582. if (pwr_state != CVP_POWER_IGNORED &&
  2583. pwr_state != rst_info.required_state)
  2584. break;
  2585. rc = reset_control_assert(rst);
  2586. break;
  2587. case DEASSERT:
  2588. if (!rst) {
  2589. rc = PTR_ERR(rst);
  2590. goto failed_to_reset;
  2591. }
  2592. if (pwr_state != CVP_POWER_IGNORED &&
  2593. pwr_state != rst_info.required_state)
  2594. break;
  2595. rc = reset_control_deassert(rst);
  2596. break;
  2597. default:
  2598. dprintk(CVP_ERR, "Invalid reset request\n");
  2599. if (rc)
  2600. goto failed_to_reset;
  2601. }
  2602. return 0;
  2603. skip_reset_init:
  2604. failed_to_reset:
  2605. return rc;
  2606. }
  2607. static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
  2608. {
  2609. int rc, i;
  2610. enum power_state s;
  2611. if (!device) {
  2612. dprintk(CVP_ERR, "NULL device\n");
  2613. rc = -EINVAL;
  2614. goto failed_to_reset;
  2615. }
  2616. if (device->power_enabled)
  2617. s = CVP_POWER_ON;
  2618. else
  2619. s = CVP_POWER_OFF;
  2620. #ifdef CONFIG_EVA_WAIPIO
  2621. s = CVP_POWER_IGNORED;
  2622. #endif
  2623. for (i = 0; i < device->res->reset_set.count; i++) {
  2624. rc = __handle_reset_clk(device->res, i, ASSERT, s);
  2625. if (rc) {
  2626. dprintk(CVP_ERR,
  2627. "failed to assert reset clocks\n");
  2628. goto failed_to_reset;
  2629. }
  2630. }
  2631. /* wait for deassert */
  2632. usleep_range(1000, 1050);
  2633. for (i = 0; i < device->res->reset_set.count; i++) {
  2634. rc = __handle_reset_clk(device->res, i, DEASSERT, s);
  2635. if (rc) {
  2636. dprintk(CVP_ERR,
  2637. "failed to deassert reset clocks\n");
  2638. goto failed_to_reset;
  2639. }
  2640. }
  2641. return 0;
  2642. failed_to_reset:
  2643. return rc;
  2644. }
  2645. static void __deinit_bus(struct iris_hfi_device *device)
  2646. {
  2647. struct bus_info *bus = NULL;
  2648. if (!device)
  2649. return;
  2650. kfree(device->bus_vote.data);
  2651. device->bus_vote = CVP_DEFAULT_BUS_VOTE;
  2652. iris_hfi_for_each_bus_reverse(device, bus) {
  2653. dev_set_drvdata(bus->dev, NULL);
  2654. icc_put(bus->client);
  2655. bus->client = NULL;
  2656. }
  2657. }
  2658. static int __init_bus(struct iris_hfi_device *device)
  2659. {
  2660. struct bus_info *bus = NULL;
  2661. int rc = 0;
  2662. if (!device)
  2663. return -EINVAL;
  2664. iris_hfi_for_each_bus(device, bus) {
  2665. /*
  2666. * This is stupid, but there's no other easy way to ahold
  2667. * of struct bus_info in iris_hfi_devfreq_*()
  2668. */
  2669. WARN(dev_get_drvdata(bus->dev), "%s's drvdata already set\n",
  2670. dev_name(bus->dev));
  2671. dev_set_drvdata(bus->dev, device);
  2672. bus->client = icc_get(&device->res->pdev->dev,
  2673. bus->master, bus->slave);
  2674. if (IS_ERR_OR_NULL(bus->client)) {
  2675. rc = PTR_ERR(bus->client) ?: -EBADHANDLE;
  2676. dprintk(CVP_ERR, "Failed to register bus %s: %d\n",
  2677. bus->name, rc);
  2678. bus->client = NULL;
  2679. goto err_add_dev;
  2680. }
  2681. }
  2682. return 0;
  2683. err_add_dev:
  2684. __deinit_bus(device);
  2685. return rc;
  2686. }
  2687. static void __deinit_regulators(struct iris_hfi_device *device)
  2688. {
  2689. struct regulator_info *rinfo = NULL;
  2690. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2691. if (rinfo->regulator) {
  2692. regulator_put(rinfo->regulator);
  2693. rinfo->regulator = NULL;
  2694. }
  2695. }
  2696. }
  2697. static int __init_regulators(struct iris_hfi_device *device)
  2698. {
  2699. int rc = 0;
  2700. struct regulator_info *rinfo = NULL;
  2701. iris_hfi_for_each_regulator(device, rinfo) {
  2702. rinfo->regulator = regulator_get(&device->res->pdev->dev,
  2703. rinfo->name);
  2704. if (IS_ERR_OR_NULL(rinfo->regulator)) {
  2705. rc = PTR_ERR(rinfo->regulator) ?: -EBADHANDLE;
  2706. dprintk(CVP_ERR, "Failed to get regulator: %s\n",
  2707. rinfo->name);
  2708. rinfo->regulator = NULL;
  2709. goto err_reg_get;
  2710. }
  2711. }
  2712. return 0;
  2713. err_reg_get:
  2714. __deinit_regulators(device);
  2715. return rc;
  2716. }
  2717. static void __deinit_subcaches(struct iris_hfi_device *device)
  2718. {
  2719. struct subcache_info *sinfo = NULL;
  2720. if (!device) {
  2721. dprintk(CVP_ERR, "deinit_subcaches: invalid device %pK\n",
  2722. device);
  2723. goto exit;
  2724. }
  2725. if (!is_sys_cache_present(device))
  2726. goto exit;
  2727. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2728. if (sinfo->subcache) {
  2729. dprintk(CVP_CORE, "deinit_subcaches: %s\n",
  2730. sinfo->name);
  2731. llcc_slice_putd(sinfo->subcache);
  2732. sinfo->subcache = NULL;
  2733. }
  2734. }
  2735. exit:
  2736. return;
  2737. }
  2738. static int __init_subcaches(struct iris_hfi_device *device)
  2739. {
  2740. int rc = 0;
  2741. struct subcache_info *sinfo = NULL;
  2742. if (!device) {
  2743. dprintk(CVP_ERR, "init_subcaches: invalid device %pK\n",
  2744. device);
  2745. return -EINVAL;
  2746. }
  2747. if (!is_sys_cache_present(device))
  2748. return 0;
  2749. iris_hfi_for_each_subcache(device, sinfo) {
  2750. if (!strcmp("cvp", sinfo->name)) {
  2751. sinfo->subcache = llcc_slice_getd(LLCC_CVP);
  2752. } else if (!strcmp("cvpfw", sinfo->name)) {
  2753. sinfo->subcache = llcc_slice_getd(LLCC_CVPFW);
  2754. } else {
  2755. dprintk(CVP_ERR, "Invalid subcache name %s\n",
  2756. sinfo->name);
  2757. }
  2758. if (IS_ERR_OR_NULL(sinfo->subcache)) {
  2759. rc = PTR_ERR(sinfo->subcache) ?
  2760. PTR_ERR(sinfo->subcache) : -EBADHANDLE;
  2761. dprintk(CVP_ERR,
  2762. "init_subcaches: invalid subcache: %s rc %d\n",
  2763. sinfo->name, rc);
  2764. sinfo->subcache = NULL;
  2765. goto err_subcache_get;
  2766. }
  2767. dprintk(CVP_CORE, "init_subcaches: %s\n",
  2768. sinfo->name);
  2769. }
  2770. return 0;
  2771. err_subcache_get:
  2772. __deinit_subcaches(device);
  2773. return rc;
  2774. }
  2775. static int __init_resources(struct iris_hfi_device *device,
  2776. struct msm_cvp_platform_resources *res)
  2777. {
  2778. int i, rc = 0;
  2779. rc = __init_regulators(device);
  2780. if (rc) {
  2781. dprintk(CVP_ERR, "Failed to get all regulators\n");
  2782. return -ENODEV;
  2783. }
  2784. rc = msm_cvp_init_clocks(device);
  2785. if (rc) {
  2786. dprintk(CVP_ERR, "Failed to init clocks\n");
  2787. rc = -ENODEV;
  2788. goto err_init_clocks;
  2789. }
  2790. for (i = 0; i < device->res->reset_set.count; i++) {
  2791. rc = __handle_reset_clk(res, i, INIT, 0);
  2792. if (rc) {
  2793. dprintk(CVP_ERR, "Failed to init reset clocks\n");
  2794. rc = -ENODEV;
  2795. goto err_init_reset_clk;
  2796. }
  2797. }
  2798. rc = __init_bus(device);
  2799. if (rc) {
  2800. dprintk(CVP_ERR, "Failed to init bus: %d\n", rc);
  2801. goto err_init_bus;
  2802. }
  2803. rc = __init_subcaches(device);
  2804. if (rc)
  2805. dprintk(CVP_WARN, "Failed to init subcaches: %d\n", rc);
  2806. device->sys_init_capabilities =
  2807. kzalloc(sizeof(struct msm_cvp_capability)
  2808. * CVP_MAX_SESSIONS, GFP_KERNEL);
  2809. return rc;
  2810. err_init_reset_clk:
  2811. err_init_bus:
  2812. msm_cvp_deinit_clocks(device);
  2813. err_init_clocks:
  2814. __deinit_regulators(device);
  2815. return rc;
  2816. }
  2817. static void __deinit_resources(struct iris_hfi_device *device)
  2818. {
  2819. __deinit_subcaches(device);
  2820. __deinit_bus(device);
  2821. msm_cvp_deinit_clocks(device);
  2822. __deinit_regulators(device);
  2823. kfree(device->sys_init_capabilities);
  2824. device->sys_init_capabilities = NULL;
  2825. }
  2826. static int __disable_regulator_impl(struct regulator_info *rinfo,
  2827. struct iris_hfi_device *device)
  2828. {
  2829. int rc = 0;
  2830. dprintk(CVP_PWR, "Disabling regulator %s\n", rinfo->name);
  2831. /*
  2832. * This call is needed. Driver needs to acquire the control back
  2833. * from HW in order to disable the regualtor. Else the behavior
  2834. * is unknown.
  2835. */
  2836. rc = __acquire_regulator(rinfo, device);
  2837. if (rc) {
  2838. /*
  2839. * This is somewhat fatal, but nothing we can do
  2840. * about it. We can't disable the regulator w/o
  2841. * getting it back under s/w control
  2842. */
  2843. dprintk(CVP_WARN,
  2844. "Failed to acquire control on %s\n",
  2845. rinfo->name);
  2846. goto disable_regulator_failed;
  2847. }
  2848. rc = regulator_disable(rinfo->regulator);
  2849. if (rc) {
  2850. dprintk(CVP_WARN,
  2851. "Failed to disable %s: %d\n",
  2852. rinfo->name, rc);
  2853. goto disable_regulator_failed;
  2854. }
  2855. return 0;
  2856. disable_regulator_failed:
  2857. /* Bring attention to this issue */
  2858. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  2859. return rc;
  2860. }
  2861. static int __enable_hw_power_collapse(struct iris_hfi_device *device)
  2862. {
  2863. int rc = 0;
  2864. if (!msm_cvp_fw_low_power_mode) {
  2865. dprintk(CVP_PWR, "Not enabling hardware power collapse\n");
  2866. return 0;
  2867. }
  2868. rc = __hand_off_regulators(device);
  2869. if (rc)
  2870. dprintk(CVP_WARN,
  2871. "%s : Failed to enable HW power collapse %d\n",
  2872. __func__, rc);
  2873. return rc;
  2874. }
  2875. static int __enable_regulator(struct iris_hfi_device *device,
  2876. const char *name)
  2877. {
  2878. int rc = 0;
  2879. struct regulator_info *rinfo;
  2880. iris_hfi_for_each_regulator(device, rinfo) {
  2881. if (strcmp(rinfo->name, name))
  2882. continue;
  2883. rc = regulator_enable(rinfo->regulator);
  2884. if (rc) {
  2885. dprintk(CVP_ERR, "Failed to enable %s: %d\n",
  2886. rinfo->name, rc);
  2887. return rc;
  2888. }
  2889. if (!regulator_is_enabled(rinfo->regulator)) {
  2890. dprintk(CVP_ERR,"%s: regulator %s not enabled\n",
  2891. __func__, rinfo->name);
  2892. regulator_disable(rinfo->regulator);
  2893. return -EINVAL;
  2894. }
  2895. dprintk(CVP_PWR, "Enabled regulator %s\n", rinfo->name);
  2896. return 0;
  2897. }
  2898. dprintk(CVP_ERR, "regulator %s not found\n");
  2899. return -EINVAL;
  2900. }
  2901. static int __disable_regulator(struct iris_hfi_device *device,
  2902. const char *name)
  2903. {
  2904. struct regulator_info *rinfo;
  2905. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2906. if (strcmp(rinfo->name, name))
  2907. continue;
  2908. __disable_regulator_impl(rinfo, device);
  2909. dprintk(CVP_PWR, "%s Disabled regulator %s\n", __func__, name);
  2910. return 0;
  2911. }
  2912. dprintk(CVP_ERR, "%s regulator %s not found\n", __func__, name);
  2913. return -EINVAL;
  2914. }
  2915. static int __enable_subcaches(struct iris_hfi_device *device)
  2916. {
  2917. int rc = 0;
  2918. u32 c = 0;
  2919. struct subcache_info *sinfo;
  2920. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  2921. return 0;
  2922. /* Activate subcaches */
  2923. iris_hfi_for_each_subcache(device, sinfo) {
  2924. rc = llcc_slice_activate(sinfo->subcache);
  2925. if (rc) {
  2926. dprintk(CVP_WARN, "Failed to activate %s: %d\n",
  2927. sinfo->name, rc);
  2928. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  2929. goto err_activate_fail;
  2930. }
  2931. sinfo->isactive = true;
  2932. dprintk(CVP_CORE, "Activated subcache %s\n", sinfo->name);
  2933. c++;
  2934. }
  2935. dprintk(CVP_CORE, "Activated %d Subcaches to CVP\n", c);
  2936. return 0;
  2937. err_activate_fail:
  2938. __release_subcaches(device);
  2939. __disable_subcaches(device);
  2940. return 0;
  2941. }
  2942. static int __set_subcaches(struct iris_hfi_device *device)
  2943. {
  2944. int rc = 0;
  2945. u32 c = 0;
  2946. struct subcache_info *sinfo;
  2947. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  2948. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  2949. struct cvp_hfi_resource_subcache_type *sc_res;
  2950. struct cvp_resource_hdr rhdr;
  2951. if (device->res->sys_cache_res_set || msm_cvp_syscache_disable) {
  2952. dprintk(CVP_CORE, "Subcaches already set or disabled\n");
  2953. return 0;
  2954. }
  2955. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  2956. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  2957. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  2958. iris_hfi_for_each_subcache(device, sinfo) {
  2959. if (sinfo->isactive) {
  2960. sc_res[c].size = sinfo->subcache->slice_size;
  2961. sc_res[c].sc_id = sinfo->subcache->slice_id;
  2962. c++;
  2963. }
  2964. }
  2965. /* Set resource to CVP for activated subcaches */
  2966. if (c) {
  2967. dprintk(CVP_CORE, "Setting %d Subcaches\n", c);
  2968. rhdr.resource_handle = sc_res_info; /* cookie */
  2969. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  2970. sc_res_info->num_entries = c;
  2971. rc = __core_set_resource(device, &rhdr, (void *)sc_res_info);
  2972. if (rc) {
  2973. dprintk(CVP_WARN, "Failed to set subcaches %d\n", rc);
  2974. goto err_fail_set_subacaches;
  2975. }
  2976. iris_hfi_for_each_subcache(device, sinfo) {
  2977. if (sinfo->isactive)
  2978. sinfo->isset = true;
  2979. }
  2980. dprintk(CVP_CORE, "Set Subcaches done to CVP\n");
  2981. device->res->sys_cache_res_set = true;
  2982. }
  2983. return 0;
  2984. err_fail_set_subacaches:
  2985. __disable_subcaches(device);
  2986. return 0;
  2987. }
  2988. static int __release_subcaches(struct iris_hfi_device *device)
  2989. {
  2990. struct subcache_info *sinfo;
  2991. int rc = 0;
  2992. u32 c = 0;
  2993. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  2994. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  2995. struct cvp_hfi_resource_subcache_type *sc_res;
  2996. struct cvp_resource_hdr rhdr;
  2997. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  2998. return 0;
  2999. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3000. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3001. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3002. /* Release resource command to Iris */
  3003. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3004. if (sinfo->isset) {
  3005. /* Update the entry */
  3006. sc_res[c].size = sinfo->subcache->slice_size;
  3007. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3008. c++;
  3009. sinfo->isset = false;
  3010. }
  3011. }
  3012. if (c > 0) {
  3013. dprintk(CVP_CORE, "Releasing %d subcaches\n", c);
  3014. rhdr.resource_handle = sc_res_info; /* cookie */
  3015. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3016. rc = __core_release_resource(device, &rhdr);
  3017. if (rc)
  3018. dprintk(CVP_WARN,
  3019. "Failed to release %d subcaches\n", c);
  3020. }
  3021. device->res->sys_cache_res_set = false;
  3022. return 0;
  3023. }
  3024. static int __disable_subcaches(struct iris_hfi_device *device)
  3025. {
  3026. struct subcache_info *sinfo;
  3027. int rc = 0;
  3028. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3029. return 0;
  3030. /* De-activate subcaches */
  3031. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3032. if (sinfo->isactive) {
  3033. dprintk(CVP_CORE, "De-activate subcache %s\n",
  3034. sinfo->name);
  3035. rc = llcc_slice_deactivate(sinfo->subcache);
  3036. if (rc) {
  3037. dprintk(CVP_WARN,
  3038. "Failed to de-activate %s: %d\n",
  3039. sinfo->name, rc);
  3040. }
  3041. sinfo->isactive = false;
  3042. }
  3043. }
  3044. return 0;
  3045. }
  3046. static void interrupt_init_iris2(struct iris_hfi_device *device)
  3047. {
  3048. u32 mask_val = 0;
  3049. /* All interrupts should be disabled initially 0x1F6 : Reset value */
  3050. mask_val = __read_register(device, CVP_WRAPPER_INTR_MASK);
  3051. /* Write 0 to unmask CPU and WD interrupts */
  3052. mask_val &= ~(CVP_FATAL_INTR_BMSK | CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK);
  3053. __write_register(device, CVP_WRAPPER_INTR_MASK, mask_val);
  3054. dprintk(CVP_REG, "Init irq: reg: %x, mask value %x\n",
  3055. CVP_WRAPPER_INTR_MASK, mask_val);
  3056. }
  3057. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device)
  3058. {
  3059. /* initialize DSP QTBL & UCREGION with CPU queues */
  3060. __write_register(device, HFI_DSP_QTBL_ADDR,
  3061. (u32)device->dsp_iface_q_table.align_device_addr);
  3062. __write_register(device, HFI_DSP_UC_REGION_ADDR,
  3063. (u32)device->dsp_iface_q_table.align_device_addr);
  3064. __write_register(device, HFI_DSP_UC_REGION_SIZE,
  3065. device->dsp_iface_q_table.mem_data.size);
  3066. }
  3067. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device)
  3068. {
  3069. __write_register(device, CVP_WRAPPER_CPU_CLOCK_CONFIG, 0);
  3070. }
  3071. static int __set_ubwc_config(struct iris_hfi_device *device)
  3072. {
  3073. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  3074. int rc = 0;
  3075. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  3076. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  3077. if (!device->res->ubwc_config)
  3078. return 0;
  3079. rc = call_hfi_pkt_op(device, sys_ubwc_config, pkt,
  3080. device->res->ubwc_config);
  3081. if (rc) {
  3082. dprintk(CVP_WARN,
  3083. "ubwc config setting to FW failed\n");
  3084. rc = -ENOTEMPTY;
  3085. goto fail_to_set_ubwc_config;
  3086. }
  3087. if (__iface_cmdq_write(device, pkt)) {
  3088. rc = -ENOTEMPTY;
  3089. goto fail_to_set_ubwc_config;
  3090. }
  3091. fail_to_set_ubwc_config:
  3092. return rc;
  3093. }
  3094. static int __power_on_controller(struct iris_hfi_device *device)
  3095. {
  3096. int rc = 0;
  3097. rc = __enable_regulator(device, "cvp");
  3098. if (rc) {
  3099. dprintk(CVP_ERR, "Failed to enable ctrler: %d\n", rc);
  3100. return rc;
  3101. }
  3102. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3103. if (rc) {
  3104. dprintk(CVP_ERR, "Failed to reset ahb2axi: %d\n", rc);
  3105. goto fail_reset_clks;
  3106. }
  3107. rc = msm_cvp_prepare_enable_clk(device, "gcc_video_axi1");
  3108. if (rc) {
  3109. dprintk(CVP_ERR, "Failed to enable axi1 clk: %d\n", rc);
  3110. goto fail_reset_clks;
  3111. }
  3112. rc = msm_cvp_prepare_enable_clk(device, "cvp_clk");
  3113. if (rc) {
  3114. dprintk(CVP_ERR, "Failed to enable cvp_clk: %d\n", rc);
  3115. goto fail_enable_clk;
  3116. }
  3117. dprintk(CVP_PWR, "EVA controller powered on\n");
  3118. return 0;
  3119. fail_enable_clk:
  3120. msm_cvp_disable_unprepare_clk(device, "gcc_video_axi1");
  3121. fail_reset_clks:
  3122. __disable_regulator(device, "cvp");
  3123. return rc;
  3124. }
  3125. static int __power_on_core(struct iris_hfi_device *device)
  3126. {
  3127. int rc = 0;
  3128. rc = __enable_regulator(device, "cvp-core");
  3129. if (rc) {
  3130. dprintk(CVP_ERR, "Failed to enable core: %d\n", rc);
  3131. return rc;
  3132. }
  3133. rc = msm_cvp_prepare_enable_clk(device, "video_cc_mvs1_clk_src");
  3134. if (rc) {
  3135. dprintk(CVP_ERR, "Failed to enable video_cc_mvs1_clk_src:%d\n",
  3136. rc);
  3137. __disable_regulator(device, "cvp-core");
  3138. return rc;
  3139. }
  3140. rc = msm_cvp_prepare_enable_clk(device, "core_clk");
  3141. if (rc) {
  3142. dprintk(CVP_ERR, "Failed to enable core_clk: %d\n", rc);
  3143. __disable_regulator(device, "cvp-core");
  3144. return rc;
  3145. }
  3146. dprintk(CVP_PWR, "EVA core powered on\n");
  3147. return 0;
  3148. }
  3149. static int __iris_power_on(struct iris_hfi_device *device)
  3150. {
  3151. int rc = 0;
  3152. if (device->power_enabled)
  3153. return 0;
  3154. /* Vote for all hardware resources */
  3155. rc = __vote_buses(device, device->bus_vote.data,
  3156. device->bus_vote.data_count);
  3157. if (rc) {
  3158. dprintk(CVP_ERR, "Failed to vote buses, err: %d\n", rc);
  3159. goto fail_vote_buses;
  3160. }
  3161. rc = __power_on_controller(device);
  3162. if (rc)
  3163. goto fail_enable_controller;
  3164. rc = __power_on_core(device);
  3165. if (rc)
  3166. goto fail_enable_core;
  3167. rc = msm_cvp_scale_clocks(device);
  3168. if (rc) {
  3169. dprintk(CVP_WARN,
  3170. "Failed to scale clocks, perf may regress\n");
  3171. rc = 0;
  3172. } else {
  3173. dprintk(CVP_PWR, "Done with scaling\n");
  3174. }
  3175. /*Do not access registers before this point!*/
  3176. device->power_enabled = true;
  3177. /*
  3178. * Re-program all of the registers that get reset as a result of
  3179. * regulator_disable() and _enable()
  3180. */
  3181. __set_registers(device);
  3182. dprintk(CVP_CORE, "Done with register set\n");
  3183. call_iris_op(device, interrupt_init, device);
  3184. dprintk(CVP_CORE, "Done with interrupt enabling\n");
  3185. device->intr_status = 0;
  3186. enable_irq(device->cvp_hal_data->irq);
  3187. __write_register(device,
  3188. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x7);
  3189. pr_info_ratelimited(CVP_DBG_TAG "cvp (eva) powered on\n", "pwr");
  3190. return 0;
  3191. fail_enable_core:
  3192. __power_off_controller(device);
  3193. fail_enable_controller:
  3194. __unvote_buses(device);
  3195. fail_vote_buses:
  3196. device->power_enabled = false;
  3197. return rc;
  3198. }
  3199. static inline int __suspend(struct iris_hfi_device *device)
  3200. {
  3201. int rc = 0;
  3202. if (!device) {
  3203. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3204. return -EINVAL;
  3205. } else if (!device->power_enabled) {
  3206. dprintk(CVP_PWR, "Power already disabled\n");
  3207. return 0;
  3208. }
  3209. dprintk(CVP_PWR, "Entering suspend\n");
  3210. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3211. if (rc) {
  3212. dprintk(CVP_WARN, "Failed to suspend cvp core %d\n", rc);
  3213. goto err_tzbsp_suspend;
  3214. }
  3215. __disable_subcaches(device);
  3216. call_iris_op(device, power_off, device);
  3217. if (device->res->pm_qos.latency_us && device->res->pm_qos.pm_qos_hdls)
  3218. cvp_pm_qos_update(device, false);
  3219. return rc;
  3220. err_tzbsp_suspend:
  3221. return rc;
  3222. }
  3223. static void __print_sidebandmanager_regs(struct iris_hfi_device *device)
  3224. {
  3225. u32 sbm_ln0_low, axi_cbcr;
  3226. u32 main_sbm_ln0_low = 0xdeadbeef, main_sbm_ln0_high = 0xdeadbeef;
  3227. u32 main_sbm_ln1_high = 0xdeadbeef, cpu_cs_x2rpmh;
  3228. sbm_ln0_low =
  3229. __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3230. cpu_cs_x2rpmh = __read_register(device, CVP_CPU_CS_X2RPMh);
  3231. __write_register(device, CVP_CPU_CS_X2RPMh,
  3232. (cpu_cs_x2rpmh | CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK));
  3233. usleep_range(500, 1000);
  3234. cpu_cs_x2rpmh = __read_register(device, CVP_CPU_CS_X2RPMh);
  3235. if (!(cpu_cs_x2rpmh & CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK)) {
  3236. dprintk(CVP_WARN,
  3237. "failed set CVP_CPU_CS_X2RPMH mask %x\n",
  3238. cpu_cs_x2rpmh);
  3239. goto exit;
  3240. }
  3241. axi_cbcr = __read_gcc_register(device, CVP_GCC_VIDEO_AXI1_CBCR);
  3242. if (axi_cbcr & 0x80000000) {
  3243. dprintk(CVP_WARN, "failed to turn on AXI clock %x\n",
  3244. axi_cbcr);
  3245. goto exit;
  3246. }
  3247. main_sbm_ln0_low = __read_register(device,
  3248. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW);
  3249. main_sbm_ln0_high = __read_register(device,
  3250. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_HIGH);
  3251. main_sbm_ln1_high = __read_register(device,
  3252. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH);
  3253. exit:
  3254. cpu_cs_x2rpmh = cpu_cs_x2rpmh & (~CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK);
  3255. __write_register(device, CVP_CPU_CS_X2RPMh, cpu_cs_x2rpmh);
  3256. dprintk(CVP_WARN, "Sidebandmanager regs %x %x %x %x %x\n",
  3257. sbm_ln0_low, main_sbm_ln0_low,
  3258. main_sbm_ln0_high, main_sbm_ln1_high,
  3259. cpu_cs_x2rpmh);
  3260. }
  3261. static int __power_off_controller(struct iris_hfi_device *device)
  3262. {
  3263. u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
  3264. u32 sbm_ln0_low;
  3265. int rc;
  3266. /* HPG 6.2.2 Step 1 */
  3267. __write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
  3268. /* HPG 6.2.2 Step 2, noc to low power */
  3269. __write_register(device, CVP_AON_WRAPPER_CVP_NOC_LPI_CONTROL, 0x1);
  3270. while (!reg_status && count < max_count) {
  3271. lpi_status =
  3272. __read_register(device,
  3273. CVP_AON_WRAPPER_CVP_NOC_LPI_STATUS);
  3274. reg_status = lpi_status & BIT(0);
  3275. /* Wait for Core noc lpi status to be set */
  3276. usleep_range(50, 100);
  3277. count++;
  3278. }
  3279. dprintk(CVP_PWR,
  3280. "Core Noc: lpi_status %x noc_status %x (count %d)\n",
  3281. lpi_status, reg_status, count);
  3282. if (count == max_count) {
  3283. u32 pc_ready, wfi_status;
  3284. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3285. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3286. dprintk(CVP_WARN,
  3287. "Core NOC not in qaccept status %x %x %x %x\n",
  3288. reg_status, lpi_status, wfi_status, pc_ready);
  3289. __print_sidebandmanager_regs(device);
  3290. }
  3291. /* New addition to put CPU/Tensilica to low power */
  3292. reg_status = 0;
  3293. count = 0;
  3294. __write_register(device, CVP_WRAPPER_CPU_NOC_LPI_CONTROL, 0x1);
  3295. while (!reg_status && count < max_count) {
  3296. lpi_status =
  3297. __read_register(device,
  3298. CVP_WRAPPER_CPU_NOC_LPI_STATUS);
  3299. reg_status = lpi_status & BIT(0);
  3300. /* Wait for CPU noc lpi status to be set */
  3301. usleep_range(50, 100);
  3302. count++;
  3303. }
  3304. sbm_ln0_low = __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3305. dprintk(CVP_PWR,
  3306. "CPU Noc: lpi_status %x noc_status %x (count %d) 0x%x\n",
  3307. lpi_status, reg_status, count, sbm_ln0_low);
  3308. if (count == max_count) {
  3309. u32 pc_ready, wfi_status;
  3310. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3311. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3312. dprintk(CVP_WARN,
  3313. "CPU NOC not in qaccept status %x %x %x %x\n",
  3314. reg_status, lpi_status, wfi_status, pc_ready);
  3315. __print_sidebandmanager_regs(device);
  3316. }
  3317. /* HPG 6.2.2 Step 3, debug bridge to low power BYPASSED */
  3318. /* HPG 6.2.2 Step 4, debug bridge to lpi release */
  3319. __write_register(device,
  3320. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x0);
  3321. lpi_status = 0x1;
  3322. count = 0;
  3323. while (lpi_status && count < max_count) {
  3324. lpi_status = __read_register(device,
  3325. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3326. usleep_range(50, 100);
  3327. count++;
  3328. }
  3329. dprintk(CVP_PWR,
  3330. "DBLP Release: lpi_status %d(count %d)\n",
  3331. lpi_status, count);
  3332. if (count == max_count) {
  3333. dprintk(CVP_WARN,
  3334. "DBLP Release: lpi_status %x\n", lpi_status);
  3335. }
  3336. /* PDXFIFO reset: addition for Kailua */
  3337. #ifdef CONFIG_EVA_KALAMA
  3338. __write_register(device, CVP_WRAPPER_AXI_CLOCK_CONFIG, 0x3);
  3339. __write_register(device, CVP_WRAPPER_QNS4PDXFIFO_RESET, 0x1);
  3340. __write_register(device, CVP_WRAPPER_QNS4PDXFIFO_RESET, 0x0);
  3341. __write_register(device, CVP_WRAPPER_AXI_CLOCK_CONFIG, 0x0);
  3342. #endif
  3343. /* HPG 6.2.2 Step 5 */
  3344. msm_cvp_disable_unprepare_clk(device, "cvp_clk");
  3345. /* HPG 6.2.2 Step 7 */
  3346. msm_cvp_disable_unprepare_clk(device, "gcc_video_axi1");
  3347. /* Added to avoid pending transaction after power off */
  3348. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3349. if (rc)
  3350. dprintk(CVP_ERR, "Off: Failed to reset ahb2axi: %d\n", rc);
  3351. /* HPG 6.2.2 Step 6 */
  3352. __disable_regulator(device, "cvp");
  3353. return 0;
  3354. }
  3355. static int __power_off_core(struct iris_hfi_device *device)
  3356. {
  3357. u32 config, value = 0, count = 0, warn_flag = 0;
  3358. const u32 max_count = 10;
  3359. value = __read_register(device, CVP_CC_MVS1_GDSCR);
  3360. if (!(value & 0x80000000)) {
  3361. /*
  3362. * Core has been powered off by f/w.
  3363. * Check NOC reset registers to ensure
  3364. * NO outstanding NoC transactions
  3365. */
  3366. value = __read_register(device, CVP_NOC_RESET_ACK);
  3367. if (value) {
  3368. dprintk(CVP_WARN,
  3369. "Core off with NOC RESET ACK non-zero %x\n",
  3370. value);
  3371. __print_sidebandmanager_regs(device);
  3372. }
  3373. __disable_regulator(device, "cvp-core");
  3374. msm_cvp_disable_unprepare_clk(device, "core_clk");
  3375. msm_cvp_disable_unprepare_clk(device, "video_cc_mvs1_clk_src");
  3376. return 0;
  3377. }
  3378. dprintk(CVP_PWR, "Driver controls Core power off now\n");
  3379. /*
  3380. * check to make sure core clock branch enabled else
  3381. * we cannot read core idle register
  3382. */
  3383. config = __read_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  3384. if (config) {
  3385. dprintk(CVP_PWR,
  3386. "core clock config not enabled, enable it to access core\n");
  3387. __write_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG, 0);
  3388. }
  3389. /*
  3390. * add MNoC idle check before collapsing MVS1 per HPG update
  3391. * poll for NoC DMA idle -> HPG 6.2.1
  3392. *
  3393. */
  3394. do {
  3395. value = __read_register(device, CVP_SS_IDLE_STATUS);
  3396. if (value & 0x400000)
  3397. break;
  3398. else
  3399. usleep_range(1000, 2000);
  3400. count++;
  3401. } while (count < max_count);
  3402. if (count == max_count) {
  3403. dprintk(CVP_WARN, "Core fail to go idle %x\n", value);
  3404. warn_flag = 1;
  3405. }
  3406. /* Apply partial reset on MSF interface and wait for ACK */
  3407. __write_register(device, CVP_NOC_RESET_REQ, 0x7);
  3408. count = 0;
  3409. do {
  3410. value = __read_register(device, CVP_NOC_RESET_ACK);
  3411. if ((value & 0x7) == 0x7)
  3412. break;
  3413. else
  3414. usleep_range(100, 200);
  3415. count++;
  3416. } while (count < max_count);
  3417. if (count == max_count) {
  3418. dprintk(CVP_WARN, "Core NoC reset assert failed %x\n", value);
  3419. warn_flag = 1;
  3420. }
  3421. /* De-assert partial reset on MSF interface and wait for ACK */
  3422. __write_register(device, CVP_NOC_RESET_REQ, 0x0);
  3423. count = 0;
  3424. do {
  3425. value = __read_register(device, CVP_NOC_RESET_ACK);
  3426. if ((value & 0x1) == 0x0)
  3427. break;
  3428. else
  3429. usleep_range(100, 200);
  3430. count++;
  3431. } while (count < max_count);
  3432. if (count == max_count) {
  3433. dprintk(CVP_WARN, "Core NoC reset de-assert failed\n");
  3434. warn_flag = 1;
  3435. }
  3436. if (warn_flag)
  3437. __print_sidebandmanager_regs(device);
  3438. /* Reset both sides of 2 ahb2ahb_bridges (TZ and non-TZ) */
  3439. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x3);
  3440. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x2);
  3441. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x0);
  3442. __write_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG, config);
  3443. __disable_regulator(device, "cvp-core");
  3444. msm_cvp_disable_unprepare_clk(device, "core_clk");
  3445. msm_cvp_disable_unprepare_clk(device, "video_cc_mvs1_clk_src");
  3446. return 0;
  3447. }
  3448. static void power_off_iris2(struct iris_hfi_device *device)
  3449. {
  3450. if (!device->power_enabled || !device->res->sw_power_collapsible)
  3451. return;
  3452. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3453. disable_irq_nosync(device->cvp_hal_data->irq);
  3454. device->intr_status = 0;
  3455. __power_off_core(device);
  3456. __power_off_controller(device);
  3457. if (__unvote_buses(device))
  3458. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3459. /*Do not access registers after this point!*/
  3460. device->power_enabled = false;
  3461. pr_info_ratelimited(CVP_DBG_TAG "cvp (eva) power collapsed\n", "pwr");
  3462. }
  3463. static inline int __resume(struct iris_hfi_device *device)
  3464. {
  3465. int rc = 0;
  3466. u32 flags = 0, reg_gdsc, reg_cbcr;
  3467. struct msm_cvp_core *core;
  3468. if (!device) {
  3469. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3470. return -EINVAL;
  3471. } else if (device->power_enabled) {
  3472. goto exit;
  3473. } else if (!__core_in_valid_state(device)) {
  3474. dprintk(CVP_PWR, "iris_hfi_device in deinit state.");
  3475. return -EINVAL;
  3476. }
  3477. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3478. dprintk(CVP_PWR, "Resuming from power collapse\n");
  3479. rc = __iris_power_on(device);
  3480. if (rc) {
  3481. dprintk(CVP_ERR, "Failed to power on cvp\n");
  3482. goto err_iris_power_on;
  3483. }
  3484. reg_gdsc = __read_register(device, CVP_CC_MVS1C_GDSCR);
  3485. reg_cbcr = __read_register(device, CVP_CC_MVS1C_CBCR);
  3486. if (!(reg_gdsc & 0x80000000) || (reg_cbcr & 0x80000000))
  3487. dprintk(CVP_ERR, "CVP power on failed gdsc %x cbcr %x\n",
  3488. reg_gdsc, reg_cbcr);
  3489. /* Reboot the firmware */
  3490. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESUME);
  3491. if (rc) {
  3492. dprintk(CVP_ERR, "Failed to resume cvp core %d\n", rc);
  3493. goto err_set_cvp_state;
  3494. }
  3495. __setup_ucregion_memory_map(device);
  3496. /* Wait for boot completion */
  3497. rc = __boot_firmware(device);
  3498. if (rc) {
  3499. dprintk(CVP_ERR, "Failed to reset cvp core\n");
  3500. msm_cvp_trigger_ssr(core, SSR_ERR_FATAL);
  3501. goto err_reset_core;
  3502. }
  3503. /*
  3504. * Work around for H/W bug, need to reprogram these registers once
  3505. * firmware is out reset
  3506. */
  3507. __set_threshold_registers(device);
  3508. if (device->res->pm_qos.latency_us && device->res->pm_qos.pm_qos_hdls)
  3509. cvp_pm_qos_update(device, true);
  3510. __sys_set_debug(device, msm_cvp_fw_debug);
  3511. __enable_subcaches(device);
  3512. __set_subcaches(device);
  3513. __dsp_resume(device, flags);
  3514. dprintk(CVP_PWR, "Resumed from power collapse\n");
  3515. exit:
  3516. /* Don't reset skip_pc_count for SYS_PC_PREP cmd */
  3517. if (device->last_packet_type != HFI_CMD_SYS_PC_PREP)
  3518. device->skip_pc_count = 0;
  3519. return rc;
  3520. err_reset_core:
  3521. __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3522. err_set_cvp_state:
  3523. call_iris_op(device, power_off, device);
  3524. err_iris_power_on:
  3525. dprintk(CVP_ERR, "Failed to resume from power collapse\n");
  3526. return rc;
  3527. }
  3528. static int __load_fw(struct iris_hfi_device *device)
  3529. {
  3530. int rc = 0;
  3531. /* Initialize resources */
  3532. rc = __init_resources(device, device->res);
  3533. if (rc) {
  3534. dprintk(CVP_ERR, "Failed to init resources: %d\n", rc);
  3535. goto fail_init_res;
  3536. }
  3537. rc = __initialize_packetization(device);
  3538. if (rc) {
  3539. dprintk(CVP_ERR, "Failed to initialize packetization\n");
  3540. goto fail_init_pkt;
  3541. }
  3542. rc = __iris_power_on(device);
  3543. if (rc) {
  3544. dprintk(CVP_ERR, "Failed to power on iris in in load_fw\n");
  3545. goto fail_iris_power_on;
  3546. }
  3547. if ((!device->res->use_non_secure_pil && !device->res->firmware_base)
  3548. || device->res->use_non_secure_pil) {
  3549. rc = load_cvp_fw_impl(device);
  3550. if (rc)
  3551. goto fail_load_fw;
  3552. }
  3553. return rc;
  3554. fail_load_fw:
  3555. call_iris_op(device, power_off, device);
  3556. fail_iris_power_on:
  3557. fail_init_pkt:
  3558. __deinit_resources(device);
  3559. fail_init_res:
  3560. return rc;
  3561. }
  3562. static void __unload_fw(struct iris_hfi_device *device)
  3563. {
  3564. if (!device->resources.fw.cookie)
  3565. return;
  3566. cancel_delayed_work(&iris_hfi_pm_work);
  3567. if (device->state != IRIS_STATE_DEINIT)
  3568. flush_workqueue(device->iris_pm_workq);
  3569. unload_cvp_fw_impl(device);
  3570. __interface_queues_release(device);
  3571. call_iris_op(device, power_off, device);
  3572. __deinit_resources(device);
  3573. dprintk(CVP_WARN, "Firmware unloaded\n");
  3574. }
  3575. static int iris_hfi_get_fw_info(void *dev, struct cvp_hal_fw_info *fw_info)
  3576. {
  3577. int i = 0;
  3578. struct iris_hfi_device *device = dev;
  3579. if (!device || !fw_info) {
  3580. dprintk(CVP_ERR,
  3581. "%s Invalid parameter: device = %pK fw_info = %pK\n",
  3582. __func__, device, fw_info);
  3583. return -EINVAL;
  3584. }
  3585. mutex_lock(&device->lock);
  3586. while (cvp_driver->fw_version[i++] != 'V' && i < CVP_VERSION_LENGTH)
  3587. ;
  3588. if (i == CVP_VERSION_LENGTH - 1) {
  3589. dprintk(CVP_WARN, "Iris version string is not proper\n");
  3590. fw_info->version[0] = '\0';
  3591. goto fail_version_string;
  3592. }
  3593. memcpy(&fw_info->version[0], &cvp_driver->fw_version[0],
  3594. CVP_VERSION_LENGTH);
  3595. fw_info->version[CVP_VERSION_LENGTH - 1] = '\0';
  3596. fail_version_string:
  3597. dprintk(CVP_CORE, "F/W version retrieved : %s\n", fw_info->version);
  3598. fw_info->base_addr = device->cvp_hal_data->firmware_base;
  3599. fw_info->register_base = device->res->register_base;
  3600. fw_info->register_size = device->cvp_hal_data->register_size;
  3601. fw_info->irq = device->cvp_hal_data->irq;
  3602. mutex_unlock(&device->lock);
  3603. return 0;
  3604. }
  3605. static int iris_hfi_get_core_capabilities(void *dev)
  3606. {
  3607. dprintk(CVP_CORE, "%s not supported yet!\n", __func__);
  3608. return 0;
  3609. }
  3610. static const char * const mid_names[16] = {
  3611. "CVP_FW",
  3612. "ARP_DATA",
  3613. "CVP_OD_NON_PIXEL",
  3614. "CVP_OD_ORIG_PIXEL",
  3615. "CVP_OD_WR_PIXEL",
  3616. "CVP_MPU_ORIG_PIXEL",
  3617. "CVP_MPU_REF_PIXEL",
  3618. "CVP_MPU_NON_PIXEL",
  3619. "CVP_MPU_DFS",
  3620. "CVP_FDU_NON_PIXEL",
  3621. "CVP_FDU_PIXEL",
  3622. "CVP_ICA_PIXEL",
  3623. "Invalid",
  3624. "Invalid",
  3625. "Invalid",
  3626. "Invalid"
  3627. };
  3628. static void __print_reg_details(u32 val)
  3629. {
  3630. u32 mid, sid;
  3631. mid = (val >> 5) & 0xF;
  3632. sid = (val >> 2) & 0x7;
  3633. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3634. dprintk(CVP_ERR, "Sub-client:%s, SID: %d\n", mid_names[mid], sid);
  3635. }
  3636. static void __err_log(bool logging, u32 *data, const char *name, u32 val)
  3637. {
  3638. if (logging)
  3639. *data = val;
  3640. dprintk(CVP_ERR, "%s: %#x\n", name, val);
  3641. }
  3642. static void __noc_error_info_iris2(struct iris_hfi_device *device)
  3643. {
  3644. struct msm_cvp_core *core;
  3645. struct cvp_noc_log *noc_log;
  3646. u32 val = 0, regi, i;
  3647. bool log_required = false;
  3648. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3649. if (!core->ssr_count && core->resources.max_ssr_allowed > 1)
  3650. log_required = true;
  3651. noc_log = &core->log.noc_log;
  3652. if (noc_log->used) {
  3653. dprintk(CVP_WARN, "Data already in NoC log, skip logging\n");
  3654. return;
  3655. }
  3656. noc_log->used = 1;
  3657. val = __read_register(device, CVP_NOC_ERR_SWID_LOW_OFFS);
  3658. __err_log(log_required, &noc_log->err_ctrl_swid_low,
  3659. "CVP_NOC_ERL_MAIN_SWID_LOW", val);
  3660. val = __read_register(device, CVP_NOC_ERR_SWID_HIGH_OFFS);
  3661. __err_log(log_required, &noc_log->err_ctrl_swid_high,
  3662. "CVP_NOC_ERL_MAIN_SWID_HIGH", val);
  3663. val = __read_register(device, CVP_NOC_ERR_MAINCTL_LOW_OFFS);
  3664. __err_log(log_required, &noc_log->err_ctrl_mainctl_low,
  3665. "CVP_NOC_ERL_MAIN_MAINCTL_LOW", val);
  3666. val = __read_register(device, CVP_NOC_ERR_ERRVLD_LOW_OFFS);
  3667. __err_log(log_required, &noc_log->err_ctrl_errvld_low,
  3668. "CVP_NOC_ERL_MAIN_ERRVLD_LOW", val);
  3669. val = __read_register(device, CVP_NOC_ERR_ERRCLR_LOW_OFFS);
  3670. __err_log(log_required, &noc_log->err_ctrl_errclr_low,
  3671. "CVP_NOC_ERL_MAIN_ERRCLR_LOW", val);
  3672. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_LOW_OFFS);
  3673. __err_log(log_required, &noc_log->err_ctrl_errlog0_low,
  3674. "CVP_NOC_ERL_MAIN_ERRLOG0_LOW", val);
  3675. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_HIGH_OFFS);
  3676. __err_log(log_required, &noc_log->err_ctrl_errlog0_high,
  3677. "CVP_NOC_ERL_MAIN_ERRLOG0_HIGH", val);
  3678. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_LOW_OFFS);
  3679. __err_log(log_required, &noc_log->err_ctrl_errlog1_low,
  3680. "CVP_NOC_ERL_MAIN_ERRLOG1_LOW", val);
  3681. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_HIGH_OFFS);
  3682. __err_log(log_required, &noc_log->err_ctrl_errlog1_high,
  3683. "CVP_NOC_ERL_MAIN_ERRLOG1_HIGH", val);
  3684. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_LOW_OFFS);
  3685. __err_log(log_required, &noc_log->err_ctrl_errlog2_low,
  3686. "CVP_NOC_ERL_MAIN_ERRLOG2_LOW", val);
  3687. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_HIGH_OFFS);
  3688. __err_log(log_required, &noc_log->err_ctrl_errlog2_high,
  3689. "CVP_NOC_ERL_MAIN_ERRLOG2_HIGH", val);
  3690. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_LOW_OFFS);
  3691. __err_log(log_required, &noc_log->err_ctrl_errlog3_low,
  3692. "CVP_NOC_ERL_MAIN_ERRLOG3_LOW", val);
  3693. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_HIGH_OFFS);
  3694. __err_log(log_required, &noc_log->err_ctrl_errlog3_high,
  3695. "CVP_NOC_ERL_MAIN_ERRLOG3_HIGH", val);
  3696. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
  3697. __err_log(log_required, &noc_log->err_core_swid_low,
  3698. "CVP_NOC__CORE_ERL_MAIN_SWID_LOW", val);
  3699. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_HIGH_OFFS);
  3700. __err_log(log_required, &noc_log->err_core_swid_high,
  3701. "CVP_NOC_CORE_ERL_MAIN_SWID_HIGH", val);
  3702. val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
  3703. __err_log(log_required, &noc_log->err_core_mainctl_low,
  3704. "CVP_NOC_CORE_ERL_MAIN_MAINCTL_LOW", val);
  3705. val = __read_register(device, CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS);
  3706. __err_log(log_required, &noc_log->err_core_errvld_low,
  3707. "CVP_NOC_CORE_ERL_MAIN_ERRVLD_LOW", val);
  3708. val = __read_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS);
  3709. __err_log(log_required, &noc_log->err_core_errclr_low,
  3710. "CVP_NOC_CORE_ERL_MAIN_ERRCLR_LOW", val);
  3711. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS);
  3712. __err_log(log_required, &noc_log->err_core_errlog0_low,
  3713. "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_LOW", val);
  3714. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS);
  3715. __err_log(log_required, &noc_log->err_core_errlog0_high,
  3716. "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_HIGH", val);
  3717. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS);
  3718. __err_log(log_required, &noc_log->err_core_errlog1_low,
  3719. "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_LOW", val);
  3720. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS);
  3721. __err_log(log_required, &noc_log->err_core_errlog1_high,
  3722. "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_HIGH", val);
  3723. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS);
  3724. __err_log(log_required, &noc_log->err_core_errlog2_low,
  3725. "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_LOW", val);
  3726. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS);
  3727. __err_log(log_required, &noc_log->err_core_errlog2_high,
  3728. "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_HIGH", val);
  3729. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS);
  3730. __err_log(log_required, &noc_log->err_core_errlog3_low,
  3731. "CORE ERRLOG3_LOW, below details", val);
  3732. __print_reg_details(val);
  3733. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
  3734. __err_log(log_required, &noc_log->err_core_errlog3_high,
  3735. "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH", val);
  3736. #define CVP_SS_CLK_HALT 0x8
  3737. #define CVP_SS_CLK_EN 0xC
  3738. #define CVP_SS_ARP_TEST_BUS_CONTROL 0x700
  3739. #define CVP_SS_ARP_TEST_BUS_REGISTER 0x704
  3740. #define CVP_DMA_TEST_BUS_CONTROL 0x66A0
  3741. #define CVP_DMA_TEST_BUS_REGISTER 0x66A4
  3742. #define CVP_VPU_WRAPPER_CORE_CONFIG 0xB0088
  3743. __write_register(device, CVP_SS_CLK_HALT, 0);
  3744. __write_register(device, CVP_SS_CLK_EN, 0x3f);
  3745. __write_register(device, CVP_VPU_WRAPPER_CORE_CONFIG, 0);
  3746. for (i = 0; i < 15; i++) {
  3747. regi = 0xC0000000 + i;
  3748. __write_register(device, CVP_SS_ARP_TEST_BUS_CONTROL, regi);
  3749. val = __read_register(device, CVP_SS_ARP_TEST_BUS_REGISTER);
  3750. noc_log->arp_test_bus[i] = val;
  3751. }
  3752. for (i = 0; i < 512; i++) {
  3753. regi = 0x40000000 + i;
  3754. __write_register(device, CVP_DMA_TEST_BUS_CONTROL, regi);
  3755. val = __read_register(device, CVP_DMA_TEST_BUS_REGISTER);
  3756. noc_log->dma_test_bus[i] = val;
  3757. }
  3758. }
  3759. static int iris_hfi_noc_error_info(void *dev)
  3760. {
  3761. struct iris_hfi_device *device;
  3762. if (!dev) {
  3763. dprintk(CVP_ERR, "%s: null device\n", __func__);
  3764. return -EINVAL;
  3765. }
  3766. device = dev;
  3767. mutex_lock(&device->lock);
  3768. dprintk(CVP_ERR, "%s: non error information\n", __func__);
  3769. call_iris_op(device, noc_error_info, device);
  3770. mutex_unlock(&device->lock);
  3771. return 0;
  3772. }
  3773. static int __initialize_packetization(struct iris_hfi_device *device)
  3774. {
  3775. int rc = 0;
  3776. if (!device || !device->res) {
  3777. dprintk(CVP_ERR, "%s - invalid param\n", __func__);
  3778. return -EINVAL;
  3779. }
  3780. device->packetization_type = HFI_PACKETIZATION_4XX;
  3781. device->pkt_ops = cvp_hfi_get_pkt_ops_handle(
  3782. device->packetization_type);
  3783. if (!device->pkt_ops) {
  3784. rc = -EINVAL;
  3785. dprintk(CVP_ERR, "Failed to get pkt_ops handle\n");
  3786. }
  3787. return rc;
  3788. }
  3789. void __init_cvp_ops(struct iris_hfi_device *device)
  3790. {
  3791. device->vpu_ops = &iris2_ops;
  3792. }
  3793. static struct iris_hfi_device *__add_device(u32 device_id,
  3794. struct msm_cvp_platform_resources *res,
  3795. hfi_cmd_response_callback callback)
  3796. {
  3797. struct iris_hfi_device *hdevice = NULL;
  3798. int rc = 0;
  3799. if (!res || !callback) {
  3800. dprintk(CVP_ERR, "Invalid Parameters\n");
  3801. return NULL;
  3802. }
  3803. dprintk(CVP_INFO, "%s: device_id: %d\n", __func__, device_id);
  3804. hdevice = kzalloc(sizeof(*hdevice), GFP_KERNEL);
  3805. if (!hdevice) {
  3806. dprintk(CVP_ERR, "failed to allocate new device\n");
  3807. goto exit;
  3808. }
  3809. hdevice->response_pkt = kmalloc_array(cvp_max_packets,
  3810. sizeof(*hdevice->response_pkt), GFP_KERNEL);
  3811. if (!hdevice->response_pkt) {
  3812. dprintk(CVP_ERR, "failed to allocate response_pkt\n");
  3813. goto err_cleanup;
  3814. }
  3815. hdevice->raw_packet =
  3816. kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  3817. if (!hdevice->raw_packet) {
  3818. dprintk(CVP_ERR, "failed to allocate raw packet\n");
  3819. goto err_cleanup;
  3820. }
  3821. rc = vm_manager.vm_ops->vm_init_reg_and_irq(hdevice, res);
  3822. if (rc)
  3823. goto err_cleanup;
  3824. hdevice->res = res;
  3825. hdevice->device_id = device_id;
  3826. hdevice->callback = callback;
  3827. __init_cvp_ops(hdevice);
  3828. hdevice->cvp_workq = create_singlethread_workqueue(
  3829. "msm_cvp_workerq_iris");
  3830. if (!hdevice->cvp_workq) {
  3831. dprintk(CVP_ERR, ": create cvp workq failed\n");
  3832. goto err_cleanup;
  3833. }
  3834. hdevice->iris_pm_workq = create_singlethread_workqueue(
  3835. "pm_workerq_iris");
  3836. if (!hdevice->iris_pm_workq) {
  3837. dprintk(CVP_ERR, ": create pm workq failed\n");
  3838. goto err_cleanup;
  3839. }
  3840. mutex_init(&hdevice->lock);
  3841. INIT_LIST_HEAD(&hdevice->sess_head);
  3842. return hdevice;
  3843. err_cleanup:
  3844. if (hdevice->iris_pm_workq)
  3845. destroy_workqueue(hdevice->iris_pm_workq);
  3846. if (hdevice->cvp_workq)
  3847. destroy_workqueue(hdevice->cvp_workq);
  3848. kfree(hdevice->response_pkt);
  3849. kfree(hdevice->raw_packet);
  3850. kfree(hdevice);
  3851. exit:
  3852. return NULL;
  3853. }
  3854. static struct iris_hfi_device *__get_device(u32 device_id,
  3855. struct msm_cvp_platform_resources *res,
  3856. hfi_cmd_response_callback callback)
  3857. {
  3858. if (!res || !callback) {
  3859. dprintk(CVP_ERR, "Invalid params: %pK %pK\n", res, callback);
  3860. return NULL;
  3861. }
  3862. return __add_device(device_id, res, callback);
  3863. }
  3864. void cvp_iris_hfi_delete_device(void *device)
  3865. {
  3866. struct msm_cvp_core *core;
  3867. struct iris_hfi_device *dev = NULL;
  3868. if (!device)
  3869. return;
  3870. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3871. if (core)
  3872. dev = core->device->hfi_device_data;
  3873. if (!dev)
  3874. return;
  3875. mutex_destroy(&dev->lock);
  3876. destroy_workqueue(dev->cvp_workq);
  3877. destroy_workqueue(dev->iris_pm_workq);
  3878. free_irq(dev->cvp_hal_data->irq, dev);
  3879. iounmap(dev->cvp_hal_data->register_base);
  3880. iounmap(dev->cvp_hal_data->gcc_reg_base);
  3881. kfree(dev->cvp_hal_data);
  3882. kfree(dev->response_pkt);
  3883. kfree(dev->raw_packet);
  3884. kfree(dev);
  3885. }
  3886. static int iris_hfi_validate_session(void *sess, const char *func)
  3887. {
  3888. struct cvp_hal_session *session = sess;
  3889. int rc = 0;
  3890. struct iris_hfi_device *device;
  3891. if (!session || !session->device) {
  3892. dprintk(CVP_ERR, " %s Invalid Params %pK\n", __func__, session);
  3893. return -EINVAL;
  3894. }
  3895. device = session->device;
  3896. mutex_lock(&device->lock);
  3897. if (!__is_session_valid(device, session, func))
  3898. rc = -ECONNRESET;
  3899. mutex_unlock(&device->lock);
  3900. return rc;
  3901. }
  3902. static void iris_init_hfi_callbacks(struct cvp_hfi_device *hdev)
  3903. {
  3904. hdev->core_init = iris_hfi_core_init;
  3905. hdev->core_release = iris_hfi_core_release;
  3906. hdev->core_trigger_ssr = iris_hfi_core_trigger_ssr;
  3907. hdev->session_init = iris_hfi_session_init;
  3908. hdev->session_end = iris_hfi_session_end;
  3909. hdev->session_abort = iris_hfi_session_abort;
  3910. hdev->session_clean = iris_hfi_session_clean;
  3911. hdev->session_set_buffers = iris_hfi_session_set_buffers;
  3912. hdev->session_release_buffers = iris_hfi_session_release_buffers;
  3913. hdev->session_send = iris_hfi_session_send;
  3914. hdev->session_flush = iris_hfi_session_flush;
  3915. hdev->scale_clocks = iris_hfi_scale_clocks;
  3916. hdev->vote_bus = iris_hfi_vote_buses;
  3917. hdev->get_fw_info = iris_hfi_get_fw_info;
  3918. hdev->get_core_capabilities = iris_hfi_get_core_capabilities;
  3919. hdev->suspend = iris_hfi_suspend;
  3920. hdev->resume = iris_hfi_resume;
  3921. hdev->flush_debug_queue = iris_hfi_flush_debug_queue;
  3922. hdev->noc_error_info = iris_hfi_noc_error_info;
  3923. hdev->validate_session = iris_hfi_validate_session;
  3924. hdev->pm_qos_update = iris_pm_qos_update;
  3925. }
  3926. int cvp_iris_hfi_initialize(struct cvp_hfi_device *hdev, u32 device_id,
  3927. struct msm_cvp_platform_resources *res,
  3928. hfi_cmd_response_callback callback)
  3929. {
  3930. int rc = 0;
  3931. if (!hdev || !res || !callback) {
  3932. dprintk(CVP_ERR, "Invalid params: %pK %pK %pK\n",
  3933. hdev, res, callback);
  3934. rc = -EINVAL;
  3935. goto err_iris_hfi_init;
  3936. }
  3937. hdev->hfi_device_data = __get_device(device_id, res, callback);
  3938. if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
  3939. rc = PTR_ERR(hdev->hfi_device_data) ?: -EINVAL;
  3940. goto err_iris_hfi_init;
  3941. }
  3942. iris_init_hfi_callbacks(hdev);
  3943. err_iris_hfi_init:
  3944. return rc;
  3945. }