dp_rx.c 87 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_api.h"
  26. #include "qdf_nbuf.h"
  27. #ifdef MESH_MODE_SUPPORT
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #include "dp_internal.h"
  31. #include "dp_ipa.h"
  32. #include "dp_hist.h"
  33. #include "dp_rx_buffer_pool.h"
  34. #ifdef WIFI_MONITOR_SUPPORT
  35. #include "dp_htt.h"
  36. #include <dp_mon.h>
  37. #endif
  38. #ifdef FEATURE_WDS
  39. #include "dp_txrx_wds.h"
  40. #endif
  41. #ifdef DP_RATETABLE_SUPPORT
  42. #include "dp_ratetable.h"
  43. #endif
  44. #ifdef DUP_RX_DESC_WAR
  45. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  46. hal_ring_handle_t hal_ring,
  47. hal_ring_desc_t ring_desc,
  48. struct dp_rx_desc *rx_desc)
  49. {
  50. void *hal_soc = soc->hal_soc;
  51. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  52. dp_rx_desc_dump(rx_desc);
  53. }
  54. #else
  55. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  56. hal_ring_handle_t hal_ring_hdl,
  57. hal_ring_desc_t ring_desc,
  58. struct dp_rx_desc *rx_desc)
  59. {
  60. hal_soc_handle_t hal_soc = soc->hal_soc;
  61. dp_rx_desc_dump(rx_desc);
  62. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  63. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  64. qdf_assert_always(0);
  65. }
  66. #endif
  67. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  68. #ifdef RX_DESC_SANITY_WAR
  69. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  70. hal_ring_handle_t hal_ring_hdl,
  71. hal_ring_desc_t ring_desc,
  72. struct dp_rx_desc *rx_desc)
  73. {
  74. uint8_t return_buffer_manager;
  75. if (qdf_unlikely(!rx_desc)) {
  76. /*
  77. * This is an unlikely case where the cookie obtained
  78. * from the ring_desc is invalid and hence we are not
  79. * able to find the corresponding rx_desc
  80. */
  81. goto fail;
  82. }
  83. return_buffer_manager = hal_rx_ret_buf_manager_get(hal_soc, ring_desc);
  84. if (qdf_unlikely(!(return_buffer_manager ==
  85. HAL_RX_BUF_RBM_SW1_BM(soc->wbm_sw0_bm_id) ||
  86. return_buffer_manager ==
  87. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id)))) {
  88. goto fail;
  89. }
  90. return QDF_STATUS_SUCCESS;
  91. fail:
  92. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  93. dp_err("Ring Desc:");
  94. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  95. ring_desc);
  96. return QDF_STATUS_E_NULL_VALUE;
  97. }
  98. #endif
  99. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  100. /**
  101. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  102. *
  103. * @dp_soc: struct dp_soc *
  104. * @nbuf_frag_info_t: nbuf frag info
  105. * @dp_pdev: struct dp_pdev *
  106. * @rx_desc_pool: Rx desc pool
  107. *
  108. * Return: QDF_STATUS
  109. */
  110. #ifdef DP_RX_MON_MEM_FRAG
  111. static inline QDF_STATUS
  112. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  113. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  114. struct dp_pdev *dp_pdev,
  115. struct rx_desc_pool *rx_desc_pool)
  116. {
  117. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  118. (nbuf_frag_info_t->virt_addr).vaddr =
  119. qdf_frag_alloc(NULL, rx_desc_pool->buf_size);
  120. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  121. dp_err("Frag alloc failed");
  122. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  123. return QDF_STATUS_E_NOMEM;
  124. }
  125. ret = qdf_mem_map_page(dp_soc->osdev,
  126. (nbuf_frag_info_t->virt_addr).vaddr,
  127. QDF_DMA_FROM_DEVICE,
  128. rx_desc_pool->buf_size,
  129. &nbuf_frag_info_t->paddr);
  130. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  131. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  132. dp_err("Frag map failed");
  133. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  134. return QDF_STATUS_E_FAULT;
  135. }
  136. return QDF_STATUS_SUCCESS;
  137. }
  138. #else
  139. static inline QDF_STATUS
  140. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  141. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  142. struct dp_pdev *dp_pdev,
  143. struct rx_desc_pool *rx_desc_pool)
  144. {
  145. return QDF_STATUS_SUCCESS;
  146. }
  147. #endif /* DP_RX_MON_MEM_FRAG */
  148. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  149. /**
  150. * dp_rx_refill_ring_record_entry() - Record an entry into refill_ring history
  151. * @soc: Datapath soc structure
  152. * @ring_num: Refill ring number
  153. * @hal_ring_hdl:
  154. * @num_req: number of buffers requested for refill
  155. * @num_refill: number of buffers refilled
  156. *
  157. * Return: None
  158. */
  159. static inline void
  160. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  161. hal_ring_handle_t hal_ring_hdl,
  162. uint32_t num_req, uint32_t num_refill)
  163. {
  164. struct dp_refill_info_record *record;
  165. uint32_t idx;
  166. uint32_t tp;
  167. uint32_t hp;
  168. if (qdf_unlikely(ring_num >= MAX_PDEV_CNT ||
  169. !soc->rx_refill_ring_history[ring_num]))
  170. return;
  171. idx = dp_history_get_next_index(&soc->rx_refill_ring_history[ring_num]->index,
  172. DP_RX_REFILL_HIST_MAX);
  173. /* No NULL check needed for record since its an array */
  174. record = &soc->rx_refill_ring_history[ring_num]->entry[idx];
  175. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &tp, &hp);
  176. record->timestamp = qdf_get_log_timestamp();
  177. record->num_req = num_req;
  178. record->num_refill = num_refill;
  179. record->hp = hp;
  180. record->tp = tp;
  181. }
  182. #else
  183. static inline void
  184. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  185. hal_ring_handle_t hal_ring_hdl,
  186. uint32_t num_req, uint32_t num_refill)
  187. {
  188. }
  189. #endif
  190. /**
  191. * dp_pdev_nbuf_alloc_and_map_replenish() - Allocate nbuf for desc buffer and
  192. * map
  193. * @dp_soc: struct dp_soc *
  194. * @mac_id: Mac id
  195. * @num_entries_avail: num_entries_avail
  196. * @nbuf_frag_info_t: nbuf frag info
  197. * @dp_pdev: struct dp_pdev *
  198. * @rx_desc_pool: Rx desc pool
  199. *
  200. * Return: QDF_STATUS
  201. */
  202. static inline QDF_STATUS
  203. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  204. uint32_t mac_id,
  205. uint32_t num_entries_avail,
  206. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  207. struct dp_pdev *dp_pdev,
  208. struct rx_desc_pool *rx_desc_pool)
  209. {
  210. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  211. (nbuf_frag_info_t->virt_addr).nbuf =
  212. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  213. mac_id,
  214. rx_desc_pool,
  215. num_entries_avail);
  216. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  217. dp_err("nbuf alloc failed");
  218. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  219. return QDF_STATUS_E_NOMEM;
  220. }
  221. ret = dp_rx_buffer_pool_nbuf_map(dp_soc, rx_desc_pool,
  222. nbuf_frag_info_t);
  223. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  224. dp_rx_buffer_pool_nbuf_free(dp_soc,
  225. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  226. dp_err("nbuf map failed");
  227. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  228. return QDF_STATUS_E_FAULT;
  229. }
  230. nbuf_frag_info_t->paddr =
  231. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  232. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, (qdf_nbuf_t)(
  233. (nbuf_frag_info_t->virt_addr).nbuf),
  234. rx_desc_pool->buf_size,
  235. true, __func__, __LINE__);
  236. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  237. &nbuf_frag_info_t->paddr,
  238. rx_desc_pool);
  239. if (ret == QDF_STATUS_E_FAILURE) {
  240. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  241. return QDF_STATUS_E_ADDRNOTAVAIL;
  242. }
  243. return QDF_STATUS_SUCCESS;
  244. }
  245. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  246. QDF_STATUS
  247. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *soc, uint32_t mac_id,
  248. struct dp_srng *dp_rxdma_srng,
  249. struct rx_desc_pool *rx_desc_pool)
  250. {
  251. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  252. uint32_t count;
  253. void *rxdma_ring_entry;
  254. union dp_rx_desc_list_elem_t *next = NULL;
  255. void *rxdma_srng;
  256. qdf_nbuf_t nbuf;
  257. qdf_dma_addr_t paddr;
  258. uint16_t num_entries_avail = 0;
  259. uint16_t num_alloc_desc = 0;
  260. union dp_rx_desc_list_elem_t *desc_list = NULL;
  261. union dp_rx_desc_list_elem_t *tail = NULL;
  262. int sync_hw_ptr = 0;
  263. rxdma_srng = dp_rxdma_srng->hal_srng;
  264. if (qdf_unlikely(!dp_pdev)) {
  265. dp_rx_err("%pK: pdev is null for mac_id = %d", soc, mac_id);
  266. return QDF_STATUS_E_FAILURE;
  267. }
  268. if (qdf_unlikely(!rxdma_srng)) {
  269. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  270. return QDF_STATUS_E_FAILURE;
  271. }
  272. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  273. num_entries_avail = hal_srng_src_num_avail(soc->hal_soc,
  274. rxdma_srng,
  275. sync_hw_ptr);
  276. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  277. soc, num_entries_avail);
  278. if (qdf_unlikely(num_entries_avail <
  279. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  280. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  281. return QDF_STATUS_E_FAILURE;
  282. }
  283. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  284. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  285. rx_desc_pool,
  286. num_entries_avail,
  287. &desc_list,
  288. &tail);
  289. if (!num_alloc_desc) {
  290. dp_rx_err("%pK: no free rx_descs in freelist", soc);
  291. DP_STATS_INC(dp_pdev, err.desc_lt_alloc_fail,
  292. num_entries_avail);
  293. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  294. return QDF_STATUS_E_NOMEM;
  295. }
  296. for (count = 0; count < num_alloc_desc; count++) {
  297. next = desc_list->next;
  298. qdf_prefetch(next);
  299. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  300. if (qdf_unlikely(!nbuf)) {
  301. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  302. break;
  303. }
  304. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  305. rx_desc_pool->buf_size);
  306. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc,
  307. rxdma_srng);
  308. qdf_assert_always(rxdma_ring_entry);
  309. desc_list->rx_desc.nbuf = nbuf;
  310. desc_list->rx_desc.rx_buf_start = nbuf->data;
  311. desc_list->rx_desc.unmapped = 0;
  312. /* rx_desc.in_use should be zero at this time*/
  313. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  314. desc_list->rx_desc.in_use = 1;
  315. desc_list->rx_desc.in_err_state = 0;
  316. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  317. paddr,
  318. desc_list->rx_desc.cookie,
  319. rx_desc_pool->owner);
  320. desc_list = next;
  321. }
  322. qdf_dsb();
  323. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  324. /* No need to count the number of bytes received during replenish.
  325. * Therefore set replenish.pkts.bytes as 0.
  326. */
  327. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  328. DP_STATS_INC(dp_pdev, buf_freelist, (num_alloc_desc - count));
  329. /*
  330. * add any available free desc back to the free list
  331. */
  332. if (desc_list)
  333. dp_rx_add_desc_list_to_free_list(soc, &desc_list, &tail,
  334. mac_id, rx_desc_pool);
  335. return QDF_STATUS_SUCCESS;
  336. }
  337. QDF_STATUS
  338. __dp_rx_buffers_no_map_replenish(struct dp_soc *soc, uint32_t mac_id,
  339. struct dp_srng *dp_rxdma_srng,
  340. struct rx_desc_pool *rx_desc_pool,
  341. uint32_t num_req_buffers,
  342. union dp_rx_desc_list_elem_t **desc_list,
  343. union dp_rx_desc_list_elem_t **tail)
  344. {
  345. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  346. uint32_t count;
  347. void *rxdma_ring_entry;
  348. union dp_rx_desc_list_elem_t *next;
  349. void *rxdma_srng;
  350. qdf_nbuf_t nbuf;
  351. qdf_nbuf_t nbuf_next;
  352. qdf_nbuf_t nbuf_head = NULL;
  353. qdf_nbuf_t nbuf_tail = NULL;
  354. qdf_dma_addr_t paddr;
  355. rxdma_srng = dp_rxdma_srng->hal_srng;
  356. if (qdf_unlikely(!dp_pdev)) {
  357. dp_rx_err("%pK: pdev is null for mac_id = %d",
  358. soc, mac_id);
  359. return QDF_STATUS_E_FAILURE;
  360. }
  361. if (qdf_unlikely(!rxdma_srng)) {
  362. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  363. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  364. return QDF_STATUS_E_FAILURE;
  365. }
  366. /* Allocate required number of nbufs */
  367. for (count = 0; count < num_req_buffers; count++) {
  368. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  369. if (qdf_unlikely(!nbuf)) {
  370. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  371. /* Update num_req_buffers to nbufs allocated count */
  372. num_req_buffers = count;
  373. break;
  374. }
  375. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  376. rx_desc_pool->buf_size);
  377. QDF_NBUF_CB_PADDR(nbuf) = paddr;
  378. DP_RX_LIST_APPEND(nbuf_head,
  379. nbuf_tail,
  380. nbuf);
  381. }
  382. qdf_dsb();
  383. nbuf = nbuf_head;
  384. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  385. for (count = 0; count < num_req_buffers; count++) {
  386. next = (*desc_list)->next;
  387. nbuf_next = nbuf->next;
  388. qdf_prefetch(next);
  389. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  390. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  391. if (!rxdma_ring_entry)
  392. break;
  393. (*desc_list)->rx_desc.nbuf = nbuf;
  394. (*desc_list)->rx_desc.rx_buf_start = nbuf->data;
  395. (*desc_list)->rx_desc.unmapped = 0;
  396. /* rx_desc.in_use should be zero at this time*/
  397. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  398. (*desc_list)->rx_desc.in_use = 1;
  399. (*desc_list)->rx_desc.in_err_state = 0;
  400. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  401. QDF_NBUF_CB_PADDR(nbuf),
  402. (*desc_list)->rx_desc.cookie,
  403. rx_desc_pool->owner);
  404. *desc_list = next;
  405. nbuf = nbuf_next;
  406. }
  407. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  408. /* No need to count the number of bytes received during replenish.
  409. * Therefore set replenish.pkts.bytes as 0.
  410. */
  411. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  412. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  413. /*
  414. * add any available free desc back to the free list
  415. */
  416. if (*desc_list)
  417. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  418. mac_id, rx_desc_pool);
  419. while (nbuf) {
  420. nbuf_next = nbuf->next;
  421. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  422. qdf_nbuf_free(nbuf);
  423. nbuf = nbuf_next;
  424. }
  425. return QDF_STATUS_SUCCESS;
  426. }
  427. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *soc,
  428. uint32_t mac_id,
  429. struct dp_srng *dp_rxdma_srng,
  430. struct rx_desc_pool *rx_desc_pool,
  431. uint32_t num_req_buffers)
  432. {
  433. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  434. uint32_t count;
  435. uint32_t nr_descs = 0;
  436. void *rxdma_ring_entry;
  437. union dp_rx_desc_list_elem_t *next;
  438. void *rxdma_srng;
  439. qdf_nbuf_t nbuf;
  440. qdf_dma_addr_t paddr;
  441. union dp_rx_desc_list_elem_t *desc_list = NULL;
  442. union dp_rx_desc_list_elem_t *tail = NULL;
  443. rxdma_srng = dp_rxdma_srng->hal_srng;
  444. if (qdf_unlikely(!dp_pdev)) {
  445. dp_rx_err("%pK: pdev is null for mac_id = %d",
  446. soc, mac_id);
  447. return QDF_STATUS_E_FAILURE;
  448. }
  449. if (qdf_unlikely(!rxdma_srng)) {
  450. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  451. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  452. return QDF_STATUS_E_FAILURE;
  453. }
  454. dp_rx_debug("%pK: requested %d buffers for replenish",
  455. soc, num_req_buffers);
  456. nr_descs = dp_rx_get_free_desc_list(soc, mac_id, rx_desc_pool,
  457. num_req_buffers, &desc_list, &tail);
  458. if (!nr_descs) {
  459. dp_err("no free rx_descs in freelist");
  460. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  461. return QDF_STATUS_E_NOMEM;
  462. }
  463. dp_debug("got %u RX descs for driver attach", nr_descs);
  464. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  465. for (count = 0; count < nr_descs; count++) {
  466. next = desc_list->next;
  467. qdf_prefetch(next);
  468. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  469. if (qdf_unlikely(!nbuf)) {
  470. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  471. break;
  472. }
  473. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  474. rx_desc_pool->buf_size);
  475. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  476. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  477. if (!rxdma_ring_entry)
  478. break;
  479. qdf_assert_always(rxdma_ring_entry);
  480. desc_list->rx_desc.nbuf = nbuf;
  481. desc_list->rx_desc.rx_buf_start = nbuf->data;
  482. desc_list->rx_desc.unmapped = 0;
  483. /* rx_desc.in_use should be zero at this time*/
  484. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  485. desc_list->rx_desc.in_use = 1;
  486. desc_list->rx_desc.in_err_state = 0;
  487. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  488. paddr,
  489. desc_list->rx_desc.cookie,
  490. rx_desc_pool->owner);
  491. desc_list = next;
  492. }
  493. qdf_dsb();
  494. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  495. /* No need to count the number of bytes received during replenish.
  496. * Therefore set replenish.pkts.bytes as 0.
  497. */
  498. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  499. return QDF_STATUS_SUCCESS;
  500. }
  501. #endif
  502. #ifdef DP_UMAC_HW_RESET_SUPPORT
  503. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  504. static inline
  505. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  506. uint32_t buf_size)
  507. {
  508. return dp_rx_nbuf_sync_no_dsb(dp_soc, nbuf, buf_size);
  509. }
  510. #else
  511. static inline
  512. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  513. uint32_t buf_size)
  514. {
  515. return qdf_nbuf_get_frag_paddr(nbuf, 0);
  516. }
  517. #endif
  518. /**
  519. * dp_rx_desc_replenish() - Replenish the rx descriptors one at a time
  520. * @soc: core txrx main context
  521. * @dp_rxdma_srng: rxdma ring
  522. * @rx_desc_pool: rx descriptor pool
  523. * @rx_desc:rx descriptor
  524. *
  525. * Return: void
  526. */
  527. static inline
  528. void dp_rx_desc_replenish(struct dp_soc *soc, struct dp_srng *dp_rxdma_srng,
  529. struct rx_desc_pool *rx_desc_pool,
  530. struct dp_rx_desc *rx_desc)
  531. {
  532. void *rxdma_srng;
  533. void *rxdma_ring_entry;
  534. qdf_dma_addr_t paddr;
  535. rxdma_srng = dp_rxdma_srng->hal_srng;
  536. /* No one else should be accessing the srng at this point */
  537. hal_srng_access_start_unlocked(soc->hal_soc, rxdma_srng);
  538. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  539. qdf_assert_always(rxdma_ring_entry);
  540. rx_desc->in_err_state = 0;
  541. paddr = dp_rx_rep_retrieve_paddr(soc, rx_desc->nbuf,
  542. rx_desc_pool->buf_size);
  543. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry, paddr,
  544. rx_desc->cookie, rx_desc_pool->owner);
  545. hal_srng_access_end_unlocked(soc->hal_soc, rxdma_srng);
  546. }
  547. void dp_rx_desc_reuse(struct dp_soc *soc, qdf_nbuf_t *nbuf_list)
  548. {
  549. int mac_id, i, j;
  550. union dp_rx_desc_list_elem_t *head = NULL;
  551. union dp_rx_desc_list_elem_t *tail = NULL;
  552. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  553. struct dp_srng *dp_rxdma_srng =
  554. &soc->rx_refill_buf_ring[mac_id];
  555. struct rx_desc_pool *rx_desc_pool = &soc->rx_desc_buf[mac_id];
  556. uint32_t rx_sw_desc_num = rx_desc_pool->pool_size;
  557. /* Only fill up 1/3 of the ring size */
  558. uint32_t num_req_decs;
  559. if (!dp_rxdma_srng || !dp_rxdma_srng->hal_srng ||
  560. !rx_desc_pool->array)
  561. continue;
  562. num_req_decs = dp_rxdma_srng->num_entries / 3;
  563. for (i = 0, j = 0; i < rx_sw_desc_num; i++) {
  564. struct dp_rx_desc *rx_desc =
  565. (struct dp_rx_desc *)&rx_desc_pool->array[i];
  566. if (rx_desc->in_use) {
  567. if (j < (dp_rxdma_srng->num_entries - 1)) {
  568. dp_rx_desc_replenish(soc, dp_rxdma_srng,
  569. rx_desc_pool,
  570. rx_desc);
  571. } else {
  572. dp_rx_nbuf_unmap(soc, rx_desc, 0);
  573. rx_desc->unmapped = 0;
  574. rx_desc->nbuf->next = *nbuf_list;
  575. *nbuf_list = rx_desc->nbuf;
  576. dp_rx_add_to_free_desc_list(&head,
  577. &tail,
  578. rx_desc);
  579. }
  580. j++;
  581. }
  582. }
  583. if (head)
  584. dp_rx_add_desc_list_to_free_list(soc, &head, &tail,
  585. mac_id, rx_desc_pool);
  586. /* If num of descs in use were less, then we need to replenish
  587. * the ring with some buffers
  588. */
  589. head = NULL;
  590. tail = NULL;
  591. if (j < (num_req_decs - 1))
  592. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  593. rx_desc_pool,
  594. ((num_req_decs - 1) - j),
  595. &head, &tail, true);
  596. }
  597. }
  598. #endif
  599. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  600. struct dp_srng *dp_rxdma_srng,
  601. struct rx_desc_pool *rx_desc_pool,
  602. uint32_t num_req_buffers,
  603. union dp_rx_desc_list_elem_t **desc_list,
  604. union dp_rx_desc_list_elem_t **tail,
  605. bool req_only, const char *func_name)
  606. {
  607. uint32_t num_alloc_desc;
  608. uint16_t num_desc_to_free = 0;
  609. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  610. uint32_t num_entries_avail;
  611. uint32_t count;
  612. uint32_t extra_buffers;
  613. int sync_hw_ptr = 1;
  614. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  615. void *rxdma_ring_entry;
  616. union dp_rx_desc_list_elem_t *next;
  617. QDF_STATUS ret;
  618. void *rxdma_srng;
  619. union dp_rx_desc_list_elem_t *desc_list_append = NULL;
  620. union dp_rx_desc_list_elem_t *tail_append = NULL;
  621. union dp_rx_desc_list_elem_t *temp_list = NULL;
  622. rxdma_srng = dp_rxdma_srng->hal_srng;
  623. if (qdf_unlikely(!dp_pdev)) {
  624. dp_rx_err("%pK: pdev is null for mac_id = %d",
  625. dp_soc, mac_id);
  626. return QDF_STATUS_E_FAILURE;
  627. }
  628. if (qdf_unlikely(!rxdma_srng)) {
  629. dp_rx_debug("%pK: rxdma srng not initialized", dp_soc);
  630. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  631. return QDF_STATUS_E_FAILURE;
  632. }
  633. dp_verbose_debug("%pK: requested %d buffers for replenish",
  634. dp_soc, num_req_buffers);
  635. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  636. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  637. rxdma_srng,
  638. sync_hw_ptr);
  639. dp_verbose_debug("%pK: no of available entries in rxdma ring: %d",
  640. dp_soc, num_entries_avail);
  641. if (!req_only && !(*desc_list) && (num_entries_avail >
  642. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  643. num_req_buffers = num_entries_avail;
  644. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  645. } else if (num_entries_avail < num_req_buffers) {
  646. num_desc_to_free = num_req_buffers - num_entries_avail;
  647. num_req_buffers = num_entries_avail;
  648. } else if ((*desc_list) &&
  649. dp_rxdma_srng->num_entries - num_entries_avail <
  650. CRITICAL_BUFFER_THRESHOLD) {
  651. /* set extra buffers to CRITICAL_BUFFER_THRESHOLD only if
  652. * total buff requested after adding extra buffers is less
  653. * than or equal to num entries available, else set it to max
  654. * possible additional buffers available at that moment
  655. */
  656. extra_buffers =
  657. ((num_req_buffers + CRITICAL_BUFFER_THRESHOLD) > num_entries_avail) ?
  658. (num_entries_avail - num_req_buffers) :
  659. CRITICAL_BUFFER_THRESHOLD;
  660. /* Append some free descriptors to tail */
  661. num_alloc_desc =
  662. dp_rx_get_free_desc_list(dp_soc, mac_id,
  663. rx_desc_pool,
  664. extra_buffers,
  665. &desc_list_append,
  666. &tail_append);
  667. if (num_alloc_desc) {
  668. temp_list = *desc_list;
  669. *desc_list = desc_list_append;
  670. tail_append->next = temp_list;
  671. num_req_buffers += num_alloc_desc;
  672. DP_STATS_DEC(dp_pdev,
  673. replenish.free_list,
  674. num_alloc_desc);
  675. } else
  676. dp_err_rl("%pK: no free rx_descs in freelist", dp_soc);
  677. }
  678. if (qdf_unlikely(!num_req_buffers)) {
  679. num_desc_to_free = num_req_buffers;
  680. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  681. goto free_descs;
  682. }
  683. /*
  684. * if desc_list is NULL, allocate the descs from freelist
  685. */
  686. if (!(*desc_list)) {
  687. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  688. rx_desc_pool,
  689. num_req_buffers,
  690. desc_list,
  691. tail);
  692. if (!num_alloc_desc) {
  693. dp_rx_err("%pK: no free rx_descs in freelist", dp_soc);
  694. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  695. num_req_buffers);
  696. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  697. return QDF_STATUS_E_NOMEM;
  698. }
  699. dp_verbose_debug("%pK: %d rx desc allocated", dp_soc,
  700. num_alloc_desc);
  701. num_req_buffers = num_alloc_desc;
  702. }
  703. count = 0;
  704. while (count < num_req_buffers) {
  705. /* Flag is set while pdev rx_desc_pool initialization */
  706. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  707. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  708. &nbuf_frag_info,
  709. dp_pdev,
  710. rx_desc_pool);
  711. else
  712. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  713. mac_id,
  714. num_entries_avail, &nbuf_frag_info,
  715. dp_pdev, rx_desc_pool);
  716. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  717. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  718. continue;
  719. break;
  720. }
  721. count++;
  722. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  723. rxdma_srng);
  724. qdf_assert_always(rxdma_ring_entry);
  725. next = (*desc_list)->next;
  726. /* Flag is set while pdev rx_desc_pool initialization */
  727. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  728. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  729. &nbuf_frag_info);
  730. else
  731. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  732. &nbuf_frag_info);
  733. /* rx_desc.in_use should be zero at this time*/
  734. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  735. (*desc_list)->rx_desc.in_use = 1;
  736. (*desc_list)->rx_desc.in_err_state = 0;
  737. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  738. func_name, RX_DESC_REPLENISHED);
  739. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  740. nbuf_frag_info.virt_addr.nbuf,
  741. (unsigned long long)(nbuf_frag_info.paddr),
  742. (*desc_list)->rx_desc.cookie);
  743. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc, rxdma_ring_entry,
  744. nbuf_frag_info.paddr,
  745. (*desc_list)->rx_desc.cookie,
  746. rx_desc_pool->owner);
  747. *desc_list = next;
  748. }
  749. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id, rxdma_srng,
  750. num_req_buffers, count);
  751. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  752. dp_rx_schedule_refill_thread(dp_soc);
  753. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  754. count, num_desc_to_free);
  755. /* No need to count the number of bytes received during replenish.
  756. * Therefore set replenish.pkts.bytes as 0.
  757. */
  758. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  759. DP_STATS_INC(dp_pdev, replenish.free_list, num_req_buffers - count);
  760. free_descs:
  761. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  762. /*
  763. * add any available free desc back to the free list
  764. */
  765. if (*desc_list)
  766. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  767. mac_id, rx_desc_pool);
  768. return QDF_STATUS_SUCCESS;
  769. }
  770. qdf_export_symbol(__dp_rx_buffers_replenish);
  771. void
  772. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  773. struct dp_txrx_peer *txrx_peer)
  774. {
  775. qdf_nbuf_t deliver_list_head = NULL;
  776. qdf_nbuf_t deliver_list_tail = NULL;
  777. qdf_nbuf_t nbuf;
  778. nbuf = nbuf_list;
  779. while (nbuf) {
  780. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  781. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  782. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  783. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.raw, 1,
  784. qdf_nbuf_len(nbuf));
  785. /*
  786. * reset the chfrag_start and chfrag_end bits in nbuf cb
  787. * as this is a non-amsdu pkt and RAW mode simulation expects
  788. * these bit s to be 0 for non-amsdu pkt.
  789. */
  790. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  791. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  792. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  793. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  794. }
  795. nbuf = next;
  796. }
  797. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  798. &deliver_list_tail);
  799. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  800. }
  801. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  802. #ifndef FEATURE_WDS
  803. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  804. struct dp_txrx_peer *ta_peer, qdf_nbuf_t nbuf)
  805. {
  806. }
  807. #endif
  808. #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES
  809. /**
  810. * dp_classify_critical_pkts() - API for marking critical packets
  811. * @soc: dp_soc context
  812. * @vdev: vdev on which packet is to be sent
  813. * @nbuf: nbuf that has to be classified
  814. *
  815. * The function parses the packet, identifies whether its a critical frame and
  816. * marks QDF_NBUF_CB_TX_EXTRA_IS_CRITICAL bit in qdf_nbuf_cb for the nbuf.
  817. * Code for marking which frames are CRITICAL is accessed via callback.
  818. * EAPOL, ARP, DHCP, DHCPv6, ICMPv6 NS/NA are the typical critical frames.
  819. *
  820. * Return: None
  821. */
  822. static
  823. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  824. qdf_nbuf_t nbuf)
  825. {
  826. if (vdev->tx_classify_critical_pkt_cb)
  827. vdev->tx_classify_critical_pkt_cb(vdev->osif_vdev, nbuf);
  828. }
  829. #else
  830. static inline
  831. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  832. qdf_nbuf_t nbuf)
  833. {
  834. }
  835. #endif
  836. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  837. static inline
  838. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  839. {
  840. qdf_nbuf_set_queue_mapping(nbuf, ring_id);
  841. }
  842. #else
  843. static inline
  844. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  845. {
  846. }
  847. #endif
  848. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  849. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  850. struct cdp_tid_rx_stats *tid_stats)
  851. {
  852. uint16_t len;
  853. qdf_nbuf_t nbuf_copy;
  854. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  855. nbuf))
  856. return true;
  857. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  858. return false;
  859. /* If the source peer in the isolation list
  860. * then dont forward instead push to bridge stack
  861. */
  862. if (dp_get_peer_isolation(ta_peer))
  863. return false;
  864. nbuf_copy = qdf_nbuf_copy(nbuf);
  865. if (!nbuf_copy)
  866. return false;
  867. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  868. qdf_mem_set(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  869. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf_copy);
  870. if (soc->arch_ops.dp_rx_intrabss_mcast_handler(soc, ta_peer,
  871. nbuf_copy,
  872. tid_stats))
  873. return false;
  874. /* Don't send packets if tx is paused */
  875. if (!soc->is_tx_pause &&
  876. !dp_tx_send((struct cdp_soc_t *)soc,
  877. ta_peer->vdev->vdev_id, nbuf_copy)) {
  878. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  879. len);
  880. tid_stats->intrabss_cnt++;
  881. } else {
  882. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  883. len);
  884. tid_stats->fail_cnt[INTRABSS_DROP]++;
  885. dp_rx_nbuf_free(nbuf_copy);
  886. }
  887. return false;
  888. }
  889. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  890. uint8_t tx_vdev_id,
  891. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  892. struct cdp_tid_rx_stats *tid_stats)
  893. {
  894. uint16_t len;
  895. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  896. /* linearize the nbuf just before we send to
  897. * dp_tx_send()
  898. */
  899. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  900. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  901. return false;
  902. nbuf = qdf_nbuf_unshare(nbuf);
  903. if (!nbuf) {
  904. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer,
  905. rx.intra_bss.fail,
  906. 1, len);
  907. /* return true even though the pkt is
  908. * not forwarded. Basically skb_unshare
  909. * failed and we want to continue with
  910. * next nbuf.
  911. */
  912. tid_stats->fail_cnt[INTRABSS_DROP]++;
  913. return false;
  914. }
  915. }
  916. qdf_mem_set(nbuf->cb, 0x0, sizeof(nbuf->cb));
  917. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf);
  918. /* Don't send packets if tx is paused */
  919. if (!soc->is_tx_pause && !dp_tx_send((struct cdp_soc_t *)soc,
  920. tx_vdev_id, nbuf)) {
  921. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  922. len);
  923. } else {
  924. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  925. len);
  926. tid_stats->fail_cnt[INTRABSS_DROP]++;
  927. return false;
  928. }
  929. return true;
  930. }
  931. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  932. #ifdef MESH_MODE_SUPPORT
  933. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  934. uint8_t *rx_tlv_hdr,
  935. struct dp_txrx_peer *txrx_peer)
  936. {
  937. struct mesh_recv_hdr_s *rx_info = NULL;
  938. uint32_t pkt_type;
  939. uint32_t nss;
  940. uint32_t rate_mcs;
  941. uint32_t bw;
  942. uint8_t primary_chan_num;
  943. uint32_t center_chan_freq;
  944. struct dp_soc *soc = vdev->pdev->soc;
  945. struct dp_peer *peer;
  946. struct dp_peer *primary_link_peer;
  947. struct dp_soc *link_peer_soc;
  948. cdp_peer_stats_param_t buf = {0};
  949. /* fill recv mesh stats */
  950. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  951. /* upper layers are responsible to free this memory */
  952. if (!rx_info) {
  953. dp_rx_err("%pK: Memory allocation failed for mesh rx stats",
  954. vdev->pdev->soc);
  955. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  956. return;
  957. }
  958. rx_info->rs_flags = MESH_RXHDR_VER1;
  959. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  960. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  961. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  962. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  963. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id, DP_MOD_ID_MESH);
  964. if (peer) {
  965. if (hal_rx_tlv_get_is_decrypted(soc->hal_soc, rx_tlv_hdr)) {
  966. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  967. rx_info->rs_keyix = hal_rx_msdu_get_keyid(soc->hal_soc,
  968. rx_tlv_hdr);
  969. if (vdev->osif_get_key)
  970. vdev->osif_get_key(vdev->osif_vdev,
  971. &rx_info->rs_decryptkey[0],
  972. &peer->mac_addr.raw[0],
  973. rx_info->rs_keyix);
  974. }
  975. dp_peer_unref_delete(peer, DP_MOD_ID_MESH);
  976. }
  977. primary_link_peer = dp_get_primary_link_peer_by_id(soc,
  978. txrx_peer->peer_id,
  979. DP_MOD_ID_MESH);
  980. if (qdf_likely(primary_link_peer)) {
  981. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  982. dp_monitor_peer_get_stats_param(link_peer_soc,
  983. primary_link_peer,
  984. cdp_peer_rx_snr, &buf);
  985. rx_info->rs_snr = buf.rx_snr;
  986. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_MESH);
  987. }
  988. rx_info->rs_rssi = rx_info->rs_snr + DP_DEFAULT_NOISEFLOOR;
  989. soc = vdev->pdev->soc;
  990. primary_chan_num = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr);
  991. center_chan_freq = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr) >> 16;
  992. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  993. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  994. soc->ctrl_psoc,
  995. vdev->pdev->pdev_id,
  996. center_chan_freq);
  997. }
  998. rx_info->rs_channel = primary_chan_num;
  999. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  1000. rate_mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  1001. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  1002. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1003. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  1004. (bw << 24);
  1005. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  1006. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  1007. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x, snr %x"),
  1008. rx_info->rs_flags,
  1009. rx_info->rs_rssi,
  1010. rx_info->rs_channel,
  1011. rx_info->rs_ratephy1,
  1012. rx_info->rs_keyix,
  1013. rx_info->rs_snr);
  1014. }
  1015. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1016. uint8_t *rx_tlv_hdr)
  1017. {
  1018. union dp_align_mac_addr mac_addr;
  1019. struct dp_soc *soc = vdev->pdev->soc;
  1020. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  1021. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  1022. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1023. rx_tlv_hdr))
  1024. return QDF_STATUS_SUCCESS;
  1025. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  1026. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1027. rx_tlv_hdr))
  1028. return QDF_STATUS_SUCCESS;
  1029. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  1030. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1031. rx_tlv_hdr) &&
  1032. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1033. rx_tlv_hdr))
  1034. return QDF_STATUS_SUCCESS;
  1035. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  1036. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  1037. rx_tlv_hdr,
  1038. &mac_addr.raw[0]))
  1039. return QDF_STATUS_E_FAILURE;
  1040. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1041. &vdev->mac_addr.raw[0],
  1042. QDF_MAC_ADDR_SIZE))
  1043. return QDF_STATUS_SUCCESS;
  1044. }
  1045. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  1046. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  1047. rx_tlv_hdr,
  1048. &mac_addr.raw[0]))
  1049. return QDF_STATUS_E_FAILURE;
  1050. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1051. &vdev->mac_addr.raw[0],
  1052. QDF_MAC_ADDR_SIZE))
  1053. return QDF_STATUS_SUCCESS;
  1054. }
  1055. }
  1056. return QDF_STATUS_E_FAILURE;
  1057. }
  1058. #else
  1059. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1060. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer)
  1061. {
  1062. }
  1063. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1064. uint8_t *rx_tlv_hdr)
  1065. {
  1066. return QDF_STATUS_E_FAILURE;
  1067. }
  1068. #endif
  1069. #ifdef RX_PEER_INVALID_ENH
  1070. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1071. uint8_t mac_id)
  1072. {
  1073. struct dp_invalid_peer_msg msg;
  1074. struct dp_vdev *vdev = NULL;
  1075. struct dp_pdev *pdev = NULL;
  1076. struct ieee80211_frame *wh;
  1077. qdf_nbuf_t curr_nbuf, next_nbuf;
  1078. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1079. uint8_t *rx_pkt_hdr = NULL;
  1080. int i = 0;
  1081. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  1082. dp_rx_debug("%pK: Drop decapped frames", soc);
  1083. goto free;
  1084. }
  1085. /* In RAW packet, packet header will be part of data */
  1086. rx_pkt_hdr = rx_tlv_hdr + soc->rx_pkt_tlv_size;
  1087. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1088. if (!DP_FRAME_IS_DATA(wh)) {
  1089. dp_rx_debug("%pK: NAWDS valid only for data frames", soc);
  1090. goto free;
  1091. }
  1092. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1093. dp_rx_err("%pK: Invalid nbuf length", soc);
  1094. goto free;
  1095. }
  1096. /* In DMAC case the rx_desc_pools are common across PDEVs
  1097. * so PDEV cannot be derived from the pool_id.
  1098. *
  1099. * link_id need to derived from the TLV tag word which is
  1100. * disabled by default. For now adding a WAR to get vdev
  1101. * with brute force this need to fixed with word based subscription
  1102. * support is added by enabling TLV tag word
  1103. */
  1104. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1105. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1106. pdev = soc->pdev_list[i];
  1107. if (!pdev || qdf_unlikely(pdev->is_pdev_down))
  1108. continue;
  1109. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1110. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1111. QDF_MAC_ADDR_SIZE) == 0) {
  1112. goto out;
  1113. }
  1114. }
  1115. }
  1116. } else {
  1117. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1118. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  1119. dp_rx_err("%pK: PDEV %s",
  1120. soc, !pdev ? "not found" : "down");
  1121. goto free;
  1122. }
  1123. if (dp_monitor_filter_neighbour_peer(pdev, rx_pkt_hdr) ==
  1124. QDF_STATUS_SUCCESS)
  1125. return 0;
  1126. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1127. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1128. QDF_MAC_ADDR_SIZE) == 0) {
  1129. goto out;
  1130. }
  1131. }
  1132. }
  1133. if (!vdev) {
  1134. dp_rx_err("%pK: VDEV not found", soc);
  1135. goto free;
  1136. }
  1137. out:
  1138. msg.wh = wh;
  1139. qdf_nbuf_pull_head(mpdu, soc->rx_pkt_tlv_size);
  1140. msg.nbuf = mpdu;
  1141. msg.vdev_id = vdev->vdev_id;
  1142. /*
  1143. * NOTE: Only valid for HKv1.
  1144. * If smart monitor mode is enabled on RE, we are getting invalid
  1145. * peer frames with RA as STA mac of RE and the TA not matching
  1146. * with any NAC list or the the BSSID.Such frames need to dropped
  1147. * in order to avoid HM_WDS false addition.
  1148. */
  1149. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer) {
  1150. if (dp_monitor_drop_inv_peer_pkts(vdev) == QDF_STATUS_SUCCESS) {
  1151. dp_rx_warn("%pK: Drop inv peer pkts with STA RA:%pm",
  1152. soc, wh->i_addr1);
  1153. goto free;
  1154. }
  1155. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  1156. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  1157. pdev->pdev_id, &msg);
  1158. }
  1159. free:
  1160. /* Drop and free packet */
  1161. curr_nbuf = mpdu;
  1162. while (curr_nbuf) {
  1163. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1164. dp_rx_nbuf_free(curr_nbuf);
  1165. curr_nbuf = next_nbuf;
  1166. }
  1167. return 0;
  1168. }
  1169. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1170. qdf_nbuf_t mpdu, bool mpdu_done,
  1171. uint8_t mac_id)
  1172. {
  1173. /* Only trigger the process when mpdu is completed */
  1174. if (mpdu_done)
  1175. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1176. }
  1177. #else
  1178. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1179. uint8_t mac_id)
  1180. {
  1181. qdf_nbuf_t curr_nbuf, next_nbuf;
  1182. struct dp_pdev *pdev;
  1183. struct dp_vdev *vdev = NULL;
  1184. struct ieee80211_frame *wh;
  1185. struct dp_peer *peer = NULL;
  1186. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1187. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  1188. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1189. if (!DP_FRAME_IS_DATA(wh)) {
  1190. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  1191. "only for data frames");
  1192. goto free;
  1193. }
  1194. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1195. dp_rx_info_rl("%pK: Invalid nbuf length", soc);
  1196. goto free;
  1197. }
  1198. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1199. if (!pdev) {
  1200. dp_rx_info_rl("%pK: PDEV not found", soc);
  1201. goto free;
  1202. }
  1203. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1204. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1205. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1206. QDF_MAC_ADDR_SIZE) == 0) {
  1207. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1208. goto out;
  1209. }
  1210. }
  1211. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1212. if (!vdev) {
  1213. dp_rx_info_rl("%pK: VDEV not found", soc);
  1214. goto free;
  1215. }
  1216. out:
  1217. if (vdev->opmode == wlan_op_mode_ap) {
  1218. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  1219. vdev->vdev_id,
  1220. DP_MOD_ID_RX_ERR);
  1221. /* If SA is a valid peer in vdev,
  1222. * don't send disconnect
  1223. */
  1224. if (peer) {
  1225. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1226. DP_STATS_INC(soc, rx.err.decrypt_err_drop, 1);
  1227. dp_err_rl("invalid peer frame with correct SA/RA is freed");
  1228. goto free;
  1229. }
  1230. }
  1231. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  1232. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  1233. free:
  1234. /* Drop and free packet */
  1235. curr_nbuf = mpdu;
  1236. while (curr_nbuf) {
  1237. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1238. dp_rx_nbuf_free(curr_nbuf);
  1239. curr_nbuf = next_nbuf;
  1240. }
  1241. /* Reset the head and tail pointers */
  1242. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1243. if (pdev) {
  1244. pdev->invalid_peer_head_msdu = NULL;
  1245. pdev->invalid_peer_tail_msdu = NULL;
  1246. }
  1247. return 0;
  1248. }
  1249. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1250. qdf_nbuf_t mpdu, bool mpdu_done,
  1251. uint8_t mac_id)
  1252. {
  1253. /* Process the nbuf */
  1254. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1255. }
  1256. #endif
  1257. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1258. #ifdef RECEIVE_OFFLOAD
  1259. /**
  1260. * dp_rx_print_offload_info() - Print offload info from RX TLV
  1261. * @soc: dp soc handle
  1262. * @msdu: MSDU for which the offload info is to be printed
  1263. *
  1264. * Return: None
  1265. */
  1266. static void dp_rx_print_offload_info(struct dp_soc *soc,
  1267. qdf_nbuf_t msdu)
  1268. {
  1269. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  1270. dp_verbose_debug("lro_eligible 0x%x",
  1271. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu));
  1272. dp_verbose_debug("pure_ack 0x%x", QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu));
  1273. dp_verbose_debug("chksum 0x%x", QDF_NBUF_CB_RX_TCP_CHKSUM(msdu));
  1274. dp_verbose_debug("TCP seq num 0x%x", QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu));
  1275. dp_verbose_debug("TCP ack num 0x%x", QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu));
  1276. dp_verbose_debug("TCP window 0x%x", QDF_NBUF_CB_RX_TCP_WIN(msdu));
  1277. dp_verbose_debug("TCP protocol 0x%x", QDF_NBUF_CB_RX_TCP_PROTO(msdu));
  1278. dp_verbose_debug("TCP offset 0x%x", QDF_NBUF_CB_RX_TCP_OFFSET(msdu));
  1279. dp_verbose_debug("toeplitz 0x%x", QDF_NBUF_CB_RX_FLOW_ID(msdu));
  1280. dp_verbose_debug("---------------------------------------------------------");
  1281. }
  1282. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1283. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1284. {
  1285. struct hal_offload_info offload_info;
  1286. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  1287. return;
  1288. if (hal_rx_tlv_get_offload_info(soc->hal_soc, rx_tlv, &offload_info))
  1289. return;
  1290. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  1291. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = offload_info.lro_eligible;
  1292. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = offload_info.tcp_pure_ack;
  1293. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  1294. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  1295. rx_tlv);
  1296. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) = offload_info.tcp_seq_num;
  1297. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) = offload_info.tcp_ack_num;
  1298. QDF_NBUF_CB_RX_TCP_WIN(msdu) = offload_info.tcp_win;
  1299. QDF_NBUF_CB_RX_TCP_PROTO(msdu) = offload_info.tcp_proto;
  1300. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = offload_info.ipv6_proto;
  1301. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = offload_info.tcp_offset;
  1302. QDF_NBUF_CB_RX_FLOW_ID(msdu) = offload_info.flow_id;
  1303. dp_rx_print_offload_info(soc, msdu);
  1304. }
  1305. #endif /* RECEIVE_OFFLOAD */
  1306. /**
  1307. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1308. *
  1309. * @soc: DP soc handle
  1310. * @nbuf: pointer to msdu.
  1311. * @mpdu_len: mpdu length
  1312. * @l3_pad_len: L3 padding length by HW
  1313. *
  1314. * Return: returns true if nbuf is last msdu of mpdu else returns false.
  1315. */
  1316. static inline bool dp_rx_adjust_nbuf_len(struct dp_soc *soc,
  1317. qdf_nbuf_t nbuf,
  1318. uint16_t *mpdu_len,
  1319. uint32_t l3_pad_len)
  1320. {
  1321. bool last_nbuf;
  1322. uint32_t pkt_hdr_size;
  1323. pkt_hdr_size = soc->rx_pkt_tlv_size + l3_pad_len;
  1324. if ((*mpdu_len + pkt_hdr_size) > RX_DATA_BUFFER_SIZE) {
  1325. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1326. last_nbuf = false;
  1327. *mpdu_len -= (RX_DATA_BUFFER_SIZE - pkt_hdr_size);
  1328. } else {
  1329. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + pkt_hdr_size));
  1330. last_nbuf = true;
  1331. *mpdu_len = 0;
  1332. }
  1333. return last_nbuf;
  1334. }
  1335. /**
  1336. * dp_get_l3_hdr_pad_len() - get L3 header padding length.
  1337. *
  1338. * @soc: DP soc handle
  1339. * @nbuf: pointer to msdu.
  1340. *
  1341. * Return: returns padding length in bytes.
  1342. */
  1343. static inline uint32_t dp_get_l3_hdr_pad_len(struct dp_soc *soc,
  1344. qdf_nbuf_t nbuf)
  1345. {
  1346. uint32_t l3_hdr_pad = 0;
  1347. uint8_t *rx_tlv_hdr;
  1348. struct hal_rx_msdu_metadata msdu_metadata;
  1349. while (nbuf) {
  1350. if (!qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1351. /* scattered msdu end with continuation is 0 */
  1352. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1353. hal_rx_msdu_metadata_get(soc->hal_soc,
  1354. rx_tlv_hdr,
  1355. &msdu_metadata);
  1356. l3_hdr_pad = msdu_metadata.l3_hdr_pad;
  1357. break;
  1358. }
  1359. nbuf = nbuf->next;
  1360. }
  1361. return l3_hdr_pad;
  1362. }
  1363. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1364. {
  1365. qdf_nbuf_t parent, frag_list, next = NULL;
  1366. uint16_t frag_list_len = 0;
  1367. uint16_t mpdu_len;
  1368. bool last_nbuf;
  1369. uint32_t l3_hdr_pad_offset = 0;
  1370. /*
  1371. * Use msdu len got from REO entry descriptor instead since
  1372. * there is case the RX PKT TLV is corrupted while msdu_len
  1373. * from REO descriptor is right for non-raw RX scatter msdu.
  1374. */
  1375. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1376. /*
  1377. * this is a case where the complete msdu fits in one single nbuf.
  1378. * in this case HW sets both start and end bit and we only need to
  1379. * reset these bits for RAW mode simulator to decap the pkt
  1380. */
  1381. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1382. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1383. qdf_nbuf_set_pktlen(nbuf, mpdu_len + soc->rx_pkt_tlv_size);
  1384. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1385. return nbuf;
  1386. }
  1387. l3_hdr_pad_offset = dp_get_l3_hdr_pad_len(soc, nbuf);
  1388. /*
  1389. * This is a case where we have multiple msdus (A-MSDU) spread across
  1390. * multiple nbufs. here we create a fraglist out of these nbufs.
  1391. *
  1392. * the moment we encounter a nbuf with continuation bit set we
  1393. * know for sure we have an MSDU which is spread across multiple
  1394. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1395. */
  1396. parent = nbuf;
  1397. frag_list = nbuf->next;
  1398. nbuf = nbuf->next;
  1399. /*
  1400. * set the start bit in the first nbuf we encounter with continuation
  1401. * bit set. This has the proper mpdu length set as it is the first
  1402. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1403. * nbufs will form the frag_list of the parent nbuf.
  1404. */
  1405. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1406. /*
  1407. * L3 header padding is only needed for the 1st buffer
  1408. * in a scattered msdu
  1409. */
  1410. last_nbuf = dp_rx_adjust_nbuf_len(soc, parent, &mpdu_len,
  1411. l3_hdr_pad_offset);
  1412. /*
  1413. * MSDU cont bit is set but reported MPDU length can fit
  1414. * in to single buffer
  1415. *
  1416. * Increment error stats and avoid SG list creation
  1417. */
  1418. if (last_nbuf) {
  1419. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1420. qdf_nbuf_pull_head(parent,
  1421. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1422. return parent;
  1423. }
  1424. /*
  1425. * this is where we set the length of the fragments which are
  1426. * associated to the parent nbuf. We iterate through the frag_list
  1427. * till we hit the last_nbuf of the list.
  1428. */
  1429. do {
  1430. last_nbuf = dp_rx_adjust_nbuf_len(soc, nbuf, &mpdu_len, 0);
  1431. qdf_nbuf_pull_head(nbuf,
  1432. soc->rx_pkt_tlv_size);
  1433. frag_list_len += qdf_nbuf_len(nbuf);
  1434. if (last_nbuf) {
  1435. next = nbuf->next;
  1436. nbuf->next = NULL;
  1437. break;
  1438. } else if (qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1439. dp_err("Invalid packet length\n");
  1440. qdf_assert_always(0);
  1441. }
  1442. nbuf = nbuf->next;
  1443. } while (!last_nbuf);
  1444. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1445. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1446. parent->next = next;
  1447. qdf_nbuf_pull_head(parent,
  1448. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1449. return parent;
  1450. }
  1451. #ifdef DP_RX_SG_FRAME_SUPPORT
  1452. bool dp_rx_is_sg_supported(void)
  1453. {
  1454. return true;
  1455. }
  1456. #else
  1457. bool dp_rx_is_sg_supported(void)
  1458. {
  1459. return false;
  1460. }
  1461. #endif
  1462. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1463. #ifdef QCA_PEER_EXT_STATS
  1464. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1465. qdf_nbuf_t nbuf)
  1466. {
  1467. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1468. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1469. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1470. }
  1471. #endif /* QCA_PEER_EXT_STATS */
  1472. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1473. {
  1474. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1475. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1476. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1477. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1478. uint32_t interframe_delay =
  1479. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1480. struct cdp_tid_rx_stats *rstats =
  1481. &vdev->pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1482. dp_update_delay_stats(NULL, rstats, to_stack, tid,
  1483. CDP_DELAY_STATS_REAP_STACK, ring_id, false);
  1484. /*
  1485. * Update interframe delay stats calculated at deliver_data_ol point.
  1486. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1487. * interframe delay will not be calculate correctly for 1st frame.
  1488. * On the other side, this will help in avoiding extra per packet check
  1489. * of vdev->prev_rx_deliver_tstamp.
  1490. */
  1491. dp_update_delay_stats(NULL, rstats, interframe_delay, tid,
  1492. CDP_DELAY_STATS_RX_INTERFRAME, ring_id, false);
  1493. vdev->prev_rx_deliver_tstamp = current_ts;
  1494. }
  1495. /**
  1496. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1497. * @pdev: dp pdev reference
  1498. * @buf_list: buffer list to be dropepd
  1499. *
  1500. * Return: int (number of bufs dropped)
  1501. */
  1502. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1503. qdf_nbuf_t buf_list)
  1504. {
  1505. struct cdp_tid_rx_stats *stats = NULL;
  1506. uint8_t tid = 0, ring_id = 0;
  1507. int num_dropped = 0;
  1508. qdf_nbuf_t buf, next_buf;
  1509. buf = buf_list;
  1510. while (buf) {
  1511. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1512. next_buf = qdf_nbuf_queue_next(buf);
  1513. tid = qdf_nbuf_get_tid_val(buf);
  1514. if (qdf_likely(pdev)) {
  1515. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1516. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1517. stats->delivered_to_stack--;
  1518. }
  1519. dp_rx_nbuf_free(buf);
  1520. buf = next_buf;
  1521. num_dropped++;
  1522. }
  1523. return num_dropped;
  1524. }
  1525. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1526. /**
  1527. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1528. * @soc: core txrx main context
  1529. * @vdev: vdev
  1530. * @txrx_peer: txrx peer
  1531. * @nbuf_head: skb list head
  1532. *
  1533. * Return: true if packet is delivered to netdev per STA.
  1534. */
  1535. static inline bool
  1536. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1537. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1538. {
  1539. /*
  1540. * When extended WDS is disabled, frames are sent to AP netdevice.
  1541. */
  1542. if (qdf_likely(!vdev->wds_ext_enabled))
  1543. return false;
  1544. /*
  1545. * There can be 2 cases:
  1546. * 1. Send frame to parent netdev if its not for netdev per STA
  1547. * 2. If frame is meant for netdev per STA:
  1548. * a. Send frame to appropriate netdev using registered fp.
  1549. * b. If fp is NULL, drop the frames.
  1550. */
  1551. if (!txrx_peer->wds_ext.init)
  1552. return false;
  1553. if (txrx_peer->osif_rx)
  1554. txrx_peer->osif_rx(txrx_peer->wds_ext.osif_peer, nbuf_head);
  1555. else
  1556. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1557. return true;
  1558. }
  1559. #else
  1560. static inline bool
  1561. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1562. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1563. {
  1564. return false;
  1565. }
  1566. #endif
  1567. #ifdef PEER_CACHE_RX_PKTS
  1568. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1569. {
  1570. struct dp_peer_cached_bufq *bufqi;
  1571. struct dp_rx_cached_buf *cache_buf = NULL;
  1572. ol_txrx_rx_fp data_rx = NULL;
  1573. int num_buff_elem;
  1574. QDF_STATUS status;
  1575. /*
  1576. * Flush dp cached frames only for mld peers and legacy peers, as
  1577. * link peers don't store cached frames
  1578. */
  1579. if (IS_MLO_DP_LINK_PEER(peer))
  1580. return;
  1581. if (!peer->txrx_peer) {
  1582. dp_err("txrx_peer NULL!! peer mac_addr("QDF_MAC_ADDR_FMT")",
  1583. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1584. return;
  1585. }
  1586. if (qdf_atomic_inc_return(&peer->txrx_peer->flush_in_progress) > 1) {
  1587. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1588. return;
  1589. }
  1590. qdf_spin_lock_bh(&peer->peer_info_lock);
  1591. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1592. data_rx = peer->vdev->osif_rx;
  1593. else
  1594. drop = true;
  1595. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1596. bufqi = &peer->txrx_peer->bufq_info;
  1597. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1598. qdf_list_remove_front(&bufqi->cached_bufq,
  1599. (qdf_list_node_t **)&cache_buf);
  1600. while (cache_buf) {
  1601. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1602. cache_buf->buf);
  1603. bufqi->entries -= num_buff_elem;
  1604. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1605. if (drop) {
  1606. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1607. cache_buf->buf);
  1608. } else {
  1609. /* Flush the cached frames to OSIF DEV */
  1610. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1611. if (status != QDF_STATUS_SUCCESS)
  1612. bufqi->dropped = dp_rx_drop_nbuf_list(
  1613. peer->vdev->pdev,
  1614. cache_buf->buf);
  1615. }
  1616. qdf_mem_free(cache_buf);
  1617. cache_buf = NULL;
  1618. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1619. qdf_list_remove_front(&bufqi->cached_bufq,
  1620. (qdf_list_node_t **)&cache_buf);
  1621. }
  1622. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1623. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1624. }
  1625. /**
  1626. * dp_rx_enqueue_rx() - cache rx frames
  1627. * @peer: peer
  1628. * @txrx_peer: DP txrx_peer
  1629. * @rx_buf_list: cache buffer list
  1630. *
  1631. * Return: None
  1632. */
  1633. static QDF_STATUS
  1634. dp_rx_enqueue_rx(struct dp_peer *peer,
  1635. struct dp_txrx_peer *txrx_peer,
  1636. qdf_nbuf_t rx_buf_list)
  1637. {
  1638. struct dp_rx_cached_buf *cache_buf;
  1639. struct dp_peer_cached_bufq *bufqi = &txrx_peer->bufq_info;
  1640. int num_buff_elem;
  1641. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  1642. struct dp_soc *soc = txrx_peer->vdev->pdev->soc;
  1643. struct dp_peer *ta_peer = NULL;
  1644. /*
  1645. * If peer id is invalid which likely peer map has not completed,
  1646. * then need caller provide dp_peer pointer, else it's ok to use
  1647. * txrx_peer->peer_id to get dp_peer.
  1648. */
  1649. if (peer) {
  1650. if (QDF_STATUS_SUCCESS ==
  1651. dp_peer_get_ref(soc, peer, DP_MOD_ID_RX))
  1652. ta_peer = peer;
  1653. } else {
  1654. ta_peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1655. DP_MOD_ID_RX);
  1656. }
  1657. if (!ta_peer) {
  1658. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1659. rx_buf_list);
  1660. return QDF_STATUS_E_INVAL;
  1661. }
  1662. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1663. bufqi->dropped);
  1664. if (!ta_peer->valid) {
  1665. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1666. rx_buf_list);
  1667. ret = QDF_STATUS_E_INVAL;
  1668. goto fail;
  1669. }
  1670. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1671. if (bufqi->entries >= bufqi->thresh) {
  1672. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1673. rx_buf_list);
  1674. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1675. ret = QDF_STATUS_E_RESOURCES;
  1676. goto fail;
  1677. }
  1678. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1679. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1680. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1681. if (!cache_buf) {
  1682. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1683. "Failed to allocate buf to cache rx frames");
  1684. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1685. rx_buf_list);
  1686. ret = QDF_STATUS_E_NOMEM;
  1687. goto fail;
  1688. }
  1689. cache_buf->buf = rx_buf_list;
  1690. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1691. qdf_list_insert_back(&bufqi->cached_bufq,
  1692. &cache_buf->node);
  1693. bufqi->entries += num_buff_elem;
  1694. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1695. fail:
  1696. dp_peer_unref_delete(ta_peer, DP_MOD_ID_RX);
  1697. return ret;
  1698. }
  1699. static inline
  1700. bool dp_rx_is_peer_cache_bufq_supported(void)
  1701. {
  1702. return true;
  1703. }
  1704. #else
  1705. static inline
  1706. bool dp_rx_is_peer_cache_bufq_supported(void)
  1707. {
  1708. return false;
  1709. }
  1710. static inline QDF_STATUS
  1711. dp_rx_enqueue_rx(struct dp_peer *peer,
  1712. struct dp_txrx_peer *txrx_peer,
  1713. qdf_nbuf_t rx_buf_list)
  1714. {
  1715. return QDF_STATUS_SUCCESS;
  1716. }
  1717. #endif
  1718. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1719. /**
  1720. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1721. * using the appropriate call back functions.
  1722. * @soc: soc
  1723. * @vdev: vdev
  1724. * @txrx_peer: peer
  1725. * @nbuf_head: skb list head
  1726. *
  1727. * Return: None
  1728. */
  1729. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1730. struct dp_vdev *vdev,
  1731. struct dp_txrx_peer *txrx_peer,
  1732. qdf_nbuf_t nbuf_head)
  1733. {
  1734. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1735. txrx_peer, nbuf_head)))
  1736. return;
  1737. /* Function pointer initialized only when FISA is enabled */
  1738. if (vdev->osif_fisa_rx)
  1739. /* on failure send it via regular path */
  1740. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1741. else
  1742. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1743. }
  1744. #else
  1745. /**
  1746. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1747. * using the appropriate call back functions.
  1748. * @soc: soc
  1749. * @vdev: vdev
  1750. * @txrx_peer: txrx peer
  1751. * @nbuf_head: skb list head
  1752. *
  1753. * Check the return status of the call back function and drop
  1754. * the packets if the return status indicates a failure.
  1755. *
  1756. * Return: None
  1757. */
  1758. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1759. struct dp_vdev *vdev,
  1760. struct dp_txrx_peer *txrx_peer,
  1761. qdf_nbuf_t nbuf_head)
  1762. {
  1763. int num_nbuf = 0;
  1764. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1765. /* Function pointer initialized only when FISA is enabled */
  1766. if (vdev->osif_fisa_rx)
  1767. /* on failure send it via regular path */
  1768. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1769. else if (vdev->osif_rx)
  1770. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1771. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1772. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1773. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1774. if (txrx_peer)
  1775. DP_PEER_STATS_FLAT_DEC(txrx_peer, to_stack.num,
  1776. num_nbuf);
  1777. }
  1778. }
  1779. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1780. /**
  1781. * dp_rx_validate_rx_callbacks() - validate rx callbacks
  1782. * @soc: DP soc
  1783. * @vdev: DP vdev handle
  1784. * @txrx_peer: pointer to the txrx peer object
  1785. * @nbuf_head: skb list head
  1786. *
  1787. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  1788. * QDF_STATUS_E_FAILURE
  1789. */
  1790. static inline QDF_STATUS
  1791. dp_rx_validate_rx_callbacks(struct dp_soc *soc,
  1792. struct dp_vdev *vdev,
  1793. struct dp_txrx_peer *txrx_peer,
  1794. qdf_nbuf_t nbuf_head)
  1795. {
  1796. int num_nbuf;
  1797. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1798. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1799. /*
  1800. * This is a special case where vdev is invalid,
  1801. * so we cannot know the pdev to which this packet
  1802. * belonged. Hence we update the soc rx error stats.
  1803. */
  1804. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1805. return QDF_STATUS_E_FAILURE;
  1806. }
  1807. /*
  1808. * highly unlikely to have a vdev without a registered rx
  1809. * callback function. if so let us free the nbuf_list.
  1810. */
  1811. if (qdf_unlikely(!vdev->osif_rx)) {
  1812. if (txrx_peer && dp_rx_is_peer_cache_bufq_supported()) {
  1813. dp_rx_enqueue_rx(NULL, txrx_peer, nbuf_head);
  1814. } else {
  1815. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1816. nbuf_head);
  1817. DP_PEER_TO_STACK_DECC(txrx_peer, num_nbuf,
  1818. vdev->pdev->enhanced_stats_en);
  1819. }
  1820. return QDF_STATUS_E_FAILURE;
  1821. }
  1822. return QDF_STATUS_SUCCESS;
  1823. }
  1824. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1825. struct dp_vdev *vdev,
  1826. struct dp_txrx_peer *txrx_peer,
  1827. qdf_nbuf_t nbuf_head,
  1828. qdf_nbuf_t nbuf_tail)
  1829. {
  1830. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1831. QDF_STATUS_SUCCESS)
  1832. return QDF_STATUS_E_FAILURE;
  1833. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1834. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1835. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1836. &nbuf_tail);
  1837. }
  1838. dp_rx_check_delivery_to_stack(soc, vdev, txrx_peer, nbuf_head);
  1839. return QDF_STATUS_SUCCESS;
  1840. }
  1841. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1842. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1843. struct dp_vdev *vdev,
  1844. struct dp_txrx_peer *txrx_peer,
  1845. qdf_nbuf_t nbuf_head,
  1846. qdf_nbuf_t nbuf_tail)
  1847. {
  1848. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1849. QDF_STATUS_SUCCESS)
  1850. return QDF_STATUS_E_FAILURE;
  1851. vdev->osif_rx_eapol(vdev->osif_vdev, nbuf_head);
  1852. return QDF_STATUS_SUCCESS;
  1853. }
  1854. #endif
  1855. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1856. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1857. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer) \
  1858. { \
  1859. qdf_nbuf_t nbuf_local; \
  1860. struct dp_txrx_peer *txrx_peer_local; \
  1861. struct dp_vdev *vdev_local = vdev_hdl; \
  1862. do { \
  1863. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1864. break; \
  1865. nbuf_local = nbuf; \
  1866. txrx_peer_local = txrx_peer; \
  1867. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1868. break; \
  1869. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1870. break; \
  1871. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1872. (nbuf_local), \
  1873. (txrx_peer_local), 0, 1); \
  1874. } while (0); \
  1875. }
  1876. #else
  1877. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer)
  1878. #endif
  1879. #ifdef FEATURE_RX_LINKSPEED_ROAM_TRIGGER
  1880. /**
  1881. * dp_rx_rates_stats_update() - update rate stats
  1882. * from rx msdu.
  1883. * @soc: datapath soc handle
  1884. * @nbuf: received msdu buffer
  1885. * @rx_tlv_hdr: rx tlv header
  1886. * @txrx_peer: datapath txrx_peer handle
  1887. * @sgi: Short Guard Interval
  1888. * @mcs: Modulation and Coding Set
  1889. * @nss: Number of Spatial Streams
  1890. * @bw: BandWidth
  1891. * @pkt_type: Corresponds to preamble
  1892. *
  1893. * To be precisely record rates, following factors are considered:
  1894. * Exclude specific frames, ARP, DHCP, ssdp, etc.
  1895. * Make sure to affect rx throughput as least as possible.
  1896. *
  1897. * Return: void
  1898. */
  1899. static void
  1900. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1901. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  1902. uint32_t sgi, uint32_t mcs,
  1903. uint32_t nss, uint32_t bw, uint32_t pkt_type)
  1904. {
  1905. uint32_t rix;
  1906. uint16_t ratecode;
  1907. uint32_t avg_rx_rate;
  1908. uint32_t ratekbps;
  1909. enum cdp_punctured_modes punc_mode = NO_PUNCTURE;
  1910. if (soc->high_throughput ||
  1911. dp_rx_data_is_specific(soc->hal_soc, rx_tlv_hdr, nbuf)) {
  1912. return;
  1913. }
  1914. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.rx_rate, mcs);
  1915. /* In 11b mode, the nss we get from tlv is 0, invalid and should be 1 */
  1916. if (qdf_unlikely(pkt_type == DOT11_B))
  1917. nss = 1;
  1918. /* here pkt_type corresponds to preamble */
  1919. ratekbps = dp_getrateindex(sgi,
  1920. mcs,
  1921. nss - 1,
  1922. pkt_type,
  1923. bw,
  1924. punc_mode,
  1925. &rix,
  1926. &ratecode);
  1927. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.last_rx_rate, ratekbps);
  1928. avg_rx_rate =
  1929. dp_ath_rate_lpf(txrx_peer->stats.extd_stats.rx.avg_rx_rate,
  1930. ratekbps);
  1931. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.avg_rx_rate, avg_rx_rate);
  1932. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.nss_info, nss);
  1933. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.mcs_info, mcs);
  1934. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.bw_info, bw);
  1935. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.gi_info, sgi);
  1936. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.preamble_info, pkt_type);
  1937. }
  1938. #else
  1939. static inline void
  1940. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1941. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  1942. uint32_t sgi, uint32_t mcs,
  1943. uint32_t nss, uint32_t bw, uint32_t pkt_type)
  1944. {
  1945. }
  1946. #endif /* FEATURE_RX_LINKSPEED_ROAM_TRIGGER */
  1947. #ifndef QCA_ENHANCED_STATS_SUPPORT
  1948. /**
  1949. * dp_rx_msdu_extd_stats_update(): Update Rx extended path stats for peer
  1950. *
  1951. * @soc: datapath soc handle
  1952. * @nbuf: received msdu buffer
  1953. * @rx_tlv_hdr: rx tlv header
  1954. * @txrx_peer: datapath txrx_peer handle
  1955. *
  1956. * Return: void
  1957. */
  1958. static inline
  1959. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1960. uint8_t *rx_tlv_hdr,
  1961. struct dp_txrx_peer *txrx_peer)
  1962. {
  1963. bool is_ampdu;
  1964. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1965. uint8_t dst_mcs_idx;
  1966. /*
  1967. * TODO - For KIWI this field is present in ring_desc
  1968. * Try to use ring desc instead of tlv.
  1969. */
  1970. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(soc->hal_soc, rx_tlv_hdr);
  1971. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.ampdu_cnt, 1, is_ampdu);
  1972. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1973. sgi = hal_rx_tlv_sgi_get(soc->hal_soc, rx_tlv_hdr);
  1974. mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  1975. tid = qdf_nbuf_get_tid_val(nbuf);
  1976. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  1977. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1978. rx_tlv_hdr);
  1979. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1980. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  1981. /* do HW to SW pkt type conversion */
  1982. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  1983. hal_2_dp_pkt_type_map[pkt_type]);
  1984. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[mcs], 1,
  1985. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1986. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  1987. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1988. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.bw[bw], 1);
  1989. /*
  1990. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1991. * then increase index [nss - 1] in array counter.
  1992. */
  1993. if (nss > 0 && CDP_IS_PKT_TYPE_SUPPORT_NSS(pkt_type))
  1994. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.nss[nss - 1], 1);
  1995. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.sgi_count[sgi], 1);
  1996. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.mic_err, 1,
  1997. hal_rx_tlv_mic_err_get(soc->hal_soc,
  1998. rx_tlv_hdr));
  1999. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.decrypt_err, 1,
  2000. hal_rx_tlv_decrypt_err_get(soc->hal_soc,
  2001. rx_tlv_hdr));
  2002. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  2003. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.reception_type[reception_type], 1);
  2004. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  2005. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  2006. DP_PEER_EXTD_STATS_INC(txrx_peer,
  2007. rx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  2008. 1);
  2009. dp_rx_rates_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  2010. sgi, mcs, nss, bw, pkt_type);
  2011. }
  2012. #else
  2013. static inline
  2014. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2015. uint8_t *rx_tlv_hdr,
  2016. struct dp_txrx_peer *txrx_peer)
  2017. {
  2018. }
  2019. #endif
  2020. #if defined(DP_PKT_STATS_PER_LMAC) && defined(WLAN_FEATURE_11BE_MLO)
  2021. static inline void
  2022. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2023. qdf_nbuf_t nbuf)
  2024. {
  2025. uint8_t lmac_id = qdf_nbuf_get_lmac_id(nbuf);
  2026. if (qdf_unlikely(lmac_id >= CDP_MAX_LMACS)) {
  2027. dp_err_rl("Invalid lmac_id: %u vdev_id: %u",
  2028. lmac_id, QDF_NBUF_CB_RX_VDEV_ID(nbuf));
  2029. if (qdf_likely(txrx_peer))
  2030. dp_err_rl("peer_id: %u", txrx_peer->peer_id);
  2031. return;
  2032. }
  2033. /* only count stats per lmac for MLO connection*/
  2034. DP_PEER_PER_PKT_STATS_INCC_PKT(txrx_peer, rx.rx_lmac[lmac_id], 1,
  2035. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  2036. txrx_peer->mld_peer);
  2037. }
  2038. #else
  2039. static inline void
  2040. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2041. qdf_nbuf_t nbuf)
  2042. {
  2043. }
  2044. #endif
  2045. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2046. uint8_t *rx_tlv_hdr,
  2047. struct dp_txrx_peer *txrx_peer,
  2048. uint8_t ring_id,
  2049. struct cdp_tid_rx_stats *tid_stats)
  2050. {
  2051. bool is_not_amsdu;
  2052. struct dp_vdev *vdev = txrx_peer->vdev;
  2053. bool enh_flag;
  2054. qdf_ether_header_t *eh;
  2055. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2056. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, txrx_peer);
  2057. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  2058. qdf_nbuf_is_rx_chfrag_end(nbuf);
  2059. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.rcvd_reo[ring_id], 1,
  2060. msdu_len);
  2061. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.non_amsdu_cnt, 1,
  2062. is_not_amsdu);
  2063. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  2064. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.rx_retries, 1,
  2065. qdf_nbuf_is_rx_retry_flag(nbuf));
  2066. dp_peer_update_rx_pkt_per_lmac(txrx_peer, nbuf);
  2067. tid_stats->msdu_cnt++;
  2068. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  2069. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  2070. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2071. enh_flag = vdev->pdev->enhanced_stats_en;
  2072. DP_PEER_MC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag);
  2073. tid_stats->mcast_msdu_cnt++;
  2074. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  2075. DP_PEER_BC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag);
  2076. tid_stats->bcast_msdu_cnt++;
  2077. }
  2078. }
  2079. txrx_peer->stats.per_pkt_stats.rx.last_rx_ts = qdf_system_ticks();
  2080. dp_rx_msdu_extd_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer);
  2081. }
  2082. #ifndef WDS_VENDOR_EXTENSION
  2083. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  2084. struct dp_vdev *vdev,
  2085. struct dp_txrx_peer *txrx_peer)
  2086. {
  2087. return 1;
  2088. }
  2089. #endif
  2090. #ifdef RX_DESC_DEBUG_CHECK
  2091. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  2092. hal_ring_desc_t ring_desc,
  2093. struct dp_rx_desc *rx_desc)
  2094. {
  2095. struct hal_buf_info hbi;
  2096. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2097. /* Sanity check for possible buffer paddr corruption */
  2098. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  2099. return QDF_STATUS_SUCCESS;
  2100. return QDF_STATUS_E_FAILURE;
  2101. }
  2102. /**
  2103. * dp_rx_desc_nbuf_len_sanity_check - Add sanity check to catch Rx buffer
  2104. * out of bound access from H.W
  2105. *
  2106. * @soc: DP soc
  2107. * @pkt_len: Packet length received from H.W
  2108. *
  2109. * Return: NONE
  2110. */
  2111. static inline void
  2112. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc,
  2113. uint32_t pkt_len)
  2114. {
  2115. struct rx_desc_pool *rx_desc_pool;
  2116. rx_desc_pool = &soc->rx_desc_buf[0];
  2117. qdf_assert_always(pkt_len <= rx_desc_pool->buf_size);
  2118. }
  2119. #else
  2120. static inline void
  2121. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc, uint32_t pkt_len) { }
  2122. #endif
  2123. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  2124. #ifdef DP_RX_UDP_OVER_PEER_ROAM
  2125. /**
  2126. * dp_rx_is_udp_allowed_over_roam_peer() - check if udp data received
  2127. * during roaming
  2128. * @vdev: dp_vdev pointer
  2129. * @rx_tlv_hdr: rx tlv header
  2130. * @nbuf: pkt skb pointer
  2131. *
  2132. * This function will check if rx udp data is received from authorised
  2133. * roamed peer before peer map indication is received from FW after
  2134. * roaming. This is needed for VoIP scenarios in which packet loss
  2135. * expected during roaming is minimal.
  2136. *
  2137. * Return: bool
  2138. */
  2139. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2140. uint8_t *rx_tlv_hdr,
  2141. qdf_nbuf_t nbuf)
  2142. {
  2143. char *hdr_desc;
  2144. struct ieee80211_frame *wh = NULL;
  2145. hdr_desc = hal_rx_desc_get_80211_hdr(vdev->pdev->soc->hal_soc,
  2146. rx_tlv_hdr);
  2147. wh = (struct ieee80211_frame *)hdr_desc;
  2148. if (vdev->roaming_peer_status ==
  2149. WLAN_ROAM_PEER_AUTH_STATUS_AUTHENTICATED &&
  2150. !qdf_mem_cmp(vdev->roaming_peer_mac.raw, wh->i_addr2,
  2151. QDF_MAC_ADDR_SIZE) && (qdf_nbuf_is_ipv4_udp_pkt(nbuf) ||
  2152. qdf_nbuf_is_ipv6_udp_pkt(nbuf)))
  2153. return true;
  2154. return false;
  2155. }
  2156. #else
  2157. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2158. uint8_t *rx_tlv_hdr,
  2159. qdf_nbuf_t nbuf)
  2160. {
  2161. return false;
  2162. }
  2163. #endif
  2164. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2165. {
  2166. uint16_t peer_id;
  2167. uint8_t vdev_id;
  2168. struct dp_vdev *vdev = NULL;
  2169. uint32_t l2_hdr_offset = 0;
  2170. uint16_t msdu_len = 0;
  2171. uint32_t pkt_len = 0;
  2172. uint8_t *rx_tlv_hdr;
  2173. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  2174. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  2175. bool is_special_frame = false;
  2176. struct dp_peer *peer = NULL;
  2177. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2178. if (peer_id > soc->max_peer_id)
  2179. goto deliver_fail;
  2180. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2181. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  2182. if (!vdev || vdev->delete.pending)
  2183. goto deliver_fail;
  2184. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  2185. goto deliver_fail;
  2186. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2187. l2_hdr_offset =
  2188. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2189. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2190. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  2191. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2192. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2193. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size + l2_hdr_offset);
  2194. is_special_frame = dp_rx_is_special_frame(nbuf, frame_mask);
  2195. if (qdf_likely(vdev->osif_rx)) {
  2196. if (is_special_frame ||
  2197. dp_rx_is_udp_allowed_over_roam_peer(vdev, rx_tlv_hdr,
  2198. nbuf)) {
  2199. qdf_nbuf_set_exc_frame(nbuf, 1);
  2200. if (QDF_STATUS_SUCCESS !=
  2201. vdev->osif_rx(vdev->osif_vdev, nbuf))
  2202. goto deliver_fail;
  2203. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  2204. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2205. return;
  2206. }
  2207. } else if (is_special_frame) {
  2208. /*
  2209. * If MLO connection, txrx_peer for link peer does not exist,
  2210. * try to store these RX packets to txrx_peer's bufq of MLD
  2211. * peer until vdev->osif_rx is registered from CP and flush
  2212. * them to stack.
  2213. */
  2214. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id,
  2215. DP_MOD_ID_RX);
  2216. if (!peer)
  2217. goto deliver_fail;
  2218. /* only check for MLO connection */
  2219. if (IS_MLO_DP_MLD_PEER(peer) && peer->txrx_peer &&
  2220. dp_rx_is_peer_cache_bufq_supported()) {
  2221. qdf_nbuf_set_exc_frame(nbuf, 1);
  2222. if (QDF_STATUS_SUCCESS ==
  2223. dp_rx_enqueue_rx(peer, peer->txrx_peer, nbuf)) {
  2224. DP_STATS_INC(soc,
  2225. rx.err.pkt_delivered_no_peer,
  2226. 1);
  2227. } else {
  2228. DP_STATS_INC(soc,
  2229. rx.err.rx_invalid_peer.num,
  2230. 1);
  2231. }
  2232. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2233. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2234. return;
  2235. }
  2236. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2237. }
  2238. deliver_fail:
  2239. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2240. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2241. dp_rx_nbuf_free(nbuf);
  2242. if (vdev)
  2243. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2244. }
  2245. #else
  2246. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2247. {
  2248. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2249. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2250. dp_rx_nbuf_free(nbuf);
  2251. }
  2252. #endif
  2253. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  2254. hal_ring_handle_t hal_ring_hdl,
  2255. uint32_t num_entries,
  2256. bool *near_full)
  2257. {
  2258. uint32_t num_pending = 0;
  2259. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  2260. hal_ring_hdl,
  2261. true);
  2262. if (num_entries && (num_pending >= num_entries >> 1))
  2263. *near_full = true;
  2264. else
  2265. *near_full = false;
  2266. return num_pending;
  2267. }
  2268. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2269. #ifdef WLAN_SUPPORT_RX_FISA
  2270. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2271. {
  2272. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  2273. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2274. }
  2275. #else
  2276. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2277. {
  2278. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2279. }
  2280. #endif
  2281. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2282. #ifdef DP_RX_DROP_RAW_FRM
  2283. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  2284. {
  2285. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2286. dp_rx_nbuf_free(nbuf);
  2287. return true;
  2288. }
  2289. return false;
  2290. }
  2291. #endif
  2292. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  2293. void
  2294. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  2295. hal_ring_desc_t ring_desc)
  2296. {
  2297. struct dp_buf_info_record *record;
  2298. struct hal_buf_info hbi;
  2299. uint32_t idx;
  2300. if (qdf_unlikely(!soc->rx_ring_history[ring_num]))
  2301. return;
  2302. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2303. /* buffer_addr_info is the first element of ring_desc */
  2304. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_desc,
  2305. &hbi);
  2306. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  2307. DP_RX_HIST_MAX);
  2308. /* No NULL check needed for record since its an array */
  2309. record = &soc->rx_ring_history[ring_num]->entry[idx];
  2310. record->timestamp = qdf_get_log_timestamp();
  2311. record->hbi.paddr = hbi.paddr;
  2312. record->hbi.sw_cookie = hbi.sw_cookie;
  2313. record->hbi.rbm = hbi.rbm;
  2314. }
  2315. #endif
  2316. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  2317. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2318. {
  2319. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  2320. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2321. }
  2322. #endif
  2323. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  2324. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  2325. uint16_t peer_id, uint32_t is_offload,
  2326. qdf_nbuf_t netbuf)
  2327. {
  2328. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2329. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA, soc, netbuf,
  2330. peer_id, is_offload, pdev->pdev_id);
  2331. }
  2332. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2333. uint32_t is_offload)
  2334. {
  2335. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2336. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA_NO_PEER,
  2337. soc, nbuf, HTT_INVALID_VDEV,
  2338. is_offload, 0);
  2339. }
  2340. #endif
  2341. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2342. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2343. {
  2344. QDF_STATUS ret;
  2345. if (vdev->osif_rx_flush) {
  2346. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2347. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2348. dp_err("Failed to flush rx pkts for vdev %d\n",
  2349. vdev->vdev_id);
  2350. return ret;
  2351. }
  2352. }
  2353. return QDF_STATUS_SUCCESS;
  2354. }
  2355. static QDF_STATUS
  2356. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2357. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2358. struct dp_pdev *dp_pdev,
  2359. struct rx_desc_pool *rx_desc_pool)
  2360. {
  2361. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2362. (nbuf_frag_info_t->virt_addr).nbuf =
  2363. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2364. RX_BUFFER_RESERVATION,
  2365. rx_desc_pool->buf_alignment, FALSE);
  2366. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2367. dp_err("nbuf alloc failed");
  2368. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2369. return ret;
  2370. }
  2371. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2372. (nbuf_frag_info_t->virt_addr).nbuf,
  2373. QDF_DMA_FROM_DEVICE,
  2374. rx_desc_pool->buf_size);
  2375. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2376. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2377. dp_err("nbuf map failed");
  2378. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2379. return ret;
  2380. }
  2381. nbuf_frag_info_t->paddr =
  2382. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2383. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2384. &nbuf_frag_info_t->paddr,
  2385. rx_desc_pool);
  2386. if (ret == QDF_STATUS_E_FAILURE) {
  2387. dp_err("nbuf check x86 failed");
  2388. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2389. return ret;
  2390. }
  2391. return QDF_STATUS_SUCCESS;
  2392. }
  2393. QDF_STATUS
  2394. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2395. struct dp_srng *dp_rxdma_srng,
  2396. struct rx_desc_pool *rx_desc_pool,
  2397. uint32_t num_req_buffers)
  2398. {
  2399. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2400. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2401. union dp_rx_desc_list_elem_t *next;
  2402. void *rxdma_ring_entry;
  2403. qdf_dma_addr_t paddr;
  2404. struct dp_rx_nbuf_frag_info *nf_info;
  2405. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2406. uint32_t buffer_index, nbuf_ptrs_per_page;
  2407. qdf_nbuf_t nbuf;
  2408. QDF_STATUS ret;
  2409. int page_idx, total_pages;
  2410. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2411. union dp_rx_desc_list_elem_t *tail = NULL;
  2412. int sync_hw_ptr = 1;
  2413. uint32_t num_entries_avail;
  2414. if (qdf_unlikely(!dp_pdev)) {
  2415. dp_rx_err("%pK: pdev is null for mac_id = %d",
  2416. dp_soc, mac_id);
  2417. return QDF_STATUS_E_FAILURE;
  2418. }
  2419. if (qdf_unlikely(!rxdma_srng)) {
  2420. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2421. return QDF_STATUS_E_FAILURE;
  2422. }
  2423. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2424. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2425. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2426. rxdma_srng,
  2427. sync_hw_ptr);
  2428. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2429. if (!num_entries_avail) {
  2430. dp_err("Num of available entries is zero, nothing to do");
  2431. return QDF_STATUS_E_NOMEM;
  2432. }
  2433. if (num_entries_avail < num_req_buffers)
  2434. num_req_buffers = num_entries_avail;
  2435. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2436. num_req_buffers, &desc_list, &tail);
  2437. if (!nr_descs) {
  2438. dp_err("no free rx_descs in freelist");
  2439. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2440. return QDF_STATUS_E_NOMEM;
  2441. }
  2442. dp_debug("got %u RX descs for driver attach", nr_descs);
  2443. /*
  2444. * Try to allocate pointers to the nbuf one page at a time.
  2445. * Take pointers that can fit in one page of memory and
  2446. * iterate through the total descriptors that need to be
  2447. * allocated in order of pages. Reuse the pointers that
  2448. * have been allocated to fit in one page across each
  2449. * iteration to index into the nbuf.
  2450. */
  2451. total_pages = (nr_descs * sizeof(*nf_info)) / DP_BLOCKMEM_SIZE;
  2452. /*
  2453. * Add an extra page to store the remainder if any
  2454. */
  2455. if ((nr_descs * sizeof(*nf_info)) % DP_BLOCKMEM_SIZE)
  2456. total_pages++;
  2457. nf_info = qdf_mem_malloc(DP_BLOCKMEM_SIZE);
  2458. if (!nf_info) {
  2459. dp_err("failed to allocate nbuf array");
  2460. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2461. QDF_BUG(0);
  2462. return QDF_STATUS_E_NOMEM;
  2463. }
  2464. nbuf_ptrs_per_page = DP_BLOCKMEM_SIZE / sizeof(*nf_info);
  2465. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2466. qdf_mem_zero(nf_info, DP_BLOCKMEM_SIZE);
  2467. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2468. /*
  2469. * The last page of buffer pointers may not be required
  2470. * completely based on the number of descriptors. Below
  2471. * check will ensure we are allocating only the
  2472. * required number of descriptors.
  2473. */
  2474. if (nr_nbuf_total >= nr_descs)
  2475. break;
  2476. /* Flag is set while pdev rx_desc_pool initialization */
  2477. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2478. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2479. &nf_info[nr_nbuf], dp_pdev,
  2480. rx_desc_pool);
  2481. else
  2482. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2483. &nf_info[nr_nbuf], dp_pdev,
  2484. rx_desc_pool);
  2485. if (QDF_IS_STATUS_ERROR(ret))
  2486. break;
  2487. nr_nbuf_total++;
  2488. }
  2489. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2490. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2491. rxdma_ring_entry =
  2492. hal_srng_src_get_next(dp_soc->hal_soc,
  2493. rxdma_srng);
  2494. qdf_assert_always(rxdma_ring_entry);
  2495. next = desc_list->next;
  2496. paddr = nf_info[buffer_index].paddr;
  2497. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2498. /* Flag is set while pdev rx_desc_pool initialization */
  2499. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2500. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2501. &nf_info[buffer_index]);
  2502. else
  2503. dp_rx_desc_prep(&desc_list->rx_desc,
  2504. &nf_info[buffer_index]);
  2505. desc_list->rx_desc.in_use = 1;
  2506. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2507. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2508. __func__,
  2509. RX_DESC_REPLENISHED);
  2510. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc ,rxdma_ring_entry, paddr,
  2511. desc_list->rx_desc.cookie,
  2512. rx_desc_pool->owner);
  2513. dp_ipa_handle_rx_buf_smmu_mapping(
  2514. dp_soc, nbuf,
  2515. rx_desc_pool->buf_size, true,
  2516. __func__, __LINE__);
  2517. dp_audio_smmu_map(dp_soc->osdev,
  2518. qdf_mem_paddr_from_dmaaddr(dp_soc->osdev,
  2519. QDF_NBUF_CB_PADDR(nbuf)),
  2520. QDF_NBUF_CB_PADDR(nbuf),
  2521. rx_desc_pool->buf_size);
  2522. desc_list = next;
  2523. }
  2524. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id,
  2525. rxdma_srng, nr_nbuf, nr_nbuf);
  2526. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2527. }
  2528. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2529. qdf_mem_free(nf_info);
  2530. if (!nr_nbuf_total) {
  2531. dp_err("No nbuf's allocated");
  2532. QDF_BUG(0);
  2533. return QDF_STATUS_E_RESOURCES;
  2534. }
  2535. /* No need to count the number of bytes received during replenish.
  2536. * Therefore set replenish.pkts.bytes as 0.
  2537. */
  2538. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2539. return QDF_STATUS_SUCCESS;
  2540. }
  2541. qdf_export_symbol(dp_pdev_rx_buffers_attach);
  2542. #ifdef DP_RX_MON_MEM_FRAG
  2543. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2544. bool is_mon_dest_desc)
  2545. {
  2546. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2547. if (is_mon_dest_desc)
  2548. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2549. }
  2550. #else
  2551. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2552. bool is_mon_dest_desc)
  2553. {
  2554. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2555. if (is_mon_dest_desc)
  2556. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2557. }
  2558. #endif
  2559. qdf_export_symbol(dp_rx_enable_mon_dest_frag);
  2560. QDF_STATUS
  2561. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2562. {
  2563. struct dp_soc *soc = pdev->soc;
  2564. uint32_t rxdma_entries;
  2565. uint32_t rx_sw_desc_num;
  2566. struct dp_srng *dp_rxdma_srng;
  2567. struct rx_desc_pool *rx_desc_pool;
  2568. uint32_t status = QDF_STATUS_SUCCESS;
  2569. int mac_for_pdev;
  2570. mac_for_pdev = pdev->lmac_id;
  2571. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2572. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2573. soc, mac_for_pdev);
  2574. return status;
  2575. }
  2576. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2577. rxdma_entries = dp_rxdma_srng->num_entries;
  2578. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2579. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2580. rx_desc_pool->desc_type = DP_RX_DESC_BUF_TYPE;
  2581. status = dp_rx_desc_pool_alloc(soc,
  2582. rx_sw_desc_num,
  2583. rx_desc_pool);
  2584. if (status != QDF_STATUS_SUCCESS)
  2585. return status;
  2586. return status;
  2587. }
  2588. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2589. {
  2590. int mac_for_pdev = pdev->lmac_id;
  2591. struct dp_soc *soc = pdev->soc;
  2592. struct rx_desc_pool *rx_desc_pool;
  2593. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2594. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2595. }
  2596. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2597. {
  2598. int mac_for_pdev = pdev->lmac_id;
  2599. struct dp_soc *soc = pdev->soc;
  2600. uint32_t rxdma_entries;
  2601. uint32_t rx_sw_desc_num;
  2602. struct dp_srng *dp_rxdma_srng;
  2603. struct rx_desc_pool *rx_desc_pool;
  2604. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2605. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2606. /*
  2607. * If NSS is enabled, rx_desc_pool is already filled.
  2608. * Hence, just disable desc_pool frag flag.
  2609. */
  2610. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2611. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2612. soc, mac_for_pdev);
  2613. return QDF_STATUS_SUCCESS;
  2614. }
  2615. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2616. return QDF_STATUS_E_NOMEM;
  2617. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2618. rxdma_entries = dp_rxdma_srng->num_entries;
  2619. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2620. rx_sw_desc_num =
  2621. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2622. rx_desc_pool->owner = dp_rx_get_rx_bm_id(soc);
  2623. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2624. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2625. /* Disable monitor dest processing via frag */
  2626. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2627. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2628. rx_sw_desc_num, rx_desc_pool);
  2629. return QDF_STATUS_SUCCESS;
  2630. }
  2631. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2632. {
  2633. int mac_for_pdev = pdev->lmac_id;
  2634. struct dp_soc *soc = pdev->soc;
  2635. struct rx_desc_pool *rx_desc_pool;
  2636. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2637. dp_rx_desc_pool_deinit(soc, rx_desc_pool, mac_for_pdev);
  2638. }
  2639. QDF_STATUS
  2640. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2641. {
  2642. int mac_for_pdev = pdev->lmac_id;
  2643. struct dp_soc *soc = pdev->soc;
  2644. struct dp_srng *dp_rxdma_srng;
  2645. struct rx_desc_pool *rx_desc_pool;
  2646. uint32_t rxdma_entries;
  2647. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2648. rxdma_entries = dp_rxdma_srng->num_entries;
  2649. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2650. /* Initialize RX buffer pool which will be
  2651. * used during low memory conditions
  2652. */
  2653. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2654. return dp_pdev_rx_buffers_attach_simple(soc, mac_for_pdev,
  2655. dp_rxdma_srng,
  2656. rx_desc_pool,
  2657. rxdma_entries - 1);
  2658. }
  2659. void
  2660. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2661. {
  2662. int mac_for_pdev = pdev->lmac_id;
  2663. struct dp_soc *soc = pdev->soc;
  2664. struct rx_desc_pool *rx_desc_pool;
  2665. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2666. dp_rx_desc_nbuf_free(soc, rx_desc_pool, false);
  2667. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2668. }
  2669. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2670. bool dp_rx_deliver_special_frame(struct dp_soc *soc,
  2671. struct dp_txrx_peer *txrx_peer,
  2672. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2673. uint8_t *rx_tlv_hdr)
  2674. {
  2675. uint32_t l2_hdr_offset = 0;
  2676. uint16_t msdu_len = 0;
  2677. uint32_t skip_len;
  2678. l2_hdr_offset =
  2679. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2680. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2681. skip_len = l2_hdr_offset;
  2682. } else {
  2683. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2684. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  2685. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2686. }
  2687. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2688. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2689. qdf_nbuf_pull_head(nbuf, skip_len);
  2690. if (txrx_peer->vdev) {
  2691. dp_rx_send_pktlog(soc, txrx_peer->vdev->pdev, nbuf,
  2692. QDF_TX_RX_STATUS_OK);
  2693. }
  2694. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2695. dp_info("special frame, mpdu sn 0x%x",
  2696. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  2697. qdf_nbuf_set_exc_frame(nbuf, 1);
  2698. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer,
  2699. nbuf, NULL);
  2700. return true;
  2701. }
  2702. return false;
  2703. }
  2704. #endif
  2705. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  2706. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  2707. uint8_t *rx_tlv,
  2708. qdf_nbuf_t nbuf)
  2709. {
  2710. struct dp_soc *soc;
  2711. if (!pdev->is_first_wakeup_packet)
  2712. return;
  2713. soc = pdev->soc;
  2714. if (hal_get_first_wow_wakeup_packet(soc->hal_soc, rx_tlv)) {
  2715. qdf_nbuf_mark_wakeup_frame(nbuf);
  2716. dp_info("First packet after WOW Wakeup rcvd");
  2717. }
  2718. }
  2719. #endif