dp_rx_err.c 30 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "dp_internal.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef CONFIG_MCL
  26. #include <cds_ieee80211_common.h>
  27. #else
  28. #include <ieee80211.h>
  29. #endif
  30. #include "dp_rx_defrag.h"
  31. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  32. #ifdef RX_DESC_DEBUG_CHECK
  33. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  34. {
  35. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC)) {
  36. return false;
  37. }
  38. rx_desc->magic = 0;
  39. return true;
  40. }
  41. #else
  42. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  43. {
  44. return true;
  45. }
  46. #endif
  47. /**
  48. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  49. *
  50. * @soc: core txrx main context
  51. * @ring_desc: opaque pointer to the REO error ring descriptor
  52. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  53. * @head: head of the local descriptor free-list
  54. * @tail: tail of the local descriptor free-list
  55. * @quota: No. of units (packets) that can be serviced in one shot.
  56. *
  57. * This function is used to drop all MSDU in an MPDU
  58. *
  59. * Return: uint32_t: No. of elements processed
  60. */
  61. static uint32_t dp_rx_msdus_drop(struct dp_soc *soc, void *ring_desc,
  62. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  63. union dp_rx_desc_list_elem_t **head,
  64. union dp_rx_desc_list_elem_t **tail,
  65. uint32_t quota)
  66. {
  67. uint32_t rx_bufs_used = 0;
  68. void *link_desc_va;
  69. struct hal_buf_info buf_info;
  70. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  71. int i;
  72. uint8_t *rx_tlv_hdr;
  73. uint32_t tid;
  74. hal_rx_reo_buf_paddr_get(ring_desc, &buf_info);
  75. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  76. /* No UNMAP required -- this is "malloc_consistent" memory */
  77. hal_rx_msdu_list_get(link_desc_va, &msdu_list,
  78. &mpdu_desc_info->msdu_count);
  79. for (i = 0; (i < mpdu_desc_info->msdu_count) && quota--; i++) {
  80. struct dp_rx_desc *rx_desc =
  81. dp_rx_cookie_2_va_rxdma_buf(soc,
  82. msdu_list.sw_cookie[i]);
  83. qdf_assert(rx_desc);
  84. if (!dp_rx_desc_check_magic(rx_desc)) {
  85. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  86. FL("Invalid rx_desc cookie=%d"),
  87. msdu_list.sw_cookie[i]);
  88. return rx_bufs_used;
  89. }
  90. rx_bufs_used++;
  91. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  92. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  93. "Packet received with PN error for tid :%d", tid);
  94. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  95. if (hal_rx_encryption_info_valid(rx_tlv_hdr))
  96. hal_rx_print_pn(rx_tlv_hdr);
  97. /* Just free the buffers */
  98. qdf_nbuf_free(rx_desc->nbuf);
  99. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  100. }
  101. return rx_bufs_used;
  102. }
  103. /**
  104. * dp_rx_pn_error_handle() - Handles PN check errors
  105. *
  106. * @soc: core txrx main context
  107. * @ring_desc: opaque pointer to the REO error ring descriptor
  108. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  109. * @head: head of the local descriptor free-list
  110. * @tail: tail of the local descriptor free-list
  111. * @quota: No. of units (packets) that can be serviced in one shot.
  112. *
  113. * This function implements PN error handling
  114. * If the peer is configured to ignore the PN check errors
  115. * or if DP feels, that this frame is still OK, the frame can be
  116. * re-injected back to REO to use some of the other features
  117. * of REO e.g. duplicate detection/routing to other cores
  118. *
  119. * Return: uint32_t: No. of elements processed
  120. */
  121. static uint32_t
  122. dp_rx_pn_error_handle(struct dp_soc *soc, void *ring_desc,
  123. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  124. union dp_rx_desc_list_elem_t **head,
  125. union dp_rx_desc_list_elem_t **tail,
  126. uint32_t quota)
  127. {
  128. uint16_t peer_id;
  129. uint32_t rx_bufs_used = 0;
  130. struct dp_peer *peer;
  131. bool peer_pn_policy = false;
  132. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  133. mpdu_desc_info->peer_meta_data);
  134. peer = dp_peer_find_by_id(soc, peer_id);
  135. if (qdf_likely(peer)) {
  136. /*
  137. * TODO: Check for peer specific policies & set peer_pn_policy
  138. */
  139. }
  140. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  141. "Packet received with PN error");
  142. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  143. "discard rx due to PN error for peer %p "
  144. "(%02x:%02x:%02x:%02x:%02x:%02x)\n",
  145. peer,
  146. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  147. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  148. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  149. /* No peer PN policy -- definitely drop */
  150. if (!peer_pn_policy)
  151. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  152. mpdu_desc_info,
  153. head, tail, quota);
  154. return rx_bufs_used;
  155. }
  156. /**
  157. * dp_rx_2k_jump_handle() - Handles Sequence Number Jump by 2K
  158. *
  159. * @soc: core txrx main context
  160. * @ring_desc: opaque pointer to the REO error ring descriptor
  161. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  162. * @head: head of the local descriptor free-list
  163. * @tail: tail of the local descriptor free-list
  164. * @quota: No. of units (packets) that can be serviced in one shot.
  165. *
  166. * This function implements the error handling when sequence number
  167. * of the MPDU jumps suddenly by 2K.Today there are 2 cases that
  168. * need to be handled:
  169. * A) CSN (Current Sequence Number) = Last Valid SN (LSN) + 2K
  170. * B) CSN = LSN + 2K, but falls within a "BA sized window" of the SSN
  171. * For case A) the protocol stack is invoked to generate DELBA/DEAUTH frame
  172. * For case B), the frame is normally dropped, no more action is taken
  173. *
  174. * Return: uint32_t: No. of elements processed
  175. */
  176. static uint32_t
  177. dp_rx_2k_jump_handle(struct dp_soc *soc, void *ring_desc,
  178. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  179. union dp_rx_desc_list_elem_t **head,
  180. union dp_rx_desc_list_elem_t **tail,
  181. uint32_t quota)
  182. {
  183. return dp_rx_msdus_drop(soc, ring_desc, mpdu_desc_info,
  184. head, tail, quota);
  185. }
  186. static bool
  187. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf,
  188. struct dp_rx_desc *rx_desc, uint8_t mac_id)
  189. {
  190. bool mpdu_done = false;
  191. /* TODO: Currently only single radio is supported, hence
  192. * pdev hard coded to '0' index
  193. */
  194. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  195. if (hal_rx_msdu_end_first_msdu_get(rx_desc->rx_buf_start)) {
  196. qdf_nbuf_set_chfrag_start(rx_desc->nbuf, 1);
  197. dp_pdev->invalid_peer_head_msdu = NULL;
  198. dp_pdev->invalid_peer_tail_msdu = NULL;
  199. hal_rx_mon_hw_desc_get_mpdu_status(rx_desc->rx_buf_start,
  200. &(dp_pdev->ppdu_info.rx_status));
  201. }
  202. if (hal_rx_msdu_end_last_msdu_get(rx_desc->rx_buf_start)) {
  203. qdf_nbuf_set_chfrag_end(rx_desc->nbuf, 1);
  204. mpdu_done = true;
  205. }
  206. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  207. dp_pdev->invalid_peer_tail_msdu,
  208. nbuf);
  209. return mpdu_done;
  210. }
  211. /**
  212. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  213. * descriptor violation on either a
  214. * REO or WBM ring
  215. *
  216. * @soc: core DP main context
  217. * @rx_desc : pointer to the sw rx descriptor
  218. * @head: pointer to head of rx descriptors to be added to free list
  219. * @tail: pointer to tail of rx descriptors to be added to free list
  220. * quota: upper limit of descriptors that can be reaped
  221. *
  222. * This function handles NULL queue descriptor violations arising out
  223. * a missing REO queue for a given peer or a given TID. This typically
  224. * may happen if a packet is received on a QOS enabled TID before the
  225. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  226. * it may also happen for MC/BC frames if they are not routed to the
  227. * non-QOS TID queue, in the absence of any other default TID queue.
  228. * This error can show up both in a REO destination or WBM release ring.
  229. *
  230. * Return: uint32_t: No. of Rx buffers reaped
  231. */
  232. static uint32_t
  233. dp_rx_null_q_desc_handle(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  234. union dp_rx_desc_list_elem_t **head,
  235. union dp_rx_desc_list_elem_t **tail,
  236. uint32_t quota)
  237. {
  238. uint32_t rx_bufs_used = 0;
  239. uint32_t pkt_len, l2_hdr_offset;
  240. uint16_t msdu_len;
  241. qdf_nbuf_t nbuf;
  242. struct dp_vdev *vdev;
  243. uint16_t peer_id = 0xFFFF;
  244. struct dp_peer *peer = NULL;
  245. uint32_t sgi, rate_mcs, tid;
  246. struct dp_ast_entry *ase;
  247. uint16_t sa_idx;
  248. uint8_t *data;
  249. uint8_t pool_id;
  250. rx_bufs_used++;
  251. nbuf = rx_desc->nbuf;
  252. qdf_nbuf_unmap_single(soc->osdev, nbuf,
  253. QDF_DMA_BIDIRECTIONAL);
  254. rx_desc->rx_buf_start = qdf_nbuf_data(nbuf);
  255. pool_id = rx_desc->pool_id;
  256. l2_hdr_offset =
  257. hal_rx_msdu_end_l3_hdr_padding_get(rx_desc->rx_buf_start);
  258. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_desc->rx_buf_start);
  259. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  260. /* Set length in nbuf */
  261. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  262. /*
  263. * Check if DMA completed -- msdu_done is the last bit
  264. * to be written
  265. */
  266. if (!hal_rx_attn_msdu_done_get(rx_desc->rx_buf_start)) {
  267. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  268. FL("MSDU DONE failure"));
  269. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  270. QDF_TRACE_LEVEL_INFO);
  271. qdf_assert(0);
  272. }
  273. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_desc->rx_buf_start);
  274. peer = dp_peer_find_by_id(soc, peer_id);
  275. if (!peer) {
  276. bool mpdu_done = false;
  277. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  278. FL("peer is NULL"));
  279. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_desc, pool_id);
  280. if (mpdu_done)
  281. dp_rx_process_invalid_peer(soc, nbuf);
  282. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  283. return rx_bufs_used;
  284. }
  285. vdev = peer->vdev;
  286. if (!vdev) {
  287. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  288. FL("INVALID vdev %p OR osif_rx"), vdev);
  289. /* Drop & free packet */
  290. qdf_nbuf_free(nbuf);
  291. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  292. goto fail;
  293. }
  294. sgi = hal_rx_msdu_start_sgi_get(rx_desc->rx_buf_start);
  295. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_desc->rx_buf_start);
  296. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  297. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  298. "%s: %d, SGI: %d, rate_mcs: %d, tid: %d",
  299. __func__, __LINE__, sgi, rate_mcs, tid);
  300. /*
  301. * Advance the packet start pointer by total size of
  302. * pre-header TLV's
  303. */
  304. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  305. /*
  306. * This is a Multicast echo check, drop the pkt if we meet
  307. * the Multicast Echo Check condition
  308. */
  309. data = qdf_nbuf_data(nbuf);
  310. qdf_spin_lock_bh(&soc->ast_lock);
  311. if (hal_rx_msdu_end_sa_is_valid_get(rx_desc->rx_buf_start)) {
  312. sa_idx = hal_rx_msdu_end_sa_idx_get(rx_desc->rx_buf_start);
  313. if ((sa_idx < 0) || (sa_idx > (WLAN_UMAC_PSOC_MAX_PEERS * 2))) {
  314. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  315. "invalid sa_idx: %d", sa_idx);
  316. qdf_assert_always(0);
  317. }
  318. ase = soc->ast_table[sa_idx];
  319. } else
  320. ase = dp_peer_ast_hash_find(soc, &data[DP_MAC_ADDR_LEN], 0);
  321. if (ase) {
  322. if ((ase->type == CDP_TXRX_AST_TYPE_MEC) ||
  323. (ase->peer != peer)) {
  324. qdf_spin_unlock_bh(&soc->ast_lock);
  325. QDF_TRACE(QDF_MODULE_ID_DP,
  326. QDF_TRACE_LEVEL_INFO,
  327. "received pkt with same src mac %pM",
  328. &data[DP_MAC_ADDR_LEN]);
  329. qdf_nbuf_free(nbuf);
  330. goto fail;
  331. }
  332. }
  333. qdf_spin_unlock_bh(&soc->ast_lock);
  334. /* WDS Source Port Learning */
  335. if (qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))
  336. dp_rx_wds_srcport_learn(soc, rx_desc->rx_buf_start, peer, nbuf);
  337. if (hal_rx_mpdu_start_mpdu_qos_control_valid_get(
  338. rx_desc->rx_buf_start)) {
  339. /* TODO: Assuming that qos_control_valid also indicates
  340. * unicast. Should we check this?
  341. */
  342. if (peer &&
  343. peer->rx_tid[tid].hw_qdesc_vaddr_unaligned == NULL) {
  344. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  345. dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
  346. }
  347. }
  348. #ifdef QCA_WIFI_NAPIER_EMULATION /* Debug code, remove later */
  349. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  350. "%s: p_id %d msdu_len %d hdr_off %d",
  351. __func__, peer_id, msdu_len, l2_hdr_offset);
  352. print_hex_dump(KERN_ERR,
  353. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  354. qdf_nbuf_data(nbuf), 128, false);
  355. #endif /* NAPIER_EMULATION */
  356. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  357. qdf_nbuf_set_next(nbuf, NULL);
  358. dp_rx_deliver_raw(vdev, nbuf, peer);
  359. } else {
  360. if (qdf_unlikely(peer->bss_peer)) {
  361. QDF_TRACE(QDF_MODULE_ID_DP,
  362. QDF_TRACE_LEVEL_INFO,
  363. FL("received pkt with same src MAC"));
  364. /* Drop & free packet */
  365. qdf_nbuf_free(nbuf);
  366. goto fail;
  367. }
  368. if (vdev->osif_rx) {
  369. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  370. FL("vdev %p osif_rx %p"), vdev,
  371. vdev->osif_rx);
  372. qdf_nbuf_set_next(nbuf, NULL);
  373. vdev->osif_rx(vdev->osif_vdev, nbuf);
  374. DP_STATS_INC(vdev->pdev, rx.to_stack.num, 1);
  375. } else {
  376. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  377. FL("INVALID vdev %p OR osif_rx"), vdev);
  378. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  379. }
  380. }
  381. fail:
  382. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  383. return rx_bufs_used;
  384. }
  385. /**
  386. * dp_rx_err_deliver() - Function to deliver error frames to OS
  387. *
  388. * @soc: core DP main context
  389. * @rx_desc : pointer to the sw rx descriptor
  390. * @head: pointer to head of rx descriptors to be added to free list
  391. * @tail: pointer to tail of rx descriptors to be added to free list
  392. * quota: upper limit of descriptors that can be reaped
  393. *
  394. * Return: uint32_t: No. of Rx buffers reaped
  395. */
  396. static uint32_t
  397. dp_rx_err_deliver(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  398. union dp_rx_desc_list_elem_t **head,
  399. union dp_rx_desc_list_elem_t **tail,
  400. uint32_t quota)
  401. {
  402. uint32_t rx_bufs_used = 0;
  403. uint32_t pkt_len, l2_hdr_offset;
  404. uint16_t msdu_len;
  405. qdf_nbuf_t nbuf;
  406. struct dp_vdev *vdev;
  407. uint16_t peer_id = 0xFFFF;
  408. struct dp_peer *peer = NULL;
  409. rx_bufs_used++;
  410. nbuf = rx_desc->nbuf;
  411. qdf_nbuf_unmap_single(soc->osdev, nbuf,
  412. QDF_DMA_BIDIRECTIONAL);
  413. rx_desc->rx_buf_start = qdf_nbuf_data(nbuf);
  414. /*
  415. * Check if DMA completed -- msdu_done is the last bit
  416. * to be written
  417. */
  418. if (!hal_rx_attn_msdu_done_get(rx_desc->rx_buf_start)) {
  419. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  420. FL("MSDU DONE failure"));
  421. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  422. QDF_TRACE_LEVEL_INFO);
  423. qdf_assert(0);
  424. }
  425. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_desc->rx_buf_start);
  426. peer = dp_peer_find_by_id(soc, peer_id);
  427. if (!peer) {
  428. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  429. FL("peer is NULL"));
  430. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  431. qdf_nbuf_len(nbuf));
  432. /* Drop & free packet */
  433. qdf_nbuf_free(nbuf);
  434. goto fail;
  435. }
  436. vdev = peer->vdev;
  437. if (!vdev) {
  438. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  439. FL("INVALID vdev %p OR osif_rx"), vdev);
  440. /* Drop & free packet */
  441. qdf_nbuf_free(nbuf);
  442. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  443. goto fail;
  444. }
  445. /* Drop & free packet if mesh mode not enabled */
  446. if (!vdev->mesh_vdev) {
  447. qdf_nbuf_free(nbuf);
  448. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  449. goto fail;
  450. }
  451. l2_hdr_offset =
  452. hal_rx_msdu_end_l3_hdr_padding_get(rx_desc->rx_buf_start);
  453. msdu_len =
  454. hal_rx_msdu_start_msdu_len_get(rx_desc->rx_buf_start);
  455. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  456. /* Set length in nbuf */
  457. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  458. qdf_nbuf_set_next(nbuf, NULL);
  459. /*
  460. * Advance the packet start pointer by total size of
  461. * pre-header TLV's
  462. */
  463. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  464. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  465. dp_rx_deliver_raw(vdev, nbuf, peer);
  466. } else {
  467. DP_STATS_INC(vdev->pdev, rx.to_stack.num, 1);
  468. vdev->osif_rx(vdev->osif_vdev, nbuf);
  469. }
  470. fail:
  471. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  472. return rx_bufs_used;
  473. }
  474. /**
  475. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  476. * (WBM), following error handling
  477. *
  478. * @soc: core DP main context
  479. * @ring_desc: opaque pointer to the REO error ring descriptor
  480. *
  481. * Return: QDF_STATUS
  482. */
  483. static QDF_STATUS
  484. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc)
  485. {
  486. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  487. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  488. void *wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  489. void *hal_soc = soc->hal_soc;
  490. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  491. void *src_srng_desc;
  492. if (!wbm_rel_srng) {
  493. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  494. "WBM RELEASE RING not initialized");
  495. return status;
  496. }
  497. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  498. /* TODO */
  499. /*
  500. * Need API to convert from hal_ring pointer to
  501. * Ring Type / Ring Id combo
  502. */
  503. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  504. FL("HAL RING Access For WBM Release SRNG Failed - %p"),
  505. wbm_rel_srng);
  506. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  507. goto done;
  508. }
  509. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  510. if (qdf_likely(src_srng_desc)) {
  511. /* Return link descriptor through WBM ring (SW2WBM)*/
  512. hal_rx_msdu_link_desc_set(hal_soc,
  513. src_srng_desc, buf_addr_info);
  514. status = QDF_STATUS_SUCCESS;
  515. } else {
  516. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  517. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  518. FL("WBM Release Ring (Id %d) Full"), srng->ring_id);
  519. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  520. "HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  521. *srng->u.src_ring.hp_addr, srng->u.src_ring.reap_hp,
  522. *srng->u.src_ring.tp_addr, srng->u.src_ring.cached_tp);
  523. }
  524. done:
  525. hal_srng_access_end(hal_soc, wbm_rel_srng);
  526. return status;
  527. }
  528. /**
  529. * dp_rx_err_process() - Processes error frames routed to REO error ring
  530. *
  531. * @soc: core txrx main context
  532. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  533. * @quota: No. of units (packets) that can be serviced in one shot.
  534. *
  535. * This function implements error processing and top level demultiplexer
  536. * for all the frames routed to REO error ring.
  537. *
  538. * Return: uint32_t: No. of elements processed
  539. */
  540. uint32_t
  541. dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  542. {
  543. void *hal_soc;
  544. void *ring_desc;
  545. union dp_rx_desc_list_elem_t *head = NULL;
  546. union dp_rx_desc_list_elem_t *tail = NULL;
  547. uint32_t rx_bufs_used = 0;
  548. uint8_t buf_type;
  549. uint8_t error, rbm;
  550. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  551. struct hal_buf_info hbi;
  552. struct dp_pdev *dp_pdev;
  553. struct dp_srng *dp_rxdma_srng;
  554. struct rx_desc_pool *rx_desc_pool;
  555. /* Debug -- Remove later */
  556. qdf_assert(soc && hal_ring);
  557. hal_soc = soc->hal_soc;
  558. /* Debug -- Remove later */
  559. qdf_assert(hal_soc);
  560. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  561. /* TODO */
  562. /*
  563. * Need API to convert from hal_ring pointer to
  564. * Ring Type / Ring Id combo
  565. */
  566. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  567. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  568. FL("HAL RING Access Failed -- %p"), hal_ring);
  569. goto done;
  570. }
  571. while (qdf_likely((ring_desc =
  572. hal_srng_dst_get_next(hal_soc, hal_ring))
  573. && quota--)) {
  574. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  575. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  576. qdf_assert(error == HAL_REO_ERROR_DETECTED);
  577. /*
  578. * Check if the buffer is to be processed on this processor
  579. */
  580. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  581. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  582. /* TODO */
  583. /* Call appropriate handler */
  584. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  585. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  586. FL("Invalid RBM %d"), rbm);
  587. continue;
  588. }
  589. buf_type = HAL_RX_REO_BUF_TYPE_GET(ring_desc);
  590. /*
  591. * For REO error ring, expect only MSDU LINK DESC
  592. */
  593. qdf_assert(buf_type == HAL_RX_REO_MSDU_LINK_DESC_TYPE);
  594. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  595. /* Get the MPDU DESC info */
  596. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  597. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  598. /* TODO */
  599. rx_bufs_used += dp_rx_frag_handle(soc,
  600. ring_desc, &mpdu_desc_info,
  601. &head, &tail, quota);
  602. DP_STATS_INC(soc, rx.rx_frags, 1);
  603. continue;
  604. }
  605. if (hal_rx_reo_is_pn_error(ring_desc)) {
  606. /* TOD0 */
  607. DP_STATS_INC(soc,
  608. rx.err.
  609. reo_error[HAL_REO_ERR_PN_CHECK_FAILED],
  610. 1);
  611. rx_bufs_used += dp_rx_pn_error_handle(soc,
  612. ring_desc, &mpdu_desc_info,
  613. &head, &tail, quota);
  614. continue;
  615. }
  616. if (hal_rx_reo_is_2k_jump(ring_desc)) {
  617. /* TOD0 */
  618. DP_STATS_INC(soc,
  619. rx.err.
  620. reo_error[HAL_REO_ERR_REGULAR_FRAME_2K_JUMP],
  621. 1);
  622. rx_bufs_used += dp_rx_2k_jump_handle(soc,
  623. ring_desc, &mpdu_desc_info,
  624. &head, &tail, quota);
  625. continue;
  626. }
  627. /* Return link descriptor through WBM ring (SW2WBM)*/
  628. dp_rx_link_desc_return(soc, ring_desc);
  629. }
  630. done:
  631. hal_srng_access_end(hal_soc, hal_ring);
  632. /* Assume MAC id = 0, owner = 0 */
  633. if (rx_bufs_used) {
  634. dp_pdev = soc->pdev_list[0];
  635. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  636. rx_desc_pool = &soc->rx_desc_buf[0];
  637. dp_rx_buffers_replenish(soc, 0, dp_rxdma_srng, rx_desc_pool,
  638. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  639. }
  640. return rx_bufs_used; /* Assume no scale factor for now */
  641. }
  642. /**
  643. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  644. *
  645. * @soc: core txrx main context
  646. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  647. * @quota: No. of units (packets) that can be serviced in one shot.
  648. *
  649. * This function implements error processing and top level demultiplexer
  650. * for all the frames routed to WBM2HOST sw release ring.
  651. *
  652. * Return: uint32_t: No. of elements processed
  653. */
  654. uint32_t
  655. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  656. {
  657. void *hal_soc;
  658. void *ring_desc;
  659. struct dp_rx_desc *rx_desc;
  660. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  661. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  662. uint32_t rx_bufs_used[MAX_PDEV_CNT] = { 0 };
  663. uint32_t rx_bufs_reaped = 0;
  664. uint8_t buf_type, rbm;
  665. uint8_t wbm_err_src;
  666. uint32_t rx_buf_cookie;
  667. uint8_t mac_id;
  668. struct dp_pdev *dp_pdev;
  669. struct dp_srng *dp_rxdma_srng;
  670. struct rx_desc_pool *rx_desc_pool;
  671. uint8_t pool_id;
  672. /* Debug -- Remove later */
  673. qdf_assert(soc && hal_ring);
  674. hal_soc = soc->hal_soc;
  675. /* Debug -- Remove later */
  676. qdf_assert(hal_soc);
  677. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  678. /* TODO */
  679. /*
  680. * Need API to convert from hal_ring pointer to
  681. * Ring Type / Ring Id combo
  682. */
  683. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  684. FL("HAL RING Access Failed -- %p"), hal_ring);
  685. goto done;
  686. }
  687. while (qdf_likely((ring_desc =
  688. hal_srng_dst_get_next(hal_soc, hal_ring))
  689. && quota--)) {
  690. /* XXX */
  691. wbm_err_src = HAL_RX_WBM_ERR_SRC_GET(ring_desc);
  692. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  693. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  694. /*
  695. * Check if the buffer is to be processed on this processor
  696. */
  697. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  698. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  699. /* TODO */
  700. /* Call appropriate handler */
  701. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  702. FL("Invalid RBM %d"), rbm);
  703. continue;
  704. }
  705. rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
  706. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  707. qdf_assert(rx_desc);
  708. if (!dp_rx_desc_check_magic(rx_desc)) {
  709. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  710. FL("Invalid rx_desc cookie=%d"),
  711. rx_buf_cookie);
  712. continue;
  713. }
  714. pool_id = rx_desc->pool_id;
  715. /* XXX */
  716. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  717. /*
  718. * For WBM ring, expect only MSDU buffers
  719. */
  720. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  721. if (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  722. uint8_t push_reason =
  723. HAL_RX_WBM_REO_PUSH_REASON_GET(ring_desc);
  724. if (push_reason == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  725. uint8_t reo_error_code =
  726. HAL_RX_WBM_REO_ERROR_CODE_GET(ring_desc);
  727. DP_STATS_INC(soc, rx.err.reo_error[
  728. reo_error_code], 1);
  729. switch (reo_error_code) {
  730. /*
  731. * Handling for packets which have NULL REO
  732. * queue descriptor
  733. */
  734. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  735. QDF_TRACE(QDF_MODULE_ID_DP,
  736. QDF_TRACE_LEVEL_WARN,
  737. "Got pkt with REO ERROR: %d",
  738. reo_error_code);
  739. rx_bufs_used[pool_id] +=
  740. dp_rx_null_q_desc_handle(soc,
  741. rx_desc,
  742. &head[pool_id],
  743. &tail[pool_id], quota);
  744. continue;
  745. /* TODO */
  746. /* Add per error code accounting */
  747. default:
  748. QDF_TRACE(QDF_MODULE_ID_DP,
  749. QDF_TRACE_LEVEL_ERROR,
  750. "REO error %d detected",
  751. reo_error_code);
  752. }
  753. }
  754. } else if (wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) {
  755. uint8_t push_reason =
  756. HAL_RX_WBM_RXDMA_PUSH_REASON_GET(ring_desc);
  757. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  758. uint8_t rxdma_error_code =
  759. HAL_RX_WBM_RXDMA_ERROR_CODE_GET(ring_desc);
  760. DP_STATS_INC(soc, rx.err.rxdma_error[
  761. rxdma_error_code], 1);
  762. switch (rxdma_error_code) {
  763. case HAL_RXDMA_ERR_UNENCRYPTED:
  764. rx_bufs_used[pool_id] +=
  765. dp_rx_err_deliver(soc,
  766. rx_desc,
  767. &head[pool_id],
  768. &tail[pool_id],
  769. quota);
  770. continue;
  771. default:
  772. QDF_TRACE(QDF_MODULE_ID_DP,
  773. QDF_TRACE_LEVEL_ERROR,
  774. "RXDMA error %d",
  775. rxdma_error_code);
  776. }
  777. }
  778. } else {
  779. /* Should not come here */
  780. qdf_assert(0);
  781. }
  782. rx_bufs_used[rx_desc->pool_id]++;
  783. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  784. QDF_DMA_BIDIRECTIONAL);
  785. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  786. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  787. QDF_TRACE_LEVEL_INFO);
  788. qdf_nbuf_free(rx_desc->nbuf);
  789. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  790. &tail[rx_desc->pool_id], rx_desc);
  791. }
  792. done:
  793. hal_srng_access_end(hal_soc, hal_ring);
  794. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  795. if (rx_bufs_used[mac_id]) {
  796. dp_pdev = soc->pdev_list[mac_id];
  797. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  798. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  799. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  800. rx_desc_pool, rx_bufs_used[mac_id],
  801. &head[mac_id], &tail[mac_id],
  802. HAL_RX_BUF_RBM_SW3_BM);
  803. rx_bufs_reaped += rx_bufs_used[mac_id];
  804. }
  805. }
  806. return rx_bufs_reaped; /* Assume no scale factor for now */
  807. }
  808. /**
  809. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  810. *
  811. * @soc: core DP main context
  812. * @mac_id: mac id which is one of 3 mac_ids
  813. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  814. * @head: head of descs list to be freed
  815. * @tail: tail of decs list to be freed
  816. * Return: number of msdu in MPDU to be popped
  817. */
  818. static inline uint32_t
  819. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  820. void *rxdma_dst_ring_desc,
  821. union dp_rx_desc_list_elem_t **head,
  822. union dp_rx_desc_list_elem_t **tail)
  823. {
  824. void *rx_msdu_link_desc;
  825. qdf_nbuf_t msdu;
  826. qdf_nbuf_t last;
  827. struct hal_rx_msdu_list msdu_list;
  828. uint16_t num_msdus;
  829. struct hal_buf_info buf_info;
  830. void *p_buf_addr_info;
  831. void *p_last_buf_addr_info;
  832. uint32_t rx_bufs_used = 0;
  833. uint32_t msdu_cnt;
  834. uint32_t i;
  835. uint8_t push_reason;
  836. uint8_t rxdma_error_code = 0;
  837. msdu = 0;
  838. last = NULL;
  839. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  840. &p_last_buf_addr_info, &msdu_cnt);
  841. push_reason =
  842. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  843. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  844. rxdma_error_code =
  845. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  846. }
  847. do {
  848. rx_msdu_link_desc =
  849. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  850. qdf_assert(rx_msdu_link_desc);
  851. num_msdus = (msdu_cnt > HAL_RX_NUM_MSDU_DESC)?
  852. HAL_RX_NUM_MSDU_DESC:msdu_cnt;
  853. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  854. msdu_cnt -= num_msdus;
  855. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  856. for (i = 0; i < num_msdus; i++) {
  857. struct dp_rx_desc *rx_desc =
  858. dp_rx_cookie_2_va_rxdma_buf(soc,
  859. msdu_list.sw_cookie[i]);
  860. qdf_assert(rx_desc);
  861. msdu = rx_desc->nbuf;
  862. qdf_nbuf_unmap_single(soc->osdev, msdu,
  863. QDF_DMA_FROM_DEVICE);
  864. QDF_TRACE(QDF_MODULE_ID_DP,
  865. QDF_TRACE_LEVEL_DEBUG,
  866. "[%s][%d] msdu_nbuf=%p \n",
  867. __func__, __LINE__, msdu);
  868. qdf_nbuf_free(msdu);
  869. rx_bufs_used++;
  870. dp_rx_add_to_free_desc_list(head,
  871. tail, rx_desc);
  872. }
  873. } else {
  874. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  875. }
  876. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  877. &p_buf_addr_info);
  878. dp_rx_link_desc_return(soc, p_last_buf_addr_info);
  879. p_last_buf_addr_info = p_buf_addr_info;
  880. } while (buf_info.paddr && msdu_cnt);
  881. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  882. return rx_bufs_used;
  883. }
  884. /**
  885. * dp_rxdma_err_process() - RxDMA error processing functionality
  886. *
  887. * @soc: core txrx main contex
  888. * @mac_id: mac id which is one of 3 mac_ids
  889. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  890. * @quota: No. of units (packets) that can be serviced in one shot.
  891. * Return: num of buffers processed
  892. */
  893. uint32_t
  894. dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  895. {
  896. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  897. uint8_t pdev_id;
  898. void *hal_soc;
  899. void *rxdma_dst_ring_desc;
  900. void *err_dst_srng;
  901. union dp_rx_desc_list_elem_t *head = NULL;
  902. union dp_rx_desc_list_elem_t *tail = NULL;
  903. struct dp_srng *dp_rxdma_srng;
  904. struct rx_desc_pool *rx_desc_pool;
  905. uint32_t work_done = 0;
  906. uint32_t rx_bufs_used = 0;
  907. #ifdef DP_INTR_POLL_BASED
  908. if (!pdev)
  909. return 0;
  910. #endif
  911. pdev_id = pdev->pdev_id;
  912. err_dst_srng = pdev->rxdma_err_dst_ring.hal_srng;
  913. if (!err_dst_srng) {
  914. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  915. "%s %d : HAL Monitor Destination Ring Init \
  916. Failed -- %p\n",
  917. __func__, __LINE__, err_dst_srng);
  918. return 0;
  919. }
  920. hal_soc = soc->hal_soc;
  921. qdf_assert(hal_soc);
  922. if (qdf_unlikely(hal_srng_access_start(hal_soc, err_dst_srng))) {
  923. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  924. "%s %d : HAL Monitor Destination Ring Init \
  925. Failed -- %p\n",
  926. __func__, __LINE__, err_dst_srng);
  927. return 0;
  928. }
  929. while (qdf_likely((rxdma_dst_ring_desc =
  930. hal_srng_dst_get_next(hal_soc, err_dst_srng)) && quota--)) {
  931. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  932. rxdma_dst_ring_desc,
  933. &head, &tail);
  934. }
  935. hal_srng_access_end(hal_soc, err_dst_srng);
  936. if (rx_bufs_used) {
  937. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  938. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  939. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng,
  940. rx_desc_pool, rx_bufs_used, &head, &tail,
  941. HAL_RX_BUF_RBM_SW3_BM);
  942. work_done += rx_bufs_used;
  943. }
  944. return work_done;
  945. }