dsi_panel.c 136 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <linux/pwm.h>
  11. #include <video/mipi_display.h>
  12. #include "dsi_panel.h"
  13. #include "dsi_ctrl_hw.h"
  14. #include "dsi_parser.h"
  15. #include "sde_dbg.h"
  16. #include "sde_dsc_helper.h"
  17. #include "sde_vdc_helper.h"
  18. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  19. #include "ss_dsi_panel_common.h"
  20. #include "ss_panel_power.h"
  21. #include "sde_trace.h"
  22. #endif
  23. /**
  24. * topology is currently defined by a set of following 3 values:
  25. * 1. num of layer mixers
  26. * 2. num of compression encoders
  27. * 3. num of interfaces
  28. */
  29. #define TOPOLOGY_SET_LEN 3
  30. #define MAX_TOPOLOGY 5
  31. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  32. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  33. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  34. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  35. #define MAX_PANEL_JITTER 10
  36. #define DEFAULT_PANEL_PREFILL_LINES 25
  37. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  38. #define MIN_PREFILL_LINES 40
  39. #define RSCC_MODE_THRESHOLD_TIME_US 40
  40. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  41. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  42. {
  43. char *bp;
  44. bp = buf;
  45. /* First 7 bytes are cmd header */
  46. *bp++ = 0x0A;
  47. *bp++ = 1;
  48. *bp++ = 0;
  49. *bp++ = 0;
  50. *bp++ = pps_delay_ms;
  51. *bp++ = 0;
  52. *bp++ = 128;
  53. }
  54. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  55. char *buf, int pps_id, u32 size)
  56. {
  57. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  58. buf += DSI_CMD_PPS_HDR_SIZE;
  59. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  60. size);
  61. }
  62. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  63. char *buf, int pps_id, u32 size)
  64. {
  65. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  66. buf += DSI_CMD_PPS_HDR_SIZE;
  67. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  68. size);
  69. }
  70. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  71. {
  72. int rc = 0;
  73. int i;
  74. struct regulator *vreg = NULL;
  75. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  76. return ss_panel_parse_powers(ss_get_vdd_from_panel_name(panel->name),
  77. panel->panel_of_node, panel->parent);
  78. #endif
  79. for (i = 0; i < panel->power_info.count; i++) {
  80. vreg = devm_regulator_get(panel->parent,
  81. panel->power_info.vregs[i].vreg_name);
  82. rc = PTR_ERR_OR_ZERO(vreg);
  83. if (rc) {
  84. DSI_ERR("failed to get %s regulator\n",
  85. panel->power_info.vregs[i].vreg_name);
  86. goto error_put;
  87. }
  88. panel->power_info.vregs[i].vreg = vreg;
  89. }
  90. return rc;
  91. error_put:
  92. for (i = i - 1; i >= 0; i--) {
  93. devm_regulator_put(panel->power_info.vregs[i].vreg);
  94. panel->power_info.vregs[i].vreg = NULL;
  95. }
  96. return rc;
  97. }
  98. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  99. {
  100. int rc = 0;
  101. int i;
  102. for (i = panel->power_info.count - 1; i >= 0; i--)
  103. devm_regulator_put(panel->power_info.vregs[i].vreg);
  104. return rc;
  105. }
  106. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  107. {
  108. int rc = 0;
  109. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  110. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  111. return 0;
  112. #endif
  113. if (gpio_is_valid(r_config->reset_gpio)) {
  114. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  115. if (rc) {
  116. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  117. goto error;
  118. }
  119. }
  120. if (gpio_is_valid(r_config->disp_en_gpio)) {
  121. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  122. if (rc) {
  123. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  124. goto error_release_reset;
  125. }
  126. }
  127. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  128. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  129. if (rc) {
  130. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  131. goto error_release_disp_en;
  132. }
  133. }
  134. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  135. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  136. if (rc) {
  137. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  138. goto error_release_mode_sel;
  139. }
  140. }
  141. if (gpio_is_valid(panel->panel_test_gpio)) {
  142. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  143. if (rc) {
  144. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  145. rc);
  146. panel->panel_test_gpio = -1;
  147. rc = 0;
  148. }
  149. }
  150. goto error;
  151. error_release_mode_sel:
  152. if (gpio_is_valid(panel->bl_config.en_gpio))
  153. gpio_free(panel->bl_config.en_gpio);
  154. error_release_disp_en:
  155. if (gpio_is_valid(r_config->disp_en_gpio))
  156. gpio_free(r_config->disp_en_gpio);
  157. error_release_reset:
  158. if (gpio_is_valid(r_config->reset_gpio))
  159. gpio_free(r_config->reset_gpio);
  160. error:
  161. return rc;
  162. }
  163. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  164. {
  165. int rc = 0;
  166. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  167. if (gpio_is_valid(r_config->reset_gpio))
  168. gpio_free(r_config->reset_gpio);
  169. if (gpio_is_valid(r_config->disp_en_gpio))
  170. gpio_free(r_config->disp_en_gpio);
  171. if (gpio_is_valid(panel->bl_config.en_gpio))
  172. gpio_free(panel->bl_config.en_gpio);
  173. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  174. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  175. if (gpio_is_valid(panel->panel_test_gpio))
  176. gpio_free(panel->panel_test_gpio);
  177. return rc;
  178. }
  179. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  180. {
  181. if (!gpio_is_valid(reset_gpio)) {
  182. DSI_INFO("failed to pull down the reset gpio\n");
  183. return -EINVAL;
  184. }
  185. gpio_set_value(reset_gpio, 0);
  186. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  187. DSI_INFO("GPIO pulled low to simulate ESD\n");
  188. return 0;
  189. }
  190. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  191. {
  192. struct dsi_parser_utils *utils = &panel->utils;
  193. int reset_gpio;
  194. int rc = 0;
  195. reset_gpio = utils->get_named_gpio(utils->data,
  196. "qcom,platform-reset-gpio", 0);
  197. if (!gpio_is_valid(reset_gpio)) {
  198. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  199. return -EINVAL;
  200. }
  201. rc = gpio_request(reset_gpio, "reset_gpio");
  202. if (rc) {
  203. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  204. return rc;
  205. }
  206. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  207. gpio_free(reset_gpio);
  208. return rc;
  209. }
  210. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  211. {
  212. struct dsi_panel_reset_config *r_config;
  213. if (!panel) {
  214. DSI_ERR("Invalid panel param\n");
  215. return -EINVAL;
  216. }
  217. r_config = &panel->reset_config;
  218. if (!r_config) {
  219. DSI_ERR("Invalid panel reset configuration\n");
  220. return -EINVAL;
  221. }
  222. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  223. }
  224. static int dsi_panel_reset(struct dsi_panel *panel)
  225. {
  226. int rc = 0;
  227. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  228. int i;
  229. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  230. return 0;
  231. #endif
  232. if (!gpio_is_valid(r_config->reset_gpio))
  233. goto skip_reset_gpio;
  234. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  235. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  236. if (rc) {
  237. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  238. goto exit;
  239. }
  240. }
  241. if (r_config->count) {
  242. rc = gpio_direction_output(r_config->reset_gpio,
  243. r_config->sequence[0].level);
  244. if (rc) {
  245. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  246. goto exit;
  247. }
  248. }
  249. for (i = 0; i < r_config->count; i++) {
  250. gpio_set_value(r_config->reset_gpio,
  251. r_config->sequence[i].level);
  252. if (r_config->sequence[i].sleep_ms)
  253. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  254. (r_config->sequence[i].sleep_ms * 1000) + 100);
  255. }
  256. skip_reset_gpio:
  257. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  258. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  259. if (rc)
  260. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  261. }
  262. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  263. bool out = true;
  264. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  265. || (panel->reset_config.mode_sel_state
  266. == MODE_GPIO_LOW))
  267. out = false;
  268. else if ((panel->reset_config.mode_sel_state
  269. == MODE_SEL_SINGLE_PORT) ||
  270. (panel->reset_config.mode_sel_state
  271. == MODE_GPIO_HIGH))
  272. out = true;
  273. rc = gpio_direction_output(
  274. panel->reset_config.lcd_mode_sel_gpio, out);
  275. if (rc)
  276. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  277. }
  278. if (gpio_is_valid(panel->panel_test_gpio)) {
  279. rc = gpio_direction_input(panel->panel_test_gpio);
  280. if (rc)
  281. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  282. rc);
  283. }
  284. exit:
  285. return rc;
  286. }
  287. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  288. int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  289. #else
  290. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  291. #endif
  292. {
  293. int rc = 0;
  294. struct pinctrl_state *state;
  295. if (panel->host_config.ext_bridge_mode)
  296. return 0;
  297. if (!panel->pinctrl.pinctrl)
  298. return 0;
  299. if (enable)
  300. state = panel->pinctrl.active;
  301. else
  302. state = panel->pinctrl.suspend;
  303. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  304. if (rc)
  305. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  306. panel->name, rc);
  307. return rc;
  308. }
  309. static int dsi_panel_power_on(struct dsi_panel *panel)
  310. {
  311. int rc = 0;
  312. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  313. return 0;
  314. #endif
  315. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  316. if (rc) {
  317. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  318. panel->name, rc);
  319. goto exit;
  320. }
  321. rc = dsi_panel_set_pinctrl_state(panel, true);
  322. if (rc) {
  323. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  324. goto error_disable_vregs;
  325. }
  326. rc = dsi_panel_reset(panel);
  327. if (rc) {
  328. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  329. goto error_disable_gpio;
  330. }
  331. goto exit;
  332. error_disable_gpio:
  333. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  334. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  335. if (gpio_is_valid(panel->bl_config.en_gpio))
  336. gpio_set_value(panel->bl_config.en_gpio, 0);
  337. (void)dsi_panel_set_pinctrl_state(panel, false);
  338. error_disable_vregs:
  339. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  340. exit:
  341. return rc;
  342. }
  343. static int dsi_panel_power_off(struct dsi_panel *panel)
  344. {
  345. int rc = 0;
  346. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  347. return ss_panel_power_off_post_lp11(panel->panel_private);
  348. #endif
  349. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  350. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  351. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  352. !panel->reset_gpio_always_on)
  353. gpio_set_value(panel->reset_config.reset_gpio, 0);
  354. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  355. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  356. if (gpio_is_valid(panel->panel_test_gpio)) {
  357. rc = gpio_direction_input(panel->panel_test_gpio);
  358. if (rc)
  359. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  360. rc);
  361. }
  362. rc = dsi_panel_set_pinctrl_state(panel, false);
  363. if (rc) {
  364. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  365. rc);
  366. }
  367. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  368. if (rc)
  369. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  370. panel->name, rc);
  371. return rc;
  372. }
  373. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  374. int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  375. int type)
  376. #else
  377. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  378. enum dsi_cmd_set_type type)
  379. #endif
  380. {
  381. int rc = 0, i = 0;
  382. ssize_t len;
  383. struct dsi_cmd_desc *cmds;
  384. u32 count;
  385. enum dsi_cmd_set_state state;
  386. #if !IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  387. struct dsi_display_mode *mode;
  388. #endif
  389. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  390. struct samsung_display_driver_data *vdd = panel->panel_private;
  391. struct dsi_panel_cmd_set *set;
  392. struct dsi_display *display = container_of(panel->host, struct dsi_display, host);
  393. size_t tot_tx_len = 0;
  394. int retry = 5;
  395. if (ss_check_panel_connection(vdd)) {
  396. LCD_INFO(vdd, "skip to send command(type: %d)\n", type);
  397. dump_stack();
  398. return 0;
  399. }
  400. /* ss_get_cmds() gets proper QCT cmds or SS cmds for panel revision. */
  401. set = ss_get_cmds(vdd, type);
  402. if (!set) {
  403. LCD_INFO(vdd, "fail to get commands(%d)\n", type);
  404. return 0;
  405. }
  406. cmds = set->cmds;
  407. count = set->count;
  408. state = set->state;
  409. SDE_EVT32(type, state, count);
  410. mutex_lock(&vdd->cmd_lock);
  411. #else
  412. if (!panel || !panel->cur_mode)
  413. return -EINVAL;
  414. mode = panel->cur_mode;
  415. cmds = mode->priv_info->cmd_sets[type].cmds;
  416. count = mode->priv_info->cmd_sets[type].count;
  417. state = mode->priv_info->cmd_sets[type].state;
  418. SDE_EVT32(type, state, count);
  419. #endif
  420. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  421. if (cmds && (display->ctrl[0].ctrl->secure_mode)) {
  422. for (i = 0 ; i < count ; i++) {
  423. if (cmds->msg.tx_len > DSI_CTRL_MAX_CMD_FIFO_STORE_SIZE) {
  424. LCD_ERR(vdd, "Over DSI_CTRL_MAX_CMD_FIFO_STORE_SIZE at secure_mode type = %d\n", type);
  425. if (type != TX_MDNIE_TUNE)
  426. WARN(1, "unexpected cmd type = %d\n", type);
  427. goto error;
  428. }
  429. cmds++;
  430. }
  431. for (i = 0 ; i < count ; i++)
  432. cmds--;
  433. }
  434. #endif
  435. if (count == 0) {
  436. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  437. panel->name, type);
  438. goto error;
  439. }
  440. for (i = 0; i < count; i++) {
  441. cmds->ctrl_flags = 0;
  442. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  443. if (is_ss_cmd_op_skip(vdd, cmds->ss_cmd)) {
  444. DSI_DEBUG("skip tx cmd\n");
  445. cmds++;
  446. continue;
  447. }
  448. /* set last_command if total size is over than MAX DSI FIFO SIZE */
  449. cmds->msg.flags |= MIPI_DSI_MSG_BATCH_COMMAND;
  450. if (tot_tx_len == 0)
  451. tot_tx_len = ALIGN((cmds->msg.tx_len + 4), 4);
  452. if (i < count - 1)
  453. tot_tx_len += ALIGN(((cmds + 1)->msg.tx_len + 4), 4);
  454. /* set last_command if next cmd is read cmd */
  455. if (i < count - 1 && (cmds + 1)->msg.rx_len && (cmds + 1)->msg.rx_buf)
  456. cmds->msg.flags &= ~(MIPI_DSI_MSG_BATCH_COMMAND);
  457. if ((tot_tx_len > DSI_CTRL_MAX_CMD_FET_MEMORY_SIZE) || (i == count-1) || (cmds->post_wait_ms) ||
  458. (cmds->last_command == true)) {
  459. pr_debug("tot %zd is over than max || last cmd set, set last_command", tot_tx_len);
  460. cmds->msg.flags &= ~(MIPI_DSI_MSG_BATCH_COMMAND);
  461. tot_tx_len = 0;
  462. }
  463. if (vdd->not_support_single_tx) /* Some DDI does not support single tx */
  464. cmds->msg.flags &= ~(MIPI_DSI_MSG_BATCH_COMMAND);
  465. if (vdd->dtsi_data.samsung_cmds_unicast)
  466. cmds->msg.flags |= MIPI_DSI_MSG_UNICAST_COMMAND;
  467. /*
  468. Single dsi display uses unicast by default.
  469. Force Broadcast(dual dsi) dispaly use main only read operation,
  470. even if samsung_cmds_unicast is not set.
  471. */
  472. if (cmds->msg.rx_len && cmds->msg.rx_buf) {
  473. cmds->msg.flags |= MIPI_DSI_MSG_UNICAST_COMMAND; /* Vendor QC uses this flag now */
  474. cmds->ctrl_flags |= DSI_CTRL_CMD_READ;
  475. }
  476. #endif
  477. if (state == DSI_CMD_SET_STATE_LP)
  478. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  479. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  480. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  481. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  482. while (retry-- >= 0) {
  483. #endif
  484. len = dsi_host_transfer_sub(panel->host, cmds);
  485. if (len < 0) {
  486. rc = len;
  487. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  488. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  489. DSI_ERR("transfer retry!(%d)\n", retry);
  490. continue;
  491. #endif
  492. goto error;
  493. }
  494. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  495. else {
  496. retry = 5;
  497. break;
  498. }
  499. } /* while end */
  500. if (retry < 0) {
  501. if (!vdd->panel_dead)
  502. SDE_DBG_DUMP(SDE_DBG_BUILT_IN_ALL, "panic");
  503. else
  504. DSI_ERR("Skip dump register & panic in ESD\n");
  505. }
  506. /* reset lp_rx_fail_cnt if mipi read is successful */
  507. vdd->lp_rx_fail_cnt = 0;
  508. #endif
  509. if (cmds->post_wait_ms)
  510. usleep_range(cmds->post_wait_ms*1000,
  511. ((cmds->post_wait_ms*1000)+10));
  512. cmds++;
  513. }
  514. error:
  515. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  516. mutex_unlock(&vdd->cmd_lock);
  517. #endif
  518. return rc;
  519. }
  520. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  521. {
  522. int rc = 0;
  523. if (panel->host_config.ext_bridge_mode)
  524. return 0;
  525. devm_pinctrl_put(panel->pinctrl.pinctrl);
  526. return rc;
  527. }
  528. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  529. {
  530. int rc = 0;
  531. if (panel->host_config.ext_bridge_mode)
  532. return 0;
  533. /* TODO: pinctrl is defined in dsi dt node */
  534. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  535. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  536. rc = PTR_ERR(panel->pinctrl.pinctrl);
  537. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  538. goto error;
  539. }
  540. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  541. "panel_active");
  542. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  543. rc = PTR_ERR(panel->pinctrl.active);
  544. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  545. goto error;
  546. }
  547. panel->pinctrl.suspend =
  548. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  549. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  550. rc = PTR_ERR(panel->pinctrl.suspend);
  551. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  552. goto error;
  553. }
  554. panel->pinctrl.pwm_pin =
  555. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  556. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  557. panel->pinctrl.pwm_pin = NULL;
  558. DSI_DEBUG("failed to get pinctrl pwm_pin");
  559. }
  560. error:
  561. return rc;
  562. }
  563. static int dsi_panel_wled_register(struct dsi_panel *panel,
  564. struct dsi_backlight_config *bl)
  565. {
  566. struct backlight_device *bd;
  567. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  568. if (!bd) {
  569. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  570. panel->name, -EPROBE_DEFER);
  571. return -EPROBE_DEFER;
  572. }
  573. bl->raw_bd = bd;
  574. return 0;
  575. }
  576. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  577. u32 bl_lvl)
  578. {
  579. int rc = 0;
  580. unsigned long mode_flags = 0;
  581. struct mipi_dsi_device *dsi = NULL;
  582. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  583. struct samsung_display_driver_data *vdd;
  584. #endif
  585. if (!panel || (bl_lvl > 0xffff)) {
  586. DSI_ERR("invalid params\n");
  587. return -EINVAL;
  588. }
  589. dsi = &panel->mipi_device;
  590. if (unlikely(panel->bl_config.lp_mode)) {
  591. mode_flags = dsi->mode_flags;
  592. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  593. }
  594. if (panel->bl_config.bl_inverted_dbv)
  595. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  596. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  597. vdd = panel->panel_private;
  598. rc = ss_brightness_dcs(panel->panel_private, bl_lvl, BACKLIGHT_NORMAL);
  599. if (rc < 0)
  600. LCD_ERR(vdd, "failed to update dcs backlight:%d\n", bl_lvl);
  601. #else
  602. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  603. if (rc < 0)
  604. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  605. #endif
  606. if (unlikely(panel->bl_config.lp_mode))
  607. dsi->mode_flags = mode_flags;
  608. return rc;
  609. }
  610. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  611. u32 bl_lvl)
  612. {
  613. int rc = 0;
  614. u32 duty = 0;
  615. u32 period_ns = 0;
  616. struct dsi_backlight_config *bl;
  617. if (!panel) {
  618. DSI_ERR("Invalid Params\n");
  619. return -EINVAL;
  620. }
  621. bl = &panel->bl_config;
  622. if (!bl->pwm_bl) {
  623. DSI_ERR("pwm device not found\n");
  624. return -EINVAL;
  625. }
  626. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  627. duty = bl_lvl * period_ns;
  628. duty /= bl->bl_max_level;
  629. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  630. if (rc) {
  631. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  632. rc);
  633. goto error;
  634. }
  635. if (bl_lvl == 0 && bl->pwm_enabled) {
  636. pwm_disable(bl->pwm_bl);
  637. bl->pwm_enabled = false;
  638. return 0;
  639. }
  640. if (bl_lvl != 0 && !bl->pwm_enabled) {
  641. rc = pwm_enable(bl->pwm_bl);
  642. if (rc) {
  643. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  644. rc);
  645. goto error;
  646. }
  647. bl->pwm_enabled = true;
  648. }
  649. error:
  650. return rc;
  651. }
  652. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  653. {
  654. int rc = 0;
  655. struct dsi_backlight_config *bl = &panel->bl_config;
  656. if (panel->host_config.ext_bridge_mode)
  657. return 0;
  658. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  659. switch (bl->type) {
  660. case DSI_BACKLIGHT_WLED:
  661. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  662. break;
  663. case DSI_BACKLIGHT_DCS:
  664. rc = dsi_panel_update_backlight(panel, bl_lvl);
  665. break;
  666. case DSI_BACKLIGHT_EXTERNAL:
  667. break;
  668. case DSI_BACKLIGHT_PWM:
  669. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  670. break;
  671. default:
  672. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  673. rc = -ENOTSUPP;
  674. }
  675. return rc;
  676. }
  677. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  678. {
  679. u32 cur_bl_level;
  680. struct backlight_device *bd = bl->raw_bd;
  681. /* default the brightness level to 50% */
  682. cur_bl_level = bl->bl_max_level >> 1;
  683. switch (bl->type) {
  684. case DSI_BACKLIGHT_WLED:
  685. /* Try to query the backlight level from the backlight device */
  686. if (bd && bd->ops && bd->ops->get_brightness)
  687. cur_bl_level = bd->ops->get_brightness(bd);
  688. break;
  689. case DSI_BACKLIGHT_DCS:
  690. case DSI_BACKLIGHT_EXTERNAL:
  691. case DSI_BACKLIGHT_PWM:
  692. default:
  693. /*
  694. * Ideally, we should read the backlight level from the
  695. * panel. For now, just set it default value.
  696. */
  697. break;
  698. }
  699. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  700. return cur_bl_level;
  701. }
  702. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  703. {
  704. struct dsi_backlight_config *bl = &panel->bl_config;
  705. bl->bl_level = dsi_panel_get_brightness(bl);
  706. }
  707. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  708. {
  709. int rc = 0;
  710. struct dsi_backlight_config *bl = &panel->bl_config;
  711. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0))
  712. bl->pwm_bl = devm_pwm_get(panel->parent, NULL);
  713. #else
  714. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  715. #endif
  716. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  717. rc = PTR_ERR(bl->pwm_bl);
  718. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  719. rc);
  720. return rc;
  721. }
  722. if (panel->pinctrl.pwm_pin) {
  723. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  724. panel->pinctrl.pwm_pin);
  725. if (rc)
  726. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  727. panel->name, rc);
  728. }
  729. return 0;
  730. }
  731. static int dsi_panel_bl_register(struct dsi_panel *panel)
  732. {
  733. int rc = 0;
  734. struct dsi_backlight_config *bl = &panel->bl_config;
  735. if (panel->host_config.ext_bridge_mode)
  736. return 0;
  737. switch (bl->type) {
  738. case DSI_BACKLIGHT_WLED:
  739. rc = dsi_panel_wled_register(panel, bl);
  740. break;
  741. case DSI_BACKLIGHT_DCS:
  742. break;
  743. case DSI_BACKLIGHT_EXTERNAL:
  744. break;
  745. case DSI_BACKLIGHT_PWM:
  746. rc = dsi_panel_pwm_register(panel);
  747. break;
  748. default:
  749. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  750. rc = -ENOTSUPP;
  751. goto error;
  752. }
  753. error:
  754. return rc;
  755. }
  756. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  757. {
  758. int rc = 0;
  759. struct dsi_backlight_config *bl = &panel->bl_config;
  760. if (panel->host_config.ext_bridge_mode)
  761. return 0;
  762. switch (bl->type) {
  763. case DSI_BACKLIGHT_WLED:
  764. break;
  765. case DSI_BACKLIGHT_DCS:
  766. break;
  767. case DSI_BACKLIGHT_EXTERNAL:
  768. break;
  769. case DSI_BACKLIGHT_PWM:
  770. break;
  771. default:
  772. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  773. rc = -ENOTSUPP;
  774. goto error;
  775. }
  776. error:
  777. return rc;
  778. }
  779. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  780. struct dsi_parser_utils *utils)
  781. {
  782. int rc = 0;
  783. u64 tmp64 = 0;
  784. struct dsi_display_mode *display_mode;
  785. struct dsi_display_mode_priv_info *priv_info;
  786. u32 usecs_fps = 0;
  787. display_mode = container_of(mode, struct dsi_display_mode, timing);
  788. priv_info = display_mode->priv_info;
  789. rc = utils->read_u64(utils->data,
  790. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  791. if (rc == -EOVERFLOW) {
  792. tmp64 = 0;
  793. rc = utils->read_u32(utils->data,
  794. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  795. }
  796. mode->clk_rate_hz = !rc ? tmp64 : 0;
  797. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  798. mode->pclk_scale.numer = 1;
  799. mode->pclk_scale.denom = 1;
  800. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  801. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  802. &mode->mdp_transfer_time_us);
  803. if (rc)
  804. mode->mdp_transfer_time_us = 0;
  805. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us-min",
  806. &priv_info->mdp_transfer_time_us_min);
  807. if (rc)
  808. priv_info->mdp_transfer_time_us_min = 0;
  809. else if (!rc && mode->mdp_transfer_time_us < priv_info->mdp_transfer_time_us_min)
  810. mode->mdp_transfer_time_us = priv_info->mdp_transfer_time_us_min;
  811. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us-max",
  812. &priv_info->mdp_transfer_time_us_max);
  813. if (rc)
  814. priv_info->mdp_transfer_time_us_max = 0;
  815. else if (!rc && mode->mdp_transfer_time_us > priv_info->mdp_transfer_time_us_max)
  816. mode->mdp_transfer_time_us = priv_info->mdp_transfer_time_us_max;
  817. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  818. rc = utils->read_u32(utils->data,
  819. "qcom,mdss-dsi-panel-framerate",
  820. &mode->refresh_rate);
  821. if (rc) {
  822. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  823. rc);
  824. goto error;
  825. }
  826. usecs_fps = DIV_ROUND_UP((1 * 1000 * 1000), mode->refresh_rate);
  827. if (mode->mdp_transfer_time_us > usecs_fps)
  828. mode->mdp_transfer_time_us = 0;
  829. priv_info->mdp_transfer_time_us = mode->mdp_transfer_time_us;
  830. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  831. &mode->h_active);
  832. if (rc) {
  833. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  834. rc);
  835. goto error;
  836. }
  837. rc = utils->read_u32(utils->data,
  838. "qcom,mdss-dsi-h-front-porch",
  839. &mode->h_front_porch);
  840. if (rc) {
  841. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  842. rc);
  843. goto error;
  844. }
  845. rc = utils->read_u32(utils->data,
  846. "qcom,mdss-dsi-h-back-porch",
  847. &mode->h_back_porch);
  848. if (rc) {
  849. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  850. rc);
  851. goto error;
  852. }
  853. rc = utils->read_u32(utils->data,
  854. "qcom,mdss-dsi-h-pulse-width",
  855. &mode->h_sync_width);
  856. if (rc) {
  857. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  858. rc);
  859. goto error;
  860. }
  861. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  862. &mode->h_skew);
  863. if (rc)
  864. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  865. rc);
  866. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  867. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  868. mode->h_sync_width);
  869. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  870. &mode->v_active);
  871. if (rc) {
  872. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  873. rc);
  874. goto error;
  875. }
  876. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  877. &mode->v_back_porch);
  878. if (rc) {
  879. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  880. rc);
  881. goto error;
  882. }
  883. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  884. &mode->v_front_porch);
  885. if (rc) {
  886. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  887. rc);
  888. goto error;
  889. }
  890. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  891. &mode->v_sync_width);
  892. if (rc) {
  893. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  894. rc);
  895. goto error;
  896. }
  897. rc = utils->read_u32(utils->data, "qcom,qsync-mode-min-refresh-rate", &mode->qsync_min_fps);
  898. if (rc) {
  899. DSI_DEBUG("qsync min fps not defined in timing node\n");
  900. rc = 0;
  901. }
  902. rc = utils->read_u32(utils->data, "qcom,dsi-qsync-mode-avr-step-fps", &mode->avr_step_fps);
  903. if (rc) {
  904. DSI_DEBUG("avr step fps not defined in timing node\n");
  905. rc = 0;
  906. }
  907. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  908. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  909. mode->v_sync_width);
  910. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  911. mode->sot_hs_mode = utils->read_bool(utils->data, "samsung,mdss-dsi-sot-hs-mode");
  912. mode->phs_mode = utils->read_bool(utils->data, "samsung,mdss-dsi-phs-mode");
  913. #endif
  914. error:
  915. return rc;
  916. }
  917. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  918. struct dsi_parser_utils *utils,
  919. const char *name)
  920. {
  921. int rc = 0;
  922. u32 bpp = 0;
  923. enum dsi_pixel_format fmt;
  924. const char *packing;
  925. bool bpp_switch_enabled;
  926. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  927. if (rc) {
  928. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  929. name, rc);
  930. return rc;
  931. }
  932. host->bpp = bpp;
  933. switch (bpp) {
  934. case 3:
  935. fmt = DSI_PIXEL_FORMAT_RGB111;
  936. break;
  937. case 8:
  938. fmt = DSI_PIXEL_FORMAT_RGB332;
  939. break;
  940. case 12:
  941. fmt = DSI_PIXEL_FORMAT_RGB444;
  942. break;
  943. case 16:
  944. fmt = DSI_PIXEL_FORMAT_RGB565;
  945. break;
  946. case 18:
  947. fmt = DSI_PIXEL_FORMAT_RGB666;
  948. break;
  949. case 30:
  950. fmt = DSI_PIXEL_FORMAT_RGB101010;
  951. break;
  952. case 24:
  953. default:
  954. fmt = DSI_PIXEL_FORMAT_RGB888;
  955. break;
  956. }
  957. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  958. packing = utils->get_property(utils->data,
  959. "qcom,mdss-dsi-pixel-packing",
  960. NULL);
  961. if (packing && !strcmp(packing, "loose"))
  962. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  963. }
  964. host->dst_format = fmt;
  965. bpp_switch_enabled = utils->read_bool(utils->data, "qcom,mdss-dsi-bpp-switch");
  966. host->bpp_switch_enabled = bpp_switch_enabled;
  967. return rc;
  968. }
  969. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  970. struct dsi_parser_utils *utils,
  971. const char *name)
  972. {
  973. int rc = 0;
  974. bool lane_enabled;
  975. u32 num_of_lanes = 0;
  976. lane_enabled = utils->read_bool(utils->data,
  977. "qcom,mdss-dsi-lane-0-state");
  978. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  979. lane_enabled = utils->read_bool(utils->data,
  980. "qcom,mdss-dsi-lane-1-state");
  981. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  982. lane_enabled = utils->read_bool(utils->data,
  983. "qcom,mdss-dsi-lane-2-state");
  984. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  985. lane_enabled = utils->read_bool(utils->data,
  986. "qcom,mdss-dsi-lane-3-state");
  987. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  988. if (host->data_lanes & DSI_DATA_LANE_0)
  989. num_of_lanes++;
  990. if (host->data_lanes & DSI_DATA_LANE_1)
  991. num_of_lanes++;
  992. if (host->data_lanes & DSI_DATA_LANE_2)
  993. num_of_lanes++;
  994. if (host->data_lanes & DSI_DATA_LANE_3)
  995. num_of_lanes++;
  996. host->num_data_lanes = num_of_lanes;
  997. if (host->data_lanes == 0) {
  998. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  999. rc = -EINVAL;
  1000. }
  1001. return rc;
  1002. }
  1003. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  1004. struct dsi_parser_utils *utils,
  1005. const char *name)
  1006. {
  1007. int rc = 0;
  1008. const char *swap_mode;
  1009. swap_mode = utils->get_property(utils->data,
  1010. "qcom,mdss-dsi-color-order", NULL);
  1011. if (swap_mode) {
  1012. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  1013. host->swap_mode = DSI_COLOR_SWAP_RGB;
  1014. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  1015. host->swap_mode = DSI_COLOR_SWAP_RBG;
  1016. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  1017. host->swap_mode = DSI_COLOR_SWAP_BRG;
  1018. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  1019. host->swap_mode = DSI_COLOR_SWAP_GRB;
  1020. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  1021. host->swap_mode = DSI_COLOR_SWAP_GBR;
  1022. } else {
  1023. DSI_ERR("[%s] Unrecognized color order-%s\n",
  1024. name, swap_mode);
  1025. rc = -EINVAL;
  1026. }
  1027. } else {
  1028. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  1029. host->swap_mode = DSI_COLOR_SWAP_RGB;
  1030. }
  1031. /* bit swap on color channel is not defined in dt */
  1032. host->bit_swap_red = false;
  1033. host->bit_swap_green = false;
  1034. host->bit_swap_blue = false;
  1035. return rc;
  1036. }
  1037. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  1038. struct dsi_parser_utils *utils,
  1039. const char *name)
  1040. {
  1041. const char *trig;
  1042. int rc = 0;
  1043. trig = utils->get_property(utils->data,
  1044. "qcom,mdss-dsi-mdp-trigger", NULL);
  1045. if (trig) {
  1046. if (!strcmp(trig, "none")) {
  1047. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  1048. } else if (!strcmp(trig, "trigger_te")) {
  1049. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  1050. } else if (!strcmp(trig, "trigger_sw")) {
  1051. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  1052. } else if (!strcmp(trig, "trigger_sw_te")) {
  1053. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  1054. } else {
  1055. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  1056. name, trig);
  1057. rc = -EINVAL;
  1058. }
  1059. } else {
  1060. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  1061. name);
  1062. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  1063. }
  1064. trig = utils->get_property(utils->data,
  1065. "qcom,mdss-dsi-dma-trigger", NULL);
  1066. if (trig) {
  1067. if (!strcmp(trig, "none")) {
  1068. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  1069. } else if (!strcmp(trig, "trigger_te")) {
  1070. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  1071. } else if (!strcmp(trig, "trigger_sw")) {
  1072. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  1073. } else if (!strcmp(trig, "trigger_sw_seof")) {
  1074. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  1075. } else if (!strcmp(trig, "trigger_sw_te")) {
  1076. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  1077. } else {
  1078. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  1079. name, trig);
  1080. rc = -EINVAL;
  1081. }
  1082. } else {
  1083. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  1084. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  1085. }
  1086. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  1087. &host->te_mode);
  1088. if (rc) {
  1089. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  1090. host->te_mode = 1;
  1091. rc = 0;
  1092. }
  1093. return rc;
  1094. }
  1095. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  1096. struct dsi_parser_utils *utils,
  1097. const char *name)
  1098. {
  1099. u32 val = 0, line_no = 0, window = 0;
  1100. int rc = 0;
  1101. bool panel_cphy_mode = false;
  1102. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  1103. if (!rc) {
  1104. host->t_clk_post = val;
  1105. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  1106. }
  1107. val = 0;
  1108. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  1109. if (!rc) {
  1110. host->t_clk_pre = val;
  1111. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  1112. }
  1113. host->ignore_rx_eot = utils->read_bool(utils->data,
  1114. "qcom,mdss-dsi-rx-eot-ignore");
  1115. host->append_tx_eot = utils->read_bool(utils->data,
  1116. "qcom,mdss-dsi-tx-eot-append");
  1117. host->ext_bridge_mode = utils->read_bool(utils->data,
  1118. "qcom,mdss-dsi-ext-bridge-mode");
  1119. host->force_hs_clk_lane = utils->read_bool(utils->data,
  1120. "qcom,mdss-dsi-force-clock-lane-hs");
  1121. panel_cphy_mode = utils->read_bool(utils->data,
  1122. "qcom,panel-cphy-mode");
  1123. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  1124. : DSI_PHY_TYPE_DPHY;
  1125. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1126. &line_no);
  1127. if (rc)
  1128. host->dma_sched_line = 0;
  1129. else
  1130. host->dma_sched_line = line_no;
  1131. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  1132. &window);
  1133. if (rc)
  1134. host->dma_sched_window = 0;
  1135. else
  1136. host->dma_sched_window = window;
  1137. rc = utils->read_u32(utils->data, "qcom,vert-padding-value", &host->vpadding);
  1138. host->line_insertion_enable = (rc || host->vpadding <= 0) ? false : true;
  1139. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  1140. host->dma_sched_line, host->dma_sched_window);
  1141. return 0;
  1142. }
  1143. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  1144. struct dsi_parser_utils *utils,
  1145. const char *name)
  1146. {
  1147. int rc = 0;
  1148. u32 val = 0;
  1149. bool supported = false;
  1150. struct dsi_split_link_config *split_link = &host->split_link;
  1151. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  1152. if (!supported) {
  1153. DSI_DEBUG("[%s] Split link is not supported\n", name);
  1154. split_link->enabled = false;
  1155. return;
  1156. }
  1157. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  1158. if (rc || val < 1) {
  1159. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  1160. split_link->num_sublinks = 2;
  1161. } else {
  1162. split_link->num_sublinks = val;
  1163. }
  1164. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  1165. if (rc || val < 1) {
  1166. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  1167. split_link->lanes_per_sublink = 2;
  1168. } else {
  1169. split_link->lanes_per_sublink = val;
  1170. }
  1171. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  1172. if (!supported)
  1173. split_link->sublink_swap = false;
  1174. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  1175. split_link->num_sublinks, split_link->lanes_per_sublink);
  1176. split_link->enabled = true;
  1177. }
  1178. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1179. {
  1180. int rc = 0;
  1181. struct dsi_parser_utils *utils = &panel->utils;
  1182. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1183. panel->name);
  1184. if (rc) {
  1185. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1186. panel->name, rc);
  1187. goto error;
  1188. }
  1189. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1190. panel->name);
  1191. if (rc) {
  1192. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1193. panel->name, rc);
  1194. goto error;
  1195. }
  1196. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1197. panel->name);
  1198. if (rc) {
  1199. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1200. panel->name, rc);
  1201. goto error;
  1202. }
  1203. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1204. panel->name);
  1205. if (rc) {
  1206. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1207. panel->name, rc);
  1208. goto error;
  1209. }
  1210. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1211. panel->name);
  1212. if (rc) {
  1213. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1214. panel->name, rc);
  1215. goto error;
  1216. }
  1217. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1218. panel->name);
  1219. error:
  1220. return rc;
  1221. }
  1222. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1223. struct device_node *of_node)
  1224. {
  1225. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1226. struct dsi_parser_utils *utils = &panel->utils;
  1227. int val, rc = 0;
  1228. rc = of_property_read_u32(of_node, "qcom,dsi-qsync-avr-step-fps", &val);
  1229. if (rc)
  1230. DSI_DEBUG("[%s] avr step fps not defined rc:%d\n", panel->name, rc);
  1231. avr_caps->avr_step_fps = rc ? 0 : val;
  1232. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1233. if (val <= 0) {
  1234. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1235. return 0;
  1236. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1237. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1238. panel->name, val, panel->dfps_caps.dfps_list_len);
  1239. return -EINVAL;
  1240. } else if ((val > 0) && (avr_caps->avr_step_fps)) {
  1241. DSI_ERR("[%s] both modes of avr-steps are defined\n", panel->name);
  1242. return -EINVAL;
  1243. }
  1244. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1245. if (!avr_caps->avr_step_fps_list)
  1246. return -ENOMEM;
  1247. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1248. avr_caps->avr_step_fps_list, val);
  1249. if (rc) {
  1250. kfree(avr_caps->avr_step_fps_list);
  1251. return rc;
  1252. }
  1253. avr_caps->avr_step_fps_list_len = val;
  1254. return rc;
  1255. }
  1256. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1257. struct device_node *of_node)
  1258. {
  1259. int rc = 0;
  1260. u32 val = 0, i;
  1261. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1262. struct dsi_parser_utils *utils = &panel->utils;
  1263. const char *name = panel->name;
  1264. qsync_caps->qsync_support = utils->read_bool(utils->data, "qcom,qsync-enable");
  1265. if (!qsync_caps->qsync_support) {
  1266. DSI_DEBUG("qsync feature not enabled\n");
  1267. goto error;
  1268. }
  1269. /**
  1270. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1271. * video mode when there is only one qsync min fps present.
  1272. */
  1273. rc = of_property_read_u32(of_node,
  1274. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1275. &val);
  1276. if (rc)
  1277. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1278. panel->name, rc);
  1279. qsync_caps->qsync_min_fps = val;
  1280. /**
  1281. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1282. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1283. * is defined.
  1284. */
  1285. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1286. "qcom,dsi-supported-qsync-min-fps-list");
  1287. if (qsync_caps->qsync_min_fps_list_len < 1) {
  1288. qsync_caps->qsync_min_fps_list_len = 0;
  1289. goto qsync_support;
  1290. }
  1291. /**
  1292. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1293. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1294. */
  1295. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1296. qsync_caps->qsync_min_fps) {
  1297. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1298. name);
  1299. rc = -EINVAL;
  1300. goto error;
  1301. }
  1302. if (panel->dfps_caps.dfps_list_len !=
  1303. qsync_caps->qsync_min_fps_list_len) {
  1304. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1305. rc = -EINVAL;
  1306. goto error;
  1307. }
  1308. qsync_caps->qsync_min_fps_list =
  1309. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1310. GFP_KERNEL);
  1311. if (!qsync_caps->qsync_min_fps_list) {
  1312. rc = -ENOMEM;
  1313. goto error;
  1314. }
  1315. rc = utils->read_u32_array(utils->data,
  1316. "qcom,dsi-supported-qsync-min-fps-list",
  1317. qsync_caps->qsync_min_fps_list,
  1318. qsync_caps->qsync_min_fps_list_len);
  1319. if (rc) {
  1320. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1321. rc = -EINVAL;
  1322. goto error;
  1323. }
  1324. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1325. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1326. if (qsync_caps->qsync_min_fps_list[i] <
  1327. qsync_caps->qsync_min_fps)
  1328. qsync_caps->qsync_min_fps =
  1329. qsync_caps->qsync_min_fps_list[i];
  1330. }
  1331. qsync_support:
  1332. /* allow qsync support only if DFPS is with VFP approach */
  1333. if ((panel->dfps_caps.dfps_support) &&
  1334. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP)) {
  1335. qsync_caps->qsync_support = false;
  1336. qsync_caps->qsync_min_fps = 0;
  1337. }
  1338. error:
  1339. if (rc < 0) {
  1340. qsync_caps->qsync_min_fps = 0;
  1341. qsync_caps->qsync_min_fps_list_len = 0;
  1342. }
  1343. return rc;
  1344. }
  1345. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1346. struct dsi_parser_utils *utils)
  1347. {
  1348. int i, rc = 0;
  1349. struct msm_dyn_clk_list *bit_clk_list;
  1350. if (!mode || !mode->priv_info) {
  1351. DSI_ERR("invalid arguments\n");
  1352. return -EINVAL;
  1353. }
  1354. bit_clk_list = &mode->priv_info->bit_clk_list;
  1355. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1356. if (bit_clk_list->count < 1 || bit_clk_list->count > 100) {
  1357. DSI_ERR("invalid number of bit clock values, must be between 1 and 100\n");
  1358. return -EINVAL;
  1359. }
  1360. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1361. if (!bit_clk_list->rates) {
  1362. DSI_ERR("failed to allocate space for bit clock list\n");
  1363. rc = -ENOMEM;
  1364. goto error;
  1365. }
  1366. bit_clk_list->front_porches = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1367. if (!bit_clk_list->front_porches) {
  1368. DSI_ERR("failed to allocate space for front porch list\n");
  1369. rc = -ENOMEM;
  1370. goto error;
  1371. }
  1372. bit_clk_list->pixel_clks_khz = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1373. if (!bit_clk_list->pixel_clks_khz) {
  1374. DSI_ERR("failed to allocate space for pclk list\n");
  1375. rc = -ENOMEM;
  1376. goto error;
  1377. }
  1378. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1379. bit_clk_list->rates, bit_clk_list->count);
  1380. if (rc) {
  1381. DSI_ERR("failed to parse supported bit clk list values, rc=%d\n", rc);
  1382. goto error;
  1383. }
  1384. for (i = 0; i < bit_clk_list->count; i++)
  1385. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1386. return 0;
  1387. error:
  1388. bit_clk_list->count = 0;
  1389. kfree(bit_clk_list->rates);
  1390. kfree(bit_clk_list->front_porches);
  1391. kfree(bit_clk_list->pixel_clks_khz);
  1392. return rc;
  1393. }
  1394. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1395. {
  1396. int rc = 0;
  1397. bool supported = false;
  1398. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1399. struct dsi_parser_utils *utils = &panel->utils;
  1400. const char *type;
  1401. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1402. if (!supported) {
  1403. dyn_clk_caps->dyn_clk_support = false;
  1404. return rc;
  1405. }
  1406. dyn_clk_caps->dyn_clk_support = true;
  1407. type = utils->get_property(utils->data,
  1408. "qcom,dsi-dyn-clk-type", NULL);
  1409. if (!type) {
  1410. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1411. dyn_clk_caps->maintain_const_fps = false;
  1412. return 0;
  1413. }
  1414. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1415. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1416. dyn_clk_caps->maintain_const_fps = true;
  1417. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1418. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1419. dyn_clk_caps->maintain_const_fps = true;
  1420. } else {
  1421. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1422. dyn_clk_caps->maintain_const_fps = false;
  1423. }
  1424. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1425. return 0;
  1426. }
  1427. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1428. {
  1429. int rc = 0;
  1430. bool supported = false;
  1431. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1432. struct dsi_parser_utils *utils = &panel->utils;
  1433. const char *name = panel->name;
  1434. const char *type;
  1435. u32 i;
  1436. supported = utils->read_bool(utils->data,
  1437. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1438. if (!supported) {
  1439. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1440. dfps_caps->dfps_support = false;
  1441. return rc;
  1442. }
  1443. type = utils->get_property(utils->data,
  1444. "qcom,mdss-dsi-pan-fps-update", NULL);
  1445. if (!type) {
  1446. DSI_ERR("[%s] dfps type not defined\n", name);
  1447. rc = -EINVAL;
  1448. goto error;
  1449. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1450. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1451. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1452. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1453. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1454. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1455. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1456. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1457. } else {
  1458. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1459. rc = -EINVAL;
  1460. goto error;
  1461. }
  1462. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1463. "qcom,dsi-supported-dfps-list");
  1464. if (dfps_caps->dfps_list_len < 1) {
  1465. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1466. rc = -EINVAL;
  1467. goto error;
  1468. }
  1469. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1470. GFP_KERNEL);
  1471. if (!dfps_caps->dfps_list) {
  1472. rc = -ENOMEM;
  1473. goto error;
  1474. }
  1475. rc = utils->read_u32_array(utils->data,
  1476. "qcom,dsi-supported-dfps-list",
  1477. dfps_caps->dfps_list,
  1478. dfps_caps->dfps_list_len);
  1479. if (rc) {
  1480. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1481. rc = -EINVAL;
  1482. goto error;
  1483. }
  1484. dfps_caps->dfps_support = true;
  1485. /* calculate max and min fps */
  1486. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1487. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1488. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1489. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1490. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1491. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1492. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1493. }
  1494. error:
  1495. return rc;
  1496. }
  1497. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1498. struct dsi_parser_utils *utils,
  1499. const char *name)
  1500. {
  1501. int rc = 0;
  1502. const char *traffic_mode;
  1503. u32 vc_id = 0;
  1504. u32 val = 0;
  1505. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1506. if (rc) {
  1507. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1508. cfg->pulse_mode_hsa_he = false;
  1509. } else if (val == 1) {
  1510. cfg->pulse_mode_hsa_he = true;
  1511. } else if (val == 0) {
  1512. cfg->pulse_mode_hsa_he = false;
  1513. } else {
  1514. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1515. name);
  1516. rc = -EINVAL;
  1517. goto error;
  1518. }
  1519. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1520. "qcom,mdss-dsi-hfp-power-mode");
  1521. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1522. "qcom,mdss-dsi-hbp-power-mode");
  1523. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1524. "qcom,mdss-dsi-hsa-power-mode");
  1525. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1526. "qcom,mdss-dsi-last-line-interleave");
  1527. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1528. "qcom,mdss-dsi-bllp-eof-power-mode");
  1529. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1530. "qcom,mdss-dsi-bllp-power-mode");
  1531. traffic_mode = utils->get_property(utils->data,
  1532. "qcom,mdss-dsi-traffic-mode",
  1533. NULL);
  1534. if (!traffic_mode) {
  1535. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1536. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1537. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1538. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1539. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1540. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1541. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1542. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1543. } else {
  1544. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1545. traffic_mode);
  1546. rc = -EINVAL;
  1547. goto error;
  1548. }
  1549. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1550. &vc_id);
  1551. if (rc) {
  1552. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1553. cfg->vc_id = 0;
  1554. } else {
  1555. cfg->vc_id = vc_id;
  1556. }
  1557. error:
  1558. return rc;
  1559. }
  1560. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1561. struct dsi_parser_utils *utils,
  1562. const char *name)
  1563. {
  1564. u32 val = 0;
  1565. int rc = 0;
  1566. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1567. if (rc) {
  1568. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1569. cfg->wr_mem_start = 0x2C;
  1570. } else {
  1571. cfg->wr_mem_start = val;
  1572. }
  1573. val = 0;
  1574. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1575. &val);
  1576. if (rc) {
  1577. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1578. cfg->wr_mem_continue = 0x3C;
  1579. } else {
  1580. cfg->wr_mem_continue = val;
  1581. }
  1582. /* TODO: fix following */
  1583. cfg->max_cmd_packets_interleave = 0;
  1584. val = 0;
  1585. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1586. &val);
  1587. if (rc) {
  1588. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1589. cfg->insert_dcs_command = true;
  1590. } else if (val == 1) {
  1591. cfg->insert_dcs_command = true;
  1592. } else if (val == 0) {
  1593. cfg->insert_dcs_command = false;
  1594. } else {
  1595. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1596. name);
  1597. rc = -EINVAL;
  1598. goto error;
  1599. }
  1600. cfg->mdp_idle_ctrl_en =
  1601. utils->read_bool(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-en");
  1602. if (cfg->mdp_idle_ctrl_en) {
  1603. val = 0;
  1604. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-len", &val);
  1605. if (rc) {
  1606. DSI_DEBUG("[%s] mdp idle ctrl len is not defined\n", name);
  1607. cfg->mdp_idle_ctrl_len = 0;
  1608. cfg->mdp_idle_ctrl_en = false;
  1609. rc = 0;
  1610. } else {
  1611. cfg->mdp_idle_ctrl_len = val;
  1612. }
  1613. }
  1614. error:
  1615. return rc;
  1616. }
  1617. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1618. {
  1619. int rc = 0;
  1620. struct dsi_parser_utils *utils = &panel->utils;
  1621. bool panel_mode_switch_enabled;
  1622. enum dsi_op_mode panel_mode;
  1623. const char *mode;
  1624. mode = utils->get_property(utils->data,
  1625. "qcom,mdss-dsi-panel-type", NULL);
  1626. if (!mode) {
  1627. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1628. panel_mode = DSI_OP_VIDEO_MODE;
  1629. } else if (!strcmp(mode, "dsi_video_mode")) {
  1630. panel_mode = DSI_OP_VIDEO_MODE;
  1631. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1632. panel_mode = DSI_OP_CMD_MODE;
  1633. } else {
  1634. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1635. rc = -EINVAL;
  1636. goto error;
  1637. }
  1638. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1639. "qcom,mdss-dsi-panel-mode-switch");
  1640. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1641. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1642. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1643. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1644. utils,
  1645. panel->name);
  1646. if (rc) {
  1647. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1648. panel->name, rc);
  1649. goto error;
  1650. }
  1651. }
  1652. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1653. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1654. utils,
  1655. panel->name);
  1656. if (rc) {
  1657. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1658. panel->name, rc);
  1659. goto error;
  1660. }
  1661. }
  1662. panel->poms_align_vsync = utils->read_bool(utils->data,
  1663. "qcom,poms-align-panel-vsync");
  1664. panel->panel_mode = panel_mode;
  1665. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1666. panel->panel_ack_disabled = utils->read_bool(utils->data,
  1667. "qcom,panel-ack-disabled");
  1668. error:
  1669. return rc;
  1670. }
  1671. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1672. {
  1673. int rc = 0;
  1674. u32 val = 0;
  1675. const char *str;
  1676. struct dsi_panel_phy_props *props = &panel->phy_props;
  1677. struct dsi_parser_utils *utils = &panel->utils;
  1678. const char *name = panel->name;
  1679. rc = utils->read_u32(utils->data,
  1680. "qcom,mdss-pan-physical-width-dimension", &val);
  1681. if (rc) {
  1682. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1683. props->panel_width_mm = 0;
  1684. rc = 0;
  1685. } else {
  1686. props->panel_width_mm = val;
  1687. }
  1688. rc = utils->read_u32(utils->data,
  1689. "qcom,mdss-pan-physical-height-dimension",
  1690. &val);
  1691. if (rc) {
  1692. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1693. props->panel_height_mm = 0;
  1694. rc = 0;
  1695. } else {
  1696. props->panel_height_mm = val;
  1697. }
  1698. str = utils->get_property(utils->data,
  1699. "qcom,mdss-dsi-panel-orientation", NULL);
  1700. if (!str) {
  1701. props->rotation = DSI_PANEL_ROTATE_NONE;
  1702. } else if (!strcmp(str, "180")) {
  1703. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1704. } else if (!strcmp(str, "hflip")) {
  1705. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1706. } else if (!strcmp(str, "vflip")) {
  1707. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1708. } else {
  1709. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1710. rc = -EINVAL;
  1711. goto error;
  1712. }
  1713. error:
  1714. return rc;
  1715. }
  1716. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1717. "qcom,mdss-dsi-pre-on-command",
  1718. "qcom,mdss-dsi-on-command",
  1719. "qcom,vid-on-commands",
  1720. "qcom,cmd-on-commands",
  1721. "qcom,mdss-dsi-post-panel-on-command",
  1722. "qcom,mdss-dsi-pre-off-command",
  1723. "qcom,mdss-dsi-off-command",
  1724. "qcom,mdss-dsi-post-off-command",
  1725. "qcom,mdss-dsi-pre-res-switch",
  1726. "qcom,mdss-dsi-res-switch",
  1727. "qcom,mdss-dsi-post-res-switch",
  1728. "qcom,video-mode-switch-in-commands",
  1729. "qcom,video-mode-switch-out-commands",
  1730. "qcom,cmd-mode-switch-in-commands",
  1731. "qcom,cmd-mode-switch-out-commands",
  1732. "qcom,mdss-dsi-panel-status-command",
  1733. "qcom,mdss-dsi-lp1-command",
  1734. "qcom,mdss-dsi-lp2-command",
  1735. "qcom,mdss-dsi-nolp-command",
  1736. "PPS not parsed from DTSI, generated dynamically",
  1737. "ROI not parsed from DTSI, generated dynamically",
  1738. "qcom,mdss-dsi-timing-switch-command",
  1739. "qcom,mdss-dsi-post-mode-switch-on-command",
  1740. "qcom,mdss-dsi-qsync-on-commands",
  1741. "qcom,mdss-dsi-qsync-off-commands",
  1742. };
  1743. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1744. "qcom,mdss-dsi-pre-on-command-state",
  1745. "qcom,mdss-dsi-on-command-state",
  1746. "qcom,vid-on-commands-state",
  1747. "qcom,cmd-on-commands-state",
  1748. "qcom,mdss-dsi-post-on-command-state",
  1749. "qcom,mdss-dsi-pre-off-command-state",
  1750. "qcom,mdss-dsi-off-command-state",
  1751. "qcom,mdss-dsi-post-off-command-state",
  1752. "qcom,mdss-dsi-pre-res-switch-state",
  1753. "qcom,mdss-dsi-res-switch-state",
  1754. "qcom,mdss-dsi-post-res-switch-state",
  1755. "qcom,video-mode-switch-in-commands-state",
  1756. "qcom,video-mode-switch-out-commands-state",
  1757. "qcom,cmd-mode-switch-in-commands-state",
  1758. "qcom,cmd-mode-switch-out-commands-state",
  1759. "qcom,mdss-dsi-panel-status-command-state",
  1760. "qcom,mdss-dsi-lp1-command-state",
  1761. "qcom,mdss-dsi-lp2-command-state",
  1762. "qcom,mdss-dsi-nolp-command-state",
  1763. "PPS not parsed from DTSI, generated dynamically",
  1764. "ROI not parsed from DTSI, generated dynamically",
  1765. "qcom,mdss-dsi-timing-switch-command-state",
  1766. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1767. "qcom,mdss-dsi-qsync-on-commands-state",
  1768. "qcom,mdss-dsi-qsync-off-commands-state",
  1769. };
  1770. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1771. {
  1772. const u32 cmd_set_min_size = 7;
  1773. u32 count = 0;
  1774. u32 packet_length;
  1775. u32 tmp;
  1776. while (length >= cmd_set_min_size) {
  1777. packet_length = cmd_set_min_size;
  1778. tmp = ((data[5] << 8) | (data[6]));
  1779. packet_length += tmp;
  1780. if (packet_length > length) {
  1781. DSI_ERR("format error\n");
  1782. return -EINVAL;
  1783. }
  1784. length -= packet_length;
  1785. data += packet_length;
  1786. count++;
  1787. }
  1788. *cnt = count;
  1789. return 0;
  1790. }
  1791. int dsi_panel_create_cmd_packets(const char *data,
  1792. u32 length,
  1793. u32 count,
  1794. struct dsi_cmd_desc *cmd)
  1795. {
  1796. int rc = 0;
  1797. int i, j;
  1798. u8 *payload;
  1799. for (i = 0; i < count; i++) {
  1800. u32 size;
  1801. cmd[i].msg.type = data[0];
  1802. cmd[i].msg.channel = data[2];
  1803. cmd[i].msg.flags |= data[3];
  1804. cmd[i].ctrl = 0;
  1805. cmd[i].post_wait_ms = data[4];
  1806. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1807. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1808. cmd[i].last_command = false;
  1809. else
  1810. cmd[i].last_command = true;
  1811. size = cmd[i].msg.tx_len * sizeof(u8);
  1812. payload = kzalloc(size, GFP_KERNEL);
  1813. if (!payload) {
  1814. rc = -ENOMEM;
  1815. goto error_free_payloads;
  1816. }
  1817. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  1818. cmd[i].ss_txbuf = payload;
  1819. #endif
  1820. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1821. payload[j] = data[7 + j];
  1822. cmd[i].msg.tx_buf = payload;
  1823. data += (7 + cmd[i].msg.tx_len);
  1824. }
  1825. return rc;
  1826. error_free_payloads:
  1827. for (i = i - 1; i >= 0; i--) {
  1828. cmd--;
  1829. kfree(cmd->msg.tx_buf);
  1830. }
  1831. return rc;
  1832. }
  1833. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1834. {
  1835. u32 i = 0;
  1836. struct dsi_cmd_desc *cmd;
  1837. for (i = 0; i < set->count; i++) {
  1838. cmd = &set->cmds[i];
  1839. kfree(cmd->msg.tx_buf);
  1840. }
  1841. }
  1842. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1843. {
  1844. kfree(set->cmds);
  1845. }
  1846. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1847. u32 packet_count)
  1848. {
  1849. u32 size;
  1850. size = packet_count * sizeof(*cmd->cmds);
  1851. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1852. if (!cmd->cmds)
  1853. return -ENOMEM;
  1854. cmd->count = packet_count;
  1855. return 0;
  1856. }
  1857. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1858. enum dsi_cmd_set_type type,
  1859. struct dsi_parser_utils *utils)
  1860. {
  1861. int rc = 0;
  1862. u32 length = 0;
  1863. const char *data;
  1864. const char *state;
  1865. u32 packet_count = 0;
  1866. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1867. &length);
  1868. if (!data) {
  1869. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1870. rc = -ENOTSUPP;
  1871. goto error;
  1872. }
  1873. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1874. #if !IS_ENABLED(CONFIG_DISPLAY_SAMSUNG) /* prevent log flood */
  1875. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1876. #endif
  1877. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1878. if (rc) {
  1879. DSI_ERR("commands failed, rc=%d\n", rc);
  1880. goto error;
  1881. }
  1882. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1883. packet_count, length);
  1884. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1885. if (rc) {
  1886. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1887. goto error;
  1888. }
  1889. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1890. cmd->cmds);
  1891. if (rc) {
  1892. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1893. goto error_free_mem;
  1894. }
  1895. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1896. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1897. cmd->state = DSI_CMD_SET_STATE_LP;
  1898. } else if (!strcmp(state, "dsi_hs_mode")) {
  1899. cmd->state = DSI_CMD_SET_STATE_HS;
  1900. } else {
  1901. DSI_ERR("[%s] command state unrecognized-%s\n",
  1902. cmd_set_state_map[type], state);
  1903. goto error_free_mem;
  1904. }
  1905. return rc;
  1906. error_free_mem:
  1907. kfree(cmd->cmds);
  1908. cmd->cmds = NULL;
  1909. error:
  1910. return rc;
  1911. }
  1912. static int dsi_panel_parse_cmd_sets(
  1913. struct dsi_display_mode_priv_info *priv_info,
  1914. struct dsi_parser_utils *utils)
  1915. {
  1916. int rc = 0;
  1917. struct dsi_panel_cmd_set *set;
  1918. u32 i;
  1919. if (!priv_info) {
  1920. DSI_ERR("invalid mode priv info\n");
  1921. return -EINVAL;
  1922. }
  1923. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1924. set = &priv_info->cmd_sets[i];
  1925. set->type = i;
  1926. set->count = 0;
  1927. if (i == DSI_CMD_SET_PPS) {
  1928. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1929. if (rc)
  1930. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1931. i, rc);
  1932. set->state = DSI_CMD_SET_STATE_LP;
  1933. } else {
  1934. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1935. if (rc)
  1936. DSI_DEBUG("failed to parse set %d\n", i);
  1937. }
  1938. }
  1939. rc = 0;
  1940. return rc;
  1941. }
  1942. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1943. {
  1944. int rc = 0;
  1945. int i;
  1946. u32 length = 0;
  1947. u32 count = 0;
  1948. u32 size = 0;
  1949. u32 *arr_32 = NULL;
  1950. const u32 *arr;
  1951. struct dsi_parser_utils *utils = &panel->utils;
  1952. struct dsi_reset_seq *seq;
  1953. if (panel->host_config.ext_bridge_mode)
  1954. return 0;
  1955. arr = utils->get_property(utils->data,
  1956. "qcom,mdss-dsi-reset-sequence", &length);
  1957. if (!arr) {
  1958. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1959. rc = -EINVAL;
  1960. goto error;
  1961. }
  1962. if (length & 0x1) {
  1963. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1964. panel->name);
  1965. rc = -EINVAL;
  1966. goto error;
  1967. }
  1968. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1969. length = length / sizeof(u32);
  1970. size = length * sizeof(u32);
  1971. arr_32 = kzalloc(size, GFP_KERNEL);
  1972. if (!arr_32) {
  1973. rc = -ENOMEM;
  1974. goto error;
  1975. }
  1976. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1977. arr_32, length);
  1978. if (rc) {
  1979. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1980. goto error_free_arr_32;
  1981. }
  1982. count = length / 2;
  1983. size = count * sizeof(*seq);
  1984. seq = kzalloc(size, GFP_KERNEL);
  1985. if (!seq) {
  1986. rc = -ENOMEM;
  1987. goto error_free_arr_32;
  1988. }
  1989. panel->reset_config.sequence = seq;
  1990. panel->reset_config.count = count;
  1991. for (i = 0; i < length; i += 2) {
  1992. seq->level = arr_32[i];
  1993. seq->sleep_ms = arr_32[i + 1];
  1994. seq++;
  1995. }
  1996. error_free_arr_32:
  1997. kfree(arr_32);
  1998. error:
  1999. return rc;
  2000. }
  2001. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  2002. {
  2003. struct dsi_parser_utils *utils = &panel->utils;
  2004. const char *string;
  2005. int i, rc = 0;
  2006. panel->ulps_feature_enabled =
  2007. utils->read_bool(utils->data, "qcom,ulps-enabled");
  2008. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  2009. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  2010. panel->ulps_suspend_enabled =
  2011. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  2012. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  2013. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  2014. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  2015. "qcom,mdss-dsi-te-using-wd");
  2016. panel->sync_broadcast_en = utils->read_bool(utils->data,
  2017. "qcom,cmd-sync-wait-broadcast");
  2018. panel->lp11_init = utils->read_bool(utils->data,
  2019. "qcom,mdss-dsi-lp11-init");
  2020. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  2021. "qcom,platform-reset-gpio-always-on");
  2022. panel->spr_info.enable = false;
  2023. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  2024. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  2025. if (!rc) {
  2026. // find match for pack-type string
  2027. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  2028. if (msm_spr_pack_type_str[i] &&
  2029. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  2030. panel->spr_info.enable = true;
  2031. panel->spr_info.pack_type = i;
  2032. break;
  2033. }
  2034. }
  2035. }
  2036. pr_debug("%s source side spr packing, pack-type %s\n",
  2037. panel->spr_info.enable ? "enable" : "disable",
  2038. panel->spr_info.enable ?
  2039. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  2040. return 0;
  2041. }
  2042. static int dsi_panel_parse_wd_jitter_config(struct dsi_display_mode_priv_info *priv_info,
  2043. struct dsi_parser_utils *utils, u32 *jitter)
  2044. {
  2045. int rc = 0;
  2046. struct msm_display_wd_jitter_config *wd_jitter = &priv_info->wd_jitter;
  2047. u32 ltj[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 1};
  2048. u32 ltj_time = 0;
  2049. const u32 max_ltj = 10;
  2050. if (!(utils->read_bool(utils->data, "qcom,dsi-wd-jitter-enable"))) {
  2051. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  2052. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  2053. return 0;
  2054. }
  2055. rc = utils->read_u32_array(utils->data, "qcom,dsi-wd-ltj-max-jitter", ltj,
  2056. DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  2057. rc |= utils->read_u32(utils->data, "qcom,dsi-wd-ltj-time-sec", &ltj_time);
  2058. if (rc || !ltj[1] || !ltj_time || (ltj[0] / ltj[1] >= max_ltj)) {
  2059. DSI_DEBUG("No valid long term jitter defined\n");
  2060. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  2061. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  2062. rc = -EINVAL;
  2063. } else {
  2064. wd_jitter->ltj_max_numer = ltj[0];
  2065. wd_jitter->ltj_max_denom = ltj[1];
  2066. wd_jitter->ltj_time_sec = ltj_time;
  2067. wd_jitter->jitter_type = MSM_DISPLAY_WD_LTJ_JITTER;
  2068. }
  2069. if (jitter[0] && jitter[1]) {
  2070. if (jitter[0] / jitter[1] > MAX_PANEL_JITTER) {
  2071. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  2072. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  2073. } else {
  2074. wd_jitter->inst_jitter_numer = jitter[0];
  2075. wd_jitter->inst_jitter_denom = jitter[1];
  2076. }
  2077. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  2078. } else if (rc) {
  2079. wd_jitter->inst_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  2080. wd_jitter->inst_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  2081. wd_jitter->jitter_type |= MSM_DISPLAY_WD_INSTANTANEOUS_JITTER;
  2082. }
  2083. priv_info->panel_jitter_numer = rc ?
  2084. wd_jitter->inst_jitter_numer : wd_jitter->ltj_max_numer;
  2085. priv_info->panel_jitter_denom = rc ?
  2086. wd_jitter->inst_jitter_denom : wd_jitter->ltj_max_denom;
  2087. return 0;
  2088. }
  2089. static int dsi_panel_parse_jitter_config(
  2090. struct dsi_display_mode *mode,
  2091. struct dsi_parser_utils *utils)
  2092. {
  2093. int rc;
  2094. struct dsi_display_mode_priv_info *priv_info;
  2095. struct dsi_panel *panel;
  2096. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  2097. u64 jitter_val = 0;
  2098. priv_info = mode->priv_info;
  2099. panel = container_of(utils, struct dsi_panel, utils);
  2100. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  2101. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  2102. if (rc) {
  2103. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  2104. } else {
  2105. jitter_val = jitter[0];
  2106. jitter_val = div_u64(jitter_val, jitter[1]);
  2107. }
  2108. if (panel->te_using_watchdog_timer) {
  2109. dsi_panel_parse_wd_jitter_config(priv_info, utils, jitter);
  2110. } else if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  2111. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  2112. priv_info->panel_jitter_denom = DEFAULT_PANEL_JITTER_DENOMINATOR;
  2113. } else {
  2114. priv_info->panel_jitter_numer = jitter[0];
  2115. priv_info->panel_jitter_denom = jitter[1];
  2116. }
  2117. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  2118. &priv_info->panel_prefill_lines);
  2119. if (rc) {
  2120. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  2121. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  2122. mode->timing.v_sync_width + mode->timing.v_front_porch;
  2123. } else if (priv_info->panel_prefill_lines >=
  2124. DSI_V_TOTAL(&mode->timing)) {
  2125. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  2126. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  2127. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  2128. }
  2129. return 0;
  2130. }
  2131. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  2132. {
  2133. int rc = 0;
  2134. char *supply_name;
  2135. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  2136. return 0;
  2137. #endif
  2138. if (panel->host_config.ext_bridge_mode)
  2139. return 0;
  2140. if (!strcmp(panel->type, "primary"))
  2141. supply_name = "qcom,panel-supply-entries";
  2142. else
  2143. supply_name = "qcom,panel-sec-supply-entries";
  2144. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  2145. &panel->power_info, supply_name);
  2146. if (rc) {
  2147. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  2148. goto error;
  2149. }
  2150. error:
  2151. return rc;
  2152. }
  2153. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  2154. struct msm_io_res *io_res)
  2155. {
  2156. struct dsi_parser_utils *utils = &panel->utils;
  2157. struct list_head *mem_list = &io_res->mem;
  2158. int reset_gpio;
  2159. int rc = 0;
  2160. reset_gpio = utils->get_named_gpio(utils->data,
  2161. "qcom,platform-reset-gpio", 0);
  2162. if (gpio_is_valid(reset_gpio)) {
  2163. rc = msm_dss_get_gpio_io_mem(reset_gpio, mem_list);
  2164. if (rc) {
  2165. DSI_ERR("[%s] failed to retrieve the reset gpio address\n", panel->name);
  2166. goto end;
  2167. }
  2168. }
  2169. end:
  2170. return rc;
  2171. }
  2172. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  2173. {
  2174. int rc = 0;
  2175. const char *data;
  2176. struct dsi_parser_utils *utils = &panel->utils;
  2177. char *reset_gpio_name, *mode_set_gpio_name;
  2178. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  2179. return 0;
  2180. #endif
  2181. if (!strcmp(panel->type, "primary")) {
  2182. reset_gpio_name = "qcom,platform-reset-gpio";
  2183. mode_set_gpio_name = "qcom,panel-mode-gpio";
  2184. } else {
  2185. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  2186. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  2187. }
  2188. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  2189. reset_gpio_name, 0);
  2190. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  2191. !panel->host_config.ext_bridge_mode) {
  2192. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  2193. panel->reset_config.reset_gpio);
  2194. }
  2195. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  2196. "qcom,5v-boost-gpio",
  2197. 0);
  2198. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2199. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  2200. panel->name, rc);
  2201. panel->reset_config.disp_en_gpio =
  2202. utils->get_named_gpio(utils->data,
  2203. "qcom,platform-en-gpio", 0);
  2204. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  2205. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  2206. panel->name, rc);
  2207. }
  2208. }
  2209. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  2210. utils->data, mode_set_gpio_name, 0);
  2211. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  2212. DSI_DEBUG("mode gpio not specified\n");
  2213. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  2214. data = utils->get_property(utils->data,
  2215. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  2216. if (data) {
  2217. if (!strcmp(data, "single_port"))
  2218. panel->reset_config.mode_sel_state =
  2219. MODE_SEL_SINGLE_PORT;
  2220. else if (!strcmp(data, "dual_port"))
  2221. panel->reset_config.mode_sel_state =
  2222. MODE_SEL_DUAL_PORT;
  2223. else if (!strcmp(data, "high"))
  2224. panel->reset_config.mode_sel_state =
  2225. MODE_GPIO_HIGH;
  2226. else if (!strcmp(data, "low"))
  2227. panel->reset_config.mode_sel_state =
  2228. MODE_GPIO_LOW;
  2229. } else {
  2230. /* Set default mode as SPLIT mode */
  2231. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  2232. }
  2233. /* TODO: release memory */
  2234. rc = dsi_panel_parse_reset_sequence(panel);
  2235. if (rc) {
  2236. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  2237. panel->name, rc);
  2238. goto error;
  2239. }
  2240. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  2241. "qcom,mdss-dsi-panel-test-pin",
  2242. 0);
  2243. if (!gpio_is_valid(panel->panel_test_gpio))
  2244. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  2245. __LINE__);
  2246. error:
  2247. return rc;
  2248. }
  2249. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  2250. {
  2251. int rc = 0;
  2252. u32 val;
  2253. struct dsi_backlight_config *config = &panel->bl_config;
  2254. struct dsi_parser_utils *utils = &panel->utils;
  2255. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2256. &val);
  2257. if (rc) {
  2258. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2259. goto error;
  2260. }
  2261. config->pwm_period_usecs = val;
  2262. error:
  2263. return rc;
  2264. }
  2265. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2266. {
  2267. int rc = 0;
  2268. u32 val = 0;
  2269. const char *bl_type = NULL;
  2270. const char *data = NULL;
  2271. const char *state = NULL;
  2272. struct dsi_parser_utils *utils = &panel->utils;
  2273. char *bl_name = NULL;
  2274. if (!strcmp(panel->type, "primary"))
  2275. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2276. else
  2277. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2278. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2279. if (!bl_type) {
  2280. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2281. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2282. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2283. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2284. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2285. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2286. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2287. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2288. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2289. } else {
  2290. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2291. panel->name, bl_type);
  2292. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2293. }
  2294. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2295. if (!data) {
  2296. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2297. } else if (!strcmp(data, "delay_until_first_frame")) {
  2298. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2299. } else {
  2300. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2301. panel->name, data);
  2302. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2303. }
  2304. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2305. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2306. panel->bl_config.dimming_min_bl = 0;
  2307. panel->bl_config.dimming_status = DIMMING_ENABLE;
  2308. panel->bl_config.user_disable_notification = false;
  2309. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2310. if (rc) {
  2311. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2312. panel->name);
  2313. panel->bl_config.bl_min_level = 0;
  2314. } else {
  2315. panel->bl_config.bl_min_level = val;
  2316. }
  2317. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2318. if (rc) {
  2319. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2320. panel->name);
  2321. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2322. } else {
  2323. panel->bl_config.bl_max_level = val;
  2324. }
  2325. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2326. &val);
  2327. if (rc) {
  2328. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2329. panel->name);
  2330. panel->bl_config.brightness_max_level = 255;
  2331. rc = 0;
  2332. } else {
  2333. panel->bl_config.brightness_max_level = val;
  2334. }
  2335. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  2336. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-default-level",
  2337. &val);
  2338. if (rc) {
  2339. pr_debug("[%s] brigheness-default-level unspecified, defaulting to 255\n",
  2340. panel->name);
  2341. panel->bl_config.bl_level = 255;
  2342. } else {
  2343. panel->bl_config.bl_level = val;
  2344. }
  2345. #endif
  2346. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2347. "qcom,mdss-dsi-bl-inverted-dbv");
  2348. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2349. if (!state || !strcmp(state, "dsi_hs_mode"))
  2350. panel->bl_config.lp_mode = false;
  2351. else if (!strcmp(state, "dsi_lp_mode"))
  2352. panel->bl_config.lp_mode = true;
  2353. else
  2354. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2355. state);
  2356. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2357. rc = dsi_panel_parse_bl_pwm_config(panel);
  2358. if (rc) {
  2359. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2360. panel->name, rc);
  2361. goto error;
  2362. }
  2363. }
  2364. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2365. "qcom,platform-bklight-en-gpio",
  2366. 0);
  2367. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2368. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2369. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2370. panel->name, rc);
  2371. rc = -EPROBE_DEFER;
  2372. goto error;
  2373. } else {
  2374. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2375. panel->name, rc);
  2376. rc = 0;
  2377. goto error;
  2378. }
  2379. }
  2380. error:
  2381. return rc;
  2382. }
  2383. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2384. struct dsi_parser_utils *utils)
  2385. {
  2386. const char *data;
  2387. u32 len, i;
  2388. int rc = 0;
  2389. struct dsi_display_mode_priv_info *priv_info;
  2390. u64 pixel_clk_khz;
  2391. if (!mode || !mode->priv_info)
  2392. return -EINVAL;
  2393. priv_info = mode->priv_info;
  2394. data = utils->get_property(utils->data,
  2395. "qcom,mdss-dsi-panel-phy-timings", &len);
  2396. if (!data) {
  2397. DSI_DEBUG("Unable to read Phy timing settings\n");
  2398. } else {
  2399. priv_info->phy_timing_val =
  2400. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2401. if (!priv_info->phy_timing_val)
  2402. return -EINVAL;
  2403. for (i = 0; i < len; i++)
  2404. priv_info->phy_timing_val[i] = data[i];
  2405. priv_info->phy_timing_len = len;
  2406. }
  2407. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2408. /*
  2409. * For command mode we update the pclk as part of
  2410. * function dsi_panel_calc_dsi_transfer_time( )
  2411. * as we set it based on dsi clock or mdp transfer time.
  2412. */
  2413. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2414. DSI_V_TOTAL(&mode->timing) *
  2415. mode->timing.refresh_rate);
  2416. do_div(pixel_clk_khz, 1000);
  2417. mode->pixel_clk_khz = pixel_clk_khz;
  2418. }
  2419. return rc;
  2420. }
  2421. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2422. struct dsi_parser_utils *utils)
  2423. {
  2424. u32 data;
  2425. int rc = -EINVAL;
  2426. int intf_width;
  2427. const char *compression;
  2428. struct dsi_display_mode_priv_info *priv_info;
  2429. if (!mode || !mode->priv_info)
  2430. return -EINVAL;
  2431. priv_info = mode->priv_info;
  2432. priv_info->dsc_enabled = false;
  2433. compression = utils->get_property(utils->data,
  2434. "qcom,compression-mode", NULL);
  2435. if (compression && !strcmp(compression, "dsc"))
  2436. priv_info->dsc_enabled = true;
  2437. if (!priv_info->dsc_enabled) {
  2438. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2439. return 0;
  2440. }
  2441. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2442. if (rc) {
  2443. priv_info->dsc.config.dsc_version_major = 0x1;
  2444. priv_info->dsc.config.dsc_version_minor = 0x1;
  2445. rc = 0;
  2446. } else {
  2447. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2448. * major version information
  2449. */
  2450. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2451. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2452. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2453. ((priv_info->dsc.config.dsc_version_minor
  2454. != 0x1) &&
  2455. (priv_info->dsc.config.dsc_version_minor
  2456. != 0x2))) {
  2457. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2458. __func__,
  2459. priv_info->dsc.config.dsc_version_major,
  2460. priv_info->dsc.config.dsc_version_minor
  2461. );
  2462. rc = -EINVAL;
  2463. goto error;
  2464. }
  2465. }
  2466. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2467. if (rc) {
  2468. priv_info->dsc.scr_rev = 0x0;
  2469. rc = 0;
  2470. } else {
  2471. priv_info->dsc.scr_rev = data & 0xff;
  2472. /* only one scr rev supported */
  2473. if (priv_info->dsc.scr_rev > 0x1) {
  2474. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2475. __func__, priv_info->dsc.scr_rev);
  2476. rc = -EINVAL;
  2477. goto error;
  2478. }
  2479. }
  2480. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2481. if (rc) {
  2482. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2483. goto error;
  2484. }
  2485. priv_info->dsc.config.slice_height = data;
  2486. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2487. if (rc) {
  2488. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2489. goto error;
  2490. }
  2491. priv_info->dsc.config.slice_width = data;
  2492. intf_width = mode->timing.h_active;
  2493. if (intf_width % priv_info->dsc.config.slice_width) {
  2494. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2495. intf_width, priv_info->dsc.config.slice_width);
  2496. rc = -EINVAL;
  2497. goto error;
  2498. }
  2499. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2500. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2501. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2502. if (rc) {
  2503. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2504. goto error;
  2505. } else if (!data || (data > 2)) {
  2506. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2507. goto error;
  2508. }
  2509. priv_info->dsc.slice_per_pkt = data;
  2510. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2511. &data);
  2512. if (rc) {
  2513. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2514. goto error;
  2515. }
  2516. priv_info->dsc.config.bits_per_component = data;
  2517. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2518. if (rc) {
  2519. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2520. data = 0;
  2521. }
  2522. priv_info->dsc.pps_delay_ms = data;
  2523. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2524. &data);
  2525. if (rc) {
  2526. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2527. goto error;
  2528. }
  2529. priv_info->dsc.config.bits_per_pixel = data << 4;
  2530. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2531. &data);
  2532. if (rc) {
  2533. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2534. rc = 0;
  2535. data = MSM_CHROMA_444;
  2536. } else if (data == MSM_CHROMA_422) {
  2537. priv_info->dsc.config.native_422 = 1;
  2538. } else if (data == MSM_CHROMA_420) {
  2539. priv_info->dsc.config.native_420 = 1;
  2540. }
  2541. priv_info->dsc.chroma_format = data;
  2542. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2543. &data);
  2544. if (rc) {
  2545. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2546. rc = 0;
  2547. data = MSM_RGB;
  2548. }
  2549. priv_info->dsc.source_color_space = data;
  2550. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2551. "qcom,mdss-dsc-block-prediction-enable");
  2552. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2553. priv_info->dsc.config.slice_width);
  2554. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2555. priv_info->dsc.scr_rev);
  2556. if (rc) {
  2557. DSI_DEBUG("failed populating dsc params\n");
  2558. rc = -EINVAL;
  2559. goto error;
  2560. }
  2561. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width,
  2562. priv_info->widebus_support);
  2563. if (rc) {
  2564. DSI_DEBUG("failed populating other dsc params\n");
  2565. rc = -EINVAL;
  2566. goto error;
  2567. }
  2568. priv_info->pclk_scale.numer =
  2569. priv_info->dsc.config.bits_per_pixel >> 4;
  2570. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2571. priv_info->dsc.chroma_format,
  2572. priv_info->dsc.config.bits_per_component);
  2573. mode->timing.dsc_enabled = true;
  2574. mode->timing.dsc = &priv_info->dsc;
  2575. mode->timing.pclk_scale = priv_info->pclk_scale;
  2576. error:
  2577. return rc;
  2578. }
  2579. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2580. struct dsi_parser_utils *utils, int traffic_mode)
  2581. {
  2582. u32 data;
  2583. int rc = -EINVAL;
  2584. const char *compression;
  2585. struct dsi_display_mode_priv_info *priv_info;
  2586. int intf_width;
  2587. if (!mode || !mode->priv_info)
  2588. return -EINVAL;
  2589. priv_info = mode->priv_info;
  2590. priv_info->vdc_enabled = false;
  2591. compression = utils->get_property(utils->data,
  2592. "qcom,compression-mode", NULL);
  2593. if (compression && !strcmp(compression, "vdc"))
  2594. priv_info->vdc_enabled = true;
  2595. if (!priv_info->vdc_enabled) {
  2596. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2597. return 0;
  2598. }
  2599. priv_info->vdc.traffic_mode = traffic_mode;
  2600. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2601. if (rc) {
  2602. priv_info->vdc.version_major = 0x1;
  2603. priv_info->vdc.version_minor = 0x2;
  2604. priv_info->vdc.version_release = 0x0;
  2605. rc = 0;
  2606. } else {
  2607. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2608. * major version information
  2609. */
  2610. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2611. priv_info->vdc.version_minor = data & 0x0F;
  2612. if ((priv_info->vdc.version_major != 0x1) &&
  2613. ((priv_info->vdc.version_minor
  2614. != 0x2))) {
  2615. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2616. __func__,
  2617. priv_info->vdc.version_major,
  2618. priv_info->vdc.version_minor
  2619. );
  2620. rc = -EINVAL;
  2621. goto error;
  2622. }
  2623. }
  2624. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2625. if (rc) {
  2626. priv_info->vdc.version_release = 0x0;
  2627. rc = 0;
  2628. } else {
  2629. priv_info->vdc.version_release = data & 0xff;
  2630. /* only one release version is supported */
  2631. if (priv_info->vdc.version_release != 0x0) {
  2632. DSI_ERR("unsupported vdc release version %d\n",
  2633. priv_info->vdc.version_release);
  2634. rc = -EINVAL;
  2635. goto error;
  2636. }
  2637. }
  2638. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2639. priv_info->vdc.version_major,
  2640. priv_info->vdc.version_minor,
  2641. priv_info->vdc.version_release);
  2642. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2643. if (rc) {
  2644. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2645. goto error;
  2646. }
  2647. priv_info->vdc.slice_height = data;
  2648. /* slice height should be atleast 16 lines */
  2649. if (priv_info->vdc.slice_height < 16) {
  2650. DSI_ERR("invalid slice height %d\n",
  2651. priv_info->vdc.slice_height);
  2652. rc = -EINVAL;
  2653. goto error;
  2654. }
  2655. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2656. if (rc) {
  2657. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2658. goto error;
  2659. }
  2660. priv_info->vdc.slice_width = data;
  2661. /*
  2662. * slide-width should be multiple of 8
  2663. * slice-width should be atlease 64 pixels
  2664. */
  2665. if ((priv_info->vdc.slice_width & 7) ||
  2666. (priv_info->vdc.slice_width < 64)) {
  2667. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2668. rc = -EINVAL;
  2669. goto error;
  2670. }
  2671. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2672. if (rc) {
  2673. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2674. goto error;
  2675. } else if (!data || (data > 2)) {
  2676. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2677. rc = -EINVAL;
  2678. goto error;
  2679. }
  2680. intf_width = mode->timing.h_active;
  2681. priv_info->vdc.slice_per_pkt = data;
  2682. priv_info->vdc.frame_width = mode->timing.h_active;
  2683. priv_info->vdc.frame_height = mode->timing.v_active;
  2684. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2685. &data);
  2686. if (rc) {
  2687. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2688. goto error;
  2689. }
  2690. priv_info->vdc.bits_per_component = data;
  2691. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2692. if (rc) {
  2693. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2694. data = 0;
  2695. }
  2696. priv_info->vdc.pps_delay_ms = data;
  2697. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2698. &data);
  2699. if (rc) {
  2700. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2701. goto error;
  2702. }
  2703. priv_info->vdc.bits_per_pixel = data << 4;
  2704. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2705. &data);
  2706. if (rc) {
  2707. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2708. rc = 0;
  2709. data = MSM_CHROMA_444;
  2710. }
  2711. priv_info->vdc.chroma_format = data;
  2712. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2713. &data);
  2714. if (rc) {
  2715. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2716. rc = 0;
  2717. data = MSM_RGB;
  2718. }
  2719. priv_info->vdc.source_color_space = data;
  2720. rc = sde_vdc_populate_config(&priv_info->vdc,
  2721. intf_width, traffic_mode);
  2722. if (rc) {
  2723. DSI_DEBUG("failed populating vdc config\n");
  2724. rc = -EINVAL;
  2725. goto error;
  2726. }
  2727. priv_info->pclk_scale.numer =
  2728. priv_info->vdc.bits_per_pixel >> 4;
  2729. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2730. priv_info->vdc.chroma_format,
  2731. priv_info->vdc.bits_per_component);
  2732. mode->timing.vdc_enabled = true;
  2733. mode->timing.vdc = &priv_info->vdc;
  2734. mode->timing.pclk_scale = priv_info->pclk_scale;
  2735. error:
  2736. return rc;
  2737. }
  2738. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2739. {
  2740. int rc = 0;
  2741. struct drm_panel_hdr_properties *hdr_prop;
  2742. struct dsi_parser_utils *utils = &panel->utils;
  2743. hdr_prop = &panel->hdr_props;
  2744. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2745. "qcom,mdss-dsi-panel-hdr-enabled");
  2746. if (hdr_prop->hdr_enabled) {
  2747. rc = utils->read_u32_array(utils->data,
  2748. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2749. hdr_prop->display_primaries,
  2750. DISPLAY_PRIMARIES_MAX);
  2751. if (rc) {
  2752. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2753. __func__, __LINE__, rc);
  2754. hdr_prop->hdr_enabled = false;
  2755. return rc;
  2756. }
  2757. rc = utils->read_u32(utils->data,
  2758. "qcom,mdss-dsi-panel-peak-brightness",
  2759. &(hdr_prop->peak_brightness));
  2760. if (rc) {
  2761. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2762. __func__, __LINE__, rc);
  2763. hdr_prop->hdr_enabled = false;
  2764. return rc;
  2765. }
  2766. rc = utils->read_u32(utils->data,
  2767. "qcom,mdss-dsi-panel-blackness-level",
  2768. &(hdr_prop->blackness_level));
  2769. if (rc) {
  2770. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2771. __func__, __LINE__, rc);
  2772. hdr_prop->hdr_enabled = false;
  2773. return rc;
  2774. }
  2775. }
  2776. return 0;
  2777. }
  2778. static int dsi_panel_parse_topology(
  2779. struct dsi_display_mode_priv_info *priv_info,
  2780. struct dsi_parser_utils *utils,
  2781. int topology_override)
  2782. {
  2783. struct msm_display_topology *topology;
  2784. u32 top_count, top_sel, *array = NULL;
  2785. int i, len = 0;
  2786. int rc = -EINVAL;
  2787. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2788. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2789. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2790. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2791. return rc;
  2792. }
  2793. top_count = len / TOPOLOGY_SET_LEN;
  2794. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2795. if (!array)
  2796. return -ENOMEM;
  2797. rc = utils->read_u32_array(utils->data,
  2798. "qcom,display-topology", array, len);
  2799. if (rc) {
  2800. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2801. goto read_fail;
  2802. }
  2803. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2804. if (!topology) {
  2805. rc = -ENOMEM;
  2806. goto read_fail;
  2807. }
  2808. for (i = 0; i < top_count; i++) {
  2809. struct msm_display_topology *top = &topology[i];
  2810. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2811. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2812. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2813. }
  2814. if (topology_override >= 0 && topology_override < top_count) {
  2815. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2816. topology_override,
  2817. topology[topology_override].num_lm,
  2818. topology[topology_override].num_enc,
  2819. topology[topology_override].num_intf);
  2820. top_sel = topology_override;
  2821. goto parse_done;
  2822. }
  2823. rc = utils->read_u32(utils->data,
  2824. "qcom,default-topology-index", &top_sel);
  2825. if (rc) {
  2826. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2827. goto parse_fail;
  2828. }
  2829. if (top_sel >= top_count) {
  2830. rc = -EINVAL;
  2831. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2832. rc);
  2833. goto parse_fail;
  2834. }
  2835. parse_done:
  2836. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2837. !topology[top_sel].num_enc) {
  2838. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2839. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2840. topology[top_sel].num_enc);
  2841. goto parse_fail;
  2842. }
  2843. if (priv_info->dsc_enabled)
  2844. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2845. else if (priv_info->vdc_enabled)
  2846. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2847. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2848. topology[top_sel].num_lm,
  2849. topology[top_sel].num_enc,
  2850. topology[top_sel].num_intf);
  2851. memcpy(&priv_info->topology, &topology[top_sel],
  2852. sizeof(struct msm_display_topology));
  2853. parse_fail:
  2854. kfree(topology);
  2855. read_fail:
  2856. kfree(array);
  2857. return rc;
  2858. }
  2859. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2860. struct msm_roi_alignment *align)
  2861. {
  2862. int len = 0, rc = 0;
  2863. u32 value[6];
  2864. struct property *data;
  2865. if (!align)
  2866. return -EINVAL;
  2867. memset(align, 0, sizeof(*align));
  2868. data = utils->find_property(utils->data,
  2869. "qcom,panel-roi-alignment", &len);
  2870. len /= sizeof(u32);
  2871. if (!data) {
  2872. DSI_ERR("panel roi alignment not found\n");
  2873. rc = -EINVAL;
  2874. } else if (len != 6) {
  2875. DSI_ERR("incorrect roi alignment len %d\n", len);
  2876. rc = -EINVAL;
  2877. } else {
  2878. rc = utils->read_u32_array(utils->data,
  2879. "qcom,panel-roi-alignment", value, len);
  2880. if (rc)
  2881. DSI_DEBUG("error reading panel roi alignment values\n");
  2882. else {
  2883. align->xstart_pix_align = value[0];
  2884. align->ystart_pix_align = value[1];
  2885. align->width_pix_align = value[2];
  2886. align->height_pix_align = value[3];
  2887. align->min_width = value[4];
  2888. align->min_height = value[5];
  2889. }
  2890. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2891. align->xstart_pix_align,
  2892. align->width_pix_align,
  2893. align->ystart_pix_align,
  2894. align->height_pix_align,
  2895. align->min_width,
  2896. align->min_height);
  2897. }
  2898. return rc;
  2899. }
  2900. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2901. struct dsi_parser_utils *utils)
  2902. {
  2903. struct msm_roi_caps *roi_caps = NULL;
  2904. const char *data;
  2905. int rc = 0;
  2906. if (!mode || !mode->priv_info) {
  2907. DSI_ERR("invalid arguments\n");
  2908. return -EINVAL;
  2909. }
  2910. roi_caps = &mode->priv_info->roi_caps;
  2911. memset(roi_caps, 0, sizeof(*roi_caps));
  2912. data = utils->get_property(utils->data,
  2913. "qcom,partial-update-enabled", NULL);
  2914. if (data) {
  2915. if (!strcmp(data, "dual_roi"))
  2916. roi_caps->num_roi = 2;
  2917. else if (!strcmp(data, "single_roi"))
  2918. roi_caps->num_roi = 1;
  2919. else {
  2920. DSI_INFO(
  2921. "invalid value for qcom,partial-update-enabled: %s\n",
  2922. data);
  2923. return 0;
  2924. }
  2925. } else {
  2926. DSI_DEBUG("partial update disabled as the property is not set\n");
  2927. return 0;
  2928. }
  2929. roi_caps->merge_rois = utils->read_bool(utils->data,
  2930. "qcom,partial-update-roi-merge");
  2931. roi_caps->enabled = roi_caps->num_roi > 0;
  2932. if (roi_caps->enabled)
  2933. rc = dsi_panel_parse_roi_alignment(utils,
  2934. &roi_caps->align);
  2935. if (rc)
  2936. memset(roi_caps, 0, sizeof(*roi_caps));
  2937. else if (mode->priv_info->dsc_enabled &&
  2938. ((roi_caps->align.min_width % mode->priv_info->dsc.config.slice_width) ||
  2939. (roi_caps->align.min_height % mode->priv_info->dsc.config.slice_height))) {
  2940. memset(roi_caps, 0, sizeof(*roi_caps));
  2941. DSI_ERR("panel roi can't match DSC slice settings,disable partial update\n");
  2942. }
  2943. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2944. roi_caps->enabled);
  2945. return rc;
  2946. }
  2947. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2948. struct dsi_parser_utils *utils)
  2949. {
  2950. if (!mode || !mode->priv_info) {
  2951. DSI_ERR("invalid arguments\n");
  2952. return false;
  2953. }
  2954. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2955. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2956. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2957. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2958. if (!mode->panel_mode_caps)
  2959. return false;
  2960. return true;
  2961. };
  2962. static int dsi_panel_parse_bpp_mode_caps(struct dsi_display_mode *mode,
  2963. struct dsi_parser_utils *utils)
  2964. {
  2965. int rc = 0;
  2966. u32 bpp = 0;
  2967. if (!mode || !mode->priv_info) {
  2968. DSI_ERR("invalid arguments\n");
  2969. return -EINVAL;
  2970. }
  2971. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp-mode", &bpp);
  2972. if (rc) {
  2973. DSI_DEBUG("bpp mode not defined in timing node, setting default 24bpp\n");
  2974. mode->pixel_format_caps = DSI_PIXEL_FORMAT_RGB888;
  2975. return 0;
  2976. }
  2977. switch(bpp) {
  2978. case 30:
  2979. mode->pixel_format_caps = DSI_PIXEL_FORMAT_RGB101010;
  2980. break;
  2981. case 24:
  2982. default:
  2983. mode->pixel_format_caps = DSI_PIXEL_FORMAT_RGB888;
  2984. break;
  2985. }
  2986. return rc;
  2987. };
  2988. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2989. {
  2990. int dms_enabled;
  2991. const char *data;
  2992. struct dsi_parser_utils *utils = &panel->utils;
  2993. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2994. dms_enabled = utils->read_bool(utils->data,
  2995. "qcom,dynamic-mode-switch-enabled");
  2996. if (!dms_enabled)
  2997. return 0;
  2998. data = utils->get_property(utils->data,
  2999. "qcom,dynamic-mode-switch-type", NULL);
  3000. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  3001. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  3002. } else {
  3003. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  3004. panel->name, data);
  3005. return -EINVAL;
  3006. }
  3007. return 0;
  3008. };
  3009. /*
  3010. * The length of all the valid values to be checked should not be greater
  3011. * than the length of returned data from read command.
  3012. */
  3013. static bool
  3014. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  3015. {
  3016. int i;
  3017. struct drm_panel_esd_config *config = &panel->esd_config;
  3018. for (i = 0; i < count; ++i) {
  3019. if (config->status_valid_params[i] >
  3020. config->status_cmds_rlen[i]) {
  3021. DSI_DEBUG("ignore valid params\n");
  3022. return false;
  3023. }
  3024. }
  3025. return true;
  3026. }
  3027. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  3028. char *prop_key, u32 **target, u32 cmd_cnt)
  3029. {
  3030. int tmp;
  3031. if (!utils->find_property(utils->data, prop_key, &tmp))
  3032. return false;
  3033. tmp /= sizeof(u32);
  3034. if (tmp != cmd_cnt) {
  3035. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  3036. tmp, cmd_cnt);
  3037. return false;
  3038. }
  3039. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  3040. if (IS_ERR_OR_NULL(*target)) {
  3041. DSI_ERR("Error allocating memory for property\n");
  3042. return false;
  3043. }
  3044. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  3045. DSI_ERR("cannot get values from dts\n");
  3046. kfree(*target);
  3047. *target = NULL;
  3048. return false;
  3049. }
  3050. return true;
  3051. }
  3052. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  3053. {
  3054. kfree(esd_config->status_buf);
  3055. kfree(esd_config->return_buf);
  3056. kfree(esd_config->status_value);
  3057. kfree(esd_config->status_valid_params);
  3058. kfree(esd_config->status_cmds_rlen);
  3059. kfree(esd_config->status_cmd.cmds);
  3060. }
  3061. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  3062. {
  3063. struct drm_panel_esd_config *esd_config;
  3064. int rc = 0;
  3065. u32 tmp;
  3066. u32 i, status_len, *lenp;
  3067. struct property *data;
  3068. struct dsi_parser_utils *utils = &panel->utils;
  3069. if (!panel) {
  3070. DSI_ERR("Invalid Params\n");
  3071. return -EINVAL;
  3072. }
  3073. esd_config = &panel->esd_config;
  3074. if (!esd_config)
  3075. return -EINVAL;
  3076. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  3077. DSI_CMD_SET_PANEL_STATUS, utils);
  3078. if (!esd_config->status_cmd.count) {
  3079. DSI_ERR("panel status command parsing failed\n");
  3080. rc = -EINVAL;
  3081. goto error;
  3082. }
  3083. if (!dsi_panel_parse_esd_status_len(utils,
  3084. "qcom,mdss-dsi-panel-status-read-length",
  3085. &panel->esd_config.status_cmds_rlen,
  3086. esd_config->status_cmd.count)) {
  3087. DSI_ERR("Invalid status read length\n");
  3088. rc = -EINVAL;
  3089. goto error1;
  3090. }
  3091. if (dsi_panel_parse_esd_status_len(utils,
  3092. "qcom,mdss-dsi-panel-status-valid-params",
  3093. &panel->esd_config.status_valid_params,
  3094. esd_config->status_cmd.count)) {
  3095. if (!dsi_panel_parse_esd_check_valid_params(panel,
  3096. esd_config->status_cmd.count)) {
  3097. rc = -EINVAL;
  3098. goto error2;
  3099. }
  3100. }
  3101. status_len = 0;
  3102. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  3103. for (i = 0; i < esd_config->status_cmd.count; ++i)
  3104. status_len += lenp[i];
  3105. if (!status_len) {
  3106. rc = -EINVAL;
  3107. goto error2;
  3108. }
  3109. /*
  3110. * Some panel may need multiple read commands to properly
  3111. * check panel status. Do a sanity check for proper status
  3112. * value which will be compared with the value read by dsi
  3113. * controller during ESD check. Also check if multiple read
  3114. * commands are there then, there should be corresponding
  3115. * status check values for each read command.
  3116. */
  3117. data = utils->find_property(utils->data,
  3118. "qcom,mdss-dsi-panel-status-value", &tmp);
  3119. tmp /= sizeof(u32);
  3120. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  3121. esd_config->groups = tmp / status_len;
  3122. } else {
  3123. DSI_ERR("error parse panel-status-value\n");
  3124. rc = -EINVAL;
  3125. goto error2;
  3126. }
  3127. esd_config->status_value =
  3128. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  3129. GFP_KERNEL);
  3130. if (!esd_config->status_value) {
  3131. rc = -ENOMEM;
  3132. goto error2;
  3133. }
  3134. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  3135. sizeof(unsigned char), GFP_KERNEL);
  3136. if (!esd_config->return_buf) {
  3137. rc = -ENOMEM;
  3138. goto error3;
  3139. }
  3140. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  3141. if (!esd_config->status_buf) {
  3142. rc = -ENOMEM;
  3143. goto error4;
  3144. }
  3145. rc = utils->read_u32_array(utils->data,
  3146. "qcom,mdss-dsi-panel-status-value",
  3147. esd_config->status_value, esd_config->groups * status_len);
  3148. if (rc) {
  3149. DSI_DEBUG("error reading panel status values\n");
  3150. memset(esd_config->status_value, 0,
  3151. esd_config->groups * status_len);
  3152. }
  3153. return 0;
  3154. error4:
  3155. kfree(esd_config->return_buf);
  3156. error3:
  3157. kfree(esd_config->status_value);
  3158. error2:
  3159. kfree(esd_config->status_valid_params);
  3160. kfree(esd_config->status_cmds_rlen);
  3161. error1:
  3162. kfree(esd_config->status_cmd.cmds);
  3163. error:
  3164. return rc;
  3165. }
  3166. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  3167. {
  3168. int rc = 0;
  3169. const char *string;
  3170. struct drm_panel_esd_config *esd_config;
  3171. struct dsi_parser_utils *utils = &panel->utils;
  3172. u8 *esd_mode = NULL;
  3173. esd_config = &panel->esd_config;
  3174. esd_config->status_mode = ESD_MODE_MAX;
  3175. esd_config->esd_enabled = utils->read_bool(utils->data,
  3176. "qcom,esd-check-enabled");
  3177. if (!esd_config->esd_enabled)
  3178. return 0;
  3179. rc = utils->read_string(utils->data,
  3180. "qcom,mdss-dsi-panel-status-check-mode", &string);
  3181. if (!rc) {
  3182. if (!strcmp(string, "bta_check")) {
  3183. esd_config->status_mode = ESD_MODE_SW_BTA;
  3184. } else if (!strcmp(string, "reg_read")) {
  3185. esd_config->status_mode = ESD_MODE_REG_READ;
  3186. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3187. } else if (!strcmp(string, "irq_check")) {
  3188. esd_config->status_mode = ESD_MODE_PANEL_IRQ;
  3189. DSI_INFO("%s : irq_check!!\n", __func__);
  3190. #endif
  3191. } else if (!strcmp(string, "te_signal_check")) {
  3192. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3193. esd_config->status_mode = ESD_MODE_PANEL_TE;
  3194. } else {
  3195. DSI_ERR("TE-ESD not valid for video mode\n");
  3196. rc = -EINVAL;
  3197. goto error;
  3198. }
  3199. } else {
  3200. DSI_ERR("No valid panel-status-check-mode string\n");
  3201. rc = -EINVAL;
  3202. goto error;
  3203. }
  3204. } else {
  3205. DSI_DEBUG("status check method not defined!\n");
  3206. rc = -EINVAL;
  3207. goto error;
  3208. }
  3209. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  3210. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  3211. if (rc) {
  3212. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  3213. rc);
  3214. goto error;
  3215. }
  3216. esd_mode = "register_read";
  3217. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  3218. esd_mode = "bta_trigger";
  3219. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3220. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_IRQ) {
  3221. esd_mode = "panel_irq";
  3222. #endif
  3223. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  3224. esd_mode = "te_check";
  3225. }
  3226. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  3227. return 0;
  3228. error:
  3229. panel->esd_config.esd_enabled = false;
  3230. return rc;
  3231. }
  3232. static void dsi_panel_update_util(struct dsi_panel *panel,
  3233. struct device_node *parser_node)
  3234. {
  3235. struct dsi_parser_utils *utils = &panel->utils;
  3236. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3237. struct dsi_parser_utils *self_disp_utils = &panel->self_display_utils;
  3238. struct dsi_parser_utils *mafpc_utils = &panel->mafpc_utils;
  3239. #endif
  3240. if (parser_node) {
  3241. *utils = *dsi_parser_get_parser_utils();
  3242. utils->data = parser_node;
  3243. DSI_DEBUG("switching to parser APIs\n");
  3244. goto end;
  3245. }
  3246. *utils = *dsi_parser_get_of_utils();
  3247. utils->data = panel->panel_of_node;
  3248. end:
  3249. utils->node = panel->panel_of_node;
  3250. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3251. *self_disp_utils = *dsi_parser_get_of_utils();
  3252. self_disp_utils->data = panel->self_display_of_node;
  3253. self_disp_utils->node = panel->self_display_of_node;
  3254. *mafpc_utils = *dsi_parser_get_of_utils();
  3255. mafpc_utils->data = panel->mafpc_of_node;
  3256. mafpc_utils->node = panel->mafpc_of_node;
  3257. #endif
  3258. }
  3259. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  3260. {
  3261. return 0;
  3262. }
  3263. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  3264. {
  3265. if (trusted_vm_env) {
  3266. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  3267. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  3268. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  3269. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  3270. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  3271. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  3272. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  3273. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  3274. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  3275. } else {
  3276. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  3277. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  3278. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  3279. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  3280. panel->panel_ops.bl_register = dsi_panel_bl_register;
  3281. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  3282. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  3283. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  3284. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  3285. }
  3286. }
  3287. struct dsi_panel *dsi_panel_get(struct device *parent,
  3288. struct device_node *of_node,
  3289. struct device_node *parser_node,
  3290. const char *type,
  3291. int topology_override,
  3292. bool trusted_vm_env)
  3293. {
  3294. struct dsi_panel *panel;
  3295. struct dsi_parser_utils *utils;
  3296. const char *panel_physical_type;
  3297. int rc = 0;
  3298. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3299. struct device_node *self_display_node = of_parse_phandle(of_node, "ss,self_display", 0);
  3300. struct device_node *mafpc_node = of_parse_phandle(of_node, "ss,mafpc", 0);
  3301. #endif
  3302. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  3303. if (!panel)
  3304. return ERR_PTR(-ENOMEM);
  3305. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  3306. panel->panel_of_node = of_node;
  3307. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3308. panel->self_display_of_node = self_display_node;
  3309. panel->mafpc_of_node = mafpc_node;
  3310. #endif
  3311. panel->parent = parent;
  3312. panel->type = type;
  3313. dsi_panel_update_util(panel, parser_node);
  3314. utils = &panel->utils;
  3315. panel->name = utils->get_property(utils->data,
  3316. "qcom,mdss-dsi-panel-name", NULL);
  3317. if (!panel->name)
  3318. panel->name = DSI_PANEL_DEFAULT_LABEL;
  3319. /*
  3320. * Set panel type to LCD as default.
  3321. */
  3322. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  3323. panel_physical_type = utils->get_property(utils->data,
  3324. "qcom,mdss-dsi-panel-physical-type", NULL);
  3325. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  3326. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  3327. rc = dsi_panel_parse_host_config(panel);
  3328. if (rc) {
  3329. DSI_ERR("failed to parse host configuration, rc=%d\n",
  3330. rc);
  3331. goto error;
  3332. }
  3333. rc = dsi_panel_parse_panel_mode(panel);
  3334. if (rc) {
  3335. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3336. rc);
  3337. goto error;
  3338. }
  3339. rc = dsi_panel_parse_dfps_caps(panel);
  3340. if (rc)
  3341. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3342. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3343. if (rc)
  3344. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3345. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3346. if (rc)
  3347. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3348. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3349. if (rc)
  3350. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3351. rc = dsi_panel_parse_phy_props(panel);
  3352. if (rc) {
  3353. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3354. rc);
  3355. goto error;
  3356. }
  3357. rc = panel->panel_ops.parse_gpios(panel);
  3358. if (rc) {
  3359. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3360. goto error;
  3361. }
  3362. rc = panel->panel_ops.parse_power_cfg(panel);
  3363. if (rc)
  3364. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3365. rc = dsi_panel_parse_bl_config(panel);
  3366. if (rc) {
  3367. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3368. if (rc == -EPROBE_DEFER)
  3369. goto error;
  3370. }
  3371. rc = dsi_panel_parse_misc_features(panel);
  3372. if (rc)
  3373. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3374. rc = dsi_panel_parse_hdr_config(panel);
  3375. if (rc)
  3376. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3377. rc = dsi_panel_get_mode_count(panel);
  3378. if (rc) {
  3379. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3380. goto error;
  3381. }
  3382. rc = dsi_panel_parse_dms_info(panel);
  3383. if (rc)
  3384. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3385. rc = dsi_panel_parse_esd_config(panel);
  3386. if (rc)
  3387. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3388. rc = dsi_panel_vreg_get(panel);
  3389. if (rc) {
  3390. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3391. panel->name, rc);
  3392. goto error;
  3393. }
  3394. panel->power_mode = SDE_MODE_DPMS_OFF;
  3395. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3396. NULL, DRM_MODE_CONNECTOR_DSI);
  3397. panel->mipi_device.dev.of_node = of_node;
  3398. drm_panel_add(&panel->drm_panel);
  3399. mutex_init(&panel->panel_lock);
  3400. return panel;
  3401. error:
  3402. kfree(panel);
  3403. return ERR_PTR(rc);
  3404. }
  3405. void dsi_panel_put(struct dsi_panel *panel)
  3406. {
  3407. drm_panel_remove(&panel->drm_panel);
  3408. /* free resources allocated for ESD check */
  3409. dsi_panel_esd_config_deinit(&panel->esd_config);
  3410. kfree(panel->avr_caps.avr_step_fps_list);
  3411. kfree(panel);
  3412. }
  3413. int dsi_panel_drv_init(struct dsi_panel *panel,
  3414. struct mipi_dsi_host *host)
  3415. {
  3416. int rc = 0;
  3417. struct mipi_dsi_device *dev;
  3418. if (!panel || !host) {
  3419. DSI_ERR("invalid params\n");
  3420. return -EINVAL;
  3421. }
  3422. mutex_lock(&panel->panel_lock);
  3423. dev = &panel->mipi_device;
  3424. dev->host = host;
  3425. /*
  3426. * We dont have device structure since panel is not a device node.
  3427. * When using drm panel framework, the device is probed when the host is
  3428. * create.
  3429. */
  3430. dev->channel = 0;
  3431. dev->lanes = 4;
  3432. panel->host = host;
  3433. rc = panel->panel_ops.pinctrl_init(panel);
  3434. if (rc) {
  3435. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3436. panel->name, rc);
  3437. goto exit;
  3438. }
  3439. rc = panel->panel_ops.gpio_request(panel);
  3440. if (rc) {
  3441. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3442. rc);
  3443. goto error_pinctrl_deinit;
  3444. }
  3445. rc = panel->panel_ops.bl_register(panel);
  3446. if (rc) {
  3447. if (rc != -EPROBE_DEFER)
  3448. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3449. panel->name, rc);
  3450. goto error_gpio_release;
  3451. }
  3452. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3453. ss_panel_init(panel);
  3454. #endif
  3455. goto exit;
  3456. error_gpio_release:
  3457. (void)dsi_panel_gpio_release(panel);
  3458. error_pinctrl_deinit:
  3459. (void)dsi_panel_pinctrl_deinit(panel);
  3460. exit:
  3461. mutex_unlock(&panel->panel_lock);
  3462. return rc;
  3463. }
  3464. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3465. {
  3466. int rc = 0;
  3467. if (!panel) {
  3468. DSI_ERR("invalid params\n");
  3469. return -EINVAL;
  3470. }
  3471. mutex_lock(&panel->panel_lock);
  3472. rc = panel->panel_ops.bl_unregister(panel);
  3473. if (rc)
  3474. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3475. panel->name, rc);
  3476. rc = panel->panel_ops.gpio_release(panel);
  3477. if (rc)
  3478. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3479. rc);
  3480. rc = panel->panel_ops.pinctrl_deinit(panel);
  3481. if (rc)
  3482. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3483. rc);
  3484. rc = dsi_panel_vreg_put(panel);
  3485. if (rc)
  3486. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3487. panel->host = NULL;
  3488. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3489. mutex_unlock(&panel->panel_lock);
  3490. return rc;
  3491. }
  3492. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3493. struct dsi_display_mode *mode)
  3494. {
  3495. return 0;
  3496. }
  3497. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3498. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3499. {
  3500. const char *compression;
  3501. u32 *array = NULL, top_count, len, i;
  3502. int rc = -EINVAL;
  3503. bool dsc_enable = false;
  3504. *dsc_count = 0;
  3505. *lm_count = 0;
  3506. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3507. if (compression && !strcmp(compression, "dsc"))
  3508. dsc_enable = true;
  3509. len = utils->count_u32_elems(node, "qcom,display-topology");
  3510. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3511. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3512. return rc;
  3513. top_count = len / TOPOLOGY_SET_LEN;
  3514. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3515. if (!array)
  3516. return -ENOMEM;
  3517. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3518. if (rc) {
  3519. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3520. goto read_fail;
  3521. }
  3522. for (i = 0; i < top_count; i++) {
  3523. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3524. if (dsc_enable)
  3525. *dsc_count = max(*dsc_count,
  3526. array[i * TOPOLOGY_SET_LEN + 1]);
  3527. }
  3528. read_fail:
  3529. kfree(array);
  3530. return 0;
  3531. }
  3532. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3533. {
  3534. const u32 SINGLE_MODE_SUPPORT = 1;
  3535. struct dsi_parser_utils *utils;
  3536. struct device_node *timings_np, *child_np;
  3537. int num_dfps_rates;
  3538. int num_video_modes = 0, num_cmd_modes = 0;
  3539. int count, rc = 0;
  3540. u32 dsc_count = 0, lm_count = 0;
  3541. if (!panel) {
  3542. DSI_ERR("invalid params\n");
  3543. return -EINVAL;
  3544. }
  3545. utils = &panel->utils;
  3546. panel->num_timing_nodes = 0;
  3547. timings_np = utils->get_child_by_name(utils->data,
  3548. "qcom,mdss-dsi-display-timings");
  3549. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3550. DSI_ERR("no display timing nodes defined\n");
  3551. rc = -EINVAL;
  3552. goto error;
  3553. }
  3554. count = utils->get_child_count(timings_np);
  3555. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3556. count > DSI_MODE_MAX) {
  3557. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3558. rc = -EINVAL;
  3559. goto error;
  3560. }
  3561. /* No multiresolution support is available for video mode panels.
  3562. * Multi-mode is supported for video mode during POMS is enabled.
  3563. */
  3564. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3565. !panel->host_config.ext_bridge_mode &&
  3566. !panel->panel_mode_switch_enabled)
  3567. count = SINGLE_MODE_SUPPORT;
  3568. panel->num_timing_nodes = count;
  3569. dsi_for_each_child_node(timings_np, child_np) {
  3570. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3571. num_video_modes++;
  3572. else if (utils->read_bool(child_np,
  3573. "qcom,mdss-dsi-cmd-mode"))
  3574. num_cmd_modes++;
  3575. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3576. num_video_modes++;
  3577. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3578. num_cmd_modes++;
  3579. dsi_panel_get_max_res_count(utils, child_np,
  3580. &dsc_count, &lm_count);
  3581. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3582. panel->lm_count = max(lm_count, panel->lm_count);
  3583. }
  3584. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3585. panel->dfps_caps.dfps_list_len;
  3586. /* Inflate num_of_modes by fps in dfps. */
  3587. num_video_modes = num_video_modes * num_dfps_rates;
  3588. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3589. error:
  3590. return rc;
  3591. }
  3592. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3593. struct dsi_panel_phy_props *phy_props)
  3594. {
  3595. int rc = 0;
  3596. if (!panel || !phy_props) {
  3597. DSI_ERR("invalid params\n");
  3598. return -EINVAL;
  3599. }
  3600. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3601. return rc;
  3602. }
  3603. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3604. struct dsi_dfps_capabilities *dfps_caps)
  3605. {
  3606. int rc = 0;
  3607. if (!panel || !dfps_caps) {
  3608. DSI_ERR("invalid params\n");
  3609. return -EINVAL;
  3610. }
  3611. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3612. return rc;
  3613. }
  3614. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3615. {
  3616. int i;
  3617. if (!mode->priv_info)
  3618. return;
  3619. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3620. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3621. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3622. }
  3623. kfree(mode->priv_info);
  3624. }
  3625. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3626. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3627. {
  3628. u32 frame_time_us, nslices;
  3629. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3630. dsi_transfer_time_us, pixel_clk_khz;
  3631. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3632. struct dsi_mode_info *timing = &mode->timing;
  3633. struct dsi_display_mode *display_mode;
  3634. u32 jitter_numer, jitter_denom, prefill_lines;
  3635. u32 default_prefill_lines, actual_prefill_lines, vtotal;
  3636. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3637. u32 bits_per_symbol = 16, num_of_symbols = 7; /* For Cphy */
  3638. u16 bpp;
  3639. /* Packet overhead in bits,
  3640. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3641. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3642. * 1 byte dcs data command.
  3643. */
  3644. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3645. packet_overhead = 120;
  3646. else
  3647. packet_overhead = 56;
  3648. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3649. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3650. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3651. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3652. if (timing->refresh_rate >= 120)
  3653. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3654. if (timing->dsc_enabled) {
  3655. nslices = (timing->h_active)/(dsc->config.slice_width);
  3656. /* (slice width x bit-per-pixel + packet overhead) x
  3657. * number of slices x height x fps / lane
  3658. */
  3659. bpp = DSC_BPP(dsc->config);
  3660. bits_per_line = ((dsc->config.slice_width * bpp) +
  3661. packet_overhead) * nslices;
  3662. bits_per_line = bits_per_line / (config->num_data_lanes);
  3663. min_bitclk_hz = (bits_per_line * timing->v_active *
  3664. timing->refresh_rate);
  3665. } else {
  3666. total_active_pixels = ((dsi_h_active_dce(timing)
  3667. * timing->v_active));
  3668. /* calculate the actual bitclk needed to transfer the frame */
  3669. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3670. (mode->bpp));
  3671. do_div(min_bitclk_hz, config->num_data_lanes);
  3672. }
  3673. timing->min_dsi_clk_hz = min_bitclk_hz;
  3674. if (config->phy_type == DSI_PHY_TYPE_CPHY) {
  3675. do_div(timing->min_dsi_clk_hz, bits_per_symbol);
  3676. timing->min_dsi_clk_hz *= num_of_symbols;
  3677. }
  3678. /*
  3679. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3680. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3681. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3682. * threshold time are configured to 40us.
  3683. */
  3684. if (mode->priv_info->disable_rsc_solver) {
  3685. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3686. } else {
  3687. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3688. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3689. }
  3690. /*
  3691. * Increase the prefill_lines proportionately as recommended
  3692. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3693. */
  3694. default_prefill_lines = mult_frac(MIN_PREFILL_LINES, timing->refresh_rate, 60);
  3695. actual_prefill_lines = timing->v_back_porch + timing->v_front_porch + timing->v_sync_width;
  3696. vtotal = actual_prefill_lines + timing->v_active;
  3697. /* consider the max of default prefill lines and actual prefill lines */
  3698. prefill_lines = max(actual_prefill_lines, default_prefill_lines);
  3699. prefill_time_us = mult_frac(frame_time_us, prefill_lines, vtotal);
  3700. min_threshold_us = min_threshold_us + prefill_time_us;
  3701. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3702. if (timing->clk_rate_hz) {
  3703. /* adjust the transfer time proportionately for bit clk*/
  3704. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3705. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3706. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3707. } else if (mode->priv_info->mdp_transfer_time_us) {
  3708. max_transfer_us = frame_time_us - min_threshold_us;
  3709. mode->priv_info->mdp_transfer_time_us = min(
  3710. mode->priv_info->mdp_transfer_time_us,
  3711. max_transfer_us);
  3712. timing->dsi_transfer_time_us =
  3713. mode->priv_info->mdp_transfer_time_us;
  3714. } else {
  3715. if ((min_threshold_us > frame_threshold_us) ||
  3716. (mode->priv_info->disable_rsc_solver))
  3717. frame_threshold_us = min_threshold_us;
  3718. timing->dsi_transfer_time_us = frame_time_us -
  3719. frame_threshold_us;
  3720. }
  3721. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3722. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3723. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3724. timing->mdp_transfer_time_us =
  3725. mode->priv_info->mdp_transfer_time_us;
  3726. }
  3727. /* Calculate pclk_khz to update modeinfo */
  3728. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3729. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3730. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3731. do_div(pixel_clk_khz, mode->bpp);
  3732. display_mode->pixel_clk_khz = pixel_clk_khz;
  3733. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3734. }
  3735. int dsi_panel_get_mode(struct dsi_panel *panel,
  3736. u32 index, struct dsi_display_mode *mode,
  3737. int topology_override)
  3738. {
  3739. struct device_node *timings_np, *child_np;
  3740. struct dsi_parser_utils *utils;
  3741. struct dsi_display_mode_priv_info *prv_info;
  3742. u32 child_idx = 0;
  3743. int rc = 0, num_timings;
  3744. int traffic_mode;
  3745. void *utils_data = NULL;
  3746. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3747. struct samsung_display_driver_data *vdd;
  3748. #endif
  3749. if (!panel || !mode) {
  3750. DSI_ERR("invalid params\n");
  3751. return -EINVAL;
  3752. }
  3753. mutex_lock(&panel->panel_lock);
  3754. utils = &panel->utils;
  3755. prv_info = mode->priv_info;
  3756. timings_np = utils->get_child_by_name(utils->data,
  3757. "qcom,mdss-dsi-display-timings");
  3758. if (!timings_np) {
  3759. DSI_ERR("no display timing nodes defined\n");
  3760. rc = -EINVAL;
  3761. goto parse_fail;
  3762. }
  3763. num_timings = utils->get_child_count(timings_np);
  3764. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3765. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3766. rc = -EINVAL;
  3767. goto parse_fail;
  3768. }
  3769. utils_data = utils->data;
  3770. traffic_mode = panel->video_config.traffic_mode;
  3771. dsi_for_each_child_node(timings_np, child_np) {
  3772. if (index != child_idx++)
  3773. continue;
  3774. utils->data = child_np;
  3775. if (panel->panel_mode_switch_enabled) {
  3776. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3777. mode->panel_mode_caps = panel->panel_mode;
  3778. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3779. child_idx);
  3780. }
  3781. } else {
  3782. mode->panel_mode_caps = panel->panel_mode;
  3783. }
  3784. if (panel->host_config.bpp_switch_enabled) {
  3785. rc = dsi_panel_parse_bpp_mode_caps(mode, utils);
  3786. if (rc) {
  3787. DSI_ERR("failed to parse bpp mode caps, rc=%d\n", rc);
  3788. goto parse_fail;
  3789. }
  3790. } else {
  3791. mode->pixel_format_caps = panel->host_config.dst_format;
  3792. }
  3793. mode->bpp = dsi_pixel_format_to_bpp(mode->pixel_format_caps);
  3794. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3795. if (rc)
  3796. mode->mode_idx = index;
  3797. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3798. if (rc) {
  3799. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3800. goto parse_fail;
  3801. }
  3802. if (panel->dyn_clk_caps.dyn_clk_support) {
  3803. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3804. if (rc)
  3805. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3806. }
  3807. rc = dsi_panel_parse_dsc_params(mode, utils);
  3808. if (rc) {
  3809. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3810. goto parse_fail;
  3811. }
  3812. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3813. if (rc) {
  3814. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3815. goto parse_fail;
  3816. }
  3817. rc = dsi_panel_parse_topology(prv_info, utils,
  3818. topology_override);
  3819. if (rc) {
  3820. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3821. goto parse_fail;
  3822. }
  3823. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3824. if (rc) {
  3825. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3826. goto parse_fail;
  3827. }
  3828. rc = dsi_panel_parse_jitter_config(mode, utils);
  3829. if (rc)
  3830. DSI_ERR(
  3831. "failed to parse panel jitter config, rc=%d\n", rc);
  3832. rc = dsi_panel_parse_phy_timing(mode, utils);
  3833. if (rc) {
  3834. DSI_ERR(
  3835. "failed to parse panel phy timings, rc=%d\n", rc);
  3836. goto parse_fail;
  3837. }
  3838. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3839. if (rc)
  3840. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3841. }
  3842. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3843. vdd = panel->panel_private;
  3844. vdd->num_of_intf = mode->priv_info->topology.num_intf;
  3845. LCD_INFO_ONCE(vdd, "vdd->num_of_intf = %d\n", vdd->num_of_intf);
  3846. if (mode->timing.qsync_min_fps) {
  3847. LCD_INFO(vdd, "index(%d) : mdp_transfer_time_us(%d), qsync fs(%d)\n",
  3848. index, mode->priv_info->mdp_transfer_time_us,
  3849. mode->timing.qsync_min_fps);
  3850. }
  3851. #endif
  3852. parse_fail:
  3853. utils->data = utils_data;
  3854. mutex_unlock(&panel->panel_lock);
  3855. return rc;
  3856. }
  3857. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3858. struct dsi_display_mode *mode,
  3859. struct dsi_host_config *config)
  3860. {
  3861. int rc = 0;
  3862. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3863. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3864. struct samsung_display_driver_data *vdd;
  3865. #endif
  3866. if (!panel || !mode || !config) {
  3867. DSI_ERR("invalid params\n");
  3868. return -EINVAL;
  3869. }
  3870. mutex_lock(&panel->panel_lock);
  3871. config->panel_mode = panel->panel_mode;
  3872. memcpy(&config->common_config, &panel->host_config,
  3873. sizeof(config->common_config));
  3874. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3875. memcpy(&config->u.video_engine, &panel->video_config,
  3876. sizeof(config->u.video_engine));
  3877. } else {
  3878. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3879. sizeof(config->u.cmd_engine));
  3880. }
  3881. memcpy(&config->video_timing, &mode->timing,
  3882. sizeof(config->video_timing));
  3883. config->video_timing.mdp_transfer_time_us =
  3884. mode->priv_info->mdp_transfer_time_us;
  3885. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3886. config->video_timing.dsc = &mode->priv_info->dsc;
  3887. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3888. config->video_timing.vdc = &mode->priv_info->vdc;
  3889. if (dyn_clk_caps->dyn_clk_support)
  3890. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3891. else
  3892. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3893. config->esc_clk_rate_hz = 19200000;
  3894. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3895. vdd = panel->panel_private;
  3896. if (vdd->dtsi_data.samsung_esc_clk_128M)
  3897. config->esc_clk_rate_hz = 12800000;
  3898. #endif
  3899. mutex_unlock(&panel->panel_lock);
  3900. return rc;
  3901. }
  3902. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3903. {
  3904. int rc = 0;
  3905. if (!panel) {
  3906. DSI_ERR("invalid params\n");
  3907. return -EINVAL;
  3908. }
  3909. mutex_lock(&panel->panel_lock);
  3910. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3911. if (panel->lp11_init)
  3912. goto error;
  3913. rc = dsi_panel_power_on(panel);
  3914. if (rc) {
  3915. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3916. goto error;
  3917. }
  3918. error:
  3919. mutex_unlock(&panel->panel_lock);
  3920. return rc;
  3921. }
  3922. int dsi_panel_update_pps(struct dsi_panel *panel)
  3923. {
  3924. int rc = 0;
  3925. struct dsi_panel_cmd_set *set = NULL;
  3926. struct dsi_display_mode_priv_info *priv_info = NULL;
  3927. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3928. /* Do not use QC PPS -> add PPS cmds in on_seq */
  3929. return 0;
  3930. #endif
  3931. if (!panel || !panel->cur_mode) {
  3932. DSI_ERR("invalid params\n");
  3933. return -EINVAL;
  3934. }
  3935. mutex_lock(&panel->panel_lock);
  3936. priv_info = panel->cur_mode->priv_info;
  3937. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3938. if (priv_info->dsc_enabled)
  3939. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3940. panel->dce_pps_cmd, 0,
  3941. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3942. else if (priv_info->vdc_enabled)
  3943. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3944. panel->dce_pps_cmd, 0,
  3945. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3946. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3947. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3948. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3949. if (rc) {
  3950. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3951. goto error;
  3952. }
  3953. }
  3954. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3955. if (rc) {
  3956. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3957. panel->name, rc);
  3958. }
  3959. dsi_panel_destroy_cmd_packets(set);
  3960. error:
  3961. mutex_unlock(&panel->panel_lock);
  3962. return rc;
  3963. }
  3964. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3965. {
  3966. int rc = 0;
  3967. if (!panel) {
  3968. DSI_ERR("invalid params\n");
  3969. return -EINVAL;
  3970. }
  3971. mutex_lock(&panel->panel_lock);
  3972. if (!panel->panel_initialized)
  3973. goto exit;
  3974. /*
  3975. * Consider LP1->LP2->LP1.
  3976. * If the panel is already in LP mode, do not need to
  3977. * set the regulator.
  3978. * IBB and AB power mode would be set at the same time
  3979. * in PMIC driver, so we only call ibb setting that is enough.
  3980. */
  3981. if (dsi_panel_is_type_oled(panel) &&
  3982. panel->power_mode != SDE_MODE_DPMS_LP2)
  3983. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3984. "ibb", REGULATOR_MODE_IDLE);
  3985. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3986. if (rc)
  3987. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3988. panel->name, rc);
  3989. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  3990. ss_panel_low_power_config(panel->panel_private, true);
  3991. #endif
  3992. exit:
  3993. mutex_unlock(&panel->panel_lock);
  3994. return rc;
  3995. }
  3996. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3997. {
  3998. int rc = 0;
  3999. if (!panel) {
  4000. DSI_ERR("invalid params\n");
  4001. return -EINVAL;
  4002. }
  4003. mutex_lock(&panel->panel_lock);
  4004. if (!panel->panel_initialized)
  4005. goto exit;
  4006. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  4007. if (rc)
  4008. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  4009. panel->name, rc);
  4010. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4011. ss_panel_low_power_config(panel->panel_private, true);
  4012. #endif
  4013. exit:
  4014. mutex_unlock(&panel->panel_lock);
  4015. return rc;
  4016. }
  4017. int dsi_panel_set_nolp(struct dsi_panel *panel)
  4018. {
  4019. int rc = 0;
  4020. if (!panel) {
  4021. DSI_ERR("invalid params\n");
  4022. return -EINVAL;
  4023. }
  4024. mutex_lock(&panel->panel_lock);
  4025. if (!panel->panel_initialized)
  4026. goto exit;
  4027. /*
  4028. * Consider about LP1->LP2->NOLP.
  4029. */
  4030. if (dsi_panel_is_type_oled(panel) &&
  4031. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4032. panel->power_mode == SDE_MODE_DPMS_LP2))
  4033. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4034. "ibb", REGULATOR_MODE_NORMAL);
  4035. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  4036. if (rc)
  4037. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  4038. panel->name, rc);
  4039. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4040. ss_panel_low_power_config(panel->panel_private, false);
  4041. #endif
  4042. exit:
  4043. mutex_unlock(&panel->panel_lock);
  4044. return rc;
  4045. }
  4046. int dsi_panel_prepare(struct dsi_panel *panel)
  4047. {
  4048. int rc = 0;
  4049. if (!panel) {
  4050. DSI_ERR("invalid params\n");
  4051. return -EINVAL;
  4052. }
  4053. mutex_lock(&panel->panel_lock);
  4054. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4055. ss_panel_power_on_post_lp11(panel->panel_private);
  4056. #endif
  4057. if (panel->lp11_init) {
  4058. rc = dsi_panel_power_on(panel);
  4059. if (rc) {
  4060. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  4061. panel->name, rc);
  4062. goto error;
  4063. }
  4064. }
  4065. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  4066. if (rc) {
  4067. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  4068. panel->name, rc);
  4069. goto error;
  4070. }
  4071. error:
  4072. mutex_unlock(&panel->panel_lock);
  4073. return rc;
  4074. }
  4075. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  4076. struct dsi_rect *roi, int ctrl_idx, int unicast)
  4077. {
  4078. static const int ROI_CMD_LEN = 5;
  4079. int rc = 0;
  4080. /* DTYPE_DCS_LWRITE */
  4081. char *caset, *paset;
  4082. set->cmds = NULL;
  4083. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  4084. if (!caset) {
  4085. rc = -ENOMEM;
  4086. goto exit;
  4087. }
  4088. caset[0] = 0x2a;
  4089. caset[1] = (roi->x & 0xFF00) >> 8;
  4090. caset[2] = roi->x & 0xFF;
  4091. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  4092. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  4093. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  4094. if (!paset) {
  4095. rc = -ENOMEM;
  4096. goto error_free_mem;
  4097. }
  4098. paset[0] = 0x2b;
  4099. paset[1] = (roi->y & 0xFF00) >> 8;
  4100. paset[2] = roi->y & 0xFF;
  4101. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  4102. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  4103. set->type = DSI_CMD_SET_ROI;
  4104. set->state = DSI_CMD_SET_STATE_LP;
  4105. set->count = 2; /* send caset + paset together */
  4106. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  4107. if (!set->cmds) {
  4108. rc = -ENOMEM;
  4109. goto error_free_mem;
  4110. }
  4111. set->cmds[0].msg.channel = 0;
  4112. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  4113. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  4114. set->cmds[0].msg.flags |= MIPI_DSI_MSG_BATCH_COMMAND;
  4115. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  4116. set->cmds[0].msg.tx_buf = caset;
  4117. set->cmds[0].msg.rx_len = 0;
  4118. set->cmds[0].msg.rx_buf = 0;
  4119. set->cmds[0].last_command = 0;
  4120. set->cmds[0].post_wait_ms = 0;
  4121. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  4122. set->cmds[1].msg.channel = 0;
  4123. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  4124. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  4125. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  4126. set->cmds[1].msg.tx_buf = paset;
  4127. set->cmds[1].msg.rx_len = 0;
  4128. set->cmds[1].msg.rx_buf = 0;
  4129. set->cmds[1].last_command = 1;
  4130. set->cmds[1].post_wait_ms = 0;
  4131. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  4132. goto exit;
  4133. error_free_mem:
  4134. kfree(caset);
  4135. kfree(paset);
  4136. kfree(set->cmds);
  4137. exit:
  4138. return rc;
  4139. }
  4140. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  4141. int ctrl_idx)
  4142. {
  4143. int rc = 0;
  4144. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4145. struct samsung_display_driver_data *vdd;
  4146. #endif
  4147. if (!panel) {
  4148. DSI_ERR("invalid params\n");
  4149. return -EINVAL;
  4150. }
  4151. mutex_lock(&panel->panel_lock);
  4152. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4153. DSI_INFO("ctrl:%d qsync on\n", ctrl_idx);
  4154. vdd = panel->panel_private;
  4155. if (vdd) {
  4156. if (!SS_IS_CMDS_NULL(ss_get_cmds(vdd, TX_EARLY_TE))) {
  4157. vdd->early_te = true;
  4158. vdd->check_early_te = CHECK_EARLY_TE_COUNT;
  4159. if (vdd->panel_state != PANEL_PWR_LPM)
  4160. ss_send_cmd(vdd, TX_EARLY_TE);
  4161. }
  4162. }
  4163. #else
  4164. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  4165. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  4166. if (rc)
  4167. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  4168. panel->name, rc);
  4169. #endif
  4170. mutex_unlock(&panel->panel_lock);
  4171. return rc;
  4172. }
  4173. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  4174. int ctrl_idx)
  4175. {
  4176. int rc = 0;
  4177. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4178. struct samsung_display_driver_data *vdd;
  4179. #endif
  4180. if (!panel) {
  4181. DSI_ERR("invalid params\n");
  4182. return -EINVAL;
  4183. }
  4184. mutex_lock(&panel->panel_lock);
  4185. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4186. DSI_INFO("ctrl:%d qsync off\n", ctrl_idx);
  4187. vdd = panel->panel_private;
  4188. if (vdd) {
  4189. if (!SS_IS_CMDS_NULL(ss_get_cmds(vdd, TX_EARLY_TE))) {
  4190. vdd->early_te = false;
  4191. if (vdd->panel_state != PANEL_PWR_LPM)
  4192. ss_send_cmd(vdd, TX_EARLY_TE);
  4193. }
  4194. }
  4195. #else
  4196. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  4197. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  4198. if (rc)
  4199. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  4200. panel->name, rc);
  4201. #endif
  4202. mutex_unlock(&panel->panel_lock);
  4203. return rc;
  4204. }
  4205. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  4206. struct dsi_rect *roi)
  4207. {
  4208. int rc = 0;
  4209. struct dsi_panel_cmd_set *set;
  4210. struct dsi_display_mode_priv_info *priv_info;
  4211. if (!panel || !panel->cur_mode) {
  4212. DSI_ERR("Invalid params\n");
  4213. return -EINVAL;
  4214. }
  4215. priv_info = panel->cur_mode->priv_info;
  4216. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  4217. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  4218. if (rc) {
  4219. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  4220. panel->name, rc);
  4221. return rc;
  4222. }
  4223. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  4224. roi->x, roi->y, roi->w, roi->h);
  4225. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  4226. mutex_lock(&panel->panel_lock);
  4227. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  4228. if (rc)
  4229. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  4230. panel->name, rc);
  4231. mutex_unlock(&panel->panel_lock);
  4232. dsi_panel_destroy_cmd_packets(set);
  4233. dsi_panel_dealloc_cmd_packets(set);
  4234. return rc;
  4235. }
  4236. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  4237. {
  4238. int rc = 0;
  4239. if (!panel) {
  4240. DSI_ERR("Invalid params\n");
  4241. return -EINVAL;
  4242. }
  4243. mutex_lock(&panel->panel_lock);
  4244. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  4245. if (rc)
  4246. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  4247. panel->name, rc);
  4248. mutex_unlock(&panel->panel_lock);
  4249. return rc;
  4250. }
  4251. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  4252. {
  4253. int rc = 0;
  4254. if (!panel) {
  4255. DSI_ERR("Invalid params\n");
  4256. return -EINVAL;
  4257. }
  4258. mutex_lock(&panel->panel_lock);
  4259. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  4260. if (rc)
  4261. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  4262. panel->name, rc);
  4263. mutex_unlock(&panel->panel_lock);
  4264. return rc;
  4265. }
  4266. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  4267. {
  4268. int rc = 0;
  4269. if (!panel) {
  4270. DSI_ERR("Invalid params\n");
  4271. return -EINVAL;
  4272. }
  4273. mutex_lock(&panel->panel_lock);
  4274. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  4275. if (rc)
  4276. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  4277. panel->name, rc);
  4278. mutex_unlock(&panel->panel_lock);
  4279. return rc;
  4280. }
  4281. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  4282. {
  4283. int rc = 0;
  4284. if (!panel) {
  4285. DSI_ERR("Invalid params\n");
  4286. return -EINVAL;
  4287. }
  4288. mutex_lock(&panel->panel_lock);
  4289. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  4290. if (rc)
  4291. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  4292. panel->name, rc);
  4293. mutex_unlock(&panel->panel_lock);
  4294. return rc;
  4295. }
  4296. int dsi_panel_switch(struct dsi_panel *panel)
  4297. {
  4298. int rc = 0;
  4299. if (!panel) {
  4300. DSI_ERR("Invalid params\n");
  4301. return -EINVAL;
  4302. }
  4303. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4304. if (panel->panel_private) {
  4305. struct samsung_display_driver_data *vdd = panel->panel_private;
  4306. if (vdd->vrr.support_vrr_based_bl) {
  4307. /* Sometimes, GFX HAL sends DMS that inlcudes multi resolution and VRR,
  4308. * at one DMS commands. So, always handler DMS here.
  4309. */
  4310. ss_panel_dms_switch(vdd);
  4311. return 0;
  4312. }
  4313. /* In QCT original VRR mode, below variables is meaningless..
  4314. * But, to keep latest information for debugging,
  4315. * update current vrr variables.
  4316. */
  4317. vdd->vrr.cur_refresh_rate = vdd->vrr.adjusted_refresh_rate;
  4318. vdd->vrr.cur_sot_hs_mode = vdd->vrr.adjusted_sot_hs_mode;
  4319. vdd->vrr.cur_phs_mode = vdd->vrr.adjusted_phs_mode;
  4320. vdd->vrr.cur_h_active = vdd->vrr.adjusted_h_active;
  4321. vdd->vrr.cur_v_active = vdd->vrr.adjusted_v_active;
  4322. /* Do we have to change param only when the HS<->NORMAL be changed?
  4323. * No problem to notify VRR change in panel not supporting VRR?
  4324. */
  4325. ss_set_vrr_switch(vdd, true);
  4326. }
  4327. #endif
  4328. mutex_lock(&panel->panel_lock);
  4329. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  4330. if (rc)
  4331. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  4332. panel->name, rc);
  4333. mutex_unlock(&panel->panel_lock);
  4334. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4335. ss_send_cmd(panel->panel_private, TX_TIMING_SWITCH);
  4336. #endif
  4337. return rc;
  4338. }
  4339. int dsi_panel_post_switch(struct dsi_panel *panel)
  4340. {
  4341. int rc = 0;
  4342. if (!panel) {
  4343. DSI_ERR("Invalid params\n");
  4344. return -EINVAL;
  4345. }
  4346. mutex_lock(&panel->panel_lock);
  4347. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  4348. if (rc)
  4349. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  4350. panel->name, rc);
  4351. mutex_unlock(&panel->panel_lock);
  4352. return rc;
  4353. }
  4354. int dsi_panel_enable(struct dsi_panel *panel)
  4355. {
  4356. int rc = 0;
  4357. if (!panel) {
  4358. DSI_ERR("Invalid params\n");
  4359. return -EINVAL;
  4360. }
  4361. mutex_lock(&panel->panel_lock);
  4362. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  4363. if (rc) {
  4364. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  4365. panel->name, rc);
  4366. goto error;
  4367. }
  4368. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  4369. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  4370. if (rc) {
  4371. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  4372. panel->name, rc);
  4373. goto error;
  4374. }
  4375. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  4376. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  4377. if (rc) {
  4378. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  4379. panel->name, rc);
  4380. goto error;
  4381. }
  4382. }
  4383. panel->panel_initialized = true;
  4384. error:
  4385. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4386. ss_panel_on(panel->panel_private);
  4387. #endif
  4388. mutex_unlock(&panel->panel_lock);
  4389. return rc;
  4390. }
  4391. int dsi_panel_post_enable(struct dsi_panel *panel)
  4392. {
  4393. int rc = 0;
  4394. if (!panel) {
  4395. DSI_ERR("invalid params\n");
  4396. return -EINVAL;
  4397. }
  4398. mutex_lock(&panel->panel_lock);
  4399. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  4400. if (rc) {
  4401. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  4402. panel->name, rc);
  4403. goto error;
  4404. }
  4405. error:
  4406. mutex_unlock(&panel->panel_lock);
  4407. return rc;
  4408. }
  4409. int dsi_panel_pre_disable(struct dsi_panel *panel)
  4410. {
  4411. int rc = 0;
  4412. if (!panel) {
  4413. DSI_ERR("invalid params\n");
  4414. return -EINVAL;
  4415. }
  4416. mutex_lock(&panel->panel_lock);
  4417. if (gpio_is_valid(panel->bl_config.en_gpio))
  4418. gpio_set_value(panel->bl_config.en_gpio, 0);
  4419. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4420. ss_panel_off_pre(panel->panel_private);
  4421. #endif
  4422. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  4423. if (rc) {
  4424. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  4425. panel->name, rc);
  4426. goto error;
  4427. }
  4428. error:
  4429. mutex_unlock(&panel->panel_lock);
  4430. return rc;
  4431. }
  4432. int dsi_panel_disable(struct dsi_panel *panel)
  4433. {
  4434. int rc = 0;
  4435. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4436. struct samsung_display_driver_data *vdd;
  4437. #endif
  4438. if (!panel) {
  4439. DSI_ERR("invalid params\n");
  4440. return -EINVAL;
  4441. }
  4442. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4443. vdd = panel->panel_private;
  4444. LCD_INFO(vdd, "++\n");
  4445. #endif
  4446. mutex_lock(&panel->panel_lock);
  4447. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4448. if (!ss_panel_attach_get(panel->panel_private)) {
  4449. LCD_INFO(vdd, "PBA booting, skip to disable panel\n");
  4450. goto skip_cmd_tx;
  4451. }
  4452. #endif
  4453. /* Avoid sending panel off commands when ESD recovery is underway */
  4454. if (!atomic_read(&panel->esd_recovery_pending)) {
  4455. /*
  4456. * Need to set IBB/AB regulator mode to STANDBY,
  4457. * if panel is going off from AOD mode.
  4458. */
  4459. if (dsi_panel_is_type_oled(panel) &&
  4460. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4461. panel->power_mode == SDE_MODE_DPMS_LP2))
  4462. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4463. "ibb", REGULATOR_MODE_STANDBY);
  4464. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4465. if (rc) {
  4466. /*
  4467. * Sending panel off commands may fail when DSI
  4468. * controller is in a bad state. These failures can be
  4469. * ignored since controller will go for full reset on
  4470. * subsequent display enable anyway.
  4471. */
  4472. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4473. panel->name, rc);
  4474. rc = 0;
  4475. }
  4476. }
  4477. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4478. skip_cmd_tx:
  4479. ss_panel_off_post(panel->panel_private);
  4480. #endif
  4481. panel->panel_initialized = false;
  4482. panel->power_mode = SDE_MODE_DPMS_OFF;
  4483. mutex_unlock(&panel->panel_lock);
  4484. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4485. LCD_INFO(vdd, "--\n");
  4486. #endif
  4487. return rc;
  4488. }
  4489. int dsi_panel_unprepare(struct dsi_panel *panel)
  4490. {
  4491. int rc = 0;
  4492. if (!panel) {
  4493. DSI_ERR("invalid params\n");
  4494. return -EINVAL;
  4495. }
  4496. mutex_lock(&panel->panel_lock);
  4497. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4498. if (rc) {
  4499. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4500. panel->name, rc);
  4501. goto error;
  4502. }
  4503. error:
  4504. #if IS_ENABLED(CONFIG_DISPLAY_SAMSUNG)
  4505. ss_panel_power_off_pre_lp11(panel->panel_private);
  4506. #endif
  4507. mutex_unlock(&panel->panel_lock);
  4508. return rc;
  4509. }
  4510. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4511. {
  4512. int rc = 0;
  4513. if (!panel) {
  4514. DSI_ERR("invalid params\n");
  4515. return -EINVAL;
  4516. }
  4517. mutex_lock(&panel->panel_lock);
  4518. rc = dsi_panel_power_off(panel);
  4519. if (rc) {
  4520. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4521. panel->name, rc);
  4522. goto error;
  4523. }
  4524. error:
  4525. mutex_unlock(&panel->panel_lock);
  4526. return rc;
  4527. }