msm_common.c 36 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/gpio.h>
  7. #include <linux/of_gpio.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/slab.h>
  10. #include <linux/of_device.h>
  11. #include <linux/arch_topology.h>
  12. #include <sound/control.h>
  13. #include <sound/core.h>
  14. #include <sound/soc.h>
  15. #include <sound/pcm_params.h>
  16. #include <asoc/msm-cdc-pinctrl.h>
  17. #include <dsp/spf-core.h>
  18. #include <dsp/msm_audio_ion.h>
  19. #include <sound/info.h>
  20. #include <dsp/audio_prm.h>
  21. #include <dsp/digital-cdc-rsc-mgr.h>
  22. #include <linux/sched/walt.h>
  23. #include "msm_common.h"
  24. #ifndef topology_cluster_id
  25. #define topology_cluster_id(cpu) topology_physical_package_id(cpu)
  26. #endif
  27. struct snd_card_pdata {
  28. struct kobject snd_card_kobj;
  29. int card_status;
  30. }*snd_card_pdata;
  31. #define to_asoc_mach_common_pdata(kobj) \
  32. container_of((kobj), struct msm_common_pdata, aud_dev_kobj)
  33. #define DEVICE_ENABLE 1
  34. #define DEVICE_DISABLE 0
  35. #define ARRAY_SZ 21
  36. #define BUF_SZ 32
  37. #define DIR_SZ 10
  38. #define MAX_CODEC_DAI 8
  39. #define TDM_SLOT_WIDTH_BITS 32
  40. #define TDM_MAX_SLOTS 8
  41. #define MI2S_NUM_CHANNELS 2
  42. #define SAMPLING_RATE_44P1KHZ 44100
  43. #define SAMPLING_RATE_88P2KHZ 88200
  44. #define SAMPLING_RATE_176P4KHZ 176400
  45. #define SAMPLING_RATE_352P8KHZ 352800
  46. struct mutex vote_against_sleep_lock;
  47. static struct attribute device_state_attr = {
  48. .name = "state",
  49. .mode = 0660,
  50. };
  51. static struct attribute card_state_attr = {
  52. .name = "card_state",
  53. .mode = 0660,
  54. };
  55. #define MAX_PORT 20
  56. #define CODEC_CHMAP "Channel Map"
  57. enum backend_id {
  58. SLIM = 1,
  59. CODEC_DMA,
  60. };
  61. struct chmap_pdata {
  62. int id;
  63. uint32_t num_codec_dai;
  64. struct snd_soc_dai *dai[MAX_CODEC_DAI];
  65. };
  66. static const struct snd_pcm_hardware dummy_dma_hardware = {
  67. /* Random values to keep userspace happy when checking constraints */
  68. .info = SNDRV_PCM_INFO_INTERLEAVED |
  69. SNDRV_PCM_INFO_BLOCK_TRANSFER,
  70. .buffer_bytes_max = 128*1024,
  71. .period_bytes_min = PAGE_SIZE,
  72. .period_bytes_max = PAGE_SIZE*2,
  73. .periods_min = 2,
  74. .periods_max = 128,
  75. };
  76. #define MAX_USR_INPUT 10
  77. #define MAX_CPU_CLUSTER 4 /* Silver, Gold, T, Prime */
  78. static int qos_vote_status;
  79. static uint8_t cpu_vote_mask;
  80. static bool lpi_pcm_logging_enable;
  81. static bool vote_against_sleep_enable;
  82. static unsigned int vote_against_sleep_cnt;
  83. static struct dev_pm_qos_request latency_pm_qos_req; /* pm_qos request */
  84. static unsigned int qos_client_active_cnt;
  85. static int cluster_first_cpu[MAX_CPU_CLUSTER] = {-1, };
  86. static struct dev_pm_qos_request *msm_audio_req = NULL;
  87. static bool kregister_pm_qos_latency_controls = false;
  88. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  89. static ssize_t aud_dev_sysfs_store(struct kobject *kobj,
  90. struct attribute *attr,
  91. const char *buf, size_t count)
  92. {
  93. ssize_t ret = -EINVAL;
  94. struct msm_common_pdata *pdata = to_asoc_mach_common_pdata(kobj);
  95. uint32_t pcm_id, state = 0;
  96. if (count > MAX_USR_INPUT) {
  97. pr_err("%s: invalid string written", __func__);
  98. goto done;
  99. }
  100. sscanf(buf, "%d %d", &pcm_id, &state);
  101. if ((pcm_id >= pdata->num_aud_devs) || (pcm_id < 0)) {
  102. pr_err("%s: invalid pcm id %d \n", __func__, pcm_id);
  103. goto done;
  104. }
  105. if ((state > DEVICE_ENABLE) || (state < DEVICE_DISABLE)) {
  106. pr_err("%s: invalid state %d \n", __func__, state);
  107. goto done;
  108. }
  109. pr_debug("%s: pcm_id %d state %d \n", __func__, pcm_id, state);
  110. pdata->aud_dev_state[pcm_id] = state;
  111. ret = count;
  112. done:
  113. return ret;
  114. }
  115. static const struct sysfs_ops aud_dev_sysfs_ops = {
  116. .store = aud_dev_sysfs_store,
  117. };
  118. static struct kobj_type aud_dev_ktype = {
  119. .sysfs_ops = &aud_dev_sysfs_ops,
  120. };
  121. static int aud_dev_sysfs_init(struct msm_common_pdata *pdata)
  122. {
  123. int ret = 0;
  124. char dir[10] = "aud_dev";
  125. ret = kobject_init_and_add(&pdata->aud_dev_kobj, &aud_dev_ktype,
  126. kernel_kobj, dir);
  127. if (ret < 0) {
  128. pr_err("%s: Failed to add kobject %s, err = %d\n",
  129. __func__, dir, ret);
  130. goto done;
  131. }
  132. ret = sysfs_create_file(&pdata->aud_dev_kobj, &device_state_attr);
  133. if (ret < 0) {
  134. pr_err("%s: Failed to add wdsp_boot sysfs entry to %s\n",
  135. __func__, dir);
  136. goto fail_create_file;
  137. }
  138. return ret;
  139. fail_create_file:
  140. kobject_put(&pdata->aud_dev_kobj);
  141. done:
  142. return ret;
  143. }
  144. int snd_card_notify_user(snd_card_status_t card_status)
  145. {
  146. snd_card_pdata->card_status = card_status;
  147. sysfs_notify(&snd_card_pdata->snd_card_kobj, NULL, "card_state");
  148. if (card_status == 0) {
  149. mutex_lock(&vote_against_sleep_lock);
  150. vote_against_sleep_cnt = 0;
  151. pr_debug("%s: SSR/PDR triggered reset vote_against_sleep_cnt = %d\n",
  152. __func__, vote_against_sleep_cnt);
  153. mutex_unlock(&vote_against_sleep_lock);
  154. }
  155. return 0;
  156. }
  157. int snd_card_set_card_status(snd_card_status_t card_status)
  158. {
  159. snd_card_pdata->card_status = card_status;
  160. return 0;
  161. }
  162. static ssize_t snd_card_sysfs_show(struct kobject *kobj,
  163. struct attribute *attr, char *buf)
  164. {
  165. return snprintf(buf, BUF_SZ, "%d", snd_card_pdata->card_status);
  166. }
  167. static ssize_t snd_card_sysfs_store(struct kobject *kobj,
  168. struct attribute *attr, const char *buf, size_t count)
  169. {
  170. sscanf(buf, "%d", &snd_card_pdata->card_status);
  171. sysfs_notify(&snd_card_pdata->snd_card_kobj, NULL, "card_state");
  172. return 0;
  173. }
  174. static const struct sysfs_ops snd_card_sysfs_ops = {
  175. .show = snd_card_sysfs_show,
  176. .store = snd_card_sysfs_store,
  177. };
  178. static struct kobj_type snd_card_ktype = {
  179. .sysfs_ops = &snd_card_sysfs_ops,
  180. };
  181. int snd_card_sysfs_init(void)
  182. {
  183. int ret = 0;
  184. char dir[DIR_SZ] = "snd_card";
  185. snd_card_pdata = kcalloc(1, sizeof(struct snd_card_pdata), GFP_KERNEL);
  186. ret = kobject_init_and_add(&snd_card_pdata->snd_card_kobj, &snd_card_ktype,
  187. kernel_kobj, dir);
  188. if (ret < 0) {
  189. pr_err("%s: Failed to add kobject %s, err = %d\n",
  190. __func__, dir, ret);
  191. goto done;
  192. }
  193. ret = sysfs_create_file(&snd_card_pdata->snd_card_kobj, &card_state_attr);
  194. if (ret < 0) {
  195. pr_err("%s: Failed to add snd_card sysfs entry to %s\n",
  196. __func__, dir);
  197. goto fail_create_file;
  198. }
  199. return ret;
  200. fail_create_file:
  201. kobject_put(&snd_card_pdata->snd_card_kobj);
  202. done:
  203. return ret;
  204. }
  205. static int get_mi2s_tdm_auxpcm_intf_index(const char *stream_name)
  206. {
  207. if (!strnstr(stream_name, "TDM", strlen(stream_name)) &&
  208. !strnstr(stream_name, "MI2S", strlen(stream_name)) &&
  209. !strnstr(stream_name, "AUXPCM", strlen(stream_name)))
  210. return -EINVAL;
  211. if (strnstr(stream_name, "LPAIF_RXTX", strlen(stream_name)))
  212. return QUAT_MI2S_TDM_AUXPCM;
  213. else if (strnstr(stream_name, "LPAIF_WSA", strlen(stream_name)))
  214. return SEN_MI2S_TDM_AUXPCM;
  215. else if (strnstr(stream_name, "LPAIF_VA", strlen(stream_name)))
  216. return QUIN_MI2S_TDM_AUXPCM;
  217. else if (strnstr(stream_name, "LPAIF_AUD", strlen(stream_name))){
  218. if (strnstr(stream_name, "PRIMARY", strlen(stream_name)))
  219. return SEP_MI2S_TDM_AUXPCM;
  220. else if (strnstr(stream_name, "SECONDARY", strlen(stream_name)))
  221. return TER_MI2S_TDM_AUXPCM;
  222. }
  223. else if (strnstr(stream_name, "LPAIF", strlen(stream_name))) {
  224. if (strnstr(stream_name, "PRIMARY", strlen(stream_name)))
  225. return PRI_MI2S_TDM_AUXPCM;
  226. else if (strnstr(stream_name, "SECONDARY", strlen(stream_name)))
  227. return SEC_MI2S_TDM_AUXPCM;
  228. }
  229. pr_debug("%s: stream name %s does not match\n", __func__, stream_name);
  230. return -EINVAL;
  231. }
  232. static bool is_fractional_sample_rate(unsigned int sample_rate)
  233. {
  234. switch (sample_rate) {
  235. case SAMPLING_RATE_44P1KHZ:
  236. case SAMPLING_RATE_88P2KHZ:
  237. case SAMPLING_RATE_176P4KHZ:
  238. case SAMPLING_RATE_352P8KHZ:
  239. return true;
  240. default:
  241. return false;
  242. }
  243. return false;
  244. }
  245. static int get_mi2s_clk_id(int index)
  246. {
  247. int clk_id = -EINVAL;
  248. switch(index) {
  249. case PRI_MI2S_TDM_AUXPCM:
  250. clk_id = CLOCK_ID_PRI_MI2S_IBIT;
  251. break;
  252. case SEC_MI2S_TDM_AUXPCM:
  253. clk_id = CLOCK_ID_SEC_MI2S_IBIT;
  254. break;
  255. case TER_MI2S_TDM_AUXPCM:
  256. clk_id = CLOCK_ID_TER_MI2S_IBIT;
  257. break;
  258. case QUAT_MI2S_TDM_AUXPCM:
  259. clk_id = CLOCK_ID_QUAD_MI2S_IBIT;
  260. break;
  261. case QUIN_MI2S_TDM_AUXPCM:
  262. clk_id = CLOCK_ID_QUI_MI2S_IBIT;
  263. break;
  264. case SEN_MI2S_TDM_AUXPCM:
  265. clk_id = CLOCK_ID_SEN_MI2S_IBIT;
  266. break;
  267. case SEP_MI2S_TDM_AUXPCM:
  268. clk_id = CLOCK_ID_SEP_MI2S_IBIT;
  269. break;
  270. default:
  271. pr_err("%s: Invalid interface index: %d\n", __func__, index);
  272. }
  273. pr_debug("%s: clk id: %d\n", __func__, clk_id);
  274. return clk_id;
  275. }
  276. static int get_tdm_clk_id(int index)
  277. {
  278. int clk_id = -EINVAL;
  279. switch(index) {
  280. case PRI_MI2S_TDM_AUXPCM:
  281. clk_id = CLOCK_ID_PRI_TDM_IBIT;
  282. break;
  283. case SEC_MI2S_TDM_AUXPCM:
  284. clk_id = CLOCK_ID_SEC_TDM_IBIT;
  285. break;
  286. case TER_MI2S_TDM_AUXPCM:
  287. clk_id = CLOCK_ID_TER_TDM_IBIT;
  288. break;
  289. case QUAT_MI2S_TDM_AUXPCM:
  290. clk_id = CLOCK_ID_QUAD_TDM_IBIT;
  291. break;
  292. case QUIN_MI2S_TDM_AUXPCM:
  293. clk_id = CLOCK_ID_QUI_TDM_IBIT;
  294. break;
  295. case SEN_MI2S_TDM_AUXPCM:
  296. clk_id = CLOCK_ID_SEN_TDM_IBIT;
  297. break;
  298. case SEP_MI2S_TDM_AUXPCM:
  299. clk_id = CLOCK_ID_SEP_TDM_IBIT;
  300. break;
  301. default:
  302. pr_err("%s: Invalid interface index: %d\n", __func__, index);
  303. }
  304. pr_debug("%s: clk id: %d\n", __func__, clk_id);
  305. return clk_id;
  306. }
  307. int mi2s_tdm_hw_vote_req(struct msm_common_pdata *pdata, int enable)
  308. {
  309. int ret = 0;
  310. if (!pdata || (pdata->lpass_audio_hw_vote == NULL)) {
  311. pr_err("%s: pdata or lpass audio hw vote node NULL", __func__);
  312. return -EINVAL;
  313. }
  314. pr_debug("%s: lpass audio hw vote for fractional sample rate enable: %d\n",
  315. __func__, enable);
  316. if (enable) {
  317. if (atomic_read(&pdata->lpass_audio_hw_vote_ref_cnt) == 0) {
  318. ret = digital_cdc_rsc_mgr_hw_vote_enable(pdata->lpass_audio_hw_vote, NULL);
  319. if (ret < 0) {
  320. pr_err("%s lpass audio hw vote enable failed %d\n",
  321. __func__, ret);
  322. return ret;
  323. }
  324. }
  325. atomic_inc(&pdata->lpass_audio_hw_vote_ref_cnt);
  326. } else {
  327. atomic_dec(&pdata->lpass_audio_hw_vote_ref_cnt);
  328. if (atomic_read(&pdata->lpass_audio_hw_vote_ref_cnt) == 0)
  329. digital_cdc_rsc_mgr_hw_vote_disable(pdata->lpass_audio_hw_vote, NULL);
  330. else if (atomic_read(&pdata->lpass_audio_hw_vote_ref_cnt) < 0)
  331. atomic_set(&pdata->lpass_audio_hw_vote_ref_cnt, 0);
  332. }
  333. return ret;
  334. }
  335. int msm_common_snd_hw_params(struct snd_pcm_substream *substream,
  336. struct snd_pcm_hw_params *params)
  337. {
  338. int ret = 0;
  339. int slot_width = TDM_SLOT_WIDTH_BITS;
  340. int slots;
  341. int sample_width;
  342. unsigned int rate;
  343. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  344. const char *stream_name = rtd->dai_link->stream_name;
  345. struct snd_soc_card *card = rtd->card;
  346. struct msm_common_pdata *pdata = msm_common_get_pdata(card);
  347. int index = get_mi2s_tdm_auxpcm_intf_index(stream_name);
  348. struct clk_cfg intf_clk_cfg;
  349. //#ifdef CONFIG_COMMON_AMP_CIRRUS
  350. #if 1
  351. struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
  352. unsigned int num_codecs = rtd->dai_link->num_codecs;
  353. int i;
  354. #endif
  355. dev_dbg(rtd->card->dev,
  356. "%s: substream = %s stream = %d\n",
  357. __func__, substream->name, substream->stream);
  358. if (!pdata) {
  359. dev_err(rtd->card->dev, "%s: pdata is NULL\n", __func__);
  360. return -EINVAL;
  361. }
  362. if (index >= 0) {
  363. mutex_lock(&pdata->lock[index]);
  364. if (atomic_read(&pdata->lpass_intf_clk_ref_cnt[index]) == 0) {
  365. if ((strnstr(stream_name, "TDM", strlen(stream_name)))) {
  366. slots = pdata->tdm_max_slots;
  367. rate = params_rate(params);
  368. ret = get_tdm_clk_id(index);
  369. if ( ret < 0)
  370. goto done;
  371. intf_clk_cfg.clk_id = ret;
  372. intf_clk_cfg.clk_freq_in_hz = rate * slot_width * slots;
  373. intf_clk_cfg.clk_attri = pdata->tdm_clk_attribute[index];
  374. intf_clk_cfg.clk_root = 0;
  375. if (pdata->is_audio_hw_vote_required[index] &&
  376. (is_fractional_sample_rate(rate) ||
  377. (index == QUIN_MI2S_TDM_AUXPCM))) {
  378. ret = mi2s_tdm_hw_vote_req(pdata, 1);
  379. if (ret < 0) {
  380. pr_err("%s lpass audio hw vote enable failed %d\n",
  381. __func__, ret);
  382. goto done;
  383. }
  384. }
  385. pr_debug("%s: clk_id :%d clk freq %d\n", __func__,
  386. intf_clk_cfg.clk_id, intf_clk_cfg.clk_freq_in_hz);
  387. ret = audio_prm_set_lpass_clk_cfg(&intf_clk_cfg, 1);
  388. if (ret < 0) {
  389. pr_err("%s: prm lpass tdm clk cfg set failed ret %d\n",
  390. __func__, ret);
  391. goto done;
  392. }
  393. //#ifdef CONFIG_COMMON_AMP_CIRRUS
  394. #if 1
  395. for (i = 0; i < num_codecs; i++) {
  396. codec_dai = asoc_rtd_to_codec(rtd, i);
  397. ret = snd_soc_dai_set_sysclk(codec_dai, 0,
  398. intf_clk_cfg.clk_freq_in_hz, SND_SOC_CLOCK_IN);
  399. if (ret < 0)
  400. pr_err("%s: failed to set codec tdm clk, err:%d\n",
  401. __func__, ret);
  402. ret = snd_soc_component_set_sysclk(codec_dai->component,
  403. CLK_SRC_SCLK, 0, intf_clk_cfg.clk_freq_in_hz, SND_SOC_CLOCK_IN);
  404. if (ret < 0)
  405. pr_err("%s: failed to set component sys clk, err:%d\n",
  406. __func__, ret);
  407. ret = snd_soc_dai_set_tdm_slot(codec_dai, 0, 0, 0, 32);
  408. if (ret < 0)
  409. pr_err("%s: failed to set tdm slot, err:%d\n",
  410. __func__, ret);
  411. }
  412. #endif
  413. } else if ((strnstr(stream_name, "MI2S", strlen(stream_name)))) {
  414. ret = get_mi2s_clk_id(index);
  415. if (ret < 0)
  416. goto done;
  417. intf_clk_cfg.clk_id = ret;
  418. rate = params_rate(params);
  419. switch (params_format(params)) {
  420. case SNDRV_PCM_FORMAT_S24_LE:
  421. case SNDRV_PCM_FORMAT_S24_3LE:
  422. case SNDRV_PCM_FORMAT_S32_LE:
  423. sample_width = 32;
  424. break;
  425. case SNDRV_PCM_FORMAT_S16_LE:
  426. default:
  427. sample_width = 16;
  428. pr_debug("%s: bitwidth set to default : %d\n",
  429. __func__, sample_width);
  430. }
  431. intf_clk_cfg.clk_freq_in_hz = rate *
  432. MI2S_NUM_CHANNELS * sample_width;
  433. intf_clk_cfg.clk_attri = pdata->mi2s_clk_attribute[index];
  434. intf_clk_cfg.clk_root = CLOCK_ROOT_DEFAULT;
  435. if (pdata->is_audio_hw_vote_required[index] &&
  436. (is_fractional_sample_rate(rate) ||
  437. (index == QUIN_MI2S_TDM_AUXPCM))) {
  438. ret = mi2s_tdm_hw_vote_req(pdata, 1);
  439. if (ret < 0) {
  440. pr_err("%s lpass audio hw vote enable failed %d\n",
  441. __func__, ret);
  442. goto done;
  443. }
  444. }
  445. pr_debug("%s: mi2s clk_id :%d clk freq %d\n", __func__,
  446. intf_clk_cfg.clk_id, intf_clk_cfg.clk_freq_in_hz);
  447. ret = audio_prm_set_lpass_clk_cfg(&intf_clk_cfg, 1);
  448. if (ret < 0) {
  449. pr_err("%s: prm lpass mi2s clk cfg set failed ret %d\n",
  450. __func__, ret);
  451. goto done;
  452. }
  453. } else {
  454. pr_err("%s: unsupported stream name: %s\n",
  455. __func__, stream_name);
  456. goto done;
  457. }
  458. }
  459. atomic_inc(&pdata->lpass_intf_clk_ref_cnt[index]);
  460. done:
  461. mutex_unlock(&pdata->lock[index]);
  462. }
  463. return ret;
  464. }
  465. int msm_common_snd_startup(struct snd_pcm_substream *substream)
  466. {
  467. int ret = 0;
  468. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  469. struct snd_soc_card *card = rtd->card;
  470. struct msm_common_pdata *pdata = msm_common_get_pdata(card);
  471. const char *stream_name = rtd->dai_link->stream_name;
  472. int index = get_mi2s_tdm_auxpcm_intf_index(stream_name);
  473. dev_dbg(rtd->card->dev,
  474. "%s: substream = %s stream = %d\n",
  475. __func__, substream->name, substream->stream);
  476. if (!pdata) {
  477. dev_err(rtd->card->dev, "%s: pdata is NULL\n", __func__);
  478. return -EINVAL;
  479. }
  480. if (!rtd->dai_link->no_pcm)
  481. snd_soc_set_runtime_hwparams(substream, &dummy_dma_hardware);
  482. if (index >= 0) {
  483. mutex_lock(&pdata->lock[index]);
  484. if (pdata->mi2s_gpio_p[index]) {
  485. if (atomic_read(&(pdata->mi2s_gpio_ref_cnt[index])) == 0) {
  486. ret = msm_cdc_pinctrl_select_active_state(
  487. pdata->mi2s_gpio_p[index]);
  488. if (ret) {
  489. pr_err("%s:pinctrl set actve fail with %d\n",
  490. __func__, ret);
  491. goto done;
  492. }
  493. }
  494. atomic_inc(&(pdata->mi2s_gpio_ref_cnt[index]));
  495. }
  496. done:
  497. mutex_unlock(&pdata->lock[index]);
  498. }
  499. return ret;
  500. }
  501. void msm_common_snd_shutdown(struct snd_pcm_substream *substream)
  502. {
  503. int ret;
  504. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  505. struct snd_soc_card *card = rtd->card;
  506. struct msm_common_pdata *pdata = msm_common_get_pdata(card);
  507. struct snd_pcm_runtime *runtime = substream->runtime;
  508. const char *stream_name = rtd->dai_link->stream_name;
  509. int index = get_mi2s_tdm_auxpcm_intf_index(stream_name);
  510. struct clk_cfg intf_clk_cfg;
  511. unsigned int rate = runtime->rate;
  512. memset(&intf_clk_cfg, 0, sizeof(struct clk_cfg));
  513. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  514. substream->name, substream->stream);
  515. if (!pdata) {
  516. dev_err(card->dev, "%s: pdata is NULL\n", __func__);
  517. return;
  518. }
  519. if (index >= 0) {
  520. mutex_lock(&pdata->lock[index]);
  521. atomic_dec(&pdata->lpass_intf_clk_ref_cnt[index]);
  522. if (atomic_read(&pdata->lpass_intf_clk_ref_cnt[index]) == 0) {
  523. if ((strnstr(stream_name, "TDM", strlen(stream_name)))) {
  524. ret = get_tdm_clk_id(index);
  525. if (ret > 0) {
  526. intf_clk_cfg.clk_id = ret;
  527. ret = audio_prm_set_lpass_clk_cfg(&intf_clk_cfg, 0);
  528. if (ret < 0)
  529. pr_err("%s: prm tdm clk cfg set failed ret %d\n",
  530. __func__, ret);
  531. }
  532. } else if((strnstr(stream_name, "MI2S", strlen(stream_name)))) {
  533. ret = get_mi2s_clk_id(index);
  534. if (ret > 0) {
  535. intf_clk_cfg.clk_id = ret;
  536. ret = audio_prm_set_lpass_clk_cfg(&intf_clk_cfg, 0);
  537. if (ret < 0)
  538. pr_err("%s: prm mi2s clk cfg disable failed ret %d\n",
  539. __func__, ret);
  540. }
  541. } else {
  542. pr_err("%s: unsupported stream name: %s\n",
  543. __func__, stream_name);
  544. }
  545. if (pdata->is_audio_hw_vote_required[index] &&
  546. (is_fractional_sample_rate(rate) ||
  547. (index == QUIN_MI2S_TDM_AUXPCM))) {
  548. ret = mi2s_tdm_hw_vote_req(pdata, 0);
  549. }
  550. } else if (atomic_read(&pdata->lpass_intf_clk_ref_cnt[index]) < 0) {
  551. atomic_set(&pdata->lpass_intf_clk_ref_cnt[index], 0);
  552. }
  553. if (pdata->mi2s_gpio_p[index]) {
  554. atomic_dec(&pdata->mi2s_gpio_ref_cnt[index]);
  555. if (atomic_read(&pdata->mi2s_gpio_ref_cnt[index]) == 0) {
  556. ret = msm_cdc_pinctrl_select_sleep_state(
  557. pdata->mi2s_gpio_p[index]);
  558. if (ret)
  559. dev_err(card->dev,
  560. "%s: pinctrl set actv fail %d\n",
  561. __func__, ret);
  562. } else if (atomic_read(&pdata->mi2s_gpio_ref_cnt[index]) < 0) {
  563. atomic_set(&pdata->mi2s_gpio_ref_cnt[index], 0);
  564. }
  565. }
  566. mutex_unlock(&pdata->lock[index]);
  567. }
  568. }
  569. static void msm_audio_add_qos_request(void)
  570. {
  571. int num_req = 0;
  572. int cpu = 0;
  573. int ret = 0;
  574. int cid, prev_cid = -1;
  575. int cluster_num = 0;
  576. cpumask_t *cluster_cpu_mask = NULL;
  577. msm_audio_req = kcalloc(num_possible_cpus(),
  578. sizeof(struct dev_pm_qos_request), GFP_KERNEL);
  579. if (!msm_audio_req)
  580. return;
  581. for_each_cpu(cpu, cpu_possible_mask) {
  582. cid = topology_cluster_id(cpu);
  583. if (cid != prev_cid) {
  584. cluster_first_cpu[cluster_num++] = cpu;
  585. prev_cid = cid;
  586. }
  587. }
  588. /* Pick the first cluster as it represents the Silver cluster. */
  589. cluster_cpu_mask = topology_core_cpumask(cluster_first_cpu[0]);
  590. for_each_cpu(cpu, cluster_cpu_mask) {
  591. ret = dev_pm_qos_add_request(get_cpu_device(cpu),
  592. &msm_audio_req[cpu],
  593. DEV_PM_QOS_RESUME_LATENCY,
  594. PM_QOS_CPU_LATENCY_DEFAULT_VALUE);
  595. if (ret < 0) {
  596. pr_err("%s error (%d) adding resume latency to cpu %d.\n",
  597. __func__, ret, cpu);
  598. } else {
  599. cpu_vote_mask |= (1 << cpu);
  600. pr_debug("%s set cpu affinity to logical core %d.\n", __func__, cpu);
  601. }
  602. /* Limit the request to 2 silver cpu cores. */
  603. if (++num_req == 2)
  604. break;
  605. }
  606. }
  607. static void msm_audio_remove_qos_request(void)
  608. {
  609. int cpu = 0;
  610. int ret = 0;
  611. uint8_t cpu_bit = 0;
  612. cpumask_t *cluster_cpu_mask = NULL;
  613. cluster_cpu_mask = topology_core_cpumask(cluster_first_cpu[0]);
  614. if (msm_audio_req) {
  615. for_each_cpu(cpu, cluster_cpu_mask) {
  616. cpu_bit = 1 << cpu;
  617. if (cpu_bit & cpu_vote_mask) {
  618. ret = dev_pm_qos_remove_request(
  619. &msm_audio_req[cpu]);
  620. cpu_vote_mask &= ~cpu_bit;
  621. } else
  622. pr_debug("%s: core %d not voted.\n",
  623. __func__, cpu);
  624. if (ret < 0)
  625. pr_err("%s error (%d) removing request from cpu %d.\n",
  626. __func__, ret, cpu);
  627. pr_debug("%s remove cpu affinity of core %d.\n", __func__, cpu);
  628. }
  629. kfree(msm_audio_req);
  630. }
  631. }
  632. int msm_common_snd_init(struct platform_device *pdev, struct snd_soc_card *card)
  633. {
  634. struct msm_common_pdata *common_pdata = NULL;
  635. int count, ret = 0;
  636. uint32_t val_array[MI2S_TDM_AUXPCM_MAX] = {0};
  637. struct clk *lpass_audio_hw_vote = NULL;
  638. common_pdata = kcalloc(1, sizeof(struct msm_common_pdata), GFP_KERNEL);
  639. if (!common_pdata)
  640. return -ENOMEM;
  641. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  642. mutex_init(&common_pdata->lock[count]);
  643. atomic_set(&common_pdata->mi2s_gpio_ref_cnt[count], 0);
  644. }
  645. ret = of_property_read_u32(pdev->dev.of_node, "qcom,tdm-max-slots",
  646. &common_pdata->tdm_max_slots);
  647. if (ret) {
  648. dev_info(&pdev->dev, "%s: No DT match for tdm max slots\n",
  649. __func__);
  650. }
  651. if ((common_pdata->tdm_max_slots <= 0) || (common_pdata->tdm_max_slots >
  652. TDM_MAX_SLOTS)) {
  653. common_pdata->tdm_max_slots = TDM_MAX_SLOTS;
  654. dev_info(&pdev->dev, "%s: Using default tdm max slot: %d\n",
  655. __func__, common_pdata->tdm_max_slots);
  656. }
  657. /* Register LPASS audio hw vote */
  658. lpass_audio_hw_vote = devm_clk_get(&pdev->dev, "lpass_audio_hw_vote");
  659. if (IS_ERR(lpass_audio_hw_vote)) {
  660. ret = PTR_ERR(lpass_audio_hw_vote);
  661. dev_dbg(&pdev->dev, "%s: clk get %s failed %d\n",
  662. __func__, "lpass_audio_hw_vote", ret);
  663. lpass_audio_hw_vote = NULL;
  664. ret = 0;
  665. }
  666. common_pdata->lpass_audio_hw_vote = lpass_audio_hw_vote;
  667. ret = of_property_read_u32_array(pdev->dev.of_node,
  668. "qcom,mi2s-tdm-is-hw-vote-needed",
  669. val_array, MI2S_TDM_AUXPCM_MAX);
  670. if (ret) {
  671. dev_dbg(&pdev->dev, "%s:no qcom,mi2s-tdm-is-hw-vote-needed in DT node\n",
  672. __func__);
  673. } else {
  674. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  675. common_pdata->is_audio_hw_vote_required[count] =
  676. val_array[count];
  677. }
  678. }
  679. ret = of_property_read_u32_array(pdev->dev.of_node, "qcom,tdm-clk-attribute",
  680. val_array, MI2S_TDM_AUXPCM_MAX);
  681. if (ret) {
  682. dev_info(&pdev->dev,
  683. "%s: No DT match for tdm clk attribute, set to default\n", __func__);
  684. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  685. common_pdata->tdm_clk_attribute[count] =
  686. CLOCK_ATTRIBUTE_COUPLE_NO;
  687. }
  688. } else {
  689. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  690. common_pdata->tdm_clk_attribute[count] =
  691. val_array[count];
  692. }
  693. }
  694. ret = of_property_read_u32_array(pdev->dev.of_node, "qcom,mi2s-clk-attribute",
  695. val_array, MI2S_TDM_AUXPCM_MAX);
  696. if (ret) {
  697. dev_info(&pdev->dev,
  698. "%s: No DT match for mi2s clk attribute, set to default\n", __func__);
  699. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  700. common_pdata->mi2s_clk_attribute[count] =
  701. CLOCK_ATTRIBUTE_COUPLE_NO;
  702. }
  703. } else {
  704. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  705. common_pdata->mi2s_clk_attribute[count] =
  706. val_array[count];
  707. }
  708. }
  709. common_pdata->mi2s_gpio_p[PRI_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  710. "qcom,pri-mi2s-gpios", 0);
  711. common_pdata->mi2s_gpio_p[SEC_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  712. "qcom,sec-mi2s-gpios", 0);
  713. common_pdata->mi2s_gpio_p[TER_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  714. "qcom,tert-mi2s-gpios", 0);
  715. common_pdata->mi2s_gpio_p[QUAT_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  716. "qcom,quat-mi2s-gpios", 0);
  717. common_pdata->mi2s_gpio_p[QUIN_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  718. "qcom,quin-mi2s-gpios", 0);
  719. common_pdata->mi2s_gpio_p[SEN_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  720. "qcom,sen-mi2s-gpios", 0);
  721. common_pdata->mi2s_gpio_p[SEP_MI2S_TDM_AUXPCM] = of_parse_phandle(pdev->dev.of_node,
  722. "qcom,sep-mi2s-gpios", 0);
  723. common_pdata->aud_dev_state = devm_kcalloc(&pdev->dev, card->num_links,
  724. sizeof(uint8_t), GFP_KERNEL);
  725. dev_info(&pdev->dev, "num_links %d \n", card->num_links);
  726. common_pdata->num_aud_devs = card->num_links;
  727. mutex_init(&common_pdata->aud_dev_lock);
  728. aud_dev_sysfs_init(common_pdata);
  729. msm_common_set_pdata(card, common_pdata);
  730. /* Add QoS request for audio tasks */
  731. msm_audio_add_qos_request();
  732. mutex_init(&vote_against_sleep_lock);
  733. return 0;
  734. };
  735. void msm_common_snd_deinit(struct msm_common_pdata *common_pdata)
  736. {
  737. int count;
  738. if (!common_pdata)
  739. return;
  740. mutex_destroy(&vote_against_sleep_lock);
  741. msm_audio_remove_qos_request();
  742. mutex_destroy(&common_pdata->aud_dev_lock);
  743. for (count = 0; count < MI2S_TDM_AUXPCM_MAX; count++) {
  744. mutex_destroy(&common_pdata->lock[count]);
  745. }
  746. }
  747. int msm_channel_map_info(struct snd_kcontrol *kcontrol,
  748. struct snd_ctl_elem_info *uinfo)
  749. {
  750. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  751. uinfo->count = sizeof(uint32_t) * MAX_PORT;
  752. return 0;
  753. }
  754. int msm_channel_map_get(struct snd_kcontrol *kcontrol,
  755. struct snd_ctl_elem_value *ucontrol)
  756. {
  757. struct chmap_pdata *kctl_pdata =
  758. (struct chmap_pdata *)kcontrol->private_data;
  759. struct snd_soc_dai *codec_dai = NULL;
  760. int backend_id = 0;
  761. uint32_t rx_ch[MAX_PORT] = {0}, tx_ch[MAX_PORT] = {0};
  762. uint32_t rx_ch_cnt = 0, tx_ch_cnt = 0;
  763. uint32_t *chmap_data = NULL;
  764. int ret = 0, len = 0, i = 0;
  765. if (kctl_pdata == NULL) {
  766. pr_debug("%s: chmap_pdata is not initialized\n", __func__);
  767. return -EINVAL;
  768. }
  769. codec_dai = kctl_pdata->dai[0];
  770. backend_id = kctl_pdata->id;
  771. switch (backend_id) {
  772. case SLIM: {
  773. uint32_t *chmap;
  774. uint32_t ch_cnt;
  775. ret = snd_soc_dai_get_channel_map(codec_dai,
  776. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  777. if (ret || (tx_ch_cnt == 0 && rx_ch_cnt == 0)) {
  778. pr_debug("%s: got incorrect channel map for backend_id:%d\n",
  779. __func__, backend_id);
  780. return ret;
  781. }
  782. if (rx_ch_cnt) {
  783. chmap = rx_ch;
  784. ch_cnt = rx_ch_cnt;
  785. } else {
  786. chmap = tx_ch;
  787. ch_cnt = tx_ch_cnt;
  788. }
  789. if (ch_cnt > 2) {
  790. pr_err("%s: Incorrect channel count: %d\n", __func__, ch_cnt);
  791. return -EINVAL;
  792. }
  793. len = sizeof(uint32_t) * (ch_cnt + 1);
  794. chmap_data = kzalloc(len, GFP_KERNEL);
  795. if (!chmap_data)
  796. return -ENOMEM;
  797. chmap_data[0] = ch_cnt;
  798. for (i = 0; i < ch_cnt; i++)
  799. chmap_data[i+1] = chmap[i];
  800. memcpy(ucontrol->value.bytes.data, chmap_data, len);
  801. break;
  802. }
  803. case CODEC_DMA: {
  804. uint32_t cur_rx_ch = 0, cur_tx_ch = 0;
  805. uint32_t cur_rx_ch_cnt = 0, cur_tx_ch_cnt = 0;
  806. for (i = 0; i < kctl_pdata->num_codec_dai; ++i) {
  807. codec_dai = kctl_pdata->dai[i];
  808. if(!codec_dai) {
  809. continue;
  810. }
  811. cur_rx_ch_cnt = 0;
  812. cur_tx_ch_cnt = 0;
  813. cur_tx_ch = 0;
  814. cur_rx_ch = 0;
  815. ret = snd_soc_dai_get_channel_map(codec_dai,
  816. &cur_tx_ch_cnt, &cur_tx_ch,
  817. &cur_rx_ch_cnt, &cur_rx_ch);
  818. /* DAIs that not supports get_channel_map should pass */
  819. if (ret && (ret != -ENOTSUPP)) {
  820. pr_err("%s: get channel map failed for backend_id:%d,"
  821. " ret:%d\n",
  822. __func__, backend_id, ret);
  823. return ret;
  824. }
  825. rx_ch_cnt += cur_rx_ch_cnt;
  826. tx_ch_cnt += cur_tx_ch_cnt;
  827. rx_ch[0] |= cur_rx_ch;
  828. tx_ch[0] |= cur_tx_ch;
  829. }
  830. /* reset return value from the loop above */
  831. ret = 0;
  832. if (rx_ch_cnt == 0 && tx_ch_cnt == 0) {
  833. pr_debug("%s: incorrect ch map for backend_id:%d, RX Channel Cnt:%d, TX Channel Cnt:%d\n",
  834. __func__, backend_id, rx_ch_cnt, tx_ch_cnt);
  835. return ret;
  836. }
  837. chmap_data = kzalloc(sizeof(uint32_t) * 2, GFP_KERNEL);
  838. if (!chmap_data)
  839. return -ENOMEM;
  840. if (rx_ch_cnt) {
  841. chmap_data[0] = rx_ch_cnt;
  842. chmap_data[1] = rx_ch[0];
  843. } else {
  844. chmap_data[0] = tx_ch_cnt;
  845. chmap_data[1] = tx_ch[0];
  846. }
  847. memcpy(ucontrol->value.bytes.data, chmap_data,
  848. sizeof(uint32_t) * 2);
  849. break;
  850. }
  851. default:
  852. pr_err("%s, Invalid backend %d\n", __func__, backend_id);
  853. ret = -EINVAL;
  854. break;
  855. }
  856. kfree(chmap_data);
  857. return ret;
  858. }
  859. void msm_common_get_backend_name(const char *stream_name, char **backend_name)
  860. {
  861. char arg[ARRAY_SZ] = {0};
  862. char value[61] = {0};
  863. sscanf(stream_name, "%20[^-]-%60s", arg, value);
  864. *backend_name = kzalloc(ARRAY_SZ, GFP_KERNEL);
  865. if (!(*backend_name))
  866. return;
  867. strlcpy(*backend_name, arg, ARRAY_SZ);
  868. }
  869. static void msm_audio_update_qos_request(u32 latency)
  870. {
  871. int cpu = 0;
  872. uint8_t cpu_bit = 0;
  873. int ret = -1;
  874. int num_req = 0;
  875. cpumask_t *cluster_cpu_mask = NULL;
  876. cluster_cpu_mask = topology_core_cpumask(cluster_first_cpu[0]);
  877. if (msm_audio_req) {
  878. for_each_cpu(cpu, cluster_cpu_mask) {
  879. cpu_bit = 1 << cpu;
  880. if (cpu_bit & cpu_vote_mask)
  881. ret = dev_pm_qos_update_request(
  882. &msm_audio_req[cpu], latency);
  883. else
  884. pr_debug("%s: core %d not voted.\n",
  885. __func__, cpu);
  886. if (1 == ret ) {
  887. pr_debug("%s: updated latency of core %d to %u.\n",
  888. __func__, cpu, latency);
  889. } else if (0 == ret) {
  890. pr_debug("%s: latency of core %d not changed. latency %u.\n",
  891. __func__, cpu, latency);
  892. } else {
  893. pr_err("%s: failed to update latency of core %d, error %d \n",
  894. __func__, cpu, ret);
  895. }
  896. /* Limit the request to 2 Silver CPU cores. */
  897. if (++num_req == 2)
  898. break;
  899. }
  900. }
  901. }
  902. static int msm_get_and_print_cpu_map_taken(cpumask_t* expected_cpu_map) {
  903. int ret = 0;
  904. int cpu = 0;
  905. cpumask_t current_cpu_map = walt_get_cpus_taken();
  906. if (memcmp(&current_cpu_map, &CPU_MASK_NONE, sizeof(cpumask_t)) == 0) {
  907. pr_debug("%s: current cpu map is none.\n", __func__);
  908. } else {
  909. for_each_cpu(cpu, &current_cpu_map) {
  910. pr_debug("%s: current cpu core taken %d.\n", __func__, cpu);
  911. }
  912. }
  913. if (memcmp(&current_cpu_map, expected_cpu_map, sizeof(cpumask_t)) == 0)
  914. ret = 1;
  915. return ret;
  916. }
  917. static int msm_qos_ctl_put(struct snd_kcontrol *kcontrol,
  918. struct snd_ctl_elem_value *ucontrol)
  919. {
  920. cpumask_t expected_cpu_map = CPU_MASK_NONE;
  921. cpumask_t *cluster_cpu_mask = NULL;
  922. qos_vote_status = ucontrol->value.enumerated.item[0];
  923. cluster_cpu_mask = topology_core_cpumask(cluster_first_cpu[0]);
  924. pr_debug("%s: qos_vote_status = %d, qos_client_active_cnt = %d.\n",
  925. __func__, qos_vote_status, qos_client_active_cnt);
  926. if (qos_vote_status) {
  927. if (dev_pm_qos_request_active(&latency_pm_qos_req))
  928. dev_pm_qos_remove_request(&latency_pm_qos_req);
  929. qos_client_active_cnt++;
  930. if (qos_client_active_cnt == 1) {
  931. msm_audio_update_qos_request(MSM_LL_QOS_VALUE);
  932. expected_cpu_map = *cluster_cpu_mask;
  933. if (msm_get_and_print_cpu_map_taken(&expected_cpu_map)) {
  934. pr_debug("%s: already expected, don't need to set it.\n",
  935. __func__);
  936. return 0;
  937. }
  938. walt_set_cpus_taken(cluster_cpu_mask);
  939. pr_debug("%s: set cpus taken to walt for audio RT tasks.\n",
  940. __func__);
  941. if (msm_get_and_print_cpu_map_taken(&expected_cpu_map)) {
  942. pr_debug("%s: set cpus taken as expected successfully.\n",
  943. __func__);
  944. }
  945. }
  946. } else {
  947. if (qos_client_active_cnt > 0)
  948. qos_client_active_cnt--;
  949. if (qos_client_active_cnt == 0) {
  950. msm_audio_update_qos_request(PM_QOS_CPU_LATENCY_DEFAULT_VALUE);
  951. if (msm_get_and_print_cpu_map_taken(&expected_cpu_map)) {
  952. pr_debug("%s: already expected, don't need to unset it.\n",
  953. __func__);
  954. return 0;
  955. }
  956. walt_unset_cpus_taken(cluster_cpu_mask);
  957. pr_debug("%s: unset cpus taken to walt for audio RT tasks.\n",
  958. __func__);
  959. if (msm_get_and_print_cpu_map_taken(&expected_cpu_map)) {
  960. pr_debug("%s: unset cpus taken as expected successfully.\n",
  961. __func__);
  962. }
  963. }
  964. }
  965. return 0;
  966. }
  967. static int msm_qos_ctl_get(struct snd_kcontrol *kcontrol,
  968. struct snd_ctl_elem_value *ucontrol)
  969. {
  970. ucontrol->value.enumerated.item[0] = qos_vote_status;
  971. return 0;
  972. }
  973. static int msm_lpi_logging_enable_put(struct snd_kcontrol *kcontrol,
  974. struct snd_ctl_elem_value *ucontrol)
  975. {
  976. lpi_pcm_logging_enable = ucontrol->value.integer.value[0];
  977. pr_debug("%s: lpi pcm logging enable: %d", __func__,
  978. lpi_pcm_logging_enable);
  979. audio_prm_set_lpi_logging_status((int)lpi_pcm_logging_enable);
  980. return 0;
  981. }
  982. static int msm_lpi_logging_enable_get(struct snd_kcontrol *kcontrol,
  983. struct snd_ctl_elem_value *ucontrol)
  984. {
  985. ucontrol->value.integer.value[0] = lpi_pcm_logging_enable;
  986. return 0;
  987. }
  988. static int msm_vote_against_sleep_ctl_put(struct snd_kcontrol *kcontrol,
  989. struct snd_ctl_elem_value *ucontrol)
  990. {
  991. int ret = 0;
  992. mutex_lock(&vote_against_sleep_lock);
  993. vote_against_sleep_enable = ucontrol->value.integer.value[0];
  994. pr_debug("%s: vote against sleep enable: %d sleep cnt: %d", __func__,
  995. vote_against_sleep_enable, vote_against_sleep_cnt);
  996. if (vote_against_sleep_enable) {
  997. vote_against_sleep_cnt++;
  998. if (vote_against_sleep_cnt == 1) {
  999. ret = audio_prm_set_vote_against_sleep(1);
  1000. if (ret < 0) {
  1001. if (vote_against_sleep_cnt > 0)
  1002. --vote_against_sleep_cnt;
  1003. pr_err("%s: failed to vote against sleep ret: %d\n", __func__, ret);
  1004. }
  1005. }
  1006. } else {
  1007. if (vote_against_sleep_cnt == 1)
  1008. ret = audio_prm_set_vote_against_sleep(0);
  1009. if (vote_against_sleep_cnt > 0)
  1010. vote_against_sleep_cnt--;
  1011. }
  1012. pr_debug("%s: vote against sleep vote ret: %d\n", __func__, ret);
  1013. mutex_unlock(&vote_against_sleep_lock);
  1014. return ret;
  1015. }
  1016. static int msm_vote_against_sleep_ctl_get(struct snd_kcontrol *kcontrol,
  1017. struct snd_ctl_elem_value *ucontrol)
  1018. {
  1019. ucontrol->value.integer.value[0] = vote_against_sleep_enable;
  1020. pr_debug("%s: vote against sleep enable: %d", __func__,
  1021. vote_against_sleep_enable);
  1022. return 0;
  1023. }
  1024. static const char *const qos_text[] = {"Disable", "Enable"};
  1025. static const char *const against_sleep_text[] = {"Disable", "Enable"};
  1026. static SOC_ENUM_SINGLE_EXT_DECL(qos_vote, qos_text);
  1027. static SOC_ENUM_SINGLE_EXT_DECL(sleep_against, against_sleep_text);
  1028. static const struct snd_kcontrol_new card_mixer_controls[] = {
  1029. SOC_ENUM_EXT("PM_QOS Vote", qos_vote,
  1030. msm_qos_ctl_get, msm_qos_ctl_put),
  1031. SOC_SINGLE_EXT("LPI PCM Logging Enable", 0, 0, 1, 0,
  1032. msm_lpi_logging_enable_get, msm_lpi_logging_enable_put),
  1033. SOC_ENUM_EXT("VOTE Against Sleep", sleep_against,
  1034. msm_vote_against_sleep_ctl_get, msm_vote_against_sleep_ctl_put),
  1035. };
  1036. static int msm_register_pm_qos_latency_controls(struct snd_soc_pcm_runtime *rtd)
  1037. {
  1038. struct snd_soc_component *lpass_cdc_component = NULL;
  1039. int ret = 0;
  1040. lpass_cdc_component = snd_soc_rtdcom_lookup(rtd, "lpass-cdc");
  1041. if (!lpass_cdc_component) {
  1042. pr_err("%s: could not find component for lpass-cdc\n",
  1043. __func__);
  1044. return -EINVAL;
  1045. }
  1046. ret = snd_soc_add_component_controls(lpass_cdc_component,
  1047. card_mixer_controls, ARRAY_SIZE(card_mixer_controls));
  1048. if (ret < 0) {
  1049. pr_err("%s: add common snd controls failed: %d\n",
  1050. __func__, ret);
  1051. return -EINVAL;
  1052. }
  1053. return 0;
  1054. }
  1055. int msm_common_dai_link_init(struct snd_soc_pcm_runtime *rtd)
  1056. {
  1057. struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
  1058. struct snd_soc_component *component = NULL;
  1059. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  1060. struct device *dev = rtd->card->dev;
  1061. int ret = 0;
  1062. int index = 0;
  1063. const char *mixer_ctl_name = CODEC_CHMAP;
  1064. char *mixer_str = NULL;
  1065. char *backend_name = NULL;
  1066. uint32_t ctl_len = 0;
  1067. struct chmap_pdata *pdata;
  1068. struct snd_kcontrol *kctl;
  1069. struct snd_kcontrol_new msm_common_channel_map[1] = {
  1070. {
  1071. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1072. .name = "?",
  1073. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
  1074. .info = msm_channel_map_info,
  1075. .get = msm_channel_map_get,
  1076. .private_value = 0,
  1077. }
  1078. };
  1079. if (!codec_dai) {
  1080. pr_err("%s: failed to get codec dai", __func__);
  1081. return -EINVAL;
  1082. }
  1083. component = codec_dai->component;
  1084. msm_common_get_backend_name(dai_link->stream_name, &backend_name);
  1085. if (!backend_name) {
  1086. pr_err("%s: failed to get backend name", __func__);
  1087. return -EINVAL;
  1088. }
  1089. pdata = devm_kzalloc(dev, sizeof(struct chmap_pdata), GFP_KERNEL);
  1090. if (!pdata) {
  1091. ret = -ENOMEM;
  1092. goto free_backend;
  1093. }
  1094. if ((!strncmp(backend_name, "SLIM", strlen("SLIM"))) ||
  1095. (!strncmp(backend_name, "CODEC_DMA", strlen("CODEC_DMA")))) {
  1096. ctl_len = strlen(dai_link->stream_name) + 1 +
  1097. strlen(mixer_ctl_name) + 1;
  1098. mixer_str = kzalloc(ctl_len, GFP_KERNEL);
  1099. if (!mixer_str) {
  1100. ret = -ENOMEM;
  1101. goto free_backend;
  1102. }
  1103. snprintf(mixer_str, ctl_len, "%s %s", dai_link->stream_name,
  1104. mixer_ctl_name);
  1105. msm_common_channel_map[0].name = mixer_str;
  1106. msm_common_channel_map[0].private_value = 0;
  1107. pr_debug("Registering new mixer ctl %s\n", mixer_str);
  1108. ret = snd_soc_add_component_controls(component,
  1109. msm_common_channel_map,
  1110. ARRAY_SIZE(msm_common_channel_map));
  1111. kctl = snd_soc_card_get_kcontrol(rtd->card, mixer_str);
  1112. if (!kctl) {
  1113. pr_err("failed to get kctl %s\n", mixer_str);
  1114. ret = -EINVAL;
  1115. goto free_mixer_str;
  1116. }
  1117. pdata->dai[0] = codec_dai;
  1118. pdata->num_codec_dai = 1;
  1119. if (!strncmp(backend_name, "SLIM", strlen("SLIM"))) {
  1120. pdata->id = SLIM;
  1121. } else {
  1122. pdata->id = CODEC_DMA;
  1123. if (rtd->dai_link->num_codecs <= MAX_CODEC_DAI) {
  1124. pdata->num_codec_dai = rtd->dai_link->num_codecs;
  1125. for_each_rtd_codec_dais(rtd, index, codec_dai) {
  1126. pdata->dai[index] = codec_dai;
  1127. }
  1128. }
  1129. }
  1130. kctl->private_data = pdata;
  1131. }
  1132. if (!kregister_pm_qos_latency_controls) {
  1133. if (!msm_register_pm_qos_latency_controls(rtd))
  1134. kregister_pm_qos_latency_controls = true;
  1135. }
  1136. free_mixer_str:
  1137. if (mixer_str) {
  1138. kfree(mixer_str);
  1139. mixer_str = NULL;
  1140. }
  1141. free_backend:
  1142. if (backend_name) {
  1143. kfree(backend_name);
  1144. backend_name = NULL;
  1145. }
  1146. return ret;
  1147. }