dp_rx_err.c 90 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "dp_internal.h"
  25. #include "hal_api.h"
  26. #include "qdf_trace.h"
  27. #include "qdf_nbuf.h"
  28. #include "dp_rx_defrag.h"
  29. #include "dp_ipa.h"
  30. #include "dp_internal.h"
  31. #ifdef WIFI_MONITOR_SUPPORT
  32. #include "dp_htt.h"
  33. #include <dp_mon.h>
  34. #endif
  35. #ifdef FEATURE_WDS
  36. #include "dp_txrx_wds.h"
  37. #endif
  38. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  39. #include "qdf_net_types.h"
  40. #include "dp_rx_buffer_pool.h"
  41. #define dp_rx_err_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX_ERROR, params)
  42. #define dp_rx_err_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX_ERROR, params)
  43. #define dp_rx_err_info(params...) \
  44. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  45. #define dp_rx_err_info_rl(params...) \
  46. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX_ERROR, ## params)
  47. #define dp_rx_err_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX_ERROR, params)
  48. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  49. /* Max regular Rx packet routing error */
  50. #define DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD 20
  51. #define DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT 10
  52. #define DP_RX_ERR_ROUTE_TIMEOUT_US (5 * 1000 * 1000) /* micro seconds */
  53. #ifdef FEATURE_MEC
  54. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  55. struct dp_txrx_peer *txrx_peer,
  56. uint8_t *rx_tlv_hdr,
  57. qdf_nbuf_t nbuf)
  58. {
  59. struct dp_vdev *vdev = txrx_peer->vdev;
  60. struct dp_pdev *pdev = vdev->pdev;
  61. struct dp_mec_entry *mecentry = NULL;
  62. struct dp_ast_entry *ase = NULL;
  63. uint16_t sa_idx = 0;
  64. uint8_t *data;
  65. /*
  66. * Multicast Echo Check is required only if vdev is STA and
  67. * received pkt is a multicast/broadcast pkt. otherwise
  68. * skip the MEC check.
  69. */
  70. if (vdev->opmode != wlan_op_mode_sta)
  71. return false;
  72. if (!hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  73. return false;
  74. data = qdf_nbuf_data(nbuf);
  75. /*
  76. * if the received pkts src mac addr matches with vdev
  77. * mac address then drop the pkt as it is looped back
  78. */
  79. if (!(qdf_mem_cmp(&data[QDF_MAC_ADDR_SIZE],
  80. vdev->mac_addr.raw,
  81. QDF_MAC_ADDR_SIZE)))
  82. return true;
  83. /*
  84. * In case of qwrap isolation mode, donot drop loopback packets.
  85. * In isolation mode, all packets from the wired stations need to go
  86. * to rootap and loop back to reach the wireless stations and
  87. * vice-versa.
  88. */
  89. if (qdf_unlikely(vdev->isolation_vdev))
  90. return false;
  91. /*
  92. * if the received pkts src mac addr matches with the
  93. * wired PCs MAC addr which is behind the STA or with
  94. * wireless STAs MAC addr which are behind the Repeater,
  95. * then drop the pkt as it is looped back
  96. */
  97. if (hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc, rx_tlv_hdr)) {
  98. sa_idx = hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr);
  99. if ((sa_idx < 0) ||
  100. (sa_idx >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) {
  101. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  102. "invalid sa_idx: %d", sa_idx);
  103. qdf_assert_always(0);
  104. }
  105. qdf_spin_lock_bh(&soc->ast_lock);
  106. ase = soc->ast_table[sa_idx];
  107. /*
  108. * this check was not needed since MEC is not dependent on AST,
  109. * but if we dont have this check SON has some issues in
  110. * dual backhaul scenario. in APS SON mode, client connected
  111. * to RE 2G and sends multicast packets. the RE sends it to CAP
  112. * over 5G backhaul. the CAP loopback it on 2G to RE.
  113. * On receiving in 2G STA vap, we assume that client has roamed
  114. * and kickout the client.
  115. */
  116. if (ase && (ase->peer_id != txrx_peer->peer_id)) {
  117. qdf_spin_unlock_bh(&soc->ast_lock);
  118. goto drop;
  119. }
  120. qdf_spin_unlock_bh(&soc->ast_lock);
  121. }
  122. qdf_spin_lock_bh(&soc->mec_lock);
  123. mecentry = dp_peer_mec_hash_find_by_pdevid(soc, pdev->pdev_id,
  124. &data[QDF_MAC_ADDR_SIZE]);
  125. if (!mecentry) {
  126. qdf_spin_unlock_bh(&soc->mec_lock);
  127. return false;
  128. }
  129. qdf_spin_unlock_bh(&soc->mec_lock);
  130. drop:
  131. dp_rx_err_info("%pK: received pkt with same src mac " QDF_MAC_ADDR_FMT,
  132. soc, QDF_MAC_ADDR_REF(&data[QDF_MAC_ADDR_SIZE]));
  133. return true;
  134. }
  135. #endif
  136. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  137. void dp_rx_link_desc_refill_duplicate_check(
  138. struct dp_soc *soc,
  139. struct hal_buf_info *buf_info,
  140. hal_buff_addrinfo_t ring_buf_info)
  141. {
  142. struct hal_buf_info current_link_desc_buf_info = { 0 };
  143. /* do duplicate link desc address check */
  144. hal_rx_buffer_addr_info_get_paddr(ring_buf_info,
  145. &current_link_desc_buf_info);
  146. /*
  147. * TODO - Check if the hal soc api call can be removed
  148. * since the cookie is just used for print.
  149. * buffer_addr_info is the first element of ring_desc
  150. */
  151. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  152. (uint32_t *)ring_buf_info,
  153. &current_link_desc_buf_info);
  154. if (qdf_unlikely(current_link_desc_buf_info.paddr ==
  155. buf_info->paddr)) {
  156. dp_info_rl("duplicate link desc addr: %llu, cookie: 0x%x",
  157. current_link_desc_buf_info.paddr,
  158. current_link_desc_buf_info.sw_cookie);
  159. DP_STATS_INC(soc, rx.err.dup_refill_link_desc, 1);
  160. }
  161. *buf_info = current_link_desc_buf_info;
  162. }
  163. QDF_STATUS
  164. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  165. hal_buff_addrinfo_t link_desc_addr,
  166. uint8_t bm_action)
  167. {
  168. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  169. hal_ring_handle_t wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  170. hal_soc_handle_t hal_soc = soc->hal_soc;
  171. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  172. void *src_srng_desc;
  173. if (!wbm_rel_srng) {
  174. dp_rx_err_err("%pK: WBM RELEASE RING not initialized", soc);
  175. return status;
  176. }
  177. /* do duplicate link desc address check */
  178. dp_rx_link_desc_refill_duplicate_check(
  179. soc,
  180. &soc->last_op_info.wbm_rel_link_desc,
  181. link_desc_addr);
  182. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  183. /* TODO */
  184. /*
  185. * Need API to convert from hal_ring pointer to
  186. * Ring Type / Ring Id combo
  187. */
  188. dp_rx_err_err("%pK: HAL RING Access For WBM Release SRNG Failed - %pK",
  189. soc, wbm_rel_srng);
  190. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  191. goto done;
  192. }
  193. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  194. if (qdf_likely(src_srng_desc)) {
  195. /* Return link descriptor through WBM ring (SW2WBM)*/
  196. hal_rx_msdu_link_desc_set(hal_soc,
  197. src_srng_desc, link_desc_addr, bm_action);
  198. status = QDF_STATUS_SUCCESS;
  199. } else {
  200. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  201. DP_STATS_INC(soc, rx.err.hal_ring_access_full_fail, 1);
  202. dp_info_rl("WBM Release Ring (Id %d) Full(Fail CNT %u)",
  203. srng->ring_id,
  204. soc->stats.rx.err.hal_ring_access_full_fail);
  205. dp_info_rl("HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  206. *srng->u.src_ring.hp_addr,
  207. srng->u.src_ring.reap_hp,
  208. *srng->u.src_ring.tp_addr,
  209. srng->u.src_ring.cached_tp);
  210. QDF_BUG(0);
  211. }
  212. done:
  213. hal_srng_access_end(hal_soc, wbm_rel_srng);
  214. return status;
  215. }
  216. qdf_export_symbol(dp_rx_link_desc_return_by_addr);
  217. QDF_STATUS
  218. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  219. uint8_t bm_action)
  220. {
  221. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  222. return dp_rx_link_desc_return_by_addr(soc, buf_addr_info, bm_action);
  223. }
  224. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  225. /**
  226. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  227. *
  228. * @soc: core txrx main context
  229. * @ring_desc: opaque pointer to the REO error ring descriptor
  230. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  231. * @mac_id: mac ID
  232. * @quota: No. of units (packets) that can be serviced in one shot.
  233. *
  234. * This function is used to drop all MSDU in an MPDU
  235. *
  236. * Return: uint32_t: No. of elements processed
  237. */
  238. static uint32_t
  239. dp_rx_msdus_drop(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  240. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  241. uint8_t *mac_id,
  242. uint32_t quota)
  243. {
  244. uint32_t rx_bufs_used = 0;
  245. void *link_desc_va;
  246. struct hal_buf_info buf_info;
  247. struct dp_pdev *pdev;
  248. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  249. int i;
  250. uint8_t *rx_tlv_hdr;
  251. uint32_t tid;
  252. struct rx_desc_pool *rx_desc_pool;
  253. struct dp_rx_desc *rx_desc;
  254. /* First field in REO Dst ring Desc is buffer_addr_info */
  255. void *buf_addr_info = ring_desc;
  256. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  257. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  258. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &buf_info);
  259. /* buffer_addr_info is the first element of ring_desc */
  260. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  261. (uint32_t *)ring_desc,
  262. &buf_info);
  263. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  264. if (!link_desc_va) {
  265. dp_rx_err_debug("link desc va is null, soc %pk", soc);
  266. return rx_bufs_used;
  267. }
  268. more_msdu_link_desc:
  269. /* No UNMAP required -- this is "malloc_consistent" memory */
  270. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  271. &mpdu_desc_info->msdu_count);
  272. for (i = 0; (i < mpdu_desc_info->msdu_count); i++) {
  273. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  274. soc, msdu_list.sw_cookie[i]);
  275. qdf_assert_always(rx_desc);
  276. /* all buffers from a MSDU link link belong to same pdev */
  277. *mac_id = rx_desc->pool_id;
  278. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  279. if (!pdev) {
  280. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  281. soc, rx_desc->pool_id);
  282. return rx_bufs_used;
  283. }
  284. if (!dp_rx_desc_check_magic(rx_desc)) {
  285. dp_rx_err_err("%pK: Invalid rx_desc cookie=%d",
  286. soc, msdu_list.sw_cookie[i]);
  287. return rx_bufs_used;
  288. }
  289. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  290. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  291. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, rx_desc->nbuf);
  292. rx_desc->unmapped = 1;
  293. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  294. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  295. rx_bufs_used++;
  296. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  297. rx_desc->rx_buf_start);
  298. dp_rx_err_err("%pK: Packet received with PN error for tid :%d",
  299. soc, tid);
  300. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  301. if (hal_rx_encryption_info_valid(soc->hal_soc, rx_tlv_hdr))
  302. hal_rx_print_pn(soc->hal_soc, rx_tlv_hdr);
  303. dp_rx_err_send_pktlog(soc, pdev, mpdu_desc_info,
  304. rx_desc->nbuf,
  305. QDF_TX_RX_STATUS_DROP, true);
  306. /* Just free the buffers */
  307. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf, *mac_id);
  308. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  309. &pdev->free_list_tail, rx_desc);
  310. }
  311. /*
  312. * If the msdu's are spread across multiple link-descriptors,
  313. * we cannot depend solely on the msdu_count(e.g., if msdu is
  314. * spread across multiple buffers).Hence, it is
  315. * necessary to check the next link_descriptor and release
  316. * all the msdu's that are part of it.
  317. */
  318. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  319. link_desc_va,
  320. &next_link_desc_addr_info);
  321. if (hal_rx_is_buf_addr_info_valid(
  322. &next_link_desc_addr_info)) {
  323. /* Clear the next link desc info for the current link_desc */
  324. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  325. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  326. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  327. hal_rx_buffer_addr_info_get_paddr(
  328. &next_link_desc_addr_info,
  329. &buf_info);
  330. /* buffer_addr_info is the first element of ring_desc */
  331. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  332. (uint32_t *)&next_link_desc_addr_info,
  333. &buf_info);
  334. cur_link_desc_addr_info = next_link_desc_addr_info;
  335. buf_addr_info = &cur_link_desc_addr_info;
  336. link_desc_va =
  337. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  338. goto more_msdu_link_desc;
  339. }
  340. quota--;
  341. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  342. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  343. return rx_bufs_used;
  344. }
  345. /**
  346. * dp_rx_pn_error_handle() - Handles PN check errors
  347. *
  348. * @soc: core txrx main context
  349. * @ring_desc: opaque pointer to the REO error ring descriptor
  350. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  351. * @mac_id: mac ID
  352. * @quota: No. of units (packets) that can be serviced in one shot.
  353. *
  354. * This function implements PN error handling
  355. * If the peer is configured to ignore the PN check errors
  356. * or if DP feels, that this frame is still OK, the frame can be
  357. * re-injected back to REO to use some of the other features
  358. * of REO e.g. duplicate detection/routing to other cores
  359. *
  360. * Return: uint32_t: No. of elements processed
  361. */
  362. static uint32_t
  363. dp_rx_pn_error_handle(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  364. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  365. uint8_t *mac_id,
  366. uint32_t quota)
  367. {
  368. uint16_t peer_id;
  369. uint32_t rx_bufs_used = 0;
  370. struct dp_txrx_peer *txrx_peer;
  371. bool peer_pn_policy = false;
  372. dp_txrx_ref_handle txrx_ref_handle = NULL;
  373. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  374. mpdu_desc_info->peer_meta_data);
  375. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  376. &txrx_ref_handle,
  377. DP_MOD_ID_RX_ERR);
  378. if (qdf_likely(txrx_peer)) {
  379. /*
  380. * TODO: Check for peer specific policies & set peer_pn_policy
  381. */
  382. dp_err_rl("discard rx due to PN error for peer %pK",
  383. txrx_peer);
  384. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  385. }
  386. dp_rx_err_err("%pK: Packet received with PN error", soc);
  387. /* No peer PN policy -- definitely drop */
  388. if (!peer_pn_policy)
  389. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  390. mpdu_desc_info,
  391. mac_id, quota);
  392. return rx_bufs_used;
  393. }
  394. #ifdef DP_RX_DELIVER_ALL_OOR_FRAMES
  395. /**
  396. * dp_rx_deliver_oor_frame() - deliver OOR frames to stack
  397. * @soc: Datapath soc handler
  398. * @txrx_peer: pointer to DP peer
  399. * @nbuf: pointer to the skb of RX frame
  400. * @frame_mask: the mask for special frame needed
  401. * @rx_tlv_hdr: start of rx tlv header
  402. *
  403. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  404. * single nbuf is expected.
  405. *
  406. * return: true - nbuf has been delivered to stack, false - not.
  407. */
  408. static bool
  409. dp_rx_deliver_oor_frame(struct dp_soc *soc,
  410. struct dp_txrx_peer *txrx_peer,
  411. qdf_nbuf_t nbuf, uint32_t frame_mask,
  412. uint8_t *rx_tlv_hdr)
  413. {
  414. uint32_t l2_hdr_offset = 0;
  415. uint16_t msdu_len = 0;
  416. uint32_t skip_len;
  417. l2_hdr_offset =
  418. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  419. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  420. skip_len = l2_hdr_offset;
  421. } else {
  422. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  423. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  424. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  425. }
  426. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  427. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  428. qdf_nbuf_pull_head(nbuf, skip_len);
  429. qdf_nbuf_set_exc_frame(nbuf, 1);
  430. dp_info_rl("OOR frame, mpdu sn 0x%x",
  431. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  432. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer, nbuf, NULL);
  433. return true;
  434. }
  435. #else
  436. static bool
  437. dp_rx_deliver_oor_frame(struct dp_soc *soc,
  438. struct dp_txrx_peer *txrx_peer,
  439. qdf_nbuf_t nbuf, uint32_t frame_mask,
  440. uint8_t *rx_tlv_hdr)
  441. {
  442. return dp_rx_deliver_special_frame(soc, txrx_peer, nbuf, frame_mask,
  443. rx_tlv_hdr);
  444. }
  445. #endif
  446. /**
  447. * dp_rx_oor_handle() - Handles the msdu which is OOR error
  448. *
  449. * @soc: core txrx main context
  450. * @nbuf: pointer to msdu skb
  451. * @peer_id: dp peer ID
  452. * @rx_tlv_hdr: start of rx tlv header
  453. *
  454. * This function process the msdu delivered from REO2TCL
  455. * ring with error type OOR
  456. *
  457. * Return: None
  458. */
  459. static void
  460. dp_rx_oor_handle(struct dp_soc *soc,
  461. qdf_nbuf_t nbuf,
  462. uint16_t peer_id,
  463. uint8_t *rx_tlv_hdr)
  464. {
  465. uint32_t frame_mask = wlan_cfg_get_special_frame_cfg(soc->wlan_cfg_ctx);
  466. struct dp_txrx_peer *txrx_peer = NULL;
  467. dp_txrx_ref_handle txrx_ref_handle = NULL;
  468. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  469. &txrx_ref_handle,
  470. DP_MOD_ID_RX_ERR);
  471. if (!txrx_peer) {
  472. dp_info_rl("peer not found");
  473. goto free_nbuf;
  474. }
  475. if (dp_rx_deliver_oor_frame(soc, txrx_peer, nbuf, frame_mask,
  476. rx_tlv_hdr)) {
  477. DP_STATS_INC(soc, rx.err.reo_err_oor_to_stack, 1);
  478. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  479. return;
  480. }
  481. free_nbuf:
  482. if (txrx_peer)
  483. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  484. DP_STATS_INC(soc, rx.err.reo_err_oor_drop, 1);
  485. dp_rx_nbuf_free(nbuf);
  486. }
  487. /**
  488. * dp_rx_err_nbuf_pn_check() - Check if the PN number of this current packet
  489. * is a monotonous increment of packet number
  490. * from the previous successfully re-ordered
  491. * frame.
  492. * @soc: Datapath SOC handle
  493. * @ring_desc: REO ring descriptor
  494. * @nbuf: Current packet
  495. *
  496. * Return: QDF_STATUS_SUCCESS, if the pn check passes, else QDF_STATUS_E_FAILURE
  497. */
  498. static inline QDF_STATUS
  499. dp_rx_err_nbuf_pn_check(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  500. qdf_nbuf_t nbuf)
  501. {
  502. uint64_t prev_pn, curr_pn[2];
  503. if (!hal_rx_encryption_info_valid(soc->hal_soc, qdf_nbuf_data(nbuf)))
  504. return QDF_STATUS_SUCCESS;
  505. hal_rx_reo_prev_pn_get(soc->hal_soc, ring_desc, &prev_pn);
  506. hal_rx_tlv_get_pn_num(soc->hal_soc, qdf_nbuf_data(nbuf), curr_pn);
  507. if (curr_pn[0] > prev_pn)
  508. return QDF_STATUS_SUCCESS;
  509. return QDF_STATUS_E_FAILURE;
  510. }
  511. #ifdef WLAN_SKIP_BAR_UPDATE
  512. static
  513. void dp_rx_err_handle_bar(struct dp_soc *soc,
  514. struct dp_peer *peer,
  515. qdf_nbuf_t nbuf)
  516. {
  517. dp_info_rl("BAR update to H.W is skipped");
  518. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  519. }
  520. #else
  521. static
  522. void dp_rx_err_handle_bar(struct dp_soc *soc,
  523. struct dp_peer *peer,
  524. qdf_nbuf_t nbuf)
  525. {
  526. uint8_t *rx_tlv_hdr;
  527. unsigned char type, subtype;
  528. uint16_t start_seq_num;
  529. uint32_t tid;
  530. QDF_STATUS status;
  531. struct ieee80211_frame_bar *bar;
  532. /*
  533. * 1. Is this a BAR frame. If not Discard it.
  534. * 2. If it is, get the peer id, tid, ssn
  535. * 2a Do a tid update
  536. */
  537. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  538. bar = (struct ieee80211_frame_bar *)(rx_tlv_hdr + soc->rx_pkt_tlv_size);
  539. type = bar->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
  540. subtype = bar->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
  541. if (!(type == IEEE80211_FC0_TYPE_CTL &&
  542. subtype == QDF_IEEE80211_FC0_SUBTYPE_BAR)) {
  543. dp_err_rl("Not a BAR frame!");
  544. return;
  545. }
  546. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  547. qdf_assert_always(tid < DP_MAX_TIDS);
  548. start_seq_num = le16toh(bar->i_seq) >> IEEE80211_SEQ_SEQ_SHIFT;
  549. dp_info_rl("tid %u window_size %u start_seq_num %u",
  550. tid, peer->rx_tid[tid].ba_win_size, start_seq_num);
  551. status = dp_rx_tid_update_wifi3(peer, tid,
  552. peer->rx_tid[tid].ba_win_size,
  553. start_seq_num,
  554. true);
  555. if (status != QDF_STATUS_SUCCESS) {
  556. dp_err_rl("failed to handle bar frame update rx tid");
  557. DP_STATS_INC(soc, rx.err.bar_handle_fail_count, 1);
  558. } else {
  559. DP_STATS_INC(soc, rx.err.ssn_update_count, 1);
  560. }
  561. }
  562. #endif
  563. /**
  564. * _dp_rx_bar_frame_handle(): Core of the BAR frame handling
  565. * @soc: Datapath SoC handle
  566. * @nbuf: packet being processed
  567. * @mpdu_desc_info: mpdu desc info for the current packet
  568. * @tid: tid on which the packet arrived
  569. * @err_status: Flag to indicate if REO encountered an error while routing this
  570. * frame
  571. * @error_code: REO error code
  572. *
  573. * Return: None
  574. */
  575. static void
  576. _dp_rx_bar_frame_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
  577. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  578. uint32_t tid, uint8_t err_status, uint32_t error_code)
  579. {
  580. uint16_t peer_id;
  581. struct dp_peer *peer;
  582. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  583. mpdu_desc_info->peer_meta_data);
  584. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  585. if (!peer)
  586. return;
  587. dp_info_rl("BAR frame: "
  588. " peer_id = %d"
  589. " tid = %u"
  590. " SSN = %d"
  591. " error status = %d",
  592. peer->peer_id,
  593. tid,
  594. mpdu_desc_info->mpdu_seq,
  595. err_status);
  596. if (err_status == HAL_REO_ERROR_DETECTED) {
  597. switch (error_code) {
  598. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  599. case HAL_REO_ERR_BAR_FRAME_OOR:
  600. dp_rx_err_handle_bar(soc, peer, nbuf);
  601. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  602. break;
  603. default:
  604. DP_STATS_INC(soc, rx.bar_frame, 1);
  605. }
  606. }
  607. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  608. }
  609. /**
  610. * dp_rx_bar_frame_handle() - Function to handle err BAR frames
  611. * @soc: core DP main context
  612. * @ring_desc: Hal ring desc
  613. * @rx_desc: dp rx desc
  614. * @mpdu_desc_info: mpdu desc info
  615. * @err_status: error status
  616. * @err_code: error code
  617. *
  618. * Handle the error BAR frames received. Ensure the SOC level
  619. * stats are updated based on the REO error code. The BAR frames
  620. * are further processed by updating the Rx tids with the start
  621. * sequence number (SSN) and BA window size. Desc is returned
  622. * to the free desc list
  623. *
  624. * Return: none
  625. */
  626. static void
  627. dp_rx_bar_frame_handle(struct dp_soc *soc,
  628. hal_ring_desc_t ring_desc,
  629. struct dp_rx_desc *rx_desc,
  630. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  631. uint8_t err_status,
  632. uint32_t err_code)
  633. {
  634. qdf_nbuf_t nbuf;
  635. struct dp_pdev *pdev;
  636. struct rx_desc_pool *rx_desc_pool;
  637. uint8_t *rx_tlv_hdr;
  638. uint32_t tid;
  639. nbuf = rx_desc->nbuf;
  640. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  641. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  642. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  643. rx_desc->unmapped = 1;
  644. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  645. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  646. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  647. rx_tlv_hdr);
  648. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  649. if (!pdev) {
  650. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  651. soc, rx_desc->pool_id);
  652. return;
  653. }
  654. _dp_rx_bar_frame_handle(soc, nbuf, mpdu_desc_info, tid, err_status,
  655. err_code);
  656. dp_rx_err_send_pktlog(soc, pdev, mpdu_desc_info, nbuf,
  657. QDF_TX_RX_STATUS_DROP, true);
  658. dp_rx_link_desc_return(soc, ring_desc,
  659. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  660. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  661. rx_desc->pool_id);
  662. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  663. &pdev->free_list_tail,
  664. rx_desc);
  665. }
  666. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  667. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  668. uint16_t peer_id, uint8_t tid)
  669. {
  670. struct dp_peer *peer = NULL;
  671. struct dp_rx_tid *rx_tid = NULL;
  672. struct dp_txrx_peer *txrx_peer;
  673. uint32_t frame_mask = FRAME_MASK_IPV4_ARP;
  674. peer = dp_peer_get_ref_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  675. if (!peer) {
  676. dp_rx_err_info_rl("%pK: peer not found", soc);
  677. goto free_nbuf;
  678. }
  679. txrx_peer = dp_get_txrx_peer(peer);
  680. if (!txrx_peer) {
  681. dp_rx_err_info_rl("%pK: txrx_peer not found", soc);
  682. goto free_nbuf;
  683. }
  684. if (tid >= DP_MAX_TIDS) {
  685. dp_info_rl("invalid tid");
  686. goto nbuf_deliver;
  687. }
  688. rx_tid = &peer->rx_tid[tid];
  689. qdf_spin_lock_bh(&rx_tid->tid_lock);
  690. /* only if BA session is active, allow send Delba */
  691. if (rx_tid->ba_status != DP_RX_BA_ACTIVE) {
  692. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  693. goto nbuf_deliver;
  694. }
  695. if (!rx_tid->delba_tx_status) {
  696. rx_tid->delba_tx_retry++;
  697. rx_tid->delba_tx_status = 1;
  698. rx_tid->delba_rcode =
  699. IEEE80211_REASON_QOS_SETUP_REQUIRED;
  700. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  701. if (soc->cdp_soc.ol_ops->send_delba) {
  702. DP_STATS_INC(soc, rx.err.rx_2k_jump_delba_sent,
  703. 1);
  704. soc->cdp_soc.ol_ops->send_delba(
  705. peer->vdev->pdev->soc->ctrl_psoc,
  706. peer->vdev->vdev_id,
  707. peer->mac_addr.raw,
  708. tid,
  709. rx_tid->delba_rcode,
  710. CDP_DELBA_2K_JUMP);
  711. }
  712. } else {
  713. qdf_spin_unlock_bh(&rx_tid->tid_lock);
  714. }
  715. nbuf_deliver:
  716. if (dp_rx_deliver_special_frame(soc, txrx_peer, nbuf, frame_mask,
  717. rx_tlv_hdr)) {
  718. DP_STATS_INC(soc, rx.err.rx_2k_jump_to_stack, 1);
  719. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  720. return;
  721. }
  722. free_nbuf:
  723. if (peer)
  724. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  725. DP_STATS_INC(soc, rx.err.rx_2k_jump_drop, 1);
  726. dp_rx_nbuf_free(nbuf);
  727. }
  728. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  729. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_KIWI)
  730. bool
  731. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  732. uint8_t pool_id,
  733. uint8_t *rx_tlv_hdr,
  734. qdf_nbuf_t nbuf)
  735. {
  736. struct dp_peer *peer = NULL;
  737. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  738. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  739. struct ieee80211_frame *wh = (struct ieee80211_frame *)rx_pkt_hdr;
  740. if (!pdev) {
  741. dp_rx_err_debug("%pK: pdev is null for pool_id = %d",
  742. soc, pool_id);
  743. return false;
  744. }
  745. /*
  746. * WAR- In certain types of packets if peer_id is not correct then
  747. * driver may not be able find. Try finding peer by addr_2 of
  748. * received MPDU
  749. */
  750. if (wh)
  751. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  752. DP_VDEV_ALL, DP_MOD_ID_RX_ERR);
  753. if (peer) {
  754. dp_verbose_debug("MPDU sw_peer_id & ast_idx is corrupted");
  755. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  756. QDF_TRACE_LEVEL_DEBUG);
  757. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer_id,
  758. 1, qdf_nbuf_len(nbuf));
  759. dp_rx_nbuf_free(nbuf);
  760. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  761. return true;
  762. }
  763. return false;
  764. }
  765. #else
  766. bool
  767. dp_rx_null_q_handle_invalid_peer_id_exception(struct dp_soc *soc,
  768. uint8_t pool_id,
  769. uint8_t *rx_tlv_hdr,
  770. qdf_nbuf_t nbuf)
  771. {
  772. return false;
  773. }
  774. #endif
  775. bool dp_rx_check_pkt_len(struct dp_soc *soc, uint32_t pkt_len)
  776. {
  777. if (qdf_unlikely(pkt_len > RX_DATA_BUFFER_SIZE)) {
  778. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_pkt_len,
  779. 1, pkt_len);
  780. return true;
  781. } else {
  782. return false;
  783. }
  784. }
  785. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  786. void
  787. dp_rx_deliver_to_osif_stack(struct dp_soc *soc,
  788. struct dp_vdev *vdev,
  789. struct dp_txrx_peer *txrx_peer,
  790. qdf_nbuf_t nbuf,
  791. qdf_nbuf_t tail,
  792. bool is_eapol)
  793. {
  794. if (is_eapol && soc->eapol_over_control_port)
  795. dp_rx_eapol_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  796. else
  797. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  798. }
  799. #else
  800. void
  801. dp_rx_deliver_to_osif_stack(struct dp_soc *soc,
  802. struct dp_vdev *vdev,
  803. struct dp_txrx_peer *txrx_peer,
  804. qdf_nbuf_t nbuf,
  805. qdf_nbuf_t tail,
  806. bool is_eapol)
  807. {
  808. dp_rx_deliver_to_stack(soc, vdev, txrx_peer, nbuf, NULL);
  809. }
  810. #endif
  811. #ifdef WLAN_FEATURE_11BE_MLO
  812. int dp_rx_err_match_dhost(qdf_ether_header_t *eh, struct dp_vdev *vdev)
  813. {
  814. return ((qdf_mem_cmp(eh->ether_dhost, &vdev->mac_addr.raw[0],
  815. QDF_MAC_ADDR_SIZE) == 0) ||
  816. (qdf_mem_cmp(eh->ether_dhost, &vdev->mld_mac_addr.raw[0],
  817. QDF_MAC_ADDR_SIZE) == 0));
  818. }
  819. #else
  820. int dp_rx_err_match_dhost(qdf_ether_header_t *eh, struct dp_vdev *vdev)
  821. {
  822. return (qdf_mem_cmp(eh->ether_dhost, &vdev->mac_addr.raw[0],
  823. QDF_MAC_ADDR_SIZE) == 0);
  824. }
  825. #endif
  826. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  827. bool
  828. dp_rx_err_drop_3addr_mcast(struct dp_vdev *vdev, uint8_t *rx_tlv_hdr)
  829. {
  830. struct dp_soc *soc = vdev->pdev->soc;
  831. if (!vdev->drop_3addr_mcast)
  832. return false;
  833. if (vdev->opmode != wlan_op_mode_sta)
  834. return false;
  835. if (hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc, rx_tlv_hdr))
  836. return true;
  837. return false;
  838. }
  839. /**
  840. * dp_rx_err_is_pn_check_needed() - Check if the packet number check is needed
  841. * for this frame received in REO error ring.
  842. * @soc: Datapath SOC handle
  843. * @error: REO error detected or not
  844. * @error_code: Error code in case of REO error
  845. *
  846. * Return: true if pn check if needed in software,
  847. * false, if pn check if not needed.
  848. */
  849. static inline bool
  850. dp_rx_err_is_pn_check_needed(struct dp_soc *soc, uint8_t error,
  851. uint32_t error_code)
  852. {
  853. return (soc->features.pn_in_reo_dest &&
  854. (error == HAL_REO_ERROR_DETECTED &&
  855. (hal_rx_reo_is_2k_jump(error_code) ||
  856. hal_rx_reo_is_oor_error(error_code) ||
  857. hal_rx_reo_is_bar_oor_2k_jump(error_code))));
  858. }
  859. #ifdef DP_WAR_INVALID_FIRST_MSDU_FLAG
  860. static inline void
  861. dp_rx_err_populate_mpdu_desc_info(struct dp_soc *soc, qdf_nbuf_t nbuf,
  862. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  863. bool first_msdu_in_mpdu_processed)
  864. {
  865. if (first_msdu_in_mpdu_processed) {
  866. /*
  867. * This is the 2nd indication of first_msdu in the same mpdu.
  868. * Skip re-parsing the mdpu_desc_info and use the cached one,
  869. * since this msdu is most probably from the current mpdu
  870. * which is being processed
  871. */
  872. } else {
  873. hal_rx_tlv_populate_mpdu_desc_info(soc->hal_soc,
  874. qdf_nbuf_data(nbuf),
  875. mpdu_desc_info);
  876. }
  877. }
  878. #else
  879. static inline void
  880. dp_rx_err_populate_mpdu_desc_info(struct dp_soc *soc, qdf_nbuf_t nbuf,
  881. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  882. bool first_msdu_in_mpdu_processed)
  883. {
  884. hal_rx_tlv_populate_mpdu_desc_info(soc->hal_soc, qdf_nbuf_data(nbuf),
  885. mpdu_desc_info);
  886. }
  887. #endif
  888. /**
  889. * dp_rx_reo_err_entry_process() - Handles for REO error entry processing
  890. *
  891. * @soc: core txrx main context
  892. * @ring_desc: opaque pointer to the REO error ring descriptor
  893. * @mpdu_desc_info: pointer to mpdu level description info
  894. * @link_desc_va: pointer to msdu_link_desc virtual address
  895. * @err_code: reo error code fetched from ring entry
  896. *
  897. * Function to handle msdus fetched from msdu link desc, currently
  898. * support REO error NULL queue, 2K jump, OOR.
  899. *
  900. * Return: msdu count processed
  901. */
  902. static uint32_t
  903. dp_rx_reo_err_entry_process(struct dp_soc *soc,
  904. void *ring_desc,
  905. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  906. void *link_desc_va,
  907. enum hal_reo_error_code err_code)
  908. {
  909. uint32_t rx_bufs_used = 0;
  910. struct dp_pdev *pdev;
  911. int i;
  912. uint8_t *rx_tlv_hdr_first;
  913. uint8_t *rx_tlv_hdr_last;
  914. uint32_t tid = DP_MAX_TIDS;
  915. uint16_t peer_id;
  916. struct dp_rx_desc *rx_desc;
  917. struct rx_desc_pool *rx_desc_pool;
  918. qdf_nbuf_t nbuf;
  919. qdf_nbuf_t next_nbuf;
  920. struct hal_buf_info buf_info;
  921. struct hal_rx_msdu_list msdu_list;
  922. uint16_t num_msdus;
  923. struct buffer_addr_info cur_link_desc_addr_info = { 0 };
  924. struct buffer_addr_info next_link_desc_addr_info = { 0 };
  925. /* First field in REO Dst ring Desc is buffer_addr_info */
  926. void *buf_addr_info = ring_desc;
  927. qdf_nbuf_t head_nbuf = NULL;
  928. qdf_nbuf_t tail_nbuf = NULL;
  929. uint16_t msdu_processed = 0;
  930. QDF_STATUS status;
  931. bool ret, is_pn_check_needed;
  932. uint8_t rx_desc_pool_id;
  933. struct dp_txrx_peer *txrx_peer = NULL;
  934. dp_txrx_ref_handle txrx_ref_handle = NULL;
  935. hal_ring_handle_t hal_ring_hdl = soc->reo_exception_ring.hal_srng;
  936. bool first_msdu_in_mpdu_processed = false;
  937. bool msdu_dropped = false;
  938. uint8_t link_id = 0;
  939. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  940. mpdu_desc_info->peer_meta_data);
  941. is_pn_check_needed = dp_rx_err_is_pn_check_needed(soc,
  942. HAL_REO_ERROR_DETECTED,
  943. err_code);
  944. more_msdu_link_desc:
  945. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  946. &num_msdus);
  947. for (i = 0; i < num_msdus; i++) {
  948. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  949. soc,
  950. msdu_list.sw_cookie[i]);
  951. if (dp_assert_always_internal_stat(rx_desc, soc,
  952. rx.err.reo_err_rx_desc_null))
  953. continue;
  954. nbuf = rx_desc->nbuf;
  955. /*
  956. * this is a unlikely scenario where the host is reaping
  957. * a descriptor which it already reaped just a while ago
  958. * but is yet to replenish it back to HW.
  959. * In this case host will dump the last 128 descriptors
  960. * including the software descriptor rx_desc and assert.
  961. */
  962. if (qdf_unlikely(!rx_desc->in_use) ||
  963. qdf_unlikely(!nbuf)) {
  964. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  965. dp_info_rl("Reaping rx_desc not in use!");
  966. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  967. ring_desc, rx_desc);
  968. /* ignore duplicate RX desc and continue to process */
  969. /* Pop out the descriptor */
  970. msdu_dropped = true;
  971. continue;
  972. }
  973. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  974. msdu_list.paddr[i]);
  975. if (!ret) {
  976. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  977. rx_desc->in_err_state = 1;
  978. msdu_dropped = true;
  979. continue;
  980. }
  981. rx_desc_pool_id = rx_desc->pool_id;
  982. /* all buffers from a MSDU link belong to same pdev */
  983. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc_pool_id);
  984. rx_desc_pool = &soc->rx_desc_buf[rx_desc_pool_id];
  985. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  986. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  987. rx_desc->unmapped = 1;
  988. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  989. QDF_NBUF_CB_RX_PKT_LEN(nbuf) = msdu_list.msdu_info[i].msdu_len;
  990. rx_bufs_used++;
  991. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  992. &pdev->free_list_tail, rx_desc);
  993. DP_RX_LIST_APPEND(head_nbuf, tail_nbuf, nbuf);
  994. if (qdf_unlikely(msdu_list.msdu_info[i].msdu_flags &
  995. HAL_MSDU_F_MSDU_CONTINUATION)) {
  996. qdf_nbuf_set_rx_chfrag_cont(nbuf, 1);
  997. continue;
  998. }
  999. if (dp_rx_buffer_pool_refill(soc, head_nbuf,
  1000. rx_desc_pool_id)) {
  1001. /* MSDU queued back to the pool */
  1002. msdu_dropped = true;
  1003. head_nbuf = NULL;
  1004. goto process_next_msdu;
  1005. }
  1006. if (is_pn_check_needed) {
  1007. if (msdu_list.msdu_info[i].msdu_flags &
  1008. HAL_MSDU_F_FIRST_MSDU_IN_MPDU) {
  1009. dp_rx_err_populate_mpdu_desc_info(soc, nbuf,
  1010. mpdu_desc_info,
  1011. first_msdu_in_mpdu_processed);
  1012. first_msdu_in_mpdu_processed = true;
  1013. } else {
  1014. if (!first_msdu_in_mpdu_processed) {
  1015. /*
  1016. * If no msdu in this mpdu was dropped
  1017. * due to failed sanity checks, then
  1018. * its not expected to hit this
  1019. * condition. Hence we assert here.
  1020. */
  1021. if (!msdu_dropped)
  1022. qdf_assert_always(0);
  1023. /*
  1024. * We do not have valid mpdu_desc_info
  1025. * to process this nbuf, hence drop it.
  1026. * TODO - Increment stats
  1027. */
  1028. goto process_next_msdu;
  1029. }
  1030. /*
  1031. * DO NOTHING -
  1032. * Continue using the same mpdu_desc_info
  1033. * details populated from the first msdu in
  1034. * the mpdu.
  1035. */
  1036. }
  1037. status = dp_rx_err_nbuf_pn_check(soc, ring_desc, nbuf);
  1038. if (QDF_IS_STATUS_ERROR(status)) {
  1039. DP_STATS_INC(soc, rx.err.pn_in_dest_check_fail,
  1040. 1);
  1041. goto process_next_msdu;
  1042. }
  1043. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  1044. mpdu_desc_info->peer_meta_data);
  1045. if (mpdu_desc_info->bar_frame)
  1046. _dp_rx_bar_frame_handle(soc, nbuf,
  1047. mpdu_desc_info, tid,
  1048. HAL_REO_ERROR_DETECTED,
  1049. err_code);
  1050. }
  1051. rx_tlv_hdr_first = qdf_nbuf_data(head_nbuf);
  1052. rx_tlv_hdr_last = qdf_nbuf_data(tail_nbuf);
  1053. if (qdf_unlikely(head_nbuf != tail_nbuf)) {
  1054. /*
  1055. * For SG case, only the length of last skb is valid
  1056. * as HW only populate the msdu_len for last msdu
  1057. * in rx link descriptor, use the length from
  1058. * last skb to overwrite the head skb for further
  1059. * SG processing.
  1060. */
  1061. QDF_NBUF_CB_RX_PKT_LEN(head_nbuf) =
  1062. QDF_NBUF_CB_RX_PKT_LEN(tail_nbuf);
  1063. nbuf = dp_rx_sg_create(soc, head_nbuf);
  1064. qdf_nbuf_set_is_frag(nbuf, 1);
  1065. DP_STATS_INC(soc, rx.err.reo_err_oor_sg_count, 1);
  1066. }
  1067. head_nbuf = NULL;
  1068. dp_rx_nbuf_set_link_id_from_tlv(soc, qdf_nbuf_data(nbuf), nbuf);
  1069. if (pdev && pdev->link_peer_stats &&
  1070. txrx_peer && txrx_peer->is_mld_peer) {
  1071. link_id = dp_rx_get_stats_arr_idx_from_link_id(
  1072. nbuf,
  1073. txrx_peer);
  1074. }
  1075. if (txrx_peer)
  1076. dp_rx_set_nbuf_band(nbuf, txrx_peer, link_id);
  1077. switch (err_code) {
  1078. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  1079. case HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET:
  1080. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  1081. /*
  1082. * only first msdu, mpdu start description tlv valid?
  1083. * and use it for following msdu.
  1084. */
  1085. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1086. rx_tlv_hdr_last))
  1087. tid = hal_rx_mpdu_start_tid_get(
  1088. soc->hal_soc,
  1089. rx_tlv_hdr_first);
  1090. dp_2k_jump_handle(soc, nbuf, rx_tlv_hdr_last,
  1091. peer_id, tid);
  1092. break;
  1093. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  1094. case HAL_REO_ERR_BAR_FRAME_OOR:
  1095. dp_rx_oor_handle(soc, nbuf, peer_id, rx_tlv_hdr_last);
  1096. break;
  1097. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  1098. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(
  1099. soc, peer_id,
  1100. &txrx_ref_handle,
  1101. DP_MOD_ID_RX_ERR);
  1102. if (!txrx_peer)
  1103. dp_info_rl("txrx_peer is null peer_id %u",
  1104. peer_id);
  1105. soc->arch_ops.dp_rx_null_q_desc_handle(soc, nbuf,
  1106. rx_tlv_hdr_last,
  1107. rx_desc_pool_id,
  1108. txrx_peer,
  1109. TRUE,
  1110. link_id);
  1111. if (txrx_peer)
  1112. dp_txrx_peer_unref_delete(txrx_ref_handle,
  1113. DP_MOD_ID_RX_ERR);
  1114. break;
  1115. default:
  1116. dp_err_rl("Non-support error code %d", err_code);
  1117. dp_rx_nbuf_free(nbuf);
  1118. }
  1119. process_next_msdu:
  1120. nbuf = head_nbuf;
  1121. while (nbuf) {
  1122. next_nbuf = qdf_nbuf_next(nbuf);
  1123. dp_rx_nbuf_free(nbuf);
  1124. nbuf = next_nbuf;
  1125. }
  1126. msdu_processed++;
  1127. head_nbuf = NULL;
  1128. tail_nbuf = NULL;
  1129. }
  1130. /*
  1131. * If the msdu's are spread across multiple link-descriptors,
  1132. * we cannot depend solely on the msdu_count(e.g., if msdu is
  1133. * spread across multiple buffers).Hence, it is
  1134. * necessary to check the next link_descriptor and release
  1135. * all the msdu's that are part of it.
  1136. */
  1137. hal_rx_get_next_msdu_link_desc_buf_addr_info(
  1138. link_desc_va,
  1139. &next_link_desc_addr_info);
  1140. if (hal_rx_is_buf_addr_info_valid(
  1141. &next_link_desc_addr_info)) {
  1142. /* Clear the next link desc info for the current link_desc */
  1143. hal_rx_clear_next_msdu_link_desc_buf_addr_info(link_desc_va);
  1144. dp_rx_link_desc_return_by_addr(
  1145. soc,
  1146. buf_addr_info,
  1147. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1148. hal_rx_buffer_addr_info_get_paddr(
  1149. &next_link_desc_addr_info,
  1150. &buf_info);
  1151. /* buffer_addr_info is the first element of ring_desc */
  1152. hal_rx_buf_cookie_rbm_get(soc->hal_soc,
  1153. (uint32_t *)&next_link_desc_addr_info,
  1154. &buf_info);
  1155. link_desc_va =
  1156. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  1157. cur_link_desc_addr_info = next_link_desc_addr_info;
  1158. buf_addr_info = &cur_link_desc_addr_info;
  1159. goto more_msdu_link_desc;
  1160. }
  1161. dp_rx_link_desc_return_by_addr(soc, buf_addr_info,
  1162. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1163. if (qdf_unlikely(msdu_processed != mpdu_desc_info->msdu_count))
  1164. DP_STATS_INC(soc, rx.err.msdu_count_mismatch, 1);
  1165. return rx_bufs_used;
  1166. }
  1167. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1168. void
  1169. dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1170. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  1171. uint8_t err_code, uint8_t mac_id, uint8_t link_id)
  1172. {
  1173. uint32_t pkt_len, l2_hdr_offset;
  1174. uint16_t msdu_len;
  1175. struct dp_vdev *vdev;
  1176. qdf_ether_header_t *eh;
  1177. bool is_broadcast;
  1178. /*
  1179. * Check if DMA completed -- msdu_done is the last bit
  1180. * to be written
  1181. */
  1182. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1183. dp_err_rl("MSDU DONE failure");
  1184. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1185. QDF_TRACE_LEVEL_INFO);
  1186. qdf_assert(0);
  1187. }
  1188. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc,
  1189. rx_tlv_hdr);
  1190. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1191. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  1192. if (dp_rx_check_pkt_len(soc, pkt_len)) {
  1193. /* Drop & free packet */
  1194. dp_rx_nbuf_free(nbuf);
  1195. return;
  1196. }
  1197. /* Set length in nbuf */
  1198. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1199. qdf_nbuf_set_next(nbuf, NULL);
  1200. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  1201. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  1202. if (!txrx_peer) {
  1203. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP, "txrx_peer is NULL");
  1204. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1205. qdf_nbuf_len(nbuf));
  1206. /* Trigger invalid peer handler wrapper */
  1207. dp_rx_process_invalid_peer_wrapper(soc, nbuf, true, mac_id);
  1208. return;
  1209. }
  1210. vdev = txrx_peer->vdev;
  1211. if (!vdev) {
  1212. dp_rx_err_info_rl("%pK: INVALID vdev %pK OR osif_rx", soc,
  1213. vdev);
  1214. /* Drop & free packet */
  1215. dp_rx_nbuf_free(nbuf);
  1216. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1217. return;
  1218. }
  1219. /*
  1220. * Advance the packet start pointer by total size of
  1221. * pre-header TLV's
  1222. */
  1223. dp_rx_skip_tlvs(soc, nbuf, l2_hdr_offset);
  1224. if (err_code == HAL_RXDMA_ERR_WIFI_PARSE) {
  1225. uint8_t *pkt_type;
  1226. pkt_type = qdf_nbuf_data(nbuf) + (2 * QDF_MAC_ADDR_SIZE);
  1227. if (*(uint16_t *)pkt_type == htons(QDF_ETH_TYPE_8021Q)) {
  1228. if (*(uint16_t *)(pkt_type + DP_SKIP_VLAN) ==
  1229. htons(QDF_LLC_STP)) {
  1230. DP_STATS_INC(vdev->pdev, vlan_tag_stp_cnt, 1);
  1231. goto process_mesh;
  1232. } else {
  1233. goto process_rx;
  1234. }
  1235. }
  1236. }
  1237. if (vdev->rx_decap_type == htt_cmn_pkt_type_raw)
  1238. goto process_mesh;
  1239. /*
  1240. * WAPI cert AP sends rekey frames as unencrypted.
  1241. * Thus RXDMA will report unencrypted frame error.
  1242. * To pass WAPI cert case, SW needs to pass unencrypted
  1243. * rekey frame to stack.
  1244. */
  1245. if (qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1246. goto process_rx;
  1247. }
  1248. /*
  1249. * In dynamic WEP case rekey frames are not encrypted
  1250. * similar to WAPI. Allow EAPOL when 8021+wep is enabled and
  1251. * key install is already done
  1252. */
  1253. if ((vdev->sec_type == cdp_sec_type_wep104) &&
  1254. (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)))
  1255. goto process_rx;
  1256. process_mesh:
  1257. if (!vdev->mesh_vdev && err_code == HAL_RXDMA_ERR_UNENCRYPTED) {
  1258. dp_rx_nbuf_free(nbuf);
  1259. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1260. return;
  1261. }
  1262. if (vdev->mesh_vdev) {
  1263. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1264. == QDF_STATUS_SUCCESS) {
  1265. dp_rx_err_info("%pK: mesh pkt filtered", soc);
  1266. DP_STATS_INC(vdev->pdev, dropped.mesh_filter, 1);
  1267. dp_rx_nbuf_free(nbuf);
  1268. return;
  1269. }
  1270. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, txrx_peer);
  1271. }
  1272. process_rx:
  1273. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1274. rx_tlv_hdr) &&
  1275. (vdev->rx_decap_type ==
  1276. htt_cmn_pkt_type_ethernet))) {
  1277. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1278. is_broadcast = (QDF_IS_ADDR_BROADCAST
  1279. (eh->ether_dhost)) ? 1 : 0 ;
  1280. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.multicast, 1,
  1281. qdf_nbuf_len(nbuf), link_id);
  1282. if (is_broadcast) {
  1283. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.bcast, 1,
  1284. qdf_nbuf_len(nbuf),
  1285. link_id);
  1286. }
  1287. } else {
  1288. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.unicast, 1,
  1289. qdf_nbuf_len(nbuf),
  1290. link_id);
  1291. }
  1292. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  1293. dp_rx_deliver_raw(vdev, nbuf, txrx_peer, link_id);
  1294. } else {
  1295. /* Update the protocol tag in SKB based on CCE metadata */
  1296. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1297. EXCEPTION_DEST_RING_ID, true, true);
  1298. /* Update the flow tag in SKB based on FSE metadata */
  1299. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1300. DP_PEER_STATS_FLAT_INC(txrx_peer, to_stack.num, 1);
  1301. qdf_nbuf_set_exc_frame(nbuf, 1);
  1302. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf, NULL,
  1303. qdf_nbuf_is_ipv4_eapol_pkt(nbuf));
  1304. }
  1305. return;
  1306. }
  1307. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1308. uint8_t *rx_tlv_hdr,
  1309. struct dp_txrx_peer *txrx_peer)
  1310. {
  1311. struct dp_vdev *vdev = NULL;
  1312. struct dp_pdev *pdev = NULL;
  1313. struct ol_if_ops *tops = NULL;
  1314. uint16_t rx_seq, fragno;
  1315. uint8_t is_raw;
  1316. unsigned int tid;
  1317. QDF_STATUS status;
  1318. struct cdp_rx_mic_err_info mic_failure_info;
  1319. if (!hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1320. rx_tlv_hdr))
  1321. return;
  1322. if (!txrx_peer) {
  1323. dp_info_rl("txrx_peer not found");
  1324. goto fail;
  1325. }
  1326. vdev = txrx_peer->vdev;
  1327. if (!vdev) {
  1328. dp_info_rl("VDEV not found");
  1329. goto fail;
  1330. }
  1331. pdev = vdev->pdev;
  1332. if (!pdev) {
  1333. dp_info_rl("PDEV not found");
  1334. goto fail;
  1335. }
  1336. is_raw = HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, qdf_nbuf_data(nbuf));
  1337. if (is_raw) {
  1338. fragno = dp_rx_frag_get_mpdu_frag_number(soc,
  1339. qdf_nbuf_data(nbuf));
  1340. /* Can get only last fragment */
  1341. if (fragno) {
  1342. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  1343. qdf_nbuf_data(nbuf));
  1344. rx_seq = hal_rx_get_rx_sequence(soc->hal_soc,
  1345. qdf_nbuf_data(nbuf));
  1346. status = dp_rx_defrag_add_last_frag(soc, txrx_peer,
  1347. tid, rx_seq, nbuf);
  1348. dp_info_rl("Frag pkt seq# %d frag# %d consumed "
  1349. "status %d !", rx_seq, fragno, status);
  1350. return;
  1351. }
  1352. }
  1353. if (hal_rx_mpdu_get_addr1(soc->hal_soc, qdf_nbuf_data(nbuf),
  1354. &mic_failure_info.da_mac_addr.bytes[0])) {
  1355. dp_err_rl("Failed to get da_mac_addr");
  1356. goto fail;
  1357. }
  1358. if (hal_rx_mpdu_get_addr2(soc->hal_soc, qdf_nbuf_data(nbuf),
  1359. &mic_failure_info.ta_mac_addr.bytes[0])) {
  1360. dp_err_rl("Failed to get ta_mac_addr");
  1361. goto fail;
  1362. }
  1363. mic_failure_info.key_id = 0;
  1364. mic_failure_info.multicast =
  1365. IEEE80211_IS_MULTICAST(mic_failure_info.da_mac_addr.bytes);
  1366. qdf_mem_zero(mic_failure_info.tsc, MIC_SEQ_CTR_SIZE);
  1367. mic_failure_info.frame_type = cdp_rx_frame_type_802_11;
  1368. mic_failure_info.data = NULL;
  1369. mic_failure_info.vdev_id = vdev->vdev_id;
  1370. tops = pdev->soc->cdp_soc.ol_ops;
  1371. if (tops->rx_mic_error)
  1372. tops->rx_mic_error(soc->ctrl_psoc, pdev->pdev_id,
  1373. &mic_failure_info);
  1374. fail:
  1375. dp_rx_nbuf_free(nbuf);
  1376. return;
  1377. }
  1378. #ifdef WLAN_SUPPORT_RX_FLOW_TAG
  1379. static void dp_rx_peek_trapped_packet(struct dp_soc *soc,
  1380. struct dp_vdev *vdev)
  1381. {
  1382. if (soc->cdp_soc.ol_ops->send_wakeup_trigger)
  1383. soc->cdp_soc.ol_ops->send_wakeup_trigger(soc->ctrl_psoc,
  1384. vdev->vdev_id);
  1385. }
  1386. #else
  1387. static void dp_rx_peek_trapped_packet(struct dp_soc *soc,
  1388. struct dp_vdev *vdev)
  1389. {
  1390. return;
  1391. }
  1392. #endif
  1393. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  1394. defined(WLAN_MCAST_MLO)
  1395. static bool dp_rx_igmp_handler(struct dp_soc *soc,
  1396. struct dp_vdev *vdev,
  1397. struct dp_txrx_peer *peer,
  1398. qdf_nbuf_t nbuf,
  1399. uint8_t link_id)
  1400. {
  1401. if (soc->arch_ops.dp_rx_mcast_handler) {
  1402. if (soc->arch_ops.dp_rx_mcast_handler(soc, vdev, peer,
  1403. nbuf, link_id))
  1404. return true;
  1405. }
  1406. return false;
  1407. }
  1408. #else
  1409. static bool dp_rx_igmp_handler(struct dp_soc *soc,
  1410. struct dp_vdev *vdev,
  1411. struct dp_txrx_peer *peer,
  1412. qdf_nbuf_t nbuf,
  1413. uint8_t link_id)
  1414. {
  1415. return false;
  1416. }
  1417. #endif
  1418. /**
  1419. * dp_rx_err_route_hdl() - Function to send EAPOL frames to stack
  1420. * Free any other packet which comes in
  1421. * this path.
  1422. *
  1423. * @soc: core DP main context
  1424. * @nbuf: buffer pointer
  1425. * @txrx_peer: txrx peer handle
  1426. * @rx_tlv_hdr: start of rx tlv header
  1427. * @err_src: rxdma/reo
  1428. * @link_id: link id on which the packet is received
  1429. *
  1430. * This function indicates EAPOL frame received in wbm error ring to stack.
  1431. * Any other frame should be dropped.
  1432. *
  1433. * Return: SUCCESS if delivered to stack
  1434. */
  1435. static void
  1436. dp_rx_err_route_hdl(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1437. struct dp_txrx_peer *txrx_peer, uint8_t *rx_tlv_hdr,
  1438. enum hal_rx_wbm_error_source err_src,
  1439. uint8_t link_id)
  1440. {
  1441. uint32_t pkt_len;
  1442. uint16_t msdu_len;
  1443. struct dp_vdev *vdev;
  1444. struct hal_rx_msdu_metadata msdu_metadata;
  1445. bool is_eapol;
  1446. qdf_nbuf_set_rx_chfrag_start(
  1447. nbuf,
  1448. hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  1449. rx_tlv_hdr));
  1450. qdf_nbuf_set_rx_chfrag_end(nbuf,
  1451. hal_rx_msdu_end_last_msdu_get(soc->hal_soc,
  1452. rx_tlv_hdr));
  1453. qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1454. rx_tlv_hdr));
  1455. qdf_nbuf_set_da_valid(nbuf,
  1456. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1457. rx_tlv_hdr));
  1458. qdf_nbuf_set_sa_valid(nbuf,
  1459. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1460. rx_tlv_hdr));
  1461. hal_rx_msdu_metadata_get(soc->hal_soc, rx_tlv_hdr, &msdu_metadata);
  1462. msdu_len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc, rx_tlv_hdr);
  1463. pkt_len = msdu_len + msdu_metadata.l3_hdr_pad + soc->rx_pkt_tlv_size;
  1464. if (qdf_likely(!qdf_nbuf_is_frag(nbuf))) {
  1465. if (dp_rx_check_pkt_len(soc, pkt_len))
  1466. goto drop_nbuf;
  1467. /* Set length in nbuf */
  1468. qdf_nbuf_set_pktlen(
  1469. nbuf, qdf_min(pkt_len, (uint32_t)RX_DATA_BUFFER_SIZE));
  1470. }
  1471. /*
  1472. * Check if DMA completed -- msdu_done is the last bit
  1473. * to be written
  1474. */
  1475. if (!hal_rx_attn_msdu_done_get(soc->hal_soc, rx_tlv_hdr)) {
  1476. dp_err_rl("MSDU DONE failure");
  1477. hal_rx_dump_pkt_tlvs(soc->hal_soc, rx_tlv_hdr,
  1478. QDF_TRACE_LEVEL_INFO);
  1479. qdf_assert(0);
  1480. }
  1481. if (!txrx_peer)
  1482. goto drop_nbuf;
  1483. vdev = txrx_peer->vdev;
  1484. if (!vdev) {
  1485. dp_err_rl("Null vdev!");
  1486. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1487. goto drop_nbuf;
  1488. }
  1489. /*
  1490. * Advance the packet start pointer by total size of
  1491. * pre-header TLV's
  1492. */
  1493. if (qdf_nbuf_is_frag(nbuf))
  1494. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1495. else
  1496. qdf_nbuf_pull_head(nbuf, (msdu_metadata.l3_hdr_pad +
  1497. soc->rx_pkt_tlv_size));
  1498. if (hal_rx_msdu_cce_metadata_get(soc->hal_soc, rx_tlv_hdr) ==
  1499. CDP_STANDBY_METADATA)
  1500. dp_rx_peek_trapped_packet(soc, vdev);
  1501. QDF_NBUF_CB_RX_PEER_ID(nbuf) = txrx_peer->peer_id;
  1502. if (dp_rx_igmp_handler(soc, vdev, txrx_peer, nbuf, link_id))
  1503. return;
  1504. dp_vdev_peer_stats_update_protocol_cnt(vdev, nbuf, NULL, 0, 1);
  1505. /*
  1506. * Indicate EAPOL frame to stack only when vap mac address
  1507. * matches the destination address.
  1508. */
  1509. is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf);
  1510. if (is_eapol || qdf_nbuf_is_ipv4_wapi_pkt(nbuf)) {
  1511. qdf_ether_header_t *eh =
  1512. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1513. if (dp_rx_err_match_dhost(eh, vdev)) {
  1514. DP_STATS_INC_PKT(vdev, rx_i.routed_eapol_pkt, 1,
  1515. qdf_nbuf_len(nbuf));
  1516. /*
  1517. * Update the protocol tag in SKB based on
  1518. * CCE metadata.
  1519. */
  1520. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1521. EXCEPTION_DEST_RING_ID,
  1522. true, true);
  1523. /* Update the flow tag in SKB based on FSE metadata */
  1524. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1525. true);
  1526. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  1527. qdf_nbuf_len(nbuf),
  1528. vdev->pdev->enhanced_stats_en);
  1529. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  1530. rx.rx_success, 1,
  1531. qdf_nbuf_len(nbuf),
  1532. link_id);
  1533. qdf_nbuf_set_exc_frame(nbuf, 1);
  1534. qdf_nbuf_set_next(nbuf, NULL);
  1535. dp_rx_deliver_to_osif_stack(soc, vdev, txrx_peer, nbuf,
  1536. NULL, is_eapol);
  1537. return;
  1538. }
  1539. }
  1540. drop_nbuf:
  1541. DP_STATS_INCC(soc, rx.reo2rel_route_drop, 1,
  1542. err_src == HAL_RX_WBM_ERR_SRC_REO);
  1543. DP_STATS_INCC(soc, rx.rxdma2rel_route_drop, 1,
  1544. err_src == HAL_RX_WBM_ERR_SRC_RXDMA);
  1545. dp_rx_nbuf_free(nbuf);
  1546. }
  1547. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1548. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  1549. /**
  1550. * dp_rx_link_cookie_check() - Validate link desc cookie
  1551. * @ring_desc: ring descriptor
  1552. *
  1553. * Return: qdf status
  1554. */
  1555. static inline QDF_STATUS
  1556. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1557. {
  1558. if (qdf_unlikely(HAL_RX_REO_BUF_LINK_COOKIE_INVALID_GET(ring_desc)))
  1559. return QDF_STATUS_E_FAILURE;
  1560. return QDF_STATUS_SUCCESS;
  1561. }
  1562. /**
  1563. * dp_rx_link_cookie_invalidate() - Invalidate link desc cookie
  1564. * @ring_desc: ring descriptor
  1565. *
  1566. * Return: None
  1567. */
  1568. static inline void
  1569. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1570. {
  1571. HAL_RX_REO_BUF_LINK_COOKIE_INVALID_SET(ring_desc);
  1572. }
  1573. #else
  1574. static inline QDF_STATUS
  1575. dp_rx_link_cookie_check(hal_ring_desc_t ring_desc)
  1576. {
  1577. return QDF_STATUS_SUCCESS;
  1578. }
  1579. static inline void
  1580. dp_rx_link_cookie_invalidate(hal_ring_desc_t ring_desc)
  1581. {
  1582. }
  1583. #endif
  1584. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1585. /**
  1586. * dp_rx_err_ring_record_entry() - Record rx err ring history
  1587. * @soc: Datapath soc structure
  1588. * @paddr: paddr of the buffer in RX err ring
  1589. * @sw_cookie: SW cookie of the buffer in RX err ring
  1590. * @rbm: Return buffer manager of the buffer in RX err ring
  1591. *
  1592. * Return: None
  1593. */
  1594. static inline void
  1595. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1596. uint32_t sw_cookie, uint8_t rbm)
  1597. {
  1598. struct dp_buf_info_record *record;
  1599. uint32_t idx;
  1600. if (qdf_unlikely(!soc->rx_err_ring_history))
  1601. return;
  1602. idx = dp_history_get_next_index(&soc->rx_err_ring_history->index,
  1603. DP_RX_ERR_HIST_MAX);
  1604. /* No NULL check needed for record since its an array */
  1605. record = &soc->rx_err_ring_history->entry[idx];
  1606. record->timestamp = qdf_get_log_timestamp();
  1607. record->hbi.paddr = paddr;
  1608. record->hbi.sw_cookie = sw_cookie;
  1609. record->hbi.rbm = rbm;
  1610. }
  1611. #else
  1612. static inline void
  1613. dp_rx_err_ring_record_entry(struct dp_soc *soc, uint64_t paddr,
  1614. uint32_t sw_cookie, uint8_t rbm)
  1615. {
  1616. }
  1617. #endif
  1618. #if defined(HANDLE_RX_REROUTE_ERR) || defined(REO_EXCEPTION_MSDU_WAR)
  1619. static int dp_rx_err_handle_msdu_buf(struct dp_soc *soc,
  1620. hal_ring_desc_t ring_desc)
  1621. {
  1622. int lmac_id = DP_INVALID_LMAC_ID;
  1623. struct dp_rx_desc *rx_desc;
  1624. struct hal_buf_info hbi;
  1625. struct dp_pdev *pdev;
  1626. struct rx_desc_pool *rx_desc_pool;
  1627. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1628. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, hbi.sw_cookie);
  1629. /* sanity */
  1630. if (!rx_desc) {
  1631. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_invalid_cookie, 1);
  1632. goto assert_return;
  1633. }
  1634. if (!rx_desc->nbuf)
  1635. goto assert_return;
  1636. dp_rx_err_ring_record_entry(soc, hbi.paddr,
  1637. hbi.sw_cookie,
  1638. hal_rx_ret_buf_manager_get(soc->hal_soc,
  1639. ring_desc));
  1640. if (hbi.paddr != qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0)) {
  1641. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1642. rx_desc->in_err_state = 1;
  1643. goto assert_return;
  1644. }
  1645. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1646. /* After this point the rx_desc and nbuf are valid */
  1647. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  1648. qdf_assert_always(!rx_desc->unmapped);
  1649. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, rx_desc->nbuf);
  1650. rx_desc->unmapped = 1;
  1651. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  1652. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  1653. rx_desc->pool_id);
  1654. pdev = dp_get_pdev_for_lmac_id(soc, rx_desc->pool_id);
  1655. lmac_id = rx_desc->pool_id;
  1656. dp_rx_add_to_free_desc_list(&pdev->free_list_head,
  1657. &pdev->free_list_tail,
  1658. rx_desc);
  1659. return lmac_id;
  1660. assert_return:
  1661. qdf_assert(0);
  1662. return lmac_id;
  1663. }
  1664. #endif
  1665. #ifdef HANDLE_RX_REROUTE_ERR
  1666. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1667. {
  1668. int ret;
  1669. uint64_t cur_time_stamp;
  1670. DP_STATS_INC(soc, rx.err.reo_err_msdu_buf_rcved, 1);
  1671. /* Recover if overall error count exceeds threshold */
  1672. if (soc->stats.rx.err.reo_err_msdu_buf_rcved >
  1673. DP_MAX_REG_RX_ROUTING_ERRS_THRESHOLD) {
  1674. dp_err("pkt threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1675. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1676. soc->rx_route_err_start_pkt_ts);
  1677. qdf_trigger_self_recovery(NULL, QDF_RX_REG_PKT_ROUTE_ERR);
  1678. }
  1679. cur_time_stamp = qdf_get_log_timestamp_usecs();
  1680. if (!soc->rx_route_err_start_pkt_ts)
  1681. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1682. /* Recover if threshold number of packets received in threshold time */
  1683. if ((cur_time_stamp - soc->rx_route_err_start_pkt_ts) >
  1684. DP_RX_ERR_ROUTE_TIMEOUT_US) {
  1685. soc->rx_route_err_start_pkt_ts = cur_time_stamp;
  1686. if (soc->rx_route_err_in_window >
  1687. DP_MAX_REG_RX_ROUTING_ERRS_IN_TIMEOUT) {
  1688. qdf_trigger_self_recovery(NULL,
  1689. QDF_RX_REG_PKT_ROUTE_ERR);
  1690. dp_err("rate threshold breached! reo_err_msdu_buf_rcved %u first err pkt time_stamp %llu",
  1691. soc->stats.rx.err.reo_err_msdu_buf_rcved,
  1692. soc->rx_route_err_start_pkt_ts);
  1693. } else {
  1694. soc->rx_route_err_in_window = 1;
  1695. }
  1696. } else {
  1697. soc->rx_route_err_in_window++;
  1698. }
  1699. ret = dp_rx_err_handle_msdu_buf(soc, ring_desc);
  1700. return ret;
  1701. }
  1702. #else /* HANDLE_RX_REROUTE_ERR */
  1703. #ifdef REO_EXCEPTION_MSDU_WAR
  1704. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1705. {
  1706. return dp_rx_err_handle_msdu_buf(soc, ring_desc);
  1707. }
  1708. #else /* REO_EXCEPTION_MSDU_WAR */
  1709. static int dp_rx_err_exception(struct dp_soc *soc, hal_ring_desc_t ring_desc)
  1710. {
  1711. qdf_assert_always(0);
  1712. return DP_INVALID_LMAC_ID;
  1713. }
  1714. #endif /* REO_EXCEPTION_MSDU_WAR */
  1715. #endif /* HANDLE_RX_REROUTE_ERR */
  1716. #ifdef WLAN_MLO_MULTI_CHIP
  1717. /**
  1718. * dp_idle_link_bm_id_check() - war for HW issue
  1719. *
  1720. * @soc: DP SOC handle
  1721. * @rbm: idle link RBM value
  1722. * @ring_desc: reo error link descriptor
  1723. *
  1724. * This is a war for HW issue where link descriptor
  1725. * of partner soc received due to packets wrongly
  1726. * interpreted as fragments
  1727. *
  1728. * Return: true in case link desc is consumed
  1729. * false in other cases
  1730. */
  1731. static bool dp_idle_link_bm_id_check(struct dp_soc *soc, uint8_t rbm,
  1732. void *ring_desc)
  1733. {
  1734. struct dp_soc *replenish_soc = NULL;
  1735. /* return ok incase of link desc of same soc */
  1736. if (rbm == soc->idle_link_bm_id)
  1737. return false;
  1738. if (soc->arch_ops.dp_soc_get_by_idle_bm_id)
  1739. replenish_soc =
  1740. soc->arch_ops.dp_soc_get_by_idle_bm_id(soc, rbm);
  1741. qdf_assert_always(replenish_soc);
  1742. /*
  1743. * For WIN usecase we should only get fragment packets in
  1744. * this ring as for MLO case fragmentation is not supported
  1745. * we should not see links from other soc.
  1746. *
  1747. * Drop all packets from partner soc and replenish the descriptors
  1748. */
  1749. dp_handle_wbm_internal_error(replenish_soc, ring_desc,
  1750. HAL_WBM_RELEASE_RING_2_DESC_TYPE);
  1751. return true;
  1752. }
  1753. #else
  1754. static bool dp_idle_link_bm_id_check(struct dp_soc *soc, uint8_t rbm,
  1755. void *ring_desc)
  1756. {
  1757. return false;
  1758. }
  1759. #endif
  1760. static inline void
  1761. dp_rx_err_dup_frame(struct dp_soc *soc,
  1762. struct hal_rx_mpdu_desc_info *mpdu_desc_info)
  1763. {
  1764. struct dp_txrx_peer *txrx_peer = NULL;
  1765. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1766. uint16_t peer_id;
  1767. peer_id =
  1768. dp_rx_peer_metadata_peer_id_get(soc,
  1769. mpdu_desc_info->peer_meta_data);
  1770. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  1771. &txrx_ref_handle,
  1772. DP_MOD_ID_RX_ERR);
  1773. if (txrx_peer) {
  1774. DP_STATS_INC(txrx_peer->vdev, rx.duplicate_count, 1);
  1775. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX_ERR);
  1776. }
  1777. }
  1778. uint32_t
  1779. dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1780. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  1781. {
  1782. hal_ring_desc_t ring_desc;
  1783. hal_soc_handle_t hal_soc;
  1784. uint32_t count = 0;
  1785. uint32_t rx_bufs_used = 0;
  1786. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1787. uint8_t mac_id = 0;
  1788. uint8_t buf_type;
  1789. uint8_t err_status;
  1790. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1791. struct hal_buf_info hbi;
  1792. struct dp_pdev *dp_pdev;
  1793. struct dp_srng *dp_rxdma_srng;
  1794. struct rx_desc_pool *rx_desc_pool;
  1795. void *link_desc_va;
  1796. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  1797. uint16_t num_msdus;
  1798. struct dp_rx_desc *rx_desc = NULL;
  1799. QDF_STATUS status;
  1800. bool ret;
  1801. uint32_t error_code = 0;
  1802. bool sw_pn_check_needed;
  1803. int max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  1804. int i, rx_bufs_reaped_total;
  1805. uint16_t peer_id;
  1806. struct dp_txrx_peer *txrx_peer = NULL;
  1807. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1808. /* Debug -- Remove later */
  1809. qdf_assert(soc && hal_ring_hdl);
  1810. hal_soc = soc->hal_soc;
  1811. /* Debug -- Remove later */
  1812. qdf_assert(hal_soc);
  1813. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1814. /* TODO */
  1815. /*
  1816. * Need API to convert from hal_ring pointer to
  1817. * Ring Type / Ring Id combo
  1818. */
  1819. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1820. dp_rx_err_err("%pK: HAL RING Access Failed -- %pK", soc,
  1821. hal_ring_hdl);
  1822. goto done;
  1823. }
  1824. while (qdf_likely(quota-- && (ring_desc =
  1825. hal_srng_dst_peek(hal_soc,
  1826. hal_ring_hdl)))) {
  1827. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  1828. err_status = hal_rx_err_status_get(hal_soc, ring_desc);
  1829. buf_type = hal_rx_reo_buf_type_get(hal_soc, ring_desc);
  1830. if (err_status == HAL_REO_ERROR_DETECTED)
  1831. error_code = hal_rx_get_reo_error_code(hal_soc,
  1832. ring_desc);
  1833. qdf_mem_set(&mpdu_desc_info, sizeof(mpdu_desc_info), 0);
  1834. sw_pn_check_needed = dp_rx_err_is_pn_check_needed(soc,
  1835. err_status,
  1836. error_code);
  1837. if (!sw_pn_check_needed) {
  1838. /*
  1839. * MPDU desc info will be present in the REO desc
  1840. * only in the below scenarios
  1841. * 1) pn_in_dest_disabled: always
  1842. * 2) pn_in_dest enabled: All cases except 2k-jup
  1843. * and OOR errors
  1844. */
  1845. hal_rx_mpdu_desc_info_get(hal_soc, ring_desc,
  1846. &mpdu_desc_info);
  1847. }
  1848. if (HAL_RX_REO_DESC_MSDU_COUNT_GET(ring_desc) == 0)
  1849. goto next_entry;
  1850. /*
  1851. * For REO error ring, only MSDU LINK DESC is expected.
  1852. * Handle HAL_RX_REO_MSDU_BUF_ADDR_TYPE exception case.
  1853. */
  1854. if (qdf_unlikely(buf_type != HAL_RX_REO_MSDU_LINK_DESC_TYPE)) {
  1855. int lmac_id;
  1856. lmac_id = dp_rx_err_exception(soc, ring_desc);
  1857. if (lmac_id >= 0)
  1858. rx_bufs_reaped[lmac_id] += 1;
  1859. goto next_entry;
  1860. }
  1861. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  1862. &hbi);
  1863. /*
  1864. * check for the magic number in the sw cookie
  1865. */
  1866. qdf_assert_always((hbi.sw_cookie >> LINK_DESC_ID_SHIFT) &
  1867. soc->link_desc_id_start);
  1868. if (dp_idle_link_bm_id_check(soc, hbi.rbm, ring_desc)) {
  1869. DP_STATS_INC(soc, rx.err.invalid_link_cookie, 1);
  1870. goto next_entry;
  1871. }
  1872. status = dp_rx_link_cookie_check(ring_desc);
  1873. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1874. DP_STATS_INC(soc, rx.err.invalid_link_cookie, 1);
  1875. break;
  1876. }
  1877. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1878. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  1879. hal_rx_msdu_list_get(soc->hal_soc, link_desc_va, &msdu_list,
  1880. &num_msdus);
  1881. if (!num_msdus ||
  1882. !dp_rx_is_sw_cookie_valid(soc, msdu_list.sw_cookie[0])) {
  1883. dp_rx_err_info_rl("Invalid MSDU info num_msdus %u cookie: 0x%x",
  1884. num_msdus, msdu_list.sw_cookie[0]);
  1885. dp_rx_link_desc_return(soc, ring_desc,
  1886. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  1887. goto next_entry;
  1888. }
  1889. dp_rx_err_ring_record_entry(soc, msdu_list.paddr[0],
  1890. msdu_list.sw_cookie[0],
  1891. msdu_list.rbm[0]);
  1892. // TODO - BE- Check if the RBM is to be checked for all chips
  1893. if (qdf_unlikely((msdu_list.rbm[0] !=
  1894. dp_rx_get_rx_bm_id(soc)) &&
  1895. (msdu_list.rbm[0] !=
  1896. soc->idle_link_bm_id) &&
  1897. (msdu_list.rbm[0] !=
  1898. dp_rx_get_defrag_bm_id(soc)))) {
  1899. /* TODO */
  1900. /* Call appropriate handler */
  1901. if (!wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1902. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  1903. dp_rx_err_err("%pK: Invalid RBM %d",
  1904. soc, msdu_list.rbm[0]);
  1905. }
  1906. /* Return link descriptor through WBM ring (SW2WBM)*/
  1907. dp_rx_link_desc_return(soc, ring_desc,
  1908. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  1909. goto next_entry;
  1910. }
  1911. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  1912. soc,
  1913. msdu_list.sw_cookie[0]);
  1914. qdf_assert_always(rx_desc);
  1915. mac_id = rx_desc->pool_id;
  1916. if (sw_pn_check_needed) {
  1917. goto process_reo_error_code;
  1918. }
  1919. if (mpdu_desc_info.bar_frame) {
  1920. qdf_assert_always(mpdu_desc_info.msdu_count == 1);
  1921. dp_rx_bar_frame_handle(soc, ring_desc, rx_desc,
  1922. &mpdu_desc_info, err_status,
  1923. error_code);
  1924. rx_bufs_reaped[mac_id] += 1;
  1925. goto next_entry;
  1926. }
  1927. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  1928. /*
  1929. * We only handle one msdu per link desc for fragmented
  1930. * case. We drop the msdus and release the link desc
  1931. * back if there are more than one msdu in link desc.
  1932. */
  1933. if (qdf_unlikely(num_msdus > 1)) {
  1934. count = dp_rx_msdus_drop(soc, ring_desc,
  1935. &mpdu_desc_info,
  1936. &mac_id, quota);
  1937. rx_bufs_reaped[mac_id] += count;
  1938. goto next_entry;
  1939. }
  1940. /*
  1941. * this is a unlikely scenario where the host is reaping
  1942. * a descriptor which it already reaped just a while ago
  1943. * but is yet to replenish it back to HW.
  1944. * In this case host will dump the last 128 descriptors
  1945. * including the software descriptor rx_desc and assert.
  1946. */
  1947. if (qdf_unlikely(!rx_desc->in_use)) {
  1948. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1949. dp_info_rl("Reaping rx_desc not in use!");
  1950. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1951. ring_desc, rx_desc);
  1952. /* ignore duplicate RX desc and continue */
  1953. /* Pop out the descriptor */
  1954. goto next_entry;
  1955. }
  1956. ret = dp_rx_desc_paddr_sanity_check(rx_desc,
  1957. msdu_list.paddr[0]);
  1958. if (!ret) {
  1959. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1960. rx_desc->in_err_state = 1;
  1961. goto next_entry;
  1962. }
  1963. count = dp_rx_frag_handle(soc,
  1964. ring_desc, &mpdu_desc_info,
  1965. rx_desc, &mac_id, quota);
  1966. rx_bufs_reaped[mac_id] += count;
  1967. DP_STATS_INC(soc, rx.rx_frags, 1);
  1968. peer_id = dp_rx_peer_metadata_peer_id_get(soc,
  1969. mpdu_desc_info.peer_meta_data);
  1970. txrx_peer =
  1971. dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  1972. &txrx_ref_handle,
  1973. DP_MOD_ID_RX_ERR);
  1974. if (txrx_peer) {
  1975. DP_STATS_INC(txrx_peer->vdev,
  1976. rx.fragment_count, 1);
  1977. dp_txrx_peer_unref_delete(txrx_ref_handle,
  1978. DP_MOD_ID_RX_ERR);
  1979. }
  1980. goto next_entry;
  1981. }
  1982. process_reo_error_code:
  1983. /*
  1984. * Expect REO errors to be handled after this point
  1985. */
  1986. qdf_assert_always(err_status == HAL_REO_ERROR_DETECTED);
  1987. dp_info_rl("Got pkt with REO ERROR: %d", error_code);
  1988. switch (error_code) {
  1989. case HAL_REO_ERR_PN_CHECK_FAILED:
  1990. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  1991. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  1992. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1993. if (dp_pdev)
  1994. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  1995. count = dp_rx_pn_error_handle(soc,
  1996. ring_desc,
  1997. &mpdu_desc_info, &mac_id,
  1998. quota);
  1999. rx_bufs_reaped[mac_id] += count;
  2000. break;
  2001. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2002. case HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET:
  2003. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2004. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2005. case HAL_REO_ERR_BAR_FRAME_OOR:
  2006. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2007. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2008. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2009. if (dp_pdev)
  2010. DP_STATS_INC(dp_pdev, err.reo_error, 1);
  2011. count = dp_rx_reo_err_entry_process(
  2012. soc,
  2013. ring_desc,
  2014. &mpdu_desc_info,
  2015. link_desc_va,
  2016. error_code);
  2017. rx_bufs_reaped[mac_id] += count;
  2018. break;
  2019. case HAL_REO_ERR_NON_BA_DUPLICATE:
  2020. dp_rx_err_dup_frame(soc, &mpdu_desc_info);
  2021. fallthrough;
  2022. case HAL_REO_ERR_QUEUE_DESC_INVALID:
  2023. case HAL_REO_ERR_AMPDU_IN_NON_BA:
  2024. case HAL_REO_ERR_BA_DUPLICATE:
  2025. case HAL_REO_ERR_BAR_FRAME_NO_BA_SESSION:
  2026. case HAL_REO_ERR_BAR_FRAME_SN_EQUALS_SSN:
  2027. case HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET:
  2028. DP_STATS_INC(soc, rx.err.reo_error[error_code], 1);
  2029. count = dp_rx_msdus_drop(soc, ring_desc,
  2030. &mpdu_desc_info,
  2031. &mac_id, quota);
  2032. rx_bufs_reaped[mac_id] += count;
  2033. break;
  2034. default:
  2035. /* Assert if unexpected error type */
  2036. qdf_assert_always(0);
  2037. }
  2038. next_entry:
  2039. dp_rx_link_cookie_invalidate(ring_desc);
  2040. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2041. rx_bufs_reaped_total = 0;
  2042. for (i = 0; i < MAX_PDEV_CNT; i++)
  2043. rx_bufs_reaped_total += rx_bufs_reaped[i];
  2044. if (dp_rx_reap_loop_pkt_limit_hit(soc, rx_bufs_reaped_total,
  2045. max_reap_limit))
  2046. break;
  2047. }
  2048. done:
  2049. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2050. if (soc->rx.flags.defrag_timeout_check) {
  2051. uint32_t now_ms =
  2052. qdf_system_ticks_to_msecs(qdf_system_ticks());
  2053. if (now_ms >= soc->rx.defrag.next_flush_ms)
  2054. dp_rx_defrag_waitlist_flush(soc);
  2055. }
  2056. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2057. if (rx_bufs_reaped[mac_id]) {
  2058. dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2059. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2060. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2061. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2062. rx_desc_pool,
  2063. rx_bufs_reaped[mac_id],
  2064. &dp_pdev->free_list_head,
  2065. &dp_pdev->free_list_tail,
  2066. false);
  2067. rx_bufs_used += rx_bufs_reaped[mac_id];
  2068. }
  2069. }
  2070. return rx_bufs_used; /* Assume no scale factor for now */
  2071. }
  2072. #ifdef DROP_RXDMA_DECRYPT_ERR
  2073. /**
  2074. * dp_handle_rxdma_decrypt_err() - Check if decrypt err frames can be handled
  2075. *
  2076. * Return: true if rxdma decrypt err frames are handled and false otherwise
  2077. */
  2078. static inline bool dp_handle_rxdma_decrypt_err(void)
  2079. {
  2080. return false;
  2081. }
  2082. #else
  2083. static inline bool dp_handle_rxdma_decrypt_err(void)
  2084. {
  2085. return true;
  2086. }
  2087. #endif
  2088. void dp_rx_wbm_sg_list_last_msdu_war(struct dp_soc *soc)
  2089. {
  2090. if (soc->wbm_sg_last_msdu_war) {
  2091. uint32_t len;
  2092. qdf_nbuf_t temp = soc->wbm_sg_param.wbm_sg_nbuf_tail;
  2093. len = hal_rx_msdu_start_msdu_len_get(soc->hal_soc,
  2094. qdf_nbuf_data(temp));
  2095. temp = soc->wbm_sg_param.wbm_sg_nbuf_head;
  2096. while (temp) {
  2097. QDF_NBUF_CB_RX_PKT_LEN(temp) = len;
  2098. temp = temp->next;
  2099. }
  2100. }
  2101. }
  2102. #ifdef RX_DESC_DEBUG_CHECK
  2103. QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
  2104. hal_ring_handle_t hal_ring_hdl,
  2105. hal_ring_desc_t ring_desc,
  2106. struct dp_rx_desc *rx_desc)
  2107. {
  2108. struct hal_buf_info hbi;
  2109. hal_rx_wbm_rel_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2110. /* Sanity check for possible buffer paddr corruption */
  2111. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  2112. return QDF_STATUS_SUCCESS;
  2113. hal_srng_dump_ring_desc(soc->hal_soc, hal_ring_hdl, ring_desc);
  2114. return QDF_STATUS_E_FAILURE;
  2115. }
  2116. #else
  2117. QDF_STATUS dp_rx_wbm_desc_nbuf_sanity_check(struct dp_soc *soc,
  2118. hal_ring_handle_t hal_ring_hdl,
  2119. hal_ring_desc_t ring_desc,
  2120. struct dp_rx_desc *rx_desc)
  2121. {
  2122. return QDF_STATUS_SUCCESS;
  2123. }
  2124. #endif
  2125. bool
  2126. dp_rx_is_sg_formation_required(struct hal_wbm_err_desc_info *info)
  2127. {
  2128. /*
  2129. * Currently Null Queue and Unencrypted error handlers has support for
  2130. * SG. Other error handler do not deal with SG buffer.
  2131. */
  2132. if (((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) &&
  2133. (info->reo_err_code == HAL_REO_ERR_QUEUE_DESC_ADDR_0)) ||
  2134. ((info->wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) &&
  2135. (info->rxdma_err_code == HAL_RXDMA_ERR_UNENCRYPTED)))
  2136. return true;
  2137. return false;
  2138. }
  2139. #ifdef QCA_DP_NBUF_FAST_RECYCLE_CHECK
  2140. void dp_rx_err_tlv_invalidate(struct dp_soc *soc,
  2141. qdf_nbuf_t nbuf)
  2142. {
  2143. /*
  2144. * In case of fast recycle TX driver can avoid invalidate
  2145. * of buffer in case of SFE forward. We need to invalidate
  2146. * the TLV headers after writing to this location
  2147. */
  2148. qdf_nbuf_dma_inv_range_no_dsb((void *)nbuf->data,
  2149. (void *)(nbuf->data +
  2150. soc->rx_pkt_tlv_size +
  2151. L3_HEADER_PAD));
  2152. }
  2153. #else
  2154. void dp_rx_err_tlv_invalidate(struct dp_soc *soc,
  2155. qdf_nbuf_t nbuf)
  2156. {
  2157. }
  2158. #endif
  2159. #ifndef CONFIG_NBUF_AP_PLATFORM
  2160. static inline uint16_t
  2161. dp_rx_get_peer_id(struct dp_soc *soc,
  2162. uint8_t *rx_tlv_hdr,
  2163. qdf_nbuf_t nbuf)
  2164. {
  2165. uint32_t peer_mdata = 0;
  2166. peer_mdata = hal_rx_tlv_peer_meta_data_get(soc->hal_soc,
  2167. rx_tlv_hdr);
  2168. return dp_rx_peer_metadata_peer_id_get(soc, peer_mdata);
  2169. }
  2170. static inline void
  2171. dp_rx_get_wbm_err_info_from_nbuf(struct dp_soc *soc,
  2172. qdf_nbuf_t nbuf,
  2173. uint8_t *rx_tlv_hdr,
  2174. union hal_wbm_err_info_u *wbm_err)
  2175. {
  2176. hal_rx_priv_info_get_from_tlv(soc->hal_soc, rx_tlv_hdr,
  2177. (uint8_t *)&wbm_err->info,
  2178. sizeof(union hal_wbm_err_info_u));
  2179. }
  2180. void
  2181. dp_rx_set_wbm_err_info_in_nbuf(struct dp_soc *soc,
  2182. qdf_nbuf_t nbuf,
  2183. union hal_wbm_err_info_u wbm_err)
  2184. {
  2185. hal_rx_priv_info_set_in_tlv(soc->hal_soc,
  2186. qdf_nbuf_data(nbuf),
  2187. (uint8_t *)&wbm_err.info,
  2188. sizeof(union hal_wbm_err_info_u));
  2189. }
  2190. #else
  2191. static inline uint16_t
  2192. dp_rx_get_peer_id(struct dp_soc *soc,
  2193. uint8_t *rx_tlv_hdr,
  2194. qdf_nbuf_t nbuf)
  2195. {
  2196. uint32_t peer_mdata = QDF_NBUF_CB_RX_MPDU_DESC_INFO_2(nbuf);
  2197. return dp_rx_peer_metadata_peer_id_get(soc, peer_mdata);
  2198. }
  2199. static inline void
  2200. dp_rx_get_wbm_err_info_from_nbuf(struct dp_soc *soc,
  2201. qdf_nbuf_t nbuf,
  2202. uint8_t *rx_tlv_hdr,
  2203. union hal_wbm_err_info_u *wbm_err)
  2204. {
  2205. wbm_err->info = QDF_NBUF_CB_RX_ERROR_CODE_INFO(nbuf);
  2206. }
  2207. void
  2208. dp_rx_set_wbm_err_info_in_nbuf(struct dp_soc *soc,
  2209. qdf_nbuf_t nbuf,
  2210. union hal_wbm_err_info_u wbm_err)
  2211. {
  2212. QDF_NBUF_CB_RX_ERROR_CODE_INFO(nbuf) = wbm_err.info;
  2213. }
  2214. #endif /* CONFIG_NBUF_AP_PLATFORM */
  2215. uint32_t
  2216. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2217. hal_ring_handle_t hal_ring_hdl, uint32_t quota)
  2218. {
  2219. hal_soc_handle_t hal_soc;
  2220. uint32_t rx_bufs_used = 0;
  2221. struct dp_pdev *dp_pdev;
  2222. uint8_t *rx_tlv_hdr;
  2223. bool is_tkip_mic_err;
  2224. qdf_nbuf_t nbuf_head = NULL;
  2225. qdf_nbuf_t nbuf, next;
  2226. union hal_wbm_err_info_u wbm_err = { 0 };
  2227. uint8_t pool_id;
  2228. uint8_t tid = 0;
  2229. uint8_t link_id = 0;
  2230. /* Debug -- Remove later */
  2231. qdf_assert(soc && hal_ring_hdl);
  2232. hal_soc = soc->hal_soc;
  2233. /* Debug -- Remove later */
  2234. qdf_assert(hal_soc);
  2235. nbuf_head = soc->arch_ops.dp_rx_wbm_err_reap_desc(int_ctx, soc,
  2236. hal_ring_hdl,
  2237. quota,
  2238. &rx_bufs_used);
  2239. nbuf = nbuf_head;
  2240. while (nbuf) {
  2241. struct dp_txrx_peer *txrx_peer;
  2242. struct dp_peer *peer;
  2243. uint16_t peer_id;
  2244. uint8_t err_code;
  2245. uint8_t *tlv_hdr;
  2246. dp_txrx_ref_handle txrx_ref_handle = NULL;
  2247. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2248. /*
  2249. * retrieve the wbm desc info from nbuf CB/TLV, so we can
  2250. * handle error cases appropriately
  2251. */
  2252. dp_rx_get_wbm_err_info_from_nbuf(soc, nbuf,
  2253. rx_tlv_hdr,
  2254. &wbm_err);
  2255. peer_id = dp_rx_get_peer_id(soc,
  2256. rx_tlv_hdr,
  2257. nbuf);
  2258. txrx_peer = dp_tgt_txrx_peer_get_ref_by_id(soc, peer_id,
  2259. &txrx_ref_handle,
  2260. DP_MOD_ID_RX_ERR);
  2261. if (!txrx_peer)
  2262. dp_info_rl("peer is null peer_id %u err_src %u, "
  2263. "REO: push_rsn %u err_code %u, "
  2264. "RXDMA: push_rsn %u err_code %u",
  2265. peer_id, wbm_err.info_bit.wbm_err_src,
  2266. wbm_err.info_bit.reo_psh_rsn,
  2267. wbm_err.info_bit.reo_err_code,
  2268. wbm_err.info_bit.rxdma_psh_rsn,
  2269. wbm_err.info_bit.rxdma_err_code);
  2270. /* Set queue_mapping in nbuf to 0 */
  2271. dp_set_rx_queue(nbuf, 0);
  2272. next = nbuf->next;
  2273. /*
  2274. * Form the SG for msdu continued buffers
  2275. * QCN9000 has this support
  2276. */
  2277. if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2278. nbuf = dp_rx_sg_create(soc, nbuf);
  2279. next = nbuf->next;
  2280. /*
  2281. * SG error handling is not done correctly,
  2282. * drop SG frames for now.
  2283. */
  2284. dp_rx_nbuf_free(nbuf);
  2285. dp_info_rl("scattered msdu dropped");
  2286. nbuf = next;
  2287. if (txrx_peer)
  2288. dp_txrx_peer_unref_delete(txrx_ref_handle,
  2289. DP_MOD_ID_RX_ERR);
  2290. continue;
  2291. }
  2292. dp_rx_nbuf_set_link_id_from_tlv(soc, rx_tlv_hdr, nbuf);
  2293. pool_id = wbm_err.info_bit.pool_id;
  2294. dp_pdev = dp_get_pdev_for_lmac_id(soc, pool_id);
  2295. if (dp_pdev && dp_pdev->link_peer_stats &&
  2296. txrx_peer && txrx_peer->is_mld_peer) {
  2297. link_id = dp_rx_get_stats_arr_idx_from_link_id(
  2298. nbuf,
  2299. txrx_peer);
  2300. } else {
  2301. link_id = 0;
  2302. }
  2303. if (wbm_err.info_bit.wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  2304. if (wbm_err.info_bit.reo_psh_rsn
  2305. == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  2306. DP_STATS_INC(soc,
  2307. rx.err.reo_error
  2308. [wbm_err.info_bit.reo_err_code], 1);
  2309. /* increment @pdev level */
  2310. if (dp_pdev)
  2311. DP_STATS_INC(dp_pdev, err.reo_error,
  2312. 1);
  2313. switch (wbm_err.info_bit.reo_err_code) {
  2314. /*
  2315. * Handling for packets which have NULL REO
  2316. * queue descriptor
  2317. */
  2318. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  2319. pool_id = wbm_err.info_bit.pool_id;
  2320. soc->arch_ops.dp_rx_null_q_desc_handle(
  2321. soc, nbuf,
  2322. rx_tlv_hdr,
  2323. pool_id,
  2324. txrx_peer,
  2325. FALSE,
  2326. link_id);
  2327. break;
  2328. /* TODO */
  2329. /* Add per error code accounting */
  2330. case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
  2331. if (txrx_peer)
  2332. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2333. rx.err.jump_2k_err,
  2334. 1,
  2335. link_id);
  2336. pool_id = wbm_err.info_bit.pool_id;
  2337. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2338. rx_tlv_hdr)) {
  2339. tid =
  2340. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2341. }
  2342. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2343. hal_rx_msdu_start_msdu_len_get(
  2344. soc->hal_soc, rx_tlv_hdr);
  2345. nbuf->next = NULL;
  2346. dp_2k_jump_handle(soc, nbuf,
  2347. rx_tlv_hdr,
  2348. peer_id, tid);
  2349. break;
  2350. case HAL_REO_ERR_REGULAR_FRAME_OOR:
  2351. if (txrx_peer)
  2352. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2353. rx.err.oor_err,
  2354. 1,
  2355. link_id);
  2356. if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
  2357. rx_tlv_hdr)) {
  2358. tid =
  2359. hal_rx_mpdu_start_tid_get(hal_soc, rx_tlv_hdr);
  2360. }
  2361. QDF_NBUF_CB_RX_PKT_LEN(nbuf) =
  2362. hal_rx_msdu_start_msdu_len_get(
  2363. soc->hal_soc, rx_tlv_hdr);
  2364. nbuf->next = NULL;
  2365. dp_rx_oor_handle(soc, nbuf,
  2366. peer_id,
  2367. rx_tlv_hdr);
  2368. break;
  2369. case HAL_REO_ERR_BAR_FRAME_2K_JUMP:
  2370. case HAL_REO_ERR_BAR_FRAME_OOR:
  2371. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id, DP_MOD_ID_RX_ERR);
  2372. if (peer) {
  2373. dp_rx_err_handle_bar(soc, peer,
  2374. nbuf);
  2375. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  2376. }
  2377. dp_rx_nbuf_free(nbuf);
  2378. break;
  2379. case HAL_REO_ERR_PN_CHECK_FAILED:
  2380. case HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET:
  2381. if (txrx_peer)
  2382. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2383. rx.err.pn_err,
  2384. 1,
  2385. link_id);
  2386. dp_rx_nbuf_free(nbuf);
  2387. break;
  2388. default:
  2389. dp_info_rl("Got pkt with REO ERROR: %d",
  2390. wbm_err.info_bit.
  2391. reo_err_code);
  2392. dp_rx_nbuf_free(nbuf);
  2393. }
  2394. } else if (wbm_err.info_bit.reo_psh_rsn
  2395. == HAL_RX_WBM_REO_PSH_RSN_ROUTE) {
  2396. dp_rx_err_route_hdl(soc, nbuf, txrx_peer,
  2397. rx_tlv_hdr,
  2398. HAL_RX_WBM_ERR_SRC_REO,
  2399. link_id);
  2400. } else {
  2401. /* should not enter here */
  2402. dp_rx_err_alert("invalid reo push reason %u",
  2403. wbm_err.info_bit.reo_psh_rsn);
  2404. dp_rx_nbuf_free(nbuf);
  2405. dp_assert_always_internal(0);
  2406. }
  2407. } else if (wbm_err.info_bit.wbm_err_src ==
  2408. HAL_RX_WBM_ERR_SRC_RXDMA) {
  2409. if (wbm_err.info_bit.rxdma_psh_rsn
  2410. == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2411. DP_STATS_INC(soc,
  2412. rx.err.rxdma_error
  2413. [wbm_err.info_bit.rxdma_err_code], 1);
  2414. /* increment @pdev level */
  2415. if (dp_pdev)
  2416. DP_STATS_INC(dp_pdev,
  2417. err.rxdma_error, 1);
  2418. switch (wbm_err.info_bit.rxdma_err_code) {
  2419. case HAL_RXDMA_ERR_UNENCRYPTED:
  2420. case HAL_RXDMA_ERR_WIFI_PARSE:
  2421. if (txrx_peer)
  2422. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2423. rx.err.rxdma_wifi_parse_err,
  2424. 1,
  2425. link_id);
  2426. pool_id = wbm_err.info_bit.pool_id;
  2427. dp_rx_process_rxdma_err(soc, nbuf,
  2428. rx_tlv_hdr,
  2429. txrx_peer,
  2430. wbm_err.
  2431. info_bit.
  2432. rxdma_err_code,
  2433. pool_id,
  2434. link_id);
  2435. break;
  2436. case HAL_RXDMA_ERR_TKIP_MIC:
  2437. dp_rx_process_mic_error(soc, nbuf,
  2438. rx_tlv_hdr,
  2439. txrx_peer);
  2440. if (txrx_peer)
  2441. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2442. rx.err.mic_err,
  2443. 1,
  2444. link_id);
  2445. break;
  2446. case HAL_RXDMA_ERR_DECRYPT:
  2447. /* All the TKIP-MIC failures are treated as Decrypt Errors
  2448. * for QCN9224 Targets
  2449. */
  2450. is_tkip_mic_err = hal_rx_msdu_end_is_tkip_mic_err(hal_soc, rx_tlv_hdr);
  2451. if (is_tkip_mic_err && txrx_peer) {
  2452. dp_rx_process_mic_error(soc, nbuf,
  2453. rx_tlv_hdr,
  2454. txrx_peer);
  2455. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2456. rx.err.mic_err,
  2457. 1,
  2458. link_id);
  2459. break;
  2460. }
  2461. if (txrx_peer) {
  2462. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2463. rx.err.decrypt_err,
  2464. 1,
  2465. link_id);
  2466. dp_rx_nbuf_free(nbuf);
  2467. break;
  2468. }
  2469. if (!dp_handle_rxdma_decrypt_err()) {
  2470. dp_rx_nbuf_free(nbuf);
  2471. break;
  2472. }
  2473. pool_id = wbm_err.info_bit.pool_id;
  2474. err_code = wbm_err.info_bit.rxdma_err_code;
  2475. tlv_hdr = rx_tlv_hdr;
  2476. dp_rx_process_rxdma_err(soc, nbuf,
  2477. tlv_hdr, NULL,
  2478. err_code,
  2479. pool_id,
  2480. link_id);
  2481. break;
  2482. case HAL_RXDMA_MULTICAST_ECHO:
  2483. if (txrx_peer)
  2484. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  2485. rx.mec_drop, 1,
  2486. qdf_nbuf_len(nbuf),
  2487. link_id);
  2488. dp_rx_nbuf_free(nbuf);
  2489. break;
  2490. case HAL_RXDMA_UNAUTHORIZED_WDS:
  2491. pool_id = wbm_err.info_bit.pool_id;
  2492. err_code = wbm_err.info_bit.rxdma_err_code;
  2493. tlv_hdr = rx_tlv_hdr;
  2494. dp_rx_process_rxdma_err(soc, nbuf,
  2495. tlv_hdr,
  2496. txrx_peer,
  2497. err_code,
  2498. pool_id,
  2499. link_id);
  2500. break;
  2501. default:
  2502. dp_rx_nbuf_free(nbuf);
  2503. dp_err_rl("RXDMA error %d",
  2504. wbm_err.info_bit.rxdma_err_code);
  2505. }
  2506. } else if (wbm_err.info_bit.rxdma_psh_rsn
  2507. == HAL_RX_WBM_RXDMA_PSH_RSN_ROUTE) {
  2508. dp_rx_err_route_hdl(soc, nbuf, txrx_peer,
  2509. rx_tlv_hdr,
  2510. HAL_RX_WBM_ERR_SRC_RXDMA,
  2511. link_id);
  2512. } else if (wbm_err.info_bit.rxdma_psh_rsn
  2513. == HAL_RX_WBM_RXDMA_PSH_RSN_FLUSH) {
  2514. dp_rx_err_err("rxdma push reason %u",
  2515. wbm_err.info_bit.rxdma_psh_rsn);
  2516. DP_STATS_INC(soc, rx.err.rx_flush_count, 1);
  2517. dp_rx_nbuf_free(nbuf);
  2518. } else {
  2519. /* should not enter here */
  2520. dp_rx_err_alert("invalid rxdma push reason %u",
  2521. wbm_err.info_bit.rxdma_psh_rsn);
  2522. dp_rx_nbuf_free(nbuf);
  2523. dp_assert_always_internal(0);
  2524. }
  2525. } else {
  2526. /* Should not come here */
  2527. qdf_assert(0);
  2528. }
  2529. if (txrx_peer)
  2530. dp_txrx_peer_unref_delete(txrx_ref_handle,
  2531. DP_MOD_ID_RX_ERR);
  2532. nbuf = next;
  2533. }
  2534. return rx_bufs_used; /* Assume no scale factor for now */
  2535. }
  2536. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2537. /**
  2538. * dup_desc_dbg() - dump and assert if duplicate rx desc found
  2539. *
  2540. * @soc: core DP main context
  2541. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2542. * @rx_desc: void pointer to rx descriptor
  2543. *
  2544. * Return: void
  2545. */
  2546. static void dup_desc_dbg(struct dp_soc *soc,
  2547. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2548. void *rx_desc)
  2549. {
  2550. DP_STATS_INC(soc, rx.err.hal_rxdma_err_dup, 1);
  2551. dp_rx_dump_info_and_assert(
  2552. soc,
  2553. soc->rx_rel_ring.hal_srng,
  2554. hal_rxdma_desc_to_hal_ring_desc(rxdma_dst_ring_desc),
  2555. rx_desc);
  2556. }
  2557. /**
  2558. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  2559. *
  2560. * @soc: core DP main context
  2561. * @mac_id: mac id which is one of 3 mac_ids
  2562. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  2563. * @head: head of descs list to be freed
  2564. * @tail: tail of decs list to be freed
  2565. *
  2566. * Return: number of msdu in MPDU to be popped
  2567. */
  2568. static inline uint32_t
  2569. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2570. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2571. union dp_rx_desc_list_elem_t **head,
  2572. union dp_rx_desc_list_elem_t **tail)
  2573. {
  2574. void *rx_msdu_link_desc;
  2575. qdf_nbuf_t msdu;
  2576. qdf_nbuf_t last;
  2577. struct hal_rx_msdu_list msdu_list;
  2578. uint16_t num_msdus;
  2579. struct hal_buf_info buf_info;
  2580. uint32_t rx_bufs_used = 0;
  2581. uint32_t msdu_cnt;
  2582. uint32_t i;
  2583. uint8_t push_reason;
  2584. uint8_t rxdma_error_code = 0;
  2585. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  2586. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2587. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2588. hal_rxdma_desc_t ring_desc;
  2589. struct rx_desc_pool *rx_desc_pool;
  2590. if (!pdev) {
  2591. dp_rx_err_debug("%pK: pdev is null for mac_id = %d",
  2592. soc, mac_id);
  2593. return rx_bufs_used;
  2594. }
  2595. msdu = 0;
  2596. last = NULL;
  2597. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2598. &buf_info, &msdu_cnt);
  2599. push_reason =
  2600. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  2601. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  2602. rxdma_error_code =
  2603. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  2604. }
  2605. do {
  2606. rx_msdu_link_desc =
  2607. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2608. qdf_assert_always(rx_msdu_link_desc);
  2609. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2610. &msdu_list, &num_msdus);
  2611. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2612. /* if the msdus belongs to NSS offloaded radio &&
  2613. * the rbm is not SW1_BM then return the msdu_link
  2614. * descriptor without freeing the msdus (nbufs). let
  2615. * these buffers be given to NSS completion ring for
  2616. * NSS to free them.
  2617. * else iterate through the msdu link desc list and
  2618. * free each msdu in the list.
  2619. */
  2620. if (msdu_list.rbm[0] !=
  2621. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id) &&
  2622. wlan_cfg_get_dp_pdev_nss_enabled(
  2623. pdev->wlan_cfg_ctx))
  2624. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  2625. else {
  2626. for (i = 0; i < num_msdus; i++) {
  2627. struct dp_rx_desc *rx_desc =
  2628. soc->arch_ops.
  2629. dp_rx_desc_cookie_2_va(
  2630. soc,
  2631. msdu_list.sw_cookie[i]);
  2632. qdf_assert_always(rx_desc);
  2633. msdu = rx_desc->nbuf;
  2634. /*
  2635. * this is a unlikely scenario
  2636. * where the host is reaping
  2637. * a descriptor which
  2638. * it already reaped just a while ago
  2639. * but is yet to replenish
  2640. * it back to HW.
  2641. * In this case host will dump
  2642. * the last 128 descriptors
  2643. * including the software descriptor
  2644. * rx_desc and assert.
  2645. */
  2646. ring_desc = rxdma_dst_ring_desc;
  2647. if (qdf_unlikely(!rx_desc->in_use)) {
  2648. dup_desc_dbg(soc,
  2649. ring_desc,
  2650. rx_desc);
  2651. continue;
  2652. }
  2653. if (rx_desc->unmapped == 0) {
  2654. rx_desc_pool =
  2655. &soc->rx_desc_buf[rx_desc->pool_id];
  2656. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2657. dp_rx_nbuf_unmap_pool(soc,
  2658. rx_desc_pool,
  2659. msdu);
  2660. rx_desc->unmapped = 1;
  2661. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2662. }
  2663. dp_rx_err_debug("%pK: msdu_nbuf=%pK ",
  2664. soc, msdu);
  2665. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  2666. rx_desc->pool_id);
  2667. rx_bufs_used++;
  2668. dp_rx_add_to_free_desc_list(head,
  2669. tail, rx_desc);
  2670. }
  2671. }
  2672. } else {
  2673. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  2674. }
  2675. /*
  2676. * Store the current link buffer into to the local structure
  2677. * to be used for release purpose.
  2678. */
  2679. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  2680. buf_info.paddr, buf_info.sw_cookie,
  2681. buf_info.rbm);
  2682. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  2683. &buf_info);
  2684. dp_rx_link_desc_return_by_addr(soc,
  2685. (hal_buff_addrinfo_t)
  2686. rx_link_buf_info,
  2687. bm_action);
  2688. } while (buf_info.paddr);
  2689. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  2690. if (pdev)
  2691. DP_STATS_INC(pdev, err.rxdma_error, 1);
  2692. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  2693. dp_rx_err_err("%pK: Packet received with Decrypt error", soc);
  2694. }
  2695. return rx_bufs_used;
  2696. }
  2697. uint32_t
  2698. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  2699. uint32_t mac_id, uint32_t quota)
  2700. {
  2701. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  2702. hal_rxdma_desc_t rxdma_dst_ring_desc;
  2703. hal_soc_handle_t hal_soc;
  2704. void *err_dst_srng;
  2705. union dp_rx_desc_list_elem_t *head = NULL;
  2706. union dp_rx_desc_list_elem_t *tail = NULL;
  2707. struct dp_srng *dp_rxdma_srng;
  2708. struct rx_desc_pool *rx_desc_pool;
  2709. uint32_t work_done = 0;
  2710. uint32_t rx_bufs_used = 0;
  2711. if (!pdev)
  2712. return 0;
  2713. err_dst_srng = soc->rxdma_err_dst_ring[mac_id].hal_srng;
  2714. if (!err_dst_srng) {
  2715. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2716. soc, err_dst_srng);
  2717. return 0;
  2718. }
  2719. hal_soc = soc->hal_soc;
  2720. qdf_assert(hal_soc);
  2721. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, err_dst_srng))) {
  2722. dp_rx_err_err("%pK: HAL Monitor Destination Ring Init Failed -- %pK",
  2723. soc, err_dst_srng);
  2724. return 0;
  2725. }
  2726. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  2727. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  2728. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  2729. rxdma_dst_ring_desc,
  2730. &head, &tail);
  2731. }
  2732. dp_srng_access_end(int_ctx, soc, err_dst_srng);
  2733. if (rx_bufs_used) {
  2734. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2735. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2736. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2737. } else {
  2738. dp_rxdma_srng = &soc->rx_refill_buf_ring[pdev->lmac_id];
  2739. rx_desc_pool = &soc->rx_desc_buf[pdev->lmac_id];
  2740. }
  2741. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2742. rx_desc_pool, rx_bufs_used, &head, &tail, false);
  2743. work_done += rx_bufs_used;
  2744. }
  2745. return work_done;
  2746. }
  2747. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2748. static inline void
  2749. dp_wbm_int_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  2750. hal_rxdma_desc_t rxdma_dst_ring_desc,
  2751. union dp_rx_desc_list_elem_t **head,
  2752. union dp_rx_desc_list_elem_t **tail,
  2753. uint32_t *rx_bufs_used)
  2754. {
  2755. void *rx_msdu_link_desc;
  2756. qdf_nbuf_t msdu;
  2757. qdf_nbuf_t last;
  2758. struct hal_rx_msdu_list msdu_list;
  2759. uint16_t num_msdus;
  2760. struct hal_buf_info buf_info;
  2761. uint32_t msdu_cnt, i;
  2762. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  2763. struct rx_desc_pool *rx_desc_pool;
  2764. struct dp_rx_desc *rx_desc;
  2765. msdu = 0;
  2766. last = NULL;
  2767. hal_rx_reo_ent_buf_paddr_get(soc->hal_soc, rxdma_dst_ring_desc,
  2768. &buf_info, &msdu_cnt);
  2769. do {
  2770. rx_msdu_link_desc =
  2771. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  2772. if (!rx_msdu_link_desc) {
  2773. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_LINK_DESC], 1);
  2774. break;
  2775. }
  2776. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  2777. &msdu_list, &num_msdus);
  2778. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  2779. for (i = 0; i < num_msdus; i++) {
  2780. if (!dp_rx_is_sw_cookie_valid(soc, msdu_list.sw_cookie[i])) {
  2781. dp_rx_err_info_rl("Invalid MSDU info cookie: 0x%x",
  2782. msdu_list.sw_cookie[i]);
  2783. continue;
  2784. }
  2785. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  2786. soc,
  2787. msdu_list.sw_cookie[i]);
  2788. qdf_assert_always(rx_desc);
  2789. rx_desc_pool =
  2790. &soc->rx_desc_buf[rx_desc->pool_id];
  2791. msdu = rx_desc->nbuf;
  2792. /*
  2793. * this is a unlikely scenario where the host is reaping
  2794. * a descriptor which it already reaped just a while ago
  2795. * but is yet to replenish it back to HW.
  2796. */
  2797. if (qdf_unlikely(!rx_desc->in_use) ||
  2798. qdf_unlikely(!msdu)) {
  2799. dp_rx_err_info_rl("Reaping rx_desc not in use!");
  2800. continue;
  2801. }
  2802. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2803. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, msdu);
  2804. rx_desc->unmapped = 1;
  2805. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2806. dp_rx_buffer_pool_nbuf_free(soc, msdu,
  2807. rx_desc->pool_id);
  2808. rx_bufs_used[rx_desc->pool_id]++;
  2809. dp_rx_add_to_free_desc_list(head,
  2810. tail, rx_desc);
  2811. }
  2812. }
  2813. /*
  2814. * Store the current link buffer into to the local structure
  2815. * to be used for release purpose.
  2816. */
  2817. hal_rxdma_buff_addr_info_set(soc->hal_soc, rx_link_buf_info,
  2818. buf_info.paddr, buf_info.sw_cookie,
  2819. buf_info.rbm);
  2820. hal_rx_mon_next_link_desc_get(soc->hal_soc, rx_msdu_link_desc,
  2821. &buf_info);
  2822. dp_rx_link_desc_return_by_addr(soc, (hal_buff_addrinfo_t)
  2823. rx_link_buf_info,
  2824. HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  2825. } while (buf_info.paddr);
  2826. }
  2827. void
  2828. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  2829. uint32_t buf_type)
  2830. {
  2831. struct hal_buf_info buf_info = {0};
  2832. struct dp_rx_desc *rx_desc = NULL;
  2833. struct rx_desc_pool *rx_desc_pool;
  2834. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = {0};
  2835. union dp_rx_desc_list_elem_t *head = NULL;
  2836. union dp_rx_desc_list_elem_t *tail = NULL;
  2837. uint8_t pool_id;
  2838. uint8_t mac_id;
  2839. hal_rx_reo_buf_paddr_get(soc->hal_soc, hal_desc, &buf_info);
  2840. if (!buf_info.paddr) {
  2841. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_BUFFER], 1);
  2842. return;
  2843. }
  2844. /* buffer_addr_info is the first element of ring_desc */
  2845. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)hal_desc,
  2846. &buf_info);
  2847. if (buf_type == HAL_WBM_RELEASE_RING_2_BUFFER_TYPE) {
  2848. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_NULL_MSDU_BUFF], 1);
  2849. rx_desc = soc->arch_ops.dp_rx_desc_cookie_2_va(
  2850. soc,
  2851. buf_info.sw_cookie);
  2852. if (rx_desc && rx_desc->nbuf) {
  2853. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2854. dp_ipa_rx_buf_smmu_mapping_lock(soc);
  2855. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool,
  2856. rx_desc->nbuf);
  2857. rx_desc->unmapped = 1;
  2858. dp_ipa_rx_buf_smmu_mapping_unlock(soc);
  2859. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  2860. rx_desc->pool_id);
  2861. dp_rx_add_to_free_desc_list(&head,
  2862. &tail,
  2863. rx_desc);
  2864. rx_bufs_reaped[rx_desc->pool_id]++;
  2865. }
  2866. } else if (buf_type == HAL_WBM_RELEASE_RING_2_DESC_TYPE) {
  2867. pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(buf_info.sw_cookie);
  2868. dp_wbm_int_err_mpdu_pop(soc, pool_id, hal_desc,
  2869. &head, &tail, rx_bufs_reaped);
  2870. }
  2871. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2872. struct rx_desc_pool *rx_desc_pool;
  2873. struct dp_srng *dp_rxdma_srng;
  2874. if (!rx_bufs_reaped[mac_id])
  2875. continue;
  2876. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_REO_BUFF_REAPED], 1);
  2877. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2878. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2879. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2880. rx_desc_pool,
  2881. rx_bufs_reaped[mac_id],
  2882. &head, &tail, false);
  2883. }
  2884. }
  2885. #endif /* QCA_HOST_MODE_WIFI_DISABLED */