hal_be_rx_tlv.h 68 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _HAL_BE_RX_TLV_H_
  20. #define _HAL_BE_RX_TLV_H_
  21. #include "hal_api_mon.h"
  22. /*
  23. * Structures & Macros to obtain fields from the TLV's in the Rx packet
  24. * pre-header.
  25. */
  26. #define HAL_RX_BE_PKT_HDR_TLV_LEN 112
  27. struct rx_pkt_hdr_tlv {
  28. uint64_t tag; /* 8 B */
  29. uint64_t phy_ppdu_id; /* 8 B */
  30. char rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN]; /* 112 B */
  31. };
  32. #ifdef CONFIG_WORD_BASED_TLV
  33. #ifndef BIG_ENDIAN_HOST
  34. struct rx_msdu_end_compact {
  35. uint32_t sa_sw_peer_id : 16,
  36. sa_idx_timeout : 1,
  37. da_idx_timeout : 1,
  38. to_ds : 1,
  39. tid : 4,
  40. sa_is_valid : 1,
  41. da_is_valid : 1,
  42. da_is_mcbc : 1,
  43. l3_header_padding : 2,
  44. first_msdu : 1,
  45. last_msdu : 1,
  46. fr_ds : 1,
  47. ip_chksum_fail_copy : 1;
  48. uint32_t sa_idx : 16,
  49. da_idx_or_sw_peer_id : 16;
  50. uint32_t msdu_drop : 1,
  51. reo_destination_indication : 5,
  52. flow_idx : 20,
  53. use_ppe : 1,
  54. mesh_sta : 2,
  55. vlan_ctag_stripped : 1,
  56. vlan_stag_stripped : 1,
  57. fragment_flag : 1;
  58. uint32_t fse_metadata : 32;
  59. uint32_t cce_metadata : 16,
  60. tcp_udp_chksum : 16;
  61. uint32_t aggregation_count : 8,
  62. flow_aggregation_continuation : 1,
  63. fisa_timeout : 1,
  64. tcp_udp_chksum_fail_copy : 1,
  65. msdu_limit_error : 1,
  66. flow_idx_timeout : 1,
  67. flow_idx_invalid : 1,
  68. cce_match : 1,
  69. amsdu_parser_error : 1,
  70. cumulative_ip_length : 16;
  71. uint32_t key_id_octet : 8,
  72. reserved_8a : 24;
  73. uint32_t reserved_9a : 6,
  74. service_code : 9,
  75. priority_valid : 1,
  76. intra_bss : 1,
  77. dest_chip_id : 2,
  78. multicast_echo : 1,
  79. wds_learning_event : 1,
  80. wds_roaming_event : 1,
  81. wds_keep_alive_event : 1,
  82. dest_chip_pmac_id : 1,
  83. reserved_9b : 8;
  84. uint32_t msdu_length : 14,
  85. stbc : 1,
  86. ipsec_esp : 1,
  87. l3_offset : 7,
  88. ipsec_ah : 1,
  89. l4_offset : 8;
  90. uint32_t msdu_number : 8,
  91. decap_format : 2,
  92. ipv4_proto : 1,
  93. ipv6_proto : 1,
  94. tcp_proto : 1,
  95. udp_proto : 1,
  96. ip_frag : 1,
  97. tcp_only_ack : 1,
  98. da_is_bcast_mcast : 1,
  99. toeplitz_hash_sel : 2,
  100. ip_fixed_header_valid : 1,
  101. ip_extn_header_valid : 1,
  102. tcp_udp_header_valid : 1,
  103. mesh_control_present : 1,
  104. ldpc : 1,
  105. ip4_protocol_ip6_next_header : 8;
  106. uint32_t vlan_ctag_ci : 16,
  107. vlan_stag_ci : 16;
  108. uint32_t peer_meta_data : 32;
  109. uint32_t user_rssi : 8,
  110. pkt_type : 4,
  111. sgi : 2,
  112. rate_mcs : 4,
  113. receive_bandwidth : 3,
  114. reception_type : 3,
  115. mimo_ss_bitmap : 7,
  116. msdu_done_copy : 1;
  117. uint32_t flow_id_toeplitz : 32;
  118. uint32_t ppdu_start_timestamp_63_32;
  119. uint32_t sw_phy_meta_data : 32;
  120. uint32_t first_mpdu : 1,
  121. reserved_16a : 1,
  122. mcast_bcast : 1,
  123. ast_index_not_found : 1,
  124. ast_index_timeout : 1,
  125. power_mgmt : 1,
  126. non_qos : 1,
  127. null_data : 1,
  128. mgmt_type : 1,
  129. ctrl_type : 1,
  130. more_data : 1,
  131. eosp : 1,
  132. a_msdu_error : 1,
  133. reserved_16b : 1,
  134. order : 1,
  135. wifi_parser_error : 1,
  136. overflow_err : 1,
  137. msdu_length_err : 1,
  138. tcp_udp_chksum_fail : 1,
  139. ip_chksum_fail : 1,
  140. sa_idx_invalid : 1,
  141. da_idx_invalid : 1,
  142. amsdu_addr_mismatch : 1,
  143. rx_in_tx_decrypt_byp : 1,
  144. encrypt_required : 1,
  145. directed : 1,
  146. buffer_fragment : 1,
  147. mpdu_length_err : 1,
  148. tkip_mic_err : 1,
  149. decrypt_err : 1,
  150. unencrypted_frame_err : 1,
  151. fcs_err : 1;
  152. uint32_t reserved_17a : 10,
  153. decrypt_status_code : 3,
  154. rx_bitmap_not_updated : 1,
  155. reserved_17b : 17,
  156. msdu_done : 1;
  157. };
  158. struct rx_mpdu_start_compact {
  159. uint32_t rx_reo_queue_desc_addr_39_32 : 8,
  160. receive_queue_number : 16,
  161. pre_delim_err_warning : 1,
  162. first_delim_err : 1,
  163. reserved_0 : 6;
  164. uint32_t pn_31_0 : 32;
  165. uint32_t pn_63_32 : 32;
  166. uint32_t pn_95_64 : 32;
  167. uint32_t ast_index : 16,
  168. sw_peer_id : 16;
  169. uint32_t mpdu_frame_control_valid : 1,
  170. mpdu_duration_valid : 1,
  171. mac_addr_ad1_valid : 1,
  172. mac_addr_ad2_valid : 1,
  173. mac_addr_ad3_valid : 1,
  174. mac_addr_ad4_valid : 1,
  175. mpdu_sequence_control_valid : 1,
  176. mpdu_qos_control_valid : 1,
  177. mpdu_ht_control_valid : 1,
  178. frame_encryption_info_valid : 1,
  179. mpdu_fragment_number : 4,
  180. more_fragment_flag : 1,
  181. reserved_7a : 1,
  182. fr_ds : 1,
  183. to_ds : 1,
  184. encrypted : 1,
  185. mpdu_retry : 1,
  186. mpdu_sequence_number : 12;
  187. uint32_t mpdu_frame_control_field : 16,
  188. mpdu_duration_field : 16;
  189. uint32_t mac_addr_ad1_31_0 : 32;
  190. uint32_t mac_addr_ad1_47_32 : 16,
  191. mac_addr_ad2_15_0 : 16;
  192. uint32_t mac_addr_ad2_47_16 : 32;
  193. uint32_t mac_addr_ad3_31_0 : 32;
  194. uint32_t mac_addr_ad3_47_32 : 16,
  195. mpdu_sequence_control_field : 16;
  196. };
  197. #else
  198. struct rx_msdu_end_compact {
  199. uint32_t ip_chksum_fail_copy : 1,
  200. fr_ds : 1,
  201. last_msdu : 1,
  202. first_msdu : 1,
  203. l3_header_padding : 2,
  204. da_is_mcbc : 1,
  205. da_is_valid : 1,
  206. sa_is_valid : 1,
  207. tid : 4,
  208. to_ds : 1,
  209. da_idx_timeout : 1,
  210. sa_idx_timeout : 1,
  211. sa_sw_peer_id : 16;
  212. uint32_t da_idx_or_sw_peer_id : 16,
  213. sa_idx : 16;
  214. uint32_t fragment_flag : 1,
  215. vlan_stag_stripped : 1,
  216. vlan_ctag_stripped : 1,
  217. mesh_sta : 2,
  218. use_ppe : 1,
  219. flow_idx : 20,
  220. reo_destination_indication : 5,
  221. msdu_drop : 1;
  222. uint32_t fse_metadata : 32;
  223. uint32_t tcp_udp_chksum : 16,
  224. cce_metadata : 16;
  225. uint32_t cumulative_ip_length : 16,
  226. amsdu_parser_error : 1,
  227. cce_match : 1,
  228. flow_idx_invalid : 1,
  229. flow_idx_timeout : 1,
  230. msdu_limit_error : 1,
  231. tcp_udp_chksum_fail_copy : 1,
  232. fisa_timeout : 1,
  233. flow_aggregation_continuation : 1,
  234. aggregation_count : 8;
  235. uint32_t reserved_8a : 24,
  236. key_id_octet : 8;
  237. uint32_t reserved_9b : 8,
  238. dest_chip_pmac_id : 1,
  239. wds_keep_alive_event : 1,
  240. wds_roaming_event : 1,
  241. wds_learning_event : 1,
  242. multicast_echo : 1,
  243. dest_chip_id : 2,
  244. intra_bss : 1,
  245. priority_valid : 1,
  246. service_code : 9,
  247. reserved_9a : 6;
  248. uint32_t l4_offset : 8,
  249. ipsec_ah : 1,
  250. l3_offset : 7,
  251. ipsec_esp : 1,
  252. stbc : 1,
  253. msdu_length : 14;
  254. uint32_t ip4_protocol_ip6_next_header : 8,
  255. ldpc : 1,
  256. mesh_control_present : 1,
  257. tcp_udp_header_valid : 1,
  258. ip_extn_header_valid : 1,
  259. ip_fixed_header_valid : 1,
  260. toeplitz_hash_sel : 2,
  261. da_is_bcast_mcast : 1,
  262. tcp_only_ack : 1,
  263. ip_frag : 1,
  264. udp_proto : 1,
  265. tcp_proto : 1,
  266. ipv6_proto : 1,
  267. ipv4_proto : 1,
  268. decap_format : 2,
  269. msdu_number : 8;
  270. uint32_t vlan_stag_ci : 16,
  271. vlan_ctag_ci : 16;
  272. uint32_t peer_meta_data : 32;
  273. uint32_t msdu_done_copy : 1,
  274. mimo_ss_bitmap : 7,
  275. reception_type : 3,
  276. receive_bandwidth : 3,
  277. rate_mcs : 4,
  278. sgi : 2,
  279. pkt_type : 4,
  280. user_rssi : 8;
  281. uint32_t flow_id_toeplitz : 32;
  282. uint32_t ppdu_start_timestamp_63_32;
  283. uint32_t sw_phy_meta_data : 32;
  284. uint32_t fcs_err : 1,
  285. unencrypted_frame_err : 1,
  286. decrypt_err : 1,
  287. tkip_mic_err : 1,
  288. mpdu_length_err : 1,
  289. buffer_fragment : 1,
  290. directed : 1,
  291. encrypt_required : 1,
  292. rx_in_tx_decrypt_byp : 1,
  293. amsdu_addr_mismatch : 1,
  294. da_idx_invalid : 1,
  295. sa_idx_invalid : 1,
  296. ip_chksum_fail : 1,
  297. tcp_udp_chksum_fail : 1,
  298. msdu_length_err : 1,
  299. overflow_err : 1,
  300. wifi_parser_error : 1,
  301. order : 1,
  302. reserved_16b : 1,
  303. a_msdu_error : 1,
  304. eosp : 1,
  305. more_data : 1,
  306. ctrl_type : 1,
  307. mgmt_type : 1,
  308. null_data : 1,
  309. non_qos : 1,
  310. power_mgmt : 1,
  311. ast_index_timeout : 1,
  312. ast_index_not_found : 1,
  313. mcast_bcast : 1,
  314. reserved_16a : 1,
  315. first_mpdu : 1;
  316. uint32_t msdu_done : 1,
  317. reserved_17b : 17,
  318. rx_bitmap_not_updated : 1,
  319. decrypt_status_code : 3,
  320. reserved_17a : 10;
  321. };
  322. struct rx_mpdu_start_compact {
  323. uint32_t reserved_0 : 6,
  324. first_delim_err : 1,
  325. pre_delim_err_warning : 1,
  326. receive_queue_number : 16,
  327. rx_reo_queue_desc_addr_39_32 : 8;
  328. uint32_t pn_31_0 : 32;
  329. uint32_t pn_63_32 : 32;
  330. uint32_t pn_95_64 : 32;
  331. uint32_t sw_peer_id : 16,
  332. ast_index : 16;
  333. uint32_t mpdu_sequence_number : 12,
  334. mpdu_retry : 1,
  335. encrypted : 1,
  336. to_ds : 1,
  337. fr_ds : 1,
  338. reserved_7a : 1,
  339. more_fragment_flag : 1,
  340. mpdu_fragment_number : 4,
  341. frame_encryption_info_valid : 1,
  342. mpdu_ht_control_valid : 1,
  343. mpdu_qos_control_valid : 1,
  344. mpdu_sequence_control_valid : 1,
  345. mac_addr_ad4_valid : 1,
  346. mac_addr_ad3_valid : 1,
  347. mac_addr_ad2_valid : 1,
  348. mac_addr_ad1_valid : 1,
  349. mpdu_duration_valid : 1,
  350. mpdu_frame_control_valid : 1;
  351. uint32_t mpdu_duration_field : 16,
  352. mpdu_frame_control_field : 16;
  353. uint32_t mac_addr_ad1_31_0 : 32;
  354. uint32_t mac_addr_ad2_15_0 : 16,
  355. mac_addr_ad1_47_32 : 16;
  356. uint32_t mac_addr_ad2_47_16 : 32;
  357. uint32_t mac_addr_ad3_31_0 : 32;
  358. uint32_t mpdu_sequence_control_field : 16,
  359. mac_addr_ad3_47_32 : 16;
  360. };
  361. #endif
  362. #define RX_BE_PADDING0_BYTES 4
  363. typedef struct rx_mpdu_start_compact hal_rx_mpdu_start_t;
  364. typedef struct rx_msdu_end_compact hal_rx_msdu_end_t;
  365. struct rx_mpdu_start_tlv {
  366. hal_rx_mpdu_start_t rx_mpdu_start;
  367. };
  368. struct rx_msdu_end_tlv {
  369. uint64_t tag; /* 8 B */
  370. hal_rx_msdu_end_t rx_msdu_end;
  371. };
  372. struct rx_pkt_tlvs {
  373. struct rx_msdu_end_tlv msdu_end_tlv; /* 80 bytes */
  374. struct rx_mpdu_start_tlv mpdu_start_tlv; /* 48 bytes */
  375. };
  376. #define HAL_RX_MSDU_END(_rx_pkt_tlv) \
  377. (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end)
  378. #define HAL_RX_MPDU_START(_rx_pkt_tlv) \
  379. (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \
  380. rx_mpdu_start)
  381. #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \
  382. HAL_RX_MSDU_END(_rx_pkt_tlv).tid
  383. #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \
  384. HAL_RX_MSDU_END(_rx_pkt_tlv).first_mpdu
  385. #else /* CONFIG_WORD_BASED_TLV */
  386. typedef struct rx_mpdu_start hal_rx_mpdu_start_t;
  387. typedef struct rx_msdu_end hal_rx_msdu_end_t;
  388. #define RX_BE_PADDING0_BYTES 8
  389. /*
  390. * Each RX descriptor TLV is preceded by 1 QWORD "tag"
  391. */
  392. #ifndef CONFIG_NO_TLV_TAGS
  393. struct rx_mpdu_start_tlv {
  394. uint64_t tag; /* 8 B */
  395. hal_rx_mpdu_start_t rx_mpdu_start;
  396. };
  397. struct rx_msdu_end_tlv {
  398. uint64_t tag; /* 8 B */
  399. hal_rx_msdu_end_t rx_msdu_end;
  400. };
  401. struct rx_pkt_tlvs {
  402. struct rx_msdu_end_tlv msdu_end_tlv; /* 136 bytes */
  403. uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */
  404. struct rx_mpdu_start_tlv mpdu_start_tlv; /* 128 bytes */
  405. #ifndef NO_RX_PKT_HDR_TLV
  406. struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
  407. #endif
  408. };
  409. #else
  410. struct rx_mpdu_start_tlv {
  411. hal_rx_mpdu_start_t rx_mpdu_start;
  412. };
  413. struct rx_msdu_end_tlv {
  414. hal_rx_msdu_end_t rx_msdu_end;
  415. };
  416. struct rx_pkt_tlvs {
  417. struct rx_msdu_end_tlv msdu_end_tlv; /* 128 bytes */
  418. struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120 bytes */
  419. uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8 bytes */
  420. #ifndef NO_RX_PKT_HDR_TLV
  421. struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
  422. #endif
  423. };
  424. #endif /*CONFIG_NO_TLV_TAGS */
  425. #define HAL_RX_MSDU_END(_rx_pkt_tlv) \
  426. (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->msdu_end_tlv.rx_msdu_end)
  427. #define HAL_RX_MPDU_START(_rx_pkt_tlv) \
  428. (((struct rx_pkt_tlvs *)_rx_pkt_tlv)->mpdu_start_tlv. \
  429. rx_mpdu_start.rx_mpdu_info_details)
  430. #define HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(_rx_pkt_tlv) \
  431. HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_31_0
  432. #define HAL_RX_TLV_AMPDU_FLAG_GET(_rx_pkt_tlv) \
  433. HAL_RX_MPDU_START(_rx_pkt_tlv).ampdu_flag
  434. #define HAL_RX_TLV_MPDU_PN_127_96_GET(_rx_pkt_tlv) \
  435. HAL_RX_MPDU_START(_rx_pkt_tlv).pn_127_96
  436. #define HAL_RX_TLV_TID_GET(_rx_pkt_tlv) \
  437. HAL_RX_MPDU_START(_rx_pkt_tlv).tid
  438. #define HAL_RX_TLV_FIRST_MPDU_GET(_rx_pkt_tlv) \
  439. HAL_RX_MPDU_START(_rx_pkt_tlv).first_mpdu
  440. #define HAL_RX_TLV_L3_TYPE_GET(_rx_pkt_tlv) \
  441. HAL_RX_MSDU_END(_rx_pkt_tlv).l3_type
  442. #define HAL_RX_GET_PPDU_ID(_rx_pkt_tlv) \
  443. HAL_RX_MPDU_START(_rx_pkt_tlv).phy_ppdu_id
  444. #define HAL_RX_TLV_PHY_PPDU_ID_GET(_rx_pkt_tlv) \
  445. HAL_RX_MSDU_END(_rx_pkt_tlv).phy_ppdu_id
  446. #define HAL_RX_GET_FILTER_CATEGORY(_rx_pkt_tlv) \
  447. HAL_RX_MPDU_START(_rx_pkt_tlv).rxpcu_mpdu_filter_in_category
  448. #define HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(_rx_pkt_tlv) \
  449. HAL_RX_MPDU_START(_rx_pkt_tlv).sw_frame_group_id
  450. #endif /* CONFIG_WORD_BASED_TLV */
  451. /**
  452. * struct rx_mon_pkt_tlvs - RX packet data structure for DEST ring in the
  453. * monitor mode.
  454. * @msdu_end_tlv: MSDU end TLV
  455. * @rx_padding0: Padding bytes
  456. * @mpdu_start_tlv: MPDU start TLV
  457. * @pkt_hdr_tlv: 802.11 packet header TLV
  458. */
  459. struct rx_mon_pkt_tlvs {
  460. struct rx_msdu_end_tlv msdu_end_tlv; /* 128B + sizeof(tag) */
  461. uint8_t rx_padding0[RX_BE_PADDING0_BYTES]; /* 8B */
  462. struct rx_mpdu_start_tlv mpdu_start_tlv; /* 120B + sizeof(tag) */
  463. struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 120B + sizeof(tag) */
  464. };
  465. #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs)
  466. #define SIZE_OF_MON_DATA_RX_TLV sizeof(struct rx_mon_pkt_tlvs)
  467. #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV
  468. #define MON_RX_PKT_TLVS_LEN SIZE_OF_MON_DATA_RX_TLV
  469. #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field)
  470. #define HAL_RX_TLV_MSDU_DONE_GET(_rx_pkt_tlv) \
  471. HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_done
  472. #define HAL_RX_TLV_DECAP_FORMAT_GET(_rx_pkt_tlv) \
  473. HAL_RX_MSDU_END(_rx_pkt_tlv).decap_format
  474. #ifdef RECEIVE_OFFLOAD
  475. #define HAL_RX_TLV_GET_TCP_PURE_ACK(_rx_pkt_tlv) \
  476. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_only_ack
  477. #define HAL_RX_TLV_GET_TCP_PROTO(_rx_pkt_tlv) \
  478. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_proto
  479. #define HAL_RX_TLV_GET_UDP_PROTO(_rx_pkt_tlv) \
  480. HAL_RX_MSDU_END(_rx_pkt_tlv).udp_proto
  481. #define HAL_RX_TLV_GET_IPV6(_rx_pkt_tlv) \
  482. HAL_RX_MSDU_END(_rx_pkt_tlv).ipv6_proto
  483. #define HAL_RX_TLV_GET_IP_OFFSET(_rx_pkt_tlv) \
  484. HAL_RX_MSDU_END(_rx_pkt_tlv).l3_offset
  485. #define HAL_RX_TLV_GET_TCP_OFFSET(_rx_pkt_tlv) \
  486. HAL_RX_MSDU_END(_rx_pkt_tlv).l4_offset
  487. #endif /* RECEIVE_OFFLOAD */
  488. #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(_rx_pkt_tlv) \
  489. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz
  490. #define HAL_RX_TLV_MSDU_LEN_GET(_rx_pkt_tlv) \
  491. HAL_RX_MSDU_END(_rx_pkt_tlv).msdu_length
  492. #define HAL_RX_TLV_CCE_MATCH_GET(_rx_pkt_tlv) \
  493. HAL_RX_MSDU_END(_rx_pkt_tlv).cce_match
  494. #define HAL_RX_TLV_BW_GET(_rx_pkt_tlv) \
  495. HAL_RX_MSDU_END(_rx_pkt_tlv).receive_bandwidth
  496. #define HAL_RX_TLV_FLOWID_TOEPLITZ_GET(_rx_pkt_tlv) \
  497. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_id_toeplitz
  498. #define HAL_RX_TLV_SGI_GET(_rx_pkt_tlv) \
  499. HAL_RX_MSDU_END(_rx_pkt_tlv).sgi
  500. #define HAL_RX_TLV_RATE_MCS_GET(_rx_pkt_tlv) \
  501. HAL_RX_MSDU_END(_rx_pkt_tlv).rate_mcs
  502. #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \
  503. HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code
  504. #define HAL_RX_TLV_RSSI_GET(_rx_pkt_tlv) \
  505. HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi
  506. #define HAL_RX_TLV_FREQ_GET(_rx_pkt_tlv) \
  507. HAL_RX_MSDU_END(_rx_pkt_tlv).sw_phy_meta_data
  508. #define HAL_RX_TLV_PKT_TYPE_GET(_rx_pkt_tlv) \
  509. HAL_RX_MSDU_END(_rx_pkt_tlv).pkt_type
  510. #define HAL_RX_TLV_DECRYPT_ERR_GET(_rx_pkt_tlv) \
  511. HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_err
  512. #define HAL_RX_TLV_MIC_ERR_GET(_rx_pkt_tlv) \
  513. HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err
  514. #define HAL_RX_TLV_MIMO_SS_BITMAP(_rx_pkt_tlv)\
  515. HAL_RX_MSDU_END(_rx_pkt_tlv).mimo_ss_bitmap
  516. #define HAL_RX_TLV_ANT_SIGNAL_DB_GET(_rx_pkt_tlv) \
  517. HAL_RX_MSDU_END(_rx_pkt_tlv).user_rssi
  518. #define HAL_RX_TLV_STBC_GET(_rx_pkt_tlv) \
  519. HAL_RX_MSDU_END(_rx_pkt_tlv).stbc
  520. #define HAL_RX_TLV_RECEPTION_TYPE_GET(_rx_pkt_tlv) \
  521. HAL_RX_MSDU_END(_rx_pkt_tlv).reception_type
  522. #define HAL_RX_TLV_IP_CSUM_FAIL_GET(_rx_pkt_tlv) \
  523. HAL_RX_MSDU_END(_rx_pkt_tlv).ip_chksum_fail
  524. #define HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(_rx_pkt_tlv) \
  525. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum_fail
  526. #define HAL_RX_TLV_MPDU_LEN_ERR_GET(_rx_pkt_tlv) \
  527. HAL_RX_MSDU_END(_rx_pkt_tlv).mpdu_length_err
  528. #define HAL_RX_TLV_MPDU_FCS_ERR_GET(_rx_pkt_tlv) \
  529. HAL_RX_MSDU_END(_rx_pkt_tlv).fcs_err
  530. #define HAL_RX_TLV_IS_MCAST_GET(_rx_pkt_tlv) \
  531. HAL_RX_MSDU_END(_rx_pkt_tlv).mcast_bcast
  532. #ifdef RECEIVE_OFFLOAD
  533. /*
  534. * LRO information needed from the TLVs
  535. */
  536. #define HAL_RX_TLV_GET_LRO_ELIGIBLE(_rx_pkt_tlv) \
  537. HAL_RX_MSDU_END(_rx_pkt_tlv).lro_eligible
  538. #define HAL_RX_TLV_GET_TCP_ACK(_rx_pkt_tlv) \
  539. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_ack_number
  540. #define HAL_RX_TLV_GET_TCP_SEQ(_rx_pkt_tlv) \
  541. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_seq_number
  542. #define HAL_RX_TLV_GET_TCP_WIN(_rx_pkt_tlv) \
  543. HAL_RX_MSDU_END(_rx_pkt_tlv).window_size
  544. #endif
  545. #define HAL_RX_TLV_L3_TYPE_GET(_rx_pkt_tlv) \
  546. HAL_RX_MSDU_END(_rx_pkt_tlv).l3_type
  547. #ifdef RX_MSDU_END_PEER_META_DATA_OFFSET
  548. #define HAL_RX_TLV_MSDU_PEER_META_DATA_GET(_rx_pkt_tlv) \
  549. HAL_RX_MSDU_END(_rx_pkt_tlv).peer_meta_data
  550. #endif
  551. #define HAL_RX_TLV_PEER_META_DATA_GET(_rx_pkt_tlv) \
  552. HAL_RX_MPDU_START(_rx_pkt_tlv).peer_meta_data
  553. #define HAL_RX_TLV_KEYID_OCTET_GET(_rx_pkt_tlv) \
  554. HAL_RX_MSDU_END(_rx_pkt_tlv).key_id_octet
  555. #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(_rx_pkt_tlv) \
  556. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_number
  557. #define HAL_RX_TLV_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \
  558. HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id
  559. #define HAL_RX_TLV_L3_HEADER_PADDING_GET(_rx_pkt_tlv) \
  560. HAL_RX_MSDU_END(_rx_pkt_tlv).l3_header_padding
  561. #define HAL_RX_TLV_SA_IDX_GET(_rx_pkt_tlv) \
  562. HAL_RX_MSDU_END(_rx_pkt_tlv).sa_idx
  563. #define HAL_RX_TLV_DA_IDX_GET(_rx_pkt_tlv) \
  564. HAL_RX_MSDU_END(_rx_pkt_tlv).da_idx_or_sw_peer_id
  565. #define HAL_RX_TLV_FIRST_MSDU_GET(_rx_pkt_tlv) \
  566. HAL_RX_MSDU_END(_rx_pkt_tlv).first_msdu
  567. #define HAL_RX_TLV_LAST_MSDU_GET(_rx_pkt_tlv) \
  568. HAL_RX_MSDU_END(_rx_pkt_tlv).last_msdu
  569. #define HAL_RX_TLV_DA_IS_MCBC_GET(_rx_pkt_tlv) \
  570. HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_mcbc
  571. #define HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(_rx_pkt_tlv) \
  572. HAL_RX_MSDU_END(_rx_pkt_tlv).tkip_mic_err
  573. #define HAL_RX_TLV_SA_IS_VALID_GET(_rx_pkt_tlv) \
  574. HAL_RX_MSDU_END(_rx_pkt_tlv).sa_is_valid
  575. #define HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(_rx_pkt_tlv) \
  576. HAL_RX_MPDU_START(_rx_pkt_tlv).frame_encryption_info_valid
  577. #define HAL_RX_TLV_MPDU_PN_31_0_GET(_rx_pkt_tlv) \
  578. HAL_RX_MPDU_START(_rx_pkt_tlv).pn_31_0
  579. #define HAL_RX_TLV_MPDU_PN_63_32_GET(_rx_pkt_tlv) \
  580. HAL_RX_MPDU_START(_rx_pkt_tlv).pn_63_32
  581. #define HAL_RX_TLV_MPDU_PN_95_64_GET(_rx_pkt_tlv) \
  582. HAL_RX_MPDU_START(_rx_pkt_tlv).pn_95_64
  583. #define HAL_RX_TLV_DA_IS_VALID_GET(_rx_pkt_tlv) \
  584. HAL_RX_MSDU_END(_rx_pkt_tlv).da_is_valid
  585. #define HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(_rx_pkt_tlv) \
  586. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_valid
  587. #define HAL_RX_TLV_SW_PEER_ID_GET(_rx_pkt_tlv) \
  588. HAL_RX_MPDU_START(_rx_pkt_tlv).sw_peer_id
  589. #define HAL_RX_TLV_MPDU_GET_TODS(_rx_pkt_tlv) \
  590. HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds
  591. #define HAL_RX_TLV_MPDU_GET_FROMDS(_rx_pkt_tlv) \
  592. HAL_RX_MPDU_START(_rx_pkt_tlv).fr_ds
  593. #define HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(_rx_pkt_tlv) \
  594. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid
  595. #define HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_pkt_tlv) \
  596. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_valid
  597. #define HAL_RX_TLV_MPDU_AD1_31_0_GET(_rx_pkt_tlv) \
  598. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_31_0
  599. #define HAL_RX_TLV_MPDU_AD1_47_32_GET(_rx_pkt_tlv) \
  600. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad1_47_32
  601. #define HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_pkt_tlv) \
  602. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_valid
  603. #define HAL_RX_TLV_MPDU_AD2_15_0_GET(_rx_pkt_tlv) \
  604. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_15_0
  605. #define HAL_RX_TLV_MPDU_AD2_47_16_GET(_rx_pkt_tlv) \
  606. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad2_47_16
  607. #define HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(_rx_pkt_tlv) \
  608. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_valid
  609. #define HAL_RX_TLV_MPDU_AD3_31_0_GET(_rx_pkt_tlv) \
  610. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_31_0
  611. #define HAL_RX_TLV_MPDU_AD3_47_32_GET(_rx_pkt_tlv) \
  612. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad3_47_32
  613. #define HAL_RX_TLV_MPDU_AD4_31_0_GET(_rx_pkt_tlv) \
  614. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_31_0
  615. #define HAL_RX_TLV_MPDU_AD4_47_32_GET(_rx_pkt_tlv) \
  616. HAL_RX_MPDU_START(_rx_pkt_tlv).mac_addr_ad4_47_32
  617. #define HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_pkt_tlv) \
  618. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_sequence_control_valid
  619. #define HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \
  620. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid
  621. #define HAL_RX_TLV_GET_FC_VALID(_rx_pkt_tlv) \
  622. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_valid
  623. #define HAL_RX_TLV_GET_TO_DS_FLAG(_rx_pkt_tlv) \
  624. HAL_RX_MPDU_START(_rx_pkt_tlv).to_ds
  625. #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_pkt_tlv) \
  626. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_frame_control_field
  627. #define HAL_RX_TLV_FLOW_IDX_GET(_rx_pkt_tlv) \
  628. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx
  629. #define HAL_RX_TLV_REO_DEST_IND_GET(_rx_pkt_tlv) \
  630. HAL_RX_MSDU_END(_rx_pkt_tlv).reo_destination_indication
  631. #define HAL_RX_TLV_FLOW_IDX_INVALID_GET(_rx_pkt_tlv) \
  632. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_invalid
  633. #define HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(_rx_pkt_tlv) \
  634. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_idx_timeout
  635. #define HAL_RX_TLV_FSE_METADATA_GET(_rx_pkt_tlv) \
  636. HAL_RX_MSDU_END(_rx_pkt_tlv).fse_metadata
  637. #define HAL_RX_TLV_CCE_METADATA_GET(_rx_pkt_tlv) \
  638. HAL_RX_MSDU_END(_rx_pkt_tlv).cce_metadata
  639. #define HAL_RX_TLV_DECRYPT_STATUS_GET(_rx_pkt_tlv) \
  640. HAL_RX_MSDU_END(_rx_pkt_tlv).decrypt_status_code
  641. #define HAL_RX_TLV_GET_TCP_CHKSUM(_rx_pkt_tlv) \
  642. HAL_RX_MSDU_END(_rx_pkt_tlv).tcp_udp_chksum
  643. #define HAL_RX_TLV_GET_FLOW_AGGR_CONT(_rx_pkt_tlv) \
  644. HAL_RX_MSDU_END(_rx_pkt_tlv).flow_aggregation_continuation
  645. #define HAL_RX_TLV_GET_FLOW_AGGR_COUNT(_rx_pkt_tlv) \
  646. HAL_RX_MSDU_END(_rx_pkt_tlv).aggregation_count
  647. #define HAL_RX_TLV_GET_FISA_TIMEOUT(_rx_pkt_tlv) \
  648. HAL_RX_MSDU_END(_rx_pkt_tlv).fisa_timeout
  649. #define HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(_rx_pkt_tlv) \
  650. HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_l4_checksum
  651. #define HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(_rx_pkt_tlv) \
  652. HAL_RX_MSDU_END(_rx_pkt_tlv).cumulative_ip_length
  653. #define HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(_rx_pkt_tlv) \
  654. HAL_RX_MPDU_START(_rx_pkt_tlv).mpdu_qos_control_valid
  655. #define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \
  656. HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id
  657. #define HAL_RX_REO_QUEUE_DESC_ADDR_39_32_GET(_rx_pkt_tlv) \
  658. HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_39_32
  659. /* used by monitor mode for parsing from full TLV */
  660. #define HAL_RX_MON_GET_FC_VALID(_rx_mpdu_start) \
  661. HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MPDU_FRAME_CONTROL_VALID)
  662. #define HAL_RX_MON_GET_TO_DS_FLAG(_rx_mpdu_start) \
  663. HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, TO_DS)
  664. #define HAL_RX_MON_GET_MAC_ADDR2_VALID(_rx_mpdu_start) \
  665. HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MAC_ADDR_AD2_VALID)
  666. static inline
  667. uint32_t hal_rx_tlv_decap_format_get_be(void *hw_desc_addr)
  668. {
  669. struct rx_pkt_tlvs *rx_pkt_tlvs =
  670. (struct rx_pkt_tlvs *)hw_desc_addr;
  671. return HAL_RX_TLV_DECAP_FORMAT_GET(rx_pkt_tlvs);
  672. }
  673. static inline uint32_t hal_rx_tlv_msdu_done_get_be(uint8_t *buf)
  674. {
  675. return HAL_RX_TLV_MSDU_DONE_GET(buf);
  676. }
  677. /**
  678. * hal_rx_tlv_first_mpdu_get_be() - get first_mpdu bit from rx attention
  679. * @buf: pointer to rx_pkt_tlvs
  680. *
  681. * Return: uint32_t(first_msdu)
  682. */
  683. static inline uint32_t hal_rx_tlv_first_mpdu_get_be(uint8_t *buf)
  684. {
  685. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  686. return HAL_RX_TLV_FIRST_MPDU_GET(rx_pkt_tlvs);
  687. }
  688. /**
  689. * hal_rx_msdu_cce_match_get_be() - get CCE match bit from rx attention
  690. * @buf: pointer to rx_pkt_tlvs
  691. *
  692. * Return: CCE match value
  693. */
  694. static inline bool hal_rx_msdu_cce_match_get_be(uint8_t *buf)
  695. {
  696. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  697. return HAL_RX_TLV_CCE_MATCH_GET(rx_pkt_tlvs);
  698. }
  699. #ifdef RX_MSDU_END_PEER_META_DATA_OFFSET
  700. /*
  701. * Get peer_meta_data from RX_MSDU_END
  702. */
  703. static inline uint32_t hal_rx_msdu_peer_meta_data_get_be(uint8_t *buf)
  704. {
  705. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  706. return HAL_RX_TLV_MSDU_PEER_META_DATA_GET(rx_pkt_tlvs);
  707. }
  708. #endif
  709. /**
  710. * hal_rx_mpdu_get_addr1_be() - API to check get address1 of the mpdu
  711. * @buf: pointer to the start of RX PKT TLV headera
  712. * @mac_addr: pointer to mac address
  713. *
  714. * Return: success/failure
  715. */
  716. static inline QDF_STATUS hal_rx_mpdu_get_addr1_be(uint8_t *buf,
  717. uint8_t *mac_addr)
  718. {
  719. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  720. struct __attribute__((__packed__)) hal_addr1 {
  721. uint32_t ad1_31_0;
  722. uint16_t ad1_47_32;
  723. };
  724. struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr;
  725. uint32_t mac_addr_ad1_valid;
  726. mac_addr_ad1_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD1_VALID_GET(
  727. rx_pkt_tlvs);
  728. if (mac_addr_ad1_valid) {
  729. addr->ad1_31_0 = HAL_RX_TLV_MPDU_AD1_31_0_GET(rx_pkt_tlvs);
  730. addr->ad1_47_32 = HAL_RX_TLV_MPDU_AD1_47_32_GET(rx_pkt_tlvs);
  731. return QDF_STATUS_SUCCESS;
  732. }
  733. return QDF_STATUS_E_FAILURE;
  734. }
  735. #ifndef CONFIG_WORD_BASED_TLV
  736. /**
  737. * hal_rx_mpdu_info_ampdu_flag_get_be() - get ampdu flag bit
  738. * from rx mpdu info
  739. * @buf: pointer to rx_pkt_tlvs
  740. *
  741. * Return: ampdu flag
  742. */
  743. static inline bool hal_rx_mpdu_info_ampdu_flag_get_be(uint8_t *buf)
  744. {
  745. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  746. return !!HAL_RX_TLV_AMPDU_FLAG_GET(rx_pkt_tlvs);
  747. }
  748. /**
  749. * hal_rx_get_qdesc_addr_be() - API to get qdesc address of reo
  750. * entrance ring desc
  751. *
  752. * @dst_ring_desc: reo dest ring descriptor (used for Lithium DP)
  753. * @buf: pointer to the start of RX PKT TLV headers
  754. * Return: qdesc address in reo destination ring buffer
  755. */
  756. static inline uint64_t hal_rx_get_qdesc_addr_be(uint8_t *dst_ring_desc,
  757. uint8_t *buf)
  758. {
  759. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  760. return (uint64_t)HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(rx_pkt_tlvs);
  761. }
  762. /**
  763. * hal_rx_print_pn_be() - Prints the PN of rx packet.
  764. * @buf: rx_tlv_hdr of the received packet
  765. *
  766. * Return: void
  767. */
  768. static inline void hal_rx_print_pn_be(uint8_t *buf)
  769. {
  770. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  771. uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs);
  772. uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs);
  773. uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs);
  774. uint32_t pn_127_96 = HAL_RX_TLV_MPDU_PN_127_96_GET(rx_pkt_tlvs);
  775. hal_debug("PN number pn_127_96 0x%x pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x ",
  776. pn_127_96, pn_95_64, pn_63_32, pn_31_0);
  777. }
  778. static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num)
  779. {
  780. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  781. pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(pkt_tlvs);
  782. pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(pkt_tlvs) << 32);
  783. pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(pkt_tlvs);
  784. pn_num[1] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_127_96_GET(pkt_tlvs) << 32);
  785. }
  786. /**
  787. * hal_rx_mpdu_get_addr4_be() - API to get address4 of the mpdu
  788. * in the packet
  789. * @buf: pointer to the start of RX PKT TLV header
  790. * @mac_addr: pointer to mac address
  791. *
  792. * Return: success/failure
  793. */
  794. static inline QDF_STATUS hal_rx_mpdu_get_addr4_be(uint8_t *buf,
  795. uint8_t *mac_addr)
  796. {
  797. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  798. struct __attribute__((__packed__)) hal_addr4 {
  799. uint32_t ad4_31_0;
  800. uint16_t ad4_47_32;
  801. };
  802. struct hal_addr4 *addr = (struct hal_addr4 *)mac_addr;
  803. uint32_t mac_addr_ad4_valid;
  804. mac_addr_ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(pkt_tlvs);
  805. if (mac_addr_ad4_valid) {
  806. addr->ad4_31_0 = HAL_RX_TLV_MPDU_AD4_31_0_GET(pkt_tlvs);
  807. addr->ad4_47_32 = HAL_RX_TLV_MPDU_AD4_47_32_GET(pkt_tlvs);
  808. return QDF_STATUS_SUCCESS;
  809. }
  810. return QDF_STATUS_E_FAILURE;
  811. }
  812. /**
  813. * hal_rx_priv_info_set_in_tlv_be() - Save the private info to
  814. * the reserved bytes of rx_tlv_hdr
  815. * @buf: start of rx_tlv_hdr
  816. * @priv_data: hal_wbm_err_desc_info structure
  817. * @len: length of the private data
  818. * Return: void
  819. */
  820. static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf,
  821. uint8_t *priv_data,
  822. uint32_t len)
  823. {
  824. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  825. uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ?
  826. RX_BE_PADDING0_BYTES : len;
  827. qdf_mem_copy(pkt_tlvs->rx_padding0, priv_data, copy_len);
  828. }
  829. /**
  830. * hal_rx_priv_info_get_from_tlv_be() - retrieve the private data from
  831. * the reserved bytes of rx_tlv_hdr.
  832. * @buf: start of rx_tlv_hdr
  833. * @priv_data: Handle to get the private data, output parameter.
  834. * @len: length of the private data
  835. * Return: void
  836. */
  837. static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf,
  838. uint8_t *priv_data,
  839. uint32_t len)
  840. {
  841. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  842. uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ?
  843. RX_BE_PADDING0_BYTES : len;
  844. qdf_mem_copy(priv_data, pkt_tlvs->rx_padding0, copy_len);
  845. }
  846. /**
  847. * hal_rx_tlv_l3_type_get_be() - API to get the l3 type from
  848. * rx_msdu_start TLV
  849. * @buf: pointer to the start of RX PKT TLV headers
  850. *
  851. * Return: uint32_t(l3 type)
  852. */
  853. static inline uint32_t hal_rx_tlv_l3_type_get_be(uint8_t *buf)
  854. {
  855. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  856. return HAL_RX_TLV_L3_TYPE_GET(rx_pkt_tlvs);
  857. }
  858. /**
  859. * hal_rx_hw_desc_get_ppduid_get_be() - retrieve ppdu id
  860. * @rx_tlv_hdr: start address of rx_pkt_tlvs
  861. * @rxdma_dst_ring_desc: Rx HW descriptor
  862. *
  863. * Return: ppdu id
  864. */
  865. static inline uint32_t
  866. hal_rx_hw_desc_get_ppduid_get_be(void *rx_tlv_hdr, void *rxdma_dst_ring_desc)
  867. {
  868. struct rx_pkt_tlvs *rx_pkt_tlvs =
  869. (struct rx_pkt_tlvs *)rx_tlv_hdr;
  870. return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs);
  871. }
  872. /**
  873. * hal_rx_tlv_phy_ppdu_id_get_be() - get phy_ppdu_id value
  874. * from rx attention
  875. * @buf: pointer to rx_pkt_tlvs
  876. *
  877. * Return: phy_ppdu_id
  878. */
  879. static inline uint16_t hal_rx_tlv_phy_ppdu_id_get_be(uint8_t *buf)
  880. {
  881. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  882. return HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs);
  883. }
  884. /**
  885. * hal_rx_attn_phy_ppdu_id_get_be() - get phy_ppdu_id value
  886. * from rx attention
  887. * @buf: pointer to rx_pkt_tlvs
  888. *
  889. * Return: phy_ppdu_id
  890. */
  891. static inline uint16_t hal_rx_attn_phy_ppdu_id_get_be(uint8_t *buf)
  892. {
  893. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  894. uint16_t phy_ppdu_id;
  895. phy_ppdu_id = HAL_RX_TLV_PHY_PPDU_ID_GET(rx_pkt_tlvs);
  896. return phy_ppdu_id;
  897. }
  898. static inline uint32_t
  899. hal_rx_get_ppdu_id_be(uint8_t *buf)
  900. {
  901. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  902. return HAL_RX_GET_PPDU_ID(rx_pkt_tlvs);
  903. }
  904. /**
  905. * hal_rx_mpdu_peer_meta_data_set_be() - set peer meta data in RX mpdu start tlv
  906. * @buf: rx_tlv_hdr of the received packet
  907. * @peer_mdata: peer meta data to be set.
  908. *
  909. * Return: void
  910. */
  911. static inline void
  912. hal_rx_mpdu_peer_meta_data_set_be(uint8_t *buf, uint32_t peer_mdata)
  913. {
  914. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  915. HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs) = peer_mdata;
  916. }
  917. /*
  918. * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START
  919. */
  920. static inline uint32_t hal_rx_mpdu_peer_meta_data_get_be(uint8_t *buf)
  921. {
  922. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  923. return HAL_RX_TLV_PEER_META_DATA_GET(rx_pkt_tlvs);
  924. }
  925. static inline uint8_t hal_rx_get_filter_category_be(uint8_t *buf)
  926. {
  927. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  928. return HAL_RX_GET_FILTER_CATEGORY(rx_pkt_tlvs);
  929. }
  930. /**
  931. * hal_rx_is_unicast_be() - check packet is unicast frame or not.
  932. * @buf: pointer to rx pkt TLV.
  933. *
  934. * Return: true on unicast.
  935. */
  936. static inline bool hal_rx_is_unicast_be(uint8_t *buf)
  937. {
  938. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  939. uint32_t grp_id;
  940. grp_id = HAL_RX_TLV_SW_FRAME_GROUP_ID_GET(rx_pkt_tlvs);
  941. return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false;
  942. }
  943. #else
  944. #define IS_ADDR_MULTICAST(_a) (*(_a) & 0x01)
  945. static inline bool hal_rx_is_unicast_be(uint8_t *buf)
  946. {
  947. uint8_t mac[QDF_MAC_ADDR_SIZE] = {0};
  948. hal_rx_mpdu_get_addr1_be(buf, &mac[0]);
  949. return !IS_ADDR_MULTICAST(mac);
  950. }
  951. /**
  952. * hal_rx_priv_info_set_in_tlv_be() - Save the private info to
  953. * the reserved bytes of rx_tlv_hdr
  954. * @buf: start of rx_tlv_hdr
  955. * @priv_data: hal_wbm_err_desc_info structure
  956. * @len: length of the private data
  957. *
  958. * Return: void
  959. */
  960. static inline void hal_rx_priv_info_set_in_tlv_be(uint8_t *buf,
  961. uint8_t *priv_data,
  962. uint32_t len)
  963. {
  964. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  965. uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ?
  966. RX_BE_PADDING0_BYTES : len;
  967. qdf_mem_copy(&(HAL_RX_MSDU_END(pkt_tlvs).ppdu_start_timestamp_63_32),
  968. priv_data, copy_len);
  969. }
  970. /**
  971. * hal_rx_priv_info_get_from_tlv_be() - retrieve the private data from
  972. * the reserved bytes of rx_tlv_hdr.
  973. * @buf: start of rx_tlv_hdr
  974. * @priv_data: Handle to get the private data, output parameter.
  975. * @len: length of the private data
  976. *
  977. * Return: void
  978. */
  979. static inline void hal_rx_priv_info_get_from_tlv_be(uint8_t *buf,
  980. uint8_t *priv_data,
  981. uint32_t len)
  982. {
  983. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  984. uint32_t copy_len = (len > RX_BE_PADDING0_BYTES) ?
  985. RX_BE_PADDING0_BYTES : len;
  986. qdf_mem_copy(priv_data,
  987. &(HAL_RX_MSDU_END(pkt_tlvs).ppdu_start_timestamp_63_32),
  988. copy_len);
  989. }
  990. /**
  991. * hal_rx_print_pn_be() - Prints the PN of rx packet.
  992. * @buf: rx_tlv_hdr of the received packet
  993. *
  994. * Return: void
  995. */
  996. static inline void hal_rx_print_pn_be(uint8_t *buf)
  997. {
  998. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  999. uint32_t pn_31_0 = HAL_RX_TLV_MPDU_PN_31_0_GET(rx_pkt_tlvs);
  1000. uint32_t pn_63_32 = HAL_RX_TLV_MPDU_PN_63_32_GET(rx_pkt_tlvs);
  1001. uint32_t pn_95_64 = HAL_RX_TLV_MPDU_PN_95_64_GET(rx_pkt_tlvs);
  1002. hal_debug("PN number pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x ",
  1003. pn_95_64, pn_63_32, pn_31_0);
  1004. }
  1005. static inline void hal_rx_tlv_get_pn_num_be(uint8_t *buf, uint64_t *pn_num)
  1006. {
  1007. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1008. pn_num[0] = HAL_RX_TLV_MPDU_PN_31_0_GET(pkt_tlvs);
  1009. pn_num[0] |= ((uint64_t)HAL_RX_TLV_MPDU_PN_63_32_GET(pkt_tlvs) << 32);
  1010. pn_num[1] = HAL_RX_TLV_MPDU_PN_95_64_GET(pkt_tlvs);
  1011. }
  1012. #endif
  1013. /**
  1014. * hal_rx_tlv_msdu_len_get_be() - API to get the MSDU length from
  1015. * rx_msdu_start TLV
  1016. * @buf: pointer to the start of RX PKT TLV headers
  1017. *
  1018. * Return: msdu length
  1019. */
  1020. static inline uint32_t hal_rx_tlv_msdu_len_get_be(uint8_t *buf)
  1021. {
  1022. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1023. return HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs);
  1024. }
  1025. /**
  1026. * hal_rx_tlv_msdu_len_set_be() - API to set the MSDU length from
  1027. * rx_msdu_start TLV
  1028. * @buf: pointer to the start of RX PKT TLV headers
  1029. * @len: msdu length
  1030. *
  1031. * Return: none
  1032. */
  1033. static inline void hal_rx_tlv_msdu_len_set_be(uint8_t *buf, uint32_t len)
  1034. {
  1035. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1036. HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs) = len;
  1037. }
  1038. /**
  1039. * hal_rx_tlv_bw_get_be() - API to get the Bandwidth Interval from
  1040. * rx_msdu_start
  1041. * @buf: pointer to the start of RX PKT TLV header
  1042. *
  1043. * Return: uint32_t(bw)
  1044. */
  1045. static inline uint32_t hal_rx_tlv_bw_get_be(uint8_t *buf)
  1046. {
  1047. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1048. return HAL_RX_TLV_BW_GET(rx_pkt_tlvs);
  1049. }
  1050. /**
  1051. * hal_rx_tlv_toeplitz_get_be() - API to get the toeplitz hash from
  1052. * rx_msdu_start TLV
  1053. * @buf: pointer to the start of RX PKT TLV headers
  1054. *
  1055. * Return: toeplitz hash
  1056. */
  1057. static inline uint32_t hal_rx_tlv_toeplitz_get_be(uint8_t *buf)
  1058. {
  1059. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1060. return HAL_RX_TLV_FLOWID_TOEPLITZ_GET(rx_pkt_tlvs);
  1061. }
  1062. /**
  1063. * hal_rx_tlv_sgi_get_be() - API to get the Short Guard Interval from
  1064. * rx_msdu_start TLV
  1065. * @buf: pointer to the start of RX PKT TLV headers
  1066. *
  1067. * Return: uint32_t(sgi)
  1068. */
  1069. static inline uint32_t hal_rx_tlv_sgi_get_be(uint8_t *buf)
  1070. {
  1071. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1072. return HAL_RX_TLV_SGI_GET(rx_pkt_tlvs);
  1073. }
  1074. /**
  1075. * hal_rx_tlv_rate_mcs_get_be() - API to get the MCS rate from
  1076. * rx_msdu_start TLV
  1077. * @buf: pointer to the start of RX PKT TLV headers
  1078. *
  1079. * Return: uint32_t(rate_mcs)
  1080. */
  1081. static inline uint32_t hal_rx_tlv_rate_mcs_get_be(uint8_t *buf)
  1082. {
  1083. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1084. uint32_t rate_mcs;
  1085. rate_mcs = HAL_RX_TLV_RATE_MCS_GET(rx_pkt_tlvs);
  1086. return rate_mcs;
  1087. }
  1088. /**
  1089. * hal_rx_msdu_get_keyid_be() - API to get the key id of the decrypted packet
  1090. * from rx_msdu_end
  1091. * @buf: pointer to the start of RX PKT TLV header
  1092. *
  1093. * Return: uint32_t(key id)
  1094. */
  1095. static inline uint8_t hal_rx_msdu_get_keyid_be(uint8_t *buf)
  1096. {
  1097. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1098. uint32_t keyid_octet;
  1099. keyid_octet = HAL_RX_TLV_KEYID_OCTET_GET(rx_pkt_tlvs);
  1100. return keyid_octet & 0x3;
  1101. }
  1102. /**
  1103. * hal_rx_tlv_get_rssi_be() - API to get the rssi of received pkt from
  1104. * rx_msdu_start
  1105. * @buf: pointer to the start of RX PKT TLV header
  1106. *
  1107. * Return: uint32_t(rssi)
  1108. */
  1109. static inline uint32_t hal_rx_tlv_get_rssi_be(uint8_t *buf)
  1110. {
  1111. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1112. uint32_t rssi;
  1113. rssi = HAL_RX_TLV_RSSI_GET(rx_pkt_tlvs);
  1114. return rssi;
  1115. }
  1116. /**
  1117. * hal_rx_tlv_get_freq_be() - API to get the frequency of operating
  1118. * channel from rx_msdu_start
  1119. * @buf: pointer to the start of RX PKT TLV header
  1120. *
  1121. * Return: uint32_t(frequency)
  1122. */
  1123. static inline uint32_t hal_rx_tlv_get_freq_be(uint8_t *buf)
  1124. {
  1125. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1126. uint32_t freq;
  1127. freq = HAL_RX_TLV_FREQ_GET(rx_pkt_tlvs);
  1128. return freq;
  1129. }
  1130. /**
  1131. * hal_rx_tlv_get_pkt_type_be() - API to get the pkt type from
  1132. * rx_msdu_start
  1133. * @buf: pointer to the start of RX PKT TLV header
  1134. *
  1135. * Return: uint32_t(pkt type)
  1136. */
  1137. static inline uint32_t hal_rx_tlv_get_pkt_type_be(uint8_t *buf)
  1138. {
  1139. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1140. uint32_t pkt_type;
  1141. pkt_type = HAL_RX_TLV_PKT_TYPE_GET(rx_pkt_tlvs);
  1142. return pkt_type;
  1143. }
  1144. /*******************************************************************************
  1145. * RX ERROR APIS
  1146. ******************************************************************************/
  1147. /**
  1148. * hal_rx_tlv_decrypt_err_get_be() - API to get the Decrypt ERR from
  1149. * rx_mpdu_end TLV
  1150. * @buf: pointer to the start of RX PKT TLV headers
  1151. *
  1152. * Return: uint32_t(decrypt_err)
  1153. */
  1154. static inline uint32_t hal_rx_tlv_decrypt_err_get_be(uint8_t *buf)
  1155. {
  1156. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1157. uint32_t decrypt_err;
  1158. decrypt_err = HAL_RX_TLV_DECRYPT_ERR_GET(rx_pkt_tlvs);
  1159. return decrypt_err;
  1160. }
  1161. /**
  1162. * hal_rx_tlv_mic_err_get_be() - API to get the MIC ERR from rx_tlv TLV
  1163. * @buf: pointer to the start of RX PKT TLV headers
  1164. *
  1165. * Return: uint32_t(mic_err)
  1166. */
  1167. static inline uint32_t hal_rx_tlv_mic_err_get_be(uint8_t *buf)
  1168. {
  1169. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1170. uint32_t mic_err;
  1171. mic_err = HAL_RX_TLV_MIC_ERR_GET(rx_pkt_tlvs);
  1172. return mic_err;
  1173. }
  1174. /**
  1175. * hal_get_reo_ent_desc_qdesc_addr_be() - API to get qdesc address of
  1176. * reo entrance ring desc
  1177. * @desc: reo entrance ring descriptor
  1178. *
  1179. * Return: qdesc address
  1180. */
  1181. static inline uint8_t *hal_get_reo_ent_desc_qdesc_addr_be(uint8_t *desc)
  1182. {
  1183. return desc + REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET;
  1184. }
  1185. /**
  1186. * hal_set_reo_ent_desc_reo_dest_ind_be() - API to set reo destination
  1187. * indication of reo entrance ring desc
  1188. * @desc: reo ent ring descriptor
  1189. * @dst_ind: reo destination indication value
  1190. *
  1191. * Return: None
  1192. */
  1193. static inline void
  1194. hal_set_reo_ent_desc_reo_dest_ind_be(uint8_t *desc, uint32_t dst_ind)
  1195. {
  1196. HAL_RX_FLD_SET(desc, REO_ENTRANCE_RING,
  1197. REO_DESTINATION_INDICATION, dst_ind);
  1198. }
  1199. /**
  1200. * hal_rx_mpdu_sequence_number_get_be() - Get mpdu sequence number
  1201. * @buf: pointer to packet buffer
  1202. *
  1203. * Return: mpdu sequence
  1204. */
  1205. static inline int hal_rx_mpdu_sequence_number_get_be(uint8_t *buf)
  1206. {
  1207. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1208. return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs);
  1209. }
  1210. /**
  1211. * hal_rx_msdu_packet_metadata_get_generic_be() - API to get the msdu
  1212. * information from
  1213. * rx_msdu_end TLV
  1214. * @buf: pointer to the start of RX PKT TLV headers
  1215. * @pkt_msdu_metadata: pointer to the msdu info structure
  1216. */
  1217. static inline void
  1218. hal_rx_msdu_packet_metadata_get_generic_be(uint8_t *buf,
  1219. void *pkt_msdu_metadata)
  1220. {
  1221. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1222. struct hal_rx_msdu_metadata *msdu_metadata =
  1223. (struct hal_rx_msdu_metadata *)pkt_msdu_metadata;
  1224. msdu_metadata->l3_hdr_pad =
  1225. HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs);
  1226. msdu_metadata->sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs);
  1227. msdu_metadata->da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs);
  1228. msdu_metadata->sa_sw_peer_id =
  1229. HAL_RX_TLV_SA_SW_PEER_ID_GET(rx_pkt_tlvs);
  1230. }
  1231. /**
  1232. * hal_rx_tlv_nss_get_be() - API to get the NSS Interval from
  1233. * rx_msdu_start
  1234. * @buf: pointer to the start of RX PKT TLV header
  1235. *
  1236. * Return: uint32_t(nss)
  1237. */
  1238. static inline uint32_t hal_rx_tlv_nss_get_be(uint8_t *buf)
  1239. {
  1240. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1241. uint8_t mimo_ss_bitmap;
  1242. mimo_ss_bitmap = HAL_RX_TLV_MIMO_SS_BITMAP(rx_pkt_tlvs);
  1243. return qdf_get_hweight8(mimo_ss_bitmap);
  1244. }
  1245. #ifdef GET_MSDU_AGGREGATION
  1246. #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)\
  1247. {\
  1248. bool first_msdu, last_msdu; \
  1249. first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_desc);\
  1250. last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_desc);\
  1251. if (first_msdu && last_msdu)\
  1252. rs->rs_flags &= (~IEEE80211_AMSDU_FLAG);\
  1253. else\
  1254. rs->rs_flags |= (IEEE80211_AMSDU_FLAG); \
  1255. } \
  1256. #define HAL_RX_SET_MSDU_AGGREGATION((rs_mpdu), (rs_ppdu))\
  1257. {\
  1258. if (rs_mpdu->rs_flags & IEEE80211_AMSDU_FLAG)\
  1259. rs_ppdu->rs_flags |= IEEE80211_AMSDU_FLAG;\
  1260. } \
  1261. #else
  1262. #define HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs)
  1263. #define HAL_RX_SET_MSDU_AGGREGATION(rs_mpdu, rs_ppdu)
  1264. #endif
  1265. /**
  1266. * hal_rx_mon_hw_desc_get_mpdu_status_be() - Retrieve MPDU status
  1267. * @hw_desc_addr: Start address of Rx HW TLVs
  1268. * @rs: Status for monitor mode
  1269. *
  1270. * Return: void
  1271. */
  1272. static inline void
  1273. hal_rx_mon_hw_desc_get_mpdu_status_be(void *hw_desc_addr,
  1274. struct mon_rx_status *rs)
  1275. {
  1276. uint32_t reg_value;
  1277. struct rx_pkt_tlvs *rx_desc =
  1278. (struct rx_pkt_tlvs *)hw_desc_addr;
  1279. const uint32_t sgi_hw_to_cdp[] = {
  1280. CDP_SGI_0_8_US,
  1281. CDP_SGI_0_4_US,
  1282. CDP_SGI_1_6_US,
  1283. CDP_SGI_3_2_US,
  1284. };
  1285. HAL_RX_GET_MSDU_AGGREGATION(rx_desc, rs);
  1286. rs->ant_signal_db = HAL_RX_TLV_ANT_SIGNAL_DB_GET(rx_desc);
  1287. rs->is_stbc = HAL_RX_TLV_STBC_GET(rx_desc);
  1288. reg_value = HAL_RX_TLV_SGI_GET(rx_desc);
  1289. rs->sgi = sgi_hw_to_cdp[reg_value];
  1290. reg_value = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_desc);
  1291. rs->beamformed = (reg_value == HAL_RX_RECEPTION_TYPE_MU_MIMO) ? 1 : 0;
  1292. /* TODO: rs->beamformed should be set for SU beamforming also */
  1293. }
  1294. static inline uint32_t hal_rx_tlv_tid_get_be(uint8_t *buf)
  1295. {
  1296. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1297. uint32_t tid;
  1298. tid = HAL_RX_TLV_TID_GET(rx_pkt_tlvs);
  1299. return tid;
  1300. }
  1301. /**
  1302. * hal_rx_tlv_reception_type_get_be() - API to get the reception type
  1303. * Interval from rx_msdu_start
  1304. * @buf: pointer to the start of RX PKT TLV header
  1305. *
  1306. * Return: uint32_t(reception_type)
  1307. */
  1308. static inline
  1309. uint32_t hal_rx_tlv_reception_type_get_be(uint8_t *buf)
  1310. {
  1311. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1312. uint32_t reception_type;
  1313. reception_type = HAL_RX_TLV_RECEPTION_TYPE_GET(rx_pkt_tlvs);
  1314. return reception_type;
  1315. }
  1316. /**
  1317. * hal_rx_msdu_end_da_idx_get_be() - API to get da_idx from
  1318. * rx_msdu_end TLV
  1319. * @buf: pointer to the start of RX PKT TLV headers
  1320. *
  1321. * Return: da index
  1322. */
  1323. static inline uint16_t hal_rx_msdu_end_da_idx_get_be(uint8_t *buf)
  1324. {
  1325. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1326. uint16_t da_idx;
  1327. da_idx = HAL_RX_TLV_DA_IDX_GET(rx_pkt_tlvs);
  1328. return da_idx;
  1329. }
  1330. /**
  1331. * hal_rx_get_rx_fragment_number_be() - Function to retrieve rx fragment number
  1332. * @buf: Network buffer
  1333. *
  1334. * Return: rx fragment number
  1335. */
  1336. static inline
  1337. uint8_t hal_rx_get_rx_fragment_number_be(uint8_t *buf)
  1338. {
  1339. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1340. /* Return first 4 bits as fragment number */
  1341. return (HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs) &
  1342. DOT11_SEQ_FRAG_MASK);
  1343. }
  1344. /**
  1345. * hal_rx_tlv_da_is_mcbc_get_be() - API to check if pkt is MCBC from
  1346. * rx_msdu_end TLV
  1347. * @buf: pointer to the start of RX PKT TLV headers
  1348. *
  1349. * Return: da_is_mcbc
  1350. */
  1351. static inline uint8_t
  1352. hal_rx_tlv_da_is_mcbc_get_be(uint8_t *buf)
  1353. {
  1354. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1355. return HAL_RX_TLV_DA_IS_MCBC_GET(rx_pkt_tlvs);
  1356. }
  1357. /**
  1358. * hal_rx_tlv_is_tkip_mic_err_get_be() - API to get tkip Mic error
  1359. * from rx_msdu_end TLV
  1360. * @buf: pointer to the start of RX PKT TLV headers
  1361. *
  1362. * Return: tkip_mic_err
  1363. */
  1364. static inline uint8_t
  1365. hal_rx_tlv_is_tkip_mic_err_get_be(uint8_t *buf)
  1366. {
  1367. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1368. return HAL_RX_TLV_IS_TKIP_MIC_ERR_GET(rx_pkt_tlvs);
  1369. }
  1370. /**
  1371. * hal_rx_tlv_sa_is_valid_get_be() - API to get the sa_is_valid bit from
  1372. * rx_msdu_end TLV
  1373. * @buf: pointer to the start of RX PKT TLV headers
  1374. *
  1375. * Return: sa_is_valid bit
  1376. */
  1377. static inline uint8_t
  1378. hal_rx_tlv_sa_is_valid_get_be(uint8_t *buf)
  1379. {
  1380. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1381. uint8_t sa_is_valid;
  1382. sa_is_valid = HAL_RX_TLV_SA_IS_VALID_GET(rx_pkt_tlvs);
  1383. return sa_is_valid;
  1384. }
  1385. /**
  1386. * hal_rx_tlv_sa_idx_get_be() - API to get the sa_idx from rx_msdu_end TLV
  1387. * @buf: pointer to the start of RX PKT TLV headers
  1388. *
  1389. * Return: sa_idx (SA AST index)
  1390. */
  1391. static inline
  1392. uint16_t hal_rx_tlv_sa_idx_get_be(uint8_t *buf)
  1393. {
  1394. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1395. uint16_t sa_idx;
  1396. sa_idx = HAL_RX_TLV_SA_IDX_GET(rx_pkt_tlvs);
  1397. return sa_idx;
  1398. }
  1399. /**
  1400. * hal_rx_desc_is_first_msdu_be() - Check if first msdu
  1401. * @hw_desc_addr: hardware descriptor address
  1402. *
  1403. * Return: 0 - success/ non-zero failure
  1404. */
  1405. static inline uint32_t hal_rx_desc_is_first_msdu_be(void *hw_desc_addr)
  1406. {
  1407. struct rx_pkt_tlvs *rx_pkt_tlvs =
  1408. (struct rx_pkt_tlvs *)hw_desc_addr;
  1409. return HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs);
  1410. }
  1411. /**
  1412. * hal_rx_tlv_l3_hdr_padding_get_be() - API to get the l3_header padding
  1413. * from rx_msdu_end TLV
  1414. * @buf: pointer to the start of RX PKT TLV headers
  1415. *
  1416. * Return: number of l3 header padding bytes
  1417. */
  1418. static inline uint32_t hal_rx_tlv_l3_hdr_padding_get_be(uint8_t *buf)
  1419. {
  1420. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1421. uint32_t l3_header_padding;
  1422. l3_header_padding = HAL_RX_TLV_L3_HEADER_PADDING_GET(rx_pkt_tlvs);
  1423. return l3_header_padding;
  1424. }
  1425. /**
  1426. * hal_rx_encryption_info_valid_be() - Returns encryption type.
  1427. * @buf: rx_tlv_hdr of the received packet
  1428. *
  1429. * Return: encryption type
  1430. */
  1431. static inline uint32_t hal_rx_encryption_info_valid_be(uint8_t *buf)
  1432. {
  1433. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1434. uint32_t encryption_info =
  1435. HAL_RX_TLV_MPDU_ENCRYPTION_INFO_VALID(rx_pkt_tlvs);
  1436. return encryption_info;
  1437. }
  1438. /**
  1439. * hal_rx_tlv_first_msdu_get_be() - API to get first msdu status from
  1440. * rx_msdu_end TLV
  1441. * @buf: pointer to the start of RX PKT TLV headers
  1442. *
  1443. * Return: first_msdu
  1444. */
  1445. static inline uint8_t hal_rx_tlv_first_msdu_get_be(uint8_t *buf)
  1446. {
  1447. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1448. uint8_t first_msdu;
  1449. first_msdu = HAL_RX_TLV_FIRST_MSDU_GET(rx_pkt_tlvs);
  1450. return first_msdu;
  1451. }
  1452. /**
  1453. * hal_rx_tlv_da_is_valid_get_be() - API to check if da is valid from
  1454. * rx_msdu_end TLV
  1455. * @buf: pointer to the start of RX PKT TLV headers
  1456. *
  1457. * Return: da_is_valid
  1458. */
  1459. static inline uint8_t hal_rx_tlv_da_is_valid_get_be(uint8_t *buf)
  1460. {
  1461. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1462. uint8_t da_is_valid;
  1463. da_is_valid = HAL_RX_TLV_DA_IS_VALID_GET(rx_pkt_tlvs);
  1464. return da_is_valid;
  1465. }
  1466. /**
  1467. * hal_rx_tlv_last_msdu_get_be() - API to get last msdu status from
  1468. * rx_msdu_end TLV
  1469. * @buf: pointer to the start of RX PKT TLV headers
  1470. *
  1471. * Return: last_msdu
  1472. */
  1473. static inline uint8_t hal_rx_tlv_last_msdu_get_be(uint8_t *buf)
  1474. {
  1475. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1476. uint8_t last_msdu;
  1477. last_msdu = HAL_RX_TLV_LAST_MSDU_GET(rx_pkt_tlvs);
  1478. return last_msdu;
  1479. }
  1480. /**
  1481. * hal_rx_get_mpdu_mac_ad4_valid_be() - Retrieves if mpdu 4th addr is valid
  1482. * @buf: Network buffer
  1483. *
  1484. * Return: value of mpdu 4th address valid field
  1485. */
  1486. static inline bool hal_rx_get_mpdu_mac_ad4_valid_be(uint8_t *buf)
  1487. {
  1488. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1489. bool ad4_valid = 0;
  1490. ad4_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD4_VALID_GET(rx_pkt_tlvs);
  1491. return ad4_valid;
  1492. }
  1493. /**
  1494. * hal_rx_mpdu_start_sw_peer_id_get_be() - Retrieve sw peer_id
  1495. * @buf: network buffer
  1496. *
  1497. * Return: sw peer_id
  1498. */
  1499. static inline uint32_t hal_rx_mpdu_start_sw_peer_id_get_be(uint8_t *buf)
  1500. {
  1501. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1502. return HAL_RX_TLV_SW_PEER_ID_GET(rx_pkt_tlvs);
  1503. }
  1504. /**
  1505. * hal_rx_mpdu_get_to_ds_be() - API to get the tods info
  1506. * from rx_mpdu_start
  1507. *
  1508. * @buf: pointer to the start of RX PKT TLV header
  1509. * Return: uint32_t(to_ds)
  1510. */
  1511. static inline uint32_t hal_rx_mpdu_get_to_ds_be(uint8_t *buf)
  1512. {
  1513. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1514. return HAL_RX_TLV_MPDU_GET_TODS(rx_pkt_tlvs);
  1515. }
  1516. /**
  1517. * hal_rx_mpdu_get_fr_ds_be() - API to get the from ds info
  1518. * from rx_mpdu_start
  1519. * @buf: pointer to the start of RX PKT TLV header
  1520. *
  1521. * Return: uint32_t(fr_ds)
  1522. */
  1523. static inline uint32_t hal_rx_mpdu_get_fr_ds_be(uint8_t *buf)
  1524. {
  1525. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1526. return HAL_RX_TLV_MPDU_GET_FROMDS(rx_pkt_tlvs);
  1527. }
  1528. /**
  1529. * hal_rx_get_mpdu_frame_control_valid_be() - Retrieves mpdu frame
  1530. * control valid
  1531. * @buf: Network buffer
  1532. *
  1533. * Return: value of frame control valid field
  1534. */
  1535. static inline uint8_t hal_rx_get_mpdu_frame_control_valid_be(uint8_t *buf)
  1536. {
  1537. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1538. return HAL_RX_TLV_MPDU_GET_FRAME_CONTROL_VALID(rx_pkt_tlvs);
  1539. }
  1540. /**
  1541. * hal_rx_mpdu_get_addr2_be() - API to check get address2 of the mpdu
  1542. * in the packet
  1543. * @buf: pointer to the start of RX PKT TLV header
  1544. * @mac_addr: pointer to mac address
  1545. *
  1546. * Return: success/failure
  1547. */
  1548. static inline QDF_STATUS hal_rx_mpdu_get_addr2_be(uint8_t *buf,
  1549. uint8_t *mac_addr)
  1550. {
  1551. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1552. struct __attribute__((__packed__)) hal_addr2 {
  1553. uint16_t ad2_15_0;
  1554. uint32_t ad2_47_16;
  1555. };
  1556. struct hal_addr2 *addr = (struct hal_addr2 *)mac_addr;
  1557. uint32_t mac_addr_ad2_valid;
  1558. mac_addr_ad2_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs);
  1559. if (mac_addr_ad2_valid) {
  1560. addr->ad2_15_0 = HAL_RX_TLV_MPDU_AD2_15_0_GET(rx_pkt_tlvs);
  1561. addr->ad2_47_16 = HAL_RX_TLV_MPDU_AD2_47_16_GET(rx_pkt_tlvs);
  1562. return QDF_STATUS_SUCCESS;
  1563. }
  1564. return QDF_STATUS_E_FAILURE;
  1565. }
  1566. /**
  1567. * hal_rx_mpdu_get_addr3_be() - API to get address3 of the mpdu in the
  1568. * packet
  1569. * @buf: pointer to the start of RX PKT TLV header
  1570. * @mac_addr: pointer to mac address
  1571. *
  1572. * Return: success/failure
  1573. */
  1574. static inline QDF_STATUS hal_rx_mpdu_get_addr3_be(uint8_t *buf,
  1575. uint8_t *mac_addr)
  1576. {
  1577. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1578. struct __attribute__((__packed__)) hal_addr3 {
  1579. uint32_t ad3_31_0;
  1580. uint16_t ad3_47_32;
  1581. };
  1582. struct hal_addr3 *addr = (struct hal_addr3 *)mac_addr;
  1583. uint32_t mac_addr_ad3_valid;
  1584. mac_addr_ad3_valid = HAL_RX_TLV_MPDU_MAC_ADDR_AD3_VALID_GET(rx_pkt_tlvs);
  1585. if (mac_addr_ad3_valid) {
  1586. addr->ad3_31_0 = HAL_RX_TLV_MPDU_AD3_31_0_GET(rx_pkt_tlvs);
  1587. addr->ad3_47_32 = HAL_RX_TLV_MPDU_AD3_47_32_GET(rx_pkt_tlvs);
  1588. return QDF_STATUS_SUCCESS;
  1589. }
  1590. return QDF_STATUS_E_FAILURE;
  1591. }
  1592. /**
  1593. * hal_rx_get_mpdu_sequence_control_valid_be() - Get mpdu sequence
  1594. * control valid
  1595. * @buf: Network buffer
  1596. *
  1597. * Return: value of sequence control valid field
  1598. */
  1599. static inline uint8_t hal_rx_get_mpdu_sequence_control_valid_be(uint8_t *buf)
  1600. {
  1601. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1602. return HAL_RX_TLV_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_pkt_tlvs);
  1603. }
  1604. /**
  1605. * hal_rx_tid_get_be() - get tid based on qos control valid.
  1606. * @hal_soc_hdl: hal_soc handle
  1607. * @buf: pointer to rx pkt TLV.
  1608. *
  1609. * Return: tid
  1610. */
  1611. static inline uint32_t hal_rx_tid_get_be(hal_soc_handle_t hal_soc_hdl,
  1612. uint8_t *buf)
  1613. {
  1614. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1615. uint8_t qos_control_valid =
  1616. HAL_RX_TLV_MPDU_QOS_CONTROL_VALID_GET(rx_pkt_tlvs);
  1617. if (qos_control_valid)
  1618. return hal_rx_tlv_tid_get_be(buf);
  1619. return HAL_RX_NON_QOS_TID;
  1620. }
  1621. static inline
  1622. uint8_t hal_rx_get_fc_valid_be(uint8_t *buf)
  1623. {
  1624. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1625. return HAL_RX_TLV_GET_FC_VALID(rx_pkt_tlvs);
  1626. }
  1627. static inline uint8_t hal_rx_get_to_ds_flag_be(uint8_t *buf)
  1628. {
  1629. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1630. return HAL_RX_TLV_GET_TO_DS_FLAG(rx_pkt_tlvs);
  1631. }
  1632. static inline uint8_t hal_rx_get_mac_addr2_valid_be(uint8_t *buf)
  1633. {
  1634. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1635. return HAL_RX_TLV_MPDU_MAC_ADDR_AD2_VALID_GET(rx_pkt_tlvs);
  1636. }
  1637. /**
  1638. * hal_rx_msdu_flow_idx_get_be() - API to get flow index from
  1639. * rx_msdu_end TLV
  1640. * @buf: pointer to the start of RX PKT TLV headers
  1641. *
  1642. * Return: flow index value from MSDU END TLV
  1643. */
  1644. static inline uint32_t hal_rx_msdu_flow_idx_get_be(uint8_t *buf)
  1645. {
  1646. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1647. return HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs);
  1648. }
  1649. /**
  1650. * hal_rx_msdu_get_reo_destination_indication_be() - API to get
  1651. * reo_destination_indication
  1652. * from rx_msdu_end
  1653. * TLV
  1654. * @buf: pointer to the start of RX PKT TLV headers
  1655. * @reo_destination_indication: pointer to return value of
  1656. * reo_destination_indication
  1657. *
  1658. * Return: none
  1659. */
  1660. static inline void
  1661. hal_rx_msdu_get_reo_destination_indication_be(uint8_t *buf,
  1662. uint32_t *reo_destination_indication)
  1663. {
  1664. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1665. *reo_destination_indication = HAL_RX_TLV_REO_DEST_IND_GET(pkt_tlvs);
  1666. }
  1667. /**
  1668. * hal_rx_msdu_flow_idx_invalid_be() - API to get flow index invalid
  1669. * from rx_msdu_end TLV
  1670. * @buf: pointer to the start of RX PKT TLV headers
  1671. *
  1672. * Return: flow index invalid value from MSDU END TLV
  1673. */
  1674. static inline bool hal_rx_msdu_flow_idx_invalid_be(uint8_t *buf)
  1675. {
  1676. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1677. return HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs);
  1678. }
  1679. /**
  1680. * hal_rx_msdu_flow_idx_timeout_be() - API to get flow index timeout
  1681. * from rx_msdu_end TLV
  1682. * @buf: pointer to the start of RX PKT TLV headers
  1683. *
  1684. * Return: flow index timeout value from MSDU END TLV
  1685. */
  1686. static inline bool hal_rx_msdu_flow_idx_timeout_be(uint8_t *buf)
  1687. {
  1688. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1689. return HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs);
  1690. }
  1691. /**
  1692. * hal_rx_msdu_fse_metadata_get_be() - API to get FSE metadata from
  1693. * rx_msdu_end TLV
  1694. * @buf: pointer to the start of RX PKT TLV headers
  1695. *
  1696. * Return: fse metadata value from MSDU END TLV
  1697. */
  1698. static inline uint32_t hal_rx_msdu_fse_metadata_get_be(uint8_t *buf)
  1699. {
  1700. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1701. return HAL_RX_TLV_FSE_METADATA_GET(pkt_tlvs);
  1702. }
  1703. /**
  1704. * hal_rx_msdu_cce_metadata_get_be() - API to get CCE metadata from
  1705. * rx_msdu_end TLV
  1706. * @buf: pointer to the start of RX PKT TLV headers
  1707. *
  1708. * Return: cce_metadata
  1709. */
  1710. static inline uint16_t
  1711. hal_rx_msdu_cce_metadata_get_be(uint8_t *buf)
  1712. {
  1713. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1714. return HAL_RX_TLV_CCE_METADATA_GET(pkt_tlvs);
  1715. }
  1716. /**
  1717. * hal_rx_msdu_get_flow_params_be() - API to get flow index, flow
  1718. * index invalid and flow index
  1719. * timeout from rx_msdu_end TLV
  1720. * @buf: pointer to the start of RX PKT TLV headers
  1721. * @flow_invalid: pointer to return value of flow_idx_valid
  1722. * @flow_timeout: pointer to return value of flow_idx_timeout
  1723. * @flow_index: pointer to return value of flow_idx
  1724. *
  1725. * Return: none
  1726. */
  1727. static inline void
  1728. hal_rx_msdu_get_flow_params_be(uint8_t *buf,
  1729. bool *flow_invalid,
  1730. bool *flow_timeout,
  1731. uint32_t *flow_index)
  1732. {
  1733. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1734. *flow_invalid = HAL_RX_TLV_FLOW_IDX_INVALID_GET(pkt_tlvs);
  1735. *flow_timeout = HAL_RX_TLV_FLOW_IDX_TIMEOUT_GET(pkt_tlvs);
  1736. *flow_index = HAL_RX_TLV_FLOW_IDX_GET(pkt_tlvs);
  1737. }
  1738. /**
  1739. * hal_rx_tlv_get_tcp_chksum_be() - API to get tcp checksum
  1740. * @buf: rx_tlv_hdr
  1741. *
  1742. * Return: tcp checksum
  1743. */
  1744. static inline uint16_t
  1745. hal_rx_tlv_get_tcp_chksum_be(uint8_t *buf)
  1746. {
  1747. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1748. return HAL_RX_TLV_GET_TCP_CHKSUM(rx_pkt_tlvs);
  1749. }
  1750. /**
  1751. * hal_rx_get_rx_sequence_be() - Function to retrieve rx sequence number
  1752. * @buf: Network buffer
  1753. *
  1754. * Return: rx sequence number
  1755. */
  1756. static inline
  1757. uint16_t hal_rx_get_rx_sequence_be(uint8_t *buf)
  1758. {
  1759. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1760. return HAL_RX_MPDU_SEQUENCE_NUMBER_GET(rx_pkt_tlvs);
  1761. }
  1762. #ifdef RECEIVE_OFFLOAD
  1763. #ifdef QCA_WIFI_KIWI_V2
  1764. static inline
  1765. uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf)
  1766. {
  1767. /*
  1768. * cumulative l4 checksum is not supported in V2 and
  1769. * cumulative_l4_checksum field is not present
  1770. */
  1771. return 0;
  1772. }
  1773. #else
  1774. /**
  1775. * hal_rx_get_fisa_cumulative_l4_checksum_be() - Retrieve cumulative
  1776. * checksum
  1777. * @buf: buffer pointer
  1778. *
  1779. * Return: cumulative checksum
  1780. */
  1781. static inline
  1782. uint16_t hal_rx_get_fisa_cumulative_l4_checksum_be(uint8_t *buf)
  1783. {
  1784. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1785. return HAL_RX_TLV_GET_FISA_CUMULATIVE_L4_CHECKSUM(rx_pkt_tlvs);
  1786. }
  1787. #endif
  1788. /**
  1789. * hal_rx_get_fisa_cumulative_ip_length_be() - Retrieve cumulative
  1790. * ip length
  1791. * @buf: buffer pointer
  1792. *
  1793. * Return: cumulative length
  1794. */
  1795. static inline
  1796. uint16_t hal_rx_get_fisa_cumulative_ip_length_be(uint8_t *buf)
  1797. {
  1798. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1799. return HAL_RX_TLV_GET_FISA_CUMULATIVE_IP_LENGTH(rx_pkt_tlvs);
  1800. }
  1801. /**
  1802. * hal_rx_get_udp_proto_be() - Retrieve udp proto value
  1803. * @buf: buffer
  1804. *
  1805. * Return: udp proto bit
  1806. */
  1807. static inline
  1808. bool hal_rx_get_udp_proto_be(uint8_t *buf)
  1809. {
  1810. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1811. return HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs);
  1812. }
  1813. #endif
  1814. /**
  1815. * hal_rx_get_flow_agg_continuation_be() - retrieve flow agg
  1816. * continuation
  1817. * @buf: buffer
  1818. *
  1819. * Return: flow agg
  1820. */
  1821. static inline
  1822. bool hal_rx_get_flow_agg_continuation_be(uint8_t *buf)
  1823. {
  1824. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1825. return HAL_RX_TLV_GET_FLOW_AGGR_CONT(rx_pkt_tlvs);
  1826. }
  1827. /**
  1828. * hal_rx_get_flow_agg_count_be()- Retrieve flow agg count
  1829. * @buf: buffer
  1830. *
  1831. * Return: flow agg count
  1832. */
  1833. static inline
  1834. uint8_t hal_rx_get_flow_agg_count_be(uint8_t *buf)
  1835. {
  1836. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1837. return HAL_RX_TLV_GET_FLOW_AGGR_COUNT(rx_pkt_tlvs);
  1838. }
  1839. /**
  1840. * hal_rx_get_fisa_timeout_be() - Retrieve fisa timeout
  1841. * @buf: buffer
  1842. *
  1843. * Return: fisa timeout
  1844. */
  1845. static inline
  1846. bool hal_rx_get_fisa_timeout_be(uint8_t *buf)
  1847. {
  1848. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1849. return HAL_RX_TLV_GET_FISA_TIMEOUT(rx_pkt_tlvs);
  1850. }
  1851. /**
  1852. * hal_rx_mpdu_start_tlv_tag_valid_be () - API to check if RX_MPDU_START
  1853. * tlv tag is valid
  1854. *
  1855. *@rx_tlv_hdr: start address of rx_pkt_tlvs
  1856. *
  1857. * Return: true if RX_MPDU_START is valid, else false.
  1858. */
  1859. static inline uint8_t hal_rx_mpdu_start_tlv_tag_valid_be(void *rx_tlv_hdr)
  1860. {
  1861. struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)rx_tlv_hdr;
  1862. uint32_t tlv_tag;
  1863. tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(&rx_desc->mpdu_start_tlv);
  1864. return tlv_tag == WIFIRX_MPDU_START_E ? true : false;
  1865. }
  1866. /**
  1867. * hal_rx_msdu_end_offset_get_generic() - API to get the
  1868. * msdu_end structure offset rx_pkt_tlv structure
  1869. *
  1870. * NOTE: API returns offset of msdu_end TLV from structure
  1871. * rx_pkt_tlvs
  1872. */
  1873. static inline uint32_t hal_rx_msdu_end_offset_get_generic(void)
  1874. {
  1875. return RX_PKT_TLV_OFFSET(msdu_end_tlv);
  1876. }
  1877. /**
  1878. * hal_rx_mpdu_start_offset_get_generic() - API to get the
  1879. * mpdu_start structure offset rx_pkt_tlv structure
  1880. *
  1881. * NOTE: API returns offset of attn TLV from structure
  1882. * rx_pkt_tlvs
  1883. */
  1884. static inline uint32_t hal_rx_mpdu_start_offset_get_generic(void)
  1885. {
  1886. return RX_PKT_TLV_OFFSET(mpdu_start_tlv);
  1887. }
  1888. #ifndef NO_RX_PKT_HDR_TLV
  1889. static inline uint32_t hal_rx_pkt_tlv_offset_get_generic(void)
  1890. {
  1891. return RX_PKT_TLV_OFFSET(pkt_hdr_tlv);
  1892. }
  1893. #endif
  1894. #ifdef CONFIG_WORD_BASED_TLV
  1895. #define MPDU_START_WMASK 0x074C
  1896. #define MSDU_END_WMASK 0x13FC1
  1897. /**
  1898. * hal_rx_mpdu_start_wmask_get_be() - API to get the mpdu_start_tlv word mask
  1899. *
  1900. * return: Word mask for MPDU start tlv
  1901. */
  1902. static inline uint32_t hal_rx_mpdu_start_wmask_get_be(void)
  1903. {
  1904. return MPDU_START_WMASK;
  1905. }
  1906. /**
  1907. * hal_rx_msdu_end_wmask_get_be() - API to get the msdu_end_tlv word mask
  1908. *
  1909. * return: Word mask for MSDU end tlv
  1910. */
  1911. static inline uint32_t hal_rx_msdu_end_wmask_get_be(void)
  1912. {
  1913. return MSDU_END_WMASK;
  1914. }
  1915. #endif
  1916. #ifdef RECEIVE_OFFLOAD
  1917. static inline int
  1918. hal_rx_tlv_get_offload_info_be(uint8_t *rx_tlv,
  1919. struct hal_offload_info *offload_info)
  1920. {
  1921. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)rx_tlv;
  1922. offload_info->lro_eligible = HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_pkt_tlvs);
  1923. offload_info->flow_id = HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_pkt_tlvs);
  1924. offload_info->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs);
  1925. offload_info->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs);
  1926. if (offload_info->tcp_proto) {
  1927. offload_info->tcp_pure_ack =
  1928. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_pkt_tlvs);
  1929. offload_info->tcp_offset =
  1930. HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs);
  1931. offload_info->tcp_win = HAL_RX_TLV_GET_TCP_WIN(rx_pkt_tlvs);
  1932. offload_info->tcp_seq_num = HAL_RX_TLV_GET_TCP_SEQ(rx_pkt_tlvs);
  1933. offload_info->tcp_ack_num = HAL_RX_TLV_GET_TCP_ACK(rx_pkt_tlvs);
  1934. }
  1935. return 0;
  1936. }
  1937. static inline int hal_rx_get_proto_params_be(uint8_t *buf, void *proto_params)
  1938. {
  1939. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1940. struct hal_proto_params *param =
  1941. (struct hal_proto_params *)proto_params;
  1942. param->tcp_proto = HAL_RX_TLV_GET_TCP_PROTO(rx_pkt_tlvs);
  1943. param->udp_proto = HAL_RX_TLV_GET_UDP_PROTO(rx_pkt_tlvs);
  1944. param->ipv6_proto = HAL_RX_TLV_GET_IPV6(rx_pkt_tlvs);
  1945. return 0;
  1946. }
  1947. static inline int hal_rx_get_l3_l4_offsets_be(uint8_t *buf,
  1948. uint32_t *l3_hdr_offset,
  1949. uint32_t *l4_hdr_offset)
  1950. {
  1951. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1952. *l3_hdr_offset = HAL_RX_TLV_GET_IP_OFFSET(rx_pkt_tlvs);
  1953. *l4_hdr_offset = HAL_RX_TLV_GET_TCP_OFFSET(rx_pkt_tlvs);
  1954. return 0;
  1955. }
  1956. #endif
  1957. /**
  1958. * hal_rx_msdu_start_msdu_len_get_be() - API to get the MSDU length from
  1959. * rx_msdu_start TLV
  1960. * @buf: pointer to the start of RX PKT TLV headers
  1961. *
  1962. * Return: msdu length
  1963. */
  1964. static inline uint32_t hal_rx_msdu_start_msdu_len_get_be(uint8_t *buf)
  1965. {
  1966. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1967. uint32_t msdu_len;
  1968. msdu_len = HAL_RX_TLV_MSDU_LEN_GET(rx_pkt_tlvs);
  1969. return msdu_len;
  1970. }
  1971. /**
  1972. * hal_rx_get_frame_ctrl_field_be() - Function to retrieve frame control field
  1973. * @buf: Network buffer
  1974. *
  1975. * Return: frame control field
  1976. */
  1977. static inline uint16_t hal_rx_get_frame_ctrl_field_be(uint8_t *buf)
  1978. {
  1979. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1980. uint16_t frame_ctrl = 0;
  1981. frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_pkt_tlvs);
  1982. return frame_ctrl;
  1983. }
  1984. /**
  1985. * hal_rx_tlv_get_is_decrypted_be() - API to get the decrypt status of
  1986. * the packet from msdu_end
  1987. * @buf: pointer to the start of RX PKT TLV header
  1988. *
  1989. * Return: uint32_t(decryt status)
  1990. */
  1991. static inline uint32_t hal_rx_tlv_get_is_decrypted_be(uint8_t *buf)
  1992. {
  1993. struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  1994. uint32_t is_decrypt = 0;
  1995. uint32_t decrypt_status;
  1996. decrypt_status = HAL_RX_TLV_DECRYPT_STATUS_GET(rx_pkt_tlvs);
  1997. if (!decrypt_status)
  1998. is_decrypt = 1;
  1999. return is_decrypt;
  2000. }
  2001. #ifdef NO_RX_PKT_HDR_TLV
  2002. /**
  2003. * hal_rx_pkt_hdr_get_be() - API to get 80211 header
  2004. * @buf: start of rx_pkt_tlv
  2005. *
  2006. * If NO_RX_PKT_HDR_TLV is enabled, then this API assume caller gives a raw
  2007. * data, get 80211 header from packet data directly.
  2008. * If NO_RX_PKT_HDR_TLV is disabled, then get it from rx_pkt_hdr_tlv in
  2009. * rx_pkt_tlvs.
  2010. *
  2011. * Return: pointer to start of 80211 header
  2012. */
  2013. static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf)
  2014. {
  2015. return buf + RX_PKT_TLVS_LEN;
  2016. }
  2017. #else
  2018. static inline uint8_t *hal_rx_pkt_hdr_get_be(uint8_t *buf)
  2019. {
  2020. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  2021. return pkt_tlvs->pkt_hdr_tlv.rx_pkt_hdr;
  2022. }
  2023. #endif
  2024. /**
  2025. * hal_rx_tlv_csum_err_get_be() - Get IP and tcp-udp checksum fail flag
  2026. * @rx_tlv_hdr: start address of rx_tlv_hdr
  2027. * @ip_csum_err: buffer to return ip_csum_fail flag
  2028. * @tcp_udp_csum_err: placeholder to return tcp-udp checksum fail flag
  2029. *
  2030. * Return: None
  2031. */
  2032. static inline void
  2033. hal_rx_tlv_csum_err_get_be(uint8_t *rx_tlv_hdr, uint32_t *ip_csum_err,
  2034. uint32_t *tcp_udp_csum_err)
  2035. {
  2036. struct rx_pkt_tlvs *rx_pkt_tlvs =
  2037. (struct rx_pkt_tlvs *)rx_tlv_hdr;
  2038. *ip_csum_err = HAL_RX_TLV_IP_CSUM_FAIL_GET(rx_pkt_tlvs);
  2039. *tcp_udp_csum_err = HAL_RX_TLV_TCP_UDP_CSUM_FAIL_GET(rx_pkt_tlvs);
  2040. }
  2041. static inline
  2042. uint32_t hal_rx_tlv_mpdu_len_err_get_be(void *hw_desc_addr)
  2043. {
  2044. struct rx_pkt_tlvs *rx_pkt_tlvs =
  2045. (struct rx_pkt_tlvs *)hw_desc_addr;
  2046. return HAL_RX_TLV_MPDU_LEN_ERR_GET(rx_pkt_tlvs);
  2047. }
  2048. static inline
  2049. uint32_t hal_rx_tlv_mpdu_fcs_err_get_be(void *hw_desc_addr)
  2050. {
  2051. struct rx_pkt_tlvs *rx_pkt_tlvs =
  2052. (struct rx_pkt_tlvs *)hw_desc_addr;
  2053. return HAL_RX_TLV_MPDU_FCS_ERR_GET(rx_pkt_tlvs);
  2054. }
  2055. /**
  2056. * hal_rx_get_rx_more_frag_bit() - Function to retrieve more fragment bit
  2057. * @buf: Network buffer
  2058. *
  2059. * Return: rx more fragment bit
  2060. */
  2061. static inline
  2062. uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf)
  2063. {
  2064. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  2065. uint16_t frame_ctrl = 0;
  2066. frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(pkt_tlvs) >>
  2067. DOT11_FC1_MORE_FRAG_OFFSET;
  2068. /* more fragment bit if at offset bit 4 */
  2069. return frame_ctrl;
  2070. }
  2071. /**
  2072. * hal_rx_msdu_is_wlan_mcast_generic_be() - Check if the buffer is for
  2073. * multicast address
  2074. * @nbuf: Network buffer
  2075. *
  2076. * Return: flag to indicate whether the nbuf has MC/BC address
  2077. */
  2078. static inline uint32_t hal_rx_msdu_is_wlan_mcast_generic_be(qdf_nbuf_t nbuf)
  2079. {
  2080. uint8_t *buf = qdf_nbuf_data(nbuf);
  2081. return HAL_RX_TLV_IS_MCAST_GET(buf);;
  2082. }
  2083. /**
  2084. * hal_rx_msdu_start_msdu_len_set_be() - API to set the MSDU length
  2085. * from rx_msdu_start TLV
  2086. * @buf: pointer to the start of RX PKT TLV headers
  2087. * @len: msdu length
  2088. *
  2089. * Return: none
  2090. */
  2091. static inline void
  2092. hal_rx_msdu_start_msdu_len_set_be(uint8_t *buf, uint32_t len)
  2093. {
  2094. HAL_RX_TLV_MSDU_LEN_GET(buf) = len;
  2095. }
  2096. /**
  2097. * hal_rx_mpdu_start_mpdu_qos_control_valid_get_be() -
  2098. * Retrieve qos control valid bit from the tlv.
  2099. * @buf: pointer to rx pkt TLV.
  2100. *
  2101. * Return: qos control value.
  2102. */
  2103. static inline uint32_t
  2104. hal_rx_mpdu_start_mpdu_qos_control_valid_get_be(uint8_t *buf)
  2105. {
  2106. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  2107. return HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(pkt_tlvs);
  2108. }
  2109. /**
  2110. * hal_rx_msdu_end_sa_sw_peer_id_get_be() - API to get the
  2111. * sa_sw_peer_id from rx_msdu_end TLV
  2112. * @buf: pointer to the start of RX PKT TLV headers
  2113. *
  2114. * Return: sa_sw_peer_id index
  2115. */
  2116. static inline uint32_t
  2117. hal_rx_msdu_end_sa_sw_peer_id_get_be(uint8_t *buf)
  2118. {
  2119. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  2120. hal_rx_msdu_end_t *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
  2121. return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end);
  2122. }
  2123. #endif /* _HAL_BE_RX_TLV_H_ */