rouleur.c 75 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/of_platform.h>
  15. #include <sound/soc.h>
  16. #include <sound/tlv.h>
  17. #include <soc/soundwire.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include "internal.h"
  21. #include "rouleur.h"
  22. #include <asoc/wcdcal-hwdep.h>
  23. #include "rouleur-registers.h"
  24. #include "pm2250-spmi.h"
  25. #include <asoc/msm-cdc-pinctrl.h>
  26. #include <dt-bindings/sound/audio-codec-port-types.h>
  27. #include <asoc/msm-cdc-supply.h>
  28. #include <linux/power_supply.h>
  29. #define DRV_NAME "rouleur_codec"
  30. #define NUM_SWRS_DT_PARAMS 5
  31. #define ROULEUR_VERSION_1_0 1
  32. #define ROULEUR_VERSION_ENTRY_SIZE 32
  33. #define NUM_ATTEMPTS 5
  34. #define SOC_THRESHOLD_LEVEL 25
  35. #define LOW_SOC_MBIAS_REG_MIN_VOLTAGE 2850000
  36. enum {
  37. CODEC_TX = 0,
  38. CODEC_RX,
  39. };
  40. enum {
  41. ALLOW_VPOS_DISABLE,
  42. HPH_COMP_DELAY,
  43. HPH_PA_DELAY,
  44. AMIC2_BCS_ENABLE,
  45. WCD_SUPPLIES_LPM_MODE,
  46. };
  47. /* TODO: Check on the step values */
  48. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  49. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  50. static int rouleur_handle_post_irq(void *data);
  51. static int rouleur_reset(struct device *dev, int val);
  52. static const struct regmap_irq ROULEUR_IRQs[ROULEUR_NUM_IRQS] = {
  53. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  54. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  55. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  56. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  57. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_SW_DET, 0, 0x10),
  58. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_OCP_INT, 0, 0x20),
  59. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_CNP_INT, 0, 0x40),
  60. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_OCP_INT, 0, 0x80),
  61. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_CNP_INT, 1, 0x01),
  62. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_CNP_INT, 1, 0x02),
  63. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_OCP_INT, 1, 0x04),
  64. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_CNP_INT, 1, 0x08),
  65. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_OCP_INT, 1, 0x10),
  66. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  67. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  68. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  69. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  70. };
  71. static struct regmap_irq_chip rouleur_regmap_irq_chip = {
  72. .name = "rouleur",
  73. .irqs = ROULEUR_IRQs,
  74. .num_irqs = ARRAY_SIZE(ROULEUR_IRQs),
  75. .num_regs = 3,
  76. .status_base = ROULEUR_DIG_SWR_INTR_STATUS_0,
  77. .mask_base = ROULEUR_DIG_SWR_INTR_MASK_0,
  78. .ack_base = ROULEUR_DIG_SWR_INTR_CLEAR_0,
  79. .use_ack = 1,
  80. .type_base = ROULEUR_DIG_SWR_INTR_LEVEL_0,
  81. .runtime_pm = false,
  82. .handle_post_irq = rouleur_handle_post_irq,
  83. .irq_drv_data = NULL,
  84. };
  85. static int rouleur_handle_post_irq(void *data)
  86. {
  87. struct rouleur_priv *rouleur = data;
  88. u32 status1 = 0, status2 = 0, status3 = 0;
  89. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_0, &status1);
  90. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_1, &status2);
  91. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_2, &status3);
  92. rouleur->tx_swr_dev->slave_irq_pending =
  93. ((status1 || status2 || status3) ? true : false);
  94. return IRQ_HANDLED;
  95. }
  96. static int rouleur_init_reg(struct snd_soc_component *component)
  97. {
  98. /* Disable HPH OCP */
  99. snd_soc_component_update_bits(component, ROULEUR_ANA_HPHPA_CNP_CTL_2,
  100. 0x03, 0x00);
  101. /* Enable surge protection */
  102. snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
  103. 0xC0, 0xC0);
  104. /* Disable mic bias pull down */
  105. snd_soc_component_update_bits(component, ROULEUR_ANA_MICBIAS_MICB_1_2_EN,
  106. 0x01, 0x00);
  107. return 0;
  108. }
  109. static int rouleur_set_port_params(struct snd_soc_component *component,
  110. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  111. u8 *ch_mask, u32 *ch_rate,
  112. u8 *port_type, u8 path)
  113. {
  114. int i, j;
  115. u8 num_ports = 0;
  116. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  117. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  118. switch (path) {
  119. case CODEC_RX:
  120. map = &rouleur->rx_port_mapping;
  121. num_ports = rouleur->num_rx_ports;
  122. break;
  123. case CODEC_TX:
  124. map = &rouleur->tx_port_mapping;
  125. num_ports = rouleur->num_tx_ports;
  126. break;
  127. default:
  128. dev_err(component->dev, "%s Invalid path: %d\n",
  129. __func__, path);
  130. return -EINVAL;
  131. }
  132. for (i = 0; i <= num_ports; i++) {
  133. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  134. if ((*map)[i][j].slave_port_type == slv_prt_type)
  135. goto found;
  136. }
  137. }
  138. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  139. __func__, slv_prt_type);
  140. return -EINVAL;
  141. found:
  142. *port_id = i;
  143. *num_ch = (*map)[i][j].num_ch;
  144. *ch_mask = (*map)[i][j].ch_mask;
  145. *ch_rate = (*map)[i][j].ch_rate;
  146. *port_type = (*map)[i][j].master_port_type;
  147. return 0;
  148. }
  149. static int rouleur_parse_port_mapping(struct device *dev,
  150. char *prop, u8 path)
  151. {
  152. u32 *dt_array, map_size, map_length;
  153. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  154. u32 slave_port_type, master_port_type;
  155. u32 i, ch_iter = 0;
  156. int ret = 0;
  157. u8 *num_ports = NULL;
  158. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  159. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  160. switch (path) {
  161. case CODEC_RX:
  162. map = &rouleur->rx_port_mapping;
  163. num_ports = &rouleur->num_rx_ports;
  164. break;
  165. case CODEC_TX:
  166. map = &rouleur->tx_port_mapping;
  167. num_ports = &rouleur->num_tx_ports;
  168. break;
  169. default:
  170. dev_err(dev, "%s Invalid path: %d\n",
  171. __func__, path);
  172. return -EINVAL;
  173. }
  174. if (!of_find_property(dev->of_node, prop,
  175. &map_size)) {
  176. dev_err(dev, "missing port mapping prop %s\n", prop);
  177. ret = -EINVAL;
  178. goto err;
  179. }
  180. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  181. dt_array = kzalloc(map_size, GFP_KERNEL);
  182. if (!dt_array) {
  183. ret = -ENOMEM;
  184. goto err;
  185. }
  186. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  187. NUM_SWRS_DT_PARAMS * map_length);
  188. if (ret) {
  189. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  190. __func__, prop);
  191. ret = -EINVAL;
  192. goto err_pdata_fail;
  193. }
  194. for (i = 0; i < map_length; i++) {
  195. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  196. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  197. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  198. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  199. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  200. if (port_num != old_port_num)
  201. ch_iter = 0;
  202. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  203. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  204. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  205. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  206. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  207. old_port_num = port_num;
  208. }
  209. *num_ports = port_num;
  210. err_pdata_fail:
  211. kfree(dt_array);
  212. err:
  213. return ret;
  214. }
  215. static int rouleur_tx_connect_port(struct snd_soc_component *component,
  216. u8 slv_port_type, u8 enable)
  217. {
  218. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  219. u8 port_id;
  220. u8 num_ch;
  221. u8 ch_mask;
  222. u32 ch_rate;
  223. u8 port_type;
  224. u8 num_port = 1;
  225. int ret = 0;
  226. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  227. &num_ch, &ch_mask, &ch_rate,
  228. &port_type, CODEC_TX);
  229. if (ret) {
  230. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  231. __func__, ret);
  232. return ret;
  233. }
  234. if (enable)
  235. ret = swr_connect_port(rouleur->tx_swr_dev, &port_id,
  236. num_port, &ch_mask, &ch_rate,
  237. &num_ch, &port_type);
  238. else
  239. ret = swr_disconnect_port(rouleur->tx_swr_dev, &port_id,
  240. num_port, &ch_mask, &port_type);
  241. return ret;
  242. }
  243. static int rouleur_rx_connect_port(struct snd_soc_component *component,
  244. u8 slv_port_type, u8 enable)
  245. {
  246. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  247. u8 port_id;
  248. u8 num_ch;
  249. u8 ch_mask;
  250. u32 ch_rate;
  251. u8 port_type;
  252. u8 num_port = 1;
  253. int ret = 0;
  254. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  255. &num_ch, &ch_mask, &ch_rate,
  256. &port_type, CODEC_RX);
  257. if (ret) {
  258. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  259. __func__, ret);
  260. return ret;
  261. }
  262. if (enable)
  263. ret = swr_connect_port(rouleur->rx_swr_dev, &port_id,
  264. num_port, &ch_mask, &ch_rate,
  265. &num_ch, &port_type);
  266. else
  267. ret = swr_disconnect_port(rouleur->rx_swr_dev, &port_id,
  268. num_port, &ch_mask, &port_type);
  269. return ret;
  270. }
  271. int rouleur_global_mbias_enable(struct snd_soc_component *component)
  272. {
  273. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  274. mutex_lock(&rouleur->main_bias_lock);
  275. if (rouleur->mbias_cnt == 0) {
  276. snd_soc_component_update_bits(component,
  277. ROULEUR_ANA_MBIAS_EN, 0x20, 0x20);
  278. snd_soc_component_update_bits(component,
  279. ROULEUR_ANA_MBIAS_EN, 0x10, 0x10);
  280. usleep_range(1000, 1100);
  281. }
  282. rouleur->mbias_cnt++;
  283. mutex_unlock(&rouleur->main_bias_lock);
  284. return 0;
  285. }
  286. int rouleur_global_mbias_disable(struct snd_soc_component *component)
  287. {
  288. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  289. mutex_lock(&rouleur->main_bias_lock);
  290. if (rouleur->mbias_cnt == 0) {
  291. dev_dbg(rouleur->dev, "%s:mbias already disabled\n", __func__);
  292. mutex_unlock(&rouleur->main_bias_lock);
  293. return 0;
  294. }
  295. rouleur->mbias_cnt--;
  296. if (rouleur->mbias_cnt == 0) {
  297. snd_soc_component_update_bits(component,
  298. ROULEUR_ANA_MBIAS_EN, 0x10, 0x00);
  299. snd_soc_component_update_bits(component,
  300. ROULEUR_ANA_MBIAS_EN, 0x20, 0x00);
  301. }
  302. mutex_unlock(&rouleur->main_bias_lock);
  303. return 0;
  304. }
  305. static int rouleur_rx_clk_enable(struct snd_soc_component *component)
  306. {
  307. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  308. mutex_lock(&rouleur->rx_clk_lock);
  309. if (rouleur->rx_clk_cnt == 0) {
  310. snd_soc_component_update_bits(component,
  311. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x10);
  312. snd_soc_component_update_bits(component,
  313. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x20);
  314. usleep_range(5000, 5100);
  315. rouleur_global_mbias_enable(component);
  316. snd_soc_component_update_bits(component,
  317. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x11);
  318. snd_soc_component_update_bits(component,
  319. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
  320. snd_soc_component_update_bits(component,
  321. ROULEUR_ANA_NCP_VCTRL, 0x07, 0x06);
  322. snd_soc_component_update_bits(component,
  323. ROULEUR_ANA_NCP_EN, 0x01, 0x01);
  324. usleep_range(500, 510);
  325. }
  326. rouleur->rx_clk_cnt++;
  327. mutex_unlock(&rouleur->rx_clk_lock);
  328. return 0;
  329. }
  330. static int rouleur_rx_clk_disable(struct snd_soc_component *component)
  331. {
  332. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  333. mutex_lock(&rouleur->rx_clk_lock);
  334. if (rouleur->rx_clk_cnt == 0) {
  335. dev_dbg(rouleur->dev, "%s:clk already disabled\n", __func__);
  336. mutex_unlock(&rouleur->rx_clk_lock);
  337. return 0;
  338. }
  339. rouleur->rx_clk_cnt--;
  340. if (rouleur->rx_clk_cnt == 0) {
  341. snd_soc_component_update_bits(component,
  342. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
  343. snd_soc_component_update_bits(component,
  344. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x00);
  345. snd_soc_component_update_bits(component,
  346. ROULEUR_ANA_NCP_EN, 0x01, 0x00);
  347. snd_soc_component_update_bits(component,
  348. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
  349. snd_soc_component_update_bits(component,
  350. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
  351. rouleur_global_mbias_disable(component);
  352. }
  353. mutex_unlock(&rouleur->rx_clk_lock);
  354. return 0;
  355. }
  356. /*
  357. * rouleur_soc_get_mbhc: get rouleur_mbhc handle of corresponding component
  358. * @component: handle to snd_soc_component *
  359. *
  360. * return rouleur_mbhc handle or error code in case of failure
  361. */
  362. struct rouleur_mbhc *rouleur_soc_get_mbhc(struct snd_soc_component *component)
  363. {
  364. struct rouleur_priv *rouleur;
  365. if (!component) {
  366. pr_err("%s: Invalid params, NULL component\n", __func__);
  367. return NULL;
  368. }
  369. rouleur = snd_soc_component_get_drvdata(component);
  370. if (!rouleur) {
  371. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  372. return NULL;
  373. }
  374. return rouleur->mbhc;
  375. }
  376. EXPORT_SYMBOL(rouleur_soc_get_mbhc);
  377. static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  378. struct snd_kcontrol *kcontrol,
  379. int event)
  380. {
  381. struct snd_soc_component *component =
  382. snd_soc_dapm_to_component(w->dapm);
  383. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  384. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  385. w->name, event);
  386. switch (event) {
  387. case SND_SOC_DAPM_PRE_PMU:
  388. rouleur_rx_clk_enable(component);
  389. snd_soc_component_update_bits(component,
  390. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  391. 0x02, 0x02);
  392. snd_soc_component_update_bits(component,
  393. ROULEUR_SWR_HPHPA_HD2,
  394. 0x38, 0x38);
  395. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  396. break;
  397. case SND_SOC_DAPM_POST_PMU:
  398. if (rouleur->comp1_enable) {
  399. snd_soc_component_update_bits(component,
  400. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  401. 0x02, 0x02);
  402. if (rouleur->comp2_enable)
  403. snd_soc_component_update_bits(component,
  404. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  405. 0x01, 0x01);
  406. /*
  407. * 5ms sleep is required after COMP is enabled as per
  408. * HW requirement
  409. */
  410. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  411. usleep_range(5000, 5100);
  412. clear_bit(HPH_COMP_DELAY,
  413. &rouleur->status_mask);
  414. }
  415. } else {
  416. snd_soc_component_update_bits(component,
  417. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  418. 0x02, 0x00);
  419. }
  420. snd_soc_component_update_bits(component,
  421. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  422. 0x80, 0x00);
  423. snd_soc_component_update_bits(component,
  424. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  425. 0x04, 0x04);
  426. snd_soc_component_update_bits(component,
  427. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x01, 0x01);
  428. break;
  429. case SND_SOC_DAPM_POST_PMD:
  430. snd_soc_component_update_bits(component,
  431. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  432. 0x01, 0x00);
  433. snd_soc_component_update_bits(component,
  434. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  435. 0x04, 0x00);
  436. snd_soc_component_update_bits(component,
  437. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  438. 0x80, 0x80);
  439. if (rouleur->comp1_enable)
  440. snd_soc_component_update_bits(component,
  441. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  442. 0x02, 0x00);
  443. break;
  444. }
  445. return 0;
  446. }
  447. static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  448. struct snd_kcontrol *kcontrol,
  449. int event)
  450. {
  451. struct snd_soc_component *component =
  452. snd_soc_dapm_to_component(w->dapm);
  453. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  454. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  455. w->name, event);
  456. switch (event) {
  457. case SND_SOC_DAPM_PRE_PMU:
  458. rouleur_rx_clk_enable(component);
  459. snd_soc_component_update_bits(component,
  460. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  461. 0x02, 0x02);
  462. snd_soc_component_update_bits(component,
  463. ROULEUR_SWR_HPHPA_HD2,
  464. 0x07, 0x07);
  465. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  466. break;
  467. case SND_SOC_DAPM_POST_PMU:
  468. if (rouleur->comp2_enable) {
  469. snd_soc_component_update_bits(component,
  470. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  471. 0x01, 0x01);
  472. if (rouleur->comp1_enable)
  473. snd_soc_component_update_bits(component,
  474. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  475. 0x02, 0x02);
  476. /*
  477. * 5ms sleep is required after COMP is enabled as per
  478. * HW requirement
  479. */
  480. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  481. usleep_range(5000, 5100);
  482. clear_bit(HPH_COMP_DELAY,
  483. &rouleur->status_mask);
  484. }
  485. } else {
  486. snd_soc_component_update_bits(component,
  487. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  488. 0x01, 0x00);
  489. }
  490. snd_soc_component_update_bits(component,
  491. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  492. 0x80, 0x00);
  493. snd_soc_component_update_bits(component,
  494. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  495. 0x08, 0x08);
  496. snd_soc_component_update_bits(component,
  497. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x02);
  498. break;
  499. case SND_SOC_DAPM_POST_PMD:
  500. snd_soc_component_update_bits(component,
  501. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
  502. snd_soc_component_update_bits(component,
  503. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  504. 0x08, 0x00);
  505. snd_soc_component_update_bits(component,
  506. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  507. 0x80, 0x80);
  508. if (rouleur->comp2_enable)
  509. snd_soc_component_update_bits(component,
  510. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  511. 0x01, 0x00);
  512. break;
  513. }
  514. return 0;
  515. }
  516. static int rouleur_codec_ear_lo_dac_event(struct snd_soc_dapm_widget *w,
  517. struct snd_kcontrol *kcontrol,
  518. int event)
  519. {
  520. struct snd_soc_component *component =
  521. snd_soc_dapm_to_component(w->dapm);
  522. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  523. w->name, event);
  524. switch (event) {
  525. case SND_SOC_DAPM_PRE_PMU:
  526. rouleur_rx_clk_enable(component);
  527. snd_soc_component_update_bits(component,
  528. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  529. 0x80, 0x00);
  530. snd_soc_component_update_bits(component,
  531. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  532. 0x01, 0x01);
  533. snd_soc_component_update_bits(component,
  534. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  535. 0x04, 0x04);
  536. break;
  537. case SND_SOC_DAPM_POST_PMD:
  538. snd_soc_component_update_bits(component,
  539. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  540. 0x01, 0x00);
  541. snd_soc_component_update_bits(component,
  542. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  543. 0x04, 0x00);
  544. snd_soc_component_update_bits(component,
  545. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  546. 0x80, 0x80);
  547. break;
  548. };
  549. return 0;
  550. }
  551. static int rouleur_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  552. struct snd_kcontrol *kcontrol,
  553. int event)
  554. {
  555. struct snd_soc_component *component =
  556. snd_soc_dapm_to_component(w->dapm);
  557. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  558. int ret = 0;
  559. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  560. w->name, event);
  561. switch (event) {
  562. case SND_SOC_DAPM_PRE_PMU:
  563. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  564. rouleur->rx_swr_dev->dev_num,
  565. true);
  566. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  567. usleep_range(200, 210);
  568. snd_soc_component_update_bits(component,
  569. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  570. 0x03, 0x03);
  571. break;
  572. case SND_SOC_DAPM_POST_PMU:
  573. /*
  574. * 5ms sleep is required after PA is enabled as per
  575. * HW requirement.
  576. */
  577. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  578. usleep_range(5000, 5100);
  579. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  580. }
  581. if (rouleur->update_wcd_event)
  582. rouleur->update_wcd_event(rouleur->handle,
  583. WCD_BOLERO_EVT_RX_MUTE,
  584. (WCD_RX2 << 0x10));
  585. wcd_enable_irq(&rouleur->irq_info,
  586. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  587. break;
  588. case SND_SOC_DAPM_PRE_PMD:
  589. wcd_disable_irq(&rouleur->irq_info,
  590. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  591. if (rouleur->update_wcd_event)
  592. rouleur->update_wcd_event(rouleur->handle,
  593. WCD_BOLERO_EVT_RX_MUTE,
  594. (WCD_RX2 << 0x10 | 0x1));
  595. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  596. WCD_EVENT_PRE_HPHR_PA_OFF,
  597. &rouleur->mbhc->wcd_mbhc);
  598. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  599. break;
  600. case SND_SOC_DAPM_POST_PMD:
  601. /*
  602. * 5ms sleep is required after PA is disabled as per
  603. * HW requirement.
  604. */
  605. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  606. usleep_range(5000, 5100);
  607. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  608. }
  609. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  610. WCD_EVENT_POST_HPHR_PA_OFF,
  611. &rouleur->mbhc->wcd_mbhc);
  612. snd_soc_component_update_bits(component,
  613. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  614. 0x03, 0x00);
  615. break;
  616. };
  617. return ret;
  618. }
  619. static int rouleur_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  620. struct snd_kcontrol *kcontrol,
  621. int event)
  622. {
  623. struct snd_soc_component *component =
  624. snd_soc_dapm_to_component(w->dapm);
  625. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  626. int ret = 0;
  627. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  628. w->name, event);
  629. switch (event) {
  630. case SND_SOC_DAPM_PRE_PMU:
  631. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  632. rouleur->rx_swr_dev->dev_num,
  633. true);
  634. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  635. usleep_range(200, 210);
  636. snd_soc_component_update_bits(component,
  637. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  638. 0x03, 0x03);
  639. break;
  640. case SND_SOC_DAPM_POST_PMU:
  641. /*
  642. * 5ms sleep is required after PA is enabled as per
  643. * HW requirement.
  644. */
  645. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  646. usleep_range(5000, 5100);
  647. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  648. }
  649. if (rouleur->update_wcd_event)
  650. rouleur->update_wcd_event(rouleur->handle,
  651. WCD_BOLERO_EVT_RX_MUTE,
  652. (WCD_RX1 << 0x10));
  653. wcd_enable_irq(&rouleur->irq_info,
  654. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  655. break;
  656. case SND_SOC_DAPM_PRE_PMD:
  657. wcd_disable_irq(&rouleur->irq_info,
  658. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  659. if (rouleur->update_wcd_event)
  660. rouleur->update_wcd_event(rouleur->handle,
  661. WCD_BOLERO_EVT_RX_MUTE,
  662. (WCD_RX1 << 0x10 | 0x1));
  663. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  664. WCD_EVENT_PRE_HPHL_PA_OFF,
  665. &rouleur->mbhc->wcd_mbhc);
  666. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  667. break;
  668. case SND_SOC_DAPM_POST_PMD:
  669. /*
  670. * 5ms sleep is required after PA is disabled as per
  671. * HW requirement.
  672. */
  673. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  674. usleep_range(5000, 5100);
  675. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  676. }
  677. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  678. WCD_EVENT_POST_HPHL_PA_OFF,
  679. &rouleur->mbhc->wcd_mbhc);
  680. snd_soc_component_update_bits(component,
  681. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  682. 0x03, 0x00);
  683. break;
  684. };
  685. return ret;
  686. }
  687. static int rouleur_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  688. struct snd_kcontrol *kcontrol,
  689. int event)
  690. {
  691. struct snd_soc_component *component =
  692. snd_soc_dapm_to_component(w->dapm);
  693. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  694. int ret = 0;
  695. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  696. w->name, event);
  697. switch (event) {
  698. case SND_SOC_DAPM_PRE_PMU:
  699. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  700. rouleur->rx_swr_dev->dev_num,
  701. true);
  702. snd_soc_component_update_bits(component,
  703. ROULEUR_ANA_COMBOPA_CTL_5,
  704. 0x04, 0x00);
  705. usleep_range(1000, 1010);
  706. snd_soc_component_update_bits(component,
  707. ROULEUR_ANA_COMBOPA_CTL_4,
  708. 0x0F, 0x0F);
  709. usleep_range(1000, 1010);
  710. snd_soc_component_update_bits(component,
  711. ROULEUR_ANA_COMBOPA_CTL,
  712. 0x40, 0x00);
  713. snd_soc_component_update_bits(component,
  714. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  715. 0x03, 0x03);
  716. break;
  717. case SND_SOC_DAPM_POST_PMU:
  718. usleep_range(5000, 5100);
  719. snd_soc_component_update_bits(component,
  720. ROULEUR_ANA_COMBOPA_CTL_4,
  721. 0x0F, 0x04);
  722. if (rouleur->update_wcd_event)
  723. rouleur->update_wcd_event(rouleur->handle,
  724. WCD_BOLERO_EVT_RX_MUTE,
  725. (WCD_RX1 << 0x10));
  726. wcd_enable_irq(&rouleur->irq_info,
  727. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  728. break;
  729. case SND_SOC_DAPM_PRE_PMD:
  730. wcd_disable_irq(&rouleur->irq_info,
  731. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  732. if (rouleur->update_wcd_event)
  733. rouleur->update_wcd_event(rouleur->handle,
  734. WCD_BOLERO_EVT_RX_MUTE,
  735. (WCD_RX1 << 0x10 | 0x1));
  736. break;
  737. case SND_SOC_DAPM_POST_PMD:
  738. usleep_range(5000, 5100);
  739. snd_soc_component_update_bits(component,
  740. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  741. 0x03, 0x00);
  742. };
  743. return ret;
  744. }
  745. static int rouleur_codec_enable_lo_pa(struct snd_soc_dapm_widget *w,
  746. struct snd_kcontrol *kcontrol,
  747. int event)
  748. {
  749. struct snd_soc_component *component =
  750. snd_soc_dapm_to_component(w->dapm);
  751. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  752. int ret = 0;
  753. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  754. w->name, event);
  755. switch (event) {
  756. case SND_SOC_DAPM_PRE_PMU:
  757. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  758. rouleur->rx_swr_dev->dev_num,
  759. true);
  760. snd_soc_component_update_bits(component,
  761. ROULEUR_ANA_COMBOPA_CTL_5,
  762. 0x04, 0x00);
  763. usleep_range(1000, 1010);
  764. snd_soc_component_update_bits(component,
  765. ROULEUR_ANA_COMBOPA_CTL_4,
  766. 0x0F, 0x0F);
  767. usleep_range(1000, 1010);
  768. snd_soc_component_update_bits(component,
  769. ROULEUR_ANA_COMBOPA_CTL,
  770. 0x40, 0x40);
  771. snd_soc_component_update_bits(component,
  772. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  773. 0x03, 0x03);
  774. break;
  775. case SND_SOC_DAPM_POST_PMU:
  776. usleep_range(5000, 5100);
  777. snd_soc_component_update_bits(component,
  778. ROULEUR_ANA_COMBOPA_CTL_4,
  779. 0x0F, 0x04);
  780. if (rouleur->update_wcd_event)
  781. rouleur->update_wcd_event(rouleur->handle,
  782. WCD_BOLERO_EVT_RX_MUTE,
  783. (WCD_RX1 << 0x10));
  784. wcd_enable_irq(&rouleur->irq_info,
  785. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  786. break;
  787. case SND_SOC_DAPM_PRE_PMD:
  788. wcd_disable_irq(&rouleur->irq_info,
  789. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  790. if (rouleur->update_wcd_event)
  791. rouleur->update_wcd_event(rouleur->handle,
  792. WCD_BOLERO_EVT_RX_MUTE,
  793. (WCD_RX1 << 0x10 | 0x1));
  794. break;
  795. case SND_SOC_DAPM_POST_PMD:
  796. snd_soc_component_update_bits(component,
  797. ROULEUR_ANA_COMBOPA_CTL,
  798. 0x40, 0x00);
  799. usleep_range(5000, 5100);
  800. snd_soc_component_update_bits(component,
  801. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  802. 0x03, 0x00);
  803. };
  804. return ret;
  805. }
  806. static int rouleur_enable_rx1(struct snd_soc_dapm_widget *w,
  807. struct snd_kcontrol *kcontrol,
  808. int event)
  809. {
  810. struct snd_soc_component *component =
  811. snd_soc_dapm_to_component(w->dapm);
  812. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  813. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  814. w->name, event);
  815. switch (event) {
  816. case SND_SOC_DAPM_PRE_PMU:
  817. rouleur_rx_connect_port(component, HPH_L, true);
  818. if (rouleur->comp1_enable)
  819. rouleur_rx_connect_port(component, COMP_L, true);
  820. break;
  821. case SND_SOC_DAPM_POST_PMD:
  822. rouleur_rx_connect_port(component, HPH_L, false);
  823. if (rouleur->comp1_enable)
  824. rouleur_rx_connect_port(component, COMP_L, false);
  825. rouleur_rx_clk_disable(component);
  826. break;
  827. };
  828. return 0;
  829. }
  830. static int rouleur_enable_rx2(struct snd_soc_dapm_widget *w,
  831. struct snd_kcontrol *kcontrol, int event)
  832. {
  833. struct snd_soc_component *component =
  834. snd_soc_dapm_to_component(w->dapm);
  835. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  836. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  837. w->name, event);
  838. switch (event) {
  839. case SND_SOC_DAPM_PRE_PMU:
  840. rouleur_rx_connect_port(component, HPH_R, true);
  841. if (rouleur->comp2_enable)
  842. rouleur_rx_connect_port(component, COMP_R, true);
  843. break;
  844. case SND_SOC_DAPM_POST_PMD:
  845. rouleur_rx_connect_port(component, HPH_R, false);
  846. if (rouleur->comp2_enable)
  847. rouleur_rx_connect_port(component, COMP_R, false);
  848. rouleur_rx_clk_disable(component);
  849. break;
  850. };
  851. return 0;
  852. }
  853. static int rouleur_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  854. struct snd_kcontrol *kcontrol,
  855. int event)
  856. {
  857. struct snd_soc_component *component =
  858. snd_soc_dapm_to_component(w->dapm);
  859. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  860. u16 dmic_clk_reg;
  861. s32 *dmic_clk_cnt;
  862. unsigned int dmic;
  863. char *wname;
  864. int ret = 0;
  865. wname = strpbrk(w->name, "01");
  866. if (!wname) {
  867. dev_err(component->dev, "%s: widget not found\n", __func__);
  868. return -EINVAL;
  869. }
  870. ret = kstrtouint(wname, 10, &dmic);
  871. if (ret < 0) {
  872. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  873. __func__);
  874. return -EINVAL;
  875. }
  876. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  877. w->name, event);
  878. switch (dmic) {
  879. case 0:
  880. case 1:
  881. dmic_clk_cnt = &(rouleur->dmic_0_1_clk_cnt);
  882. dmic_clk_reg = ROULEUR_DIG_SWR_CDC_DMIC1_CTL;
  883. break;
  884. default:
  885. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  886. __func__);
  887. return -EINVAL;
  888. };
  889. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  890. __func__, event, dmic, *dmic_clk_cnt);
  891. switch (event) {
  892. case SND_SOC_DAPM_PRE_PMU:
  893. snd_soc_component_update_bits(component,
  894. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x00);
  895. snd_soc_component_update_bits(component,
  896. dmic_clk_reg, 0x08, 0x08);
  897. rouleur_tx_connect_port(component, DMIC0 + (w->shift), true);
  898. break;
  899. case SND_SOC_DAPM_POST_PMD:
  900. rouleur_tx_connect_port(component, DMIC0 + (w->shift), false);
  901. snd_soc_component_update_bits(component,
  902. dmic_clk_reg, 0x08, 0x00);
  903. snd_soc_component_update_bits(component,
  904. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x02);
  905. break;
  906. };
  907. return 0;
  908. }
  909. static int rouleur_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  910. struct snd_kcontrol *kcontrol,
  911. int event)
  912. {
  913. struct snd_soc_component *component =
  914. snd_soc_dapm_to_component(w->dapm);
  915. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  916. int ret = 0;
  917. switch (event) {
  918. case SND_SOC_DAPM_PRE_PMU:
  919. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  920. rouleur->tx_swr_dev->dev_num,
  921. true);
  922. break;
  923. case SND_SOC_DAPM_POST_PMD:
  924. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  925. rouleur->tx_swr_dev->dev_num,
  926. false);
  927. break;
  928. };
  929. return ret;
  930. }
  931. static int rouleur_codec_enable_adc(struct snd_soc_dapm_widget *w,
  932. struct snd_kcontrol *kcontrol,
  933. int event)
  934. {
  935. struct snd_soc_component *component =
  936. snd_soc_dapm_to_component(w->dapm);
  937. struct rouleur_priv *rouleur =
  938. snd_soc_component_get_drvdata(component);
  939. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  940. w->name, event);
  941. switch (event) {
  942. case SND_SOC_DAPM_PRE_PMU:
  943. /* Enable BCS for Headset mic */
  944. if (w->shift == 1 && !(snd_soc_component_read32(component,
  945. ROULEUR_ANA_TX_AMIC2) & 0x10)) {
  946. rouleur_tx_connect_port(component, MBHC, true);
  947. set_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  948. }
  949. rouleur_tx_connect_port(component, ADC1 + (w->shift), true);
  950. rouleur_global_mbias_enable(component);
  951. if (w->shift)
  952. snd_soc_component_update_bits(component,
  953. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  954. 0x30, 0x30);
  955. else
  956. snd_soc_component_update_bits(component,
  957. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  958. 0x03, 0x03);
  959. break;
  960. case SND_SOC_DAPM_POST_PMD:
  961. rouleur_tx_connect_port(component, ADC1 + (w->shift), false);
  962. if (w->shift == 1 &&
  963. test_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask)) {
  964. rouleur_tx_connect_port(component, MBHC, false);
  965. clear_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  966. }
  967. if (w->shift)
  968. snd_soc_component_update_bits(component,
  969. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  970. 0x30, 0x00);
  971. else
  972. snd_soc_component_update_bits(component,
  973. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  974. 0x03, 0x00);
  975. rouleur_global_mbias_disable(component);
  976. break;
  977. };
  978. return 0;
  979. }
  980. /*
  981. * rouleur_get_micb_vout_ctl_val: converts micbias from volts to register value
  982. * @micb_mv: micbias in mv
  983. *
  984. * return register value converted
  985. */
  986. int rouleur_get_micb_vout_ctl_val(u32 micb_mv)
  987. {
  988. /* min micbias voltage is 1.6V and maximum is 2.85V */
  989. if (micb_mv < 1600 || micb_mv > 2850) {
  990. pr_err("%s: unsupported micbias voltage\n", __func__);
  991. return -EINVAL;
  992. }
  993. return (micb_mv - 1600) / 50;
  994. }
  995. EXPORT_SYMBOL(rouleur_get_micb_vout_ctl_val);
  996. /*
  997. * rouleur_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  998. * @component: handle to snd_soc_component *
  999. * @req_volt: micbias voltage to be set
  1000. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  1001. *
  1002. * return 0 if adjustment is success or error code in case of failure
  1003. */
  1004. int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  1005. int req_volt, int micb_num)
  1006. {
  1007. struct rouleur_priv *rouleur =
  1008. snd_soc_component_get_drvdata(component);
  1009. int cur_vout_ctl, req_vout_ctl;
  1010. int micb_reg, micb_val, micb_en;
  1011. int ret = 0;
  1012. int pullup_mask;
  1013. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1014. switch (micb_num) {
  1015. case MIC_BIAS_1:
  1016. micb_val = snd_soc_component_read32(component, micb_reg);
  1017. micb_en = (micb_val & 0x40) >> 6;
  1018. pullup_mask = 0x20;
  1019. break;
  1020. case MIC_BIAS_2:
  1021. micb_val = snd_soc_component_read32(component, micb_reg);
  1022. micb_en = (micb_val & 0x04) >> 2;
  1023. pullup_mask = 0x02;
  1024. break;
  1025. case MIC_BIAS_3:
  1026. default:
  1027. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1028. __func__, micb_num);
  1029. return -EINVAL;
  1030. }
  1031. mutex_lock(&rouleur->micb_lock);
  1032. /*
  1033. * If requested micbias voltage is same as current micbias
  1034. * voltage, then just return. Otherwise, adjust voltage as
  1035. * per requested value. If micbias is already enabled, then
  1036. * to avoid slow micbias ramp-up or down enable pull-up
  1037. * momentarily, change the micbias value and then re-enable
  1038. * micbias.
  1039. */
  1040. cur_vout_ctl = (snd_soc_component_read32(component,
  1041. ROULEUR_ANA_MICBIAS_LDO_1_SETTING)) & 0xF8;
  1042. cur_vout_ctl = cur_vout_ctl >> 3;
  1043. req_vout_ctl = rouleur_get_micb_vout_ctl_val(req_volt);
  1044. if (req_vout_ctl < 0) {
  1045. ret = -EINVAL;
  1046. goto exit;
  1047. }
  1048. if (cur_vout_ctl == req_vout_ctl) {
  1049. ret = 0;
  1050. goto exit;
  1051. }
  1052. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  1053. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  1054. req_volt, micb_en);
  1055. if (micb_en == 0x1)
  1056. snd_soc_component_update_bits(component, micb_reg, pullup_mask,
  1057. pullup_mask);
  1058. snd_soc_component_update_bits(component,
  1059. ROULEUR_ANA_MICBIAS_LDO_1_SETTING, 0xF8, req_vout_ctl << 3);
  1060. if (micb_en == 0x1) {
  1061. snd_soc_component_update_bits(component, micb_reg,
  1062. pullup_mask, 0x00);
  1063. /*
  1064. * Add 2ms delay as per HW requirement after enabling
  1065. * micbias
  1066. */
  1067. usleep_range(2000, 2100);
  1068. }
  1069. exit:
  1070. mutex_unlock(&rouleur->micb_lock);
  1071. return ret;
  1072. }
  1073. EXPORT_SYMBOL(rouleur_mbhc_micb_adjust_voltage);
  1074. int rouleur_micbias_control(struct snd_soc_component *component,
  1075. int micb_num, int req, bool is_dapm)
  1076. {
  1077. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1078. int micb_index = micb_num - 1;
  1079. u16 micb_reg;
  1080. int pre_off_event = 0, post_off_event = 0;
  1081. int post_on_event = 0, post_dapm_off = 0;
  1082. int post_dapm_on = 0;
  1083. u8 pullup_mask = 0, enable_mask = 0;
  1084. int ret = 0;
  1085. if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
  1086. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1087. __func__, micb_index);
  1088. return -EINVAL;
  1089. }
  1090. switch (micb_num) {
  1091. case MIC_BIAS_1:
  1092. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1093. pullup_mask = 0x20;
  1094. enable_mask = 0x40;
  1095. break;
  1096. case MIC_BIAS_2:
  1097. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1098. pullup_mask = 0x02;
  1099. enable_mask = 0x04;
  1100. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1101. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1102. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1103. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1104. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1105. break;
  1106. case MIC_BIAS_3:
  1107. micb_reg = ROULEUR_ANA_MICBIAS_MICB_3_EN;
  1108. pullup_mask = 0x02;
  1109. break;
  1110. default:
  1111. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1112. __func__, micb_num);
  1113. return -EINVAL;
  1114. };
  1115. mutex_lock(&rouleur->micb_lock);
  1116. switch (req) {
  1117. case MICB_PULLUP_ENABLE:
  1118. if (!rouleur->dev_up) {
  1119. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1120. __func__, req);
  1121. ret = -ENODEV;
  1122. goto done;
  1123. }
  1124. rouleur->pullup_ref[micb_index]++;
  1125. if ((rouleur->pullup_ref[micb_index] == 1) &&
  1126. (rouleur->micb_ref[micb_index] == 0))
  1127. snd_soc_component_update_bits(component, micb_reg,
  1128. pullup_mask, pullup_mask);
  1129. break;
  1130. case MICB_PULLUP_DISABLE:
  1131. if (!rouleur->dev_up) {
  1132. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1133. __func__, req);
  1134. ret = -ENODEV;
  1135. goto done;
  1136. }
  1137. if (rouleur->pullup_ref[micb_index] > 0)
  1138. rouleur->pullup_ref[micb_index]--;
  1139. if ((rouleur->pullup_ref[micb_index] == 0) &&
  1140. (rouleur->micb_ref[micb_index] == 0))
  1141. snd_soc_component_update_bits(component, micb_reg,
  1142. pullup_mask, 0x00);
  1143. break;
  1144. case MICB_ENABLE:
  1145. if (!rouleur->dev_up) {
  1146. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1147. __func__, req);
  1148. ret = -ENODEV;
  1149. goto done;
  1150. }
  1151. rouleur->micb_ref[micb_index]++;
  1152. if (rouleur->micb_ref[micb_index] == 1) {
  1153. rouleur_global_mbias_enable(component);
  1154. snd_soc_component_update_bits(component,
  1155. micb_reg, enable_mask, enable_mask);
  1156. if (post_on_event)
  1157. blocking_notifier_call_chain(
  1158. &rouleur->mbhc->notifier, post_on_event,
  1159. &rouleur->mbhc->wcd_mbhc);
  1160. }
  1161. if (is_dapm && post_dapm_on && rouleur->mbhc)
  1162. blocking_notifier_call_chain(
  1163. &rouleur->mbhc->notifier, post_dapm_on,
  1164. &rouleur->mbhc->wcd_mbhc);
  1165. break;
  1166. case MICB_DISABLE:
  1167. if (rouleur->micb_ref[micb_index] > 0)
  1168. rouleur->micb_ref[micb_index]--;
  1169. if (!rouleur->dev_up) {
  1170. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1171. __func__, req);
  1172. ret = -ENODEV;
  1173. goto done;
  1174. }
  1175. if ((rouleur->micb_ref[micb_index] == 0) &&
  1176. (rouleur->pullup_ref[micb_index] > 0)) {
  1177. snd_soc_component_update_bits(component, micb_reg,
  1178. pullup_mask, pullup_mask);
  1179. snd_soc_component_update_bits(component, micb_reg,
  1180. enable_mask, 0x00);
  1181. rouleur_global_mbias_disable(component);
  1182. } else if ((rouleur->micb_ref[micb_index] == 0) &&
  1183. (rouleur->pullup_ref[micb_index] == 0)) {
  1184. if (pre_off_event && rouleur->mbhc)
  1185. blocking_notifier_call_chain(
  1186. &rouleur->mbhc->notifier, pre_off_event,
  1187. &rouleur->mbhc->wcd_mbhc);
  1188. snd_soc_component_update_bits(component, micb_reg,
  1189. enable_mask, 0x00);
  1190. rouleur_global_mbias_disable(component);
  1191. if (post_off_event && rouleur->mbhc)
  1192. blocking_notifier_call_chain(
  1193. &rouleur->mbhc->notifier,
  1194. post_off_event,
  1195. &rouleur->mbhc->wcd_mbhc);
  1196. }
  1197. if (is_dapm && post_dapm_off && rouleur->mbhc)
  1198. blocking_notifier_call_chain(
  1199. &rouleur->mbhc->notifier, post_dapm_off,
  1200. &rouleur->mbhc->wcd_mbhc);
  1201. break;
  1202. };
  1203. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1204. __func__, micb_num, rouleur->micb_ref[micb_index],
  1205. rouleur->pullup_ref[micb_index]);
  1206. done:
  1207. mutex_unlock(&rouleur->micb_lock);
  1208. return 0;
  1209. }
  1210. EXPORT_SYMBOL(rouleur_micbias_control);
  1211. void rouleur_disable_bcs_before_slow_insert(struct snd_soc_component *component,
  1212. bool bcs_disable)
  1213. {
  1214. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1215. if (rouleur->update_wcd_event) {
  1216. if (bcs_disable)
  1217. rouleur->update_wcd_event(rouleur->handle,
  1218. WCD_BOLERO_EVT_BCS_CLK_OFF, 0);
  1219. else
  1220. rouleur->update_wcd_event(rouleur->handle,
  1221. WCD_BOLERO_EVT_BCS_CLK_OFF, 1);
  1222. }
  1223. }
  1224. static int rouleur_get_logical_addr(struct swr_device *swr_dev)
  1225. {
  1226. int ret = 0;
  1227. uint8_t devnum = 0;
  1228. int num_retry = NUM_ATTEMPTS;
  1229. do {
  1230. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1231. if (ret) {
  1232. dev_err(&swr_dev->dev,
  1233. "%s get devnum %d for dev addr %lx failed\n",
  1234. __func__, devnum, swr_dev->addr);
  1235. /* retry after 1ms */
  1236. usleep_range(1000, 1010);
  1237. }
  1238. } while (ret && --num_retry);
  1239. swr_dev->dev_num = devnum;
  1240. return 0;
  1241. }
  1242. static bool get_usbc_hs_status(struct snd_soc_component *component,
  1243. struct wcd_mbhc_config *mbhc_cfg)
  1244. {
  1245. if (mbhc_cfg->enable_usbc_analog) {
  1246. if (!(snd_soc_component_read32(component, ROULEUR_ANA_MBHC_MECH)
  1247. & 0x20))
  1248. return true;
  1249. }
  1250. return false;
  1251. }
  1252. static int rouleur_event_notify(struct notifier_block *block,
  1253. unsigned long val,
  1254. void *data)
  1255. {
  1256. u16 event = (val & 0xffff);
  1257. int ret = 0;
  1258. struct rouleur_priv *rouleur = dev_get_drvdata((struct device *)data);
  1259. struct snd_soc_component *component = rouleur->component;
  1260. struct wcd_mbhc *mbhc;
  1261. switch (event) {
  1262. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1263. snd_soc_component_update_bits(component,
  1264. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  1265. 0xC0, 0x00);
  1266. snd_soc_component_update_bits(component,
  1267. ROULEUR_ANA_COMBOPA_CTL,
  1268. 0x40, 0x00);
  1269. snd_soc_component_update_bits(component,
  1270. ROULEUR_ANA_COMBOPA_CTL,
  1271. 0x80, 0x00);
  1272. snd_soc_component_update_bits(component,
  1273. ROULEUR_ANA_COMBOPA_CTL,
  1274. 0x40, 0x40);
  1275. snd_soc_component_update_bits(component,
  1276. ROULEUR_ANA_COMBOPA_CTL,
  1277. 0x80, 0x00);
  1278. break;
  1279. case BOLERO_WCD_EVT_SSR_DOWN:
  1280. rouleur->dev_up = false;
  1281. rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
  1282. mbhc = &rouleur->mbhc->wcd_mbhc;
  1283. rouleur->usbc_hs_status = get_usbc_hs_status(component,
  1284. mbhc->mbhc_cfg);
  1285. rouleur_mbhc_ssr_down(rouleur->mbhc, component);
  1286. rouleur_reset(rouleur->dev, 0x01);
  1287. break;
  1288. case BOLERO_WCD_EVT_SSR_UP:
  1289. rouleur_reset(rouleur->dev, 0x00);
  1290. /* allow reset to take effect */
  1291. usleep_range(10000, 10010);
  1292. rouleur_get_logical_addr(rouleur->tx_swr_dev);
  1293. rouleur_get_logical_addr(rouleur->rx_swr_dev);
  1294. rouleur_init_reg(component);
  1295. regcache_mark_dirty(rouleur->regmap);
  1296. regcache_sync(rouleur->regmap);
  1297. rouleur->dev_up = true;
  1298. /* Initialize MBHC module */
  1299. mbhc = &rouleur->mbhc->wcd_mbhc;
  1300. ret = rouleur_mbhc_post_ssr_init(rouleur->mbhc, component);
  1301. if (ret) {
  1302. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1303. __func__);
  1304. } else {
  1305. rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1306. if (rouleur->usbc_hs_status)
  1307. mdelay(500);
  1308. }
  1309. rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
  1310. break;
  1311. default:
  1312. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1313. event);
  1314. break;
  1315. }
  1316. return 0;
  1317. }
  1318. static int __rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1319. int event)
  1320. {
  1321. struct snd_soc_component *component =
  1322. snd_soc_dapm_to_component(w->dapm);
  1323. int micb_num;
  1324. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1325. __func__, w->name, event);
  1326. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1327. micb_num = MIC_BIAS_1;
  1328. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1329. micb_num = MIC_BIAS_2;
  1330. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1331. micb_num = MIC_BIAS_3;
  1332. else
  1333. return -EINVAL;
  1334. switch (event) {
  1335. case SND_SOC_DAPM_PRE_PMU:
  1336. /* Micbias LD0 enable not supported for MicBias 3*/
  1337. if (micb_num == MIC_BIAS_3)
  1338. rouleur_micbias_control(component, micb_num,
  1339. MICB_PULLUP_ENABLE, true);
  1340. else
  1341. rouleur_micbias_control(component, micb_num,
  1342. MICB_ENABLE, true);
  1343. break;
  1344. case SND_SOC_DAPM_POST_PMU:
  1345. usleep_range(1000, 1100);
  1346. break;
  1347. case SND_SOC_DAPM_POST_PMD:
  1348. if (micb_num == MIC_BIAS_3)
  1349. rouleur_micbias_control(component, micb_num,
  1350. MICB_PULLUP_DISABLE, true);
  1351. else
  1352. rouleur_micbias_control(component, micb_num,
  1353. MICB_DISABLE, true);
  1354. break;
  1355. };
  1356. return 0;
  1357. }
  1358. static int rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1359. struct snd_kcontrol *kcontrol,
  1360. int event)
  1361. {
  1362. return __rouleur_codec_enable_micbias(w, event);
  1363. }
  1364. static int __rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1365. int event)
  1366. {
  1367. struct snd_soc_component *component =
  1368. snd_soc_dapm_to_component(w->dapm);
  1369. int micb_num;
  1370. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1371. __func__, w->name, event);
  1372. if (strnstr(w->name, "VA MIC BIAS1", sizeof("VA MIC BIAS1")))
  1373. micb_num = MIC_BIAS_1;
  1374. else if (strnstr(w->name, "VA MIC BIAS2", sizeof("VA MIC BIAS2")))
  1375. micb_num = MIC_BIAS_2;
  1376. else if (strnstr(w->name, "VA MIC BIAS3", sizeof("VA MIC BIAS3")))
  1377. micb_num = MIC_BIAS_3;
  1378. else
  1379. return -EINVAL;
  1380. switch (event) {
  1381. case SND_SOC_DAPM_PRE_PMU:
  1382. rouleur_micbias_control(component, micb_num,
  1383. MICB_PULLUP_ENABLE, true);
  1384. break;
  1385. case SND_SOC_DAPM_POST_PMU:
  1386. /* 1 msec delay as per HW requirement */
  1387. usleep_range(1000, 1100);
  1388. break;
  1389. case SND_SOC_DAPM_POST_PMD:
  1390. rouleur_micbias_control(component, micb_num,
  1391. MICB_PULLUP_DISABLE, true);
  1392. break;
  1393. };
  1394. return 0;
  1395. }
  1396. static int rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1397. struct snd_kcontrol *kcontrol,
  1398. int event)
  1399. {
  1400. return __rouleur_codec_enable_micbias_pullup(w, event);
  1401. }
  1402. static int rouleur_get_compander(struct snd_kcontrol *kcontrol,
  1403. struct snd_ctl_elem_value *ucontrol)
  1404. {
  1405. struct snd_soc_component *component =
  1406. snd_soc_kcontrol_component(kcontrol);
  1407. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1408. bool hphr;
  1409. struct soc_multi_mixer_control *mc;
  1410. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1411. hphr = mc->shift;
  1412. ucontrol->value.integer.value[0] = hphr ? rouleur->comp2_enable :
  1413. rouleur->comp1_enable;
  1414. return 0;
  1415. }
  1416. static int rouleur_set_compander(struct snd_kcontrol *kcontrol,
  1417. struct snd_ctl_elem_value *ucontrol)
  1418. {
  1419. struct snd_soc_component *component =
  1420. snd_soc_kcontrol_component(kcontrol);
  1421. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1422. int value = ucontrol->value.integer.value[0];
  1423. bool hphr;
  1424. struct soc_multi_mixer_control *mc;
  1425. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1426. hphr = mc->shift;
  1427. if (hphr)
  1428. rouleur->comp2_enable = value;
  1429. else
  1430. rouleur->comp1_enable = value;
  1431. return 0;
  1432. }
  1433. static int rouleur_codec_enable_pa_vpos(struct snd_soc_dapm_widget *w,
  1434. struct snd_kcontrol *kcontrol,
  1435. int event)
  1436. {
  1437. struct snd_soc_component *component =
  1438. snd_soc_dapm_to_component(w->dapm);
  1439. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1440. struct rouleur_pdata *pdata = NULL;
  1441. int ret = 0;
  1442. pdata = dev_get_platdata(rouleur->dev);
  1443. if (!pdata) {
  1444. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1445. return -EINVAL;
  1446. }
  1447. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1448. w->name, event);
  1449. switch (event) {
  1450. case SND_SOC_DAPM_PRE_PMU:
  1451. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1452. dev_dbg(component->dev,
  1453. "%s: vpos already in enabled state\n",
  1454. __func__);
  1455. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1456. return 0;
  1457. }
  1458. ret = msm_cdc_enable_ondemand_supply(rouleur->dev,
  1459. rouleur->supplies,
  1460. pdata->regulator,
  1461. pdata->num_supplies,
  1462. "cdc-pa-vpos");
  1463. if (ret == -EINVAL) {
  1464. dev_err(component->dev, "%s: pa vpos is not enabled\n",
  1465. __func__);
  1466. return ret;
  1467. }
  1468. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1469. /*
  1470. * 200us sleep is required after LDO15 is enabled as per
  1471. * HW requirement
  1472. */
  1473. usleep_range(200, 250);
  1474. break;
  1475. case SND_SOC_DAPM_POST_PMD:
  1476. set_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1477. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  1478. rouleur->rx_swr_dev->dev_num,
  1479. false);
  1480. break;
  1481. }
  1482. return 0;
  1483. }
  1484. static const struct snd_kcontrol_new rouleur_snd_controls[] = {
  1485. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1486. rouleur_get_compander, rouleur_set_compander),
  1487. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1488. rouleur_get_compander, rouleur_set_compander),
  1489. SOC_SINGLE_TLV("HPHL Volume", ROULEUR_ANA_HPHPA_L_GAIN, 0, 20, 1,
  1490. line_gain),
  1491. SOC_SINGLE_TLV("HPHR Volume", ROULEUR_ANA_HPHPA_R_GAIN, 0, 20, 1,
  1492. line_gain),
  1493. SOC_SINGLE_TLV("ADC1 Volume", ROULEUR_ANA_TX_AMIC1, 0, 8, 0,
  1494. analog_gain),
  1495. SOC_SINGLE_TLV("ADC2 Volume", ROULEUR_ANA_TX_AMIC2, 0, 8, 0,
  1496. analog_gain),
  1497. };
  1498. static const struct snd_kcontrol_new adc1_switch[] = {
  1499. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1500. };
  1501. static const struct snd_kcontrol_new adc2_switch[] = {
  1502. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1503. };
  1504. static const struct snd_kcontrol_new dmic1_switch[] = {
  1505. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1506. };
  1507. static const struct snd_kcontrol_new dmic2_switch[] = {
  1508. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1509. };
  1510. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1511. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1512. };
  1513. static const struct snd_kcontrol_new lo_rdac_switch[] = {
  1514. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1515. };
  1516. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1517. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1518. };
  1519. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1520. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1521. };
  1522. static const char * const adc2_mux_text[] = {
  1523. "INP2", "INP3"
  1524. };
  1525. static const struct soc_enum adc2_enum =
  1526. SOC_ENUM_SINGLE(ROULEUR_ANA_TX_AMIC2, 4,
  1527. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1528. static const struct snd_kcontrol_new tx_adc2_mux =
  1529. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1530. static const struct snd_soc_dapm_widget rouleur_dapm_widgets[] = {
  1531. /*input widgets*/
  1532. SND_SOC_DAPM_INPUT("AMIC1"),
  1533. SND_SOC_DAPM_INPUT("AMIC2"),
  1534. SND_SOC_DAPM_INPUT("AMIC3"),
  1535. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1536. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1537. /*tx widgets*/
  1538. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1539. rouleur_codec_enable_adc,
  1540. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1541. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1542. rouleur_codec_enable_adc,
  1543. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1544. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1545. &tx_adc2_mux),
  1546. /*tx mixers*/
  1547. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1548. adc1_switch, ARRAY_SIZE(adc1_switch),
  1549. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1550. SND_SOC_DAPM_POST_PMD),
  1551. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1552. adc2_switch, ARRAY_SIZE(adc2_switch),
  1553. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1554. SND_SOC_DAPM_POST_PMD),
  1555. /* micbias widgets*/
  1556. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1557. rouleur_codec_enable_micbias,
  1558. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1559. SND_SOC_DAPM_POST_PMD),
  1560. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1561. rouleur_codec_enable_micbias,
  1562. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1563. SND_SOC_DAPM_POST_PMD),
  1564. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1565. rouleur_codec_enable_micbias,
  1566. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1567. SND_SOC_DAPM_POST_PMD),
  1568. SND_SOC_DAPM_SUPPLY("PA_VPOS", SND_SOC_NOPM, 0, 0,
  1569. rouleur_codec_enable_pa_vpos,
  1570. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1571. /*rx widgets*/
  1572. SND_SOC_DAPM_PGA_E("EAR PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1573. rouleur_codec_enable_ear_pa,
  1574. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1575. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1576. SND_SOC_DAPM_PGA_E("LO PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1577. rouleur_codec_enable_lo_pa,
  1578. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1579. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1580. SND_SOC_DAPM_PGA_E("HPHL PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 7, 0, NULL,
  1581. 0, rouleur_codec_enable_hphl_pa,
  1582. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1583. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1584. SND_SOC_DAPM_PGA_E("HPHR PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 6, 0, NULL,
  1585. 0, rouleur_codec_enable_hphr_pa,
  1586. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1587. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1588. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1589. rouleur_codec_hphl_dac_event,
  1590. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1591. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1592. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1593. rouleur_codec_hphr_dac_event,
  1594. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1595. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1596. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1597. rouleur_codec_ear_lo_dac_event,
  1598. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1599. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1600. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1601. rouleur_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1602. SND_SOC_DAPM_POST_PMD),
  1603. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1604. rouleur_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1605. SND_SOC_DAPM_POST_PMD),
  1606. /* rx mixer widgets*/
  1607. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1608. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1609. SND_SOC_DAPM_MIXER("LO_RDAC", SND_SOC_NOPM, 0, 0,
  1610. lo_rdac_switch, ARRAY_SIZE(lo_rdac_switch)),
  1611. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1612. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1613. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1614. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1615. /*output widgets tx*/
  1616. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1617. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1618. /*output widgets rx*/
  1619. SND_SOC_DAPM_OUTPUT("EAR"),
  1620. SND_SOC_DAPM_OUTPUT("LO"),
  1621. SND_SOC_DAPM_OUTPUT("HPHL"),
  1622. SND_SOC_DAPM_OUTPUT("HPHR"),
  1623. /* micbias pull up widgets*/
  1624. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1625. rouleur_codec_enable_micbias_pullup,
  1626. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1627. SND_SOC_DAPM_POST_PMD),
  1628. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1629. rouleur_codec_enable_micbias_pullup,
  1630. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1631. SND_SOC_DAPM_POST_PMD),
  1632. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1633. rouleur_codec_enable_micbias_pullup,
  1634. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1635. SND_SOC_DAPM_POST_PMD),
  1636. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1637. rouleur_codec_enable_dmic,
  1638. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1639. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1640. rouleur_codec_enable_dmic,
  1641. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1642. /*tx mixer widgets*/
  1643. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1644. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1645. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1646. SND_SOC_DAPM_POST_PMD),
  1647. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1648. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1649. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1650. SND_SOC_DAPM_POST_PMD),
  1651. /*output widgets*/
  1652. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1653. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1654. };
  1655. static const struct snd_soc_dapm_route rouleur_audio_map[] = {
  1656. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1657. {"ADC1_MIXER", "Switch", "ADC1"},
  1658. {"ADC1", NULL, "AMIC1"},
  1659. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1660. {"ADC2_MIXER", "Switch", "ADC2"},
  1661. {"ADC2", NULL, "ADC2 MUX"},
  1662. {"ADC2 MUX", "INP3", "AMIC3"},
  1663. {"ADC2 MUX", "INP2", "AMIC2"},
  1664. {"IN1_HPHL", NULL, "PA_VPOS"},
  1665. {"RX1", NULL, "IN1_HPHL"},
  1666. {"RDAC1", NULL, "RX1"},
  1667. {"HPHL_RDAC", "Switch", "RDAC1"},
  1668. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1669. {"HPHL", NULL, "HPHL PGA"},
  1670. {"IN2_HPHR", NULL, "PA_VPOS"},
  1671. {"RX2", NULL, "IN2_HPHR"},
  1672. {"RDAC2", NULL, "RX2"},
  1673. {"HPHR_RDAC", "Switch", "RDAC2"},
  1674. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1675. {"HPHR", NULL, "HPHR PGA"},
  1676. {"RDAC3", NULL, "RX1"},
  1677. {"EAR_RDAC", "Switch", "RDAC3"},
  1678. {"EAR PGA", NULL, "EAR_RDAC"},
  1679. {"EAR", NULL, "EAR PGA"},
  1680. {"RDAC3", NULL, "RX1"},
  1681. {"LO_RDAC", "Switch", "RDAC3"},
  1682. {"LO PGA", NULL, "LO_RDAC"},
  1683. {"LO", NULL, "LO PGA"},
  1684. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1685. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1686. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1687. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1688. };
  1689. static ssize_t rouleur_version_read(struct snd_info_entry *entry,
  1690. void *file_private_data,
  1691. struct file *file,
  1692. char __user *buf, size_t count,
  1693. loff_t pos)
  1694. {
  1695. struct rouleur_priv *priv;
  1696. char buffer[ROULEUR_VERSION_ENTRY_SIZE];
  1697. int len = 0;
  1698. priv = (struct rouleur_priv *) entry->private_data;
  1699. if (!priv) {
  1700. pr_err("%s: rouleur priv is null\n", __func__);
  1701. return -EINVAL;
  1702. }
  1703. switch (priv->version) {
  1704. case ROULEUR_VERSION_1_0:
  1705. len = snprintf(buffer, sizeof(buffer), "ROULEUR_1_0\n");
  1706. break;
  1707. default:
  1708. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1709. }
  1710. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1711. }
  1712. static struct snd_info_entry_ops rouleur_info_ops = {
  1713. .read = rouleur_version_read,
  1714. };
  1715. /*
  1716. * rouleur_info_create_codec_entry - creates rouleur module
  1717. * @codec_root: The parent directory
  1718. * @component: component instance
  1719. *
  1720. * Creates rouleur module and version entry under the given
  1721. * parent directory.
  1722. *
  1723. * Return: 0 on success or negative error code on failure.
  1724. */
  1725. int rouleur_info_create_codec_entry(struct snd_info_entry *codec_root,
  1726. struct snd_soc_component *component)
  1727. {
  1728. struct snd_info_entry *version_entry;
  1729. struct rouleur_priv *priv;
  1730. struct snd_soc_card *card;
  1731. if (!codec_root || !component)
  1732. return -EINVAL;
  1733. priv = snd_soc_component_get_drvdata(component);
  1734. if (priv->entry) {
  1735. dev_dbg(priv->dev,
  1736. "%s:rouleur module already created\n", __func__);
  1737. return 0;
  1738. }
  1739. card = component->card;
  1740. priv->entry = snd_info_create_subdir(codec_root->module,
  1741. "rouleur", codec_root);
  1742. if (!priv->entry) {
  1743. dev_dbg(component->dev, "%s: failed to create rouleur entry\n",
  1744. __func__);
  1745. return -ENOMEM;
  1746. }
  1747. version_entry = snd_info_create_card_entry(card->snd_card,
  1748. "version",
  1749. priv->entry);
  1750. if (!version_entry) {
  1751. dev_dbg(component->dev, "%s: failed to create rouleur version entry\n",
  1752. __func__);
  1753. return -ENOMEM;
  1754. }
  1755. version_entry->private_data = priv;
  1756. version_entry->size = ROULEUR_VERSION_ENTRY_SIZE;
  1757. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1758. version_entry->c.ops = &rouleur_info_ops;
  1759. if (snd_info_register(version_entry) < 0) {
  1760. snd_info_free_entry(version_entry);
  1761. return -ENOMEM;
  1762. }
  1763. priv->version_entry = version_entry;
  1764. return 0;
  1765. }
  1766. EXPORT_SYMBOL(rouleur_info_create_codec_entry);
  1767. static int rouleur_set_micbias_data(struct rouleur_priv *rouleur,
  1768. struct rouleur_pdata *pdata)
  1769. {
  1770. int vout_ctl = 0;
  1771. int rc = 0;
  1772. if (!pdata) {
  1773. dev_err(rouleur->dev, "%s: NULL pdata\n", __func__);
  1774. return -ENODEV;
  1775. }
  1776. /* set micbias voltage */
  1777. vout_ctl = rouleur_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  1778. if (vout_ctl < 0) {
  1779. rc = -EINVAL;
  1780. goto done;
  1781. }
  1782. regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MICBIAS_LDO_1_SETTING,
  1783. 0xF8, vout_ctl << 3);
  1784. done:
  1785. return rc;
  1786. }
  1787. static int rouleur_battery_supply_cb(struct notifier_block *nb,
  1788. unsigned long event, void *data)
  1789. {
  1790. struct power_supply *psy = data;
  1791. struct rouleur_priv *rouleur =
  1792. container_of(nb, struct rouleur_priv, psy_nb);
  1793. if (strcmp(psy->desc->name, "battery"))
  1794. return NOTIFY_OK;
  1795. queue_work(system_freezable_wq, &rouleur->soc_eval_work);
  1796. return NOTIFY_OK;
  1797. }
  1798. static int rouleur_read_battery_soc(struct rouleur_priv *rouleur, int *soc_val)
  1799. {
  1800. static struct power_supply *batt_psy;
  1801. union power_supply_propval ret = {0,};
  1802. int err = 0;
  1803. *soc_val = 100;
  1804. if (!batt_psy)
  1805. batt_psy = power_supply_get_by_name("battery");
  1806. if (batt_psy) {
  1807. err = power_supply_get_property(batt_psy,
  1808. POWER_SUPPLY_PROP_CAPACITY, &ret);
  1809. if (err) {
  1810. pr_err("%s: battery SoC read error:%d\n",
  1811. __func__, err);
  1812. return err;
  1813. }
  1814. *soc_val = ret.intval;
  1815. }
  1816. pr_debug("%s: soc:%d\n", __func__, *soc_val);
  1817. return err;
  1818. }
  1819. static void rouleur_evaluate_soc(struct work_struct *work)
  1820. {
  1821. struct rouleur_priv *rouleur =
  1822. container_of(work, struct rouleur_priv, soc_eval_work);
  1823. int soc_val = 0, ret = 0;
  1824. struct rouleur_pdata *pdata = NULL;
  1825. pdata = dev_get_platdata(rouleur->dev);
  1826. if (!pdata) {
  1827. dev_err(rouleur->dev, "%s: pdata is NULL\n", __func__);
  1828. return;
  1829. }
  1830. if (rouleur_read_battery_soc(rouleur, &soc_val) < 0) {
  1831. dev_err(rouleur->dev, "%s unable to read battery SoC\n",
  1832. __func__);
  1833. return;
  1834. }
  1835. if (soc_val < SOC_THRESHOLD_LEVEL) {
  1836. dev_dbg(rouleur->dev,
  1837. "%s battery SoC less than threshold soc_val = %d\n",
  1838. __func__, soc_val);
  1839. /* Reduce PA Gain by 6DB for low SoC */
  1840. if (rouleur->update_wcd_event)
  1841. rouleur->update_wcd_event(rouleur->handle,
  1842. WCD_BOLERO_EVT_RX_PA_GAIN_UPDATE,
  1843. true);
  1844. rouleur->low_soc = true;
  1845. ret = msm_cdc_set_supply_min_voltage(rouleur->dev,
  1846. rouleur->supplies,
  1847. pdata->regulator,
  1848. pdata->num_supplies,
  1849. "cdc-vdd-mic-bias",
  1850. LOW_SOC_MBIAS_REG_MIN_VOLTAGE,
  1851. true);
  1852. if (ret < 0)
  1853. dev_err(rouleur->dev,
  1854. "%s unable to set mbias min voltage\n",
  1855. __func__);
  1856. } else {
  1857. if (rouleur->low_soc == true) {
  1858. /* Reset PA Gain to default for normal SoC */
  1859. if (rouleur->update_wcd_event)
  1860. rouleur->update_wcd_event(rouleur->handle,
  1861. WCD_BOLERO_EVT_RX_PA_GAIN_UPDATE,
  1862. false);
  1863. ret = msm_cdc_set_supply_min_voltage(rouleur->dev,
  1864. rouleur->supplies,
  1865. pdata->regulator,
  1866. pdata->num_supplies,
  1867. "cdc-vdd-mic-bias",
  1868. LOW_SOC_MBIAS_REG_MIN_VOLTAGE,
  1869. false);
  1870. if (ret < 0)
  1871. dev_err(rouleur->dev,
  1872. "%s unable to set mbias min voltage\n",
  1873. __func__);
  1874. rouleur->low_soc = false;
  1875. }
  1876. }
  1877. }
  1878. static int rouleur_soc_codec_probe(struct snd_soc_component *component)
  1879. {
  1880. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1881. struct snd_soc_dapm_context *dapm =
  1882. snd_soc_component_get_dapm(component);
  1883. int ret = -EINVAL;
  1884. dev_info(component->dev, "%s()\n", __func__);
  1885. rouleur = snd_soc_component_get_drvdata(component);
  1886. if (!rouleur)
  1887. return -EINVAL;
  1888. rouleur->component = component;
  1889. snd_soc_component_init_regmap(component, rouleur->regmap);
  1890. rouleur->fw_data = devm_kzalloc(component->dev,
  1891. sizeof(*(rouleur->fw_data)),
  1892. GFP_KERNEL);
  1893. if (!rouleur->fw_data) {
  1894. dev_err(component->dev, "Failed to allocate fw_data\n");
  1895. ret = -ENOMEM;
  1896. goto done;
  1897. }
  1898. set_bit(WCD9XXX_MBHC_CAL, rouleur->fw_data->cal_bit);
  1899. ret = wcd_cal_create_hwdep(rouleur->fw_data,
  1900. WCD9XXX_CODEC_HWDEP_NODE, component);
  1901. if (ret < 0) {
  1902. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  1903. goto done;
  1904. }
  1905. ret = rouleur_mbhc_init(&rouleur->mbhc, component, rouleur->fw_data);
  1906. if (ret) {
  1907. pr_err("%s: mbhc initialization failed\n", __func__);
  1908. goto done;
  1909. }
  1910. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1911. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1912. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1913. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1914. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1915. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1916. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1917. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1918. snd_soc_dapm_ignore_suspend(dapm, "LO");
  1919. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1920. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1921. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1922. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1923. snd_soc_dapm_sync(dapm);
  1924. rouleur_init_reg(component);
  1925. rouleur->version = ROULEUR_VERSION_1_0;
  1926. /* Register event notifier */
  1927. rouleur->nblock.notifier_call = rouleur_event_notify;
  1928. if (rouleur->register_notifier) {
  1929. ret = rouleur->register_notifier(rouleur->handle,
  1930. &rouleur->nblock,
  1931. true);
  1932. if (ret) {
  1933. dev_err(component->dev,
  1934. "%s: Failed to register notifier %d\n",
  1935. __func__, ret);
  1936. return ret;
  1937. }
  1938. }
  1939. rouleur->low_soc = false;
  1940. rouleur->dev_up = true;
  1941. /* Register notifier to change gain based on state of charge */
  1942. INIT_WORK(&rouleur->soc_eval_work, rouleur_evaluate_soc);
  1943. rouleur->psy_nb.notifier_call = rouleur_battery_supply_cb;
  1944. if (power_supply_reg_notifier(&rouleur->psy_nb) < 0)
  1945. dev_dbg(rouleur->dev,
  1946. "%s: could not register pwr supply notifier\n",
  1947. __func__);
  1948. queue_work(system_freezable_wq, &rouleur->soc_eval_work);
  1949. done:
  1950. return ret;
  1951. }
  1952. static void rouleur_soc_codec_remove(struct snd_soc_component *component)
  1953. {
  1954. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1955. if (!rouleur)
  1956. return;
  1957. if (rouleur->register_notifier)
  1958. rouleur->register_notifier(rouleur->handle,
  1959. &rouleur->nblock,
  1960. false);
  1961. }
  1962. static int rouleur_soc_codec_suspend(struct snd_soc_component *component)
  1963. {
  1964. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1965. if (!rouleur)
  1966. return 0;
  1967. rouleur->dapm_bias_off = true;
  1968. return 0;
  1969. }
  1970. static int rouleur_soc_codec_resume(struct snd_soc_component *component)
  1971. {
  1972. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1973. if (!rouleur)
  1974. return 0;
  1975. rouleur->dapm_bias_off = false;
  1976. return 0;
  1977. }
  1978. static const struct snd_soc_component_driver soc_codec_dev_rouleur = {
  1979. .name = DRV_NAME,
  1980. .probe = rouleur_soc_codec_probe,
  1981. .remove = rouleur_soc_codec_remove,
  1982. .controls = rouleur_snd_controls,
  1983. .num_controls = ARRAY_SIZE(rouleur_snd_controls),
  1984. .dapm_widgets = rouleur_dapm_widgets,
  1985. .num_dapm_widgets = ARRAY_SIZE(rouleur_dapm_widgets),
  1986. .dapm_routes = rouleur_audio_map,
  1987. .num_dapm_routes = ARRAY_SIZE(rouleur_audio_map),
  1988. .suspend = rouleur_soc_codec_suspend,
  1989. .resume = rouleur_soc_codec_resume,
  1990. };
  1991. #ifdef CONFIG_PM_SLEEP
  1992. static int rouleur_suspend(struct device *dev)
  1993. {
  1994. struct rouleur_priv *rouleur = NULL;
  1995. int ret = 0;
  1996. struct rouleur_pdata *pdata = NULL;
  1997. if (!dev)
  1998. return -ENODEV;
  1999. rouleur = dev_get_drvdata(dev);
  2000. if (!rouleur)
  2001. return -EINVAL;
  2002. pdata = dev_get_platdata(rouleur->dev);
  2003. if (!pdata) {
  2004. dev_err(dev, "%s: pdata is NULL\n", __func__);
  2005. return -EINVAL;
  2006. }
  2007. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  2008. ret = msm_cdc_disable_ondemand_supply(rouleur->dev,
  2009. rouleur->supplies,
  2010. pdata->regulator,
  2011. pdata->num_supplies,
  2012. "cdc-pa-vpos");
  2013. if (ret == -EINVAL) {
  2014. dev_err(dev, "%s: pa vpos is not disabled\n",
  2015. __func__);
  2016. return 0;
  2017. }
  2018. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  2019. }
  2020. if (rouleur->dapm_bias_off) {
  2021. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  2022. rouleur->supplies,
  2023. pdata->regulator,
  2024. pdata->num_supplies,
  2025. true);
  2026. set_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  2027. }
  2028. return 0;
  2029. }
  2030. static int rouleur_resume(struct device *dev)
  2031. {
  2032. struct rouleur_priv *rouleur = NULL;
  2033. struct rouleur_pdata *pdata = NULL;
  2034. if (!dev)
  2035. return -ENODEV;
  2036. rouleur = dev_get_drvdata(dev);
  2037. if (!rouleur)
  2038. return -EINVAL;
  2039. pdata = dev_get_platdata(rouleur->dev);
  2040. if (!pdata) {
  2041. dev_err(dev, "%s: pdata is NULL\n", __func__);
  2042. return -EINVAL;
  2043. }
  2044. if (test_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask)) {
  2045. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  2046. rouleur->supplies,
  2047. pdata->regulator,
  2048. pdata->num_supplies,
  2049. false);
  2050. clear_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  2051. }
  2052. return 0;
  2053. }
  2054. #endif
  2055. static int rouleur_reset(struct device *dev, int reset_val)
  2056. {
  2057. struct rouleur_priv *rouleur = NULL;
  2058. if (!dev)
  2059. return -ENODEV;
  2060. rouleur = dev_get_drvdata(dev);
  2061. if (!rouleur)
  2062. return -EINVAL;
  2063. pm2250_spmi_write(rouleur->spmi_dev, rouleur->reset_reg, reset_val);
  2064. return 0;
  2065. }
  2066. static int rouleur_read_of_property_u32(struct device *dev, const char *name,
  2067. u32 *val)
  2068. {
  2069. int rc = 0;
  2070. rc = of_property_read_u32(dev->of_node, name, val);
  2071. if (rc)
  2072. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2073. __func__, name, dev->of_node->full_name);
  2074. return rc;
  2075. }
  2076. static void rouleur_dt_parse_micbias_info(struct device *dev,
  2077. struct rouleur_micbias_setting *mb)
  2078. {
  2079. u32 prop_val = 0;
  2080. int rc = 0;
  2081. /* MB1 */
  2082. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  2083. NULL)) {
  2084. rc = rouleur_read_of_property_u32(dev,
  2085. "qcom,cdc-micbias1-mv",
  2086. &prop_val);
  2087. if (!rc)
  2088. mb->micb1_mv = prop_val;
  2089. } else {
  2090. dev_info(dev, "%s: Micbias1 DT property not found\n",
  2091. __func__);
  2092. }
  2093. /* MB2 */
  2094. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  2095. NULL)) {
  2096. rc = rouleur_read_of_property_u32(dev,
  2097. "qcom,cdc-micbias2-mv",
  2098. &prop_val);
  2099. if (!rc)
  2100. mb->micb2_mv = prop_val;
  2101. } else {
  2102. dev_info(dev, "%s: Micbias2 DT property not found\n",
  2103. __func__);
  2104. }
  2105. /* MB3 */
  2106. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  2107. NULL)) {
  2108. rc = rouleur_read_of_property_u32(dev,
  2109. "qcom,cdc-micbias3-mv",
  2110. &prop_val);
  2111. if (!rc)
  2112. mb->micb3_mv = prop_val;
  2113. } else {
  2114. dev_info(dev, "%s: Micbias3 DT property not found\n",
  2115. __func__);
  2116. }
  2117. }
  2118. struct rouleur_pdata *rouleur_populate_dt_data(struct device *dev)
  2119. {
  2120. struct rouleur_pdata *pdata = NULL;
  2121. u32 reg;
  2122. int ret = 0;
  2123. pdata = kzalloc(sizeof(struct rouleur_pdata),
  2124. GFP_KERNEL);
  2125. if (!pdata)
  2126. return NULL;
  2127. pdata->spmi_np = of_parse_phandle(dev->of_node,
  2128. "qcom,pmic-spmi-node", 0);
  2129. if (!pdata->spmi_np) {
  2130. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2131. __func__, "qcom,pmic-spmi-node",
  2132. dev->of_node->full_name);
  2133. kfree(pdata);
  2134. return NULL;
  2135. }
  2136. ret = of_property_read_u32(dev->of_node, "qcom,wcd-reset-reg", &reg);
  2137. if (ret) {
  2138. dev_err(dev, "%s: Failed to obtain reset reg value %d\n",
  2139. __func__, ret);
  2140. kfree(pdata);
  2141. return NULL;
  2142. }
  2143. pdata->reset_reg = reg;
  2144. /* Parse power supplies */
  2145. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  2146. &pdata->num_supplies);
  2147. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  2148. dev_err(dev, "%s: no power supplies defined for codec\n",
  2149. __func__);
  2150. kfree(pdata);
  2151. return NULL;
  2152. }
  2153. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  2154. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  2155. rouleur_dt_parse_micbias_info(dev, &pdata->micbias);
  2156. return pdata;
  2157. }
  2158. static int rouleur_wakeup(void *handle, bool enable)
  2159. {
  2160. struct rouleur_priv *priv;
  2161. if (!handle) {
  2162. pr_err("%s: NULL handle\n", __func__);
  2163. return -EINVAL;
  2164. }
  2165. priv = (struct rouleur_priv *)handle;
  2166. if (!priv->tx_swr_dev) {
  2167. pr_err("%s: tx swr dev is NULL\n", __func__);
  2168. return -EINVAL;
  2169. }
  2170. if (enable)
  2171. return swr_device_wakeup_vote(priv->tx_swr_dev);
  2172. else
  2173. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  2174. }
  2175. static irqreturn_t rouleur_wd_handle_irq(int irq, void *data)
  2176. {
  2177. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  2178. __func__, irq);
  2179. return IRQ_HANDLED;
  2180. }
  2181. static int rouleur_bind(struct device *dev)
  2182. {
  2183. int ret = 0, i = 0;
  2184. struct rouleur_priv *rouleur = NULL;
  2185. struct rouleur_pdata *pdata = NULL;
  2186. struct wcd_ctrl_platform_data *plat_data = NULL;
  2187. struct platform_device *pdev = NULL;
  2188. rouleur = kzalloc(sizeof(struct rouleur_priv), GFP_KERNEL);
  2189. if (!rouleur)
  2190. return -ENOMEM;
  2191. dev_set_drvdata(dev, rouleur);
  2192. pdata = rouleur_populate_dt_data(dev);
  2193. if (!pdata) {
  2194. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  2195. kfree(rouleur);
  2196. return -EINVAL;
  2197. }
  2198. rouleur->dev = dev;
  2199. rouleur->dev->platform_data = pdata;
  2200. pdev = of_find_device_by_node(pdata->spmi_np);
  2201. if (!pdev) {
  2202. dev_err(dev, "%s: platform device from SPMI node is NULL\n",
  2203. __func__);
  2204. ret = -EINVAL;
  2205. goto err_bind_all;
  2206. }
  2207. rouleur->spmi_dev = &pdev->dev;
  2208. rouleur->reset_reg = pdata->reset_reg;
  2209. ret = msm_cdc_init_supplies(dev, &rouleur->supplies,
  2210. pdata->regulator, pdata->num_supplies);
  2211. if (!rouleur->supplies) {
  2212. dev_err(dev, "%s: Cannot init wcd supplies\n",
  2213. __func__);
  2214. goto err_bind_all;
  2215. }
  2216. plat_data = dev_get_platdata(dev->parent);
  2217. if (!plat_data) {
  2218. dev_err(dev, "%s: platform data from parent is NULL\n",
  2219. __func__);
  2220. ret = -EINVAL;
  2221. goto err_bind_all;
  2222. }
  2223. rouleur->handle = (void *)plat_data->handle;
  2224. if (!rouleur->handle) {
  2225. dev_err(dev, "%s: handle is NULL\n", __func__);
  2226. ret = -EINVAL;
  2227. goto err_bind_all;
  2228. }
  2229. rouleur->update_wcd_event = plat_data->update_wcd_event;
  2230. if (!rouleur->update_wcd_event) {
  2231. dev_err(dev, "%s: update_wcd_event api is null!\n",
  2232. __func__);
  2233. ret = -EINVAL;
  2234. goto err_bind_all;
  2235. }
  2236. rouleur->register_notifier = plat_data->register_notifier;
  2237. if (!rouleur->register_notifier) {
  2238. dev_err(dev, "%s: register_notifier api is null!\n",
  2239. __func__);
  2240. ret = -EINVAL;
  2241. goto err_bind_all;
  2242. }
  2243. ret = msm_cdc_enable_static_supplies(dev, rouleur->supplies,
  2244. pdata->regulator,
  2245. pdata->num_supplies);
  2246. if (ret) {
  2247. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2248. __func__);
  2249. goto err_bind_all;
  2250. }
  2251. rouleur_reset(dev, 0x01);
  2252. usleep_range(20, 30);
  2253. rouleur_reset(dev, 0x00);
  2254. /*
  2255. * Add 5msec delay to provide sufficient time for
  2256. * soundwire auto enumeration of slave devices as
  2257. * as per HW requirement.
  2258. */
  2259. usleep_range(5000, 5010);
  2260. rouleur->wakeup = rouleur_wakeup;
  2261. ret = component_bind_all(dev, rouleur);
  2262. if (ret) {
  2263. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2264. __func__, ret);
  2265. goto err_bind_all;
  2266. }
  2267. ret = rouleur_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2268. ret |= rouleur_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2269. if (ret) {
  2270. dev_err(dev, "Failed to read port mapping\n");
  2271. goto err;
  2272. }
  2273. rouleur->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2274. if (!rouleur->rx_swr_dev) {
  2275. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2276. __func__);
  2277. ret = -ENODEV;
  2278. goto err;
  2279. }
  2280. rouleur->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2281. if (!rouleur->tx_swr_dev) {
  2282. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2283. __func__);
  2284. ret = -ENODEV;
  2285. goto err;
  2286. }
  2287. rouleur->regmap = devm_regmap_init_swr(rouleur->tx_swr_dev,
  2288. &rouleur_regmap_config);
  2289. if (!rouleur->regmap) {
  2290. dev_err(dev, "%s: Regmap init failed\n",
  2291. __func__);
  2292. goto err;
  2293. }
  2294. /* Set all interupts as edge triggered */
  2295. for (i = 0; i < rouleur_regmap_irq_chip.num_regs; i++)
  2296. regmap_write(rouleur->regmap,
  2297. (ROULEUR_DIG_SWR_INTR_LEVEL_0 + i), 0);
  2298. rouleur_regmap_irq_chip.irq_drv_data = rouleur;
  2299. rouleur->irq_info.wcd_regmap_irq_chip = &rouleur_regmap_irq_chip;
  2300. rouleur->irq_info.codec_name = "rouleur";
  2301. rouleur->irq_info.regmap = rouleur->regmap;
  2302. rouleur->irq_info.dev = dev;
  2303. ret = wcd_irq_init(&rouleur->irq_info, &rouleur->virq);
  2304. if (ret) {
  2305. dev_err(dev, "%s: IRQ init failed: %d\n",
  2306. __func__, ret);
  2307. goto err;
  2308. }
  2309. rouleur->tx_swr_dev->slave_irq = rouleur->virq;
  2310. mutex_init(&rouleur->micb_lock);
  2311. mutex_init(&rouleur->main_bias_lock);
  2312. mutex_init(&rouleur->rx_clk_lock);
  2313. ret = rouleur_set_micbias_data(rouleur, pdata);
  2314. if (ret < 0) {
  2315. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2316. goto err_irq;
  2317. }
  2318. /* Request for watchdog interrupt */
  2319. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT,
  2320. "HPHR PDM WD INT", rouleur_wd_handle_irq, NULL);
  2321. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT,
  2322. "HPHL PDM WD INT", rouleur_wd_handle_irq, NULL);
  2323. /* Disable watchdog interrupt for HPH */
  2324. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT);
  2325. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT);
  2326. ret = snd_soc_register_component(dev, &soc_codec_dev_rouleur,
  2327. NULL, 0);
  2328. if (ret) {
  2329. dev_err(dev, "%s: Codec registration failed\n",
  2330. __func__);
  2331. goto err_irq;
  2332. }
  2333. return ret;
  2334. err_irq:
  2335. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2336. mutex_destroy(&rouleur->micb_lock);
  2337. mutex_destroy(&rouleur->main_bias_lock);
  2338. mutex_destroy(&rouleur->rx_clk_lock);
  2339. err:
  2340. component_unbind_all(dev, rouleur);
  2341. err_bind_all:
  2342. dev_set_drvdata(dev, NULL);
  2343. kfree(pdata);
  2344. kfree(rouleur);
  2345. return ret;
  2346. }
  2347. static void rouleur_unbind(struct device *dev)
  2348. {
  2349. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  2350. struct rouleur_pdata *pdata = dev_get_platdata(rouleur->dev);
  2351. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2352. snd_soc_unregister_component(dev);
  2353. component_unbind_all(dev, rouleur);
  2354. mutex_destroy(&rouleur->micb_lock);
  2355. mutex_destroy(&rouleur->main_bias_lock);
  2356. mutex_destroy(&rouleur->rx_clk_lock);
  2357. dev_set_drvdata(dev, NULL);
  2358. kfree(pdata);
  2359. kfree(rouleur);
  2360. }
  2361. static const struct of_device_id rouleur_dt_match[] = {
  2362. { .compatible = "qcom,rouleur-codec" , .data = "rouleur" },
  2363. {}
  2364. };
  2365. static const struct component_master_ops rouleur_comp_ops = {
  2366. .bind = rouleur_bind,
  2367. .unbind = rouleur_unbind,
  2368. };
  2369. static int rouleur_compare_of(struct device *dev, void *data)
  2370. {
  2371. return dev->of_node == data;
  2372. }
  2373. static void rouleur_release_of(struct device *dev, void *data)
  2374. {
  2375. of_node_put(data);
  2376. }
  2377. static int rouleur_add_slave_components(struct device *dev,
  2378. struct component_match **matchptr)
  2379. {
  2380. struct device_node *np, *rx_node, *tx_node;
  2381. np = dev->of_node;
  2382. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2383. if (!rx_node) {
  2384. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2385. return -ENODEV;
  2386. }
  2387. of_node_get(rx_node);
  2388. component_match_add_release(dev, matchptr,
  2389. rouleur_release_of,
  2390. rouleur_compare_of,
  2391. rx_node);
  2392. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2393. if (!tx_node) {
  2394. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2395. return -ENODEV;
  2396. }
  2397. of_node_get(tx_node);
  2398. component_match_add_release(dev, matchptr,
  2399. rouleur_release_of,
  2400. rouleur_compare_of,
  2401. tx_node);
  2402. return 0;
  2403. }
  2404. static int rouleur_probe(struct platform_device *pdev)
  2405. {
  2406. struct component_match *match = NULL;
  2407. int ret;
  2408. ret = rouleur_add_slave_components(&pdev->dev, &match);
  2409. if (ret)
  2410. return ret;
  2411. return component_master_add_with_match(&pdev->dev,
  2412. &rouleur_comp_ops, match);
  2413. }
  2414. static int rouleur_remove(struct platform_device *pdev)
  2415. {
  2416. component_master_del(&pdev->dev, &rouleur_comp_ops);
  2417. dev_set_drvdata(&pdev->dev, NULL);
  2418. return 0;
  2419. }
  2420. #ifdef CONFIG_PM_SLEEP
  2421. static const struct dev_pm_ops rouleur_dev_pm_ops = {
  2422. .suspend_late = rouleur_suspend,
  2423. .resume_early = rouleur_resume
  2424. };
  2425. #endif
  2426. static struct platform_driver rouleur_codec_driver = {
  2427. .probe = rouleur_probe,
  2428. .remove = rouleur_remove,
  2429. .driver = {
  2430. .name = "rouleur_codec",
  2431. .owner = THIS_MODULE,
  2432. .of_match_table = of_match_ptr(rouleur_dt_match),
  2433. #ifdef CONFIG_PM_SLEEP
  2434. .pm = &rouleur_dev_pm_ops,
  2435. #endif
  2436. .suppress_bind_attrs = true,
  2437. },
  2438. };
  2439. module_platform_driver(rouleur_codec_driver);
  2440. MODULE_DESCRIPTION("Rouleur Codec driver");
  2441. MODULE_LICENSE("GPL v2");