bengal.c 190 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/soc/qcom/fsa4480-i2c.h>
  16. #include <linux/nvmem-consumer.h>
  17. #include <sound/core.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/info.h>
  23. #include <soc/snd_event.h>
  24. #include <dsp/audio_notifier.h>
  25. #include <soc/swr-common.h>
  26. #include <dsp/q6afe-v2.h>
  27. #include <dsp/q6core.h>
  28. #include "device_event.h"
  29. #include "msm-pcm-routing-v2.h"
  30. #include "asoc/msm-cdc-pinctrl.h"
  31. #include "asoc/wcd-mbhc-v2.h"
  32. #include "codecs/wcd937x/wcd937x-mbhc.h"
  33. #include "codecs/rouleur/rouleur-mbhc.h"
  34. #include "codecs/wsa881x-analog.h"
  35. #include "codecs/wcd937x/wcd937x.h"
  36. #include "codecs/rouleur/rouleur.h"
  37. #include "codecs/bolero/bolero-cdc.h"
  38. #include <dt-bindings/sound/audio-codec-port-types.h>
  39. #include "bengal-port-config.h"
  40. #define DRV_NAME "bengal-asoc-snd"
  41. #define __CHIPSET__ "BENGAL "
  42. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  43. #define SAMPLING_RATE_8KHZ 8000
  44. #define SAMPLING_RATE_11P025KHZ 11025
  45. #define SAMPLING_RATE_16KHZ 16000
  46. #define SAMPLING_RATE_22P05KHZ 22050
  47. #define SAMPLING_RATE_32KHZ 32000
  48. #define SAMPLING_RATE_44P1KHZ 44100
  49. #define SAMPLING_RATE_48KHZ 48000
  50. #define SAMPLING_RATE_88P2KHZ 88200
  51. #define SAMPLING_RATE_96KHZ 96000
  52. #define SAMPLING_RATE_176P4KHZ 176400
  53. #define SAMPLING_RATE_192KHZ 192000
  54. #define SAMPLING_RATE_352P8KHZ 352800
  55. #define SAMPLING_RATE_384KHZ 384000
  56. #define WCD9XXX_MBHC_DEF_RLOADS 5
  57. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  58. #define ROULEUR_MBHC_DEF_BUTTONS 5
  59. #define CODEC_EXT_CLK_RATE 9600000
  60. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  61. #define DEV_NAME_STR_LEN 32
  62. #define WCD_MBHC_HS_V_MAX 1600
  63. #define ROULEUR_MBHC_HS_V_MAX 1700
  64. #define TDM_CHANNEL_MAX 8
  65. #define DEV_NAME_STR_LEN 32
  66. /* time in us to ensure LPM doesn't go in C3/C4 */
  67. #define MSM_LL_QOS_VALUE 300
  68. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  69. #define WCN_CDC_SLIM_RX_CH_MAX 2
  70. #define WCN_CDC_SLIM_TX_CH_MAX 3
  71. enum {
  72. TDM_0 = 0,
  73. TDM_1,
  74. TDM_2,
  75. TDM_3,
  76. TDM_4,
  77. TDM_5,
  78. TDM_6,
  79. TDM_7,
  80. TDM_PORT_MAX,
  81. };
  82. enum {
  83. TDM_PRI = 0,
  84. TDM_SEC,
  85. TDM_TERT,
  86. TDM_QUAT,
  87. TDM_INTERFACE_MAX,
  88. };
  89. enum {
  90. PRIM_AUX_PCM = 0,
  91. SEC_AUX_PCM,
  92. TERT_AUX_PCM,
  93. QUAT_AUX_PCM,
  94. AUX_PCM_MAX,
  95. };
  96. enum {
  97. PRIM_MI2S = 0,
  98. SEC_MI2S,
  99. TERT_MI2S,
  100. QUAT_MI2S,
  101. MI2S_MAX,
  102. };
  103. enum {
  104. RX_CDC_DMA_RX_0 = 0,
  105. RX_CDC_DMA_RX_1,
  106. RX_CDC_DMA_RX_2,
  107. RX_CDC_DMA_RX_3,
  108. RX_CDC_DMA_RX_5,
  109. CDC_DMA_RX_MAX,
  110. };
  111. enum {
  112. TX_CDC_DMA_TX_0 = 0,
  113. TX_CDC_DMA_TX_3,
  114. TX_CDC_DMA_TX_4,
  115. VA_CDC_DMA_TX_0,
  116. VA_CDC_DMA_TX_1,
  117. VA_CDC_DMA_TX_2,
  118. CDC_DMA_TX_MAX,
  119. };
  120. enum {
  121. SLIM_RX_7 = 0,
  122. SLIM_RX_MAX,
  123. };
  124. enum {
  125. SLIM_TX_7 = 0,
  126. SLIM_TX_8,
  127. SLIM_TX_MAX,
  128. };
  129. enum {
  130. AFE_LOOPBACK_TX_IDX = 0,
  131. AFE_LOOPBACK_TX_IDX_MAX,
  132. };
  133. struct msm_asoc_mach_data {
  134. struct snd_info_entry *codec_root;
  135. int usbc_en2_gpio; /* used by gpio driver API */
  136. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  137. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  138. struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
  139. atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
  140. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  141. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  142. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  143. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  144. bool is_afe_config_done;
  145. struct device_node *fsa_handle;
  146. };
  147. struct tdm_port {
  148. u32 mode;
  149. u32 channel;
  150. };
  151. enum {
  152. EXT_DISP_RX_IDX_DP = 0,
  153. EXT_DISP_RX_IDX_DP1,
  154. EXT_DISP_RX_IDX_MAX,
  155. };
  156. struct msm_wsa881x_dev_info {
  157. struct device_node *of_node;
  158. u32 index;
  159. };
  160. struct aux_codec_dev_info {
  161. struct device_node *of_node;
  162. u32 index;
  163. };
  164. struct dev_config {
  165. u32 sample_rate;
  166. u32 bit_format;
  167. u32 channels;
  168. };
  169. /* Default configuration of slimbus channels */
  170. static struct dev_config slim_rx_cfg[] = {
  171. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  172. };
  173. static struct dev_config slim_tx_cfg[] = {
  174. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  175. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  176. };
  177. static struct dev_config usb_rx_cfg = {
  178. .sample_rate = SAMPLING_RATE_48KHZ,
  179. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  180. .channels = 2,
  181. };
  182. static struct dev_config usb_tx_cfg = {
  183. .sample_rate = SAMPLING_RATE_48KHZ,
  184. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  185. .channels = 1,
  186. };
  187. static struct dev_config proxy_rx_cfg = {
  188. .sample_rate = SAMPLING_RATE_48KHZ,
  189. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  190. .channels = 2,
  191. };
  192. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  193. {
  194. AFE_API_VERSION_I2S_CONFIG,
  195. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  196. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  197. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  198. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  199. 0,
  200. },
  201. {
  202. AFE_API_VERSION_I2S_CONFIG,
  203. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  204. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  205. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  206. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  207. 0,
  208. },
  209. {
  210. AFE_API_VERSION_I2S_CONFIG,
  211. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  212. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  213. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  214. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  215. 0,
  216. },
  217. {
  218. AFE_API_VERSION_I2S_CONFIG,
  219. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  220. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  221. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  222. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  223. 0,
  224. },
  225. };
  226. struct mi2s_conf {
  227. struct mutex lock;
  228. u32 ref_cnt;
  229. u32 msm_is_mi2s_master;
  230. };
  231. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  232. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  233. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  234. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  235. };
  236. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  237. static bool va_disable;
  238. /* Default configuration of TDM channels */
  239. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  240. { /* PRI TDM */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  249. },
  250. { /* SEC TDM */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  259. },
  260. { /* TERT TDM */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  269. },
  270. { /* QUAT TDM */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  279. },
  280. };
  281. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  282. { /* PRI TDM */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  291. },
  292. { /* SEC TDM */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  301. },
  302. { /* TERT TDM */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  306. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  307. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  309. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  311. },
  312. { /* QUAT TDM */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  316. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  317. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  318. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  319. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  320. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  321. },
  322. };
  323. /* Default configuration of AUX PCM channels */
  324. static struct dev_config aux_pcm_rx_cfg[] = {
  325. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  329. };
  330. static struct dev_config aux_pcm_tx_cfg[] = {
  331. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  332. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. };
  336. /* Default configuration of MI2S channels */
  337. static struct dev_config mi2s_rx_cfg[] = {
  338. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  339. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  340. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  341. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  342. };
  343. static struct dev_config mi2s_tx_cfg[] = {
  344. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  345. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  346. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  347. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  348. };
  349. /* Default configuration of Codec DMA Interface RX */
  350. static struct dev_config cdc_dma_rx_cfg[] = {
  351. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  352. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  353. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  354. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. };
  357. /* Default configuration of Codec DMA Interface TX */
  358. static struct dev_config cdc_dma_tx_cfg[] = {
  359. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  360. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  361. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  362. [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  363. [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  364. [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  365. };
  366. static struct dev_config afe_loopback_tx_cfg[] = {
  367. [AFE_LOOPBACK_TX_IDX] = {
  368. SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  369. };
  370. static int msm_vi_feed_tx_ch = 2;
  371. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  372. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  373. "S32_LE"};
  374. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  375. "Six", "Seven", "Eight"};
  376. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  377. "KHZ_16", "KHZ_22P05",
  378. "KHZ_32", "KHZ_44P1", "KHZ_48",
  379. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  380. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  381. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  382. "Five", "Six", "Seven",
  383. "Eight"};
  384. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  385. "KHZ_48", "KHZ_176P4",
  386. "KHZ_352P8"};
  387. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  388. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  389. "Five", "Six", "Seven", "Eight"};
  390. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  391. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  392. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  393. "KHZ_48", "KHZ_96", "KHZ_192"};
  394. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  395. "Five", "Six", "Seven",
  396. "Eight"};
  397. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  398. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  399. "Five", "Six", "Seven",
  400. "Eight"};
  401. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  402. "KHZ_16", "KHZ_22P05",
  403. "KHZ_32", "KHZ_44P1", "KHZ_48",
  404. "KHZ_88P2", "KHZ_96",
  405. "KHZ_176P4", "KHZ_192",
  406. "KHZ_352P8", "KHZ_384"};
  407. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  408. "KHZ_44P1", "KHZ_48",
  409. "KHZ_88P2", "KHZ_96"};
  410. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  411. "KHZ_44P1", "KHZ_48",
  412. "KHZ_88P2", "KHZ_96"};
  413. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  414. "KHZ_44P1", "KHZ_48",
  415. "KHZ_88P2", "KHZ_96"};
  416. static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
  417. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  418. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  419. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  420. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  421. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  422. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  423. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  424. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  425. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  426. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  427. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  428. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  429. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  430. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  431. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  432. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  433. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  434. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  435. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  436. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  437. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  438. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  439. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  440. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  441. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  442. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  443. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  444. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  445. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  446. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  447. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  448. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  449. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  450. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  451. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  452. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  453. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  454. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  455. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  456. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  457. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  459. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  461. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  463. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  482. cdc_dma_sample_rate_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  484. cdc_dma_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  486. cdc_dma_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  488. cdc_dma_sample_rate_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  490. cdc_dma_sample_rate_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  492. cdc_dma_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  494. cdc_dma_sample_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  496. cdc_dma_sample_rate_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
  498. cdc_dma_sample_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
  500. cdc_dma_sample_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
  502. cdc_dma_sample_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
  507. static bool is_initial_boot;
  508. static bool codec_reg_done;
  509. static struct snd_soc_aux_dev *msm_aux_dev;
  510. static struct snd_soc_codec_conf *msm_codec_conf;
  511. static struct snd_soc_card snd_soc_card_bengal_msm;
  512. static int dmic_0_1_gpio_cnt;
  513. static int dmic_2_3_gpio_cnt;
  514. static void *def_wcd_mbhc_cal(void);
  515. static void *def_rouleur_mbhc_cal(void);
  516. /*
  517. * Need to report LINEIN
  518. * if R/L channel impedance is larger than 5K ohm
  519. */
  520. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  521. .read_fw_bin = false,
  522. .calibration = NULL,
  523. .detect_extn_cable = true,
  524. .mono_stero_detection = false,
  525. .swap_gnd_mic = NULL,
  526. .hs_ext_micbias = true,
  527. .key_code[0] = KEY_MEDIA,
  528. .key_code[1] = KEY_VOICECOMMAND,
  529. .key_code[2] = KEY_VOLUMEUP,
  530. .key_code[3] = KEY_VOLUMEDOWN,
  531. .key_code[4] = 0,
  532. .key_code[5] = 0,
  533. .key_code[6] = 0,
  534. .key_code[7] = 0,
  535. .linein_th = 5000,
  536. .moisture_en = false,
  537. .mbhc_micbias = MIC_BIAS_2,
  538. .anc_micbias = MIC_BIAS_2,
  539. .enable_anc_mic_detect = false,
  540. .moisture_duty_cycle_en = true,
  541. };
  542. static inline int param_is_mask(int p)
  543. {
  544. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  545. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  546. }
  547. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  548. int n)
  549. {
  550. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  551. }
  552. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  553. unsigned int bit)
  554. {
  555. if (bit >= SNDRV_MASK_MAX)
  556. return;
  557. if (param_is_mask(n)) {
  558. struct snd_mask *m = param_to_mask(p, n);
  559. m->bits[0] = 0;
  560. m->bits[1] = 0;
  561. m->bits[bit >> 5] |= (1 << (bit & 31));
  562. }
  563. }
  564. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  565. struct snd_ctl_elem_value *ucontrol)
  566. {
  567. int sample_rate_val = 0;
  568. switch (usb_rx_cfg.sample_rate) {
  569. case SAMPLING_RATE_384KHZ:
  570. sample_rate_val = 12;
  571. break;
  572. case SAMPLING_RATE_352P8KHZ:
  573. sample_rate_val = 11;
  574. break;
  575. case SAMPLING_RATE_192KHZ:
  576. sample_rate_val = 10;
  577. break;
  578. case SAMPLING_RATE_176P4KHZ:
  579. sample_rate_val = 9;
  580. break;
  581. case SAMPLING_RATE_96KHZ:
  582. sample_rate_val = 8;
  583. break;
  584. case SAMPLING_RATE_88P2KHZ:
  585. sample_rate_val = 7;
  586. break;
  587. case SAMPLING_RATE_48KHZ:
  588. sample_rate_val = 6;
  589. break;
  590. case SAMPLING_RATE_44P1KHZ:
  591. sample_rate_val = 5;
  592. break;
  593. case SAMPLING_RATE_32KHZ:
  594. sample_rate_val = 4;
  595. break;
  596. case SAMPLING_RATE_22P05KHZ:
  597. sample_rate_val = 3;
  598. break;
  599. case SAMPLING_RATE_16KHZ:
  600. sample_rate_val = 2;
  601. break;
  602. case SAMPLING_RATE_11P025KHZ:
  603. sample_rate_val = 1;
  604. break;
  605. case SAMPLING_RATE_8KHZ:
  606. default:
  607. sample_rate_val = 0;
  608. break;
  609. }
  610. ucontrol->value.integer.value[0] = sample_rate_val;
  611. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  612. usb_rx_cfg.sample_rate);
  613. return 0;
  614. }
  615. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  616. struct snd_ctl_elem_value *ucontrol)
  617. {
  618. switch (ucontrol->value.integer.value[0]) {
  619. case 12:
  620. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  621. break;
  622. case 11:
  623. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  624. break;
  625. case 10:
  626. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  627. break;
  628. case 9:
  629. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  630. break;
  631. case 8:
  632. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  633. break;
  634. case 7:
  635. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  636. break;
  637. case 6:
  638. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  639. break;
  640. case 5:
  641. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  642. break;
  643. case 4:
  644. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  645. break;
  646. case 3:
  647. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  648. break;
  649. case 2:
  650. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  651. break;
  652. case 1:
  653. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  654. break;
  655. case 0:
  656. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  657. break;
  658. default:
  659. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  660. break;
  661. }
  662. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  663. __func__, ucontrol->value.integer.value[0],
  664. usb_rx_cfg.sample_rate);
  665. return 0;
  666. }
  667. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  668. struct snd_ctl_elem_value *ucontrol)
  669. {
  670. int sample_rate_val = 0;
  671. switch (usb_tx_cfg.sample_rate) {
  672. case SAMPLING_RATE_384KHZ:
  673. sample_rate_val = 12;
  674. break;
  675. case SAMPLING_RATE_352P8KHZ:
  676. sample_rate_val = 11;
  677. break;
  678. case SAMPLING_RATE_192KHZ:
  679. sample_rate_val = 10;
  680. break;
  681. case SAMPLING_RATE_176P4KHZ:
  682. sample_rate_val = 9;
  683. break;
  684. case SAMPLING_RATE_96KHZ:
  685. sample_rate_val = 8;
  686. break;
  687. case SAMPLING_RATE_88P2KHZ:
  688. sample_rate_val = 7;
  689. break;
  690. case SAMPLING_RATE_48KHZ:
  691. sample_rate_val = 6;
  692. break;
  693. case SAMPLING_RATE_44P1KHZ:
  694. sample_rate_val = 5;
  695. break;
  696. case SAMPLING_RATE_32KHZ:
  697. sample_rate_val = 4;
  698. break;
  699. case SAMPLING_RATE_22P05KHZ:
  700. sample_rate_val = 3;
  701. break;
  702. case SAMPLING_RATE_16KHZ:
  703. sample_rate_val = 2;
  704. break;
  705. case SAMPLING_RATE_11P025KHZ:
  706. sample_rate_val = 1;
  707. break;
  708. case SAMPLING_RATE_8KHZ:
  709. sample_rate_val = 0;
  710. break;
  711. default:
  712. sample_rate_val = 6;
  713. break;
  714. }
  715. ucontrol->value.integer.value[0] = sample_rate_val;
  716. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  717. usb_tx_cfg.sample_rate);
  718. return 0;
  719. }
  720. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  721. struct snd_ctl_elem_value *ucontrol)
  722. {
  723. switch (ucontrol->value.integer.value[0]) {
  724. case 12:
  725. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  726. break;
  727. case 11:
  728. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  729. break;
  730. case 10:
  731. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  732. break;
  733. case 9:
  734. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  735. break;
  736. case 8:
  737. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  738. break;
  739. case 7:
  740. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  741. break;
  742. case 6:
  743. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  744. break;
  745. case 5:
  746. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  747. break;
  748. case 4:
  749. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  750. break;
  751. case 3:
  752. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  753. break;
  754. case 2:
  755. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  756. break;
  757. case 1:
  758. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  759. break;
  760. case 0:
  761. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  762. break;
  763. default:
  764. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  765. break;
  766. }
  767. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  768. __func__, ucontrol->value.integer.value[0],
  769. usb_tx_cfg.sample_rate);
  770. return 0;
  771. }
  772. static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
  773. struct snd_ctl_elem_value *ucontrol)
  774. {
  775. pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
  776. afe_loopback_tx_cfg[0].channels);
  777. ucontrol->value.enumerated.item[0] =
  778. afe_loopback_tx_cfg[0].channels - 1;
  779. return 0;
  780. }
  781. static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
  782. struct snd_ctl_elem_value *ucontrol)
  783. {
  784. afe_loopback_tx_cfg[0].channels =
  785. ucontrol->value.enumerated.item[0] + 1;
  786. pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
  787. afe_loopback_tx_cfg[0].channels);
  788. return 1;
  789. }
  790. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  791. struct snd_ctl_elem_value *ucontrol)
  792. {
  793. switch (usb_rx_cfg.bit_format) {
  794. case SNDRV_PCM_FORMAT_S32_LE:
  795. ucontrol->value.integer.value[0] = 3;
  796. break;
  797. case SNDRV_PCM_FORMAT_S24_3LE:
  798. ucontrol->value.integer.value[0] = 2;
  799. break;
  800. case SNDRV_PCM_FORMAT_S24_LE:
  801. ucontrol->value.integer.value[0] = 1;
  802. break;
  803. case SNDRV_PCM_FORMAT_S16_LE:
  804. default:
  805. ucontrol->value.integer.value[0] = 0;
  806. break;
  807. }
  808. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  809. __func__, usb_rx_cfg.bit_format,
  810. ucontrol->value.integer.value[0]);
  811. return 0;
  812. }
  813. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  814. struct snd_ctl_elem_value *ucontrol)
  815. {
  816. int rc = 0;
  817. switch (ucontrol->value.integer.value[0]) {
  818. case 3:
  819. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  820. break;
  821. case 2:
  822. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  823. break;
  824. case 1:
  825. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  826. break;
  827. case 0:
  828. default:
  829. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  830. break;
  831. }
  832. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  833. __func__, usb_rx_cfg.bit_format,
  834. ucontrol->value.integer.value[0]);
  835. return rc;
  836. }
  837. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  838. struct snd_ctl_elem_value *ucontrol)
  839. {
  840. switch (usb_tx_cfg.bit_format) {
  841. case SNDRV_PCM_FORMAT_S32_LE:
  842. ucontrol->value.integer.value[0] = 3;
  843. break;
  844. case SNDRV_PCM_FORMAT_S24_3LE:
  845. ucontrol->value.integer.value[0] = 2;
  846. break;
  847. case SNDRV_PCM_FORMAT_S24_LE:
  848. ucontrol->value.integer.value[0] = 1;
  849. break;
  850. case SNDRV_PCM_FORMAT_S16_LE:
  851. default:
  852. ucontrol->value.integer.value[0] = 0;
  853. break;
  854. }
  855. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  856. __func__, usb_tx_cfg.bit_format,
  857. ucontrol->value.integer.value[0]);
  858. return 0;
  859. }
  860. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  861. struct snd_ctl_elem_value *ucontrol)
  862. {
  863. int rc = 0;
  864. switch (ucontrol->value.integer.value[0]) {
  865. case 3:
  866. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  867. break;
  868. case 2:
  869. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  870. break;
  871. case 1:
  872. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  873. break;
  874. case 0:
  875. default:
  876. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  877. break;
  878. }
  879. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  880. __func__, usb_tx_cfg.bit_format,
  881. ucontrol->value.integer.value[0]);
  882. return rc;
  883. }
  884. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  885. struct snd_ctl_elem_value *ucontrol)
  886. {
  887. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  888. usb_rx_cfg.channels);
  889. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  890. return 0;
  891. }
  892. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  893. struct snd_ctl_elem_value *ucontrol)
  894. {
  895. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  896. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  897. return 1;
  898. }
  899. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  900. struct snd_ctl_elem_value *ucontrol)
  901. {
  902. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  903. usb_tx_cfg.channels);
  904. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  905. return 0;
  906. }
  907. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  908. struct snd_ctl_elem_value *ucontrol)
  909. {
  910. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  911. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  912. return 1;
  913. }
  914. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  915. struct snd_ctl_elem_value *ucontrol)
  916. {
  917. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  918. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  919. ucontrol->value.integer.value[0]);
  920. return 0;
  921. }
  922. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  923. struct snd_ctl_elem_value *ucontrol)
  924. {
  925. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  926. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  927. return 1;
  928. }
  929. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  930. struct snd_ctl_elem_value *ucontrol)
  931. {
  932. pr_debug("%s: proxy_rx channels = %d\n",
  933. __func__, proxy_rx_cfg.channels);
  934. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  935. return 0;
  936. }
  937. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  938. struct snd_ctl_elem_value *ucontrol)
  939. {
  940. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  941. pr_debug("%s: proxy_rx channels = %d\n",
  942. __func__, proxy_rx_cfg.channels);
  943. return 1;
  944. }
  945. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  946. struct tdm_port *port)
  947. {
  948. if (port) {
  949. if (strnstr(kcontrol->id.name, "PRI",
  950. sizeof(kcontrol->id.name))) {
  951. port->mode = TDM_PRI;
  952. } else if (strnstr(kcontrol->id.name, "SEC",
  953. sizeof(kcontrol->id.name))) {
  954. port->mode = TDM_SEC;
  955. } else if (strnstr(kcontrol->id.name, "TERT",
  956. sizeof(kcontrol->id.name))) {
  957. port->mode = TDM_TERT;
  958. } else if (strnstr(kcontrol->id.name, "QUAT",
  959. sizeof(kcontrol->id.name))) {
  960. port->mode = TDM_QUAT;
  961. } else {
  962. pr_err("%s: unsupported mode in: %s\n",
  963. __func__, kcontrol->id.name);
  964. return -EINVAL;
  965. }
  966. if (strnstr(kcontrol->id.name, "RX_0",
  967. sizeof(kcontrol->id.name)) ||
  968. strnstr(kcontrol->id.name, "TX_0",
  969. sizeof(kcontrol->id.name))) {
  970. port->channel = TDM_0;
  971. } else if (strnstr(kcontrol->id.name, "RX_1",
  972. sizeof(kcontrol->id.name)) ||
  973. strnstr(kcontrol->id.name, "TX_1",
  974. sizeof(kcontrol->id.name))) {
  975. port->channel = TDM_1;
  976. } else if (strnstr(kcontrol->id.name, "RX_2",
  977. sizeof(kcontrol->id.name)) ||
  978. strnstr(kcontrol->id.name, "TX_2",
  979. sizeof(kcontrol->id.name))) {
  980. port->channel = TDM_2;
  981. } else if (strnstr(kcontrol->id.name, "RX_3",
  982. sizeof(kcontrol->id.name)) ||
  983. strnstr(kcontrol->id.name, "TX_3",
  984. sizeof(kcontrol->id.name))) {
  985. port->channel = TDM_3;
  986. } else if (strnstr(kcontrol->id.name, "RX_4",
  987. sizeof(kcontrol->id.name)) ||
  988. strnstr(kcontrol->id.name, "TX_4",
  989. sizeof(kcontrol->id.name))) {
  990. port->channel = TDM_4;
  991. } else if (strnstr(kcontrol->id.name, "RX_5",
  992. sizeof(kcontrol->id.name)) ||
  993. strnstr(kcontrol->id.name, "TX_5",
  994. sizeof(kcontrol->id.name))) {
  995. port->channel = TDM_5;
  996. } else if (strnstr(kcontrol->id.name, "RX_6",
  997. sizeof(kcontrol->id.name)) ||
  998. strnstr(kcontrol->id.name, "TX_6",
  999. sizeof(kcontrol->id.name))) {
  1000. port->channel = TDM_6;
  1001. } else if (strnstr(kcontrol->id.name, "RX_7",
  1002. sizeof(kcontrol->id.name)) ||
  1003. strnstr(kcontrol->id.name, "TX_7",
  1004. sizeof(kcontrol->id.name))) {
  1005. port->channel = TDM_7;
  1006. } else {
  1007. pr_err("%s: unsupported channel in: %s\n",
  1008. __func__, kcontrol->id.name);
  1009. return -EINVAL;
  1010. }
  1011. } else {
  1012. return -EINVAL;
  1013. }
  1014. return 0;
  1015. }
  1016. static int tdm_get_sample_rate(int value)
  1017. {
  1018. int sample_rate = 0;
  1019. switch (value) {
  1020. case 0:
  1021. sample_rate = SAMPLING_RATE_8KHZ;
  1022. break;
  1023. case 1:
  1024. sample_rate = SAMPLING_RATE_16KHZ;
  1025. break;
  1026. case 2:
  1027. sample_rate = SAMPLING_RATE_32KHZ;
  1028. break;
  1029. case 3:
  1030. sample_rate = SAMPLING_RATE_48KHZ;
  1031. break;
  1032. case 4:
  1033. sample_rate = SAMPLING_RATE_176P4KHZ;
  1034. break;
  1035. case 5:
  1036. sample_rate = SAMPLING_RATE_352P8KHZ;
  1037. break;
  1038. default:
  1039. sample_rate = SAMPLING_RATE_48KHZ;
  1040. break;
  1041. }
  1042. return sample_rate;
  1043. }
  1044. static int tdm_get_sample_rate_val(int sample_rate)
  1045. {
  1046. int sample_rate_val = 0;
  1047. switch (sample_rate) {
  1048. case SAMPLING_RATE_8KHZ:
  1049. sample_rate_val = 0;
  1050. break;
  1051. case SAMPLING_RATE_16KHZ:
  1052. sample_rate_val = 1;
  1053. break;
  1054. case SAMPLING_RATE_32KHZ:
  1055. sample_rate_val = 2;
  1056. break;
  1057. case SAMPLING_RATE_48KHZ:
  1058. sample_rate_val = 3;
  1059. break;
  1060. case SAMPLING_RATE_176P4KHZ:
  1061. sample_rate_val = 4;
  1062. break;
  1063. case SAMPLING_RATE_352P8KHZ:
  1064. sample_rate_val = 5;
  1065. break;
  1066. default:
  1067. sample_rate_val = 3;
  1068. break;
  1069. }
  1070. return sample_rate_val;
  1071. }
  1072. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1073. struct snd_ctl_elem_value *ucontrol)
  1074. {
  1075. struct tdm_port port;
  1076. int ret = tdm_get_port_idx(kcontrol, &port);
  1077. if (ret) {
  1078. pr_err("%s: unsupported control: %s\n",
  1079. __func__, kcontrol->id.name);
  1080. } else {
  1081. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1082. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  1083. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1084. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1085. ucontrol->value.enumerated.item[0]);
  1086. }
  1087. return ret;
  1088. }
  1089. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1090. struct snd_ctl_elem_value *ucontrol)
  1091. {
  1092. struct tdm_port port;
  1093. int ret = tdm_get_port_idx(kcontrol, &port);
  1094. if (ret) {
  1095. pr_err("%s: unsupported control: %s\n",
  1096. __func__, kcontrol->id.name);
  1097. } else {
  1098. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  1099. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1100. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1101. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1102. ucontrol->value.enumerated.item[0]);
  1103. }
  1104. return ret;
  1105. }
  1106. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1107. struct snd_ctl_elem_value *ucontrol)
  1108. {
  1109. struct tdm_port port;
  1110. int ret = tdm_get_port_idx(kcontrol, &port);
  1111. if (ret) {
  1112. pr_err("%s: unsupported control: %s\n",
  1113. __func__, kcontrol->id.name);
  1114. } else {
  1115. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1116. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1117. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1118. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1119. ucontrol->value.enumerated.item[0]);
  1120. }
  1121. return ret;
  1122. }
  1123. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1124. struct snd_ctl_elem_value *ucontrol)
  1125. {
  1126. struct tdm_port port;
  1127. int ret = tdm_get_port_idx(kcontrol, &port);
  1128. if (ret) {
  1129. pr_err("%s: unsupported control: %s\n",
  1130. __func__, kcontrol->id.name);
  1131. } else {
  1132. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1133. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1134. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1135. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1136. ucontrol->value.enumerated.item[0]);
  1137. }
  1138. return ret;
  1139. }
  1140. static int tdm_get_format(int value)
  1141. {
  1142. int format = 0;
  1143. switch (value) {
  1144. case 0:
  1145. format = SNDRV_PCM_FORMAT_S16_LE;
  1146. break;
  1147. case 1:
  1148. format = SNDRV_PCM_FORMAT_S24_LE;
  1149. break;
  1150. case 2:
  1151. format = SNDRV_PCM_FORMAT_S32_LE;
  1152. break;
  1153. default:
  1154. format = SNDRV_PCM_FORMAT_S16_LE;
  1155. break;
  1156. }
  1157. return format;
  1158. }
  1159. static int tdm_get_format_val(int format)
  1160. {
  1161. int value = 0;
  1162. switch (format) {
  1163. case SNDRV_PCM_FORMAT_S16_LE:
  1164. value = 0;
  1165. break;
  1166. case SNDRV_PCM_FORMAT_S24_LE:
  1167. value = 1;
  1168. break;
  1169. case SNDRV_PCM_FORMAT_S32_LE:
  1170. value = 2;
  1171. break;
  1172. default:
  1173. value = 0;
  1174. break;
  1175. }
  1176. return value;
  1177. }
  1178. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1179. struct snd_ctl_elem_value *ucontrol)
  1180. {
  1181. struct tdm_port port;
  1182. int ret = tdm_get_port_idx(kcontrol, &port);
  1183. if (ret) {
  1184. pr_err("%s: unsupported control: %s\n",
  1185. __func__, kcontrol->id.name);
  1186. } else {
  1187. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1188. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1189. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1190. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1191. ucontrol->value.enumerated.item[0]);
  1192. }
  1193. return ret;
  1194. }
  1195. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1196. struct snd_ctl_elem_value *ucontrol)
  1197. {
  1198. struct tdm_port port;
  1199. int ret = tdm_get_port_idx(kcontrol, &port);
  1200. if (ret) {
  1201. pr_err("%s: unsupported control: %s\n",
  1202. __func__, kcontrol->id.name);
  1203. } else {
  1204. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1205. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1206. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1207. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1208. ucontrol->value.enumerated.item[0]);
  1209. }
  1210. return ret;
  1211. }
  1212. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1213. struct snd_ctl_elem_value *ucontrol)
  1214. {
  1215. struct tdm_port port;
  1216. int ret = tdm_get_port_idx(kcontrol, &port);
  1217. if (ret) {
  1218. pr_err("%s: unsupported control: %s\n",
  1219. __func__, kcontrol->id.name);
  1220. } else {
  1221. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1222. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1223. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1224. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1225. ucontrol->value.enumerated.item[0]);
  1226. }
  1227. return ret;
  1228. }
  1229. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1230. struct snd_ctl_elem_value *ucontrol)
  1231. {
  1232. struct tdm_port port;
  1233. int ret = tdm_get_port_idx(kcontrol, &port);
  1234. if (ret) {
  1235. pr_err("%s: unsupported control: %s\n",
  1236. __func__, kcontrol->id.name);
  1237. } else {
  1238. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1239. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1240. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1241. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1242. ucontrol->value.enumerated.item[0]);
  1243. }
  1244. return ret;
  1245. }
  1246. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1247. struct snd_ctl_elem_value *ucontrol)
  1248. {
  1249. struct tdm_port port;
  1250. int ret = tdm_get_port_idx(kcontrol, &port);
  1251. if (ret) {
  1252. pr_err("%s: unsupported control: %s\n",
  1253. __func__, kcontrol->id.name);
  1254. } else {
  1255. ucontrol->value.enumerated.item[0] =
  1256. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1257. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1258. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1259. ucontrol->value.enumerated.item[0]);
  1260. }
  1261. return ret;
  1262. }
  1263. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1264. struct snd_ctl_elem_value *ucontrol)
  1265. {
  1266. struct tdm_port port;
  1267. int ret = tdm_get_port_idx(kcontrol, &port);
  1268. if (ret) {
  1269. pr_err("%s: unsupported control: %s\n",
  1270. __func__, kcontrol->id.name);
  1271. } else {
  1272. tdm_rx_cfg[port.mode][port.channel].channels =
  1273. ucontrol->value.enumerated.item[0] + 1;
  1274. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1275. tdm_rx_cfg[port.mode][port.channel].channels,
  1276. ucontrol->value.enumerated.item[0] + 1);
  1277. }
  1278. return ret;
  1279. }
  1280. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1281. struct snd_ctl_elem_value *ucontrol)
  1282. {
  1283. struct tdm_port port;
  1284. int ret = tdm_get_port_idx(kcontrol, &port);
  1285. if (ret) {
  1286. pr_err("%s: unsupported control: %s\n",
  1287. __func__, kcontrol->id.name);
  1288. } else {
  1289. ucontrol->value.enumerated.item[0] =
  1290. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1291. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1292. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1293. ucontrol->value.enumerated.item[0]);
  1294. }
  1295. return ret;
  1296. }
  1297. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1298. struct snd_ctl_elem_value *ucontrol)
  1299. {
  1300. struct tdm_port port;
  1301. int ret = tdm_get_port_idx(kcontrol, &port);
  1302. if (ret) {
  1303. pr_err("%s: unsupported control: %s\n",
  1304. __func__, kcontrol->id.name);
  1305. } else {
  1306. tdm_tx_cfg[port.mode][port.channel].channels =
  1307. ucontrol->value.enumerated.item[0] + 1;
  1308. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1309. tdm_tx_cfg[port.mode][port.channel].channels,
  1310. ucontrol->value.enumerated.item[0] + 1);
  1311. }
  1312. return ret;
  1313. }
  1314. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1315. {
  1316. int idx = 0;
  1317. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1318. sizeof("PRIM_AUX_PCM"))) {
  1319. idx = PRIM_AUX_PCM;
  1320. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1321. sizeof("SEC_AUX_PCM"))) {
  1322. idx = SEC_AUX_PCM;
  1323. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1324. sizeof("TERT_AUX_PCM"))) {
  1325. idx = TERT_AUX_PCM;
  1326. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  1327. sizeof("QUAT_AUX_PCM"))) {
  1328. idx = QUAT_AUX_PCM;
  1329. } else {
  1330. pr_err("%s: unsupported port: %s\n",
  1331. __func__, kcontrol->id.name);
  1332. idx = -EINVAL;
  1333. }
  1334. return idx;
  1335. }
  1336. static int aux_pcm_get_sample_rate(int value)
  1337. {
  1338. int sample_rate = 0;
  1339. switch (value) {
  1340. case 1:
  1341. sample_rate = SAMPLING_RATE_16KHZ;
  1342. break;
  1343. case 0:
  1344. default:
  1345. sample_rate = SAMPLING_RATE_8KHZ;
  1346. break;
  1347. }
  1348. return sample_rate;
  1349. }
  1350. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1351. {
  1352. int sample_rate_val = 0;
  1353. switch (sample_rate) {
  1354. case SAMPLING_RATE_16KHZ:
  1355. sample_rate_val = 1;
  1356. break;
  1357. case SAMPLING_RATE_8KHZ:
  1358. default:
  1359. sample_rate_val = 0;
  1360. break;
  1361. }
  1362. return sample_rate_val;
  1363. }
  1364. static int mi2s_auxpcm_get_format(int value)
  1365. {
  1366. int format = 0;
  1367. switch (value) {
  1368. case 0:
  1369. format = SNDRV_PCM_FORMAT_S16_LE;
  1370. break;
  1371. case 1:
  1372. format = SNDRV_PCM_FORMAT_S24_LE;
  1373. break;
  1374. case 2:
  1375. format = SNDRV_PCM_FORMAT_S24_3LE;
  1376. break;
  1377. case 3:
  1378. format = SNDRV_PCM_FORMAT_S32_LE;
  1379. break;
  1380. default:
  1381. format = SNDRV_PCM_FORMAT_S16_LE;
  1382. break;
  1383. }
  1384. return format;
  1385. }
  1386. static int mi2s_auxpcm_get_format_value(int format)
  1387. {
  1388. int value = 0;
  1389. switch (format) {
  1390. case SNDRV_PCM_FORMAT_S16_LE:
  1391. value = 0;
  1392. break;
  1393. case SNDRV_PCM_FORMAT_S24_LE:
  1394. value = 1;
  1395. break;
  1396. case SNDRV_PCM_FORMAT_S24_3LE:
  1397. value = 2;
  1398. break;
  1399. case SNDRV_PCM_FORMAT_S32_LE:
  1400. value = 3;
  1401. break;
  1402. default:
  1403. value = 0;
  1404. break;
  1405. }
  1406. return value;
  1407. }
  1408. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1409. struct snd_ctl_elem_value *ucontrol)
  1410. {
  1411. int idx = aux_pcm_get_port_idx(kcontrol);
  1412. if (idx < 0)
  1413. return idx;
  1414. ucontrol->value.enumerated.item[0] =
  1415. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1416. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1417. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1418. ucontrol->value.enumerated.item[0]);
  1419. return 0;
  1420. }
  1421. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1422. struct snd_ctl_elem_value *ucontrol)
  1423. {
  1424. int idx = aux_pcm_get_port_idx(kcontrol);
  1425. if (idx < 0)
  1426. return idx;
  1427. aux_pcm_rx_cfg[idx].sample_rate =
  1428. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1429. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1430. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1431. ucontrol->value.enumerated.item[0]);
  1432. return 0;
  1433. }
  1434. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1435. struct snd_ctl_elem_value *ucontrol)
  1436. {
  1437. int idx = aux_pcm_get_port_idx(kcontrol);
  1438. if (idx < 0)
  1439. return idx;
  1440. ucontrol->value.enumerated.item[0] =
  1441. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1442. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1443. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1444. ucontrol->value.enumerated.item[0]);
  1445. return 0;
  1446. }
  1447. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1448. struct snd_ctl_elem_value *ucontrol)
  1449. {
  1450. int idx = aux_pcm_get_port_idx(kcontrol);
  1451. if (idx < 0)
  1452. return idx;
  1453. aux_pcm_tx_cfg[idx].sample_rate =
  1454. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1455. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1456. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1457. ucontrol->value.enumerated.item[0]);
  1458. return 0;
  1459. }
  1460. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  1461. struct snd_ctl_elem_value *ucontrol)
  1462. {
  1463. int idx = aux_pcm_get_port_idx(kcontrol);
  1464. if (idx < 0)
  1465. return idx;
  1466. ucontrol->value.enumerated.item[0] =
  1467. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  1468. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1469. idx, aux_pcm_rx_cfg[idx].bit_format,
  1470. ucontrol->value.enumerated.item[0]);
  1471. return 0;
  1472. }
  1473. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  1474. struct snd_ctl_elem_value *ucontrol)
  1475. {
  1476. int idx = aux_pcm_get_port_idx(kcontrol);
  1477. if (idx < 0)
  1478. return idx;
  1479. aux_pcm_rx_cfg[idx].bit_format =
  1480. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1481. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1482. idx, aux_pcm_rx_cfg[idx].bit_format,
  1483. ucontrol->value.enumerated.item[0]);
  1484. return 0;
  1485. }
  1486. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  1487. struct snd_ctl_elem_value *ucontrol)
  1488. {
  1489. int idx = aux_pcm_get_port_idx(kcontrol);
  1490. if (idx < 0)
  1491. return idx;
  1492. ucontrol->value.enumerated.item[0] =
  1493. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  1494. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1495. idx, aux_pcm_tx_cfg[idx].bit_format,
  1496. ucontrol->value.enumerated.item[0]);
  1497. return 0;
  1498. }
  1499. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  1500. struct snd_ctl_elem_value *ucontrol)
  1501. {
  1502. int idx = aux_pcm_get_port_idx(kcontrol);
  1503. if (idx < 0)
  1504. return idx;
  1505. aux_pcm_tx_cfg[idx].bit_format =
  1506. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1507. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1508. idx, aux_pcm_tx_cfg[idx].bit_format,
  1509. ucontrol->value.enumerated.item[0]);
  1510. return 0;
  1511. }
  1512. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1513. {
  1514. int idx = 0;
  1515. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1516. sizeof("PRIM_MI2S_RX"))) {
  1517. idx = PRIM_MI2S;
  1518. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1519. sizeof("SEC_MI2S_RX"))) {
  1520. idx = SEC_MI2S;
  1521. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1522. sizeof("TERT_MI2S_RX"))) {
  1523. idx = TERT_MI2S;
  1524. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  1525. sizeof("QUAT_MI2S_RX"))) {
  1526. idx = QUAT_MI2S;
  1527. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1528. sizeof("PRIM_MI2S_TX"))) {
  1529. idx = PRIM_MI2S;
  1530. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1531. sizeof("SEC_MI2S_TX"))) {
  1532. idx = SEC_MI2S;
  1533. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1534. sizeof("TERT_MI2S_TX"))) {
  1535. idx = TERT_MI2S;
  1536. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  1537. sizeof("QUAT_MI2S_TX"))) {
  1538. idx = QUAT_MI2S;
  1539. } else {
  1540. pr_err("%s: unsupported channel: %s\n",
  1541. __func__, kcontrol->id.name);
  1542. idx = -EINVAL;
  1543. }
  1544. return idx;
  1545. }
  1546. static int mi2s_get_sample_rate(int value)
  1547. {
  1548. int sample_rate = 0;
  1549. switch (value) {
  1550. case 0:
  1551. sample_rate = SAMPLING_RATE_8KHZ;
  1552. break;
  1553. case 1:
  1554. sample_rate = SAMPLING_RATE_11P025KHZ;
  1555. break;
  1556. case 2:
  1557. sample_rate = SAMPLING_RATE_16KHZ;
  1558. break;
  1559. case 3:
  1560. sample_rate = SAMPLING_RATE_22P05KHZ;
  1561. break;
  1562. case 4:
  1563. sample_rate = SAMPLING_RATE_32KHZ;
  1564. break;
  1565. case 5:
  1566. sample_rate = SAMPLING_RATE_44P1KHZ;
  1567. break;
  1568. case 6:
  1569. sample_rate = SAMPLING_RATE_48KHZ;
  1570. break;
  1571. case 7:
  1572. sample_rate = SAMPLING_RATE_96KHZ;
  1573. break;
  1574. case 8:
  1575. sample_rate = SAMPLING_RATE_192KHZ;
  1576. break;
  1577. default:
  1578. sample_rate = SAMPLING_RATE_48KHZ;
  1579. break;
  1580. }
  1581. return sample_rate;
  1582. }
  1583. static int mi2s_get_sample_rate_val(int sample_rate)
  1584. {
  1585. int sample_rate_val = 0;
  1586. switch (sample_rate) {
  1587. case SAMPLING_RATE_8KHZ:
  1588. sample_rate_val = 0;
  1589. break;
  1590. case SAMPLING_RATE_11P025KHZ:
  1591. sample_rate_val = 1;
  1592. break;
  1593. case SAMPLING_RATE_16KHZ:
  1594. sample_rate_val = 2;
  1595. break;
  1596. case SAMPLING_RATE_22P05KHZ:
  1597. sample_rate_val = 3;
  1598. break;
  1599. case SAMPLING_RATE_32KHZ:
  1600. sample_rate_val = 4;
  1601. break;
  1602. case SAMPLING_RATE_44P1KHZ:
  1603. sample_rate_val = 5;
  1604. break;
  1605. case SAMPLING_RATE_48KHZ:
  1606. sample_rate_val = 6;
  1607. break;
  1608. case SAMPLING_RATE_96KHZ:
  1609. sample_rate_val = 7;
  1610. break;
  1611. case SAMPLING_RATE_192KHZ:
  1612. sample_rate_val = 8;
  1613. break;
  1614. default:
  1615. sample_rate_val = 6;
  1616. break;
  1617. }
  1618. return sample_rate_val;
  1619. }
  1620. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1621. struct snd_ctl_elem_value *ucontrol)
  1622. {
  1623. int idx = mi2s_get_port_idx(kcontrol);
  1624. if (idx < 0)
  1625. return idx;
  1626. ucontrol->value.enumerated.item[0] =
  1627. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1628. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1629. idx, mi2s_rx_cfg[idx].sample_rate,
  1630. ucontrol->value.enumerated.item[0]);
  1631. return 0;
  1632. }
  1633. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1634. struct snd_ctl_elem_value *ucontrol)
  1635. {
  1636. int idx = mi2s_get_port_idx(kcontrol);
  1637. if (idx < 0)
  1638. return idx;
  1639. mi2s_rx_cfg[idx].sample_rate =
  1640. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1641. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1642. idx, mi2s_rx_cfg[idx].sample_rate,
  1643. ucontrol->value.enumerated.item[0]);
  1644. return 0;
  1645. }
  1646. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1647. struct snd_ctl_elem_value *ucontrol)
  1648. {
  1649. int idx = mi2s_get_port_idx(kcontrol);
  1650. if (idx < 0)
  1651. return idx;
  1652. ucontrol->value.enumerated.item[0] =
  1653. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1654. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1655. idx, mi2s_tx_cfg[idx].sample_rate,
  1656. ucontrol->value.enumerated.item[0]);
  1657. return 0;
  1658. }
  1659. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1660. struct snd_ctl_elem_value *ucontrol)
  1661. {
  1662. int idx = mi2s_get_port_idx(kcontrol);
  1663. if (idx < 0)
  1664. return idx;
  1665. mi2s_tx_cfg[idx].sample_rate =
  1666. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1667. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1668. idx, mi2s_tx_cfg[idx].sample_rate,
  1669. ucontrol->value.enumerated.item[0]);
  1670. return 0;
  1671. }
  1672. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1673. struct snd_ctl_elem_value *ucontrol)
  1674. {
  1675. int idx = mi2s_get_port_idx(kcontrol);
  1676. if (idx < 0)
  1677. return idx;
  1678. ucontrol->value.enumerated.item[0] =
  1679. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1680. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1681. idx, mi2s_rx_cfg[idx].bit_format,
  1682. ucontrol->value.enumerated.item[0]);
  1683. return 0;
  1684. }
  1685. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1686. struct snd_ctl_elem_value *ucontrol)
  1687. {
  1688. int idx = mi2s_get_port_idx(kcontrol);
  1689. if (idx < 0)
  1690. return idx;
  1691. mi2s_rx_cfg[idx].bit_format =
  1692. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1693. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1694. idx, mi2s_rx_cfg[idx].bit_format,
  1695. ucontrol->value.enumerated.item[0]);
  1696. return 0;
  1697. }
  1698. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1699. struct snd_ctl_elem_value *ucontrol)
  1700. {
  1701. int idx = mi2s_get_port_idx(kcontrol);
  1702. if (idx < 0)
  1703. return idx;
  1704. ucontrol->value.enumerated.item[0] =
  1705. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1706. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1707. idx, mi2s_tx_cfg[idx].bit_format,
  1708. ucontrol->value.enumerated.item[0]);
  1709. return 0;
  1710. }
  1711. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1712. struct snd_ctl_elem_value *ucontrol)
  1713. {
  1714. int idx = mi2s_get_port_idx(kcontrol);
  1715. if (idx < 0)
  1716. return idx;
  1717. mi2s_tx_cfg[idx].bit_format =
  1718. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1719. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1720. idx, mi2s_tx_cfg[idx].bit_format,
  1721. ucontrol->value.enumerated.item[0]);
  1722. return 0;
  1723. }
  1724. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1725. struct snd_ctl_elem_value *ucontrol)
  1726. {
  1727. int idx = mi2s_get_port_idx(kcontrol);
  1728. if (idx < 0)
  1729. return idx;
  1730. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1731. idx, mi2s_rx_cfg[idx].channels);
  1732. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1733. return 0;
  1734. }
  1735. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1736. struct snd_ctl_elem_value *ucontrol)
  1737. {
  1738. int idx = mi2s_get_port_idx(kcontrol);
  1739. if (idx < 0)
  1740. return idx;
  1741. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1742. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1743. idx, mi2s_rx_cfg[idx].channels);
  1744. return 1;
  1745. }
  1746. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1747. struct snd_ctl_elem_value *ucontrol)
  1748. {
  1749. int idx = mi2s_get_port_idx(kcontrol);
  1750. if (idx < 0)
  1751. return idx;
  1752. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1753. idx, mi2s_tx_cfg[idx].channels);
  1754. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1755. return 0;
  1756. }
  1757. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1758. struct snd_ctl_elem_value *ucontrol)
  1759. {
  1760. int idx = mi2s_get_port_idx(kcontrol);
  1761. if (idx < 0)
  1762. return idx;
  1763. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1764. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1765. idx, mi2s_tx_cfg[idx].channels);
  1766. return 1;
  1767. }
  1768. static int msm_get_port_id(int be_id)
  1769. {
  1770. int afe_port_id = 0;
  1771. switch (be_id) {
  1772. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1773. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1774. break;
  1775. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1776. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1777. break;
  1778. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1779. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1780. break;
  1781. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1782. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1783. break;
  1784. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  1785. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1786. break;
  1787. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  1788. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1789. break;
  1790. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  1791. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  1792. break;
  1793. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  1794. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  1795. break;
  1796. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  1797. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
  1798. break;
  1799. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  1800. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
  1801. break;
  1802. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  1803. afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
  1804. break;
  1805. default:
  1806. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  1807. afe_port_id = -EINVAL;
  1808. }
  1809. return afe_port_id;
  1810. }
  1811. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  1812. {
  1813. u32 bit_per_sample = 0;
  1814. switch (bit_format) {
  1815. case SNDRV_PCM_FORMAT_S32_LE:
  1816. case SNDRV_PCM_FORMAT_S24_3LE:
  1817. case SNDRV_PCM_FORMAT_S24_LE:
  1818. bit_per_sample = 32;
  1819. break;
  1820. case SNDRV_PCM_FORMAT_S16_LE:
  1821. default:
  1822. bit_per_sample = 16;
  1823. break;
  1824. }
  1825. return bit_per_sample;
  1826. }
  1827. static void update_mi2s_clk_val(int dai_id, int stream)
  1828. {
  1829. u32 bit_per_sample = 0;
  1830. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1831. bit_per_sample =
  1832. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  1833. mi2s_clk[dai_id].clk_freq_in_hz =
  1834. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1835. } else {
  1836. bit_per_sample =
  1837. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  1838. mi2s_clk[dai_id].clk_freq_in_hz =
  1839. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1840. }
  1841. }
  1842. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  1843. {
  1844. int ret = 0;
  1845. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1846. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1847. int port_id = 0;
  1848. int index = cpu_dai->id;
  1849. port_id = msm_get_port_id(rtd->dai_link->id);
  1850. if (port_id < 0) {
  1851. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  1852. ret = port_id;
  1853. goto err;
  1854. }
  1855. if (enable) {
  1856. update_mi2s_clk_val(index, substream->stream);
  1857. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1858. mi2s_clk[index].clk_freq_in_hz);
  1859. }
  1860. mi2s_clk[index].enable = enable;
  1861. ret = afe_set_lpass_clock_v2(port_id,
  1862. &mi2s_clk[index]);
  1863. if (ret < 0) {
  1864. dev_err(rtd->card->dev,
  1865. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1866. __func__, port_id, ret);
  1867. goto err;
  1868. }
  1869. err:
  1870. return ret;
  1871. }
  1872. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1873. {
  1874. int idx = 0;
  1875. if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1876. sizeof("RX_CDC_DMA_RX_0")))
  1877. idx = RX_CDC_DMA_RX_0;
  1878. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1879. sizeof("RX_CDC_DMA_RX_1")))
  1880. idx = RX_CDC_DMA_RX_1;
  1881. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1882. sizeof("RX_CDC_DMA_RX_2")))
  1883. idx = RX_CDC_DMA_RX_2;
  1884. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1885. sizeof("RX_CDC_DMA_RX_3")))
  1886. idx = RX_CDC_DMA_RX_3;
  1887. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1888. sizeof("RX_CDC_DMA_RX_5")))
  1889. idx = RX_CDC_DMA_RX_5;
  1890. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1891. sizeof("TX_CDC_DMA_TX_0")))
  1892. idx = TX_CDC_DMA_TX_0;
  1893. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1894. sizeof("TX_CDC_DMA_TX_3")))
  1895. idx = TX_CDC_DMA_TX_3;
  1896. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1897. sizeof("TX_CDC_DMA_TX_4")))
  1898. idx = TX_CDC_DMA_TX_4;
  1899. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
  1900. sizeof("VA_CDC_DMA_TX_0")))
  1901. idx = VA_CDC_DMA_TX_0;
  1902. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
  1903. sizeof("VA_CDC_DMA_TX_1")))
  1904. idx = VA_CDC_DMA_TX_1;
  1905. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
  1906. sizeof("VA_CDC_DMA_TX_2")))
  1907. idx = VA_CDC_DMA_TX_2;
  1908. else {
  1909. pr_err("%s: unsupported channel: %s\n",
  1910. __func__, kcontrol->id.name);
  1911. return -EINVAL;
  1912. }
  1913. return idx;
  1914. }
  1915. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1916. struct snd_ctl_elem_value *ucontrol)
  1917. {
  1918. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1919. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  1920. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1921. return ch_num;
  1922. }
  1923. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1924. cdc_dma_rx_cfg[ch_num].channels - 1);
  1925. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1926. return 0;
  1927. }
  1928. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1929. struct snd_ctl_elem_value *ucontrol)
  1930. {
  1931. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1932. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  1933. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1934. return ch_num;
  1935. }
  1936. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1937. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1938. cdc_dma_rx_cfg[ch_num].channels);
  1939. return 1;
  1940. }
  1941. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1942. struct snd_ctl_elem_value *ucontrol)
  1943. {
  1944. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1945. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  1946. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1947. return ch_num;
  1948. }
  1949. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1950. case SNDRV_PCM_FORMAT_S32_LE:
  1951. ucontrol->value.integer.value[0] = 3;
  1952. break;
  1953. case SNDRV_PCM_FORMAT_S24_3LE:
  1954. ucontrol->value.integer.value[0] = 2;
  1955. break;
  1956. case SNDRV_PCM_FORMAT_S24_LE:
  1957. ucontrol->value.integer.value[0] = 1;
  1958. break;
  1959. case SNDRV_PCM_FORMAT_S16_LE:
  1960. default:
  1961. ucontrol->value.integer.value[0] = 0;
  1962. break;
  1963. }
  1964. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1965. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1966. ucontrol->value.integer.value[0]);
  1967. return 0;
  1968. }
  1969. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1970. struct snd_ctl_elem_value *ucontrol)
  1971. {
  1972. int rc = 0;
  1973. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1974. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  1975. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1976. return ch_num;
  1977. }
  1978. switch (ucontrol->value.integer.value[0]) {
  1979. case 3:
  1980. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1981. break;
  1982. case 2:
  1983. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1984. break;
  1985. case 1:
  1986. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1987. break;
  1988. case 0:
  1989. default:
  1990. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1991. break;
  1992. }
  1993. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1994. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1995. ucontrol->value.integer.value[0]);
  1996. return rc;
  1997. }
  1998. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1999. {
  2000. int sample_rate_val = 0;
  2001. switch (sample_rate) {
  2002. case SAMPLING_RATE_8KHZ:
  2003. sample_rate_val = 0;
  2004. break;
  2005. case SAMPLING_RATE_11P025KHZ:
  2006. sample_rate_val = 1;
  2007. break;
  2008. case SAMPLING_RATE_16KHZ:
  2009. sample_rate_val = 2;
  2010. break;
  2011. case SAMPLING_RATE_22P05KHZ:
  2012. sample_rate_val = 3;
  2013. break;
  2014. case SAMPLING_RATE_32KHZ:
  2015. sample_rate_val = 4;
  2016. break;
  2017. case SAMPLING_RATE_44P1KHZ:
  2018. sample_rate_val = 5;
  2019. break;
  2020. case SAMPLING_RATE_48KHZ:
  2021. sample_rate_val = 6;
  2022. break;
  2023. case SAMPLING_RATE_88P2KHZ:
  2024. sample_rate_val = 7;
  2025. break;
  2026. case SAMPLING_RATE_96KHZ:
  2027. sample_rate_val = 8;
  2028. break;
  2029. case SAMPLING_RATE_176P4KHZ:
  2030. sample_rate_val = 9;
  2031. break;
  2032. case SAMPLING_RATE_192KHZ:
  2033. sample_rate_val = 10;
  2034. break;
  2035. case SAMPLING_RATE_352P8KHZ:
  2036. sample_rate_val = 11;
  2037. break;
  2038. case SAMPLING_RATE_384KHZ:
  2039. sample_rate_val = 12;
  2040. break;
  2041. default:
  2042. sample_rate_val = 6;
  2043. break;
  2044. }
  2045. return sample_rate_val;
  2046. }
  2047. static int cdc_dma_get_sample_rate(int value)
  2048. {
  2049. int sample_rate = 0;
  2050. switch (value) {
  2051. case 0:
  2052. sample_rate = SAMPLING_RATE_8KHZ;
  2053. break;
  2054. case 1:
  2055. sample_rate = SAMPLING_RATE_11P025KHZ;
  2056. break;
  2057. case 2:
  2058. sample_rate = SAMPLING_RATE_16KHZ;
  2059. break;
  2060. case 3:
  2061. sample_rate = SAMPLING_RATE_22P05KHZ;
  2062. break;
  2063. case 4:
  2064. sample_rate = SAMPLING_RATE_32KHZ;
  2065. break;
  2066. case 5:
  2067. sample_rate = SAMPLING_RATE_44P1KHZ;
  2068. break;
  2069. case 6:
  2070. sample_rate = SAMPLING_RATE_48KHZ;
  2071. break;
  2072. case 7:
  2073. sample_rate = SAMPLING_RATE_88P2KHZ;
  2074. break;
  2075. case 8:
  2076. sample_rate = SAMPLING_RATE_96KHZ;
  2077. break;
  2078. case 9:
  2079. sample_rate = SAMPLING_RATE_176P4KHZ;
  2080. break;
  2081. case 10:
  2082. sample_rate = SAMPLING_RATE_192KHZ;
  2083. break;
  2084. case 11:
  2085. sample_rate = SAMPLING_RATE_352P8KHZ;
  2086. break;
  2087. case 12:
  2088. sample_rate = SAMPLING_RATE_384KHZ;
  2089. break;
  2090. default:
  2091. sample_rate = SAMPLING_RATE_48KHZ;
  2092. break;
  2093. }
  2094. return sample_rate;
  2095. }
  2096. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2097. struct snd_ctl_elem_value *ucontrol)
  2098. {
  2099. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2100. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2101. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2102. return ch_num;
  2103. }
  2104. ucontrol->value.enumerated.item[0] =
  2105. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  2106. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  2107. cdc_dma_rx_cfg[ch_num].sample_rate);
  2108. return 0;
  2109. }
  2110. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2111. struct snd_ctl_elem_value *ucontrol)
  2112. {
  2113. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2114. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2115. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2116. return ch_num;
  2117. }
  2118. cdc_dma_rx_cfg[ch_num].sample_rate =
  2119. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2120. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  2121. __func__, ucontrol->value.enumerated.item[0],
  2122. cdc_dma_rx_cfg[ch_num].sample_rate);
  2123. return 0;
  2124. }
  2125. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  2126. struct snd_ctl_elem_value *ucontrol)
  2127. {
  2128. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2129. if (ch_num < 0) {
  2130. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2131. return ch_num;
  2132. }
  2133. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2134. cdc_dma_tx_cfg[ch_num].channels);
  2135. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  2136. return 0;
  2137. }
  2138. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  2139. struct snd_ctl_elem_value *ucontrol)
  2140. {
  2141. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2142. if (ch_num < 0) {
  2143. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2144. return ch_num;
  2145. }
  2146. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2147. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2148. cdc_dma_tx_cfg[ch_num].channels);
  2149. return 1;
  2150. }
  2151. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2152. struct snd_ctl_elem_value *ucontrol)
  2153. {
  2154. int sample_rate_val;
  2155. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2156. if (ch_num < 0) {
  2157. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2158. return ch_num;
  2159. }
  2160. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  2161. case SAMPLING_RATE_384KHZ:
  2162. sample_rate_val = 12;
  2163. break;
  2164. case SAMPLING_RATE_352P8KHZ:
  2165. sample_rate_val = 11;
  2166. break;
  2167. case SAMPLING_RATE_192KHZ:
  2168. sample_rate_val = 10;
  2169. break;
  2170. case SAMPLING_RATE_176P4KHZ:
  2171. sample_rate_val = 9;
  2172. break;
  2173. case SAMPLING_RATE_96KHZ:
  2174. sample_rate_val = 8;
  2175. break;
  2176. case SAMPLING_RATE_88P2KHZ:
  2177. sample_rate_val = 7;
  2178. break;
  2179. case SAMPLING_RATE_48KHZ:
  2180. sample_rate_val = 6;
  2181. break;
  2182. case SAMPLING_RATE_44P1KHZ:
  2183. sample_rate_val = 5;
  2184. break;
  2185. case SAMPLING_RATE_32KHZ:
  2186. sample_rate_val = 4;
  2187. break;
  2188. case SAMPLING_RATE_22P05KHZ:
  2189. sample_rate_val = 3;
  2190. break;
  2191. case SAMPLING_RATE_16KHZ:
  2192. sample_rate_val = 2;
  2193. break;
  2194. case SAMPLING_RATE_11P025KHZ:
  2195. sample_rate_val = 1;
  2196. break;
  2197. case SAMPLING_RATE_8KHZ:
  2198. sample_rate_val = 0;
  2199. break;
  2200. default:
  2201. sample_rate_val = 6;
  2202. break;
  2203. }
  2204. ucontrol->value.integer.value[0] = sample_rate_val;
  2205. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  2206. cdc_dma_tx_cfg[ch_num].sample_rate);
  2207. return 0;
  2208. }
  2209. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2210. struct snd_ctl_elem_value *ucontrol)
  2211. {
  2212. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2213. if (ch_num < 0) {
  2214. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2215. return ch_num;
  2216. }
  2217. switch (ucontrol->value.integer.value[0]) {
  2218. case 12:
  2219. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  2220. break;
  2221. case 11:
  2222. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  2223. break;
  2224. case 10:
  2225. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  2226. break;
  2227. case 9:
  2228. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  2229. break;
  2230. case 8:
  2231. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  2232. break;
  2233. case 7:
  2234. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  2235. break;
  2236. case 6:
  2237. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2238. break;
  2239. case 5:
  2240. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  2241. break;
  2242. case 4:
  2243. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  2244. break;
  2245. case 3:
  2246. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  2247. break;
  2248. case 2:
  2249. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  2250. break;
  2251. case 1:
  2252. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  2253. break;
  2254. case 0:
  2255. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  2256. break;
  2257. default:
  2258. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2259. break;
  2260. }
  2261. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  2262. __func__, ucontrol->value.integer.value[0],
  2263. cdc_dma_tx_cfg[ch_num].sample_rate);
  2264. return 0;
  2265. }
  2266. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  2267. struct snd_ctl_elem_value *ucontrol)
  2268. {
  2269. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2270. if (ch_num < 0) {
  2271. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2272. return ch_num;
  2273. }
  2274. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  2275. case SNDRV_PCM_FORMAT_S32_LE:
  2276. ucontrol->value.integer.value[0] = 3;
  2277. break;
  2278. case SNDRV_PCM_FORMAT_S24_3LE:
  2279. ucontrol->value.integer.value[0] = 2;
  2280. break;
  2281. case SNDRV_PCM_FORMAT_S24_LE:
  2282. ucontrol->value.integer.value[0] = 1;
  2283. break;
  2284. case SNDRV_PCM_FORMAT_S16_LE:
  2285. default:
  2286. ucontrol->value.integer.value[0] = 0;
  2287. break;
  2288. }
  2289. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2290. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2291. ucontrol->value.integer.value[0]);
  2292. return 0;
  2293. }
  2294. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  2295. struct snd_ctl_elem_value *ucontrol)
  2296. {
  2297. int rc = 0;
  2298. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2299. if (ch_num < 0) {
  2300. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2301. return ch_num;
  2302. }
  2303. switch (ucontrol->value.integer.value[0]) {
  2304. case 3:
  2305. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2306. break;
  2307. case 2:
  2308. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2309. break;
  2310. case 1:
  2311. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2312. break;
  2313. case 0:
  2314. default:
  2315. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2316. break;
  2317. }
  2318. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2319. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2320. ucontrol->value.integer.value[0]);
  2321. return rc;
  2322. }
  2323. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  2324. {
  2325. int idx = 0;
  2326. switch (be_id) {
  2327. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2328. idx = RX_CDC_DMA_RX_0;
  2329. break;
  2330. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2331. idx = RX_CDC_DMA_RX_1;
  2332. break;
  2333. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2334. idx = RX_CDC_DMA_RX_2;
  2335. break;
  2336. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2337. idx = RX_CDC_DMA_RX_3;
  2338. break;
  2339. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2340. idx = RX_CDC_DMA_RX_5;
  2341. break;
  2342. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2343. idx = TX_CDC_DMA_TX_0;
  2344. break;
  2345. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2346. idx = TX_CDC_DMA_TX_3;
  2347. break;
  2348. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2349. idx = TX_CDC_DMA_TX_4;
  2350. break;
  2351. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2352. idx = VA_CDC_DMA_TX_0;
  2353. break;
  2354. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2355. idx = VA_CDC_DMA_TX_1;
  2356. break;
  2357. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2358. idx = VA_CDC_DMA_TX_2;
  2359. break;
  2360. default:
  2361. idx = RX_CDC_DMA_RX_0;
  2362. break;
  2363. }
  2364. return idx;
  2365. }
  2366. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  2367. struct snd_ctl_elem_value *ucontrol)
  2368. {
  2369. /*
  2370. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  2371. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  2372. * value.
  2373. */
  2374. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2375. case SAMPLING_RATE_96KHZ:
  2376. ucontrol->value.integer.value[0] = 5;
  2377. break;
  2378. case SAMPLING_RATE_88P2KHZ:
  2379. ucontrol->value.integer.value[0] = 4;
  2380. break;
  2381. case SAMPLING_RATE_48KHZ:
  2382. ucontrol->value.integer.value[0] = 3;
  2383. break;
  2384. case SAMPLING_RATE_44P1KHZ:
  2385. ucontrol->value.integer.value[0] = 2;
  2386. break;
  2387. case SAMPLING_RATE_16KHZ:
  2388. ucontrol->value.integer.value[0] = 1;
  2389. break;
  2390. case SAMPLING_RATE_8KHZ:
  2391. default:
  2392. ucontrol->value.integer.value[0] = 0;
  2393. break;
  2394. }
  2395. pr_debug("%s: sample rate = %d\n", __func__,
  2396. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2397. return 0;
  2398. }
  2399. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  2400. struct snd_ctl_elem_value *ucontrol)
  2401. {
  2402. switch (ucontrol->value.integer.value[0]) {
  2403. case 1:
  2404. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2405. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2406. break;
  2407. case 2:
  2408. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2409. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2410. break;
  2411. case 3:
  2412. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2413. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2414. break;
  2415. case 4:
  2416. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2417. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2418. break;
  2419. case 5:
  2420. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2421. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2422. break;
  2423. case 0:
  2424. default:
  2425. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2426. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2427. break;
  2428. }
  2429. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  2430. __func__,
  2431. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2432. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2433. ucontrol->value.enumerated.item[0]);
  2434. return 0;
  2435. }
  2436. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  2437. struct snd_ctl_elem_value *ucontrol)
  2438. {
  2439. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2440. case SAMPLING_RATE_96KHZ:
  2441. ucontrol->value.integer.value[0] = 5;
  2442. break;
  2443. case SAMPLING_RATE_88P2KHZ:
  2444. ucontrol->value.integer.value[0] = 4;
  2445. break;
  2446. case SAMPLING_RATE_48KHZ:
  2447. ucontrol->value.integer.value[0] = 3;
  2448. break;
  2449. case SAMPLING_RATE_44P1KHZ:
  2450. ucontrol->value.integer.value[0] = 2;
  2451. break;
  2452. case SAMPLING_RATE_16KHZ:
  2453. ucontrol->value.integer.value[0] = 1;
  2454. break;
  2455. case SAMPLING_RATE_8KHZ:
  2456. default:
  2457. ucontrol->value.integer.value[0] = 0;
  2458. break;
  2459. }
  2460. pr_debug("%s: sample rate rx = %d\n", __func__,
  2461. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2462. return 0;
  2463. }
  2464. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  2465. struct snd_ctl_elem_value *ucontrol)
  2466. {
  2467. switch (ucontrol->value.integer.value[0]) {
  2468. case 1:
  2469. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2470. break;
  2471. case 2:
  2472. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2473. break;
  2474. case 3:
  2475. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2476. break;
  2477. case 4:
  2478. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2479. break;
  2480. case 5:
  2481. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2482. break;
  2483. case 0:
  2484. default:
  2485. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2486. break;
  2487. }
  2488. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  2489. __func__,
  2490. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2491. ucontrol->value.enumerated.item[0]);
  2492. return 0;
  2493. }
  2494. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  2495. struct snd_ctl_elem_value *ucontrol)
  2496. {
  2497. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  2498. case SAMPLING_RATE_96KHZ:
  2499. ucontrol->value.integer.value[0] = 5;
  2500. break;
  2501. case SAMPLING_RATE_88P2KHZ:
  2502. ucontrol->value.integer.value[0] = 4;
  2503. break;
  2504. case SAMPLING_RATE_48KHZ:
  2505. ucontrol->value.integer.value[0] = 3;
  2506. break;
  2507. case SAMPLING_RATE_44P1KHZ:
  2508. ucontrol->value.integer.value[0] = 2;
  2509. break;
  2510. case SAMPLING_RATE_16KHZ:
  2511. ucontrol->value.integer.value[0] = 1;
  2512. break;
  2513. case SAMPLING_RATE_8KHZ:
  2514. default:
  2515. ucontrol->value.integer.value[0] = 0;
  2516. break;
  2517. }
  2518. pr_debug("%s: sample rate tx = %d\n", __func__,
  2519. slim_tx_cfg[SLIM_TX_7].sample_rate);
  2520. return 0;
  2521. }
  2522. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  2523. struct snd_ctl_elem_value *ucontrol)
  2524. {
  2525. switch (ucontrol->value.integer.value[0]) {
  2526. case 1:
  2527. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2528. break;
  2529. case 2:
  2530. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2531. break;
  2532. case 3:
  2533. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2534. break;
  2535. case 4:
  2536. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2537. break;
  2538. case 5:
  2539. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2540. break;
  2541. case 0:
  2542. default:
  2543. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2544. break;
  2545. }
  2546. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  2547. __func__,
  2548. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2549. ucontrol->value.enumerated.item[0]);
  2550. return 0;
  2551. }
  2552. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2553. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2554. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2555. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2556. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2557. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2558. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2559. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2560. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2561. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2562. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2563. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2564. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2565. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2566. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2567. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2568. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2569. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
  2570. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2571. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
  2572. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2573. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
  2574. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2575. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2576. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2577. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2578. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2579. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2580. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2581. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2582. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2583. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2584. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2585. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2586. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2587. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2588. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2589. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2590. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2591. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
  2592. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2593. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
  2594. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2595. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
  2596. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2597. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2598. rx_cdc_dma_rx_0_sample_rate,
  2599. cdc_dma_rx_sample_rate_get,
  2600. cdc_dma_rx_sample_rate_put),
  2601. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2602. rx_cdc_dma_rx_1_sample_rate,
  2603. cdc_dma_rx_sample_rate_get,
  2604. cdc_dma_rx_sample_rate_put),
  2605. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2606. rx_cdc_dma_rx_2_sample_rate,
  2607. cdc_dma_rx_sample_rate_get,
  2608. cdc_dma_rx_sample_rate_put),
  2609. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2610. rx_cdc_dma_rx_3_sample_rate,
  2611. cdc_dma_rx_sample_rate_get,
  2612. cdc_dma_rx_sample_rate_put),
  2613. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2614. rx_cdc_dma_rx_5_sample_rate,
  2615. cdc_dma_rx_sample_rate_get,
  2616. cdc_dma_rx_sample_rate_put),
  2617. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2618. tx_cdc_dma_tx_0_sample_rate,
  2619. cdc_dma_tx_sample_rate_get,
  2620. cdc_dma_tx_sample_rate_put),
  2621. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2622. tx_cdc_dma_tx_3_sample_rate,
  2623. cdc_dma_tx_sample_rate_get,
  2624. cdc_dma_tx_sample_rate_put),
  2625. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2626. tx_cdc_dma_tx_4_sample_rate,
  2627. cdc_dma_tx_sample_rate_get,
  2628. cdc_dma_tx_sample_rate_put),
  2629. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
  2630. va_cdc_dma_tx_0_sample_rate,
  2631. cdc_dma_tx_sample_rate_get,
  2632. cdc_dma_tx_sample_rate_put),
  2633. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
  2634. va_cdc_dma_tx_1_sample_rate,
  2635. cdc_dma_tx_sample_rate_get,
  2636. cdc_dma_tx_sample_rate_put),
  2637. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
  2638. va_cdc_dma_tx_2_sample_rate,
  2639. cdc_dma_tx_sample_rate_get,
  2640. cdc_dma_tx_sample_rate_put),
  2641. };
  2642. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2643. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2644. usb_audio_rx_sample_rate_get,
  2645. usb_audio_rx_sample_rate_put),
  2646. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2647. usb_audio_tx_sample_rate_get,
  2648. usb_audio_tx_sample_rate_put),
  2649. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2650. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2651. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2652. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2653. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2654. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2655. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2656. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2657. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2658. proxy_rx_ch_get, proxy_rx_ch_put),
  2659. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  2660. msm_bt_sample_rate_get,
  2661. msm_bt_sample_rate_put),
  2662. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  2663. msm_bt_sample_rate_rx_get,
  2664. msm_bt_sample_rate_rx_put),
  2665. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  2666. msm_bt_sample_rate_tx_get,
  2667. msm_bt_sample_rate_tx_put),
  2668. SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
  2669. afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
  2670. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  2671. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  2672. };
  2673. static const struct snd_kcontrol_new msm_tdm_snd_controls[] = {
  2674. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2675. tdm_rx_sample_rate_get,
  2676. tdm_rx_sample_rate_put),
  2677. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2678. tdm_rx_sample_rate_get,
  2679. tdm_rx_sample_rate_put),
  2680. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2681. tdm_rx_sample_rate_get,
  2682. tdm_rx_sample_rate_put),
  2683. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2684. tdm_rx_sample_rate_get,
  2685. tdm_rx_sample_rate_put),
  2686. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2687. tdm_tx_sample_rate_get,
  2688. tdm_tx_sample_rate_put),
  2689. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2690. tdm_tx_sample_rate_get,
  2691. tdm_tx_sample_rate_put),
  2692. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2693. tdm_tx_sample_rate_get,
  2694. tdm_tx_sample_rate_put),
  2695. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2696. tdm_tx_sample_rate_get,
  2697. tdm_tx_sample_rate_put),
  2698. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2699. tdm_rx_format_get,
  2700. tdm_rx_format_put),
  2701. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2702. tdm_rx_format_get,
  2703. tdm_rx_format_put),
  2704. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2705. tdm_rx_format_get,
  2706. tdm_rx_format_put),
  2707. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  2708. tdm_rx_format_get,
  2709. tdm_rx_format_put),
  2710. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2711. tdm_tx_format_get,
  2712. tdm_tx_format_put),
  2713. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2714. tdm_tx_format_get,
  2715. tdm_tx_format_put),
  2716. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2717. tdm_tx_format_get,
  2718. tdm_tx_format_put),
  2719. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  2720. tdm_tx_format_get,
  2721. tdm_tx_format_put),
  2722. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2723. tdm_rx_ch_get,
  2724. tdm_rx_ch_put),
  2725. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2726. tdm_rx_ch_get,
  2727. tdm_rx_ch_put),
  2728. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2729. tdm_rx_ch_get,
  2730. tdm_rx_ch_put),
  2731. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  2732. tdm_rx_ch_get,
  2733. tdm_rx_ch_put),
  2734. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2735. tdm_tx_ch_get,
  2736. tdm_tx_ch_put),
  2737. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2738. tdm_tx_ch_get,
  2739. tdm_tx_ch_put),
  2740. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2741. tdm_tx_ch_get,
  2742. tdm_tx_ch_put),
  2743. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  2744. tdm_tx_ch_get,
  2745. tdm_tx_ch_put),
  2746. };
  2747. static const struct snd_kcontrol_new msm_auxpcm_snd_controls[] = {
  2748. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2749. aux_pcm_rx_sample_rate_get,
  2750. aux_pcm_rx_sample_rate_put),
  2751. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2752. aux_pcm_rx_sample_rate_get,
  2753. aux_pcm_rx_sample_rate_put),
  2754. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2755. aux_pcm_rx_sample_rate_get,
  2756. aux_pcm_rx_sample_rate_put),
  2757. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  2758. aux_pcm_rx_sample_rate_get,
  2759. aux_pcm_rx_sample_rate_put),
  2760. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2761. aux_pcm_tx_sample_rate_get,
  2762. aux_pcm_tx_sample_rate_put),
  2763. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2764. aux_pcm_tx_sample_rate_get,
  2765. aux_pcm_tx_sample_rate_put),
  2766. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2767. aux_pcm_tx_sample_rate_get,
  2768. aux_pcm_tx_sample_rate_put),
  2769. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  2770. aux_pcm_tx_sample_rate_get,
  2771. aux_pcm_tx_sample_rate_put),
  2772. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2773. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2774. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2775. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2776. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2777. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2778. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2779. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2780. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2781. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2782. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2783. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2784. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2785. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2786. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2787. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2788. };
  2789. static const struct snd_kcontrol_new msm_mi2s_snd_controls[] = {
  2790. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2791. mi2s_rx_sample_rate_get,
  2792. mi2s_rx_sample_rate_put),
  2793. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2794. mi2s_rx_sample_rate_get,
  2795. mi2s_rx_sample_rate_put),
  2796. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2797. mi2s_rx_sample_rate_get,
  2798. mi2s_rx_sample_rate_put),
  2799. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  2800. mi2s_rx_sample_rate_get,
  2801. mi2s_tx_sample_rate_put),
  2802. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2803. mi2s_tx_sample_rate_get,
  2804. mi2s_tx_sample_rate_put),
  2805. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2806. mi2s_tx_sample_rate_get,
  2807. mi2s_tx_sample_rate_put),
  2808. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  2809. mi2s_tx_sample_rate_get,
  2810. mi2s_tx_sample_rate_put),
  2811. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2812. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2813. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2814. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2815. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2816. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2817. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  2818. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2819. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2820. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2821. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2822. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2823. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2824. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2825. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  2826. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2827. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2828. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2829. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2830. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2831. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2832. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2833. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  2834. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2835. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2836. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2837. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2838. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2839. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2840. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2841. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  2842. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2843. };
  2844. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2845. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2846. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2847. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2848. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2849. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2850. aux_pcm_rx_sample_rate_get,
  2851. aux_pcm_rx_sample_rate_put),
  2852. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2853. aux_pcm_tx_sample_rate_get,
  2854. aux_pcm_tx_sample_rate_put),
  2855. };
  2856. static int bengal_send_island_va_config(int32_t be_id)
  2857. {
  2858. int rc = 0;
  2859. int port_id = 0xFFFF;
  2860. port_id = msm_get_port_id(be_id);
  2861. if (port_id < 0) {
  2862. pr_err("%s: Invalid island interface, be_id: %d\n",
  2863. __func__, be_id);
  2864. rc = -EINVAL;
  2865. } else {
  2866. /*
  2867. * send island mode config
  2868. * This should be the first configuration
  2869. */
  2870. rc = afe_send_port_island_mode(port_id);
  2871. if (rc)
  2872. pr_err("%s: afe send island mode failed %d\n",
  2873. __func__, rc);
  2874. }
  2875. return rc;
  2876. }
  2877. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  2878. struct snd_pcm_hw_params *params)
  2879. {
  2880. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2881. struct snd_interval *rate = hw_param_interval(params,
  2882. SNDRV_PCM_HW_PARAM_RATE);
  2883. struct snd_interval *channels = hw_param_interval(params,
  2884. SNDRV_PCM_HW_PARAM_CHANNELS);
  2885. int idx = 0;
  2886. pr_debug("%s: format = %d, rate = %d\n",
  2887. __func__, params_format(params), params_rate(params));
  2888. switch (dai_link->id) {
  2889. case MSM_BACKEND_DAI_USB_RX:
  2890. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2891. usb_rx_cfg.bit_format);
  2892. rate->min = rate->max = usb_rx_cfg.sample_rate;
  2893. channels->min = channels->max = usb_rx_cfg.channels;
  2894. break;
  2895. case MSM_BACKEND_DAI_USB_TX:
  2896. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2897. usb_tx_cfg.bit_format);
  2898. rate->min = rate->max = usb_tx_cfg.sample_rate;
  2899. channels->min = channels->max = usb_tx_cfg.channels;
  2900. break;
  2901. case MSM_BACKEND_DAI_AFE_PCM_RX:
  2902. channels->min = channels->max = proxy_rx_cfg.channels;
  2903. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  2904. break;
  2905. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  2906. channels->min = channels->max =
  2907. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2908. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2909. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  2910. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  2911. break;
  2912. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  2913. channels->min = channels->max =
  2914. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2915. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2916. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  2917. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  2918. break;
  2919. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  2920. channels->min = channels->max =
  2921. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2922. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2923. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  2924. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  2925. break;
  2926. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  2927. channels->min = channels->max =
  2928. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2929. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2930. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  2931. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  2932. break;
  2933. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  2934. channels->min = channels->max =
  2935. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2936. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2937. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  2938. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  2939. break;
  2940. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  2941. channels->min = channels->max =
  2942. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2943. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2944. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  2945. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  2946. break;
  2947. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  2948. channels->min = channels->max =
  2949. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  2950. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2951. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  2952. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  2953. break;
  2954. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  2955. channels->min = channels->max =
  2956. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  2957. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2958. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  2959. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  2960. break;
  2961. case MSM_BACKEND_DAI_AUXPCM_RX:
  2962. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2963. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  2964. rate->min = rate->max =
  2965. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  2966. channels->min = channels->max =
  2967. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  2968. break;
  2969. case MSM_BACKEND_DAI_AUXPCM_TX:
  2970. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2971. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  2972. rate->min = rate->max =
  2973. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  2974. channels->min = channels->max =
  2975. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  2976. break;
  2977. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  2978. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2979. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  2980. rate->min = rate->max =
  2981. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  2982. channels->min = channels->max =
  2983. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  2984. break;
  2985. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  2986. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2987. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  2988. rate->min = rate->max =
  2989. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  2990. channels->min = channels->max =
  2991. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  2992. break;
  2993. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  2994. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2995. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  2996. rate->min = rate->max =
  2997. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  2998. channels->min = channels->max =
  2999. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3000. break;
  3001. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3002. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3003. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3004. rate->min = rate->max =
  3005. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3006. channels->min = channels->max =
  3007. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3008. break;
  3009. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3010. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3011. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3012. rate->min = rate->max =
  3013. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3014. channels->min = channels->max =
  3015. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3016. break;
  3017. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3018. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3019. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3020. rate->min = rate->max =
  3021. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3022. channels->min = channels->max =
  3023. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3024. break;
  3025. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3026. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3027. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3028. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3029. channels->min = channels->max =
  3030. mi2s_rx_cfg[PRIM_MI2S].channels;
  3031. break;
  3032. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3033. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3034. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3035. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3036. channels->min = channels->max =
  3037. mi2s_tx_cfg[PRIM_MI2S].channels;
  3038. break;
  3039. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3040. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3041. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3042. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3043. channels->min = channels->max =
  3044. mi2s_rx_cfg[SEC_MI2S].channels;
  3045. break;
  3046. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3047. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3048. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3049. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3050. channels->min = channels->max =
  3051. mi2s_tx_cfg[SEC_MI2S].channels;
  3052. break;
  3053. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3054. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3055. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3056. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3057. channels->min = channels->max =
  3058. mi2s_rx_cfg[TERT_MI2S].channels;
  3059. break;
  3060. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3061. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3062. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3063. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3064. channels->min = channels->max =
  3065. mi2s_tx_cfg[TERT_MI2S].channels;
  3066. break;
  3067. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3068. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3069. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3070. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3071. channels->min = channels->max =
  3072. mi2s_rx_cfg[QUAT_MI2S].channels;
  3073. break;
  3074. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3075. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3076. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3077. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3078. channels->min = channels->max =
  3079. mi2s_tx_cfg[QUAT_MI2S].channels;
  3080. break;
  3081. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3082. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3083. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3084. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3085. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3086. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3087. cdc_dma_rx_cfg[idx].bit_format);
  3088. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3089. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3090. break;
  3091. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3092. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3093. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3094. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3095. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3096. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3097. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3098. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3099. cdc_dma_tx_cfg[idx].bit_format);
  3100. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3101. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3102. break;
  3103. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3104. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3105. slim_rx_cfg[SLIM_RX_7].bit_format);
  3106. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3107. channels->min = channels->max =
  3108. slim_rx_cfg[SLIM_RX_7].channels;
  3109. break;
  3110. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3111. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3112. slim_tx_cfg[SLIM_TX_7].bit_format);
  3113. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3114. channels->min = channels->max =
  3115. slim_tx_cfg[SLIM_TX_7].channels;
  3116. break;
  3117. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3118. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3119. channels->min = channels->max =
  3120. slim_tx_cfg[SLIM_TX_8].channels;
  3121. break;
  3122. case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
  3123. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3124. afe_loopback_tx_cfg[idx].bit_format);
  3125. rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
  3126. channels->min = channels->max =
  3127. afe_loopback_tx_cfg[idx].channels;
  3128. break;
  3129. default:
  3130. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3131. break;
  3132. }
  3133. return 0;
  3134. }
  3135. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
  3136. bool active)
  3137. {
  3138. struct snd_soc_card *card = component->card;
  3139. struct msm_asoc_mach_data *pdata =
  3140. snd_soc_card_get_drvdata(card);
  3141. if (!pdata->fsa_handle)
  3142. return false;
  3143. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  3144. }
  3145. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  3146. {
  3147. int value = 0;
  3148. bool ret = false;
  3149. struct snd_soc_card *card;
  3150. struct msm_asoc_mach_data *pdata;
  3151. if (!component) {
  3152. pr_err("%s component is NULL\n", __func__);
  3153. return false;
  3154. }
  3155. card = component->card;
  3156. pdata = snd_soc_card_get_drvdata(card);
  3157. if (!pdata)
  3158. return false;
  3159. if (wcd_mbhc_cfg.enable_usbc_analog)
  3160. return msm_usbc_swap_gnd_mic(component, active);
  3161. /* if usbc is not defined, swap using us_euro_gpio_p */
  3162. if (pdata->us_euro_gpio_p) {
  3163. value = msm_cdc_pinctrl_get_state(
  3164. pdata->us_euro_gpio_p);
  3165. if (value)
  3166. msm_cdc_pinctrl_select_sleep_state(
  3167. pdata->us_euro_gpio_p);
  3168. else
  3169. msm_cdc_pinctrl_select_active_state(
  3170. pdata->us_euro_gpio_p);
  3171. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  3172. __func__, value, !value);
  3173. ret = true;
  3174. }
  3175. return ret;
  3176. }
  3177. static int bengal_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  3178. struct snd_pcm_hw_params *params)
  3179. {
  3180. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3181. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3182. int ret = 0;
  3183. int slot_width = 32;
  3184. int channels, slots;
  3185. unsigned int slot_mask, rate, clk_freq;
  3186. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  3187. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  3188. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  3189. switch (cpu_dai->id) {
  3190. case AFE_PORT_ID_PRIMARY_TDM_RX:
  3191. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3192. break;
  3193. case AFE_PORT_ID_SECONDARY_TDM_RX:
  3194. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3195. break;
  3196. case AFE_PORT_ID_TERTIARY_TDM_RX:
  3197. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3198. break;
  3199. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  3200. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3201. break;
  3202. case AFE_PORT_ID_PRIMARY_TDM_TX:
  3203. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3204. break;
  3205. case AFE_PORT_ID_SECONDARY_TDM_TX:
  3206. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3207. break;
  3208. case AFE_PORT_ID_TERTIARY_TDM_TX:
  3209. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3210. break;
  3211. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  3212. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3213. break;
  3214. default:
  3215. pr_err("%s: dai id 0x%x not supported\n",
  3216. __func__, cpu_dai->id);
  3217. return -EINVAL;
  3218. }
  3219. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3220. /*2 slot config - bits 0 and 1 set for the first two slots */
  3221. slot_mask = 0x0000FFFF >> (16 - slots);
  3222. channels = slots;
  3223. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  3224. __func__, slot_width, slots);
  3225. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  3226. slots, slot_width);
  3227. if (ret < 0) {
  3228. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  3229. __func__, ret);
  3230. goto end;
  3231. }
  3232. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3233. 0, NULL, channels, slot_offset);
  3234. if (ret < 0) {
  3235. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  3236. __func__, ret);
  3237. goto end;
  3238. }
  3239. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  3240. /*2 slot config - bits 0 and 1 set for the first two slots */
  3241. slot_mask = 0x0000FFFF >> (16 - slots);
  3242. channels = slots;
  3243. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  3244. __func__, slot_width, slots);
  3245. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  3246. slots, slot_width);
  3247. if (ret < 0) {
  3248. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  3249. __func__, ret);
  3250. goto end;
  3251. }
  3252. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3253. channels, slot_offset, 0, NULL);
  3254. if (ret < 0) {
  3255. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  3256. __func__, ret);
  3257. goto end;
  3258. }
  3259. } else {
  3260. ret = -EINVAL;
  3261. pr_err("%s: invalid use case, err:%d\n",
  3262. __func__, ret);
  3263. goto end;
  3264. }
  3265. rate = params_rate(params);
  3266. clk_freq = rate * slot_width * slots;
  3267. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  3268. if (ret < 0)
  3269. pr_err("%s: failed to set tdm clk, err:%d\n",
  3270. __func__, ret);
  3271. end:
  3272. return ret;
  3273. }
  3274. static int msm_get_tdm_mode(u32 port_id)
  3275. {
  3276. int tdm_mode;
  3277. switch (port_id) {
  3278. case AFE_PORT_ID_PRIMARY_TDM_RX:
  3279. case AFE_PORT_ID_PRIMARY_TDM_TX:
  3280. tdm_mode = TDM_PRI;
  3281. break;
  3282. case AFE_PORT_ID_SECONDARY_TDM_RX:
  3283. case AFE_PORT_ID_SECONDARY_TDM_TX:
  3284. tdm_mode = TDM_SEC;
  3285. break;
  3286. case AFE_PORT_ID_TERTIARY_TDM_RX:
  3287. case AFE_PORT_ID_TERTIARY_TDM_TX:
  3288. tdm_mode = TDM_TERT;
  3289. break;
  3290. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  3291. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  3292. tdm_mode = TDM_QUAT;
  3293. break;
  3294. default:
  3295. pr_err("%s: Invalid port id: %d\n", __func__, port_id);
  3296. tdm_mode = -EINVAL;
  3297. }
  3298. return tdm_mode;
  3299. }
  3300. static int bengal_tdm_snd_startup(struct snd_pcm_substream *substream)
  3301. {
  3302. int ret = 0;
  3303. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3304. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3305. struct snd_soc_card *card = rtd->card;
  3306. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3307. int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
  3308. if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
  3309. ret = -EINVAL;
  3310. pr_err("%s: Invalid TDM interface %d\n",
  3311. __func__, ret);
  3312. return ret;
  3313. }
  3314. if (pdata->mi2s_gpio_p[tdm_mode]) {
  3315. if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
  3316. == 0) {
  3317. ret = msm_cdc_pinctrl_select_active_state(
  3318. pdata->mi2s_gpio_p[tdm_mode]);
  3319. if (ret) {
  3320. pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
  3321. __func__, ret);
  3322. goto done;
  3323. }
  3324. }
  3325. atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
  3326. }
  3327. done:
  3328. return ret;
  3329. }
  3330. static void bengal_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  3331. {
  3332. int ret = 0;
  3333. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3334. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3335. struct snd_soc_card *card = rtd->card;
  3336. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3337. int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
  3338. if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
  3339. ret = -EINVAL;
  3340. pr_err("%s: Invalid TDM interface %d\n",
  3341. __func__, ret);
  3342. return;
  3343. }
  3344. if (pdata->mi2s_gpio_p[tdm_mode]) {
  3345. atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
  3346. if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
  3347. == 0) {
  3348. ret = msm_cdc_pinctrl_select_sleep_state(
  3349. pdata->mi2s_gpio_p[tdm_mode]);
  3350. if (ret)
  3351. pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
  3352. __func__, ret);
  3353. }
  3354. }
  3355. }
  3356. static int bengal_aux_snd_startup(struct snd_pcm_substream *substream)
  3357. {
  3358. int ret = 0;
  3359. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3360. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3361. struct snd_soc_card *card = rtd->card;
  3362. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3363. u32 aux_mode = cpu_dai->id - 1;
  3364. if (aux_mode >= AUX_PCM_MAX) {
  3365. ret = -EINVAL;
  3366. pr_err("%s: Invalid AUX interface %d\n",
  3367. __func__, ret);
  3368. return ret;
  3369. }
  3370. if (pdata->mi2s_gpio_p[aux_mode]) {
  3371. if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
  3372. == 0) {
  3373. ret = msm_cdc_pinctrl_select_active_state(
  3374. pdata->mi2s_gpio_p[aux_mode]);
  3375. if (ret) {
  3376. pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
  3377. __func__, ret);
  3378. goto done;
  3379. }
  3380. }
  3381. atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
  3382. }
  3383. done:
  3384. return ret;
  3385. }
  3386. static void bengal_aux_snd_shutdown(struct snd_pcm_substream *substream)
  3387. {
  3388. int ret = 0;
  3389. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3390. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3391. struct snd_soc_card *card = rtd->card;
  3392. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3393. u32 aux_mode = cpu_dai->id - 1;
  3394. if (aux_mode >= AUX_PCM_MAX) {
  3395. pr_err("%s: Invalid AUX interface %d\n",
  3396. __func__, ret);
  3397. return;
  3398. }
  3399. if (pdata->mi2s_gpio_p[aux_mode]) {
  3400. atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
  3401. if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
  3402. == 0) {
  3403. ret = msm_cdc_pinctrl_select_sleep_state(
  3404. pdata->mi2s_gpio_p[aux_mode]);
  3405. if (ret)
  3406. pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
  3407. __func__, ret);
  3408. }
  3409. }
  3410. }
  3411. static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
  3412. {
  3413. int ret = 0;
  3414. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3415. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3416. switch (dai_link->id) {
  3417. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3418. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3419. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3420. if (va_disable)
  3421. break;
  3422. ret = bengal_send_island_va_config(dai_link->id);
  3423. if (ret)
  3424. pr_err("%s: send island va cfg failed, err: %d\n",
  3425. __func__, ret);
  3426. break;
  3427. }
  3428. return ret;
  3429. }
  3430. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  3431. struct snd_pcm_hw_params *params)
  3432. {
  3433. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3434. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3435. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3436. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3437. int ret = 0;
  3438. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  3439. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3440. u32 user_set_tx_ch = 0;
  3441. u32 user_set_rx_ch = 0;
  3442. u32 ch_id;
  3443. ret = snd_soc_dai_get_channel_map(codec_dai,
  3444. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  3445. &rx_ch_cdc_dma);
  3446. if (ret < 0) {
  3447. pr_err("%s: failed to get codec chan map, err:%d\n",
  3448. __func__, ret);
  3449. goto err;
  3450. }
  3451. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3452. switch (dai_link->id) {
  3453. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3454. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3455. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3456. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3457. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  3458. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3459. {
  3460. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3461. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  3462. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  3463. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  3464. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3465. user_set_rx_ch, &rx_ch_cdc_dma);
  3466. if (ret < 0) {
  3467. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3468. __func__, ret);
  3469. goto err;
  3470. }
  3471. }
  3472. break;
  3473. }
  3474. } else {
  3475. switch (dai_link->id) {
  3476. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3477. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3478. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3479. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3480. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3481. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3482. {
  3483. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3484. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  3485. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  3486. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  3487. }
  3488. break;
  3489. }
  3490. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  3491. &tx_ch_cdc_dma, 0, 0);
  3492. if (ret < 0) {
  3493. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3494. __func__, ret);
  3495. goto err;
  3496. }
  3497. }
  3498. err:
  3499. return ret;
  3500. }
  3501. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  3502. {
  3503. cpumask_t mask;
  3504. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  3505. pm_qos_remove_request(&substream->latency_pm_qos_req);
  3506. cpumask_clear(&mask);
  3507. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  3508. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  3509. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  3510. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  3511. pm_qos_add_request(&substream->latency_pm_qos_req,
  3512. PM_QOS_CPU_DMA_LATENCY,
  3513. MSM_LL_QOS_VALUE);
  3514. return 0;
  3515. }
  3516. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  3517. {
  3518. int ret = 0;
  3519. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3520. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3521. int index = cpu_dai->id;
  3522. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  3523. struct snd_soc_card *card = rtd->card;
  3524. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3525. dev_dbg(rtd->card->dev,
  3526. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  3527. __func__, substream->name, substream->stream,
  3528. cpu_dai->name, cpu_dai->id);
  3529. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3530. ret = -EINVAL;
  3531. dev_err(rtd->card->dev,
  3532. "%s: CPU DAI id (%d) out of range\n",
  3533. __func__, cpu_dai->id);
  3534. goto err;
  3535. }
  3536. /*
  3537. * Mutex protection in case the same MI2S
  3538. * interface using for both TX and RX so
  3539. * that the same clock won't be enable twice.
  3540. */
  3541. mutex_lock(&mi2s_intf_conf[index].lock);
  3542. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  3543. /* Check if msm needs to provide the clock to the interface */
  3544. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  3545. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  3546. fmt = SND_SOC_DAIFMT_CBM_CFM;
  3547. }
  3548. ret = msm_mi2s_set_sclk(substream, true);
  3549. if (ret < 0) {
  3550. dev_err(rtd->card->dev,
  3551. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  3552. __func__, ret);
  3553. goto clean_up;
  3554. }
  3555. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  3556. if (ret < 0) {
  3557. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  3558. __func__, index, ret);
  3559. goto clk_off;
  3560. }
  3561. if (pdata->mi2s_gpio_p[index]) {
  3562. if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
  3563. == 0) {
  3564. ret = msm_cdc_pinctrl_select_active_state(
  3565. pdata->mi2s_gpio_p[index]);
  3566. if (ret) {
  3567. pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
  3568. __func__, ret);
  3569. goto clk_off;
  3570. }
  3571. }
  3572. atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
  3573. }
  3574. }
  3575. clk_off:
  3576. if (ret < 0)
  3577. msm_mi2s_set_sclk(substream, false);
  3578. clean_up:
  3579. if (ret < 0)
  3580. mi2s_intf_conf[index].ref_cnt--;
  3581. mutex_unlock(&mi2s_intf_conf[index].lock);
  3582. err:
  3583. return ret;
  3584. }
  3585. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  3586. {
  3587. int ret = 0;
  3588. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3589. int index = rtd->cpu_dai->id;
  3590. struct snd_soc_card *card = rtd->card;
  3591. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3592. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  3593. substream->name, substream->stream);
  3594. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3595. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  3596. return;
  3597. }
  3598. mutex_lock(&mi2s_intf_conf[index].lock);
  3599. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  3600. if (pdata->mi2s_gpio_p[index]) {
  3601. atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
  3602. if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
  3603. == 0) {
  3604. ret = msm_cdc_pinctrl_select_sleep_state(
  3605. pdata->mi2s_gpio_p[index]);
  3606. if (ret)
  3607. pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
  3608. __func__, ret);
  3609. }
  3610. }
  3611. ret = msm_mi2s_set_sclk(substream, false);
  3612. if (ret < 0)
  3613. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  3614. __func__, index, ret);
  3615. }
  3616. mutex_unlock(&mi2s_intf_conf[index].lock);
  3617. }
  3618. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  3619. struct snd_pcm_hw_params *params)
  3620. {
  3621. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3622. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3623. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3624. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3625. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  3626. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3627. int ret = 0;
  3628. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3629. codec_dai->name, codec_dai->id);
  3630. ret = snd_soc_dai_get_channel_map(codec_dai,
  3631. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3632. if (ret) {
  3633. dev_err(rtd->dev,
  3634. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  3635. __func__, ret);
  3636. goto err;
  3637. }
  3638. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  3639. __func__, tx_ch_cnt, dai_link->id);
  3640. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3641. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  3642. if (ret)
  3643. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  3644. __func__, ret);
  3645. err:
  3646. return ret;
  3647. }
  3648. static struct snd_soc_ops bengal_aux_be_ops = {
  3649. .startup = bengal_aux_snd_startup,
  3650. .shutdown = bengal_aux_snd_shutdown
  3651. };
  3652. static struct snd_soc_ops bengal_tdm_be_ops = {
  3653. .hw_params = bengal_tdm_snd_hw_params,
  3654. .startup = bengal_tdm_snd_startup,
  3655. .shutdown = bengal_tdm_snd_shutdown
  3656. };
  3657. static struct snd_soc_ops msm_mi2s_be_ops = {
  3658. .startup = msm_mi2s_snd_startup,
  3659. .shutdown = msm_mi2s_snd_shutdown,
  3660. };
  3661. static struct snd_soc_ops msm_fe_qos_ops = {
  3662. .prepare = msm_fe_qos_prepare,
  3663. };
  3664. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  3665. .startup = msm_snd_cdc_dma_startup,
  3666. .hw_params = msm_snd_cdc_dma_hw_params,
  3667. };
  3668. static struct snd_soc_ops msm_wcn_ops = {
  3669. .hw_params = msm_wcn_hw_params,
  3670. };
  3671. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3672. struct snd_kcontrol *kcontrol, int event)
  3673. {
  3674. struct msm_asoc_mach_data *pdata = NULL;
  3675. struct snd_soc_component *component =
  3676. snd_soc_dapm_to_component(w->dapm);
  3677. int ret = 0;
  3678. u32 dmic_idx;
  3679. int *dmic_gpio_cnt;
  3680. struct device_node *dmic_gpio;
  3681. char *wname;
  3682. wname = strpbrk(w->name, "0123");
  3683. if (!wname) {
  3684. dev_err(component->dev, "%s: widget not found\n", __func__);
  3685. return -EINVAL;
  3686. }
  3687. ret = kstrtouint(wname, 10, &dmic_idx);
  3688. if (ret < 0) {
  3689. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3690. __func__);
  3691. return -EINVAL;
  3692. }
  3693. pdata = snd_soc_card_get_drvdata(component->card);
  3694. switch (dmic_idx) {
  3695. case 0:
  3696. case 1:
  3697. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3698. dmic_gpio = pdata->dmic01_gpio_p;
  3699. break;
  3700. case 2:
  3701. case 3:
  3702. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3703. dmic_gpio = pdata->dmic23_gpio_p;
  3704. break;
  3705. default:
  3706. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3707. __func__);
  3708. return -EINVAL;
  3709. }
  3710. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3711. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3712. switch (event) {
  3713. case SND_SOC_DAPM_PRE_PMU:
  3714. (*dmic_gpio_cnt)++;
  3715. if (*dmic_gpio_cnt == 1) {
  3716. ret = msm_cdc_pinctrl_select_active_state(
  3717. dmic_gpio);
  3718. if (ret < 0) {
  3719. pr_err("%s: gpio set cannot be activated %sd",
  3720. __func__, "dmic_gpio");
  3721. return ret;
  3722. }
  3723. }
  3724. break;
  3725. case SND_SOC_DAPM_POST_PMD:
  3726. (*dmic_gpio_cnt)--;
  3727. if (*dmic_gpio_cnt == 0) {
  3728. ret = msm_cdc_pinctrl_select_sleep_state(
  3729. dmic_gpio);
  3730. if (ret < 0) {
  3731. pr_err("%s: gpio set cannot be de-activated %sd",
  3732. __func__, "dmic_gpio");
  3733. return ret;
  3734. }
  3735. }
  3736. break;
  3737. default:
  3738. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3739. return -EINVAL;
  3740. }
  3741. return 0;
  3742. }
  3743. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3744. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3745. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3746. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3747. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3748. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3749. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3750. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3751. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3752. };
  3753. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  3754. {
  3755. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3756. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  3757. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3758. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3759. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3760. }
  3761. #ifndef CONFIG_TDM_DISABLE
  3762. static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
  3763. {
  3764. snd_soc_add_component_controls(component, msm_tdm_snd_controls,
  3765. ARRAY_SIZE(msm_tdm_snd_controls));
  3766. }
  3767. #else
  3768. static void msm_add_tdm_snd_controls(struct snd_soc_component *component)
  3769. {
  3770. return;
  3771. }
  3772. #endif
  3773. #ifndef CONFIG_MI2S_DISABLE
  3774. static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
  3775. {
  3776. snd_soc_add_component_controls(component, msm_mi2s_snd_controls,
  3777. ARRAY_SIZE(msm_mi2s_snd_controls));
  3778. }
  3779. #else
  3780. static void msm_add_mi2s_snd_controls(struct snd_soc_component *component)
  3781. {
  3782. return;
  3783. }
  3784. #endif
  3785. #ifndef CONFIG_AUXPCM_DISABLE
  3786. static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
  3787. {
  3788. snd_soc_add_component_controls(component, msm_auxpcm_snd_controls,
  3789. ARRAY_SIZE(msm_auxpcm_snd_controls));
  3790. }
  3791. #else
  3792. static void msm_add_auxpcm_snd_controls(struct snd_soc_component *component)
  3793. {
  3794. return;
  3795. }
  3796. #endif
  3797. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3798. {
  3799. int ret = -EINVAL;
  3800. struct snd_soc_component *component;
  3801. struct snd_soc_dapm_context *dapm;
  3802. struct snd_card *card;
  3803. struct snd_info_entry *entry;
  3804. struct platform_device *pdev = NULL;
  3805. int i = 0;
  3806. char *data = NULL;
  3807. struct msm_asoc_mach_data *pdata =
  3808. snd_soc_card_get_drvdata(rtd->card);
  3809. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  3810. if (!component) {
  3811. pr_err("%s: could not find component for bolero_codec\n",
  3812. __func__);
  3813. return ret;
  3814. }
  3815. dapm = snd_soc_component_get_dapm(component);
  3816. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  3817. ARRAY_SIZE(msm_int_snd_controls));
  3818. if (ret < 0) {
  3819. pr_err("%s: add_component_controls failed: %d\n",
  3820. __func__, ret);
  3821. return ret;
  3822. }
  3823. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  3824. ARRAY_SIZE(msm_common_snd_controls));
  3825. if (ret < 0) {
  3826. pr_err("%s: add common snd controls failed: %d\n",
  3827. __func__, ret);
  3828. return ret;
  3829. }
  3830. msm_add_tdm_snd_controls(component);
  3831. msm_add_mi2s_snd_controls(component);
  3832. msm_add_auxpcm_snd_controls(component);
  3833. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  3834. ARRAY_SIZE(msm_int_dapm_widgets));
  3835. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3836. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3837. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3838. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3839. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  3840. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  3841. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3842. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3843. snd_soc_dapm_sync(dapm);
  3844. for (i = 0; i < rtd->card->num_aux_devs; i++)
  3845. {
  3846. if (msm_aux_dev[i].name != NULL ) {
  3847. if (strstr(msm_aux_dev[i].name, "wsa"))
  3848. continue;
  3849. }
  3850. if (msm_aux_dev[i].codec_of_node) {
  3851. pdev = of_find_device_by_node(
  3852. msm_aux_dev[i].codec_of_node);
  3853. if (pdev)
  3854. data = (char*) of_device_get_match_data(
  3855. &pdev->dev);
  3856. if (data != NULL) {
  3857. if (!strncmp(data, "wcd937x",
  3858. sizeof("wcd937x"))) {
  3859. bolero_set_port_map(component,
  3860. ARRAY_SIZE(sm_port_map),
  3861. sm_port_map);
  3862. break;
  3863. } else if (!strncmp( data, "rouleur",
  3864. sizeof("rouleur"))) {
  3865. bolero_set_port_map(component,
  3866. ARRAY_SIZE(sm_port_map_rouleur),
  3867. sm_port_map_rouleur);
  3868. break;
  3869. }
  3870. }
  3871. }
  3872. }
  3873. card = rtd->card->snd_card;
  3874. if (!pdata->codec_root) {
  3875. entry = snd_info_create_subdir(card->module, "codecs",
  3876. card->proc_root);
  3877. if (!entry) {
  3878. pr_debug("%s: Cannot create codecs module entry\n",
  3879. __func__);
  3880. ret = 0;
  3881. goto err;
  3882. }
  3883. pdata->codec_root = entry;
  3884. }
  3885. bolero_info_create_codec_entry(pdata->codec_root, component);
  3886. bolero_register_wake_irq(component, false);
  3887. codec_reg_done = true;
  3888. return 0;
  3889. err:
  3890. return ret;
  3891. }
  3892. static void *def_wcd_mbhc_cal(void)
  3893. {
  3894. void *wcd_mbhc_cal;
  3895. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  3896. u16 *btn_high;
  3897. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  3898. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  3899. if (!wcd_mbhc_cal)
  3900. return NULL;
  3901. WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
  3902. WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
  3903. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  3904. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  3905. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  3906. btn_high[0] = 75;
  3907. btn_high[1] = 150;
  3908. btn_high[2] = 237;
  3909. btn_high[3] = 500;
  3910. btn_high[4] = 500;
  3911. btn_high[5] = 500;
  3912. btn_high[6] = 500;
  3913. btn_high[7] = 500;
  3914. return wcd_mbhc_cal;
  3915. }
  3916. static void *def_rouleur_mbhc_cal(void)
  3917. {
  3918. void *wcd_mbhc_cal;
  3919. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  3920. u16 *btn_high;
  3921. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(ROULEUR_MBHC_DEF_BUTTONS,
  3922. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  3923. if (!wcd_mbhc_cal)
  3924. return NULL;
  3925. WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max =
  3926. ROULEUR_MBHC_HS_V_MAX;
  3927. WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn =
  3928. ROULEUR_MBHC_DEF_BUTTONS;
  3929. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  3930. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  3931. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  3932. btn_high[0] = 75;
  3933. btn_high[1] = 150;
  3934. btn_high[2] = 237;
  3935. btn_high[3] = 500;
  3936. btn_high[4] = 500;
  3937. return wcd_mbhc_cal;
  3938. }
  3939. /* Digital audio interface glue - connects codec <---> CPU */
  3940. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3941. /* FrontEnd DAI Links */
  3942. {/* hw:x,0 */
  3943. .name = MSM_DAILINK_NAME(Media1),
  3944. .stream_name = "MultiMedia1",
  3945. .cpu_dai_name = "MultiMedia1",
  3946. .platform_name = "msm-pcm-dsp.0",
  3947. .dynamic = 1,
  3948. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3949. .dpcm_playback = 1,
  3950. .dpcm_capture = 1,
  3951. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3952. SND_SOC_DPCM_TRIGGER_POST},
  3953. .codec_dai_name = "snd-soc-dummy-dai",
  3954. .codec_name = "snd-soc-dummy",
  3955. .ignore_suspend = 1,
  3956. /* this dainlink has playback support */
  3957. .ignore_pmdown_time = 1,
  3958. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3959. },
  3960. {/* hw:x,1 */
  3961. .name = MSM_DAILINK_NAME(Media2),
  3962. .stream_name = "MultiMedia2",
  3963. .cpu_dai_name = "MultiMedia2",
  3964. .platform_name = "msm-pcm-dsp.0",
  3965. .dynamic = 1,
  3966. .dpcm_playback = 1,
  3967. .dpcm_capture = 1,
  3968. .codec_dai_name = "snd-soc-dummy-dai",
  3969. .codec_name = "snd-soc-dummy",
  3970. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3971. SND_SOC_DPCM_TRIGGER_POST},
  3972. .ignore_suspend = 1,
  3973. /* this dainlink has playback support */
  3974. .ignore_pmdown_time = 1,
  3975. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3976. },
  3977. {/* hw:x,2 */
  3978. .name = "VoiceMMode1",
  3979. .stream_name = "VoiceMMode1",
  3980. .cpu_dai_name = "VoiceMMode1",
  3981. .platform_name = "msm-pcm-voice",
  3982. .dynamic = 1,
  3983. .dpcm_playback = 1,
  3984. .dpcm_capture = 1,
  3985. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3986. SND_SOC_DPCM_TRIGGER_POST},
  3987. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3988. .ignore_suspend = 1,
  3989. .ignore_pmdown_time = 1,
  3990. .codec_dai_name = "snd-soc-dummy-dai",
  3991. .codec_name = "snd-soc-dummy",
  3992. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3993. },
  3994. {/* hw:x,3 */
  3995. .name = "MSM VoIP",
  3996. .stream_name = "VoIP",
  3997. .cpu_dai_name = "VoIP",
  3998. .platform_name = "msm-voip-dsp",
  3999. .dynamic = 1,
  4000. .dpcm_playback = 1,
  4001. .dpcm_capture = 1,
  4002. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4003. SND_SOC_DPCM_TRIGGER_POST},
  4004. .codec_dai_name = "snd-soc-dummy-dai",
  4005. .codec_name = "snd-soc-dummy",
  4006. .ignore_suspend = 1,
  4007. /* this dainlink has playback support */
  4008. .ignore_pmdown_time = 1,
  4009. .id = MSM_FRONTEND_DAI_VOIP,
  4010. },
  4011. {/* hw:x,4 */
  4012. .name = MSM_DAILINK_NAME(ULL),
  4013. .stream_name = "MultiMedia3",
  4014. .cpu_dai_name = "MultiMedia3",
  4015. .platform_name = "msm-pcm-dsp.2",
  4016. .dynamic = 1,
  4017. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4018. .dpcm_playback = 1,
  4019. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4020. SND_SOC_DPCM_TRIGGER_POST},
  4021. .codec_dai_name = "snd-soc-dummy-dai",
  4022. .codec_name = "snd-soc-dummy",
  4023. .ignore_suspend = 1,
  4024. /* this dainlink has playback support */
  4025. .ignore_pmdown_time = 1,
  4026. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  4027. },
  4028. {/* hw:x,5 */
  4029. .name = "MSM AFE-PCM RX",
  4030. .stream_name = "AFE-PROXY RX",
  4031. .cpu_dai_name = "msm-dai-q6-dev.241",
  4032. .codec_name = "msm-stub-codec.1",
  4033. .codec_dai_name = "msm-stub-rx",
  4034. .platform_name = "msm-pcm-afe",
  4035. .dpcm_playback = 1,
  4036. .ignore_suspend = 1,
  4037. /* this dainlink has playback support */
  4038. .ignore_pmdown_time = 1,
  4039. },
  4040. {/* hw:x,6 */
  4041. .name = "MSM AFE-PCM TX",
  4042. .stream_name = "AFE-PROXY TX",
  4043. .cpu_dai_name = "msm-dai-q6-dev.240",
  4044. .codec_name = "msm-stub-codec.1",
  4045. .codec_dai_name = "msm-stub-tx",
  4046. .platform_name = "msm-pcm-afe",
  4047. .dpcm_capture = 1,
  4048. .ignore_suspend = 1,
  4049. },
  4050. {/* hw:x,7 */
  4051. .name = MSM_DAILINK_NAME(Compress1),
  4052. .stream_name = "Compress1",
  4053. .cpu_dai_name = "MultiMedia4",
  4054. .platform_name = "msm-compress-dsp",
  4055. .dynamic = 1,
  4056. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  4057. .dpcm_playback = 1,
  4058. .dpcm_capture = 1,
  4059. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4060. SND_SOC_DPCM_TRIGGER_POST},
  4061. .codec_dai_name = "snd-soc-dummy-dai",
  4062. .codec_name = "snd-soc-dummy",
  4063. .ignore_suspend = 1,
  4064. .ignore_pmdown_time = 1,
  4065. /* this dainlink has playback support */
  4066. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  4067. },
  4068. /* Hostless PCM purpose */
  4069. {/* hw:x,8 */
  4070. .name = "AUXPCM Hostless",
  4071. .stream_name = "AUXPCM Hostless",
  4072. .cpu_dai_name = "AUXPCM_HOSTLESS",
  4073. .platform_name = "msm-pcm-hostless",
  4074. .dynamic = 1,
  4075. .dpcm_playback = 1,
  4076. .dpcm_capture = 1,
  4077. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4078. SND_SOC_DPCM_TRIGGER_POST},
  4079. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4080. .ignore_suspend = 1,
  4081. /* this dainlink has playback support */
  4082. .ignore_pmdown_time = 1,
  4083. .codec_dai_name = "snd-soc-dummy-dai",
  4084. .codec_name = "snd-soc-dummy",
  4085. },
  4086. {/* hw:x,9 */
  4087. .name = MSM_DAILINK_NAME(LowLatency),
  4088. .stream_name = "MultiMedia5",
  4089. .cpu_dai_name = "MultiMedia5",
  4090. .platform_name = "msm-pcm-dsp.1",
  4091. .dynamic = 1,
  4092. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4093. .dpcm_playback = 1,
  4094. .dpcm_capture = 1,
  4095. .codec_dai_name = "snd-soc-dummy-dai",
  4096. .codec_name = "snd-soc-dummy",
  4097. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4098. SND_SOC_DPCM_TRIGGER_POST},
  4099. .ignore_suspend = 1,
  4100. /* this dainlink has playback support */
  4101. .ignore_pmdown_time = 1,
  4102. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  4103. .ops = &msm_fe_qos_ops,
  4104. },
  4105. {/* hw:x,10 */
  4106. .name = "Listen 1 Audio Service",
  4107. .stream_name = "Listen 1 Audio Service",
  4108. .cpu_dai_name = "LSM1",
  4109. .platform_name = "msm-lsm-client",
  4110. .dynamic = 1,
  4111. .dpcm_capture = 1,
  4112. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4113. SND_SOC_DPCM_TRIGGER_POST },
  4114. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4115. .ignore_suspend = 1,
  4116. .codec_dai_name = "snd-soc-dummy-dai",
  4117. .codec_name = "snd-soc-dummy",
  4118. .id = MSM_FRONTEND_DAI_LSM1,
  4119. },
  4120. /* Multiple Tunnel instances */
  4121. {/* hw:x,11 */
  4122. .name = MSM_DAILINK_NAME(Compress2),
  4123. .stream_name = "Compress2",
  4124. .cpu_dai_name = "MultiMedia7",
  4125. .platform_name = "msm-compress-dsp",
  4126. .dynamic = 1,
  4127. .dpcm_playback = 1,
  4128. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4129. SND_SOC_DPCM_TRIGGER_POST},
  4130. .codec_dai_name = "snd-soc-dummy-dai",
  4131. .codec_name = "snd-soc-dummy",
  4132. .ignore_suspend = 1,
  4133. .ignore_pmdown_time = 1,
  4134. /* this dainlink has playback support */
  4135. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  4136. },
  4137. {/* hw:x,12 */
  4138. .name = MSM_DAILINK_NAME(MultiMedia10),
  4139. .stream_name = "MultiMedia10",
  4140. .cpu_dai_name = "MultiMedia10",
  4141. .platform_name = "msm-pcm-dsp.1",
  4142. .dynamic = 1,
  4143. .dpcm_playback = 1,
  4144. .dpcm_capture = 1,
  4145. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4146. SND_SOC_DPCM_TRIGGER_POST},
  4147. .codec_dai_name = "snd-soc-dummy-dai",
  4148. .codec_name = "snd-soc-dummy",
  4149. .ignore_suspend = 1,
  4150. .ignore_pmdown_time = 1,
  4151. /* this dainlink has playback support */
  4152. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  4153. },
  4154. {/* hw:x,13 */
  4155. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  4156. .stream_name = "MM_NOIRQ",
  4157. .cpu_dai_name = "MultiMedia8",
  4158. .platform_name = "msm-pcm-dsp-noirq",
  4159. .dynamic = 1,
  4160. .dpcm_playback = 1,
  4161. .dpcm_capture = 1,
  4162. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4163. SND_SOC_DPCM_TRIGGER_POST},
  4164. .codec_dai_name = "snd-soc-dummy-dai",
  4165. .codec_name = "snd-soc-dummy",
  4166. .ignore_suspend = 1,
  4167. .ignore_pmdown_time = 1,
  4168. /* this dainlink has playback support */
  4169. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  4170. .ops = &msm_fe_qos_ops,
  4171. },
  4172. /* HDMI Hostless */
  4173. {/* hw:x,14 */
  4174. .name = "HDMI_RX_HOSTLESS",
  4175. .stream_name = "HDMI_RX_HOSTLESS",
  4176. .cpu_dai_name = "HDMI_HOSTLESS",
  4177. .platform_name = "msm-pcm-hostless",
  4178. .dynamic = 1,
  4179. .dpcm_playback = 1,
  4180. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4181. SND_SOC_DPCM_TRIGGER_POST},
  4182. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4183. .ignore_suspend = 1,
  4184. .ignore_pmdown_time = 1,
  4185. .codec_dai_name = "snd-soc-dummy-dai",
  4186. .codec_name = "snd-soc-dummy",
  4187. },
  4188. {/* hw:x,15 */
  4189. .name = "VoiceMMode2",
  4190. .stream_name = "VoiceMMode2",
  4191. .cpu_dai_name = "VoiceMMode2",
  4192. .platform_name = "msm-pcm-voice",
  4193. .dynamic = 1,
  4194. .dpcm_playback = 1,
  4195. .dpcm_capture = 1,
  4196. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4197. SND_SOC_DPCM_TRIGGER_POST},
  4198. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4199. .ignore_suspend = 1,
  4200. .ignore_pmdown_time = 1,
  4201. .codec_dai_name = "snd-soc-dummy-dai",
  4202. .codec_name = "snd-soc-dummy",
  4203. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  4204. },
  4205. /* LSM FE */
  4206. {/* hw:x,16 */
  4207. .name = "Listen 2 Audio Service",
  4208. .stream_name = "Listen 2 Audio Service",
  4209. .cpu_dai_name = "LSM2",
  4210. .platform_name = "msm-lsm-client",
  4211. .dynamic = 1,
  4212. .dpcm_capture = 1,
  4213. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4214. SND_SOC_DPCM_TRIGGER_POST },
  4215. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4216. .ignore_suspend = 1,
  4217. .codec_dai_name = "snd-soc-dummy-dai",
  4218. .codec_name = "snd-soc-dummy",
  4219. .id = MSM_FRONTEND_DAI_LSM2,
  4220. },
  4221. {/* hw:x,17 */
  4222. .name = "Listen 3 Audio Service",
  4223. .stream_name = "Listen 3 Audio Service",
  4224. .cpu_dai_name = "LSM3",
  4225. .platform_name = "msm-lsm-client",
  4226. .dynamic = 1,
  4227. .dpcm_capture = 1,
  4228. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4229. SND_SOC_DPCM_TRIGGER_POST },
  4230. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4231. .ignore_suspend = 1,
  4232. .codec_dai_name = "snd-soc-dummy-dai",
  4233. .codec_name = "snd-soc-dummy",
  4234. .id = MSM_FRONTEND_DAI_LSM3,
  4235. },
  4236. {/* hw:x,18 */
  4237. .name = "Listen 4 Audio Service",
  4238. .stream_name = "Listen 4 Audio Service",
  4239. .cpu_dai_name = "LSM4",
  4240. .platform_name = "msm-lsm-client",
  4241. .dynamic = 1,
  4242. .dpcm_capture = 1,
  4243. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4244. SND_SOC_DPCM_TRIGGER_POST },
  4245. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4246. .ignore_suspend = 1,
  4247. .codec_dai_name = "snd-soc-dummy-dai",
  4248. .codec_name = "snd-soc-dummy",
  4249. .id = MSM_FRONTEND_DAI_LSM4,
  4250. },
  4251. {/* hw:x,19 */
  4252. .name = "Listen 5 Audio Service",
  4253. .stream_name = "Listen 5 Audio Service",
  4254. .cpu_dai_name = "LSM5",
  4255. .platform_name = "msm-lsm-client",
  4256. .dynamic = 1,
  4257. .dpcm_capture = 1,
  4258. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4259. SND_SOC_DPCM_TRIGGER_POST },
  4260. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4261. .ignore_suspend = 1,
  4262. .codec_dai_name = "snd-soc-dummy-dai",
  4263. .codec_name = "snd-soc-dummy",
  4264. .id = MSM_FRONTEND_DAI_LSM5,
  4265. },
  4266. {/* hw:x,20 */
  4267. .name = "Listen 6 Audio Service",
  4268. .stream_name = "Listen 6 Audio Service",
  4269. .cpu_dai_name = "LSM6",
  4270. .platform_name = "msm-lsm-client",
  4271. .dynamic = 1,
  4272. .dpcm_capture = 1,
  4273. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4274. SND_SOC_DPCM_TRIGGER_POST },
  4275. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4276. .ignore_suspend = 1,
  4277. .codec_dai_name = "snd-soc-dummy-dai",
  4278. .codec_name = "snd-soc-dummy",
  4279. .id = MSM_FRONTEND_DAI_LSM6,
  4280. },
  4281. {/* hw:x,21 */
  4282. .name = "Listen 7 Audio Service",
  4283. .stream_name = "Listen 7 Audio Service",
  4284. .cpu_dai_name = "LSM7",
  4285. .platform_name = "msm-lsm-client",
  4286. .dynamic = 1,
  4287. .dpcm_capture = 1,
  4288. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4289. SND_SOC_DPCM_TRIGGER_POST },
  4290. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4291. .ignore_suspend = 1,
  4292. .codec_dai_name = "snd-soc-dummy-dai",
  4293. .codec_name = "snd-soc-dummy",
  4294. .id = MSM_FRONTEND_DAI_LSM7,
  4295. },
  4296. {/* hw:x,22 */
  4297. .name = "Listen 8 Audio Service",
  4298. .stream_name = "Listen 8 Audio Service",
  4299. .cpu_dai_name = "LSM8",
  4300. .platform_name = "msm-lsm-client",
  4301. .dynamic = 1,
  4302. .dpcm_capture = 1,
  4303. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4304. SND_SOC_DPCM_TRIGGER_POST },
  4305. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4306. .ignore_suspend = 1,
  4307. .codec_dai_name = "snd-soc-dummy-dai",
  4308. .codec_name = "snd-soc-dummy",
  4309. .id = MSM_FRONTEND_DAI_LSM8,
  4310. },
  4311. {/* hw:x,23 */
  4312. .name = MSM_DAILINK_NAME(Media9),
  4313. .stream_name = "MultiMedia9",
  4314. .cpu_dai_name = "MultiMedia9",
  4315. .platform_name = "msm-pcm-dsp.0",
  4316. .dynamic = 1,
  4317. .dpcm_playback = 1,
  4318. .dpcm_capture = 1,
  4319. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4320. SND_SOC_DPCM_TRIGGER_POST},
  4321. .codec_dai_name = "snd-soc-dummy-dai",
  4322. .codec_name = "snd-soc-dummy",
  4323. .ignore_suspend = 1,
  4324. /* this dainlink has playback support */
  4325. .ignore_pmdown_time = 1,
  4326. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  4327. },
  4328. {/* hw:x,24 */
  4329. .name = MSM_DAILINK_NAME(Compress4),
  4330. .stream_name = "Compress4",
  4331. .cpu_dai_name = "MultiMedia11",
  4332. .platform_name = "msm-compress-dsp",
  4333. .dynamic = 1,
  4334. .dpcm_playback = 1,
  4335. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4336. SND_SOC_DPCM_TRIGGER_POST},
  4337. .codec_dai_name = "snd-soc-dummy-dai",
  4338. .codec_name = "snd-soc-dummy",
  4339. .ignore_suspend = 1,
  4340. .ignore_pmdown_time = 1,
  4341. /* this dainlink has playback support */
  4342. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  4343. },
  4344. {/* hw:x,25 */
  4345. .name = MSM_DAILINK_NAME(Compress5),
  4346. .stream_name = "Compress5",
  4347. .cpu_dai_name = "MultiMedia12",
  4348. .platform_name = "msm-compress-dsp",
  4349. .dynamic = 1,
  4350. .dpcm_playback = 1,
  4351. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4352. SND_SOC_DPCM_TRIGGER_POST},
  4353. .codec_dai_name = "snd-soc-dummy-dai",
  4354. .codec_name = "snd-soc-dummy",
  4355. .ignore_suspend = 1,
  4356. .ignore_pmdown_time = 1,
  4357. /* this dainlink has playback support */
  4358. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  4359. },
  4360. {/* hw:x,26 */
  4361. .name = MSM_DAILINK_NAME(Compress6),
  4362. .stream_name = "Compress6",
  4363. .cpu_dai_name = "MultiMedia13",
  4364. .platform_name = "msm-compress-dsp",
  4365. .dynamic = 1,
  4366. .dpcm_playback = 1,
  4367. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4368. SND_SOC_DPCM_TRIGGER_POST},
  4369. .codec_dai_name = "snd-soc-dummy-dai",
  4370. .codec_name = "snd-soc-dummy",
  4371. .ignore_suspend = 1,
  4372. .ignore_pmdown_time = 1,
  4373. /* this dainlink has playback support */
  4374. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  4375. },
  4376. {/* hw:x,27 */
  4377. .name = MSM_DAILINK_NAME(Compress7),
  4378. .stream_name = "Compress7",
  4379. .cpu_dai_name = "MultiMedia14",
  4380. .platform_name = "msm-compress-dsp",
  4381. .dynamic = 1,
  4382. .dpcm_playback = 1,
  4383. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4384. SND_SOC_DPCM_TRIGGER_POST},
  4385. .codec_dai_name = "snd-soc-dummy-dai",
  4386. .codec_name = "snd-soc-dummy",
  4387. .ignore_suspend = 1,
  4388. .ignore_pmdown_time = 1,
  4389. /* this dainlink has playback support */
  4390. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  4391. },
  4392. {/* hw:x,28 */
  4393. .name = MSM_DAILINK_NAME(Compress8),
  4394. .stream_name = "Compress8",
  4395. .cpu_dai_name = "MultiMedia15",
  4396. .platform_name = "msm-compress-dsp",
  4397. .dynamic = 1,
  4398. .dpcm_playback = 1,
  4399. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4400. SND_SOC_DPCM_TRIGGER_POST},
  4401. .codec_dai_name = "snd-soc-dummy-dai",
  4402. .codec_name = "snd-soc-dummy",
  4403. .ignore_suspend = 1,
  4404. .ignore_pmdown_time = 1,
  4405. /* this dainlink has playback support */
  4406. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  4407. },
  4408. {/* hw:x,29 */
  4409. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  4410. .stream_name = "MM_NOIRQ_2",
  4411. .cpu_dai_name = "MultiMedia16",
  4412. .platform_name = "msm-pcm-dsp-noirq",
  4413. .dynamic = 1,
  4414. .dpcm_playback = 1,
  4415. .dpcm_capture = 1,
  4416. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4417. SND_SOC_DPCM_TRIGGER_POST},
  4418. .codec_dai_name = "snd-soc-dummy-dai",
  4419. .codec_name = "snd-soc-dummy",
  4420. .ignore_suspend = 1,
  4421. .ignore_pmdown_time = 1,
  4422. /* this dainlink has playback support */
  4423. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  4424. .ops = &msm_fe_qos_ops,
  4425. },
  4426. {/* hw:x,30 */
  4427. .name = "CDC_DMA Hostless",
  4428. .stream_name = "CDC_DMA Hostless",
  4429. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  4430. .platform_name = "msm-pcm-hostless",
  4431. .dynamic = 1,
  4432. .dpcm_playback = 1,
  4433. .dpcm_capture = 1,
  4434. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4435. SND_SOC_DPCM_TRIGGER_POST},
  4436. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4437. .ignore_suspend = 1,
  4438. /* this dailink has playback support */
  4439. .ignore_pmdown_time = 1,
  4440. .codec_dai_name = "snd-soc-dummy-dai",
  4441. .codec_name = "snd-soc-dummy",
  4442. },
  4443. {/* hw:x,31 */
  4444. .name = "TX3_CDC_DMA Hostless",
  4445. .stream_name = "TX3_CDC_DMA Hostless",
  4446. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  4447. .platform_name = "msm-pcm-hostless",
  4448. .dynamic = 1,
  4449. .dpcm_capture = 1,
  4450. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4451. SND_SOC_DPCM_TRIGGER_POST},
  4452. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4453. .ignore_suspend = 1,
  4454. .codec_dai_name = "snd-soc-dummy-dai",
  4455. .codec_name = "snd-soc-dummy",
  4456. },
  4457. {/* hw:x,32 */
  4458. .name = "Tertiary MI2S TX_Hostless",
  4459. .stream_name = "Tertiary MI2S_TX Hostless Capture",
  4460. .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
  4461. .platform_name = "msm-pcm-hostless",
  4462. .dynamic = 1,
  4463. .dpcm_capture = 1,
  4464. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4465. SND_SOC_DPCM_TRIGGER_POST},
  4466. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4467. .ignore_suspend = 1,
  4468. .ignore_pmdown_time = 1,
  4469. .codec_dai_name = "snd-soc-dummy-dai",
  4470. .codec_name = "snd-soc-dummy",
  4471. },
  4472. };
  4473. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  4474. {/* hw:x,33 */
  4475. .name = MSM_DAILINK_NAME(ASM Loopback),
  4476. .stream_name = "MultiMedia6",
  4477. .cpu_dai_name = "MultiMedia6",
  4478. .platform_name = "msm-pcm-loopback",
  4479. .dynamic = 1,
  4480. .dpcm_playback = 1,
  4481. .dpcm_capture = 1,
  4482. .codec_dai_name = "snd-soc-dummy-dai",
  4483. .codec_name = "snd-soc-dummy",
  4484. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4485. SND_SOC_DPCM_TRIGGER_POST},
  4486. .ignore_suspend = 1,
  4487. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4488. .ignore_pmdown_time = 1,
  4489. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  4490. },
  4491. {/* hw:x,34 */
  4492. .name = "USB Audio Hostless",
  4493. .stream_name = "USB Audio Hostless",
  4494. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  4495. .platform_name = "msm-pcm-hostless",
  4496. .dynamic = 1,
  4497. .dpcm_playback = 1,
  4498. .dpcm_capture = 1,
  4499. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4500. SND_SOC_DPCM_TRIGGER_POST},
  4501. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4502. .ignore_suspend = 1,
  4503. .ignore_pmdown_time = 1,
  4504. .codec_dai_name = "snd-soc-dummy-dai",
  4505. .codec_name = "snd-soc-dummy",
  4506. },
  4507. {/* hw:x,35 */
  4508. .name = "SLIMBUS_7 Hostless",
  4509. .stream_name = "SLIMBUS_7 Hostless",
  4510. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  4511. .platform_name = "msm-pcm-hostless",
  4512. .dynamic = 1,
  4513. .dpcm_capture = 1,
  4514. .dpcm_playback = 1,
  4515. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4516. SND_SOC_DPCM_TRIGGER_POST},
  4517. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4518. .ignore_suspend = 1,
  4519. .ignore_pmdown_time = 1,
  4520. .codec_dai_name = "snd-soc-dummy-dai",
  4521. .codec_name = "snd-soc-dummy",
  4522. },
  4523. {/* hw:x,36 */
  4524. .name = "Compress Capture",
  4525. .stream_name = "Compress9",
  4526. .cpu_dai_name = "MultiMedia17",
  4527. .platform_name = "msm-compress-dsp",
  4528. .dynamic = 1,
  4529. .dpcm_capture = 1,
  4530. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4531. SND_SOC_DPCM_TRIGGER_POST},
  4532. .codec_dai_name = "snd-soc-dummy-dai",
  4533. .codec_name = "snd-soc-dummy",
  4534. .ignore_suspend = 1,
  4535. .ignore_pmdown_time = 1,
  4536. .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
  4537. },
  4538. {/* hw:x,37 */
  4539. .name = "SLIMBUS_8 Hostless",
  4540. .stream_name = "SLIMBUS_8 Hostless",
  4541. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  4542. .platform_name = "msm-pcm-hostless",
  4543. .dynamic = 1,
  4544. .dpcm_capture = 1,
  4545. .dpcm_playback = 1,
  4546. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4547. SND_SOC_DPCM_TRIGGER_POST},
  4548. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4549. .ignore_suspend = 1,
  4550. .ignore_pmdown_time = 1,
  4551. .codec_dai_name = "snd-soc-dummy-dai",
  4552. .codec_name = "snd-soc-dummy",
  4553. },
  4554. {/* hw:x,38 */
  4555. .name = LPASS_BE_TX_CDC_DMA_TX_5,
  4556. .stream_name = "TX CDC DMA5 Capture",
  4557. .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
  4558. .platform_name = "msm-pcm-hostless",
  4559. .codec_name = "bolero_codec",
  4560. .codec_dai_name = "tx_macro_tx3",
  4561. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
  4562. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4563. .ignore_suspend = 1,
  4564. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4565. .ops = &msm_cdc_dma_be_ops,
  4566. },
  4567. {/* hw:x,39 */
  4568. .name = MSM_DAILINK_NAME(Compress3),
  4569. .stream_name = "Compress3",
  4570. .cpu_dai_name = "MultiMedia10",
  4571. .platform_name = "msm-compress-dsp",
  4572. .dynamic = 1,
  4573. .dpcm_playback = 1,
  4574. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4575. SND_SOC_DPCM_TRIGGER_POST},
  4576. .codec_dai_name = "snd-soc-dummy-dai",
  4577. .codec_name = "snd-soc-dummy",
  4578. .ignore_suspend = 1,
  4579. .ignore_pmdown_time = 1,
  4580. /* this dainlink has playback support */
  4581. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  4582. },
  4583. };
  4584. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  4585. /* Backend AFE DAI Links */
  4586. {
  4587. .name = LPASS_BE_AFE_PCM_RX,
  4588. .stream_name = "AFE Playback",
  4589. .cpu_dai_name = "msm-dai-q6-dev.224",
  4590. .platform_name = "msm-pcm-routing",
  4591. .codec_name = "msm-stub-codec.1",
  4592. .codec_dai_name = "msm-stub-rx",
  4593. .no_pcm = 1,
  4594. .dpcm_playback = 1,
  4595. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  4596. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4597. /* this dainlink has playback support */
  4598. .ignore_pmdown_time = 1,
  4599. .ignore_suspend = 1,
  4600. },
  4601. {
  4602. .name = LPASS_BE_AFE_PCM_TX,
  4603. .stream_name = "AFE Capture",
  4604. .cpu_dai_name = "msm-dai-q6-dev.225",
  4605. .platform_name = "msm-pcm-routing",
  4606. .codec_name = "msm-stub-codec.1",
  4607. .codec_dai_name = "msm-stub-tx",
  4608. .no_pcm = 1,
  4609. .dpcm_capture = 1,
  4610. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  4611. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4612. .ignore_suspend = 1,
  4613. },
  4614. /* Incall Record Uplink BACK END DAI Link */
  4615. {
  4616. .name = LPASS_BE_INCALL_RECORD_TX,
  4617. .stream_name = "Voice Uplink Capture",
  4618. .cpu_dai_name = "msm-dai-q6-dev.32772",
  4619. .platform_name = "msm-pcm-routing",
  4620. .codec_name = "msm-stub-codec.1",
  4621. .codec_dai_name = "msm-stub-tx",
  4622. .no_pcm = 1,
  4623. .dpcm_capture = 1,
  4624. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  4625. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4626. .ignore_suspend = 1,
  4627. },
  4628. /* Incall Record Downlink BACK END DAI Link */
  4629. {
  4630. .name = LPASS_BE_INCALL_RECORD_RX,
  4631. .stream_name = "Voice Downlink Capture",
  4632. .cpu_dai_name = "msm-dai-q6-dev.32771",
  4633. .platform_name = "msm-pcm-routing",
  4634. .codec_name = "msm-stub-codec.1",
  4635. .codec_dai_name = "msm-stub-tx",
  4636. .no_pcm = 1,
  4637. .dpcm_capture = 1,
  4638. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  4639. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4640. .ignore_suspend = 1,
  4641. },
  4642. /* Incall Music BACK END DAI Link */
  4643. {
  4644. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  4645. .stream_name = "Voice Farend Playback",
  4646. .cpu_dai_name = "msm-dai-q6-dev.32773",
  4647. .platform_name = "msm-pcm-routing",
  4648. .codec_name = "msm-stub-codec.1",
  4649. .codec_dai_name = "msm-stub-rx",
  4650. .no_pcm = 1,
  4651. .dpcm_playback = 1,
  4652. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  4653. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4654. .ignore_suspend = 1,
  4655. .ignore_pmdown_time = 1,
  4656. },
  4657. /* Incall Music 2 BACK END DAI Link */
  4658. {
  4659. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  4660. .stream_name = "Voice2 Farend Playback",
  4661. .cpu_dai_name = "msm-dai-q6-dev.32770",
  4662. .platform_name = "msm-pcm-routing",
  4663. .codec_name = "msm-stub-codec.1",
  4664. .codec_dai_name = "msm-stub-rx",
  4665. .no_pcm = 1,
  4666. .dpcm_playback = 1,
  4667. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  4668. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4669. .ignore_suspend = 1,
  4670. .ignore_pmdown_time = 1,
  4671. },
  4672. /* Proxy Tx BACK END DAI Link */
  4673. {
  4674. .name = LPASS_BE_PROXY_TX,
  4675. .stream_name = "Proxy Capture",
  4676. .cpu_dai_name = "msm-dai-q6-dev.8195",
  4677. .platform_name = "msm-pcm-routing",
  4678. .codec_name = "msm-stub-codec.1",
  4679. .codec_dai_name = "msm-stub-tx",
  4680. .no_pcm = 1,
  4681. .dpcm_capture = 1,
  4682. .id = MSM_BACKEND_DAI_PROXY_TX,
  4683. .ignore_suspend = 1,
  4684. },
  4685. /* Proxy Rx BACK END DAI Link */
  4686. {
  4687. .name = LPASS_BE_PROXY_RX,
  4688. .stream_name = "Proxy Playback",
  4689. .cpu_dai_name = "msm-dai-q6-dev.8194",
  4690. .platform_name = "msm-pcm-routing",
  4691. .codec_name = "msm-stub-codec.1",
  4692. .codec_dai_name = "msm-stub-rx",
  4693. .no_pcm = 1,
  4694. .dpcm_playback = 1,
  4695. .id = MSM_BACKEND_DAI_PROXY_RX,
  4696. .ignore_pmdown_time = 1,
  4697. .ignore_suspend = 1,
  4698. },
  4699. {
  4700. .name = LPASS_BE_USB_AUDIO_RX,
  4701. .stream_name = "USB Audio Playback",
  4702. .cpu_dai_name = "msm-dai-q6-dev.28672",
  4703. .platform_name = "msm-pcm-routing",
  4704. .codec_name = "msm-stub-codec.1",
  4705. .codec_dai_name = "msm-stub-rx",
  4706. .dynamic_be = 1,
  4707. .no_pcm = 1,
  4708. .dpcm_playback = 1,
  4709. .id = MSM_BACKEND_DAI_USB_RX,
  4710. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4711. .ignore_pmdown_time = 1,
  4712. .ignore_suspend = 1,
  4713. },
  4714. {
  4715. .name = LPASS_BE_USB_AUDIO_TX,
  4716. .stream_name = "USB Audio Capture",
  4717. .cpu_dai_name = "msm-dai-q6-dev.28673",
  4718. .platform_name = "msm-pcm-routing",
  4719. .codec_name = "msm-stub-codec.1",
  4720. .codec_dai_name = "msm-stub-tx",
  4721. .no_pcm = 1,
  4722. .dpcm_capture = 1,
  4723. .id = MSM_BACKEND_DAI_USB_TX,
  4724. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4725. .ignore_suspend = 1,
  4726. },
  4727. };
  4728. static struct snd_soc_dai_link msm_tdm_be_dai_links[] = {
  4729. {
  4730. .name = LPASS_BE_PRI_TDM_RX_0,
  4731. .stream_name = "Primary TDM0 Playback",
  4732. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  4733. .platform_name = "msm-pcm-routing",
  4734. .codec_name = "msm-stub-codec.1",
  4735. .codec_dai_name = "msm-stub-rx",
  4736. .no_pcm = 1,
  4737. .dpcm_playback = 1,
  4738. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  4739. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4740. .ops = &bengal_tdm_be_ops,
  4741. .ignore_suspend = 1,
  4742. .ignore_pmdown_time = 1,
  4743. },
  4744. {
  4745. .name = LPASS_BE_PRI_TDM_TX_0,
  4746. .stream_name = "Primary TDM0 Capture",
  4747. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  4748. .platform_name = "msm-pcm-routing",
  4749. .codec_name = "msm-stub-codec.1",
  4750. .codec_dai_name = "msm-stub-tx",
  4751. .no_pcm = 1,
  4752. .dpcm_capture = 1,
  4753. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  4754. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4755. .ops = &bengal_tdm_be_ops,
  4756. .ignore_suspend = 1,
  4757. },
  4758. {
  4759. .name = LPASS_BE_SEC_TDM_RX_0,
  4760. .stream_name = "Secondary TDM0 Playback",
  4761. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  4762. .platform_name = "msm-pcm-routing",
  4763. .codec_name = "msm-stub-codec.1",
  4764. .codec_dai_name = "msm-stub-rx",
  4765. .no_pcm = 1,
  4766. .dpcm_playback = 1,
  4767. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  4768. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4769. .ops = &bengal_tdm_be_ops,
  4770. .ignore_suspend = 1,
  4771. .ignore_pmdown_time = 1,
  4772. },
  4773. {
  4774. .name = LPASS_BE_SEC_TDM_TX_0,
  4775. .stream_name = "Secondary TDM0 Capture",
  4776. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  4777. .platform_name = "msm-pcm-routing",
  4778. .codec_name = "msm-stub-codec.1",
  4779. .codec_dai_name = "msm-stub-tx",
  4780. .no_pcm = 1,
  4781. .dpcm_capture = 1,
  4782. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  4783. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4784. .ops = &bengal_tdm_be_ops,
  4785. .ignore_suspend = 1,
  4786. },
  4787. {
  4788. .name = LPASS_BE_TERT_TDM_RX_0,
  4789. .stream_name = "Tertiary TDM0 Playback",
  4790. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  4791. .platform_name = "msm-pcm-routing",
  4792. .codec_name = "msm-stub-codec.1",
  4793. .codec_dai_name = "msm-stub-rx",
  4794. .no_pcm = 1,
  4795. .dpcm_playback = 1,
  4796. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  4797. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4798. .ops = &bengal_tdm_be_ops,
  4799. .ignore_suspend = 1,
  4800. .ignore_pmdown_time = 1,
  4801. },
  4802. {
  4803. .name = LPASS_BE_TERT_TDM_TX_0,
  4804. .stream_name = "Tertiary TDM0 Capture",
  4805. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  4806. .platform_name = "msm-pcm-routing",
  4807. .codec_name = "msm-stub-codec.1",
  4808. .codec_dai_name = "msm-stub-tx",
  4809. .no_pcm = 1,
  4810. .dpcm_capture = 1,
  4811. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  4812. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4813. .ops = &bengal_tdm_be_ops,
  4814. .ignore_suspend = 1,
  4815. },
  4816. {
  4817. .name = LPASS_BE_QUAT_TDM_RX_0,
  4818. .stream_name = "Quaternary TDM0 Playback",
  4819. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  4820. .platform_name = "msm-pcm-routing",
  4821. .codec_name = "msm-stub-codec.1",
  4822. .codec_dai_name = "msm-stub-rx",
  4823. .no_pcm = 1,
  4824. .dpcm_playback = 1,
  4825. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  4826. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4827. .ops = &bengal_tdm_be_ops,
  4828. .ignore_suspend = 1,
  4829. .ignore_pmdown_time = 1,
  4830. },
  4831. {
  4832. .name = LPASS_BE_QUAT_TDM_TX_0,
  4833. .stream_name = "Quaternary TDM0 Capture",
  4834. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  4835. .platform_name = "msm-pcm-routing",
  4836. .codec_name = "msm-stub-codec.1",
  4837. .codec_dai_name = "msm-stub-tx",
  4838. .no_pcm = 1,
  4839. .dpcm_capture = 1,
  4840. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  4841. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4842. .ops = &bengal_tdm_be_ops,
  4843. .ignore_suspend = 1,
  4844. },
  4845. };
  4846. static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
  4847. {
  4848. .name = LPASS_BE_SLIMBUS_7_RX,
  4849. .stream_name = "Slimbus7 Playback",
  4850. .cpu_dai_name = "msm-dai-q6-dev.16398",
  4851. .platform_name = "msm-pcm-routing",
  4852. .codec_name = "btfmslim_slave",
  4853. /* BT codec driver determines capabilities based on
  4854. * dai name, bt codecdai name should always contains
  4855. * supported usecase information
  4856. */
  4857. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  4858. .no_pcm = 1,
  4859. .dpcm_playback = 1,
  4860. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  4861. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4862. .init = &msm_wcn_init,
  4863. .ops = &msm_wcn_ops,
  4864. /* dai link has playback support */
  4865. .ignore_pmdown_time = 1,
  4866. .ignore_suspend = 1,
  4867. },
  4868. {
  4869. .name = LPASS_BE_SLIMBUS_7_TX,
  4870. .stream_name = "Slimbus7 Capture",
  4871. .cpu_dai_name = "msm-dai-q6-dev.16399",
  4872. .platform_name = "msm-pcm-routing",
  4873. .codec_name = "btfmslim_slave",
  4874. .codec_dai_name = "btfm_bt_sco_slim_tx",
  4875. .no_pcm = 1,
  4876. .dpcm_capture = 1,
  4877. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  4878. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4879. .ops = &msm_wcn_ops,
  4880. .ignore_suspend = 1,
  4881. },
  4882. {
  4883. .name = LPASS_BE_SLIMBUS_8_TX,
  4884. .stream_name = "Slimbus8 Capture",
  4885. .cpu_dai_name = "msm-dai-q6-dev.16401",
  4886. .platform_name = "msm-pcm-routing",
  4887. .codec_name = "btfmslim_slave",
  4888. .codec_dai_name = "btfm_fm_slim_tx",
  4889. .no_pcm = 1,
  4890. .dpcm_capture = 1,
  4891. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  4892. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4893. .ops = &msm_wcn_ops,
  4894. .ignore_suspend = 1,
  4895. },
  4896. };
  4897. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  4898. {
  4899. .name = LPASS_BE_PRI_MI2S_RX,
  4900. .stream_name = "Primary MI2S Playback",
  4901. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4902. .platform_name = "msm-pcm-routing",
  4903. .codec_name = "msm-stub-codec.1",
  4904. .codec_dai_name = "msm-stub-rx",
  4905. .no_pcm = 1,
  4906. .dpcm_playback = 1,
  4907. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  4908. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4909. .ops = &msm_mi2s_be_ops,
  4910. .ignore_suspend = 1,
  4911. .ignore_pmdown_time = 1,
  4912. },
  4913. {
  4914. .name = LPASS_BE_PRI_MI2S_TX,
  4915. .stream_name = "Primary MI2S Capture",
  4916. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4917. .platform_name = "msm-pcm-routing",
  4918. .codec_name = "msm-stub-codec.1",
  4919. .codec_dai_name = "msm-stub-tx",
  4920. .no_pcm = 1,
  4921. .dpcm_capture = 1,
  4922. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  4923. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4924. .ops = &msm_mi2s_be_ops,
  4925. .ignore_suspend = 1,
  4926. },
  4927. {
  4928. .name = LPASS_BE_SEC_MI2S_RX,
  4929. .stream_name = "Secondary MI2S Playback",
  4930. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4931. .platform_name = "msm-pcm-routing",
  4932. .codec_name = "msm-stub-codec.1",
  4933. .codec_dai_name = "msm-stub-rx",
  4934. .no_pcm = 1,
  4935. .dpcm_playback = 1,
  4936. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  4937. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4938. .ops = &msm_mi2s_be_ops,
  4939. .ignore_suspend = 1,
  4940. .ignore_pmdown_time = 1,
  4941. },
  4942. {
  4943. .name = LPASS_BE_SEC_MI2S_TX,
  4944. .stream_name = "Secondary MI2S Capture",
  4945. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4946. .platform_name = "msm-pcm-routing",
  4947. .codec_name = "msm-stub-codec.1",
  4948. .codec_dai_name = "msm-stub-tx",
  4949. .no_pcm = 1,
  4950. .dpcm_capture = 1,
  4951. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  4952. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4953. .ops = &msm_mi2s_be_ops,
  4954. .ignore_suspend = 1,
  4955. },
  4956. {
  4957. .name = LPASS_BE_TERT_MI2S_RX,
  4958. .stream_name = "Tertiary MI2S Playback",
  4959. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4960. .platform_name = "msm-pcm-routing",
  4961. .codec_name = "msm-stub-codec.1",
  4962. .codec_dai_name = "msm-stub-rx",
  4963. .no_pcm = 1,
  4964. .dpcm_playback = 1,
  4965. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  4966. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4967. .ops = &msm_mi2s_be_ops,
  4968. .ignore_suspend = 1,
  4969. .ignore_pmdown_time = 1,
  4970. },
  4971. {
  4972. .name = LPASS_BE_TERT_MI2S_TX,
  4973. .stream_name = "Tertiary MI2S Capture",
  4974. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4975. .platform_name = "msm-pcm-routing",
  4976. .codec_name = "msm-stub-codec.1",
  4977. .codec_dai_name = "msm-stub-tx",
  4978. .no_pcm = 1,
  4979. .dpcm_capture = 1,
  4980. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  4981. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4982. .ops = &msm_mi2s_be_ops,
  4983. .ignore_suspend = 1,
  4984. },
  4985. {
  4986. .name = LPASS_BE_QUAT_MI2S_RX,
  4987. .stream_name = "Quaternary MI2S Playback",
  4988. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  4989. .platform_name = "msm-pcm-routing",
  4990. .codec_name = "msm-stub-codec.1",
  4991. .codec_dai_name = "msm-stub-rx",
  4992. .no_pcm = 1,
  4993. .dpcm_playback = 1,
  4994. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  4995. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4996. .ops = &msm_mi2s_be_ops,
  4997. .ignore_suspend = 1,
  4998. .ignore_pmdown_time = 1,
  4999. },
  5000. {
  5001. .name = LPASS_BE_QUAT_MI2S_TX,
  5002. .stream_name = "Quaternary MI2S Capture",
  5003. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  5004. .platform_name = "msm-pcm-routing",
  5005. .codec_name = "msm-stub-codec.1",
  5006. .codec_dai_name = "msm-stub-tx",
  5007. .no_pcm = 1,
  5008. .dpcm_capture = 1,
  5009. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  5010. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5011. .ops = &msm_mi2s_be_ops,
  5012. .ignore_suspend = 1,
  5013. },
  5014. };
  5015. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  5016. /* Primary AUX PCM Backend DAI Links */
  5017. {
  5018. .name = LPASS_BE_AUXPCM_RX,
  5019. .stream_name = "AUX PCM Playback",
  5020. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5021. .platform_name = "msm-pcm-routing",
  5022. .codec_name = "msm-stub-codec.1",
  5023. .codec_dai_name = "msm-stub-rx",
  5024. .no_pcm = 1,
  5025. .dpcm_playback = 1,
  5026. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  5027. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5028. .ops = &bengal_aux_be_ops,
  5029. .ignore_pmdown_time = 1,
  5030. .ignore_suspend = 1,
  5031. },
  5032. {
  5033. .name = LPASS_BE_AUXPCM_TX,
  5034. .stream_name = "AUX PCM Capture",
  5035. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5036. .platform_name = "msm-pcm-routing",
  5037. .codec_name = "msm-stub-codec.1",
  5038. .codec_dai_name = "msm-stub-tx",
  5039. .no_pcm = 1,
  5040. .dpcm_capture = 1,
  5041. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  5042. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5043. .ops = &bengal_aux_be_ops,
  5044. .ignore_suspend = 1,
  5045. },
  5046. /* Secondary AUX PCM Backend DAI Links */
  5047. {
  5048. .name = LPASS_BE_SEC_AUXPCM_RX,
  5049. .stream_name = "Sec AUX PCM Playback",
  5050. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  5051. .platform_name = "msm-pcm-routing",
  5052. .codec_name = "msm-stub-codec.1",
  5053. .codec_dai_name = "msm-stub-rx",
  5054. .no_pcm = 1,
  5055. .dpcm_playback = 1,
  5056. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  5057. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5058. .ops = &bengal_aux_be_ops,
  5059. .ignore_pmdown_time = 1,
  5060. .ignore_suspend = 1,
  5061. },
  5062. {
  5063. .name = LPASS_BE_SEC_AUXPCM_TX,
  5064. .stream_name = "Sec AUX PCM Capture",
  5065. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  5066. .platform_name = "msm-pcm-routing",
  5067. .codec_name = "msm-stub-codec.1",
  5068. .codec_dai_name = "msm-stub-tx",
  5069. .no_pcm = 1,
  5070. .dpcm_capture = 1,
  5071. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  5072. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5073. .ops = &bengal_aux_be_ops,
  5074. .ignore_suspend = 1,
  5075. },
  5076. /* Tertiary AUX PCM Backend DAI Links */
  5077. {
  5078. .name = LPASS_BE_TERT_AUXPCM_RX,
  5079. .stream_name = "Tert AUX PCM Playback",
  5080. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5081. .platform_name = "msm-pcm-routing",
  5082. .codec_name = "msm-stub-codec.1",
  5083. .codec_dai_name = "msm-stub-rx",
  5084. .no_pcm = 1,
  5085. .dpcm_playback = 1,
  5086. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  5087. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5088. .ops = &bengal_aux_be_ops,
  5089. .ignore_suspend = 1,
  5090. },
  5091. {
  5092. .name = LPASS_BE_TERT_AUXPCM_TX,
  5093. .stream_name = "Tert AUX PCM Capture",
  5094. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  5095. .platform_name = "msm-pcm-routing",
  5096. .codec_name = "msm-stub-codec.1",
  5097. .codec_dai_name = "msm-stub-tx",
  5098. .no_pcm = 1,
  5099. .dpcm_capture = 1,
  5100. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  5101. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5102. .ops = &bengal_aux_be_ops,
  5103. .ignore_suspend = 1,
  5104. },
  5105. /* Quaternary AUX PCM Backend DAI Links */
  5106. {
  5107. .name = LPASS_BE_QUAT_AUXPCM_RX,
  5108. .stream_name = "Quat AUX PCM Playback",
  5109. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  5110. .platform_name = "msm-pcm-routing",
  5111. .codec_name = "msm-stub-codec.1",
  5112. .codec_dai_name = "msm-stub-rx",
  5113. .no_pcm = 1,
  5114. .dpcm_playback = 1,
  5115. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  5116. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5117. .ops = &bengal_aux_be_ops,
  5118. .ignore_suspend = 1,
  5119. },
  5120. {
  5121. .name = LPASS_BE_QUAT_AUXPCM_TX,
  5122. .stream_name = "Quat AUX PCM Capture",
  5123. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  5124. .platform_name = "msm-pcm-routing",
  5125. .codec_name = "msm-stub-codec.1",
  5126. .codec_dai_name = "msm-stub-tx",
  5127. .no_pcm = 1,
  5128. .dpcm_capture = 1,
  5129. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  5130. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5131. .ops = &bengal_aux_be_ops,
  5132. .ignore_suspend = 1,
  5133. },
  5134. };
  5135. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  5136. /* RX CDC DMA Backend DAI Links */
  5137. {
  5138. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  5139. .stream_name = "RX CDC DMA0 Playback",
  5140. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  5141. .platform_name = "msm-pcm-routing",
  5142. .codec_name = "bolero_codec",
  5143. .codec_dai_name = "rx_macro_rx1",
  5144. .dynamic_be = 1,
  5145. .no_pcm = 1,
  5146. .dpcm_playback = 1,
  5147. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  5148. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5149. .ignore_pmdown_time = 1,
  5150. .ignore_suspend = 1,
  5151. .ops = &msm_cdc_dma_be_ops,
  5152. },
  5153. {
  5154. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  5155. .stream_name = "RX CDC DMA1 Playback",
  5156. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  5157. .platform_name = "msm-pcm-routing",
  5158. .codec_name = "bolero_codec",
  5159. .codec_dai_name = "rx_macro_rx2",
  5160. .dynamic_be = 1,
  5161. .no_pcm = 1,
  5162. .dpcm_playback = 1,
  5163. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  5164. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5165. .ignore_pmdown_time = 1,
  5166. .ignore_suspend = 1,
  5167. .ops = &msm_cdc_dma_be_ops,
  5168. },
  5169. {
  5170. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  5171. .stream_name = "RX CDC DMA2 Playback",
  5172. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  5173. .platform_name = "msm-pcm-routing",
  5174. .codec_name = "bolero_codec",
  5175. .codec_dai_name = "rx_macro_rx3",
  5176. .dynamic_be = 1,
  5177. .no_pcm = 1,
  5178. .dpcm_playback = 1,
  5179. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  5180. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5181. .ignore_pmdown_time = 1,
  5182. .ignore_suspend = 1,
  5183. .ops = &msm_cdc_dma_be_ops,
  5184. },
  5185. {
  5186. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  5187. .stream_name = "RX CDC DMA3 Playback",
  5188. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  5189. .platform_name = "msm-pcm-routing",
  5190. .codec_name = "bolero_codec",
  5191. .codec_dai_name = "rx_macro_rx4",
  5192. .dynamic_be = 1,
  5193. .no_pcm = 1,
  5194. .dpcm_playback = 1,
  5195. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  5196. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5197. .ignore_pmdown_time = 1,
  5198. .ignore_suspend = 1,
  5199. .ops = &msm_cdc_dma_be_ops,
  5200. },
  5201. /* TX CDC DMA Backend DAI Links */
  5202. {
  5203. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  5204. .stream_name = "TX CDC DMA3 Capture",
  5205. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  5206. .platform_name = "msm-pcm-routing",
  5207. .codec_name = "bolero_codec",
  5208. .codec_dai_name = "tx_macro_tx1",
  5209. .no_pcm = 1,
  5210. .dpcm_capture = 1,
  5211. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  5212. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5213. .ignore_suspend = 1,
  5214. .ops = &msm_cdc_dma_be_ops,
  5215. },
  5216. {
  5217. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  5218. .stream_name = "TX CDC DMA4 Capture",
  5219. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  5220. .platform_name = "msm-pcm-routing",
  5221. .codec_name = "bolero_codec",
  5222. .codec_dai_name = "tx_macro_tx2",
  5223. .no_pcm = 1,
  5224. .dpcm_capture = 1,
  5225. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  5226. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5227. .ignore_suspend = 1,
  5228. .ops = &msm_cdc_dma_be_ops,
  5229. },
  5230. };
  5231. static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
  5232. {
  5233. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  5234. .stream_name = "VA CDC DMA0 Capture",
  5235. .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
  5236. .platform_name = "msm-pcm-routing",
  5237. .codec_name = "bolero_codec",
  5238. .codec_dai_name = "va_macro_tx1",
  5239. .no_pcm = 1,
  5240. .dpcm_capture = 1,
  5241. .init = &msm_int_audrx_init,
  5242. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  5243. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5244. .ignore_suspend = 1,
  5245. .ops = &msm_cdc_dma_be_ops,
  5246. },
  5247. {
  5248. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  5249. .stream_name = "VA CDC DMA1 Capture",
  5250. .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
  5251. .platform_name = "msm-pcm-routing",
  5252. .codec_name = "bolero_codec",
  5253. .codec_dai_name = "va_macro_tx2",
  5254. .no_pcm = 1,
  5255. .dpcm_capture = 1,
  5256. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  5257. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5258. .ignore_suspend = 1,
  5259. .ops = &msm_cdc_dma_be_ops,
  5260. },
  5261. {
  5262. .name = LPASS_BE_VA_CDC_DMA_TX_2,
  5263. .stream_name = "VA CDC DMA2 Capture",
  5264. .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
  5265. .platform_name = "msm-pcm-routing",
  5266. .codec_name = "bolero_codec",
  5267. .codec_dai_name = "va_macro_tx3",
  5268. .no_pcm = 1,
  5269. .dpcm_capture = 1,
  5270. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
  5271. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5272. .ignore_suspend = 1,
  5273. .ops = &msm_cdc_dma_be_ops,
  5274. },
  5275. };
  5276. static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
  5277. {
  5278. .name = LPASS_BE_AFE_LOOPBACK_TX,
  5279. .stream_name = "AFE Loopback Capture",
  5280. .cpu_dai_name = "msm-dai-q6-dev.24577",
  5281. .platform_name = "msm-pcm-routing",
  5282. .codec_name = "msm-stub-codec.1",
  5283. .codec_dai_name = "msm-stub-tx",
  5284. .no_pcm = 1,
  5285. .dpcm_capture = 1,
  5286. .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
  5287. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5288. .ignore_pmdown_time = 1,
  5289. .ignore_suspend = 1,
  5290. },
  5291. };
  5292. static struct snd_soc_dai_link msm_bengal_dai_links[
  5293. ARRAY_SIZE(msm_common_dai_links) +
  5294. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  5295. ARRAY_SIZE(msm_common_be_dai_links) +
  5296. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  5297. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  5298. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
  5299. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
  5300. ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
  5301. ARRAY_SIZE(msm_wcn_btfm_be_dai_links) +
  5302. ARRAY_SIZE(msm_tdm_be_dai_links)];
  5303. static int msm_populate_dai_link_component_of_node(
  5304. struct snd_soc_card *card)
  5305. {
  5306. int i, index, ret = 0;
  5307. struct device *cdev = card->dev;
  5308. struct snd_soc_dai_link *dai_link = card->dai_link;
  5309. struct device_node *np;
  5310. if (!cdev) {
  5311. dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
  5312. return -ENODEV;
  5313. }
  5314. for (i = 0; i < card->num_links; i++) {
  5315. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  5316. continue;
  5317. /* populate platform_of_node for snd card dai links */
  5318. if (dai_link[i].platform_name &&
  5319. !dai_link[i].platform_of_node) {
  5320. index = of_property_match_string(cdev->of_node,
  5321. "asoc-platform-names",
  5322. dai_link[i].platform_name);
  5323. if (index < 0) {
  5324. dev_err(cdev,
  5325. "%s: No match found for platform name: %s\n",
  5326. __func__, dai_link[i].platform_name);
  5327. ret = index;
  5328. goto err;
  5329. }
  5330. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  5331. index);
  5332. if (!np) {
  5333. dev_err(cdev,
  5334. "%s: retrieving phandle for platform %s, index %d failed\n",
  5335. __func__, dai_link[i].platform_name,
  5336. index);
  5337. ret = -ENODEV;
  5338. goto err;
  5339. }
  5340. dai_link[i].platform_of_node = np;
  5341. dai_link[i].platform_name = NULL;
  5342. }
  5343. /* populate cpu_of_node for snd card dai links */
  5344. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  5345. index = of_property_match_string(cdev->of_node,
  5346. "asoc-cpu-names",
  5347. dai_link[i].cpu_dai_name);
  5348. if (index >= 0) {
  5349. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  5350. index);
  5351. if (!np) {
  5352. dev_err(cdev,
  5353. "%s: retrieving phandle for cpu dai %s failed\n",
  5354. __func__,
  5355. dai_link[i].cpu_dai_name);
  5356. ret = -ENODEV;
  5357. goto err;
  5358. }
  5359. dai_link[i].cpu_of_node = np;
  5360. dai_link[i].cpu_dai_name = NULL;
  5361. }
  5362. }
  5363. /* populate codec_of_node for snd card dai links */
  5364. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  5365. index = of_property_match_string(cdev->of_node,
  5366. "asoc-codec-names",
  5367. dai_link[i].codec_name);
  5368. if (index < 0)
  5369. continue;
  5370. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  5371. index);
  5372. if (!np) {
  5373. dev_err(cdev,
  5374. "%s: retrieving phandle for codec %s failed\n",
  5375. __func__, dai_link[i].codec_name);
  5376. ret = -ENODEV;
  5377. goto err;
  5378. }
  5379. dai_link[i].codec_of_node = np;
  5380. dai_link[i].codec_name = NULL;
  5381. }
  5382. }
  5383. err:
  5384. return ret;
  5385. }
  5386. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  5387. {
  5388. int ret = -EINVAL;
  5389. struct snd_soc_component *component =
  5390. snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  5391. if (!component) {
  5392. pr_err("* %s: No match for msm-stub-codec component\n",
  5393. __func__);
  5394. return ret;
  5395. }
  5396. ret = snd_soc_add_component_controls(component, msm_snd_controls,
  5397. ARRAY_SIZE(msm_snd_controls));
  5398. if (ret < 0) {
  5399. dev_err(component->dev,
  5400. "%s: add_codec_controls failed, err = %d\n",
  5401. __func__, ret);
  5402. return ret;
  5403. }
  5404. return ret;
  5405. }
  5406. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  5407. struct snd_pcm_hw_params *params)
  5408. {
  5409. return 0;
  5410. }
  5411. static struct snd_soc_ops msm_stub_be_ops = {
  5412. .hw_params = msm_snd_stub_hw_params,
  5413. };
  5414. struct snd_soc_card snd_soc_card_stub_msm = {
  5415. .name = "bengal-stub-snd-card",
  5416. };
  5417. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  5418. /* FrontEnd DAI Links */
  5419. {
  5420. .name = "MSMSTUB Media1",
  5421. .stream_name = "MultiMedia1",
  5422. .cpu_dai_name = "MultiMedia1",
  5423. .platform_name = "msm-pcm-dsp.0",
  5424. .dynamic = 1,
  5425. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5426. .dpcm_playback = 1,
  5427. .dpcm_capture = 1,
  5428. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5429. SND_SOC_DPCM_TRIGGER_POST},
  5430. .codec_dai_name = "snd-soc-dummy-dai",
  5431. .codec_name = "snd-soc-dummy",
  5432. .ignore_suspend = 1,
  5433. /* this dainlink has playback support */
  5434. .ignore_pmdown_time = 1,
  5435. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5436. },
  5437. };
  5438. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  5439. /* Backend DAI Links */
  5440. {
  5441. .name = LPASS_BE_AUXPCM_RX,
  5442. .stream_name = "AUX PCM Playback",
  5443. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5444. .platform_name = "msm-pcm-routing",
  5445. .codec_name = "msm-stub-codec.1",
  5446. .codec_dai_name = "msm-stub-rx",
  5447. .no_pcm = 1,
  5448. .dpcm_playback = 1,
  5449. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  5450. .init = &msm_audrx_stub_init,
  5451. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5452. .ignore_pmdown_time = 1,
  5453. .ignore_suspend = 1,
  5454. .ops = &msm_stub_be_ops,
  5455. },
  5456. {
  5457. .name = LPASS_BE_AUXPCM_TX,
  5458. .stream_name = "AUX PCM Capture",
  5459. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5460. .platform_name = "msm-pcm-routing",
  5461. .codec_name = "msm-stub-codec.1",
  5462. .codec_dai_name = "msm-stub-tx",
  5463. .no_pcm = 1,
  5464. .dpcm_capture = 1,
  5465. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  5466. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5467. .ignore_suspend = 1,
  5468. .ops = &msm_stub_be_ops,
  5469. },
  5470. };
  5471. static struct snd_soc_dai_link msm_stub_dai_links[
  5472. ARRAY_SIZE(msm_stub_fe_dai_links) +
  5473. ARRAY_SIZE(msm_stub_be_dai_links)];
  5474. static const struct of_device_id bengal_asoc_machine_of_match[] = {
  5475. { .compatible = "qcom,bengal-asoc-snd",
  5476. .data = "codec"},
  5477. { .compatible = "qcom,bengal-asoc-snd-stub",
  5478. .data = "stub_codec"},
  5479. {},
  5480. };
  5481. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  5482. {
  5483. struct snd_soc_card *card = NULL;
  5484. struct snd_soc_dai_link *dailink = NULL;
  5485. int len_1 = 0;
  5486. int len_2 = 0;
  5487. int total_links = 0;
  5488. int rc = 0;
  5489. u32 mi2s_audio_intf = 0;
  5490. u32 auxpcm_audio_intf = 0;
  5491. u32 rxtx_bolero_codec = 0;
  5492. u32 va_bolero_codec = 0;
  5493. u32 val = 0;
  5494. u32 wcn_btfm_intf = 0;
  5495. const struct of_device_id *match;
  5496. match = of_match_node(bengal_asoc_machine_of_match, dev->of_node);
  5497. if (!match) {
  5498. dev_err(dev, "%s: No DT match found for sound card\n",
  5499. __func__);
  5500. return NULL;
  5501. }
  5502. if (!strcmp(match->data, "codec")) {
  5503. card = &snd_soc_card_bengal_msm;
  5504. memcpy(msm_bengal_dai_links + total_links,
  5505. msm_common_dai_links,
  5506. sizeof(msm_common_dai_links));
  5507. total_links += ARRAY_SIZE(msm_common_dai_links);
  5508. memcpy(msm_bengal_dai_links + total_links,
  5509. msm_common_misc_fe_dai_links,
  5510. sizeof(msm_common_misc_fe_dai_links));
  5511. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  5512. memcpy(msm_bengal_dai_links + total_links,
  5513. msm_common_be_dai_links,
  5514. sizeof(msm_common_be_dai_links));
  5515. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  5516. rc = of_property_read_u32(dev->of_node,
  5517. "qcom,rxtx-bolero-codec",
  5518. &rxtx_bolero_codec);
  5519. if (rc) {
  5520. dev_dbg(dev, "%s: No DT match RXTX Macro codec\n",
  5521. __func__);
  5522. } else {
  5523. if (rxtx_bolero_codec) {
  5524. memcpy(msm_bengal_dai_links + total_links,
  5525. msm_rx_tx_cdc_dma_be_dai_links,
  5526. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  5527. total_links +=
  5528. ARRAY_SIZE(
  5529. msm_rx_tx_cdc_dma_be_dai_links);
  5530. }
  5531. }
  5532. rc = of_property_read_u32(dev->of_node, "qcom,va-bolero-codec",
  5533. &va_bolero_codec);
  5534. if (rc) {
  5535. dev_dbg(dev, "%s: No DT match VA Macro codec\n",
  5536. __func__);
  5537. } else {
  5538. if (va_bolero_codec) {
  5539. memcpy(msm_bengal_dai_links + total_links,
  5540. msm_va_cdc_dma_be_dai_links,
  5541. sizeof(msm_va_cdc_dma_be_dai_links));
  5542. total_links +=
  5543. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
  5544. }
  5545. }
  5546. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  5547. &mi2s_audio_intf);
  5548. if (rc) {
  5549. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  5550. __func__);
  5551. } else {
  5552. if (mi2s_audio_intf) {
  5553. memcpy(msm_bengal_dai_links + total_links,
  5554. msm_mi2s_be_dai_links,
  5555. sizeof(msm_mi2s_be_dai_links));
  5556. total_links +=
  5557. ARRAY_SIZE(msm_mi2s_be_dai_links);
  5558. }
  5559. }
  5560. rc = of_property_read_u32(dev->of_node,
  5561. "qcom,auxpcm-audio-intf",
  5562. &auxpcm_audio_intf);
  5563. if (rc) {
  5564. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  5565. __func__);
  5566. } else {
  5567. if (auxpcm_audio_intf) {
  5568. memcpy(msm_bengal_dai_links + total_links,
  5569. msm_auxpcm_be_dai_links,
  5570. sizeof(msm_auxpcm_be_dai_links));
  5571. total_links +=
  5572. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  5573. }
  5574. }
  5575. rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
  5576. &val);
  5577. if (!rc && val) {
  5578. memcpy(msm_bengal_dai_links + total_links,
  5579. msm_afe_rxtx_lb_be_dai_link,
  5580. sizeof(msm_afe_rxtx_lb_be_dai_link));
  5581. total_links +=
  5582. ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
  5583. }
  5584. rc = of_property_read_u32(dev->of_node, "qcom,tdm-audio-intf",
  5585. &val);
  5586. if (!rc && val) {
  5587. memcpy(msm_bengal_dai_links + total_links,
  5588. msm_tdm_be_dai_links,
  5589. sizeof(msm_tdm_be_dai_links));
  5590. total_links +=
  5591. ARRAY_SIZE(msm_tdm_be_dai_links);
  5592. }
  5593. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  5594. &wcn_btfm_intf);
  5595. if (rc) {
  5596. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  5597. __func__);
  5598. } else {
  5599. if (wcn_btfm_intf) {
  5600. memcpy(msm_bengal_dai_links + total_links,
  5601. msm_wcn_btfm_be_dai_links,
  5602. sizeof(msm_wcn_btfm_be_dai_links));
  5603. total_links +=
  5604. ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
  5605. }
  5606. }
  5607. dailink = msm_bengal_dai_links;
  5608. } else if (!strcmp(match->data, "stub_codec")) {
  5609. card = &snd_soc_card_stub_msm;
  5610. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  5611. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  5612. memcpy(msm_stub_dai_links,
  5613. msm_stub_fe_dai_links,
  5614. sizeof(msm_stub_fe_dai_links));
  5615. memcpy(msm_stub_dai_links + len_1,
  5616. msm_stub_be_dai_links,
  5617. sizeof(msm_stub_be_dai_links));
  5618. dailink = msm_stub_dai_links;
  5619. total_links = len_2;
  5620. }
  5621. if (card) {
  5622. card->dai_link = dailink;
  5623. card->num_links = total_links;
  5624. }
  5625. return card;
  5626. }
  5627. static int msm_aux_codec_init(struct snd_soc_component *component)
  5628. {
  5629. struct snd_soc_dapm_context *dapm =
  5630. snd_soc_component_get_dapm(component);
  5631. int ret = 0;
  5632. void *mbhc_calibration;
  5633. struct snd_info_entry *entry;
  5634. struct snd_card *card = component->card->snd_card;
  5635. struct msm_asoc_mach_data *pdata;
  5636. struct platform_device *pdev = NULL;
  5637. char *data = NULL;
  5638. int i = 0;
  5639. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  5640. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  5641. snd_soc_dapm_ignore_suspend(dapm, "LO");
  5642. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  5643. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  5644. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  5645. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  5646. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  5647. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  5648. snd_soc_dapm_sync(dapm);
  5649. pdata = snd_soc_card_get_drvdata(component->card);
  5650. if (!pdata->codec_root) {
  5651. entry = snd_info_create_subdir(card->module, "codecs",
  5652. card->proc_root);
  5653. if (!entry) {
  5654. dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
  5655. __func__);
  5656. ret = 0;
  5657. goto mbhc_cfg_cal;
  5658. }
  5659. pdata->codec_root = entry;
  5660. }
  5661. for (i = 0; i < component->card->num_aux_devs; i++)
  5662. {
  5663. if (msm_aux_dev[i].name != NULL ) {
  5664. if (strstr(msm_aux_dev[i].name, "wsa"))
  5665. continue;
  5666. }
  5667. if (msm_aux_dev[i].codec_of_node) {
  5668. pdev = of_find_device_by_node(
  5669. msm_aux_dev[i].codec_of_node);
  5670. if (pdev)
  5671. data = (char*) of_device_get_match_data(
  5672. &pdev->dev);
  5673. if (data != NULL) {
  5674. if (!strncmp(data, "wcd937x",
  5675. sizeof("wcd937x"))) {
  5676. wcd937x_info_create_codec_entry(
  5677. pdata->codec_root, component);
  5678. break;
  5679. } else if (!strncmp(data, "rouleur",
  5680. sizeof("rouleur"))) {
  5681. rouleur_info_create_codec_entry(
  5682. pdata->codec_root, component);
  5683. break;
  5684. }
  5685. }
  5686. }
  5687. }
  5688. mbhc_cfg_cal:
  5689. if (data != NULL) {
  5690. if (!strncmp(data, "wcd937x", sizeof("wcd937x"))) {
  5691. mbhc_calibration = def_wcd_mbhc_cal();
  5692. if (!mbhc_calibration)
  5693. return -ENOMEM;
  5694. wcd_mbhc_cfg.calibration = mbhc_calibration;
  5695. ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  5696. } else if (!strncmp( data, "rouleur", sizeof("rouleur"))) {
  5697. mbhc_calibration = def_rouleur_mbhc_cal();
  5698. if (!mbhc_calibration)
  5699. return -ENOMEM;
  5700. wcd_mbhc_cfg.calibration = mbhc_calibration;
  5701. ret = rouleur_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  5702. }
  5703. }
  5704. if (ret) {
  5705. dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
  5706. __func__, ret);
  5707. goto err_hs_detect;
  5708. }
  5709. return 0;
  5710. err_hs_detect:
  5711. kfree(mbhc_calibration);
  5712. return ret;
  5713. }
  5714. static int msm_init_aux_dev(struct platform_device *pdev,
  5715. struct snd_soc_card *card)
  5716. {
  5717. struct device_node *wsa_of_node;
  5718. struct device_node *aux_codec_of_node;
  5719. u32 wsa_max_devs;
  5720. u32 wsa_dev_cnt;
  5721. u32 codec_max_aux_devs = 0;
  5722. u32 codec_aux_dev_cnt = 0;
  5723. int i;
  5724. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  5725. struct aux_codec_dev_info *aux_cdc_dev_info;
  5726. const char *auxdev_name_prefix[1];
  5727. char *dev_name_str = NULL;
  5728. int found = 0;
  5729. int codecs_found = 0;
  5730. int ret = 0;
  5731. /* Get maximum WSA device count for this platform */
  5732. ret = of_property_read_u32(pdev->dev.of_node,
  5733. "qcom,wsa-max-devs", &wsa_max_devs);
  5734. if (ret) {
  5735. dev_info(&pdev->dev,
  5736. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  5737. __func__, pdev->dev.of_node->full_name, ret);
  5738. wsa_max_devs = 0;
  5739. goto codec_aux_dev;
  5740. }
  5741. if (wsa_max_devs == 0) {
  5742. dev_warn(&pdev->dev,
  5743. "%s: Max WSA devices is 0 for this target?\n",
  5744. __func__);
  5745. goto codec_aux_dev;
  5746. }
  5747. /* Get count of WSA device phandles for this platform */
  5748. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  5749. "qcom,wsa-devs", NULL);
  5750. if (wsa_dev_cnt == -ENOENT) {
  5751. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  5752. __func__);
  5753. goto err;
  5754. } else if (wsa_dev_cnt <= 0) {
  5755. dev_err(&pdev->dev,
  5756. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  5757. __func__, wsa_dev_cnt);
  5758. ret = -EINVAL;
  5759. goto err;
  5760. }
  5761. /*
  5762. * Expect total phandles count to be NOT less than maximum possible
  5763. * WSA count. However, if it is less, then assign same value to
  5764. * max count as well.
  5765. */
  5766. if (wsa_dev_cnt < wsa_max_devs) {
  5767. dev_dbg(&pdev->dev,
  5768. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  5769. __func__, wsa_max_devs, wsa_dev_cnt);
  5770. wsa_max_devs = wsa_dev_cnt;
  5771. }
  5772. /* Make sure prefix string passed for each WSA device */
  5773. ret = of_property_count_strings(pdev->dev.of_node,
  5774. "qcom,wsa-aux-dev-prefix");
  5775. if (ret != wsa_dev_cnt) {
  5776. dev_err(&pdev->dev,
  5777. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  5778. __func__, wsa_dev_cnt, ret);
  5779. ret = -EINVAL;
  5780. goto err;
  5781. }
  5782. /*
  5783. * Alloc mem to store phandle and index info of WSA device, if already
  5784. * registered with ALSA core
  5785. */
  5786. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  5787. sizeof(struct msm_wsa881x_dev_info),
  5788. GFP_KERNEL);
  5789. if (!wsa881x_dev_info) {
  5790. ret = -ENOMEM;
  5791. goto err;
  5792. }
  5793. /*
  5794. * search and check whether all WSA devices are already
  5795. * registered with ALSA core or not. If found a node, store
  5796. * the node and the index in a local array of struct for later
  5797. * use.
  5798. */
  5799. for (i = 0; i < wsa_dev_cnt; i++) {
  5800. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  5801. "qcom,wsa-devs", i);
  5802. if (unlikely(!wsa_of_node)) {
  5803. /* we should not be here */
  5804. dev_err(&pdev->dev,
  5805. "%s: wsa dev node is not present\n",
  5806. __func__);
  5807. ret = -EINVAL;
  5808. goto err;
  5809. }
  5810. if (soc_find_component(wsa_of_node, NULL)) {
  5811. /* WSA device registered with ALSA core */
  5812. wsa881x_dev_info[found].of_node = wsa_of_node;
  5813. wsa881x_dev_info[found].index = i;
  5814. found++;
  5815. if (found == wsa_max_devs)
  5816. break;
  5817. }
  5818. }
  5819. if (found < wsa_max_devs) {
  5820. dev_dbg(&pdev->dev,
  5821. "%s: failed to find %d components. Found only %d\n",
  5822. __func__, wsa_max_devs, found);
  5823. return -EPROBE_DEFER;
  5824. }
  5825. dev_info(&pdev->dev,
  5826. "%s: found %d wsa881x devices registered with ALSA core\n",
  5827. __func__, found);
  5828. codec_aux_dev:
  5829. /* Get maximum aux codec device count for this platform */
  5830. ret = of_property_read_u32(pdev->dev.of_node,
  5831. "qcom,codec-max-aux-devs",
  5832. &codec_max_aux_devs);
  5833. if (ret) {
  5834. dev_err(&pdev->dev,
  5835. "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
  5836. __func__, pdev->dev.of_node->full_name, ret);
  5837. codec_max_aux_devs = 0;
  5838. goto aux_dev_register;
  5839. }
  5840. if (codec_max_aux_devs == 0) {
  5841. dev_dbg(&pdev->dev,
  5842. "%s: Max aux codec devices is 0 for this target?\n",
  5843. __func__);
  5844. goto aux_dev_register;
  5845. }
  5846. /* Get count of aux codec device phandles for this platform */
  5847. codec_aux_dev_cnt = of_count_phandle_with_args(
  5848. pdev->dev.of_node,
  5849. "qcom,codec-aux-devs", NULL);
  5850. if (codec_aux_dev_cnt == -ENOENT) {
  5851. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  5852. __func__);
  5853. goto err;
  5854. } else if (codec_aux_dev_cnt <= 0) {
  5855. dev_err(&pdev->dev,
  5856. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  5857. __func__, codec_aux_dev_cnt);
  5858. ret = -EINVAL;
  5859. goto err;
  5860. }
  5861. /*
  5862. * Expect total phandles count to be NOT less than maximum possible
  5863. * AUX device count. However, if it is less, then assign same value to
  5864. * max count as well.
  5865. */
  5866. if (codec_aux_dev_cnt < codec_max_aux_devs) {
  5867. dev_dbg(&pdev->dev,
  5868. "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
  5869. __func__, codec_max_aux_devs,
  5870. codec_aux_dev_cnt);
  5871. codec_max_aux_devs = codec_aux_dev_cnt;
  5872. }
  5873. /*
  5874. * Alloc mem to store phandle and index info of aux codec
  5875. * if already registered with ALSA core
  5876. */
  5877. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  5878. sizeof(struct aux_codec_dev_info),
  5879. GFP_KERNEL);
  5880. if (!aux_cdc_dev_info) {
  5881. ret = -ENOMEM;
  5882. goto err;
  5883. }
  5884. /*
  5885. * search and check whether all aux codecs are already
  5886. * registered with ALSA core or not. If found a node, store
  5887. * the node and the index in a local array of struct for later
  5888. * use.
  5889. */
  5890. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5891. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  5892. "qcom,codec-aux-devs", i);
  5893. if (unlikely(!aux_codec_of_node)) {
  5894. /* we should not be here */
  5895. dev_err(&pdev->dev,
  5896. "%s: aux codec dev node is not present\n",
  5897. __func__);
  5898. ret = -EINVAL;
  5899. goto err;
  5900. }
  5901. if (soc_find_component(aux_codec_of_node, NULL)) {
  5902. /* AUX codec registered with ALSA core */
  5903. aux_cdc_dev_info[codecs_found].of_node =
  5904. aux_codec_of_node;
  5905. aux_cdc_dev_info[codecs_found].index = i;
  5906. codecs_found++;
  5907. }
  5908. }
  5909. if (codecs_found < codec_aux_dev_cnt) {
  5910. dev_dbg(&pdev->dev,
  5911. "%s: failed to find %d components. Found only %d\n",
  5912. __func__, codec_aux_dev_cnt, codecs_found);
  5913. return -EPROBE_DEFER;
  5914. }
  5915. dev_info(&pdev->dev,
  5916. "%s: found %d AUX codecs registered with ALSA core\n",
  5917. __func__, codecs_found);
  5918. aux_dev_register:
  5919. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  5920. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  5921. /* Alloc array of AUX devs struct */
  5922. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  5923. sizeof(struct snd_soc_aux_dev),
  5924. GFP_KERNEL);
  5925. if (!msm_aux_dev) {
  5926. ret = -ENOMEM;
  5927. goto err;
  5928. }
  5929. /* Alloc array of codec conf struct */
  5930. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  5931. sizeof(struct snd_soc_codec_conf),
  5932. GFP_KERNEL);
  5933. if (!msm_codec_conf) {
  5934. ret = -ENOMEM;
  5935. goto err;
  5936. }
  5937. for (i = 0; i < wsa_max_devs; i++) {
  5938. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  5939. GFP_KERNEL);
  5940. if (!dev_name_str) {
  5941. ret = -ENOMEM;
  5942. goto err;
  5943. }
  5944. ret = of_property_read_string_index(pdev->dev.of_node,
  5945. "qcom,wsa-aux-dev-prefix",
  5946. wsa881x_dev_info[i].index,
  5947. auxdev_name_prefix);
  5948. if (ret) {
  5949. dev_err(&pdev->dev,
  5950. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  5951. __func__, ret);
  5952. ret = -EINVAL;
  5953. goto err;
  5954. }
  5955. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  5956. msm_aux_dev[i].name = dev_name_str;
  5957. msm_aux_dev[i].codec_name = NULL;
  5958. msm_aux_dev[i].codec_of_node =
  5959. wsa881x_dev_info[i].of_node;
  5960. msm_aux_dev[i].init = NULL;
  5961. msm_codec_conf[i].dev_name = NULL;
  5962. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  5963. msm_codec_conf[i].of_node =
  5964. wsa881x_dev_info[i].of_node;
  5965. }
  5966. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5967. msm_aux_dev[wsa_max_devs + i].name = NULL;
  5968. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  5969. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  5970. aux_cdc_dev_info[i].of_node;
  5971. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  5972. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  5973. msm_codec_conf[wsa_max_devs + i].name_prefix =
  5974. NULL;
  5975. msm_codec_conf[wsa_max_devs + i].of_node =
  5976. aux_cdc_dev_info[i].of_node;
  5977. }
  5978. card->codec_conf = msm_codec_conf;
  5979. card->aux_dev = msm_aux_dev;
  5980. err:
  5981. return ret;
  5982. }
  5983. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  5984. {
  5985. int count = 0;
  5986. u32 mi2s_master_slave[MI2S_MAX];
  5987. int ret = 0;
  5988. for (count = 0; count < MI2S_MAX; count++) {
  5989. mutex_init(&mi2s_intf_conf[count].lock);
  5990. mi2s_intf_conf[count].ref_cnt = 0;
  5991. }
  5992. ret = of_property_read_u32_array(pdev->dev.of_node,
  5993. "qcom,msm-mi2s-master",
  5994. mi2s_master_slave, MI2S_MAX);
  5995. if (ret) {
  5996. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  5997. __func__);
  5998. } else {
  5999. for (count = 0; count < MI2S_MAX; count++) {
  6000. mi2s_intf_conf[count].msm_is_mi2s_master =
  6001. mi2s_master_slave[count];
  6002. }
  6003. }
  6004. }
  6005. static void msm_i2s_auxpcm_deinit(void)
  6006. {
  6007. int count = 0;
  6008. for (count = 0; count < MI2S_MAX; count++) {
  6009. mutex_destroy(&mi2s_intf_conf[count].lock);
  6010. mi2s_intf_conf[count].ref_cnt = 0;
  6011. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  6012. }
  6013. }
  6014. static int bengal_ssr_enable(struct device *dev, void *data)
  6015. {
  6016. struct platform_device *pdev = to_platform_device(dev);
  6017. struct snd_soc_card *card = platform_get_drvdata(pdev);
  6018. int ret = 0;
  6019. if (!card) {
  6020. dev_err(dev, "%s: card is NULL\n", __func__);
  6021. ret = -EINVAL;
  6022. goto err;
  6023. }
  6024. if (!strcmp(card->name, "bengal-stub-snd-card")) {
  6025. /* TODO */
  6026. dev_dbg(dev, "%s: TODO\n", __func__);
  6027. }
  6028. snd_soc_card_change_online_state(card, 1);
  6029. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  6030. err:
  6031. return ret;
  6032. }
  6033. static void bengal_ssr_disable(struct device *dev, void *data)
  6034. {
  6035. struct platform_device *pdev = to_platform_device(dev);
  6036. struct snd_soc_card *card = platform_get_drvdata(pdev);
  6037. if (!card) {
  6038. dev_err(dev, "%s: card is NULL\n", __func__);
  6039. return;
  6040. }
  6041. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  6042. snd_soc_card_change_online_state(card, 0);
  6043. if (!strcmp(card->name, "bengal-stub-snd-card")) {
  6044. /* TODO */
  6045. dev_dbg(dev, "%s: TODO\n", __func__);
  6046. }
  6047. }
  6048. static const struct snd_event_ops bengal_ssr_ops = {
  6049. .enable = bengal_ssr_enable,
  6050. .disable = bengal_ssr_disable,
  6051. };
  6052. static int msm_audio_ssr_compare(struct device *dev, void *data)
  6053. {
  6054. struct device_node *node = data;
  6055. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  6056. __func__, dev->of_node, node);
  6057. return (dev->of_node && dev->of_node == node);
  6058. }
  6059. static int msm_audio_ssr_register(struct device *dev)
  6060. {
  6061. struct device_node *np = dev->of_node;
  6062. struct snd_event_clients *ssr_clients = NULL;
  6063. struct device_node *node = NULL;
  6064. int ret = 0;
  6065. int i = 0;
  6066. for (i = 0; ; i++) {
  6067. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  6068. if (!node)
  6069. break;
  6070. snd_event_mstr_add_client(&ssr_clients,
  6071. msm_audio_ssr_compare, node);
  6072. }
  6073. ret = snd_event_master_register(dev, &bengal_ssr_ops,
  6074. ssr_clients, NULL);
  6075. if (!ret)
  6076. snd_event_notify(dev, SND_EVENT_UP);
  6077. return ret;
  6078. }
  6079. static int msm_asoc_machine_probe(struct platform_device *pdev)
  6080. {
  6081. struct snd_soc_card *card = NULL;
  6082. struct msm_asoc_mach_data *pdata = NULL;
  6083. const char *mbhc_audio_jack_type = NULL;
  6084. int ret = 0;
  6085. uint index = 0;
  6086. struct nvmem_cell *cell;
  6087. size_t len;
  6088. u32 *buf;
  6089. u32 adsp_var_idx = 0;
  6090. if (!pdev->dev.of_node) {
  6091. dev_err(&pdev->dev,
  6092. "%s: No platform supplied from device tree\n",
  6093. __func__);
  6094. return -EINVAL;
  6095. }
  6096. pdata = devm_kzalloc(&pdev->dev,
  6097. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  6098. if (!pdata)
  6099. return -ENOMEM;
  6100. card = populate_snd_card_dailinks(&pdev->dev);
  6101. if (!card) {
  6102. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  6103. ret = -EINVAL;
  6104. goto err;
  6105. }
  6106. card->dev = &pdev->dev;
  6107. platform_set_drvdata(pdev, card);
  6108. snd_soc_card_set_drvdata(card, pdata);
  6109. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  6110. if (ret) {
  6111. dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
  6112. __func__, ret);
  6113. goto err;
  6114. }
  6115. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  6116. if (ret) {
  6117. dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
  6118. __func__, ret);
  6119. goto err;
  6120. }
  6121. ret = msm_populate_dai_link_component_of_node(card);
  6122. if (ret) {
  6123. ret = -EPROBE_DEFER;
  6124. goto err;
  6125. }
  6126. ret = msm_init_aux_dev(pdev, card);
  6127. if (ret)
  6128. goto err;
  6129. ret = devm_snd_soc_register_card(&pdev->dev, card);
  6130. if (ret == -EPROBE_DEFER) {
  6131. if (codec_reg_done)
  6132. ret = -EINVAL;
  6133. goto err;
  6134. } else if (ret) {
  6135. dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
  6136. __func__, ret);
  6137. goto err;
  6138. }
  6139. dev_info(&pdev->dev, "%s: Sound card %s registered\n",
  6140. __func__, card->name);
  6141. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6142. "qcom,hph-en1-gpio", 0);
  6143. if (!pdata->hph_en1_gpio_p) {
  6144. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  6145. __func__, "qcom,hph-en1-gpio",
  6146. pdev->dev.of_node->full_name);
  6147. }
  6148. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6149. "qcom,hph-en0-gpio", 0);
  6150. if (!pdata->hph_en0_gpio_p) {
  6151. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  6152. __func__, "qcom,hph-en0-gpio",
  6153. pdev->dev.of_node->full_name);
  6154. }
  6155. ret = of_property_read_string(pdev->dev.of_node,
  6156. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  6157. if (ret) {
  6158. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  6159. __func__, "qcom,mbhc-audio-jack-type",
  6160. pdev->dev.of_node->full_name);
  6161. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  6162. } else {
  6163. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  6164. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  6165. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  6166. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  6167. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  6168. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  6169. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  6170. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  6171. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  6172. } else {
  6173. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  6174. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  6175. }
  6176. }
  6177. /*
  6178. * Parse US-Euro gpio info from DT. Report no error if us-euro
  6179. * entry is not found in DT file as some targets do not support
  6180. * US-Euro detection
  6181. */
  6182. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6183. "qcom,us-euro-gpios", 0);
  6184. if (!pdata->us_euro_gpio_p) {
  6185. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  6186. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  6187. } else {
  6188. dev_dbg(&pdev->dev, "%s detected\n",
  6189. "qcom,us-euro-gpios");
  6190. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  6191. }
  6192. if (wcd_mbhc_cfg.enable_usbc_analog)
  6193. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  6194. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  6195. "fsa4480-i2c-handle", 0);
  6196. if (!pdata->fsa_handle)
  6197. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  6198. "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
  6199. msm_i2s_auxpcm_init(pdev);
  6200. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6201. "qcom,cdc-dmic01-gpios",
  6202. 0);
  6203. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  6204. "qcom,cdc-dmic23-gpios",
  6205. 0);
  6206. pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
  6207. "qcom,pri-mi2s-gpios", 0);
  6208. pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
  6209. "qcom,sec-mi2s-gpios", 0);
  6210. pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
  6211. "qcom,tert-mi2s-gpios", 0);
  6212. pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
  6213. "qcom,quat-mi2s-gpios", 0);
  6214. for (index = PRIM_MI2S; index < MI2S_MAX; index++)
  6215. atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
  6216. ret = msm_audio_ssr_register(&pdev->dev);
  6217. if (ret)
  6218. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  6219. __func__, ret);
  6220. is_initial_boot = true;
  6221. /* get adsp variant idx */
  6222. cell = nvmem_cell_get(&pdev->dev, "adsp_variant");
  6223. if (IS_ERR_OR_NULL(cell)) {
  6224. dev_dbg(&pdev->dev, "%s: FAILED to get nvmem cell \n", __func__);
  6225. goto ret;
  6226. }
  6227. buf = nvmem_cell_read(cell, &len);
  6228. nvmem_cell_put(cell);
  6229. if (IS_ERR_OR_NULL(buf)) {
  6230. dev_dbg(&pdev->dev, "%s: FAILED to read nvmem cell \n", __func__);
  6231. goto ret;
  6232. }
  6233. if (len <= 0 || len > sizeof(u32)) {
  6234. dev_dbg(&pdev->dev, "%s: nvmem cell length out of range: %d\n",
  6235. __func__, len);
  6236. kfree(buf);
  6237. goto ret;
  6238. }
  6239. memcpy(&adsp_var_idx, buf, len);
  6240. kfree(buf);
  6241. va_disable = adsp_var_idx;
  6242. ret:
  6243. return 0;
  6244. err:
  6245. devm_kfree(&pdev->dev, pdata);
  6246. return ret;
  6247. }
  6248. static int msm_asoc_machine_remove(struct platform_device *pdev)
  6249. {
  6250. struct snd_soc_card *card = platform_get_drvdata(pdev);
  6251. snd_event_master_deregister(&pdev->dev);
  6252. snd_soc_unregister_card(card);
  6253. msm_i2s_auxpcm_deinit();
  6254. return 0;
  6255. }
  6256. static struct platform_driver bengal_asoc_machine_driver = {
  6257. .driver = {
  6258. .name = DRV_NAME,
  6259. .owner = THIS_MODULE,
  6260. .pm = &snd_soc_pm_ops,
  6261. .of_match_table = bengal_asoc_machine_of_match,
  6262. .suppress_bind_attrs = true,
  6263. },
  6264. .probe = msm_asoc_machine_probe,
  6265. .remove = msm_asoc_machine_remove,
  6266. };
  6267. module_platform_driver(bengal_asoc_machine_driver);
  6268. MODULE_DESCRIPTION("ALSA SoC msm");
  6269. MODULE_LICENSE("GPL v2");
  6270. MODULE_ALIAS("platform:" DRV_NAME);
  6271. MODULE_DEVICE_TABLE(of, bengal_asoc_machine_of_match);