dsi_panel.c 94 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "msm-dsi-panel:[%s:%d] " fmt, __func__, __LINE__
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. /**
  15. * topology is currently defined by a set of following 3 values:
  16. * 1. num of layer mixers
  17. * 2. num of compression encoders
  18. * 3. num of interfaces
  19. */
  20. #define TOPOLOGY_SET_LEN 3
  21. #define MAX_TOPOLOGY 5
  22. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  23. #define DEFAULT_MDP_TRANSFER_TIME 14000
  24. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  25. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  26. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  27. #define MAX_PANEL_JITTER 10
  28. #define DEFAULT_PANEL_PREFILL_LINES 25
  29. enum dsi_dsc_ratio_type {
  30. DSC_8BPC_8BPP,
  31. DSC_10BPC_8BPP,
  32. DSC_12BPC_8BPP,
  33. DSC_10BPC_10BPP,
  34. DSC_RATIO_TYPE_MAX
  35. };
  36. static u32 dsi_dsc_rc_buf_thresh[] = {0x0e, 0x1c, 0x2a, 0x38, 0x46, 0x54,
  37. 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b, 0x7d, 0x7e};
  38. /*
  39. * DSC 1.1
  40. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  41. */
  42. static char dsi_dsc_rc_range_min_qp_1_1[][15] = {
  43. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 7, 12},
  44. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 17},
  45. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 15, 21},
  46. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  47. };
  48. /*
  49. * DSC 1.1 SCR
  50. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  51. */
  52. static char dsi_dsc_rc_range_min_qp_1_1_scr1[][15] = {
  53. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 9, 12},
  54. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 13, 16},
  55. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 17, 20},
  56. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  57. };
  58. /*
  59. * DSC 1.1
  60. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  61. */
  62. static char dsi_dsc_rc_range_max_qp_1_1[][15] = {
  63. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 11, 12, 13, 13, 15},
  64. {4, 8, 9, 10, 11, 11, 11, 12, 13, 14, 15, 16, 17, 17, 19},
  65. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 19, 20, 21, 21, 23},
  66. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  67. };
  68. /*
  69. * DSC 1.1 SCR
  70. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  71. */
  72. static char dsi_dsc_rc_range_max_qp_1_1_scr1[][15] = {
  73. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 10, 11, 11, 12, 13},
  74. {8, 8, 9, 10, 11, 11, 11, 12, 13, 14, 14, 15, 15, 16, 17},
  75. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 18, 19, 19, 20, 23},
  76. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  77. };
  78. /*
  79. * DSC 1.1 and DSC 1.1 SCR
  80. * Rate control - bpg offset values
  81. */
  82. static char dsi_dsc_rc_range_bpg_offset[] = {2, 0, 0, -2, -4, -6, -8, -8,
  83. -8, -10, -10, -12, -12, -12, -12};
  84. int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc, char *buf,
  85. int pps_id)
  86. {
  87. char *bp;
  88. char data;
  89. int i, bpp;
  90. char *dbgbp;
  91. dbgbp = buf;
  92. bp = buf;
  93. /* First 7 bytes are cmd header */
  94. *bp++ = 0x0A;
  95. *bp++ = 1;
  96. *bp++ = 0;
  97. *bp++ = 0;
  98. *bp++ = 10;
  99. *bp++ = 0;
  100. *bp++ = 128;
  101. *bp++ = (dsc->version & 0xff); /* pps0 */
  102. *bp++ = (pps_id & 0xff); /* pps1 */
  103. bp++; /* pps2, reserved */
  104. data = dsc->line_buf_depth & 0x0f;
  105. data |= ((dsc->bpc & 0xf) << 4);
  106. *bp++ = data; /* pps3 */
  107. bpp = dsc->bpp;
  108. bpp <<= 4; /* 4 fraction bits */
  109. data = (bpp >> 8);
  110. data &= 0x03; /* upper two bits */
  111. data |= ((dsc->block_pred_enable & 0x1) << 5);
  112. data |= ((dsc->convert_rgb & 0x1) << 4);
  113. data |= ((dsc->enable_422 & 0x1) << 3);
  114. data |= ((dsc->vbr_enable & 0x1) << 2);
  115. *bp++ = data; /* pps4 */
  116. *bp++ = (bpp & 0xff); /* pps5 */
  117. *bp++ = ((dsc->pic_height >> 8) & 0xff); /* pps6 */
  118. *bp++ = (dsc->pic_height & 0x0ff); /* pps7 */
  119. *bp++ = ((dsc->pic_width >> 8) & 0xff); /* pps8 */
  120. *bp++ = (dsc->pic_width & 0x0ff); /* pps9 */
  121. *bp++ = ((dsc->slice_height >> 8) & 0xff);/* pps10 */
  122. *bp++ = (dsc->slice_height & 0x0ff); /* pps11 */
  123. *bp++ = ((dsc->slice_width >> 8) & 0xff); /* pps12 */
  124. *bp++ = (dsc->slice_width & 0x0ff); /* pps13 */
  125. *bp++ = ((dsc->chunk_size >> 8) & 0xff);/* pps14 */
  126. *bp++ = (dsc->chunk_size & 0x0ff); /* pps15 */
  127. *bp++ = (dsc->initial_xmit_delay >> 8) & 0x3; /* pps16, bit 0, 1 */
  128. *bp++ = (dsc->initial_xmit_delay & 0xff);/* pps17 */
  129. *bp++ = ((dsc->initial_dec_delay >> 8) & 0xff); /* pps18 */
  130. *bp++ = (dsc->initial_dec_delay & 0xff);/* pps19 */
  131. bp++; /* pps20, reserved */
  132. *bp++ = (dsc->initial_scale_value & 0x3f); /* pps21 */
  133. *bp++ = ((dsc->scale_increment_interval >> 8) & 0xff); /* pps22 */
  134. *bp++ = (dsc->scale_increment_interval & 0xff); /* pps23 */
  135. *bp++ = ((dsc->scale_decrement_interval >> 8) & 0xf); /* pps24 */
  136. *bp++ = (dsc->scale_decrement_interval & 0x0ff);/* pps25 */
  137. bp++; /* pps26, reserved */
  138. *bp++ = (dsc->first_line_bpg_offset & 0x1f);/* pps27 */
  139. *bp++ = ((dsc->nfl_bpg_offset >> 8) & 0xff);/* pps28 */
  140. *bp++ = (dsc->nfl_bpg_offset & 0x0ff); /* pps29 */
  141. *bp++ = ((dsc->slice_bpg_offset >> 8) & 0xff);/* pps30 */
  142. *bp++ = (dsc->slice_bpg_offset & 0x0ff);/* pps31 */
  143. *bp++ = ((dsc->initial_offset >> 8) & 0xff);/* pps32 */
  144. *bp++ = (dsc->initial_offset & 0x0ff); /* pps33 */
  145. *bp++ = ((dsc->final_offset >> 8) & 0xff);/* pps34 */
  146. *bp++ = (dsc->final_offset & 0x0ff); /* pps35 */
  147. *bp++ = (dsc->min_qp_flatness & 0x1f); /* pps36 */
  148. *bp++ = (dsc->max_qp_flatness & 0x1f); /* pps37 */
  149. *bp++ = ((dsc->rc_model_size >> 8) & 0xff);/* pps38 */
  150. *bp++ = (dsc->rc_model_size & 0x0ff); /* pps39 */
  151. *bp++ = (dsc->edge_factor & 0x0f); /* pps40 */
  152. *bp++ = (dsc->quant_incr_limit0 & 0x1f); /* pps41 */
  153. *bp++ = (dsc->quant_incr_limit1 & 0x1f); /* pps42 */
  154. data = ((dsc->tgt_offset_hi & 0xf) << 4);
  155. data |= (dsc->tgt_offset_lo & 0x0f);
  156. *bp++ = data; /* pps43 */
  157. for (i = 0; i < 14; i++)
  158. *bp++ = (dsc->buf_thresh[i] & 0xff); /* pps44 - pps57 */
  159. for (i = 0; i < 15; i++) { /* pps58 - pps87 */
  160. data = (dsc->range_min_qp[i] & 0x1f);
  161. data <<= 3;
  162. data |= ((dsc->range_max_qp[i] >> 2) & 0x07);
  163. *bp++ = data;
  164. data = (dsc->range_max_qp[i] & 0x03);
  165. data <<= 6;
  166. data |= (dsc->range_bpg_offset[i] & 0x3f);
  167. *bp++ = data;
  168. }
  169. return 128;
  170. }
  171. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  172. {
  173. int rc = 0;
  174. int i;
  175. struct regulator *vreg = NULL;
  176. for (i = 0; i < panel->power_info.count; i++) {
  177. vreg = devm_regulator_get(panel->parent,
  178. panel->power_info.vregs[i].vreg_name);
  179. rc = PTR_RET(vreg);
  180. if (rc) {
  181. pr_err("failed to get %s regulator\n",
  182. panel->power_info.vregs[i].vreg_name);
  183. goto error_put;
  184. }
  185. panel->power_info.vregs[i].vreg = vreg;
  186. }
  187. return rc;
  188. error_put:
  189. for (i = i - 1; i >= 0; i--) {
  190. devm_regulator_put(panel->power_info.vregs[i].vreg);
  191. panel->power_info.vregs[i].vreg = NULL;
  192. }
  193. return rc;
  194. }
  195. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  196. {
  197. int rc = 0;
  198. int i;
  199. for (i = panel->power_info.count - 1; i >= 0; i--)
  200. devm_regulator_put(panel->power_info.vregs[i].vreg);
  201. return rc;
  202. }
  203. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  204. {
  205. int rc = 0;
  206. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  207. if (gpio_is_valid(r_config->reset_gpio)) {
  208. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  209. if (rc) {
  210. pr_err("request for reset_gpio failed, rc=%d\n", rc);
  211. goto error;
  212. }
  213. }
  214. if (gpio_is_valid(r_config->disp_en_gpio)) {
  215. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  216. if (rc) {
  217. pr_err("request for disp_en_gpio failed, rc=%d\n", rc);
  218. goto error_release_reset;
  219. }
  220. }
  221. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  222. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  223. if (rc) {
  224. pr_err("request for bklt_en_gpio failed, rc=%d\n", rc);
  225. goto error_release_disp_en;
  226. }
  227. }
  228. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  229. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  230. if (rc) {
  231. pr_err("request for mode_gpio failed, rc=%d\n", rc);
  232. goto error_release_mode_sel;
  233. }
  234. }
  235. goto error;
  236. error_release_mode_sel:
  237. if (gpio_is_valid(panel->bl_config.en_gpio))
  238. gpio_free(panel->bl_config.en_gpio);
  239. error_release_disp_en:
  240. if (gpio_is_valid(r_config->disp_en_gpio))
  241. gpio_free(r_config->disp_en_gpio);
  242. error_release_reset:
  243. if (gpio_is_valid(r_config->reset_gpio))
  244. gpio_free(r_config->reset_gpio);
  245. error:
  246. return rc;
  247. }
  248. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  249. {
  250. int rc = 0;
  251. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  252. if (gpio_is_valid(r_config->reset_gpio))
  253. gpio_free(r_config->reset_gpio);
  254. if (gpio_is_valid(r_config->disp_en_gpio))
  255. gpio_free(r_config->disp_en_gpio);
  256. if (gpio_is_valid(panel->bl_config.en_gpio))
  257. gpio_free(panel->bl_config.en_gpio);
  258. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  259. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  260. return rc;
  261. }
  262. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  263. {
  264. struct dsi_panel_reset_config *r_config;
  265. if (!panel) {
  266. pr_err("Invalid panel param\n");
  267. return -EINVAL;
  268. }
  269. r_config = &panel->reset_config;
  270. if (!r_config) {
  271. pr_err("Invalid panel reset configuration\n");
  272. return -EINVAL;
  273. }
  274. if (gpio_is_valid(r_config->reset_gpio)) {
  275. gpio_set_value(r_config->reset_gpio, 0);
  276. pr_info("GPIO pulled low to simulate ESD\n");
  277. return 0;
  278. }
  279. pr_err("failed to pull down gpio\n");
  280. return -EINVAL;
  281. }
  282. static int dsi_panel_reset(struct dsi_panel *panel)
  283. {
  284. int rc = 0;
  285. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  286. int i;
  287. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  288. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  289. if (rc) {
  290. pr_err("unable to set dir for disp gpio rc=%d\n", rc);
  291. goto exit;
  292. }
  293. }
  294. if (r_config->count) {
  295. rc = gpio_direction_output(r_config->reset_gpio,
  296. r_config->sequence[0].level);
  297. if (rc) {
  298. pr_err("unable to set dir for rst gpio rc=%d\n", rc);
  299. goto exit;
  300. }
  301. }
  302. for (i = 0; i < r_config->count; i++) {
  303. gpio_set_value(r_config->reset_gpio,
  304. r_config->sequence[i].level);
  305. if (r_config->sequence[i].sleep_ms)
  306. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  307. (r_config->sequence[i].sleep_ms * 1000) + 100);
  308. }
  309. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  310. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  311. if (rc)
  312. pr_err("unable to set dir for bklt gpio rc=%d\n", rc);
  313. }
  314. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  315. bool out = true;
  316. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  317. || (panel->reset_config.mode_sel_state
  318. == MODE_GPIO_LOW))
  319. out = false;
  320. else if ((panel->reset_config.mode_sel_state
  321. == MODE_SEL_SINGLE_PORT) ||
  322. (panel->reset_config.mode_sel_state
  323. == MODE_GPIO_HIGH))
  324. out = true;
  325. rc = gpio_direction_output(
  326. panel->reset_config.lcd_mode_sel_gpio, out);
  327. if (rc)
  328. pr_err("unable to set dir for mode gpio rc=%d\n", rc);
  329. }
  330. exit:
  331. return rc;
  332. }
  333. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  334. {
  335. int rc = 0;
  336. struct pinctrl_state *state;
  337. if (panel->host_config.ext_bridge_mode)
  338. return 0;
  339. if (enable)
  340. state = panel->pinctrl.active;
  341. else
  342. state = panel->pinctrl.suspend;
  343. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  344. if (rc)
  345. pr_err("[%s] failed to set pin state, rc=%d\n", panel->name,
  346. rc);
  347. return rc;
  348. }
  349. static int dsi_panel_power_on(struct dsi_panel *panel)
  350. {
  351. int rc = 0;
  352. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  353. if (rc) {
  354. pr_err("[%s] failed to enable vregs, rc=%d\n", panel->name, rc);
  355. goto exit;
  356. }
  357. rc = dsi_panel_set_pinctrl_state(panel, true);
  358. if (rc) {
  359. pr_err("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  360. goto error_disable_vregs;
  361. }
  362. rc = dsi_panel_reset(panel);
  363. if (rc) {
  364. pr_err("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  365. goto error_disable_gpio;
  366. }
  367. goto exit;
  368. error_disable_gpio:
  369. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  370. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  371. if (gpio_is_valid(panel->bl_config.en_gpio))
  372. gpio_set_value(panel->bl_config.en_gpio, 0);
  373. (void)dsi_panel_set_pinctrl_state(panel, false);
  374. error_disable_vregs:
  375. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  376. exit:
  377. return rc;
  378. }
  379. static int dsi_panel_power_off(struct dsi_panel *panel)
  380. {
  381. int rc = 0;
  382. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  383. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  384. if (gpio_is_valid(panel->reset_config.reset_gpio))
  385. gpio_set_value(panel->reset_config.reset_gpio, 0);
  386. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  387. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  388. rc = dsi_panel_set_pinctrl_state(panel, false);
  389. if (rc) {
  390. pr_err("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  391. rc);
  392. }
  393. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  394. if (rc)
  395. pr_err("[%s] failed to enable vregs, rc=%d\n", panel->name, rc);
  396. return rc;
  397. }
  398. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  399. enum dsi_cmd_set_type type)
  400. {
  401. int rc = 0, i = 0;
  402. ssize_t len;
  403. struct dsi_cmd_desc *cmds;
  404. u32 count;
  405. enum dsi_cmd_set_state state;
  406. struct dsi_display_mode *mode;
  407. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  408. if (!panel || !panel->cur_mode)
  409. return -EINVAL;
  410. mode = panel->cur_mode;
  411. cmds = mode->priv_info->cmd_sets[type].cmds;
  412. count = mode->priv_info->cmd_sets[type].count;
  413. state = mode->priv_info->cmd_sets[type].state;
  414. if (count == 0) {
  415. pr_debug("[%s] No commands to be sent for state(%d)\n",
  416. panel->name, type);
  417. goto error;
  418. }
  419. for (i = 0; i < count; i++) {
  420. if (state == DSI_CMD_SET_STATE_LP)
  421. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  422. if (cmds->last_command)
  423. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  424. len = ops->transfer(panel->host, &cmds->msg);
  425. if (len < 0) {
  426. rc = len;
  427. pr_err("failed to set cmds(%d), rc=%d\n", type, rc);
  428. goto error;
  429. }
  430. if (cmds->post_wait_ms)
  431. usleep_range(cmds->post_wait_ms*1000,
  432. ((cmds->post_wait_ms*1000)+10));
  433. cmds++;
  434. }
  435. error:
  436. return rc;
  437. }
  438. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  439. {
  440. int rc = 0;
  441. if (panel->host_config.ext_bridge_mode)
  442. return 0;
  443. devm_pinctrl_put(panel->pinctrl.pinctrl);
  444. return rc;
  445. }
  446. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  447. {
  448. int rc = 0;
  449. if (panel->host_config.ext_bridge_mode)
  450. return 0;
  451. /* TODO: pinctrl is defined in dsi dt node */
  452. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  453. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  454. rc = PTR_ERR(panel->pinctrl.pinctrl);
  455. pr_err("failed to get pinctrl, rc=%d\n", rc);
  456. goto error;
  457. }
  458. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  459. "panel_active");
  460. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  461. rc = PTR_ERR(panel->pinctrl.active);
  462. pr_err("failed to get pinctrl active state, rc=%d\n", rc);
  463. goto error;
  464. }
  465. panel->pinctrl.suspend =
  466. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  467. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  468. rc = PTR_ERR(panel->pinctrl.suspend);
  469. pr_err("failed to get pinctrl suspend state, rc=%d\n", rc);
  470. goto error;
  471. }
  472. error:
  473. return rc;
  474. }
  475. static int dsi_panel_wled_register(struct dsi_panel *panel,
  476. struct dsi_backlight_config *bl)
  477. {
  478. int rc = 0;
  479. struct backlight_device *bd;
  480. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  481. if (!bd) {
  482. pr_err("[%s] fail raw backlight register\n", panel->name);
  483. rc = -EINVAL;
  484. }
  485. bl->raw_bd = bd;
  486. return rc;
  487. }
  488. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  489. u32 bl_lvl)
  490. {
  491. int rc = 0;
  492. struct mipi_dsi_device *dsi;
  493. if (!panel || (bl_lvl > 0xffff)) {
  494. pr_err("invalid params\n");
  495. return -EINVAL;
  496. }
  497. dsi = &panel->mipi_device;
  498. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  499. if (rc < 0)
  500. pr_err("failed to update dcs backlight:%d\n", bl_lvl);
  501. return rc;
  502. }
  503. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  504. {
  505. int rc = 0;
  506. struct dsi_backlight_config *bl = &panel->bl_config;
  507. if (panel->host_config.ext_bridge_mode)
  508. return 0;
  509. pr_debug("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  510. switch (bl->type) {
  511. case DSI_BACKLIGHT_WLED:
  512. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  513. break;
  514. case DSI_BACKLIGHT_DCS:
  515. rc = dsi_panel_update_backlight(panel, bl_lvl);
  516. break;
  517. case DSI_BACKLIGHT_EXTERNAL:
  518. break;
  519. default:
  520. pr_err("Backlight type(%d) not supported\n", bl->type);
  521. rc = -ENOTSUPP;
  522. }
  523. return rc;
  524. }
  525. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  526. {
  527. u32 cur_bl_level;
  528. struct backlight_device *bd = bl->raw_bd;
  529. /* default the brightness level to 50% */
  530. cur_bl_level = bl->bl_max_level >> 1;
  531. switch (bl->type) {
  532. case DSI_BACKLIGHT_WLED:
  533. /* Try to query the backlight level from the backlight device */
  534. if (bd->ops && bd->ops->get_brightness)
  535. cur_bl_level = bd->ops->get_brightness(bd);
  536. break;
  537. case DSI_BACKLIGHT_DCS:
  538. case DSI_BACKLIGHT_EXTERNAL:
  539. default:
  540. /*
  541. * Ideally, we should read the backlight level from the
  542. * panel. For now, just set it default value.
  543. */
  544. break;
  545. }
  546. pr_debug("cur_bl_level=%d\n", cur_bl_level);
  547. return cur_bl_level;
  548. }
  549. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  550. {
  551. struct dsi_backlight_config *bl = &panel->bl_config;
  552. bl->bl_level = dsi_panel_get_brightness(bl);
  553. }
  554. static int dsi_panel_bl_register(struct dsi_panel *panel)
  555. {
  556. int rc = 0;
  557. struct dsi_backlight_config *bl = &panel->bl_config;
  558. if (panel->host_config.ext_bridge_mode)
  559. return 0;
  560. switch (bl->type) {
  561. case DSI_BACKLIGHT_WLED:
  562. rc = dsi_panel_wled_register(panel, bl);
  563. break;
  564. case DSI_BACKLIGHT_DCS:
  565. break;
  566. case DSI_BACKLIGHT_EXTERNAL:
  567. break;
  568. default:
  569. pr_err("Backlight type(%d) not supported\n", bl->type);
  570. rc = -ENOTSUPP;
  571. goto error;
  572. }
  573. error:
  574. return rc;
  575. }
  576. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  577. {
  578. int rc = 0;
  579. struct dsi_backlight_config *bl = &panel->bl_config;
  580. if (panel->host_config.ext_bridge_mode)
  581. return 0;
  582. switch (bl->type) {
  583. case DSI_BACKLIGHT_WLED:
  584. break;
  585. case DSI_BACKLIGHT_DCS:
  586. break;
  587. case DSI_BACKLIGHT_EXTERNAL:
  588. break;
  589. default:
  590. pr_err("Backlight type(%d) not supported\n", bl->type);
  591. rc = -ENOTSUPP;
  592. goto error;
  593. }
  594. error:
  595. return rc;
  596. }
  597. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  598. struct dsi_parser_utils *utils)
  599. {
  600. int rc = 0;
  601. u64 tmp64 = 0;
  602. struct dsi_display_mode *display_mode;
  603. struct dsi_display_mode_priv_info *priv_info;
  604. display_mode = container_of(mode, struct dsi_display_mode, timing);
  605. priv_info = display_mode->priv_info;
  606. rc = utils->read_u64(utils->data,
  607. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  608. if (rc == -EOVERFLOW) {
  609. tmp64 = 0;
  610. rc = utils->read_u32(utils->data,
  611. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  612. }
  613. mode->clk_rate_hz = !rc ? tmp64 : 0;
  614. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  615. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  616. &mode->mdp_transfer_time_us);
  617. if (!rc)
  618. display_mode->priv_info->mdp_transfer_time_us =
  619. mode->mdp_transfer_time_us;
  620. else
  621. display_mode->priv_info->mdp_transfer_time_us =
  622. DEFAULT_MDP_TRANSFER_TIME;
  623. rc = utils->read_u32(utils->data,
  624. "qcom,mdss-dsi-panel-framerate",
  625. &mode->refresh_rate);
  626. if (rc) {
  627. pr_err("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  628. rc);
  629. goto error;
  630. }
  631. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  632. &mode->h_active);
  633. if (rc) {
  634. pr_err("failed to read qcom,mdss-dsi-panel-width, rc=%d\n", rc);
  635. goto error;
  636. }
  637. rc = utils->read_u32(utils->data,
  638. "qcom,mdss-dsi-h-front-porch",
  639. &mode->h_front_porch);
  640. if (rc) {
  641. pr_err("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  642. rc);
  643. goto error;
  644. }
  645. rc = utils->read_u32(utils->data,
  646. "qcom,mdss-dsi-h-back-porch",
  647. &mode->h_back_porch);
  648. if (rc) {
  649. pr_err("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  650. rc);
  651. goto error;
  652. }
  653. rc = utils->read_u32(utils->data,
  654. "qcom,mdss-dsi-h-pulse-width",
  655. &mode->h_sync_width);
  656. if (rc) {
  657. pr_err("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  658. rc);
  659. goto error;
  660. }
  661. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  662. &mode->h_skew);
  663. if (rc)
  664. pr_err("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n", rc);
  665. pr_debug("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  666. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  667. mode->h_sync_width);
  668. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  669. &mode->v_active);
  670. if (rc) {
  671. pr_err("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  672. rc);
  673. goto error;
  674. }
  675. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  676. &mode->v_back_porch);
  677. if (rc) {
  678. pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  679. rc);
  680. goto error;
  681. }
  682. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  683. &mode->v_front_porch);
  684. if (rc) {
  685. pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  686. rc);
  687. goto error;
  688. }
  689. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  690. &mode->v_sync_width);
  691. if (rc) {
  692. pr_err("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  693. rc);
  694. goto error;
  695. }
  696. pr_debug("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  697. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  698. mode->v_sync_width);
  699. error:
  700. return rc;
  701. }
  702. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  703. struct dsi_parser_utils *utils,
  704. const char *name)
  705. {
  706. int rc = 0;
  707. u32 bpp = 0;
  708. enum dsi_pixel_format fmt;
  709. const char *packing;
  710. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  711. if (rc) {
  712. pr_err("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  713. name, rc);
  714. return rc;
  715. }
  716. switch (bpp) {
  717. case 3:
  718. fmt = DSI_PIXEL_FORMAT_RGB111;
  719. break;
  720. case 8:
  721. fmt = DSI_PIXEL_FORMAT_RGB332;
  722. break;
  723. case 12:
  724. fmt = DSI_PIXEL_FORMAT_RGB444;
  725. break;
  726. case 16:
  727. fmt = DSI_PIXEL_FORMAT_RGB565;
  728. break;
  729. case 18:
  730. fmt = DSI_PIXEL_FORMAT_RGB666;
  731. break;
  732. case 24:
  733. default:
  734. fmt = DSI_PIXEL_FORMAT_RGB888;
  735. break;
  736. }
  737. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  738. packing = utils->get_property(utils->data,
  739. "qcom,mdss-dsi-pixel-packing",
  740. NULL);
  741. if (packing && !strcmp(packing, "loose"))
  742. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  743. }
  744. host->dst_format = fmt;
  745. return rc;
  746. }
  747. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  748. struct dsi_parser_utils *utils,
  749. const char *name)
  750. {
  751. int rc = 0;
  752. bool lane_enabled;
  753. lane_enabled = utils->read_bool(utils->data,
  754. "qcom,mdss-dsi-lane-0-state");
  755. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  756. lane_enabled = utils->read_bool(utils->data,
  757. "qcom,mdss-dsi-lane-1-state");
  758. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  759. lane_enabled = utils->read_bool(utils->data,
  760. "qcom,mdss-dsi-lane-2-state");
  761. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  762. lane_enabled = utils->read_bool(utils->data,
  763. "qcom,mdss-dsi-lane-3-state");
  764. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  765. if (host->data_lanes == 0) {
  766. pr_err("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  767. rc = -EINVAL;
  768. }
  769. return rc;
  770. }
  771. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  772. struct dsi_parser_utils *utils,
  773. const char *name)
  774. {
  775. int rc = 0;
  776. const char *swap_mode;
  777. swap_mode = utils->get_property(utils->data,
  778. "qcom,mdss-dsi-color-order", NULL);
  779. if (swap_mode) {
  780. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  781. host->swap_mode = DSI_COLOR_SWAP_RGB;
  782. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  783. host->swap_mode = DSI_COLOR_SWAP_RBG;
  784. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  785. host->swap_mode = DSI_COLOR_SWAP_BRG;
  786. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  787. host->swap_mode = DSI_COLOR_SWAP_GRB;
  788. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  789. host->swap_mode = DSI_COLOR_SWAP_GBR;
  790. } else {
  791. pr_err("[%s] Unrecognized color order-%s\n",
  792. name, swap_mode);
  793. rc = -EINVAL;
  794. }
  795. } else {
  796. pr_debug("[%s] Falling back to default color order\n", name);
  797. host->swap_mode = DSI_COLOR_SWAP_RGB;
  798. }
  799. /* bit swap on color channel is not defined in dt */
  800. host->bit_swap_red = false;
  801. host->bit_swap_green = false;
  802. host->bit_swap_blue = false;
  803. return rc;
  804. }
  805. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  806. struct dsi_parser_utils *utils,
  807. const char *name)
  808. {
  809. const char *trig;
  810. int rc = 0;
  811. trig = utils->get_property(utils->data,
  812. "qcom,mdss-dsi-mdp-trigger", NULL);
  813. if (trig) {
  814. if (!strcmp(trig, "none")) {
  815. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  816. } else if (!strcmp(trig, "trigger_te")) {
  817. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  818. } else if (!strcmp(trig, "trigger_sw")) {
  819. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  820. } else if (!strcmp(trig, "trigger_sw_te")) {
  821. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  822. } else {
  823. pr_err("[%s] Unrecognized mdp trigger type (%s)\n",
  824. name, trig);
  825. rc = -EINVAL;
  826. }
  827. } else {
  828. pr_debug("[%s] Falling back to default MDP trigger\n",
  829. name);
  830. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  831. }
  832. trig = utils->get_property(utils->data,
  833. "qcom,mdss-dsi-dma-trigger", NULL);
  834. if (trig) {
  835. if (!strcmp(trig, "none")) {
  836. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  837. } else if (!strcmp(trig, "trigger_te")) {
  838. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  839. } else if (!strcmp(trig, "trigger_sw")) {
  840. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  841. } else if (!strcmp(trig, "trigger_sw_seof")) {
  842. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  843. } else if (!strcmp(trig, "trigger_sw_te")) {
  844. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  845. } else {
  846. pr_err("[%s] Unrecognized mdp trigger type (%s)\n",
  847. name, trig);
  848. rc = -EINVAL;
  849. }
  850. } else {
  851. pr_debug("[%s] Falling back to default MDP trigger\n", name);
  852. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  853. }
  854. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  855. &host->te_mode);
  856. if (rc) {
  857. pr_warn("[%s] fallback to default te-pin-select\n", name);
  858. host->te_mode = 1;
  859. rc = 0;
  860. }
  861. return rc;
  862. }
  863. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  864. struct dsi_parser_utils *utils,
  865. const char *name)
  866. {
  867. u32 val = 0;
  868. int rc = 0;
  869. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  870. if (!rc) {
  871. host->t_clk_post = val;
  872. pr_debug("[%s] t_clk_post = %d\n", name, val);
  873. }
  874. val = 0;
  875. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  876. if (!rc) {
  877. host->t_clk_pre = val;
  878. pr_debug("[%s] t_clk_pre = %d\n", name, val);
  879. }
  880. host->ignore_rx_eot = utils->read_bool(utils->data,
  881. "qcom,mdss-dsi-rx-eot-ignore");
  882. host->append_tx_eot = utils->read_bool(utils->data,
  883. "qcom,mdss-dsi-tx-eot-append");
  884. host->ext_bridge_mode = utils->read_bool(utils->data,
  885. "qcom,mdss-dsi-ext-bridge-mode");
  886. host->force_hs_clk_lane = utils->read_bool(utils->data,
  887. "qcom,mdss-dsi-force-clock-lane-hs");
  888. return 0;
  889. }
  890. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  891. {
  892. int rc = 0;
  893. struct dsi_parser_utils *utils = &panel->utils;
  894. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  895. panel->name);
  896. if (rc) {
  897. pr_err("[%s] failed to get pixel format, rc=%d\n",
  898. panel->name, rc);
  899. goto error;
  900. }
  901. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  902. panel->name);
  903. if (rc) {
  904. pr_err("[%s] failed to parse lane states, rc=%d\n",
  905. panel->name, rc);
  906. goto error;
  907. }
  908. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  909. panel->name);
  910. if (rc) {
  911. pr_err("[%s] failed to parse color swap config, rc=%d\n",
  912. panel->name, rc);
  913. goto error;
  914. }
  915. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  916. panel->name);
  917. if (rc) {
  918. pr_err("[%s] failed to parse triggers, rc=%d\n",
  919. panel->name, rc);
  920. goto error;
  921. }
  922. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  923. panel->name);
  924. if (rc) {
  925. pr_err("[%s] failed to parse misc host config, rc=%d\n",
  926. panel->name, rc);
  927. goto error;
  928. }
  929. error:
  930. return rc;
  931. }
  932. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  933. struct device_node *of_node)
  934. {
  935. int rc = 0;
  936. u32 val = 0;
  937. rc = of_property_read_u32(of_node,
  938. "qcom,mdss-dsi-qsync-min-refresh-rate",
  939. &val);
  940. if (rc)
  941. pr_err("[%s] qsync min fps not defined rc:%d\n",
  942. panel->name, rc);
  943. panel->qsync_min_fps = val;
  944. return rc;
  945. }
  946. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  947. {
  948. int rc = 0;
  949. bool supported = false;
  950. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  951. struct dsi_parser_utils *utils = &panel->utils;
  952. const char *name = panel->name;
  953. const char *type;
  954. u32 val = 0;
  955. supported = utils->read_bool(utils->data,
  956. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  957. if (!supported) {
  958. pr_debug("[%s] DFPS is not supported\n", name);
  959. dfps_caps->dfps_support = false;
  960. } else {
  961. type = utils->get_property(utils->data,
  962. "qcom,mdss-dsi-pan-fps-update",
  963. NULL);
  964. if (!type) {
  965. pr_err("[%s] dfps type not defined\n", name);
  966. rc = -EINVAL;
  967. goto error;
  968. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  969. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  970. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  971. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  972. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  973. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  974. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  975. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  976. } else {
  977. pr_err("[%s] dfps type is not recognized\n", name);
  978. rc = -EINVAL;
  979. goto error;
  980. }
  981. rc = utils->read_u32(utils->data,
  982. "qcom,mdss-dsi-min-refresh-rate",
  983. &val);
  984. if (rc) {
  985. pr_err("[%s] Min refresh rate is not defined\n", name);
  986. rc = -EINVAL;
  987. goto error;
  988. }
  989. dfps_caps->min_refresh_rate = val;
  990. rc = utils->read_u32(utils->data,
  991. "qcom,mdss-dsi-max-refresh-rate",
  992. &val);
  993. if (rc) {
  994. pr_debug("[%s] Using default refresh rate\n", name);
  995. rc = utils->read_u32(utils->data,
  996. "qcom,mdss-dsi-panel-framerate",
  997. &val);
  998. if (rc) {
  999. pr_err("[%s] max refresh rate is not defined\n",
  1000. name);
  1001. rc = -EINVAL;
  1002. goto error;
  1003. }
  1004. }
  1005. dfps_caps->max_refresh_rate = val;
  1006. if (dfps_caps->min_refresh_rate > dfps_caps->max_refresh_rate) {
  1007. pr_err("[%s] min rate > max rate\n", name);
  1008. rc = -EINVAL;
  1009. }
  1010. pr_debug("[%s] DFPS is supported %d-%d, mode %d\n", name,
  1011. dfps_caps->min_refresh_rate,
  1012. dfps_caps->max_refresh_rate,
  1013. dfps_caps->type);
  1014. dfps_caps->dfps_support = true;
  1015. }
  1016. error:
  1017. return rc;
  1018. }
  1019. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1020. struct dsi_parser_utils *utils,
  1021. const char *name)
  1022. {
  1023. int rc = 0;
  1024. const char *traffic_mode;
  1025. u32 vc_id = 0;
  1026. u32 val = 0;
  1027. u32 line_no = 0;
  1028. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1029. if (rc) {
  1030. pr_debug("[%s] fallback to default h-sync-pulse\n", name);
  1031. cfg->pulse_mode_hsa_he = false;
  1032. } else if (val == 1) {
  1033. cfg->pulse_mode_hsa_he = true;
  1034. } else if (val == 0) {
  1035. cfg->pulse_mode_hsa_he = false;
  1036. } else {
  1037. pr_err("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1038. name);
  1039. rc = -EINVAL;
  1040. goto error;
  1041. }
  1042. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1043. "qcom,mdss-dsi-hfp-power-mode");
  1044. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1045. "qcom,mdss-dsi-hbp-power-mode");
  1046. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1047. "qcom,mdss-dsi-hsa-power-mode");
  1048. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1049. "qcom,mdss-dsi-last-line-interleave");
  1050. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1051. "qcom,mdss-dsi-bllp-eof-power-mode");
  1052. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1053. "qcom,mdss-dsi-bllp-power-mode");
  1054. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1055. "qcom,mdss-dsi-force-clock-lane-hs");
  1056. traffic_mode = utils->get_property(utils->data,
  1057. "qcom,mdss-dsi-traffic-mode",
  1058. NULL);
  1059. if (!traffic_mode) {
  1060. pr_debug("[%s] Falling back to default traffic mode\n", name);
  1061. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1062. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1063. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1064. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1065. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1066. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1067. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1068. } else {
  1069. pr_err("[%s] Unrecognized traffic mode-%s\n", name,
  1070. traffic_mode);
  1071. rc = -EINVAL;
  1072. goto error;
  1073. }
  1074. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1075. &vc_id);
  1076. if (rc) {
  1077. pr_debug("[%s] Fallback to default vc id\n", name);
  1078. cfg->vc_id = 0;
  1079. } else {
  1080. cfg->vc_id = vc_id;
  1081. }
  1082. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1083. &line_no);
  1084. if (rc) {
  1085. pr_debug("[%s] set default dma scheduling line no\n", name);
  1086. cfg->dma_sched_line = 0x1;
  1087. /* do not fail since we have default value */
  1088. rc = 0;
  1089. } else {
  1090. cfg->dma_sched_line = line_no;
  1091. }
  1092. error:
  1093. return rc;
  1094. }
  1095. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1096. struct dsi_parser_utils *utils,
  1097. const char *name)
  1098. {
  1099. u32 val = 0;
  1100. int rc = 0;
  1101. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1102. if (rc) {
  1103. pr_debug("[%s] Fallback to default wr-mem-start\n", name);
  1104. cfg->wr_mem_start = 0x2C;
  1105. } else {
  1106. cfg->wr_mem_start = val;
  1107. }
  1108. val = 0;
  1109. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1110. &val);
  1111. if (rc) {
  1112. pr_debug("[%s] Fallback to default wr-mem-continue\n", name);
  1113. cfg->wr_mem_continue = 0x3C;
  1114. } else {
  1115. cfg->wr_mem_continue = val;
  1116. }
  1117. /* TODO: fix following */
  1118. cfg->max_cmd_packets_interleave = 0;
  1119. val = 0;
  1120. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1121. &val);
  1122. if (rc) {
  1123. pr_debug("[%s] fallback to default te-dcs-cmd\n", name);
  1124. cfg->insert_dcs_command = true;
  1125. } else if (val == 1) {
  1126. cfg->insert_dcs_command = true;
  1127. } else if (val == 0) {
  1128. cfg->insert_dcs_command = false;
  1129. } else {
  1130. pr_err("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1131. name);
  1132. rc = -EINVAL;
  1133. goto error;
  1134. }
  1135. error:
  1136. return rc;
  1137. }
  1138. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1139. {
  1140. int rc = 0;
  1141. struct dsi_parser_utils *utils = &panel->utils;
  1142. enum dsi_op_mode panel_mode;
  1143. const char *mode;
  1144. mode = utils->get_property(utils->data,
  1145. "qcom,mdss-dsi-panel-type", NULL);
  1146. if (!mode) {
  1147. pr_debug("[%s] Fallback to default panel mode\n", panel->name);
  1148. panel_mode = DSI_OP_VIDEO_MODE;
  1149. } else if (!strcmp(mode, "dsi_video_mode")) {
  1150. panel_mode = DSI_OP_VIDEO_MODE;
  1151. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1152. panel_mode = DSI_OP_CMD_MODE;
  1153. } else {
  1154. pr_err("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1155. rc = -EINVAL;
  1156. goto error;
  1157. }
  1158. if (panel_mode == DSI_OP_VIDEO_MODE) {
  1159. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1160. utils,
  1161. panel->name);
  1162. if (rc) {
  1163. pr_err("[%s] Failed to parse video host cfg, rc=%d\n",
  1164. panel->name, rc);
  1165. goto error;
  1166. }
  1167. }
  1168. if (panel_mode == DSI_OP_CMD_MODE) {
  1169. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1170. utils,
  1171. panel->name);
  1172. if (rc) {
  1173. pr_err("[%s] Failed to parse cmd host config, rc=%d\n",
  1174. panel->name, rc);
  1175. goto error;
  1176. }
  1177. }
  1178. panel->panel_mode = panel_mode;
  1179. error:
  1180. return rc;
  1181. }
  1182. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1183. {
  1184. int rc = 0;
  1185. u32 val = 0;
  1186. const char *str;
  1187. struct dsi_panel_phy_props *props = &panel->phy_props;
  1188. struct dsi_parser_utils *utils = &panel->utils;
  1189. const char *name = panel->name;
  1190. rc = utils->read_u32(utils->data,
  1191. "qcom,mdss-pan-physical-width-dimension", &val);
  1192. if (rc) {
  1193. pr_debug("[%s] Physical panel width is not defined\n", name);
  1194. props->panel_width_mm = 0;
  1195. rc = 0;
  1196. } else {
  1197. props->panel_width_mm = val;
  1198. }
  1199. rc = utils->read_u32(utils->data,
  1200. "qcom,mdss-pan-physical-height-dimension",
  1201. &val);
  1202. if (rc) {
  1203. pr_debug("[%s] Physical panel height is not defined\n", name);
  1204. props->panel_height_mm = 0;
  1205. rc = 0;
  1206. } else {
  1207. props->panel_height_mm = val;
  1208. }
  1209. str = utils->get_property(utils->data,
  1210. "qcom,mdss-dsi-panel-orientation", NULL);
  1211. if (!str) {
  1212. props->rotation = DSI_PANEL_ROTATE_NONE;
  1213. } else if (!strcmp(str, "180")) {
  1214. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1215. } else if (!strcmp(str, "hflip")) {
  1216. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1217. } else if (!strcmp(str, "vflip")) {
  1218. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1219. } else {
  1220. pr_err("[%s] Unrecognized panel rotation-%s\n", name, str);
  1221. rc = -EINVAL;
  1222. goto error;
  1223. }
  1224. error:
  1225. return rc;
  1226. }
  1227. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1228. "qcom,mdss-dsi-pre-on-command",
  1229. "qcom,mdss-dsi-on-command",
  1230. "qcom,mdss-dsi-post-panel-on-command",
  1231. "qcom,mdss-dsi-pre-off-command",
  1232. "qcom,mdss-dsi-off-command",
  1233. "qcom,mdss-dsi-post-off-command",
  1234. "qcom,mdss-dsi-pre-res-switch",
  1235. "qcom,mdss-dsi-res-switch",
  1236. "qcom,mdss-dsi-post-res-switch",
  1237. "qcom,cmd-to-video-mode-switch-commands",
  1238. "qcom,cmd-to-video-mode-post-switch-commands",
  1239. "qcom,video-to-cmd-mode-switch-commands",
  1240. "qcom,video-to-cmd-mode-post-switch-commands",
  1241. "qcom,mdss-dsi-panel-status-command",
  1242. "qcom,mdss-dsi-lp1-command",
  1243. "qcom,mdss-dsi-lp2-command",
  1244. "qcom,mdss-dsi-nolp-command",
  1245. "PPS not parsed from DTSI, generated dynamically",
  1246. "ROI not parsed from DTSI, generated dynamically",
  1247. "qcom,mdss-dsi-timing-switch-command",
  1248. "qcom,mdss-dsi-post-mode-switch-on-command",
  1249. "qcom,mdss-dsi-qsync-on-commands",
  1250. "qcom,mdss-dsi-qsync-off-commands",
  1251. };
  1252. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1253. "qcom,mdss-dsi-pre-on-command-state",
  1254. "qcom,mdss-dsi-on-command-state",
  1255. "qcom,mdss-dsi-post-on-command-state",
  1256. "qcom,mdss-dsi-pre-off-command-state",
  1257. "qcom,mdss-dsi-off-command-state",
  1258. "qcom,mdss-dsi-post-off-command-state",
  1259. "qcom,mdss-dsi-pre-res-switch-state",
  1260. "qcom,mdss-dsi-res-switch-state",
  1261. "qcom,mdss-dsi-post-res-switch-state",
  1262. "qcom,cmd-to-video-mode-switch-commands-state",
  1263. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1264. "qcom,video-to-cmd-mode-switch-commands-state",
  1265. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1266. "qcom,mdss-dsi-panel-status-command-state",
  1267. "qcom,mdss-dsi-lp1-command-state",
  1268. "qcom,mdss-dsi-lp2-command-state",
  1269. "qcom,mdss-dsi-nolp-command-state",
  1270. "PPS not parsed from DTSI, generated dynamically",
  1271. "ROI not parsed from DTSI, generated dynamically",
  1272. "qcom,mdss-dsi-timing-switch-command-state",
  1273. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1274. "qcom,mdss-dsi-qsync-on-commands-state",
  1275. "qcom,mdss-dsi-qsync-off-commands-state",
  1276. };
  1277. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1278. {
  1279. const u32 cmd_set_min_size = 7;
  1280. u32 count = 0;
  1281. u32 packet_length;
  1282. u32 tmp;
  1283. while (length >= cmd_set_min_size) {
  1284. packet_length = cmd_set_min_size;
  1285. tmp = ((data[5] << 8) | (data[6]));
  1286. packet_length += tmp;
  1287. if (packet_length > length) {
  1288. pr_err("format error\n");
  1289. return -EINVAL;
  1290. }
  1291. length -= packet_length;
  1292. data += packet_length;
  1293. count++;
  1294. }
  1295. *cnt = count;
  1296. return 0;
  1297. }
  1298. static int dsi_panel_create_cmd_packets(const char *data,
  1299. u32 length,
  1300. u32 count,
  1301. struct dsi_cmd_desc *cmd)
  1302. {
  1303. int rc = 0;
  1304. int i, j;
  1305. u8 *payload;
  1306. for (i = 0; i < count; i++) {
  1307. u32 size;
  1308. cmd[i].msg.type = data[0];
  1309. cmd[i].last_command = (data[1] == 1);
  1310. cmd[i].msg.channel = data[2];
  1311. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1312. cmd[i].msg.ctrl = 0;
  1313. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1314. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1315. size = cmd[i].msg.tx_len * sizeof(u8);
  1316. payload = kzalloc(size, GFP_KERNEL);
  1317. if (!payload) {
  1318. rc = -ENOMEM;
  1319. goto error_free_payloads;
  1320. }
  1321. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1322. payload[j] = data[7 + j];
  1323. cmd[i].msg.tx_buf = payload;
  1324. data += (7 + cmd[i].msg.tx_len);
  1325. }
  1326. return rc;
  1327. error_free_payloads:
  1328. for (i = i - 1; i >= 0; i--) {
  1329. cmd--;
  1330. kfree(cmd->msg.tx_buf);
  1331. }
  1332. return rc;
  1333. }
  1334. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1335. {
  1336. u32 i = 0;
  1337. struct dsi_cmd_desc *cmd;
  1338. for (i = 0; i < set->count; i++) {
  1339. cmd = &set->cmds[i];
  1340. kfree(cmd->msg.tx_buf);
  1341. }
  1342. }
  1343. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1344. {
  1345. kfree(set->cmds);
  1346. }
  1347. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1348. u32 packet_count)
  1349. {
  1350. u32 size;
  1351. size = packet_count * sizeof(*cmd->cmds);
  1352. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1353. if (!cmd->cmds)
  1354. return -ENOMEM;
  1355. cmd->count = packet_count;
  1356. return 0;
  1357. }
  1358. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1359. enum dsi_cmd_set_type type,
  1360. struct dsi_parser_utils *utils)
  1361. {
  1362. int rc = 0;
  1363. u32 length = 0;
  1364. const char *data;
  1365. const char *state;
  1366. u32 packet_count = 0;
  1367. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1368. &length);
  1369. if (!data) {
  1370. pr_debug("%s commands not defined\n", cmd_set_prop_map[type]);
  1371. rc = -ENOTSUPP;
  1372. goto error;
  1373. }
  1374. pr_debug("type=%d, name=%s, length=%d\n", type,
  1375. cmd_set_prop_map[type], length);
  1376. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1377. 8, 1, data, length, false);
  1378. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1379. if (rc) {
  1380. pr_err("commands failed, rc=%d\n", rc);
  1381. goto error;
  1382. }
  1383. pr_debug("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1384. packet_count, length);
  1385. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1386. if (rc) {
  1387. pr_err("failed to allocate cmd packets, rc=%d\n", rc);
  1388. goto error;
  1389. }
  1390. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1391. cmd->cmds);
  1392. if (rc) {
  1393. pr_err("failed to create cmd packets, rc=%d\n", rc);
  1394. goto error_free_mem;
  1395. }
  1396. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1397. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1398. cmd->state = DSI_CMD_SET_STATE_LP;
  1399. } else if (!strcmp(state, "dsi_hs_mode")) {
  1400. cmd->state = DSI_CMD_SET_STATE_HS;
  1401. } else {
  1402. pr_err("[%s] command state unrecognized-%s\n",
  1403. cmd_set_state_map[type], state);
  1404. goto error_free_mem;
  1405. }
  1406. return rc;
  1407. error_free_mem:
  1408. kfree(cmd->cmds);
  1409. cmd->cmds = NULL;
  1410. error:
  1411. return rc;
  1412. }
  1413. static int dsi_panel_parse_cmd_sets(
  1414. struct dsi_display_mode_priv_info *priv_info,
  1415. struct dsi_parser_utils *utils)
  1416. {
  1417. int rc = 0;
  1418. struct dsi_panel_cmd_set *set;
  1419. u32 i;
  1420. if (!priv_info) {
  1421. pr_err("invalid mode priv info\n");
  1422. return -EINVAL;
  1423. }
  1424. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1425. set = &priv_info->cmd_sets[i];
  1426. set->type = i;
  1427. set->count = 0;
  1428. if (i == DSI_CMD_SET_PPS) {
  1429. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1430. if (rc)
  1431. pr_err("failed to allocate cmd set %d, rc = %d\n",
  1432. i, rc);
  1433. set->state = DSI_CMD_SET_STATE_LP;
  1434. } else {
  1435. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1436. if (rc)
  1437. pr_debug("failed to parse set %d\n", i);
  1438. }
  1439. }
  1440. rc = 0;
  1441. return rc;
  1442. }
  1443. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1444. {
  1445. int rc = 0;
  1446. int i;
  1447. u32 length = 0;
  1448. u32 count = 0;
  1449. u32 size = 0;
  1450. u32 *arr_32 = NULL;
  1451. const u32 *arr;
  1452. struct dsi_parser_utils *utils = &panel->utils;
  1453. struct dsi_reset_seq *seq;
  1454. if (panel->host_config.ext_bridge_mode)
  1455. return 0;
  1456. arr = utils->get_property(utils->data,
  1457. "qcom,mdss-dsi-reset-sequence", &length);
  1458. if (!arr) {
  1459. pr_err("[%s] dsi-reset-sequence not found\n", panel->name);
  1460. rc = -EINVAL;
  1461. goto error;
  1462. }
  1463. if (length & 0x1) {
  1464. pr_err("[%s] syntax error for dsi-reset-sequence\n",
  1465. panel->name);
  1466. rc = -EINVAL;
  1467. goto error;
  1468. }
  1469. pr_err("RESET SEQ LENGTH = %d\n", length);
  1470. length = length / sizeof(u32);
  1471. size = length * sizeof(u32);
  1472. arr_32 = kzalloc(size, GFP_KERNEL);
  1473. if (!arr_32) {
  1474. rc = -ENOMEM;
  1475. goto error;
  1476. }
  1477. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1478. arr_32, length);
  1479. if (rc) {
  1480. pr_err("[%s] cannot read dso-reset-seqience\n", panel->name);
  1481. goto error_free_arr_32;
  1482. }
  1483. count = length / 2;
  1484. size = count * sizeof(*seq);
  1485. seq = kzalloc(size, GFP_KERNEL);
  1486. if (!seq) {
  1487. rc = -ENOMEM;
  1488. goto error_free_arr_32;
  1489. }
  1490. panel->reset_config.sequence = seq;
  1491. panel->reset_config.count = count;
  1492. for (i = 0; i < length; i += 2) {
  1493. seq->level = arr_32[i];
  1494. seq->sleep_ms = arr_32[i + 1];
  1495. seq++;
  1496. }
  1497. error_free_arr_32:
  1498. kfree(arr_32);
  1499. error:
  1500. return rc;
  1501. }
  1502. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1503. {
  1504. struct dsi_parser_utils *utils = &panel->utils;
  1505. panel->ulps_feature_enabled =
  1506. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1507. pr_info("%s: ulps feature %s\n", __func__,
  1508. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1509. panel->ulps_suspend_enabled =
  1510. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1511. pr_info("%s: ulps during suspend feature %s\n", __func__,
  1512. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1513. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1514. "qcom,mdss-dsi-te-using-wd");
  1515. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1516. "qcom,cmd-sync-wait-broadcast");
  1517. panel->lp11_init = utils->read_bool(utils->data,
  1518. "qcom,mdss-dsi-lp11-init");
  1519. return 0;
  1520. }
  1521. static int dsi_panel_parse_jitter_config(
  1522. struct dsi_display_mode *mode,
  1523. struct dsi_parser_utils *utils)
  1524. {
  1525. int rc;
  1526. struct dsi_display_mode_priv_info *priv_info;
  1527. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1528. u64 jitter_val = 0;
  1529. priv_info = mode->priv_info;
  1530. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1531. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1532. if (rc) {
  1533. pr_debug("panel jitter not defined rc=%d\n", rc);
  1534. } else {
  1535. jitter_val = jitter[0];
  1536. jitter_val = div_u64(jitter_val, jitter[1]);
  1537. }
  1538. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1539. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1540. priv_info->panel_jitter_denom =
  1541. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1542. } else {
  1543. priv_info->panel_jitter_numer = jitter[0];
  1544. priv_info->panel_jitter_denom = jitter[1];
  1545. }
  1546. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1547. &priv_info->panel_prefill_lines);
  1548. if (rc) {
  1549. pr_debug("panel prefill lines are not defined rc=%d\n", rc);
  1550. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1551. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1552. } else if (priv_info->panel_prefill_lines >=
  1553. DSI_V_TOTAL(&mode->timing)) {
  1554. pr_debug("invalid prefill lines config=%d setting to:%d\n",
  1555. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1556. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1557. }
  1558. return 0;
  1559. }
  1560. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1561. {
  1562. int rc = 0;
  1563. char *supply_name;
  1564. if (panel->host_config.ext_bridge_mode)
  1565. return 0;
  1566. if (!strcmp(panel->type, "primary"))
  1567. supply_name = "qcom,panel-supply-entries";
  1568. else
  1569. supply_name = "qcom,panel-sec-supply-entries";
  1570. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1571. &panel->power_info, supply_name);
  1572. if (rc) {
  1573. pr_err("[%s] failed to parse vregs\n", panel->name);
  1574. goto error;
  1575. }
  1576. error:
  1577. return rc;
  1578. }
  1579. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1580. {
  1581. int rc = 0;
  1582. const char *data;
  1583. struct dsi_parser_utils *utils = &panel->utils;
  1584. char *reset_gpio_name, *mode_set_gpio_name;
  1585. if (!strcmp(panel->type, "primary")) {
  1586. reset_gpio_name = "qcom,platform-reset-gpio";
  1587. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1588. } else {
  1589. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1590. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1591. }
  1592. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1593. reset_gpio_name, 0);
  1594. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1595. !panel->host_config.ext_bridge_mode) {
  1596. rc = panel->reset_config.reset_gpio;
  1597. pr_err("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1598. goto error;
  1599. }
  1600. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1601. "qcom,5v-boost-gpio",
  1602. 0);
  1603. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1604. pr_debug("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1605. panel->name, rc);
  1606. panel->reset_config.disp_en_gpio =
  1607. utils->get_named_gpio(utils->data,
  1608. "qcom,platform-en-gpio", 0);
  1609. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1610. pr_debug("[%s] platform-en-gpio is not set, rc=%d\n",
  1611. panel->name, rc);
  1612. }
  1613. }
  1614. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1615. utils->data, mode_set_gpio_name, 0);
  1616. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1617. pr_debug("%s:%d mode gpio not specified\n", __func__, __LINE__);
  1618. pr_debug("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1619. data = utils->get_property(utils->data,
  1620. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1621. if (data) {
  1622. if (!strcmp(data, "single_port"))
  1623. panel->reset_config.mode_sel_state =
  1624. MODE_SEL_SINGLE_PORT;
  1625. else if (!strcmp(data, "dual_port"))
  1626. panel->reset_config.mode_sel_state =
  1627. MODE_SEL_DUAL_PORT;
  1628. else if (!strcmp(data, "high"))
  1629. panel->reset_config.mode_sel_state =
  1630. MODE_GPIO_HIGH;
  1631. else if (!strcmp(data, "low"))
  1632. panel->reset_config.mode_sel_state =
  1633. MODE_GPIO_LOW;
  1634. } else {
  1635. /* Set default mode as SPLIT mode */
  1636. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1637. }
  1638. /* TODO: release memory */
  1639. rc = dsi_panel_parse_reset_sequence(panel);
  1640. if (rc) {
  1641. pr_err("[%s] failed to parse reset sequence, rc=%d\n",
  1642. panel->name, rc);
  1643. goto error;
  1644. }
  1645. error:
  1646. return rc;
  1647. }
  1648. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1649. {
  1650. int rc = 0;
  1651. u32 val;
  1652. struct dsi_backlight_config *config = &panel->bl_config;
  1653. struct dsi_parser_utils *utils = &panel->utils;
  1654. rc = utils->read_u32(utils->data, "qcom,dsi-bl-pmic-bank-select",
  1655. &val);
  1656. if (rc) {
  1657. pr_err("bl-pmic-bank-select is not defined, rc=%d\n", rc);
  1658. goto error;
  1659. }
  1660. config->pwm_pmic_bank = val;
  1661. rc = utils->read_u32(utils->data, "qcom,dsi-bl-pmic-pwm-frequency",
  1662. &val);
  1663. if (rc) {
  1664. pr_err("bl-pmic-bank-select is not defined, rc=%d\n", rc);
  1665. goto error;
  1666. }
  1667. config->pwm_period_usecs = val;
  1668. config->pwm_pmi_control = utils->read_bool(utils->data,
  1669. "qcom,mdss-dsi-bl-pwm-pmi");
  1670. config->pwm_gpio = utils->get_named_gpio(utils->data,
  1671. "qcom,mdss-dsi-pwm-gpio",
  1672. 0);
  1673. if (!gpio_is_valid(config->pwm_gpio)) {
  1674. pr_err("pwm gpio is invalid\n");
  1675. rc = -EINVAL;
  1676. goto error;
  1677. }
  1678. error:
  1679. return rc;
  1680. }
  1681. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1682. {
  1683. int rc = 0;
  1684. u32 val = 0;
  1685. const char *bl_type;
  1686. const char *data;
  1687. struct dsi_parser_utils *utils = &panel->utils;
  1688. char *bl_name;
  1689. if (!strcmp(panel->type, "primary"))
  1690. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1691. else
  1692. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1693. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1694. if (!bl_type) {
  1695. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1696. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1697. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1698. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1699. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1700. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1701. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1702. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1703. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1704. } else {
  1705. pr_debug("[%s] bl-pmic-control-type unknown-%s\n",
  1706. panel->name, bl_type);
  1707. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1708. }
  1709. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1710. if (!data) {
  1711. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1712. } else if (!strcmp(data, "delay_until_first_frame")) {
  1713. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1714. } else {
  1715. pr_debug("[%s] No valid bl-update-flag: %s\n",
  1716. panel->name, data);
  1717. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1718. }
  1719. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1720. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1721. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1722. if (rc) {
  1723. pr_debug("[%s] bl-min-level unspecified, defaulting to zero\n",
  1724. panel->name);
  1725. panel->bl_config.bl_min_level = 0;
  1726. } else {
  1727. panel->bl_config.bl_min_level = val;
  1728. }
  1729. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1730. if (rc) {
  1731. pr_debug("[%s] bl-max-level unspecified, defaulting to max level\n",
  1732. panel->name);
  1733. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1734. } else {
  1735. panel->bl_config.bl_max_level = val;
  1736. }
  1737. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1738. &val);
  1739. if (rc) {
  1740. pr_debug("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1741. panel->name);
  1742. panel->bl_config.brightness_max_level = 255;
  1743. } else {
  1744. panel->bl_config.brightness_max_level = val;
  1745. }
  1746. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1747. rc = dsi_panel_parse_bl_pwm_config(panel);
  1748. if (rc) {
  1749. pr_err("[%s] failed to parse pwm config, rc=%d\n",
  1750. panel->name, rc);
  1751. goto error;
  1752. }
  1753. }
  1754. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1755. "qcom,platform-bklight-en-gpio",
  1756. 0);
  1757. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1758. pr_debug("[%s] failed get bklt gpio, rc=%d\n", panel->name, rc);
  1759. rc = 0;
  1760. goto error;
  1761. }
  1762. error:
  1763. return rc;
  1764. }
  1765. void dsi_dsc_pclk_param_calc(struct msm_display_dsc_info *dsc, int intf_width)
  1766. {
  1767. int slice_per_pkt, slice_per_intf;
  1768. int bytes_in_slice, total_bytes_per_intf;
  1769. if (!dsc || !dsc->slice_width || !dsc->slice_per_pkt ||
  1770. (intf_width < dsc->slice_width)) {
  1771. pr_err("invalid input, intf_width=%d slice_width=%d\n",
  1772. intf_width, dsc ? dsc->slice_width : -1);
  1773. return;
  1774. }
  1775. slice_per_pkt = dsc->slice_per_pkt;
  1776. slice_per_intf = DIV_ROUND_UP(intf_width, dsc->slice_width);
  1777. /*
  1778. * If slice_per_pkt is greater than slice_per_intf then default to 1.
  1779. * This can happen during partial update.
  1780. */
  1781. if (slice_per_pkt > slice_per_intf)
  1782. slice_per_pkt = 1;
  1783. bytes_in_slice = DIV_ROUND_UP(dsc->slice_width * dsc->bpp, 8);
  1784. total_bytes_per_intf = bytes_in_slice * slice_per_intf;
  1785. dsc->eol_byte_num = total_bytes_per_intf % 3;
  1786. dsc->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf, 3);
  1787. dsc->bytes_in_slice = bytes_in_slice;
  1788. dsc->bytes_per_pkt = bytes_in_slice * slice_per_pkt;
  1789. dsc->pkt_per_line = slice_per_intf / slice_per_pkt;
  1790. }
  1791. int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
  1792. {
  1793. int bpp, bpc;
  1794. int mux_words_size;
  1795. int groups_per_line, groups_total;
  1796. int min_rate_buffer_size;
  1797. int hrd_delay;
  1798. int pre_num_extra_mux_bits, num_extra_mux_bits;
  1799. int slice_bits;
  1800. int data;
  1801. int final_value, final_scale;
  1802. int ratio_index, mod_offset;
  1803. dsc->rc_model_size = 8192;
  1804. if (dsc->version == 0x11 && dsc->scr_rev == 0x1)
  1805. dsc->first_line_bpg_offset = 15;
  1806. else
  1807. dsc->first_line_bpg_offset = 12;
  1808. dsc->edge_factor = 6;
  1809. dsc->tgt_offset_hi = 3;
  1810. dsc->tgt_offset_lo = 3;
  1811. dsc->enable_422 = 0;
  1812. dsc->convert_rgb = 1;
  1813. dsc->vbr_enable = 0;
  1814. dsc->buf_thresh = dsi_dsc_rc_buf_thresh;
  1815. bpp = dsc->bpp;
  1816. bpc = dsc->bpc;
  1817. if ((bpc == 12) && (bpp == 8))
  1818. ratio_index = DSC_12BPC_8BPP;
  1819. else if ((bpc == 10) && (bpp == 8))
  1820. ratio_index = DSC_10BPC_8BPP;
  1821. else if ((bpc == 10) && (bpp == 10))
  1822. ratio_index = DSC_10BPC_10BPP;
  1823. else
  1824. ratio_index = DSC_8BPC_8BPP;
  1825. if (dsc->version == 0x11 && dsc->scr_rev == 0x1) {
  1826. dsc->range_min_qp =
  1827. dsi_dsc_rc_range_min_qp_1_1_scr1[ratio_index];
  1828. dsc->range_max_qp =
  1829. dsi_dsc_rc_range_max_qp_1_1_scr1[ratio_index];
  1830. } else {
  1831. dsc->range_min_qp = dsi_dsc_rc_range_min_qp_1_1[ratio_index];
  1832. dsc->range_max_qp = dsi_dsc_rc_range_max_qp_1_1[ratio_index];
  1833. }
  1834. dsc->range_bpg_offset = dsi_dsc_rc_range_bpg_offset;
  1835. if (bpp == 8) {
  1836. dsc->initial_offset = 6144;
  1837. dsc->initial_xmit_delay = 512;
  1838. } else if (bpp == 10) {
  1839. dsc->initial_offset = 5632;
  1840. dsc->initial_xmit_delay = 410;
  1841. } else {
  1842. dsc->initial_offset = 2048;
  1843. dsc->initial_xmit_delay = 341;
  1844. }
  1845. dsc->line_buf_depth = bpc + 1;
  1846. if (bpc == 8) {
  1847. dsc->input_10_bits = 0;
  1848. dsc->min_qp_flatness = 3;
  1849. dsc->max_qp_flatness = 12;
  1850. dsc->quant_incr_limit0 = 11;
  1851. dsc->quant_incr_limit1 = 11;
  1852. mux_words_size = 48;
  1853. } else if (bpc == 10) { /* 10bpc */
  1854. dsc->input_10_bits = 1;
  1855. dsc->min_qp_flatness = 7;
  1856. dsc->max_qp_flatness = 16;
  1857. dsc->quant_incr_limit0 = 15;
  1858. dsc->quant_incr_limit1 = 15;
  1859. mux_words_size = 48;
  1860. } else { /* 12 bpc */
  1861. dsc->input_10_bits = 0;
  1862. dsc->min_qp_flatness = 11;
  1863. dsc->max_qp_flatness = 20;
  1864. dsc->quant_incr_limit0 = 19;
  1865. dsc->quant_incr_limit1 = 19;
  1866. mux_words_size = 64;
  1867. }
  1868. mod_offset = dsc->slice_width % 3;
  1869. switch (mod_offset) {
  1870. case 0:
  1871. dsc->slice_last_group_size = 2;
  1872. break;
  1873. case 1:
  1874. dsc->slice_last_group_size = 0;
  1875. break;
  1876. case 2:
  1877. dsc->slice_last_group_size = 1;
  1878. break;
  1879. default:
  1880. break;
  1881. }
  1882. dsc->det_thresh_flatness = 2 << (bpc - 8);
  1883. groups_per_line = DIV_ROUND_UP(dsc->slice_width, 3);
  1884. dsc->chunk_size = dsc->slice_width * bpp / 8;
  1885. if ((dsc->slice_width * bpp) % 8)
  1886. dsc->chunk_size++;
  1887. /* rbs-min */
  1888. min_rate_buffer_size = dsc->rc_model_size - dsc->initial_offset +
  1889. dsc->initial_xmit_delay * bpp +
  1890. groups_per_line * dsc->first_line_bpg_offset;
  1891. hrd_delay = DIV_ROUND_UP(min_rate_buffer_size, bpp);
  1892. dsc->initial_dec_delay = hrd_delay - dsc->initial_xmit_delay;
  1893. dsc->initial_scale_value = 8 * dsc->rc_model_size /
  1894. (dsc->rc_model_size - dsc->initial_offset);
  1895. slice_bits = 8 * dsc->chunk_size * dsc->slice_height;
  1896. groups_total = groups_per_line * dsc->slice_height;
  1897. data = dsc->first_line_bpg_offset * 2048;
  1898. dsc->nfl_bpg_offset = DIV_ROUND_UP(data, (dsc->slice_height - 1));
  1899. pre_num_extra_mux_bits = 3 * (mux_words_size + (4 * bpc + 4) - 2);
  1900. num_extra_mux_bits = pre_num_extra_mux_bits - (mux_words_size -
  1901. ((slice_bits - pre_num_extra_mux_bits) % mux_words_size));
  1902. data = 2048 * (dsc->rc_model_size - dsc->initial_offset
  1903. + num_extra_mux_bits);
  1904. dsc->slice_bpg_offset = DIV_ROUND_UP(data, groups_total);
  1905. data = dsc->initial_xmit_delay * bpp;
  1906. final_value = dsc->rc_model_size - data + num_extra_mux_bits;
  1907. final_scale = 8 * dsc->rc_model_size /
  1908. (dsc->rc_model_size - final_value);
  1909. dsc->final_offset = final_value;
  1910. data = (final_scale - 9) * (dsc->nfl_bpg_offset +
  1911. dsc->slice_bpg_offset);
  1912. dsc->scale_increment_interval = (2048 * dsc->final_offset) / data;
  1913. dsc->scale_decrement_interval = groups_per_line /
  1914. (dsc->initial_scale_value - 8);
  1915. return 0;
  1916. }
  1917. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1918. struct dsi_parser_utils *utils)
  1919. {
  1920. const char *data;
  1921. u32 len, i;
  1922. int rc = 0;
  1923. struct dsi_display_mode_priv_info *priv_info;
  1924. priv_info = mode->priv_info;
  1925. data = utils->get_property(utils->data,
  1926. "qcom,mdss-dsi-panel-phy-timings", &len);
  1927. if (!data) {
  1928. pr_debug("Unable to read Phy timing settings\n");
  1929. } else {
  1930. priv_info->phy_timing_val =
  1931. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1932. if (!priv_info->phy_timing_val)
  1933. return -EINVAL;
  1934. for (i = 0; i < len; i++)
  1935. priv_info->phy_timing_val[i] = data[i];
  1936. priv_info->phy_timing_len = len;
  1937. }
  1938. mode->pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) *
  1939. DSI_V_TOTAL(&mode->timing) *
  1940. mode->timing.refresh_rate) / 1000;
  1941. return rc;
  1942. }
  1943. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1944. struct dsi_parser_utils *utils)
  1945. {
  1946. u32 data;
  1947. int rc = -EINVAL;
  1948. int intf_width;
  1949. const char *compression;
  1950. struct dsi_display_mode_priv_info *priv_info;
  1951. if (!mode || !mode->priv_info)
  1952. return -EINVAL;
  1953. priv_info = mode->priv_info;
  1954. priv_info->dsc_enabled = false;
  1955. compression = utils->get_property(utils->data,
  1956. "qcom,compression-mode", NULL);
  1957. if (compression && !strcmp(compression, "dsc"))
  1958. priv_info->dsc_enabled = true;
  1959. if (!priv_info->dsc_enabled) {
  1960. pr_debug("dsc compression is not enabled for the mode\n");
  1961. return 0;
  1962. }
  1963. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  1964. if (rc) {
  1965. priv_info->dsc.version = 0x11;
  1966. rc = 0;
  1967. } else {
  1968. priv_info->dsc.version = data & 0xff;
  1969. /* only support DSC 1.1 rev */
  1970. if (priv_info->dsc.version != 0x11) {
  1971. pr_err("%s: DSC version:%d not supported\n", __func__,
  1972. priv_info->dsc.version);
  1973. rc = -EINVAL;
  1974. goto error;
  1975. }
  1976. }
  1977. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  1978. if (rc) {
  1979. priv_info->dsc.scr_rev = 0x0;
  1980. rc = 0;
  1981. } else {
  1982. priv_info->dsc.scr_rev = data & 0xff;
  1983. /* only one scr rev supported */
  1984. if (priv_info->dsc.scr_rev > 0x1) {
  1985. pr_err("%s: DSC scr version:%d not supported\n",
  1986. __func__, priv_info->dsc.scr_rev);
  1987. rc = -EINVAL;
  1988. goto error;
  1989. }
  1990. }
  1991. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  1992. if (rc) {
  1993. pr_err("failed to parse qcom,mdss-dsc-slice-height\n");
  1994. goto error;
  1995. }
  1996. priv_info->dsc.slice_height = data;
  1997. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  1998. if (rc) {
  1999. pr_err("failed to parse qcom,mdss-dsc-slice-width\n");
  2000. goto error;
  2001. }
  2002. priv_info->dsc.slice_width = data;
  2003. intf_width = mode->timing.h_active;
  2004. if (intf_width % priv_info->dsc.slice_width) {
  2005. pr_err("invalid slice width for the intf width:%d slice width:%d\n",
  2006. intf_width, priv_info->dsc.slice_width);
  2007. rc = -EINVAL;
  2008. goto error;
  2009. }
  2010. priv_info->dsc.pic_width = mode->timing.h_active;
  2011. priv_info->dsc.pic_height = mode->timing.v_active;
  2012. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2013. if (rc) {
  2014. pr_err("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2015. goto error;
  2016. } else if (!data || (data > 2)) {
  2017. pr_err("invalid dsc slice-per-pkt:%d\n", data);
  2018. goto error;
  2019. }
  2020. priv_info->dsc.slice_per_pkt = data;
  2021. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2022. &data);
  2023. if (rc) {
  2024. pr_err("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2025. goto error;
  2026. }
  2027. priv_info->dsc.bpc = data;
  2028. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2029. &data);
  2030. if (rc) {
  2031. pr_err("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2032. goto error;
  2033. }
  2034. priv_info->dsc.bpp = data;
  2035. priv_info->dsc.block_pred_enable = utils->read_bool(utils->data,
  2036. "qcom,mdss-dsc-block-prediction-enable");
  2037. priv_info->dsc.full_frame_slices = DIV_ROUND_UP(intf_width,
  2038. priv_info->dsc.slice_width);
  2039. dsi_dsc_populate_static_param(&priv_info->dsc);
  2040. dsi_dsc_pclk_param_calc(&priv_info->dsc, intf_width);
  2041. mode->timing.dsc_enabled = true;
  2042. mode->timing.dsc = &priv_info->dsc;
  2043. error:
  2044. return rc;
  2045. }
  2046. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2047. {
  2048. int rc = 0;
  2049. struct drm_panel_hdr_properties *hdr_prop;
  2050. struct dsi_parser_utils *utils = &panel->utils;
  2051. hdr_prop = &panel->hdr_props;
  2052. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2053. "qcom,mdss-dsi-panel-hdr-enabled");
  2054. if (hdr_prop->hdr_enabled) {
  2055. rc = utils->read_u32_array(utils->data,
  2056. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2057. hdr_prop->display_primaries,
  2058. DISPLAY_PRIMARIES_MAX);
  2059. if (rc) {
  2060. pr_err("%s:%d, Unable to read color primaries,rc:%u\n",
  2061. __func__, __LINE__, rc);
  2062. hdr_prop->hdr_enabled = false;
  2063. return rc;
  2064. }
  2065. rc = utils->read_u32(utils->data,
  2066. "qcom,mdss-dsi-panel-peak-brightness",
  2067. &(hdr_prop->peak_brightness));
  2068. if (rc) {
  2069. pr_err("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2070. __func__, __LINE__, rc);
  2071. hdr_prop->hdr_enabled = false;
  2072. return rc;
  2073. }
  2074. rc = utils->read_u32(utils->data,
  2075. "qcom,mdss-dsi-panel-blackness-level",
  2076. &(hdr_prop->blackness_level));
  2077. if (rc) {
  2078. pr_err("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2079. __func__, __LINE__, rc);
  2080. hdr_prop->hdr_enabled = false;
  2081. return rc;
  2082. }
  2083. }
  2084. return 0;
  2085. }
  2086. static int dsi_panel_parse_topology(
  2087. struct dsi_display_mode_priv_info *priv_info,
  2088. struct dsi_parser_utils *utils,
  2089. int topology_override)
  2090. {
  2091. struct msm_display_topology *topology;
  2092. u32 top_count, top_sel, *array = NULL;
  2093. int i, len = 0;
  2094. int rc = -EINVAL;
  2095. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2096. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2097. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2098. pr_err("invalid topology list for the panel, rc = %d\n", rc);
  2099. return rc;
  2100. }
  2101. top_count = len / TOPOLOGY_SET_LEN;
  2102. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2103. if (!array)
  2104. return -ENOMEM;
  2105. rc = utils->read_u32_array(utils->data,
  2106. "qcom,display-topology", array, len);
  2107. if (rc) {
  2108. pr_err("unable to read the display topologies, rc = %d\n", rc);
  2109. goto read_fail;
  2110. }
  2111. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2112. if (!topology) {
  2113. rc = -ENOMEM;
  2114. goto read_fail;
  2115. }
  2116. for (i = 0; i < top_count; i++) {
  2117. struct msm_display_topology *top = &topology[i];
  2118. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2119. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2120. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2121. }
  2122. if (topology_override >= 0 && topology_override < top_count) {
  2123. pr_info("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2124. topology_override,
  2125. topology[topology_override].num_lm,
  2126. topology[topology_override].num_enc,
  2127. topology[topology_override].num_intf);
  2128. top_sel = topology_override;
  2129. goto parse_done;
  2130. }
  2131. rc = utils->read_u32(utils->data,
  2132. "qcom,default-topology-index", &top_sel);
  2133. if (rc) {
  2134. pr_err("no default topology selected, rc = %d\n", rc);
  2135. goto parse_fail;
  2136. }
  2137. if (top_sel >= top_count) {
  2138. rc = -EINVAL;
  2139. pr_err("default topology is specified is not valid, rc = %d\n",
  2140. rc);
  2141. goto parse_fail;
  2142. }
  2143. pr_info("default topology: lm: %d comp_enc:%d intf: %d\n",
  2144. topology[top_sel].num_lm,
  2145. topology[top_sel].num_enc,
  2146. topology[top_sel].num_intf);
  2147. parse_done:
  2148. memcpy(&priv_info->topology, &topology[top_sel],
  2149. sizeof(struct msm_display_topology));
  2150. parse_fail:
  2151. kfree(topology);
  2152. read_fail:
  2153. kfree(array);
  2154. return rc;
  2155. }
  2156. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2157. struct msm_roi_alignment *align)
  2158. {
  2159. int len = 0, rc = 0;
  2160. u32 value[6];
  2161. struct property *data;
  2162. if (!align)
  2163. return -EINVAL;
  2164. memset(align, 0, sizeof(*align));
  2165. data = utils->find_property(utils->data,
  2166. "qcom,panel-roi-alignment", &len);
  2167. len /= sizeof(u32);
  2168. if (!data) {
  2169. pr_err("panel roi alignment not found\n");
  2170. rc = -EINVAL;
  2171. } else if (len != 6) {
  2172. pr_err("incorrect roi alignment len %d\n", len);
  2173. rc = -EINVAL;
  2174. } else {
  2175. rc = utils->read_u32_array(utils->data,
  2176. "qcom,panel-roi-alignment", value, len);
  2177. if (rc)
  2178. pr_debug("error reading panel roi alignment values\n");
  2179. else {
  2180. align->xstart_pix_align = value[0];
  2181. align->ystart_pix_align = value[1];
  2182. align->width_pix_align = value[2];
  2183. align->height_pix_align = value[3];
  2184. align->min_width = value[4];
  2185. align->min_height = value[5];
  2186. }
  2187. pr_info("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2188. align->xstart_pix_align,
  2189. align->width_pix_align,
  2190. align->ystart_pix_align,
  2191. align->height_pix_align,
  2192. align->min_width,
  2193. align->min_height);
  2194. }
  2195. return rc;
  2196. }
  2197. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2198. struct dsi_parser_utils *utils)
  2199. {
  2200. struct msm_roi_caps *roi_caps = NULL;
  2201. const char *data;
  2202. int rc = 0;
  2203. if (!mode || !mode->priv_info) {
  2204. pr_err("invalid arguments\n");
  2205. return -EINVAL;
  2206. }
  2207. roi_caps = &mode->priv_info->roi_caps;
  2208. memset(roi_caps, 0, sizeof(*roi_caps));
  2209. data = utils->get_property(utils->data,
  2210. "qcom,partial-update-enabled", NULL);
  2211. if (data) {
  2212. if (!strcmp(data, "dual_roi"))
  2213. roi_caps->num_roi = 2;
  2214. else if (!strcmp(data, "single_roi"))
  2215. roi_caps->num_roi = 1;
  2216. else {
  2217. pr_info(
  2218. "invalid value for qcom,partial-update-enabled: %s\n",
  2219. data);
  2220. return 0;
  2221. }
  2222. } else {
  2223. pr_info("partial update disabled as the property is not set\n");
  2224. return 0;
  2225. }
  2226. roi_caps->merge_rois = utils->read_bool(utils->data,
  2227. "qcom,partial-update-roi-merge");
  2228. roi_caps->enabled = roi_caps->num_roi > 0;
  2229. pr_info("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2230. roi_caps->enabled);
  2231. if (roi_caps->enabled)
  2232. rc = dsi_panel_parse_roi_alignment(utils,
  2233. &roi_caps->align);
  2234. if (rc)
  2235. memset(roi_caps, 0, sizeof(*roi_caps));
  2236. return rc;
  2237. }
  2238. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2239. {
  2240. int dms_enabled;
  2241. const char *data;
  2242. struct dsi_parser_utils *utils = &panel->utils;
  2243. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2244. dms_enabled = utils->read_bool(utils->data,
  2245. "qcom,dynamic-mode-switch-enabled");
  2246. if (!dms_enabled)
  2247. return 0;
  2248. data = utils->get_property(utils->data,
  2249. "qcom,dynamic-mode-switch-type", NULL);
  2250. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2251. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2252. } else {
  2253. pr_err("[%s] unsupported dynamic switch mode: %s\n",
  2254. panel->name, data);
  2255. return -EINVAL;
  2256. }
  2257. return 0;
  2258. };
  2259. /*
  2260. * The length of all the valid values to be checked should not be greater
  2261. * than the length of returned data from read command.
  2262. */
  2263. static bool
  2264. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2265. {
  2266. int i;
  2267. struct drm_panel_esd_config *config = &panel->esd_config;
  2268. for (i = 0; i < count; ++i) {
  2269. if (config->status_valid_params[i] >
  2270. config->status_cmds_rlen[i]) {
  2271. pr_debug("ignore valid params\n");
  2272. return false;
  2273. }
  2274. }
  2275. return true;
  2276. }
  2277. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2278. char *prop_key, u32 **target, u32 cmd_cnt)
  2279. {
  2280. int tmp;
  2281. if (!utils->find_property(utils->data, prop_key, &tmp))
  2282. return false;
  2283. tmp /= sizeof(u32);
  2284. if (tmp != cmd_cnt) {
  2285. pr_err("request property(%d) do not match cmd count(%d)\n",
  2286. tmp, cmd_cnt);
  2287. return false;
  2288. }
  2289. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2290. if (IS_ERR_OR_NULL(*target)) {
  2291. pr_err("Error allocating memory for property\n");
  2292. return false;
  2293. }
  2294. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2295. pr_err("cannot get values from dts\n");
  2296. kfree(*target);
  2297. *target = NULL;
  2298. return false;
  2299. }
  2300. return true;
  2301. }
  2302. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2303. {
  2304. kfree(esd_config->status_buf);
  2305. kfree(esd_config->return_buf);
  2306. kfree(esd_config->status_value);
  2307. kfree(esd_config->status_valid_params);
  2308. kfree(esd_config->status_cmds_rlen);
  2309. kfree(esd_config->status_cmd.cmds);
  2310. }
  2311. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2312. {
  2313. struct drm_panel_esd_config *esd_config;
  2314. int rc = 0;
  2315. u32 tmp;
  2316. u32 i, status_len, *lenp;
  2317. struct property *data;
  2318. struct dsi_parser_utils *utils = &panel->utils;
  2319. if (!panel) {
  2320. pr_err("Invalid Params\n");
  2321. return -EINVAL;
  2322. }
  2323. esd_config = &panel->esd_config;
  2324. if (!esd_config)
  2325. return -EINVAL;
  2326. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2327. DSI_CMD_SET_PANEL_STATUS, utils);
  2328. if (!esd_config->status_cmd.count) {
  2329. pr_err("panel status command parsing failed\n");
  2330. rc = -EINVAL;
  2331. goto error;
  2332. }
  2333. if (!dsi_panel_parse_esd_status_len(utils,
  2334. "qcom,mdss-dsi-panel-status-read-length",
  2335. &panel->esd_config.status_cmds_rlen,
  2336. esd_config->status_cmd.count)) {
  2337. pr_err("Invalid status read length\n");
  2338. rc = -EINVAL;
  2339. goto error1;
  2340. }
  2341. if (dsi_panel_parse_esd_status_len(utils,
  2342. "qcom,mdss-dsi-panel-status-valid-params",
  2343. &panel->esd_config.status_valid_params,
  2344. esd_config->status_cmd.count)) {
  2345. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2346. esd_config->status_cmd.count)) {
  2347. rc = -EINVAL;
  2348. goto error2;
  2349. }
  2350. }
  2351. status_len = 0;
  2352. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2353. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2354. status_len += lenp[i];
  2355. if (!status_len) {
  2356. rc = -EINVAL;
  2357. goto error2;
  2358. }
  2359. /*
  2360. * Some panel may need multiple read commands to properly
  2361. * check panel status. Do a sanity check for proper status
  2362. * value which will be compared with the value read by dsi
  2363. * controller during ESD check. Also check if multiple read
  2364. * commands are there then, there should be corresponding
  2365. * status check values for each read command.
  2366. */
  2367. data = utils->find_property(utils->data,
  2368. "qcom,mdss-dsi-panel-status-value", &tmp);
  2369. tmp /= sizeof(u32);
  2370. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2371. esd_config->groups = tmp / status_len;
  2372. } else {
  2373. pr_err("error parse panel-status-value\n");
  2374. rc = -EINVAL;
  2375. goto error2;
  2376. }
  2377. esd_config->status_value =
  2378. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2379. GFP_KERNEL);
  2380. if (!esd_config->status_value) {
  2381. rc = -ENOMEM;
  2382. goto error2;
  2383. }
  2384. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2385. sizeof(unsigned char), GFP_KERNEL);
  2386. if (!esd_config->return_buf) {
  2387. rc = -ENOMEM;
  2388. goto error3;
  2389. }
  2390. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2391. if (!esd_config->status_buf) {
  2392. rc = -ENOMEM;
  2393. goto error4;
  2394. }
  2395. rc = utils->read_u32_array(utils->data,
  2396. "qcom,mdss-dsi-panel-status-value",
  2397. esd_config->status_value, esd_config->groups * status_len);
  2398. if (rc) {
  2399. pr_debug("error reading panel status values\n");
  2400. memset(esd_config->status_value, 0,
  2401. esd_config->groups * status_len);
  2402. }
  2403. return 0;
  2404. error4:
  2405. kfree(esd_config->return_buf);
  2406. error3:
  2407. kfree(esd_config->status_value);
  2408. error2:
  2409. kfree(esd_config->status_valid_params);
  2410. kfree(esd_config->status_cmds_rlen);
  2411. error1:
  2412. kfree(esd_config->status_cmd.cmds);
  2413. error:
  2414. return rc;
  2415. }
  2416. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2417. {
  2418. int rc = 0;
  2419. const char *string;
  2420. struct drm_panel_esd_config *esd_config;
  2421. struct dsi_parser_utils *utils = &panel->utils;
  2422. u8 *esd_mode = NULL;
  2423. esd_config = &panel->esd_config;
  2424. esd_config->status_mode = ESD_MODE_MAX;
  2425. esd_config->esd_enabled = utils->read_bool(utils->data,
  2426. "qcom,esd-check-enabled");
  2427. if (!esd_config->esd_enabled)
  2428. return 0;
  2429. rc = utils->read_string(utils->data,
  2430. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2431. if (!rc) {
  2432. if (!strcmp(string, "bta_check")) {
  2433. esd_config->status_mode = ESD_MODE_SW_BTA;
  2434. } else if (!strcmp(string, "reg_read")) {
  2435. esd_config->status_mode = ESD_MODE_REG_READ;
  2436. } else if (!strcmp(string, "te_signal_check")) {
  2437. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2438. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2439. } else {
  2440. pr_err("TE-ESD not valid for video mode\n");
  2441. rc = -EINVAL;
  2442. goto error;
  2443. }
  2444. } else {
  2445. pr_err("No valid panel-status-check-mode string\n");
  2446. rc = -EINVAL;
  2447. goto error;
  2448. }
  2449. } else {
  2450. pr_debug("status check method not defined!\n");
  2451. rc = -EINVAL;
  2452. goto error;
  2453. }
  2454. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2455. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2456. if (rc) {
  2457. pr_err("failed to parse esd reg read mode params, rc=%d\n",
  2458. rc);
  2459. goto error;
  2460. }
  2461. esd_mode = "register_read";
  2462. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2463. esd_mode = "bta_trigger";
  2464. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2465. esd_mode = "te_check";
  2466. }
  2467. pr_info("ESD enabled with mode: %s\n", esd_mode);
  2468. return 0;
  2469. error:
  2470. panel->esd_config.esd_enabled = false;
  2471. return rc;
  2472. }
  2473. static void dsi_panel_update_util(struct dsi_panel *panel,
  2474. struct device_node *parser_node)
  2475. {
  2476. struct dsi_parser_utils *utils = &panel->utils;
  2477. if (parser_node) {
  2478. *utils = *dsi_parser_get_parser_utils();
  2479. utils->data = parser_node;
  2480. pr_debug("switching to parser APIs\n");
  2481. goto end;
  2482. }
  2483. *utils = *dsi_parser_get_of_utils();
  2484. utils->data = panel->panel_of_node;
  2485. end:
  2486. utils->node = panel->panel_of_node;
  2487. }
  2488. struct dsi_panel *dsi_panel_get(struct device *parent,
  2489. struct device_node *of_node,
  2490. struct device_node *parser_node,
  2491. const char *type,
  2492. int topology_override)
  2493. {
  2494. struct dsi_panel *panel;
  2495. struct dsi_parser_utils *utils;
  2496. int rc = 0;
  2497. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2498. if (!panel)
  2499. return ERR_PTR(-ENOMEM);
  2500. panel->panel_of_node = of_node;
  2501. panel->parent = parent;
  2502. panel->type = type;
  2503. dsi_panel_update_util(panel, parser_node);
  2504. utils = &panel->utils;
  2505. panel->name = utils->get_property(utils->data,
  2506. "qcom,mdss-dsi-panel-name", NULL);
  2507. if (!panel->name)
  2508. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2509. rc = dsi_panel_parse_host_config(panel);
  2510. if (rc) {
  2511. pr_err("failed to parse host configuration, rc=%d\n", rc);
  2512. goto error;
  2513. }
  2514. rc = dsi_panel_parse_panel_mode(panel);
  2515. if (rc) {
  2516. pr_err("failed to parse panel mode configuration, rc=%d\n", rc);
  2517. goto error;
  2518. }
  2519. rc = dsi_panel_parse_dfps_caps(panel);
  2520. if (rc)
  2521. pr_err("failed to parse dfps configuration, rc=%d\n", rc);
  2522. if (!(panel->dfps_caps.dfps_support)) {
  2523. /* qsync and dfps are mutually exclusive features */
  2524. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2525. if (rc)
  2526. pr_err("failed to parse qsync features, rc=%d\n", rc);
  2527. }
  2528. rc = dsi_panel_parse_phy_props(panel);
  2529. if (rc) {
  2530. pr_err("failed to parse panel physical dimension, rc=%d\n", rc);
  2531. goto error;
  2532. }
  2533. rc = dsi_panel_parse_gpios(panel);
  2534. if (rc) {
  2535. pr_err("failed to parse panel gpios, rc=%d\n", rc);
  2536. goto error;
  2537. }
  2538. rc = dsi_panel_parse_power_cfg(panel);
  2539. if (rc)
  2540. pr_err("failed to parse power config, rc=%d\n", rc);
  2541. rc = dsi_panel_parse_bl_config(panel);
  2542. if (rc)
  2543. pr_err("failed to parse backlight config, rc=%d\n", rc);
  2544. rc = dsi_panel_parse_misc_features(panel);
  2545. if (rc)
  2546. pr_err("failed to parse misc features, rc=%d\n", rc);
  2547. rc = dsi_panel_parse_hdr_config(panel);
  2548. if (rc)
  2549. pr_err("failed to parse hdr config, rc=%d\n", rc);
  2550. rc = dsi_panel_get_mode_count(panel);
  2551. if (rc) {
  2552. pr_err("failed to get mode count, rc=%d\n", rc);
  2553. goto error;
  2554. }
  2555. rc = dsi_panel_parse_dms_info(panel);
  2556. if (rc)
  2557. pr_debug("failed to get dms info, rc=%d\n", rc);
  2558. rc = dsi_panel_parse_esd_config(panel);
  2559. if (rc)
  2560. pr_debug("failed to parse esd config, rc=%d\n", rc);
  2561. drm_panel_init(&panel->drm_panel);
  2562. mutex_init(&panel->panel_lock);
  2563. return panel;
  2564. error:
  2565. kfree(panel);
  2566. return ERR_PTR(rc);
  2567. }
  2568. void dsi_panel_put(struct dsi_panel *panel)
  2569. {
  2570. /* free resources allocated for ESD check */
  2571. dsi_panel_esd_config_deinit(&panel->esd_config);
  2572. kfree(panel);
  2573. }
  2574. int dsi_panel_drv_init(struct dsi_panel *panel,
  2575. struct mipi_dsi_host *host)
  2576. {
  2577. int rc = 0;
  2578. struct mipi_dsi_device *dev;
  2579. if (!panel || !host) {
  2580. pr_err("invalid params\n");
  2581. return -EINVAL;
  2582. }
  2583. mutex_lock(&panel->panel_lock);
  2584. dev = &panel->mipi_device;
  2585. dev->host = host;
  2586. /*
  2587. * We dont have device structure since panel is not a device node.
  2588. * When using drm panel framework, the device is probed when the host is
  2589. * create.
  2590. */
  2591. dev->channel = 0;
  2592. dev->lanes = 4;
  2593. panel->host = host;
  2594. rc = dsi_panel_vreg_get(panel);
  2595. if (rc) {
  2596. pr_err("[%s] failed to get panel regulators, rc=%d\n",
  2597. panel->name, rc);
  2598. goto exit;
  2599. }
  2600. rc = dsi_panel_pinctrl_init(panel);
  2601. if (rc) {
  2602. pr_err("[%s] failed to init pinctrl, rc=%d\n", panel->name, rc);
  2603. goto error_vreg_put;
  2604. }
  2605. rc = dsi_panel_gpio_request(panel);
  2606. if (rc) {
  2607. pr_err("[%s] failed to request gpios, rc=%d\n", panel->name,
  2608. rc);
  2609. goto error_pinctrl_deinit;
  2610. }
  2611. rc = dsi_panel_bl_register(panel);
  2612. if (rc) {
  2613. if (rc != -EPROBE_DEFER)
  2614. pr_err("[%s] failed to register backlight, rc=%d\n",
  2615. panel->name, rc);
  2616. goto error_gpio_release;
  2617. }
  2618. goto exit;
  2619. error_gpio_release:
  2620. (void)dsi_panel_gpio_release(panel);
  2621. error_pinctrl_deinit:
  2622. (void)dsi_panel_pinctrl_deinit(panel);
  2623. error_vreg_put:
  2624. (void)dsi_panel_vreg_put(panel);
  2625. exit:
  2626. mutex_unlock(&panel->panel_lock);
  2627. return rc;
  2628. }
  2629. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2630. {
  2631. int rc = 0;
  2632. if (!panel) {
  2633. pr_err("invalid params\n");
  2634. return -EINVAL;
  2635. }
  2636. mutex_lock(&panel->panel_lock);
  2637. rc = dsi_panel_bl_unregister(panel);
  2638. if (rc)
  2639. pr_err("[%s] failed to unregister backlight, rc=%d\n",
  2640. panel->name, rc);
  2641. rc = dsi_panel_gpio_release(panel);
  2642. if (rc)
  2643. pr_err("[%s] failed to release gpios, rc=%d\n", panel->name,
  2644. rc);
  2645. rc = dsi_panel_pinctrl_deinit(panel);
  2646. if (rc)
  2647. pr_err("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2648. rc);
  2649. rc = dsi_panel_vreg_put(panel);
  2650. if (rc)
  2651. pr_err("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2652. panel->host = NULL;
  2653. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2654. mutex_unlock(&panel->panel_lock);
  2655. return rc;
  2656. }
  2657. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2658. struct dsi_display_mode *mode)
  2659. {
  2660. return 0;
  2661. }
  2662. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2663. {
  2664. const u32 SINGLE_MODE_SUPPORT = 1;
  2665. struct dsi_parser_utils *utils;
  2666. struct device_node *timings_np;
  2667. int count, rc = 0;
  2668. if (!panel) {
  2669. pr_err("invalid params\n");
  2670. return -EINVAL;
  2671. }
  2672. utils = &panel->utils;
  2673. panel->num_timing_nodes = 0;
  2674. timings_np = utils->get_child_by_name(utils->data,
  2675. "qcom,mdss-dsi-display-timings");
  2676. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2677. pr_err("no display timing nodes defined\n");
  2678. rc = -EINVAL;
  2679. goto error;
  2680. }
  2681. count = utils->get_child_count(timings_np);
  2682. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2683. count > DSI_MODE_MAX) {
  2684. pr_err("invalid count of timing nodes: %d\n", count);
  2685. rc = -EINVAL;
  2686. goto error;
  2687. }
  2688. /* No multiresolution support is available for video mode panels */
  2689. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2690. !panel->host_config.ext_bridge_mode)
  2691. count = SINGLE_MODE_SUPPORT;
  2692. panel->num_timing_nodes = count;
  2693. error:
  2694. return rc;
  2695. }
  2696. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2697. struct dsi_panel_phy_props *phy_props)
  2698. {
  2699. int rc = 0;
  2700. if (!panel || !phy_props) {
  2701. pr_err("invalid params\n");
  2702. return -EINVAL;
  2703. }
  2704. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2705. return rc;
  2706. }
  2707. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2708. struct dsi_dfps_capabilities *dfps_caps)
  2709. {
  2710. int rc = 0;
  2711. if (!panel || !dfps_caps) {
  2712. pr_err("invalid params\n");
  2713. return -EINVAL;
  2714. }
  2715. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2716. return rc;
  2717. }
  2718. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2719. {
  2720. int i;
  2721. if (!mode->priv_info)
  2722. return;
  2723. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2724. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2725. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2726. }
  2727. kfree(mode->priv_info);
  2728. }
  2729. int dsi_panel_get_mode(struct dsi_panel *panel,
  2730. u32 index, struct dsi_display_mode *mode,
  2731. int topology_override)
  2732. {
  2733. struct device_node *timings_np, *child_np;
  2734. struct dsi_parser_utils *utils;
  2735. struct dsi_display_mode_priv_info *prv_info;
  2736. u32 child_idx = 0;
  2737. int rc = 0, num_timings;
  2738. void *utils_data = NULL;
  2739. if (!panel || !mode) {
  2740. pr_err("invalid params\n");
  2741. return -EINVAL;
  2742. }
  2743. mutex_lock(&panel->panel_lock);
  2744. utils = &panel->utils;
  2745. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  2746. if (!mode->priv_info) {
  2747. rc = -ENOMEM;
  2748. goto done;
  2749. }
  2750. prv_info = mode->priv_info;
  2751. timings_np = utils->get_child_by_name(utils->data,
  2752. "qcom,mdss-dsi-display-timings");
  2753. if (!timings_np) {
  2754. pr_err("no display timing nodes defined\n");
  2755. rc = -EINVAL;
  2756. goto parse_fail;
  2757. }
  2758. num_timings = utils->get_child_count(timings_np);
  2759. if (!num_timings || num_timings > DSI_MODE_MAX) {
  2760. pr_err("invalid count of timing nodes: %d\n", num_timings);
  2761. rc = -EINVAL;
  2762. goto parse_fail;
  2763. }
  2764. utils_data = utils->data;
  2765. dsi_for_each_child_node(timings_np, child_np) {
  2766. if (index != child_idx++)
  2767. continue;
  2768. utils->data = child_np;
  2769. rc = dsi_panel_parse_timing(&mode->timing, utils);
  2770. if (rc) {
  2771. pr_err("failed to parse panel timing, rc=%d\n", rc);
  2772. goto parse_fail;
  2773. }
  2774. rc = dsi_panel_parse_dsc_params(mode, utils);
  2775. if (rc) {
  2776. pr_err("failed to parse dsc params, rc=%d\n", rc);
  2777. goto parse_fail;
  2778. }
  2779. rc = dsi_panel_parse_topology(prv_info, utils,
  2780. topology_override);
  2781. if (rc) {
  2782. pr_err("failed to parse panel topology, rc=%d\n", rc);
  2783. goto parse_fail;
  2784. }
  2785. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  2786. if (rc) {
  2787. pr_err("failed to parse command sets, rc=%d\n", rc);
  2788. goto parse_fail;
  2789. }
  2790. rc = dsi_panel_parse_jitter_config(mode, utils);
  2791. if (rc)
  2792. pr_err(
  2793. "failed to parse panel jitter config, rc=%d\n", rc);
  2794. rc = dsi_panel_parse_phy_timing(mode, utils);
  2795. if (rc) {
  2796. pr_err(
  2797. "failed to parse panel phy timings, rc=%d\n", rc);
  2798. goto parse_fail;
  2799. }
  2800. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  2801. if (rc)
  2802. pr_err("failed to partial update caps, rc=%d\n", rc);
  2803. }
  2804. goto done;
  2805. parse_fail:
  2806. kfree(mode->priv_info);
  2807. mode->priv_info = NULL;
  2808. done:
  2809. utils->data = utils_data;
  2810. mutex_unlock(&panel->panel_lock);
  2811. return rc;
  2812. }
  2813. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  2814. struct dsi_display_mode *mode,
  2815. struct dsi_host_config *config)
  2816. {
  2817. int rc = 0;
  2818. if (!panel || !mode || !config) {
  2819. pr_err("invalid params\n");
  2820. return -EINVAL;
  2821. }
  2822. mutex_lock(&panel->panel_lock);
  2823. config->panel_mode = panel->panel_mode;
  2824. memcpy(&config->common_config, &panel->host_config,
  2825. sizeof(config->common_config));
  2826. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  2827. memcpy(&config->u.video_engine, &panel->video_config,
  2828. sizeof(config->u.video_engine));
  2829. } else {
  2830. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  2831. sizeof(config->u.cmd_engine));
  2832. }
  2833. memcpy(&config->video_timing, &mode->timing,
  2834. sizeof(config->video_timing));
  2835. config->video_timing.mdp_transfer_time_us =
  2836. mode->priv_info->mdp_transfer_time_us;
  2837. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  2838. config->video_timing.dsc = &mode->priv_info->dsc;
  2839. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  2840. config->esc_clk_rate_hz = 19200000;
  2841. mutex_unlock(&panel->panel_lock);
  2842. return rc;
  2843. }
  2844. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  2845. {
  2846. int rc = 0;
  2847. if (!panel) {
  2848. pr_err("invalid params\n");
  2849. return -EINVAL;
  2850. }
  2851. mutex_lock(&panel->panel_lock);
  2852. /* If LP11_INIT is set, panel will be powered up during prepare() */
  2853. if (panel->lp11_init)
  2854. goto error;
  2855. rc = dsi_panel_power_on(panel);
  2856. if (rc) {
  2857. pr_err("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  2858. goto error;
  2859. }
  2860. error:
  2861. mutex_unlock(&panel->panel_lock);
  2862. return rc;
  2863. }
  2864. int dsi_panel_update_pps(struct dsi_panel *panel)
  2865. {
  2866. int rc = 0;
  2867. struct dsi_panel_cmd_set *set = NULL;
  2868. struct dsi_display_mode_priv_info *priv_info = NULL;
  2869. if (!panel || !panel->cur_mode) {
  2870. pr_err("invalid params\n");
  2871. return -EINVAL;
  2872. }
  2873. mutex_lock(&panel->panel_lock);
  2874. priv_info = panel->cur_mode->priv_info;
  2875. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  2876. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc, panel->dsc_pps_cmd, 0);
  2877. rc = dsi_panel_create_cmd_packets(panel->dsc_pps_cmd,
  2878. DSI_CMD_PPS_SIZE, 1, set->cmds);
  2879. if (rc) {
  2880. pr_err("failed to create cmd packets, rc=%d\n", rc);
  2881. goto error;
  2882. }
  2883. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  2884. if (rc) {
  2885. pr_err("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  2886. panel->name, rc);
  2887. }
  2888. dsi_panel_destroy_cmd_packets(set);
  2889. error:
  2890. mutex_unlock(&panel->panel_lock);
  2891. return rc;
  2892. }
  2893. int dsi_panel_set_lp1(struct dsi_panel *panel)
  2894. {
  2895. int rc = 0;
  2896. if (!panel) {
  2897. pr_err("invalid params\n");
  2898. return -EINVAL;
  2899. }
  2900. mutex_lock(&panel->panel_lock);
  2901. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  2902. if (rc)
  2903. pr_err("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  2904. panel->name, rc);
  2905. mutex_unlock(&panel->panel_lock);
  2906. return rc;
  2907. }
  2908. int dsi_panel_set_lp2(struct dsi_panel *panel)
  2909. {
  2910. int rc = 0;
  2911. if (!panel) {
  2912. pr_err("invalid params\n");
  2913. return -EINVAL;
  2914. }
  2915. mutex_lock(&panel->panel_lock);
  2916. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  2917. if (rc)
  2918. pr_err("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  2919. panel->name, rc);
  2920. mutex_unlock(&panel->panel_lock);
  2921. return rc;
  2922. }
  2923. int dsi_panel_set_nolp(struct dsi_panel *panel)
  2924. {
  2925. int rc = 0;
  2926. if (!panel) {
  2927. pr_err("invalid params\n");
  2928. return -EINVAL;
  2929. }
  2930. mutex_lock(&panel->panel_lock);
  2931. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  2932. if (rc)
  2933. pr_err("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  2934. panel->name, rc);
  2935. mutex_unlock(&panel->panel_lock);
  2936. return rc;
  2937. }
  2938. int dsi_panel_prepare(struct dsi_panel *panel)
  2939. {
  2940. int rc = 0;
  2941. if (!panel) {
  2942. pr_err("invalid params\n");
  2943. return -EINVAL;
  2944. }
  2945. mutex_lock(&panel->panel_lock);
  2946. if (panel->lp11_init) {
  2947. rc = dsi_panel_power_on(panel);
  2948. if (rc) {
  2949. pr_err("[%s] panel power on failed, rc=%d\n",
  2950. panel->name, rc);
  2951. goto error;
  2952. }
  2953. }
  2954. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  2955. if (rc) {
  2956. pr_err("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  2957. panel->name, rc);
  2958. goto error;
  2959. }
  2960. error:
  2961. mutex_unlock(&panel->panel_lock);
  2962. return rc;
  2963. }
  2964. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  2965. struct dsi_rect *roi, int ctrl_idx, int unicast)
  2966. {
  2967. static const int ROI_CMD_LEN = 5;
  2968. int rc = 0;
  2969. /* DTYPE_DCS_LWRITE */
  2970. static char *caset, *paset;
  2971. set->cmds = NULL;
  2972. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  2973. if (!caset) {
  2974. rc = -ENOMEM;
  2975. goto exit;
  2976. }
  2977. caset[0] = 0x2a;
  2978. caset[1] = (roi->x & 0xFF00) >> 8;
  2979. caset[2] = roi->x & 0xFF;
  2980. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  2981. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  2982. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  2983. if (!paset) {
  2984. rc = -ENOMEM;
  2985. goto error_free_mem;
  2986. }
  2987. paset[0] = 0x2b;
  2988. paset[1] = (roi->y & 0xFF00) >> 8;
  2989. paset[2] = roi->y & 0xFF;
  2990. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  2991. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  2992. set->type = DSI_CMD_SET_ROI;
  2993. set->state = DSI_CMD_SET_STATE_LP;
  2994. set->count = 2; /* send caset + paset together */
  2995. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  2996. if (!set->cmds) {
  2997. rc = -ENOMEM;
  2998. goto error_free_mem;
  2999. }
  3000. set->cmds[0].msg.channel = 0;
  3001. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3002. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3003. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3004. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3005. set->cmds[0].msg.tx_buf = caset;
  3006. set->cmds[0].msg.rx_len = 0;
  3007. set->cmds[0].msg.rx_buf = 0;
  3008. set->cmds[0].msg.wait_ms = 0;
  3009. set->cmds[0].last_command = 0;
  3010. set->cmds[0].post_wait_ms = 0;
  3011. set->cmds[1].msg.channel = 0;
  3012. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3013. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3014. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3015. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3016. set->cmds[1].msg.tx_buf = paset;
  3017. set->cmds[1].msg.rx_len = 0;
  3018. set->cmds[1].msg.rx_buf = 0;
  3019. set->cmds[1].msg.wait_ms = 0;
  3020. set->cmds[1].last_command = 1;
  3021. set->cmds[1].post_wait_ms = 0;
  3022. goto exit;
  3023. error_free_mem:
  3024. kfree(caset);
  3025. kfree(paset);
  3026. kfree(set->cmds);
  3027. exit:
  3028. return rc;
  3029. }
  3030. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3031. int ctrl_idx)
  3032. {
  3033. int rc = 0;
  3034. if (!panel) {
  3035. pr_err("invalid params\n");
  3036. return -EINVAL;
  3037. }
  3038. mutex_lock(&panel->panel_lock);
  3039. pr_debug("ctrl:%d qsync on\n", ctrl_idx);
  3040. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3041. if (rc)
  3042. pr_err("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3043. panel->name, rc);
  3044. mutex_unlock(&panel->panel_lock);
  3045. return rc;
  3046. }
  3047. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3048. int ctrl_idx)
  3049. {
  3050. int rc = 0;
  3051. if (!panel) {
  3052. pr_err("invalid params\n");
  3053. return -EINVAL;
  3054. }
  3055. mutex_lock(&panel->panel_lock);
  3056. pr_debug("ctrl:%d qsync off\n", ctrl_idx);
  3057. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3058. if (rc)
  3059. pr_err("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3060. panel->name, rc);
  3061. mutex_unlock(&panel->panel_lock);
  3062. return rc;
  3063. }
  3064. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3065. struct dsi_rect *roi)
  3066. {
  3067. int rc = 0;
  3068. struct dsi_panel_cmd_set *set;
  3069. struct dsi_display_mode_priv_info *priv_info;
  3070. if (!panel || !panel->cur_mode) {
  3071. pr_err("Invalid params\n");
  3072. return -EINVAL;
  3073. }
  3074. priv_info = panel->cur_mode->priv_info;
  3075. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3076. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3077. if (rc) {
  3078. pr_err("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3079. panel->name, rc);
  3080. return rc;
  3081. }
  3082. pr_debug("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3083. roi->x, roi->y, roi->w, roi->h);
  3084. mutex_lock(&panel->panel_lock);
  3085. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3086. if (rc)
  3087. pr_err("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3088. panel->name, rc);
  3089. mutex_unlock(&panel->panel_lock);
  3090. dsi_panel_destroy_cmd_packets(set);
  3091. return rc;
  3092. }
  3093. int dsi_panel_switch(struct dsi_panel *panel)
  3094. {
  3095. int rc = 0;
  3096. if (!panel) {
  3097. pr_err("Invalid params\n");
  3098. return -EINVAL;
  3099. }
  3100. mutex_lock(&panel->panel_lock);
  3101. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3102. if (rc)
  3103. pr_err("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3104. panel->name, rc);
  3105. mutex_unlock(&panel->panel_lock);
  3106. return rc;
  3107. }
  3108. int dsi_panel_post_switch(struct dsi_panel *panel)
  3109. {
  3110. int rc = 0;
  3111. if (!panel) {
  3112. pr_err("Invalid params\n");
  3113. return -EINVAL;
  3114. }
  3115. mutex_lock(&panel->panel_lock);
  3116. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3117. if (rc)
  3118. pr_err("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3119. panel->name, rc);
  3120. mutex_unlock(&panel->panel_lock);
  3121. return rc;
  3122. }
  3123. int dsi_panel_enable(struct dsi_panel *panel)
  3124. {
  3125. int rc = 0;
  3126. if (!panel) {
  3127. pr_err("Invalid params\n");
  3128. return -EINVAL;
  3129. }
  3130. mutex_lock(&panel->panel_lock);
  3131. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3132. if (rc) {
  3133. pr_err("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3134. panel->name, rc);
  3135. }
  3136. panel->panel_initialized = true;
  3137. mutex_unlock(&panel->panel_lock);
  3138. return rc;
  3139. }
  3140. int dsi_panel_post_enable(struct dsi_panel *panel)
  3141. {
  3142. int rc = 0;
  3143. if (!panel) {
  3144. pr_err("invalid params\n");
  3145. return -EINVAL;
  3146. }
  3147. mutex_lock(&panel->panel_lock);
  3148. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3149. if (rc) {
  3150. pr_err("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3151. panel->name, rc);
  3152. goto error;
  3153. }
  3154. error:
  3155. mutex_unlock(&panel->panel_lock);
  3156. return rc;
  3157. }
  3158. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3159. {
  3160. int rc = 0;
  3161. if (!panel) {
  3162. pr_err("invalid params\n");
  3163. return -EINVAL;
  3164. }
  3165. mutex_lock(&panel->panel_lock);
  3166. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3167. if (rc) {
  3168. pr_err("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3169. panel->name, rc);
  3170. goto error;
  3171. }
  3172. error:
  3173. mutex_unlock(&panel->panel_lock);
  3174. return rc;
  3175. }
  3176. int dsi_panel_disable(struct dsi_panel *panel)
  3177. {
  3178. int rc = 0;
  3179. if (!panel) {
  3180. pr_err("invalid params\n");
  3181. return -EINVAL;
  3182. }
  3183. mutex_lock(&panel->panel_lock);
  3184. /* Avoid sending panel off commands when ESD recovery is underway */
  3185. if (!atomic_read(&panel->esd_recovery_pending)) {
  3186. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3187. if (rc) {
  3188. /*
  3189. * Sending panel off commands may fail when DSI
  3190. * controller is in a bad state. These failures can be
  3191. * ignored since controller will go for full reset on
  3192. * subsequent display enable anyway.
  3193. */
  3194. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3195. panel->name, rc);
  3196. rc = 0;
  3197. }
  3198. }
  3199. panel->panel_initialized = false;
  3200. mutex_unlock(&panel->panel_lock);
  3201. return rc;
  3202. }
  3203. int dsi_panel_unprepare(struct dsi_panel *panel)
  3204. {
  3205. int rc = 0;
  3206. if (!panel) {
  3207. pr_err("invalid params\n");
  3208. return -EINVAL;
  3209. }
  3210. mutex_lock(&panel->panel_lock);
  3211. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3212. if (rc) {
  3213. pr_err("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3214. panel->name, rc);
  3215. goto error;
  3216. }
  3217. error:
  3218. mutex_unlock(&panel->panel_lock);
  3219. return rc;
  3220. }
  3221. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3222. {
  3223. int rc = 0;
  3224. if (!panel) {
  3225. pr_err("invalid params\n");
  3226. return -EINVAL;
  3227. }
  3228. mutex_lock(&panel->panel_lock);
  3229. rc = dsi_panel_power_off(panel);
  3230. if (rc) {
  3231. pr_err("[%s] panel power_Off failed, rc=%d\n",
  3232. panel->name, rc);
  3233. goto error;
  3234. }
  3235. error:
  3236. mutex_unlock(&panel->panel_lock);
  3237. return rc;
  3238. }