hal_be_generic_api.h 42 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _HAL_BE_GENERIC_API_H_
  20. #define _HAL_BE_GENERIC_API_H_
  21. #include <hal_be_hw_headers.h>
  22. #include "hal_be_tx.h"
  23. #include "hal_be_reo.h"
  24. #include <hal_api_mon.h>
  25. #include <hal_generic_api.h>
  26. #include <hal_be_api_mon.h>
  27. /**
  28. * Debug macro to print the TLV header tag
  29. */
  30. #define SHOW_DEFINED(x) do {} while (0)
  31. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(CONFIG_SAWF)
  32. static inline void
  33. hal_tx_comp_get_buffer_timestamp_be(void *desc,
  34. struct hal_tx_completion_status *ts)
  35. {
  36. ts->buffer_timestamp = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  37. BUFFER_TIMESTAMP);
  38. }
  39. #else /* !WLAN_FEATURE_TSF_UPLINK_DELAY || CONFIG_SAWF */
  40. static inline void
  41. hal_tx_comp_get_buffer_timestamp_be(void *desc,
  42. struct hal_tx_completion_status *ts)
  43. {
  44. }
  45. #endif /* WLAN_FEATURE_TSF_UPLINK_DELAY || CONFIG_SAWF */
  46. /**
  47. * hal_tx_comp_get_status() - TQM Release reason
  48. * @hal_desc: completion ring Tx status
  49. *
  50. * This function will parse the WBM completion descriptor and populate in
  51. * HAL structure
  52. *
  53. * Return: none
  54. */
  55. static inline void
  56. hal_tx_comp_get_status_generic_be(void *desc, void *ts1,
  57. struct hal_soc *hal)
  58. {
  59. uint8_t rate_stats_valid = 0;
  60. uint32_t rate_stats = 0;
  61. struct hal_tx_completion_status *ts =
  62. (struct hal_tx_completion_status *)ts1;
  63. ts->ppdu_id = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  64. TQM_STATUS_NUMBER);
  65. ts->ack_frame_rssi = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  66. ACK_FRAME_RSSI);
  67. ts->first_msdu = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  68. FIRST_MSDU);
  69. ts->last_msdu = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  70. LAST_MSDU);
  71. #if 0
  72. // TODO - This has to be calculated form first and last msdu
  73. ts->msdu_part_of_amsdu = HAL_TX_DESC_GET(desc,
  74. WBM2SW_COMPLETION_RING_TX,
  75. MSDU_PART_OF_AMSDU);
  76. #endif
  77. ts->peer_id = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  78. SW_PEER_ID);
  79. ts->tid = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX, TID);
  80. ts->transmit_cnt = HAL_TX_DESC_GET(desc, WBM2SW_COMPLETION_RING_TX,
  81. TRANSMIT_COUNT);
  82. rate_stats = HAL_TX_DESC_GET(desc, HAL_TX_COMP, TX_RATE_STATS);
  83. rate_stats_valid = HAL_TX_MS(TX_RATE_STATS_INFO,
  84. TX_RATE_STATS_INFO_VALID, rate_stats);
  85. ts->valid = rate_stats_valid;
  86. if (rate_stats_valid) {
  87. ts->bw = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_BW,
  88. rate_stats);
  89. ts->pkt_type = HAL_TX_MS(TX_RATE_STATS_INFO,
  90. TRANSMIT_PKT_TYPE, rate_stats);
  91. ts->stbc = HAL_TX_MS(TX_RATE_STATS_INFO,
  92. TRANSMIT_STBC, rate_stats);
  93. ts->ldpc = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_LDPC,
  94. rate_stats);
  95. ts->sgi = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_SGI,
  96. rate_stats);
  97. ts->mcs = HAL_TX_MS(TX_RATE_STATS_INFO, TRANSMIT_MCS,
  98. rate_stats);
  99. ts->ofdma = HAL_TX_MS(TX_RATE_STATS_INFO, OFDMA_TRANSMISSION,
  100. rate_stats);
  101. ts->tones_in_ru = HAL_TX_MS(TX_RATE_STATS_INFO, TONES_IN_RU,
  102. rate_stats);
  103. }
  104. ts->release_src = hal_tx_comp_get_buffer_source_generic_be(desc);
  105. ts->status = hal_tx_comp_get_release_reason(
  106. desc,
  107. hal_soc_to_hal_soc_handle(hal));
  108. ts->tsf = HAL_TX_DESC_GET(desc, UNIFIED_WBM_RELEASE_RING_6,
  109. TX_RATE_STATS_INFO_TX_RATE_STATS);
  110. hal_tx_comp_get_buffer_timestamp_be(desc, ts);
  111. }
  112. /**
  113. * hal_tx_set_pcp_tid_map_generic_be() - Configure default PCP to TID map table
  114. * @soc: HAL SoC context
  115. * @map: PCP-TID mapping table
  116. *
  117. * PCP are mapped to 8 TID values using TID values programmed
  118. * in one set of mapping registers PCP_TID_MAP_<0 to 6>
  119. * The mapping register has TID mapping for 8 PCP values
  120. *
  121. * Return: none
  122. */
  123. static void hal_tx_set_pcp_tid_map_generic_be(struct hal_soc *soc, uint8_t *map)
  124. {
  125. uint32_t addr, value;
  126. addr = HWIO_TCL_R0_PCP_TID_MAP_ADDR(
  127. MAC_TCL_REG_REG_BASE);
  128. value = (map[0] |
  129. (map[1] << HWIO_TCL_R0_PCP_TID_MAP_PCP_1_SHFT) |
  130. (map[2] << HWIO_TCL_R0_PCP_TID_MAP_PCP_2_SHFT) |
  131. (map[3] << HWIO_TCL_R0_PCP_TID_MAP_PCP_3_SHFT) |
  132. (map[4] << HWIO_TCL_R0_PCP_TID_MAP_PCP_4_SHFT) |
  133. (map[5] << HWIO_TCL_R0_PCP_TID_MAP_PCP_5_SHFT) |
  134. (map[6] << HWIO_TCL_R0_PCP_TID_MAP_PCP_6_SHFT) |
  135. (map[7] << HWIO_TCL_R0_PCP_TID_MAP_PCP_7_SHFT));
  136. HAL_REG_WRITE(soc, addr, (value & HWIO_TCL_R0_PCP_TID_MAP_RMSK));
  137. }
  138. /**
  139. * hal_tx_update_pcp_tid_generic_be() - Update the pcp tid map table with
  140. * value received from user-space
  141. * @soc: HAL SoC context
  142. * @pcp: pcp value
  143. * @tid : tid value
  144. *
  145. * Return: void
  146. */
  147. static void
  148. hal_tx_update_pcp_tid_generic_be(struct hal_soc *soc,
  149. uint8_t pcp, uint8_t tid)
  150. {
  151. uint32_t addr, value, regval;
  152. addr = HWIO_TCL_R0_PCP_TID_MAP_ADDR(
  153. MAC_TCL_REG_REG_BASE);
  154. value = (uint32_t)tid << (HAL_TX_BITS_PER_TID * pcp);
  155. /* Read back previous PCP TID config and update
  156. * with new config.
  157. */
  158. regval = HAL_REG_READ(soc, addr);
  159. regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * pcp));
  160. regval |= value;
  161. HAL_REG_WRITE(soc, addr,
  162. (regval & HWIO_TCL_R0_PCP_TID_MAP_RMSK));
  163. }
  164. /**
  165. * hal_tx_update_tidmap_prty_generic_be() - Update the tid map priority
  166. * @soc: HAL SoC context
  167. * @val: priority value
  168. *
  169. * Return: void
  170. */
  171. static
  172. void hal_tx_update_tidmap_prty_generic_be(struct hal_soc *soc, uint8_t value)
  173. {
  174. uint32_t addr;
  175. addr = HWIO_TCL_R0_TID_MAP_PRTY_ADDR(
  176. MAC_TCL_REG_REG_BASE);
  177. HAL_REG_WRITE(soc, addr,
  178. (value & HWIO_TCL_R0_TID_MAP_PRTY_RMSK));
  179. }
  180. /**
  181. * hal_rx_get_tlv_size_generic_be() - Get rx packet tlv size
  182. * @rx_pkt_tlv_size: TLV size for regular RX packets
  183. * @rx_mon_pkt_tlv_size: TLV size for monitor mode packets
  184. *
  185. * Return: size of rx pkt tlv before the actual data
  186. */
  187. static void hal_rx_get_tlv_size_generic_be(uint16_t *rx_pkt_tlv_size,
  188. uint16_t *rx_mon_pkt_tlv_size)
  189. {
  190. *rx_pkt_tlv_size = RX_PKT_TLVS_LEN;
  191. /* For now mon pkt tlv is same as rx pkt tlv */
  192. *rx_mon_pkt_tlv_size = RX_PKT_TLVS_LEN;
  193. }
  194. /**
  195. * hal_rx_flow_get_tuple_info_be() - Setup a flow search entry in HW FST
  196. * @fst: Pointer to the Rx Flow Search Table
  197. * @hal_hash: HAL 5 tuple hash
  198. * @tuple_info: 5-tuple info of the flow returned to the caller
  199. *
  200. * Return: Success/Failure
  201. */
  202. static void *
  203. hal_rx_flow_get_tuple_info_be(uint8_t *rx_fst, uint32_t hal_hash,
  204. uint8_t *flow_tuple_info)
  205. {
  206. struct hal_rx_fst *fst = (struct hal_rx_fst *)rx_fst;
  207. void *hal_fse = NULL;
  208. struct hal_flow_tuple_info *tuple_info
  209. = (struct hal_flow_tuple_info *)flow_tuple_info;
  210. hal_fse = (uint8_t *)fst->base_vaddr +
  211. (hal_hash * HAL_RX_FST_ENTRY_SIZE);
  212. if (!hal_fse || !tuple_info)
  213. return NULL;
  214. if (!HAL_GET_FLD(hal_fse, RX_FLOW_SEARCH_ENTRY, VALID))
  215. return NULL;
  216. tuple_info->src_ip_127_96 =
  217. qdf_ntohl(HAL_GET_FLD(hal_fse,
  218. RX_FLOW_SEARCH_ENTRY,
  219. SRC_IP_127_96));
  220. tuple_info->src_ip_95_64 =
  221. qdf_ntohl(HAL_GET_FLD(hal_fse,
  222. RX_FLOW_SEARCH_ENTRY,
  223. SRC_IP_95_64));
  224. tuple_info->src_ip_63_32 =
  225. qdf_ntohl(HAL_GET_FLD(hal_fse,
  226. RX_FLOW_SEARCH_ENTRY,
  227. SRC_IP_63_32));
  228. tuple_info->src_ip_31_0 =
  229. qdf_ntohl(HAL_GET_FLD(hal_fse,
  230. RX_FLOW_SEARCH_ENTRY,
  231. SRC_IP_31_0));
  232. tuple_info->dest_ip_127_96 =
  233. qdf_ntohl(HAL_GET_FLD(hal_fse,
  234. RX_FLOW_SEARCH_ENTRY,
  235. DEST_IP_127_96));
  236. tuple_info->dest_ip_95_64 =
  237. qdf_ntohl(HAL_GET_FLD(hal_fse,
  238. RX_FLOW_SEARCH_ENTRY,
  239. DEST_IP_95_64));
  240. tuple_info->dest_ip_63_32 =
  241. qdf_ntohl(HAL_GET_FLD(hal_fse,
  242. RX_FLOW_SEARCH_ENTRY,
  243. DEST_IP_63_32));
  244. tuple_info->dest_ip_31_0 =
  245. qdf_ntohl(HAL_GET_FLD(hal_fse,
  246. RX_FLOW_SEARCH_ENTRY,
  247. DEST_IP_31_0));
  248. tuple_info->dest_port = HAL_GET_FLD(hal_fse,
  249. RX_FLOW_SEARCH_ENTRY,
  250. DEST_PORT);
  251. tuple_info->src_port = HAL_GET_FLD(hal_fse,
  252. RX_FLOW_SEARCH_ENTRY,
  253. SRC_PORT);
  254. tuple_info->l4_protocol = HAL_GET_FLD(hal_fse,
  255. RX_FLOW_SEARCH_ENTRY,
  256. L4_PROTOCOL);
  257. return hal_fse;
  258. }
  259. /**
  260. * hal_rx_flow_delete_entry_be() - Setup a flow search entry in HW FST
  261. * @fst: Pointer to the Rx Flow Search Table
  262. * @hal_rx_fse: Pointer to the Rx Flow that is to be deleted from the FST
  263. *
  264. * Return: Success/Failure
  265. */
  266. static QDF_STATUS
  267. hal_rx_flow_delete_entry_be(uint8_t *rx_fst, void *hal_rx_fse)
  268. {
  269. uint8_t *fse = (uint8_t *)hal_rx_fse;
  270. if (!HAL_GET_FLD(fse, RX_FLOW_SEARCH_ENTRY, VALID))
  271. return QDF_STATUS_E_NOENT;
  272. HAL_CLR_FLD(fse, RX_FLOW_SEARCH_ENTRY, VALID);
  273. return QDF_STATUS_SUCCESS;
  274. }
  275. /**
  276. * hal_rx_fst_get_fse_size_be() - Retrieve the size of each entry in Rx FST
  277. *
  278. * Return: size of each entry/flow in Rx FST
  279. */
  280. static inline uint32_t
  281. hal_rx_fst_get_fse_size_be(void)
  282. {
  283. return HAL_RX_FST_ENTRY_SIZE;
  284. }
  285. /*
  286. * TX MONITOR
  287. */
  288. #ifdef QCA_MONITOR_2_0_SUPPORT
  289. /**
  290. * hal_txmon_get_buffer_addr_generic_be() - api to get buffer address
  291. * @tx_tlv: pointer to TLV header
  292. * @status: hal mon buffer address status
  293. *
  294. * Return: Address to qdf_frag_t
  295. */
  296. static inline qdf_frag_t
  297. hal_txmon_get_buffer_addr_generic_be(void *tx_tlv,
  298. struct hal_mon_buf_addr_status *status)
  299. {
  300. struct mon_buffer_addr *hal_buffer_addr =
  301. (struct mon_buffer_addr *)((uint8_t *)tx_tlv +
  302. HAL_RX_TLV64_HDR_SIZE);
  303. qdf_frag_t buf_addr = NULL;
  304. buf_addr = (qdf_frag_t)(uintptr_t)((hal_buffer_addr->buffer_virt_addr_31_0 |
  305. ((unsigned long long)hal_buffer_addr->buffer_virt_addr_63_32 <<
  306. 32)));
  307. /* qdf_frag_t is derived from buffer address tlv */
  308. if (qdf_unlikely(status)) {
  309. qdf_mem_copy(status,
  310. (uint8_t *)tx_tlv + HAL_RX_TLV64_HDR_SIZE,
  311. sizeof(struct hal_mon_buf_addr_status));
  312. /* update hal_mon_buf_addr_status */
  313. }
  314. return buf_addr;
  315. }
  316. #if defined(TX_MONITOR_WORD_MASK)
  317. /**
  318. * hal_txmon_get_num_users() - get num users from tx_fes_setup tlv
  319. *
  320. * @tx_tlv: pointer to tx_fes_setup tlv header
  321. *
  322. * Return: number of users
  323. */
  324. static inline uint8_t
  325. hal_txmon_get_num_users(void *tx_tlv)
  326. {
  327. hal_tx_fes_setup_t *tx_fes_setup = (hal_tx_fes_setup_t *)tx_tlv;
  328. return tx_fes_setup->number_of_users;
  329. }
  330. /**
  331. * hal_txmon_parse_tx_fes_setup() - parse tx_fes_setup tlv
  332. *
  333. * @tx_tlv: pointer to tx_fes_setup tlv header
  334. * @ppdu_info: pointer to hal_tx_ppdu_info
  335. *
  336. * Return: void
  337. */
  338. static inline void
  339. hal_txmon_parse_tx_fes_setup(void *tx_tlv,
  340. struct hal_tx_ppdu_info *tx_ppdu_info)
  341. {
  342. hal_tx_fes_setup_t *tx_fes_setup = (hal_tx_fes_setup_t *)tx_tlv;
  343. tx_ppdu_info->num_users = tx_fes_setup->number_of_users;
  344. if (tx_ppdu_info->num_users == 0)
  345. tx_ppdu_info->num_users = 1;
  346. tx_ppdu_info->ppdu_id = tx_fes_setup->schedule_id;
  347. }
  348. /**
  349. * hal_txmon_parse_pcu_ppdu_setup_init() - parse pcu_ppdu_setup_init tlv
  350. *
  351. * @tx_tlv: pointer to pcu_ppdu_setup_init tlv header
  352. * @data_status_info: pointer to data hal_tx_status_info
  353. * @prot_status_info: pointer to protection hal_tx_status_info
  354. *
  355. * Return: void
  356. */
  357. static inline void
  358. hal_txmon_parse_pcu_ppdu_setup_init(void *tx_tlv,
  359. struct hal_tx_status_info *data_status_info,
  360. struct hal_tx_status_info *prot_status_info)
  361. {
  362. }
  363. /**
  364. * hal_txmon_parse_peer_entry() - parse peer entry tlv
  365. *
  366. * @tx_tlv: pointer to peer_entry tlv header
  367. * @user_id: user_id
  368. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  369. * @tx_status_info: pointer to hal_tx_status_info
  370. *
  371. * Return: void
  372. */
  373. static inline void
  374. hal_txmon_parse_peer_entry(void *tx_tlv,
  375. uint8_t user_id,
  376. struct hal_tx_ppdu_info *tx_ppdu_info,
  377. struct hal_tx_status_info *tx_status_info)
  378. {
  379. }
  380. /**
  381. * hal_txmon_parse_queue_exten() - parse queue exten tlv
  382. *
  383. * @tx_tlv: pointer to queue exten tlv header
  384. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  385. *
  386. * Return: void
  387. */
  388. static inline void
  389. hal_txmon_parse_queue_exten(void *tx_tlv,
  390. struct hal_tx_ppdu_info *tx_ppdu_info)
  391. {
  392. }
  393. /**
  394. * hal_txmon_parse_mpdu_start() - parse mpdu start tlv
  395. *
  396. * @tx_tlv: pointer to mpdu start tlv header
  397. * @user_id: user id
  398. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  399. *
  400. * Return: void
  401. */
  402. static inline void
  403. hal_txmon_parse_mpdu_start(void *tx_tlv, uint8_t user_id,
  404. struct hal_tx_ppdu_info *tx_ppdu_info)
  405. {
  406. }
  407. #else
  408. /**
  409. * hal_txmon_get_num_users() - get num users from tx_fes_setup tlv
  410. *
  411. * @tx_tlv: pointer to tx_fes_setup tlv header
  412. *
  413. * Return: number of users
  414. */
  415. static inline uint8_t
  416. hal_txmon_get_num_users(void *tx_tlv)
  417. {
  418. uint8_t num_users = HAL_TX_DESC_GET_64(tx_tlv,
  419. TX_FES_SETUP, NUMBER_OF_USERS);
  420. return num_users;
  421. }
  422. /**
  423. * hal_txmon_parse_tx_fes_setup() - parse tx_fes_setup tlv
  424. *
  425. * @tx_tlv: pointer to tx_fes_setup tlv header
  426. * @ppdu_info: pointer to hal_tx_ppdu_info
  427. *
  428. * Return: void
  429. */
  430. static inline void
  431. hal_txmon_parse_tx_fes_setup(void *tx_tlv,
  432. struct hal_tx_ppdu_info *tx_ppdu_info)
  433. {
  434. uint32_t num_users = 0;
  435. uint32_t ppdu_id = 0;
  436. num_users = HAL_TX_DESC_GET_64(tx_tlv, TX_FES_SETUP, NUMBER_OF_USERS);
  437. ppdu_id = HAL_TX_DESC_GET_64(tx_tlv, TX_FES_SETUP, SCHEDULE_ID);
  438. if (num_users == 0)
  439. num_users = 1;
  440. tx_ppdu_info->num_users = num_users;
  441. tx_ppdu_info->ppdu_id = ppdu_id;
  442. }
  443. /**
  444. * hal_txmon_parse_pcu_ppdu_setup_init() - parse pcu_ppdu_setup_init tlv
  445. *
  446. * @tx_tlv: pointer to pcu_ppdu_setup_init tlv header
  447. * @data_status_info: pointer to data hal_tx_status_info
  448. * @prot_status_info: pointer to protection hal_tx_status_info
  449. *
  450. * Return: void
  451. */
  452. static inline void
  453. hal_txmon_parse_pcu_ppdu_setup_init(void *tx_tlv,
  454. struct hal_tx_status_info *data_status_info,
  455. struct hal_tx_status_info *prot_status_info)
  456. {
  457. }
  458. /**
  459. * hal_txmon_parse_peer_entry() - parse peer entry tlv
  460. *
  461. * @tx_tlv: pointer to peer_entry tlv header
  462. * @user_id: user_id
  463. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  464. * @tx_status_info: pointer to hal_tx_status_info
  465. *
  466. * Return: void
  467. */
  468. static inline void
  469. hal_txmon_parse_peer_entry(void *tx_tlv,
  470. uint8_t user_id,
  471. struct hal_tx_ppdu_info *tx_ppdu_info,
  472. struct hal_tx_status_info *tx_status_info)
  473. {
  474. }
  475. /**
  476. * hal_txmon_parse_queue_exten() - parse queue exten tlv
  477. *
  478. * @tx_tlv: pointer to queue exten tlv header
  479. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  480. *
  481. * Return: void
  482. */
  483. static inline void
  484. hal_txmon_parse_queue_exten(void *tx_tlv,
  485. struct hal_tx_ppdu_info *tx_ppdu_info)
  486. {
  487. }
  488. /**
  489. * hal_txmon_parse_mpdu_start() - parse mpdu start tlv
  490. *
  491. * @tx_tlv: pointer to mpdu start tlv header
  492. * @user_id: user id
  493. * @tx_ppdu_info: pointer to hal_tx_ppdu_info
  494. *
  495. * Return: void
  496. */
  497. static inline void
  498. hal_txmon_parse_mpdu_start(void *tx_tlv, uint8_t user_id,
  499. struct hal_tx_ppdu_info *tx_ppdu_info)
  500. {
  501. }
  502. #endif
  503. /**
  504. * hal_txmon_status_get_num_users_generic_be() - api to get num users
  505. * from start of fes window
  506. *
  507. * @tx_tlv_hdr: pointer to TLV header
  508. * @num_users: reference to number of user
  509. *
  510. * Return: status
  511. */
  512. static inline uint32_t
  513. hal_txmon_status_get_num_users_generic_be(void *tx_tlv_hdr, uint8_t *num_users)
  514. {
  515. uint32_t tlv_tag, user_id, tlv_len;
  516. uint32_t tlv_status = HAL_MON_TX_STATUS_PPDU_NOT_DONE;
  517. void *tx_tlv;
  518. tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(tx_tlv_hdr);
  519. user_id = HAL_RX_GET_USER_TLV32_USERID(tx_tlv_hdr);
  520. tlv_len = HAL_RX_GET_USER_TLV32_LEN(tx_tlv_hdr);
  521. tx_tlv = (uint8_t *)tx_tlv_hdr + HAL_RX_TLV64_HDR_SIZE;
  522. /* window starts with either initiator or response */
  523. switch (tlv_tag) {
  524. case WIFITX_FES_SETUP_E:
  525. {
  526. *num_users = hal_txmon_get_num_users(tx_tlv);
  527. if (*num_users == 0)
  528. *num_users = 1;
  529. tlv_status = HAL_MON_TX_FES_SETUP;
  530. break;
  531. }
  532. case WIFIRX_RESPONSE_REQUIRED_INFO_E:
  533. {
  534. *num_users = HAL_TX_DESC_GET_64(tx_tlv,
  535. RX_RESPONSE_REQUIRED_INFO,
  536. RESPONSE_STA_COUNT);
  537. if (*num_users == 0)
  538. *num_users = 1;
  539. tlv_status = HAL_MON_RX_RESPONSE_REQUIRED_INFO;
  540. break;
  541. }
  542. };
  543. return tlv_status;
  544. }
  545. /**
  546. * hal_txmon_free_status_buffer() - api to free status buffer
  547. * @pdev_handle: DP_PDEV handle
  548. * @status_frag: qdf_frag_t buffer
  549. * @end_offset: end offset within buffer that has valid data
  550. *
  551. * Return status
  552. */
  553. static inline QDF_STATUS
  554. hal_txmon_status_free_buffer_generic_be(qdf_frag_t status_frag,
  555. uint32_t end_offset)
  556. {
  557. uint32_t tlv_tag, tlv_len;
  558. uint32_t tlv_status = HAL_MON_TX_STATUS_PPDU_NOT_DONE;
  559. uint8_t *tx_tlv;
  560. uint8_t *tx_tlv_start;
  561. qdf_frag_t frag_buf = NULL;
  562. QDF_STATUS status = QDF_STATUS_E_ABORTED;
  563. tx_tlv = (uint8_t *)status_frag;
  564. tx_tlv_start = tx_tlv;
  565. /* parse tlv and populate tx_ppdu_info */
  566. do {
  567. tlv_tag = HAL_RX_GET_USER_TLV64_TYPE(tx_tlv);
  568. tlv_len = HAL_RX_GET_USER_TLV64_LEN(tx_tlv);
  569. if (((tx_tlv - tx_tlv_start) + tlv_len) > end_offset)
  570. return QDF_STATUS_E_ABORTED;
  571. if (tlv_tag == WIFIMON_BUFFER_ADDR_E) {
  572. frag_buf = hal_txmon_get_buffer_addr_generic_be(tx_tlv,
  573. NULL);
  574. if (frag_buf)
  575. qdf_frag_free(frag_buf);
  576. frag_buf = NULL;
  577. }
  578. if (WIFITX_FES_STATUS_END_E == tlv_tag ||
  579. WIFIRESPONSE_END_STATUS_E == tlv_tag ||
  580. WIFIDUMMY_E == tlv_tag) {
  581. status = QDF_STATUS_SUCCESS;
  582. break;
  583. }
  584. /* need api definition for hal_tx_status_get_next_tlv */
  585. tx_tlv = hal_tx_status_get_next_tlv(tx_tlv);
  586. if ((tx_tlv - tx_tlv_start) >= end_offset)
  587. break;
  588. } while (tlv_status == HAL_MON_TX_STATUS_PPDU_NOT_DONE);
  589. return status;
  590. }
  591. /**
  592. * hal_tx_get_ppdu_info() - api to get tx ppdu info
  593. * @pdev_handle: DP_PDEV handle
  594. * @prot_ppdu_info: populate dp_ppdu_info protection
  595. * @tx_data_ppdu_info: populate dp_ppdu_info data
  596. * @tlv_tag: Tag
  597. *
  598. * Return: dp_tx_ppdu_info pointer
  599. */
  600. static inline void *
  601. hal_tx_get_ppdu_info(void *data_info, void *prot_info, uint32_t tlv_tag)
  602. {
  603. struct hal_tx_ppdu_info *prot_ppdu_info = prot_info;
  604. switch (tlv_tag) {
  605. case WIFITX_FES_SETUP_E:/* DOWNSTREAM */
  606. case WIFITX_FLUSH_E:/* DOWNSTREAM */
  607. case WIFIPCU_PPDU_SETUP_INIT_E:/* DOWNSTREAM */
  608. case WIFITX_PEER_ENTRY_E:/* DOWNSTREAM */
  609. case WIFITX_QUEUE_EXTENSION_E:/* DOWNSTREAM */
  610. case WIFITX_MPDU_START_E:/* DOWNSTREAM */
  611. case WIFITX_MSDU_START_E:/* DOWNSTREAM */
  612. case WIFITX_DATA_E:/* DOWNSTREAM */
  613. case WIFIMON_BUFFER_ADDR_E:/* DOWNSTREAM */
  614. case WIFITX_MPDU_END_E:/* DOWNSTREAM */
  615. case WIFITX_MSDU_END_E:/* DOWNSTREAM */
  616. case WIFITX_LAST_MPDU_FETCHED_E:/* DOWNSTREAM */
  617. case WIFITX_LAST_MPDU_END_E:/* DOWNSTREAM */
  618. case WIFICOEX_TX_REQ_E:/* DOWNSTREAM */
  619. case WIFITX_RAW_OR_NATIVE_FRAME_SETUP_E:/* DOWNSTREAM */
  620. case WIFINDP_PREAMBLE_DONE_E:/* DOWNSTREAM */
  621. case WIFISCH_CRITICAL_TLV_REFERENCE_E:/* DOWNSTREAM */
  622. case WIFITX_LOOPBACK_SETUP_E:/* DOWNSTREAM */
  623. case WIFITX_FES_SETUP_COMPLETE_E:/* DOWNSTREAM */
  624. case WIFITQM_MPDU_GLOBAL_START_E:/* DOWNSTREAM */
  625. case WIFITX_WUR_DATA_E:/* DOWNSTREAM */
  626. case WIFISCHEDULER_END_E:/* DOWNSTREAM */
  627. case WIFITX_FES_STATUS_START_PPDU_E:/* UPSTREAM */
  628. {
  629. return data_info;
  630. }
  631. }
  632. /*
  633. * check current prot_tlv_status is start protection
  634. * check current tlv_tag is either start protection or end protection
  635. */
  636. if (TXMON_HAL(prot_ppdu_info,
  637. prot_tlv_status) == WIFITX_FES_STATUS_START_PROT_E) {
  638. return prot_info;
  639. } else if (tlv_tag == WIFITX_FES_STATUS_PROT_E ||
  640. tlv_tag == WIFITX_FES_STATUS_START_PROT_E) {
  641. TXMON_HAL(prot_ppdu_info, prot_tlv_status) = tlv_tag;
  642. return prot_info;
  643. } else {
  644. TXMON_HAL(prot_ppdu_info, prot_tlv_status) = tlv_tag;
  645. return data_info;
  646. }
  647. return data_info;
  648. }
  649. /**
  650. * hal_txmon_status_parse_tlv_generic_be() - api to parse status tlv.
  651. * @data_ppdu_info: hal_txmon data ppdu info
  652. * @prot_ppdu_info: hal_txmon prot ppdu info
  653. * @data_status_info: pointer to data status info
  654. * @prot_status_info: pointer to prot status info
  655. * @tx_tlv_hdr: fragment of tx_tlv_hdr
  656. * @status_frag: qdf_frag_t buffer
  657. *
  658. * Return: status
  659. */
  660. static inline uint32_t
  661. hal_txmon_status_parse_tlv_generic_be(void *data_ppdu_info,
  662. void *prot_ppdu_info,
  663. void *data_status_info,
  664. void *prot_status_info,
  665. void *tx_tlv_hdr,
  666. qdf_frag_t status_frag)
  667. {
  668. struct hal_tx_ppdu_info *ppdu_info;
  669. struct hal_tx_status_info *tx_status_info;
  670. uint32_t tlv_tag, user_id, tlv_len;
  671. qdf_frag_t frag_buf = NULL;
  672. uint32_t status = HAL_MON_TX_STATUS_PPDU_NOT_DONE;
  673. void *tx_tlv;
  674. tlv_tag = HAL_RX_GET_USER_TLV64_TYPE(tx_tlv_hdr);
  675. /* user_id start with 1, decrement by 1 to start from 0 */
  676. user_id = HAL_RX_GET_USER_TLV64_USERID(tx_tlv_hdr) - 1;
  677. tlv_len = HAL_RX_GET_USER_TLV64_LEN(tx_tlv_hdr);
  678. tx_tlv = (uint8_t *)tx_tlv_hdr + HAL_RX_TLV64_HDR_SIZE;
  679. /* parse tlv and populate tx_ppdu_info */
  680. ppdu_info = hal_tx_get_ppdu_info(data_ppdu_info,
  681. prot_ppdu_info, tlv_tag);
  682. tx_status_info = (ppdu_info->is_data ? data_status_info :
  683. prot_status_info);
  684. user_id = user_id > ppdu_info->num_users ? 0 : ppdu_info->num_users;
  685. switch (tlv_tag) {
  686. /* start of initiator FES window */
  687. case WIFITX_FES_SETUP_E:/* DOWNSTREAM */
  688. {
  689. /* initiator PPDU window start */
  690. hal_txmon_parse_tx_fes_setup(tx_tlv, ppdu_info);
  691. status = HAL_MON_TX_FES_SETUP;
  692. SHOW_DEFINED(WIFITX_FES_SETUP_E);
  693. break;
  694. }
  695. /* end of initiator FES window */
  696. case WIFITX_FES_STATUS_END_E:/* UPSTREAM */
  697. {
  698. /* initiator PPDU window end */
  699. status = HAL_MON_TX_FES_STATUS_END;
  700. SHOW_DEFINED(WIFITX_FES_STATUS_END_E);
  701. break;
  702. }
  703. /* response window open */
  704. case WIFIRX_RESPONSE_REQUIRED_INFO_E:/* UPSTREAM */
  705. {
  706. status = HAL_MON_RX_RESPONSE_REQUIRED_INFO;
  707. SHOW_DEFINED(WIFIRX_RESPONSE_REQUIRED_INFO_E);
  708. break;
  709. }
  710. /* Response window close */
  711. case WIFIRESPONSE_END_STATUS_E:/* UPSTREAM */
  712. {
  713. /* response PPDU window end */
  714. status = HAL_MON_RESPONSE_END_STATUS_INFO;
  715. SHOW_DEFINED(WIFIRESPONSE_END_STATUS_E);
  716. break;
  717. }
  718. case WIFITX_FLUSH_E:/* DOWNSTREAM */
  719. {
  720. SHOW_DEFINED(WIFITX_FLUSH_E);
  721. break;
  722. }
  723. /* Downstream tlv */
  724. case WIFIPCU_PPDU_SETUP_INIT_E:/* DOWNSTREAM */
  725. {
  726. hal_txmon_parse_pcu_ppdu_setup_init(tx_tlv, data_status_info,
  727. prot_status_info);
  728. status = HAL_MON_TX_PCU_PPDU_SETUP_INIT;
  729. SHOW_DEFINED(WIFIPCU_PPDU_SETUP_INIT_E);
  730. break;
  731. }
  732. case WIFITX_PEER_ENTRY_E:/* DOWNSTREAM */
  733. {
  734. hal_txmon_parse_peer_entry(tx_tlv, user_id,
  735. ppdu_info, tx_status_info);
  736. SHOW_DEFINED(WIFITX_PEER_ENTRY_E);
  737. break;
  738. }
  739. case WIFITX_QUEUE_EXTENSION_E:/* DOWNSTREAM */
  740. {
  741. status = HAL_MON_TX_QUEUE_EXTENSION;
  742. hal_txmon_parse_queue_exten(tx_tlv, ppdu_info);
  743. SHOW_DEFINED(WIFITX_QUEUE_EXTENSION_E);
  744. break;
  745. }
  746. /* payload and data frame handling */
  747. case WIFITX_MPDU_START_E:/* DOWNSTREAM */
  748. {
  749. hal_txmon_parse_mpdu_start(tx_tlv, user_id, ppdu_info);
  750. status = HAL_MON_TX_MPDU_START;
  751. SHOW_DEFINED(WIFITX_MPDU_START_E);
  752. break;
  753. }
  754. case WIFITX_MSDU_START_E:/* DOWNSTREAM */
  755. {
  756. /* compacted */
  757. /* we expect frame to be 802.11 frame type */
  758. status = HAL_MON_TX_MSDU_START;
  759. SHOW_DEFINED(WIFITX_MSDU_START_E);
  760. break;
  761. }
  762. case WIFITX_DATA_E:/* DOWNSTREAM */
  763. {
  764. /*
  765. * reference of the status buffer will be held in
  766. * dp_tx_update_ppdu_info_status()
  767. */
  768. status = HAL_MON_TX_DATA;
  769. SHOW_DEFINED(WIFITX_DATA_E);
  770. break;
  771. }
  772. case WIFIMON_BUFFER_ADDR_E:
  773. {
  774. frag_buf = hal_txmon_get_buffer_addr_generic_be(tx_tlv, NULL);
  775. if (frag_buf)
  776. qdf_frag_free(frag_buf);
  777. frag_buf = NULL;
  778. status = HAL_MON_TX_BUFFER_ADDR;
  779. SHOW_DEFINED(WIFIMON_BUFFER_ADDR_E);
  780. break;
  781. }
  782. case WIFITX_MPDU_END_E:/* DOWNSTREAM */
  783. {
  784. /* no tlv content */
  785. SHOW_DEFINED(WIFITX_MPDU_END_E);
  786. break;
  787. }
  788. case WIFITX_MSDU_END_E:/* DOWNSTREAM */
  789. {
  790. /* no tlv content */
  791. SHOW_DEFINED(WIFITX_MSDU_END_E);
  792. break;
  793. }
  794. case WIFITX_LAST_MPDU_FETCHED_E:/* DOWNSTREAM */
  795. {
  796. /* no tlv content */
  797. SHOW_DEFINED(WIFITX_LAST_MPDU_FETCHED_E);
  798. break;
  799. }
  800. case WIFITX_LAST_MPDU_END_E:/* DOWNSTREAM */
  801. {
  802. /* no tlv content */
  803. SHOW_DEFINED(WIFITX_LAST_MPDU_END_E);
  804. break;
  805. }
  806. case WIFICOEX_TX_REQ_E:/* DOWNSTREAM */
  807. {
  808. /*
  809. * transmitting power
  810. * minimum transmitting power
  811. * desired nss
  812. * tx chain mask
  813. * desired bw
  814. * duration of transmit and response
  815. *
  816. * since most of the field we are deriving from other tlv
  817. * we don't need to enable this in our tlv.
  818. */
  819. SHOW_DEFINED(WIFICOEX_TX_REQ_E);
  820. break;
  821. }
  822. case WIFITX_RAW_OR_NATIVE_FRAME_SETUP_E:/* DOWNSTREAM */
  823. {
  824. /* user tlv */
  825. /*
  826. * All Tx monitor will have 802.11 hdr
  827. * we don't need to enable this TLV
  828. */
  829. SHOW_DEFINED(WIFITX_RAW_OR_NATIVE_FRAME_SETUP_E);
  830. break;
  831. }
  832. case WIFINDP_PREAMBLE_DONE_E:/* DOWNSTREAM */
  833. {
  834. /*
  835. * no tlv content
  836. *
  837. * TLV that indicates to TXPCU that preamble phase for the NDP
  838. * frame transmission is now over
  839. */
  840. SHOW_DEFINED(WIFINDP_PREAMBLE_DONE_E);
  841. break;
  842. }
  843. case WIFISCH_CRITICAL_TLV_REFERENCE_E:/* DOWNSTREAM */
  844. {
  845. /*
  846. * no tlv content
  847. *
  848. * TLV indicates to the SCH that all timing critical TLV
  849. * has been passed on to the transmit path
  850. */
  851. SHOW_DEFINED(WIFISCH_CRITICAL_TLV_REFERENCE_E);
  852. break;
  853. }
  854. case WIFITX_LOOPBACK_SETUP_E:/* DOWNSTREAM */
  855. {
  856. /*
  857. * Loopback specific setup info - not needed for Tx monitor
  858. */
  859. SHOW_DEFINED(WIFITX_LOOPBACK_SETUP_E);
  860. break;
  861. }
  862. case WIFITX_FES_SETUP_COMPLETE_E:/* DOWNSTREAM */
  863. {
  864. /*
  865. * no tlv content
  866. *
  867. * TLV indicates that other modules besides the scheduler can
  868. * now also start generating TLV's
  869. * prevent colliding or generating TLV's out of order
  870. */
  871. SHOW_DEFINED(WIFITX_FES_SETUP_COMPLETE_E);
  872. break;
  873. }
  874. case WIFITQM_MPDU_GLOBAL_START_E:/* DOWNSTREAM */
  875. {
  876. /*
  877. * no tlv content
  878. *
  879. * TLV indicates to SCH that a burst of MPDU info will
  880. * start to come in over the TLV
  881. */
  882. SHOW_DEFINED(WIFITQM_MPDU_GLOBAL_START_E);
  883. break;
  884. }
  885. case WIFITX_WUR_DATA_E:/* DOWNSTREAM */
  886. {
  887. SHOW_DEFINED(WIFITX_WUR_DATA_E);
  888. break;
  889. }
  890. case WIFISCHEDULER_END_E:/* DOWNSTREAM */
  891. {
  892. /*
  893. * no tlv content
  894. *
  895. * TLV indicates END of all TLV's within the scheduler TLV
  896. */
  897. SHOW_DEFINED(WIFISCHEDULER_END_E);
  898. break;
  899. }
  900. /* Upstream tlv */
  901. case WIFIPDG_TX_REQ_E:
  902. {
  903. SHOW_DEFINED(WIFIPDG_TX_REQ_E);
  904. break;
  905. }
  906. case WIFITX_FES_STATUS_START_E:
  907. {
  908. /*
  909. * TLV indicating that first transmission on the medium
  910. */
  911. status = HAL_MON_TX_FES_STATUS_START;
  912. SHOW_DEFINED(WIFITX_FES_STATUS_START_E);
  913. break;
  914. }
  915. case WIFITX_FES_STATUS_PROT_E:
  916. {
  917. /*
  918. * generated by TXPCU to indicate the result of having
  919. * received of the expected protection frame
  920. */
  921. status = HAL_MON_TX_FES_STATUS_PROT;
  922. SHOW_DEFINED(WIFITX_FES_STATUS_PROT_E);
  923. break;
  924. }
  925. case WIFITX_FES_STATUS_START_PROT_E:
  926. {
  927. status = HAL_MON_TX_FES_STATUS_START_PROT;
  928. SHOW_DEFINED(WIFITX_FES_STATUS_START_PROT_E);
  929. break;
  930. }
  931. case WIFIPROT_TX_END_E:
  932. {
  933. /*
  934. * no tlv content
  935. *
  936. * generated by TXPCU the moment that protection frame
  937. * transmission has finished on the medium
  938. */
  939. SHOW_DEFINED(WIFIPROT_TX_END_E);
  940. break;
  941. }
  942. case WIFITX_FES_STATUS_START_PPDU_E:
  943. {
  944. status = HAL_MON_TX_FES_STATUS_START_PPDU;
  945. SHOW_DEFINED(WIFITX_FES_STATUS_START_PPDU_E);
  946. break;
  947. }
  948. case WIFITX_FES_STATUS_USER_PPDU_E:
  949. {
  950. /* user tlv */
  951. status = HAL_MON_TX_FES_STATUS_USER_PPDU;
  952. SHOW_DEFINED(WIFITX_FES_STATUS_USER_PPDU_E);
  953. break;
  954. }
  955. case WIFIPPDU_TX_END_E:
  956. {
  957. /*
  958. * no tlv content
  959. *
  960. * generated by TXPCU the moment that PPDU transmission has
  961. * finished on the medium
  962. */
  963. SHOW_DEFINED(WIFIPPDU_TX_END_E);
  964. break;
  965. }
  966. case WIFITX_FES_STATUS_USER_RESPONSE_E:
  967. {
  968. /*
  969. * TLV contains the FES transmit result of the each
  970. * of the MAC users. TLV are forwarded to HWSCH
  971. */
  972. SHOW_DEFINED(WIFITX_FES_STATUS_USER_RESPONSE_E);
  973. break;
  974. }
  975. case WIFITX_FES_STATUS_ACK_OR_BA_E:
  976. {
  977. /* user tlv */
  978. /*
  979. * TLV generated by RXPCU and provide information related to
  980. * the received BA or ACK frame
  981. */
  982. SHOW_DEFINED(WIFITX_FES_STATUS_ACK_OR_BA_E);
  983. break;
  984. }
  985. case WIFITX_FES_STATUS_1K_BA_E:
  986. {
  987. /* user tlv */
  988. /*
  989. * TLV generated by RXPCU and providing information related
  990. * to the received BA frame in case of 512/1024 bitmaps
  991. */
  992. SHOW_DEFINED(WIFITX_FES_STATUS_1K_BA_E);
  993. break;
  994. }
  995. case WIFIRECEIVED_RESPONSE_USER_7_0_E:
  996. {
  997. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_7_0_E);
  998. break;
  999. }
  1000. case WIFIRECEIVED_RESPONSE_USER_15_8_E:
  1001. {
  1002. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_15_8_E);
  1003. break;
  1004. }
  1005. case WIFIRECEIVED_RESPONSE_USER_23_16_E:
  1006. {
  1007. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_23_16_E);
  1008. break;
  1009. }
  1010. case WIFIRECEIVED_RESPONSE_USER_31_24_E:
  1011. {
  1012. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_31_24_E);
  1013. break;
  1014. }
  1015. case WIFIRECEIVED_RESPONSE_USER_36_32_E:
  1016. {
  1017. /*
  1018. * RXPCU generates this TLV when it receives a response frame
  1019. * that TXPCU pre-announced it was waiting for and in
  1020. * RXPCU_SETUP TLV, TLV generated before the
  1021. * RECEIVED_RESPONSE_INFO TLV.
  1022. *
  1023. * received info user fields are there which is not needed
  1024. * for TX monitor
  1025. */
  1026. SHOW_DEFINED(WIFIRECEIVED_RESPONSE_USER_36_32_E);
  1027. break;
  1028. }
  1029. case WIFITXPCU_BUFFER_STATUS_E:
  1030. {
  1031. SHOW_DEFINED(WIFITXPCU_BUFFER_STATUS_E);
  1032. break;
  1033. }
  1034. case WIFITXPCU_USER_BUFFER_STATUS_E:
  1035. {
  1036. /*
  1037. * WIFITXPCU_USER_BUFFER_STATUS_E - user tlv
  1038. * for TX monitor we aren't interested in this tlv
  1039. */
  1040. SHOW_DEFINED(WIFITXPCU_USER_BUFFER_STATUS_E);
  1041. break;
  1042. }
  1043. case WIFITXDMA_STOP_REQUEST_E:
  1044. {
  1045. /*
  1046. * no tlv content
  1047. *
  1048. * TLV is destined to TXDMA and informs TXDMA to stop
  1049. * pushing data into the transmit path.
  1050. */
  1051. SHOW_DEFINED(WIFITXDMA_STOP_REQUEST_E);
  1052. break;
  1053. }
  1054. case WIFITX_CBF_INFO_E:
  1055. {
  1056. /*
  1057. * After NDPA + NDP is received, RXPCU sends the TX_CBF_INFO to
  1058. * TXPCU to respond the CBF frame
  1059. *
  1060. * compressed beamforming pkt doesn't has mac header
  1061. * Tx monitor not interested in this pkt.
  1062. */
  1063. SHOW_DEFINED(WIFITX_CBF_INFO_E);
  1064. break;
  1065. }
  1066. case WIFITX_MPDU_COUNT_TRANSFER_END_E:
  1067. {
  1068. /*
  1069. * no tlv content
  1070. *
  1071. * TLV indicates that TXPCU has finished generating the
  1072. * TQM_UPDATE_TX_MPDU_COUNT TLV for all users
  1073. */
  1074. SHOW_DEFINED(WIFITX_MPDU_COUNT_TRANSFER_END_E);
  1075. break;
  1076. }
  1077. case WIFIPDG_RESPONSE_E:
  1078. {
  1079. /*
  1080. * most of the feilds are already covered in
  1081. * other TLV
  1082. * This is generated by TX_PCU to PDG to calculate
  1083. * all the PHY header info.
  1084. *
  1085. * some useful fields like min transmit power,
  1086. * rate used for transmitting packet is present.
  1087. */
  1088. SHOW_DEFINED(WIFIPDG_RESPONSE_E);
  1089. break;
  1090. }
  1091. case WIFIPDG_TRIG_RESPONSE_E:
  1092. {
  1093. /* no tlv content */
  1094. SHOW_DEFINED(WIFIPDG_TRIG_RESPONSE_E);
  1095. break;
  1096. }
  1097. case WIFIRECEIVED_TRIGGER_INFO_E:
  1098. {
  1099. /*
  1100. * TLV generated by RXPCU to inform the scheduler that
  1101. * a trigger frame has been received
  1102. */
  1103. SHOW_DEFINED(WIFIRECEIVED_TRIGGER_INFO_E);
  1104. break;
  1105. }
  1106. case WIFIOFDMA_TRIGGER_DETAILS_E:
  1107. {
  1108. SHOW_DEFINED(WIFIOFDMA_TRIGGER_DETAILS_E);
  1109. break;
  1110. }
  1111. case WIFIRX_FRAME_BITMAP_ACK_E:
  1112. {
  1113. /* user tlv */
  1114. status = HAL_MON_RX_FRAME_BITMAP_ACK;
  1115. SHOW_DEFINED(WIFIRX_FRAME_BITMAP_ACK_E);
  1116. break;
  1117. }
  1118. case WIFIRX_FRAME_1K_BITMAP_ACK_E:
  1119. {
  1120. /* user tlv */
  1121. status = HAL_MON_RX_FRAME_BITMAP_BLOCK_ACK_1K;
  1122. SHOW_DEFINED(WIFIRX_FRAME_1K_BITMAP_ACK_E);
  1123. break;
  1124. }
  1125. case WIFIRESPONSE_START_STATUS_E:
  1126. {
  1127. /*
  1128. * TLV indicates which HW response the TXPCU
  1129. * started generating
  1130. *
  1131. * HW generated frames like
  1132. * ACK frame - handled
  1133. * CTS frame - handled
  1134. * BA frame - handled
  1135. * MBA frame - handled
  1136. * CBF frame - no frame header
  1137. * Trigger response - TODO
  1138. * NDP LMR - no frame header
  1139. */
  1140. SHOW_DEFINED(WIFIRESPONSE_START_STATUS_E);
  1141. break;
  1142. }
  1143. case WIFIRX_START_PARAM_E:
  1144. {
  1145. /*
  1146. * RXPCU send this TLV after PHY RX detected a frame
  1147. * in the medium
  1148. *
  1149. * TX monitor not interested in this TLV
  1150. */
  1151. SHOW_DEFINED(WIFIRX_START_PARAM_E);
  1152. break;
  1153. }
  1154. case WIFIRXPCU_EARLY_RX_INDICATION_E:
  1155. {
  1156. /*
  1157. * early indication of pkt type and mcs rate
  1158. * already captured in other tlv
  1159. */
  1160. SHOW_DEFINED(WIFIRXPCU_EARLY_RX_INDICATION_E);
  1161. break;
  1162. }
  1163. case WIFIRX_PM_INFO_E:
  1164. {
  1165. SHOW_DEFINED(WIFIRX_PM_INFO_E);
  1166. break;
  1167. }
  1168. /* Active window */
  1169. case WIFITX_FLUSH_REQ_E:
  1170. {
  1171. SHOW_DEFINED(WIFITX_FLUSH_REQ_E);
  1172. break;
  1173. }
  1174. case WIFICOEX_TX_STATUS_E:
  1175. {
  1176. /* duration are retrieved from coex tx status */
  1177. status = HAL_MON_COEX_TX_STATUS;
  1178. SHOW_DEFINED(WIFICOEX_TX_STATUS_E);
  1179. break;
  1180. }
  1181. case WIFIR2R_STATUS_END_E:
  1182. {
  1183. SHOW_DEFINED(WIFIR2R_STATUS_END_E);
  1184. break;
  1185. }
  1186. case WIFIRX_PREAMBLE_E:
  1187. {
  1188. SHOW_DEFINED(WIFIRX_PREAMBLE_E);
  1189. break;
  1190. }
  1191. case WIFIMACTX_SERVICE_E:
  1192. {
  1193. SHOW_DEFINED(WIFIMACTX_SERVICE_E);
  1194. break;
  1195. }
  1196. case WIFIMACTX_U_SIG_EHT_SU_MU_E:
  1197. {
  1198. SHOW_DEFINED(WIFIMACTX_U_SIG_EHT_SU_MU_E);
  1199. break;
  1200. }
  1201. case WIFIMACTX_U_SIG_EHT_TB_E:
  1202. {
  1203. /* TODO: no radiotap info available */
  1204. SHOW_DEFINED(WIFIMACTX_U_SIG_EHT_TB_E);
  1205. break;
  1206. }
  1207. case WIFIMACTX_EHT_SIG_USR_OFDMA_E:
  1208. {
  1209. SHOW_DEFINED(WIFIMACTX_EHT_SIG_USR_OFDMA_E);
  1210. break;
  1211. }
  1212. case WIFIMACTX_EHT_SIG_USR_MU_MIMO_E:
  1213. {
  1214. SHOW_DEFINED(WIFIMACTX_EHT_SIG_USR_MU_MIMO_E);
  1215. break;
  1216. }
  1217. case WIFIMACTX_EHT_SIG_USR_SU_E:
  1218. {
  1219. SHOW_DEFINED(WIFIMACTX_EHT_SIG_USR_SU_E);
  1220. /* TODO: no radiotap info available */
  1221. break;
  1222. }
  1223. case WIFIMACTX_HE_SIG_A_SU_E:
  1224. {
  1225. SHOW_DEFINED(WIFIMACTX_HE_SIG_A_SU_E);
  1226. break;
  1227. }
  1228. case WIFIMACTX_HE_SIG_A_MU_DL_E:
  1229. {
  1230. SHOW_DEFINED(WIFIMACTX_HE_SIG_A_MU_DL_E);
  1231. break;
  1232. }
  1233. case WIFIMACTX_HE_SIG_A_MU_UL_E:
  1234. {
  1235. SHOW_DEFINED(WIFIMACTX_HE_SIG_A_MU_UL_E);
  1236. break;
  1237. }
  1238. case WIFIMACTX_HE_SIG_B1_MU_E:
  1239. {
  1240. status = HAL_MON_MACTX_HE_SIG_B1_MU;
  1241. SHOW_DEFINED(WIFIMACTX_HE_SIG_B1_MU_E);
  1242. break;
  1243. }
  1244. case WIFIMACTX_HE_SIG_B2_MU_E:
  1245. {
  1246. /* user tlv */
  1247. status = HAL_MON_MACTX_HE_SIG_B2_MU;
  1248. SHOW_DEFINED(WIFIMACTX_HE_SIG_B2_MU_E);
  1249. break;
  1250. }
  1251. case WIFIMACTX_HE_SIG_B2_OFDMA_E:
  1252. {
  1253. /* user tlv */
  1254. status = HAL_MON_MACTX_HE_SIG_B2_OFDMA;
  1255. SHOW_DEFINED(WIFIMACTX_HE_SIG_B2_OFDMA_E);
  1256. break;
  1257. }
  1258. case WIFIMACTX_L_SIG_A_E:
  1259. {
  1260. status = HAL_MON_MACTX_L_SIG_A;
  1261. SHOW_DEFINED(WIFIMACTX_L_SIG_A_E);
  1262. break;
  1263. }
  1264. case WIFIMACTX_L_SIG_B_E:
  1265. {
  1266. status = HAL_MON_MACTX_L_SIG_B;
  1267. SHOW_DEFINED(WIFIMACTX_L_SIG_B_E);
  1268. break;
  1269. }
  1270. case WIFIMACTX_HT_SIG_E:
  1271. {
  1272. status = HAL_MON_MACTX_HT_SIG;
  1273. SHOW_DEFINED(WIFIMACTX_HT_SIG_E);
  1274. break;
  1275. }
  1276. case WIFIMACTX_VHT_SIG_A_E:
  1277. {
  1278. status = HAL_MON_MACTX_VHT_SIG_A;
  1279. SHOW_DEFINED(WIFIMACTX_VHT_SIG_A_E);
  1280. break;
  1281. }
  1282. case WIFIMACTX_VHT_SIG_B_MU160_E:
  1283. {
  1284. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU160_E);
  1285. break;
  1286. }
  1287. case WIFIMACTX_VHT_SIG_B_MU80_E:
  1288. {
  1289. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU80_E);
  1290. break;
  1291. }
  1292. case WIFIMACTX_VHT_SIG_B_MU40_E:
  1293. {
  1294. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU40_E);
  1295. break;
  1296. }
  1297. case WIFIMACTX_VHT_SIG_B_MU20_E:
  1298. {
  1299. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_MU20_E);
  1300. break;
  1301. }
  1302. case WIFIMACTX_VHT_SIG_B_SU160_E:
  1303. {
  1304. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU160_E);
  1305. break;
  1306. }
  1307. case WIFIMACTX_VHT_SIG_B_SU80_E:
  1308. {
  1309. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU80_E);
  1310. break;
  1311. }
  1312. case WIFIMACTX_VHT_SIG_B_SU40_E:
  1313. {
  1314. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU40_E);
  1315. break;
  1316. }
  1317. case WIFIMACTX_VHT_SIG_B_SU20_E:
  1318. {
  1319. SHOW_DEFINED(WIFIMACTX_VHT_SIG_B_SU20_E);
  1320. break;
  1321. }
  1322. case WIFIPHYTX_PPDU_HEADER_INFO_REQUEST_E:
  1323. {
  1324. SHOW_DEFINED(WIFIPHYTX_PPDU_HEADER_INFO_REQUEST_E);
  1325. break;
  1326. }
  1327. case WIFIMACTX_USER_DESC_PER_USER_E:
  1328. {
  1329. status = HAL_MON_MACTX_USER_DESC_PER_USER;
  1330. SHOW_DEFINED(WIFIMACTX_USER_DESC_PER_USER_E);
  1331. break;
  1332. }
  1333. case WIFIMACTX_USER_DESC_COMMON_E:
  1334. {
  1335. SHOW_DEFINED(WIFIMACTX_USER_DESC_COMMON_E);
  1336. break;
  1337. }
  1338. case WIFIMACTX_PHY_DESC_E:
  1339. {
  1340. status = HAL_MON_MACTX_PHY_DESC;
  1341. SHOW_DEFINED(WIFIMACTX_PHY_DESC_E);
  1342. break;
  1343. }
  1344. case WIFICOEX_RX_STATUS_E:
  1345. {
  1346. SHOW_DEFINED(WIFICOEX_RX_STATUS_E);
  1347. break;
  1348. }
  1349. case WIFIRX_PPDU_ACK_REPORT_E:
  1350. {
  1351. SHOW_DEFINED(WIFIRX_PPDU_ACK_REPORT_E);
  1352. break;
  1353. }
  1354. case WIFIRX_PPDU_NO_ACK_REPORT_E:
  1355. {
  1356. SHOW_DEFINED(WIFIRX_PPDU_NO_ACK_REPORT_E);
  1357. break;
  1358. }
  1359. case WIFITXPCU_PHYTX_OTHER_TRANSMIT_INFO32_E:
  1360. {
  1361. SHOW_DEFINED(WIFITXPCU_PHYTX_OTHER_TRANSMIT_INFO32_E);
  1362. break;
  1363. }
  1364. case WIFITXPCU_PHYTX_DEBUG32_E:
  1365. {
  1366. SHOW_DEFINED(WIFITXPCU_PHYTX_DEBUG32_E);
  1367. break;
  1368. }
  1369. case WIFITXPCU_PREAMBLE_DONE_E:
  1370. {
  1371. SHOW_DEFINED(WIFITXPCU_PREAMBLE_DONE_E);
  1372. break;
  1373. }
  1374. case WIFIRX_PHY_SLEEP_E:
  1375. {
  1376. SHOW_DEFINED(WIFIRX_PHY_SLEEP_E);
  1377. break;
  1378. }
  1379. case WIFIRX_FRAME_BITMAP_REQ_E:
  1380. {
  1381. SHOW_DEFINED(WIFIRX_FRAME_BITMAP_REQ_E);
  1382. break;
  1383. }
  1384. case WIFIRXPCU_TX_SETUP_CLEAR_E:
  1385. {
  1386. SHOW_DEFINED(WIFIRXPCU_TX_SETUP_CLEAR_E);
  1387. break;
  1388. }
  1389. case WIFIRX_TRIG_INFO_E:
  1390. {
  1391. SHOW_DEFINED(WIFIRX_TRIG_INFO_E);
  1392. break;
  1393. }
  1394. case WIFIEXPECTED_RESPONSE_E:
  1395. {
  1396. SHOW_DEFINED(WIFIEXPECTED_RESPONSE_E);
  1397. break;
  1398. }
  1399. case WIFITRIGGER_RESPONSE_TX_DONE_E:
  1400. {
  1401. SHOW_DEFINED(WIFITRIGGER_RESPONSE_TX_DONE_E);
  1402. break;
  1403. }
  1404. }
  1405. return status;
  1406. }
  1407. #endif /* QCA_MONITOR_2_0_SUPPORT */
  1408. #ifdef REO_SHARED_QREF_TABLE_EN
  1409. static void hal_reo_shared_qaddr_cache_clear_be(hal_soc_handle_t hal_soc_hdl)
  1410. {
  1411. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  1412. uint32_t reg_val = 0;
  1413. /* Set Qdesc clear bit to erase REO internal storage for Qdesc pointers
  1414. * of 37 peer/tids
  1415. */
  1416. reg_val = HAL_REG_READ(hal, HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE));
  1417. reg_val |= HAL_SM(HWIO_REO_R0_QDESC_ADDR_READ, CLEAR_QDESC_ARRAY, 1);
  1418. HAL_REG_WRITE(hal,
  1419. HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE),
  1420. reg_val);
  1421. /* Clear Qdesc clear bit to erase REO internal storage for Qdesc pointers
  1422. * of 37 peer/tids
  1423. */
  1424. reg_val &= ~(HAL_SM(HWIO_REO_R0_QDESC_ADDR_READ, CLEAR_QDESC_ARRAY, 1));
  1425. HAL_REG_WRITE(hal,
  1426. HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE),
  1427. reg_val);
  1428. hal_verbose_debug("hal_soc: %pK :Setting CLEAR_DESC_ARRAY field of"
  1429. "WCSS_UMAC_REO_R0_QDESC_ADDR_READ and resetting back"
  1430. "to erase stale entries in reo storage: regval:%x", hal, reg_val);
  1431. }
  1432. /* hal_reo_shared_qaddr_write(): Write REO tid queue addr
  1433. * LUT shared by SW and HW at the index given by peer id
  1434. * and tid.
  1435. *
  1436. * @hal_soc: hal soc pointer
  1437. * @reo_qref_addr: pointer to index pointed to be peer_id
  1438. * and tid
  1439. * @tid: tid queue number
  1440. * @hw_qdesc_paddr: reo queue addr
  1441. */
  1442. static void hal_reo_shared_qaddr_write_be(hal_soc_handle_t hal_soc_hdl,
  1443. uint16_t peer_id,
  1444. int tid,
  1445. qdf_dma_addr_t hw_qdesc_paddr)
  1446. {
  1447. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  1448. struct rx_reo_queue_reference *reo_qref;
  1449. uint32_t peer_tid_idx;
  1450. /* Plug hw_desc_addr in Host reo queue reference table */
  1451. if (HAL_PEER_ID_IS_MLO(peer_id)) {
  1452. peer_tid_idx = ((peer_id - HAL_ML_PEER_ID_START) *
  1453. DP_MAX_TIDS) + tid;
  1454. reo_qref = (struct rx_reo_queue_reference *)
  1455. &hal->reo_qref.mlo_reo_qref_table_vaddr[peer_tid_idx];
  1456. } else {
  1457. peer_tid_idx = (peer_id * DP_MAX_TIDS) + tid;
  1458. reo_qref = (struct rx_reo_queue_reference *)
  1459. &hal->reo_qref.non_mlo_reo_qref_table_vaddr[peer_tid_idx];
  1460. }
  1461. reo_qref->rx_reo_queue_desc_addr_31_0 =
  1462. hw_qdesc_paddr & 0xffffffff;
  1463. reo_qref->rx_reo_queue_desc_addr_39_32 =
  1464. (hw_qdesc_paddr & 0xff00000000) >> 32;
  1465. if (hw_qdesc_paddr != 0)
  1466. reo_qref->receive_queue_number = tid;
  1467. else
  1468. reo_qref->receive_queue_number = 0;
  1469. hal_reo_shared_qaddr_cache_clear_be(hal_soc_hdl);
  1470. hal_verbose_debug("hw_qdesc_paddr: %pK, tid: %d, reo_qref:%pK,"
  1471. "rx_reo_queue_desc_addr_31_0: %x,"
  1472. "rx_reo_queue_desc_addr_39_32: %x",
  1473. (void *)hw_qdesc_paddr, tid, reo_qref,
  1474. reo_qref->rx_reo_queue_desc_addr_31_0,
  1475. reo_qref->rx_reo_queue_desc_addr_39_32);
  1476. }
  1477. /**
  1478. * hal_reo_shared_qaddr_setup() - Allocate MLO and Non MLO reo queue
  1479. * reference table shared between SW and HW and initialize in Qdesc Base0
  1480. * base1 registers provided by HW.
  1481. *
  1482. * @hal_soc: HAL Soc handle
  1483. *
  1484. * Return: None
  1485. */
  1486. static void hal_reo_shared_qaddr_setup_be(hal_soc_handle_t hal_soc_hdl)
  1487. {
  1488. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  1489. hal->reo_qref.reo_qref_table_en = 1;
  1490. hal->reo_qref.mlo_reo_qref_table_vaddr =
  1491. (uint64_t *)qdf_mem_alloc_consistent(
  1492. hal->qdf_dev, hal->qdf_dev->dev,
  1493. REO_QUEUE_REF_ML_TABLE_SIZE,
  1494. &hal->reo_qref.mlo_reo_qref_table_paddr);
  1495. hal->reo_qref.non_mlo_reo_qref_table_vaddr =
  1496. (uint64_t *)qdf_mem_alloc_consistent(
  1497. hal->qdf_dev, hal->qdf_dev->dev,
  1498. REO_QUEUE_REF_NON_ML_TABLE_SIZE,
  1499. &hal->reo_qref.non_mlo_reo_qref_table_paddr);
  1500. hal_verbose_debug("MLO table start paddr:%pK,"
  1501. "Non-MLO table start paddr:%pK,"
  1502. "MLO table start vaddr: %pK,"
  1503. "Non MLO table start vaddr: %pK",
  1504. (void *)hal->reo_qref.mlo_reo_qref_table_paddr,
  1505. (void *)hal->reo_qref.non_mlo_reo_qref_table_paddr,
  1506. hal->reo_qref.mlo_reo_qref_table_vaddr,
  1507. hal->reo_qref.non_mlo_reo_qref_table_vaddr);
  1508. }
  1509. /**
  1510. * hal_reo_shared_qaddr_init() - Zero out REO qref LUT and
  1511. * write start addr of MLO and Non MLO table in HW
  1512. *
  1513. * @hal_soc: HAL Soc handle
  1514. *
  1515. * Return: None
  1516. */
  1517. static void hal_reo_shared_qaddr_init_be(hal_soc_handle_t hal_soc_hdl)
  1518. {
  1519. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  1520. qdf_mem_zero(hal->reo_qref.mlo_reo_qref_table_vaddr,
  1521. REO_QUEUE_REF_ML_TABLE_SIZE);
  1522. qdf_mem_zero(hal->reo_qref.non_mlo_reo_qref_table_vaddr,
  1523. REO_QUEUE_REF_NON_ML_TABLE_SIZE);
  1524. /* LUT_BASE0 and BASE1 registers expect upper 32bits of LUT base address
  1525. * and lower 8 bits to be 0. Shift the physical address by 8 to plug
  1526. * upper 32bits only
  1527. */
  1528. HAL_REG_WRITE(hal,
  1529. HWIO_REO_R0_QDESC_LUT_BASE0_ADDR_ADDR(REO_REG_REG_BASE),
  1530. hal->reo_qref.non_mlo_reo_qref_table_paddr >> 8);
  1531. HAL_REG_WRITE(hal,
  1532. HWIO_REO_R0_QDESC_LUT_BASE1_ADDR_ADDR(REO_REG_REG_BASE),
  1533. hal->reo_qref.mlo_reo_qref_table_paddr >> 8);
  1534. HAL_REG_WRITE(hal,
  1535. HWIO_REO_R0_QDESC_ADDR_READ_ADDR(REO_REG_REG_BASE),
  1536. HAL_SM(HWIO_REO_R0_QDESC_ADDR_READ, LUT_FEATURE_ENABLE,
  1537. 1));
  1538. HAL_REG_WRITE(hal,
  1539. HWIO_REO_R0_QDESC_MAX_SW_PEER_ID_ADDR(REO_REG_REG_BASE),
  1540. HAL_MS(HWIO_REO_R0_QDESC, MAX_SW_PEER_ID_MAX_SUPPORTED,
  1541. 0x1fff));
  1542. }
  1543. /**
  1544. * hal_reo_shared_qaddr_detach() - Free MLO and Non MLO reo queue
  1545. * reference table shared between SW and HW
  1546. *
  1547. * @hal_soc: HAL Soc handle
  1548. *
  1549. * Return: None
  1550. */
  1551. static void hal_reo_shared_qaddr_detach_be(hal_soc_handle_t hal_soc_hdl)
  1552. {
  1553. struct hal_soc *hal = (struct hal_soc *)hal_soc_hdl;
  1554. HAL_REG_WRITE(hal,
  1555. HWIO_REO_R0_QDESC_LUT_BASE0_ADDR_ADDR(REO_REG_REG_BASE),
  1556. 0);
  1557. HAL_REG_WRITE(hal,
  1558. HWIO_REO_R0_QDESC_LUT_BASE1_ADDR_ADDR(REO_REG_REG_BASE),
  1559. 0);
  1560. qdf_mem_free_consistent(hal->qdf_dev, hal->qdf_dev->dev,
  1561. REO_QUEUE_REF_ML_TABLE_SIZE,
  1562. hal->reo_qref.mlo_reo_qref_table_vaddr,
  1563. hal->reo_qref.mlo_reo_qref_table_paddr, 0);
  1564. qdf_mem_free_consistent(hal->qdf_dev, hal->qdf_dev->dev,
  1565. REO_QUEUE_REF_NON_ML_TABLE_SIZE,
  1566. hal->reo_qref.non_mlo_reo_qref_table_vaddr,
  1567. hal->reo_qref.non_mlo_reo_qref_table_paddr, 0);
  1568. }
  1569. #endif
  1570. #endif /* _HAL_BE_GENERIC_API_H_ */