dp_rx.c 56 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #ifdef RX_DESC_DEBUG_CHECK
  31. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  32. {
  33. rx_desc->magic = DP_RX_DESC_MAGIC;
  34. rx_desc->nbuf = nbuf;
  35. }
  36. #else
  37. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  38. {
  39. rx_desc->nbuf = nbuf;
  40. }
  41. #endif
  42. #ifdef CONFIG_WIN
  43. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  44. {
  45. return vdev->ap_bridge_enabled;
  46. }
  47. #else
  48. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  49. {
  50. if (vdev->opmode != wlan_op_mode_sta)
  51. return true;
  52. else
  53. return false;
  54. }
  55. #endif
  56. /*
  57. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  58. *
  59. * @soc: core txrx main context
  60. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  61. * @ring_desc: opaque pointer to the RX ring descriptor
  62. * @rx_desc: host rs descriptor
  63. *
  64. * Return: void
  65. */
  66. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  67. void *ring_desc, struct dp_rx_desc *rx_desc)
  68. {
  69. void *hal_soc = soc->hal_soc;
  70. dp_rx_desc_dump(rx_desc);
  71. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  72. hal_srng_dump_ring(hal_soc, hal_ring);
  73. qdf_assert_always(rx_desc->in_use);
  74. }
  75. /*
  76. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  77. * called during dp rx initialization
  78. * and at the end of dp_rx_process.
  79. *
  80. * @soc: core txrx main context
  81. * @mac_id: mac_id which is one of 3 mac_ids
  82. * @dp_rxdma_srng: dp rxdma circular ring
  83. * @rx_desc_pool: Pointer to free Rx descriptor pool
  84. * @num_req_buffers: number of buffer to be replenished
  85. * @desc_list: list of descs if called from dp_rx_process
  86. * or NULL during dp rx initialization or out of buffer
  87. * interrupt.
  88. * @tail: tail of descs list
  89. * Return: return success or failure
  90. */
  91. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  92. struct dp_srng *dp_rxdma_srng,
  93. struct rx_desc_pool *rx_desc_pool,
  94. uint32_t num_req_buffers,
  95. union dp_rx_desc_list_elem_t **desc_list,
  96. union dp_rx_desc_list_elem_t **tail)
  97. {
  98. uint32_t num_alloc_desc;
  99. uint16_t num_desc_to_free = 0;
  100. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  101. uint32_t num_entries_avail;
  102. uint32_t count;
  103. int sync_hw_ptr = 1;
  104. qdf_dma_addr_t paddr;
  105. qdf_nbuf_t rx_netbuf;
  106. void *rxdma_ring_entry;
  107. union dp_rx_desc_list_elem_t *next;
  108. QDF_STATUS ret;
  109. void *rxdma_srng;
  110. rxdma_srng = dp_rxdma_srng->hal_srng;
  111. if (!rxdma_srng) {
  112. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  113. "rxdma srng not initialized");
  114. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  115. return QDF_STATUS_E_FAILURE;
  116. }
  117. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  118. "requested %d buffers for replenish", num_req_buffers);
  119. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  120. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  121. rxdma_srng,
  122. sync_hw_ptr);
  123. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  124. "no of available entries in rxdma ring: %d",
  125. num_entries_avail);
  126. if (!(*desc_list) && (num_entries_avail >
  127. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  128. num_req_buffers = num_entries_avail;
  129. } else if (num_entries_avail < num_req_buffers) {
  130. num_desc_to_free = num_req_buffers - num_entries_avail;
  131. num_req_buffers = num_entries_avail;
  132. }
  133. if (qdf_unlikely(!num_req_buffers)) {
  134. num_desc_to_free = num_req_buffers;
  135. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  136. goto free_descs;
  137. }
  138. /*
  139. * if desc_list is NULL, allocate the descs from freelist
  140. */
  141. if (!(*desc_list)) {
  142. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  143. rx_desc_pool,
  144. num_req_buffers,
  145. desc_list,
  146. tail);
  147. if (!num_alloc_desc) {
  148. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  149. "no free rx_descs in freelist");
  150. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  151. num_req_buffers);
  152. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  153. return QDF_STATUS_E_NOMEM;
  154. }
  155. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  156. "%d rx desc allocated", num_alloc_desc);
  157. num_req_buffers = num_alloc_desc;
  158. }
  159. count = 0;
  160. while (count < num_req_buffers) {
  161. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  162. RX_BUFFER_SIZE,
  163. RX_BUFFER_RESERVATION,
  164. RX_BUFFER_ALIGNMENT,
  165. FALSE);
  166. if (rx_netbuf == NULL) {
  167. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  168. continue;
  169. }
  170. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  171. QDF_DMA_BIDIRECTIONAL);
  172. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  173. qdf_nbuf_free(rx_netbuf);
  174. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  175. continue;
  176. }
  177. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  178. /*
  179. * check if the physical address of nbuf->data is
  180. * less then 0x50000000 then free the nbuf and try
  181. * allocating new nbuf. We can try for 100 times.
  182. * this is a temp WAR till we fix it properly.
  183. */
  184. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  185. if (ret == QDF_STATUS_E_FAILURE) {
  186. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  187. break;
  188. }
  189. count++;
  190. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  191. rxdma_srng);
  192. qdf_assert_always(rxdma_ring_entry);
  193. next = (*desc_list)->next;
  194. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  195. (*desc_list)->rx_desc.in_use = 1;
  196. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  197. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  198. (unsigned long long)paddr,
  199. (*desc_list)->rx_desc.cookie);
  200. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  201. (*desc_list)->rx_desc.cookie,
  202. rx_desc_pool->owner);
  203. *desc_list = next;
  204. }
  205. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  206. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  207. num_req_buffers, num_desc_to_free);
  208. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, num_req_buffers,
  209. (RX_BUFFER_SIZE * num_req_buffers));
  210. free_descs:
  211. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  212. /*
  213. * add any available free desc back to the free list
  214. */
  215. if (*desc_list)
  216. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  217. mac_id, rx_desc_pool);
  218. return QDF_STATUS_SUCCESS;
  219. }
  220. /*
  221. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  222. * pkts to RAW mode simulation to
  223. * decapsulate the pkt.
  224. *
  225. * @vdev: vdev on which RAW mode is enabled
  226. * @nbuf_list: list of RAW pkts to process
  227. * @peer: peer object from which the pkt is rx
  228. *
  229. * Return: void
  230. */
  231. void
  232. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  233. struct dp_peer *peer)
  234. {
  235. qdf_nbuf_t deliver_list_head = NULL;
  236. qdf_nbuf_t deliver_list_tail = NULL;
  237. qdf_nbuf_t nbuf;
  238. nbuf = nbuf_list;
  239. while (nbuf) {
  240. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  241. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  242. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  243. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  244. /*
  245. * reset the chfrag_start and chfrag_end bits in nbuf cb
  246. * as this is a non-amsdu pkt and RAW mode simulation expects
  247. * these bit s to be 0 for non-amsdu pkt.
  248. */
  249. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  250. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  251. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  252. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  253. }
  254. nbuf = next;
  255. }
  256. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  257. &deliver_list_tail, (struct cdp_peer*) peer);
  258. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  259. }
  260. #ifdef DP_LFR
  261. /*
  262. * In case of LFR, data of a new peer might be sent up
  263. * even before peer is added.
  264. */
  265. static inline struct dp_vdev *
  266. dp_get_vdev_from_peer(struct dp_soc *soc,
  267. uint16_t peer_id,
  268. struct dp_peer *peer,
  269. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  270. {
  271. struct dp_vdev *vdev;
  272. uint8_t vdev_id;
  273. if (unlikely(!peer)) {
  274. if (peer_id != HTT_INVALID_PEER) {
  275. vdev_id = DP_PEER_METADATA_ID_GET(
  276. mpdu_desc_info.peer_meta_data);
  277. QDF_TRACE(QDF_MODULE_ID_DP,
  278. QDF_TRACE_LEVEL_DEBUG,
  279. FL("PeerID %d not found use vdevID %d"),
  280. peer_id, vdev_id);
  281. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  282. vdev_id);
  283. } else {
  284. QDF_TRACE(QDF_MODULE_ID_DP,
  285. QDF_TRACE_LEVEL_DEBUG,
  286. FL("Invalid PeerID %d"),
  287. peer_id);
  288. return NULL;
  289. }
  290. } else {
  291. vdev = peer->vdev;
  292. }
  293. return vdev;
  294. }
  295. #else
  296. static inline struct dp_vdev *
  297. dp_get_vdev_from_peer(struct dp_soc *soc,
  298. uint16_t peer_id,
  299. struct dp_peer *peer,
  300. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  301. {
  302. if (unlikely(!peer)) {
  303. QDF_TRACE(QDF_MODULE_ID_DP,
  304. QDF_TRACE_LEVEL_DEBUG,
  305. FL("Peer not found for peerID %d"),
  306. peer_id);
  307. return NULL;
  308. } else {
  309. return peer->vdev;
  310. }
  311. }
  312. #endif
  313. /**
  314. * dp_rx_da_learn() - Add AST entry based on DA lookup
  315. * This is a WAR for HK 1.0 and will
  316. * be removed in HK 2.0
  317. *
  318. * @soc: core txrx main context
  319. * @rx_tlv_hdr : start address of rx tlvs
  320. * @ta_peer : Transmitter peer entry
  321. * @nbuf : nbuf to retrieve destination mac for which AST will be added
  322. *
  323. */
  324. #ifdef FEATURE_WDS
  325. static void
  326. dp_rx_da_learn(struct dp_soc *soc,
  327. uint8_t *rx_tlv_hdr,
  328. struct dp_peer *ta_peer,
  329. qdf_nbuf_t nbuf)
  330. {
  331. /* For HKv2 DA port learing is not needed */
  332. if (qdf_likely(soc->ast_override_support))
  333. return;
  334. if (qdf_unlikely(!ta_peer))
  335. return;
  336. if (qdf_unlikely(ta_peer->vdev->opmode != wlan_op_mode_ap))
  337. return;
  338. if (!soc->da_war_enabled)
  339. return;
  340. if (qdf_unlikely(!hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  341. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  342. dp_peer_add_ast(soc,
  343. ta_peer,
  344. qdf_nbuf_data(nbuf),
  345. CDP_TXRX_AST_TYPE_DA,
  346. IEEE80211_NODE_F_WDS_HM);
  347. }
  348. }
  349. #else
  350. static void
  351. dp_rx_da_learn(struct dp_soc *soc,
  352. uint8_t *rx_tlv_hdr,
  353. struct dp_peer *ta_peer,
  354. qdf_nbuf_t nbuf)
  355. {
  356. }
  357. #endif
  358. /**
  359. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  360. *
  361. * @soc: core txrx main context
  362. * @ta_peer : source peer entry
  363. * @rx_tlv_hdr : start address of rx tlvs
  364. * @nbuf : nbuf that has to be intrabss forwarded
  365. *
  366. * Return: bool: true if it is forwarded else false
  367. */
  368. static bool
  369. dp_rx_intrabss_fwd(struct dp_soc *soc,
  370. struct dp_peer *ta_peer,
  371. uint8_t *rx_tlv_hdr,
  372. qdf_nbuf_t nbuf)
  373. {
  374. uint16_t da_idx;
  375. uint16_t len;
  376. struct dp_peer *da_peer;
  377. struct dp_ast_entry *ast_entry;
  378. qdf_nbuf_t nbuf_copy;
  379. uint8_t tid = qdf_nbuf_get_priority(nbuf);
  380. struct cdp_tid_rx_stats *tid_stats =
  381. &ta_peer->vdev->pdev->stats.tid_stats.tid_rx_stats[tid];
  382. /* check if the destination peer is available in peer table
  383. * and also check if the source peer and destination peer
  384. * belong to the same vap and destination peer is not bss peer.
  385. */
  386. if ((hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  387. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  388. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  389. ast_entry = soc->ast_table[da_idx];
  390. if (!ast_entry)
  391. return false;
  392. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  393. ast_entry->is_active = TRUE;
  394. return false;
  395. }
  396. da_peer = ast_entry->peer;
  397. if (!da_peer)
  398. return false;
  399. /* TA peer cannot be same as peer(DA) on which AST is present
  400. * this indicates a change in topology and that AST entries
  401. * are yet to be updated.
  402. */
  403. if (da_peer == ta_peer)
  404. return false;
  405. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  406. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  407. len = qdf_nbuf_len(nbuf);
  408. /* linearize the nbuf just before we send to
  409. * dp_tx_send()
  410. */
  411. if (qdf_unlikely(qdf_nbuf_get_ext_list(nbuf))) {
  412. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  413. return false;
  414. nbuf = qdf_nbuf_unshare(nbuf);
  415. if (!nbuf) {
  416. DP_STATS_INC_PKT(ta_peer,
  417. rx.intra_bss.fail,
  418. 1,
  419. len);
  420. /* return true even though the pkt is
  421. * not forwarded. Basically skb_unshare
  422. * failed and we want to continue with
  423. * next nbuf.
  424. */
  425. tid_stats->fail_cnt[INTRABSS_DROP]++;
  426. return true;
  427. }
  428. }
  429. if (!dp_tx_send(ta_peer->vdev, nbuf)) {
  430. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  431. len);
  432. return true;
  433. } else {
  434. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  435. len);
  436. tid_stats->fail_cnt[INTRABSS_DROP]++;
  437. return false;
  438. }
  439. }
  440. }
  441. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  442. * source, then clone the pkt and send the cloned pkt for
  443. * intra BSS forwarding and original pkt up the network stack
  444. * Note: how do we handle multicast pkts. do we forward
  445. * all multicast pkts as is or let a higher layer module
  446. * like igmpsnoop decide whether to forward or not with
  447. * Mcast enhancement.
  448. */
  449. else if (qdf_unlikely((hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  450. !ta_peer->bss_peer))) {
  451. nbuf_copy = qdf_nbuf_copy(nbuf);
  452. if (!nbuf_copy)
  453. return false;
  454. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  455. len = qdf_nbuf_len(nbuf_copy);
  456. if (dp_tx_send(ta_peer->vdev, nbuf_copy)) {
  457. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  458. tid_stats->fail_cnt[INTRABSS_DROP]++;
  459. qdf_nbuf_free(nbuf_copy);
  460. } else {
  461. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  462. tid_stats->intrabss_cnt++;
  463. }
  464. }
  465. /* return false as we have to still send the original pkt
  466. * up the stack
  467. */
  468. return false;
  469. }
  470. #ifdef MESH_MODE_SUPPORT
  471. /**
  472. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  473. *
  474. * @vdev: DP Virtual device handle
  475. * @nbuf: Buffer pointer
  476. * @rx_tlv_hdr: start of rx tlv header
  477. * @peer: pointer to peer
  478. *
  479. * This function allocated memory for mesh receive stats and fill the
  480. * required stats. Stores the memory address in skb cb.
  481. *
  482. * Return: void
  483. */
  484. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  485. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  486. {
  487. struct mesh_recv_hdr_s *rx_info = NULL;
  488. uint32_t pkt_type;
  489. uint32_t nss;
  490. uint32_t rate_mcs;
  491. uint32_t bw;
  492. /* fill recv mesh stats */
  493. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  494. /* upper layers are resposible to free this memory */
  495. if (rx_info == NULL) {
  496. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  497. "Memory allocation failed for mesh rx stats");
  498. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  499. return;
  500. }
  501. rx_info->rs_flags = MESH_RXHDR_VER1;
  502. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  503. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  504. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  505. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  506. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  507. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  508. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  509. if (vdev->osif_get_key)
  510. vdev->osif_get_key(vdev->osif_vdev,
  511. &rx_info->rs_decryptkey[0],
  512. &peer->mac_addr.raw[0],
  513. rx_info->rs_keyix);
  514. }
  515. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  516. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  517. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  518. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  519. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  520. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  521. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  522. (bw << 24);
  523. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  524. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  525. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  526. rx_info->rs_flags,
  527. rx_info->rs_rssi,
  528. rx_info->rs_channel,
  529. rx_info->rs_ratephy1,
  530. rx_info->rs_keyix);
  531. }
  532. /**
  533. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  534. *
  535. * @vdev: DP Virtual device handle
  536. * @nbuf: Buffer pointer
  537. * @rx_tlv_hdr: start of rx tlv header
  538. *
  539. * This checks if the received packet is matching any filter out
  540. * catogery and and drop the packet if it matches.
  541. *
  542. * Return: status(0 indicates drop, 1 indicate to no drop)
  543. */
  544. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  545. uint8_t *rx_tlv_hdr)
  546. {
  547. union dp_align_mac_addr mac_addr;
  548. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  549. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  550. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  551. return QDF_STATUS_SUCCESS;
  552. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  553. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  554. return QDF_STATUS_SUCCESS;
  555. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  556. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  557. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  558. return QDF_STATUS_SUCCESS;
  559. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  560. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  561. &mac_addr.raw[0]))
  562. return QDF_STATUS_E_FAILURE;
  563. if (!qdf_mem_cmp(&mac_addr.raw[0],
  564. &vdev->mac_addr.raw[0],
  565. DP_MAC_ADDR_LEN))
  566. return QDF_STATUS_SUCCESS;
  567. }
  568. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  569. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  570. &mac_addr.raw[0]))
  571. return QDF_STATUS_E_FAILURE;
  572. if (!qdf_mem_cmp(&mac_addr.raw[0],
  573. &vdev->mac_addr.raw[0],
  574. DP_MAC_ADDR_LEN))
  575. return QDF_STATUS_SUCCESS;
  576. }
  577. }
  578. return QDF_STATUS_E_FAILURE;
  579. }
  580. #else
  581. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  582. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  583. {
  584. }
  585. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  586. uint8_t *rx_tlv_hdr)
  587. {
  588. return QDF_STATUS_E_FAILURE;
  589. }
  590. #endif
  591. #ifdef CONFIG_WIN
  592. /**
  593. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  594. * clients
  595. * @pdev: DP pdev handle
  596. * @rx_pkt_hdr: Rx packet Header
  597. *
  598. * return: dp_vdev*
  599. */
  600. static
  601. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  602. uint8_t *rx_pkt_hdr)
  603. {
  604. struct ieee80211_frame *wh;
  605. struct dp_neighbour_peer *peer = NULL;
  606. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  607. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  608. return NULL;
  609. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  610. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  611. neighbour_peer_list_elem) {
  612. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  613. wh->i_addr2, DP_MAC_ADDR_LEN) == 0) {
  614. QDF_TRACE(
  615. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  616. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  617. peer->neighbour_peers_macaddr.raw[0],
  618. peer->neighbour_peers_macaddr.raw[1],
  619. peer->neighbour_peers_macaddr.raw[2],
  620. peer->neighbour_peers_macaddr.raw[3],
  621. peer->neighbour_peers_macaddr.raw[4],
  622. peer->neighbour_peers_macaddr.raw[5]);
  623. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  624. return pdev->monitor_vdev;
  625. }
  626. }
  627. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  628. return NULL;
  629. }
  630. /**
  631. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  632. * @soc: DP SOC handle
  633. * @mpdu: mpdu for which peer is invalid
  634. *
  635. * return: integer type
  636. */
  637. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  638. {
  639. struct dp_invalid_peer_msg msg;
  640. struct dp_vdev *vdev = NULL;
  641. struct dp_pdev *pdev = NULL;
  642. struct ieee80211_frame *wh;
  643. uint8_t i;
  644. qdf_nbuf_t curr_nbuf, next_nbuf;
  645. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  646. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  647. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  648. if (!DP_FRAME_IS_DATA(wh)) {
  649. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  650. "NAWDS valid only for data frames");
  651. goto free;
  652. }
  653. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  654. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  655. "Invalid nbuf length");
  656. goto free;
  657. }
  658. for (i = 0; i < MAX_PDEV_CNT; i++) {
  659. pdev = soc->pdev_list[i];
  660. if (!pdev) {
  661. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  662. "PDEV not found");
  663. continue;
  664. }
  665. if (pdev->filter_neighbour_peers) {
  666. /* Next Hop scenario not yet handle */
  667. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  668. if (vdev) {
  669. dp_rx_mon_deliver(soc, i,
  670. pdev->invalid_peer_head_msdu,
  671. pdev->invalid_peer_tail_msdu);
  672. pdev->invalid_peer_head_msdu = NULL;
  673. pdev->invalid_peer_tail_msdu = NULL;
  674. return 0;
  675. }
  676. }
  677. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  678. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  679. DP_MAC_ADDR_LEN) == 0) {
  680. goto out;
  681. }
  682. }
  683. }
  684. if (!vdev) {
  685. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  686. "VDEV not found");
  687. goto free;
  688. }
  689. out:
  690. msg.wh = wh;
  691. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  692. msg.nbuf = mpdu;
  693. msg.vdev_id = vdev->vdev_id;
  694. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  695. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  696. &msg);
  697. free:
  698. /* Drop and free packet */
  699. curr_nbuf = mpdu;
  700. while (curr_nbuf) {
  701. next_nbuf = qdf_nbuf_next(curr_nbuf);
  702. qdf_nbuf_free(curr_nbuf);
  703. curr_nbuf = next_nbuf;
  704. }
  705. return 0;
  706. }
  707. /**
  708. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  709. * @soc: DP SOC handle
  710. * @mpdu: mpdu for which peer is invalid
  711. * @mpdu_done: if an mpdu is completed
  712. *
  713. * return: integer type
  714. */
  715. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  716. qdf_nbuf_t mpdu, bool mpdu_done)
  717. {
  718. /* Only trigger the process when mpdu is completed */
  719. if (mpdu_done)
  720. dp_rx_process_invalid_peer(soc, mpdu);
  721. }
  722. #else
  723. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  724. {
  725. qdf_nbuf_t curr_nbuf, next_nbuf;
  726. struct dp_pdev *pdev;
  727. uint8_t i;
  728. struct dp_vdev *vdev = NULL;
  729. struct ieee80211_frame *wh;
  730. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  731. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  732. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  733. if (!DP_FRAME_IS_DATA(wh)) {
  734. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  735. "only for data frames");
  736. goto free;
  737. }
  738. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  739. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  740. "Invalid nbuf length");
  741. goto free;
  742. }
  743. for (i = 0; i < MAX_PDEV_CNT; i++) {
  744. pdev = soc->pdev_list[i];
  745. if (!pdev) {
  746. QDF_TRACE(QDF_MODULE_ID_DP,
  747. QDF_TRACE_LEVEL_ERROR,
  748. "PDEV not found");
  749. continue;
  750. }
  751. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  752. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  753. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  754. DP_MAC_ADDR_LEN) == 0) {
  755. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  756. goto out;
  757. }
  758. }
  759. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  760. }
  761. if (NULL == vdev) {
  762. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  763. "VDEV not found");
  764. goto free;
  765. }
  766. out:
  767. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  768. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  769. free:
  770. /* reset the head and tail pointers */
  771. for (i = 0; i < MAX_PDEV_CNT; i++) {
  772. pdev = soc->pdev_list[i];
  773. if (!pdev) {
  774. QDF_TRACE(QDF_MODULE_ID_DP,
  775. QDF_TRACE_LEVEL_ERROR,
  776. "PDEV not found");
  777. continue;
  778. }
  779. pdev->invalid_peer_head_msdu = NULL;
  780. pdev->invalid_peer_tail_msdu = NULL;
  781. }
  782. /* Drop and free packet */
  783. curr_nbuf = mpdu;
  784. while (curr_nbuf) {
  785. next_nbuf = qdf_nbuf_next(curr_nbuf);
  786. qdf_nbuf_free(curr_nbuf);
  787. curr_nbuf = next_nbuf;
  788. }
  789. return 0;
  790. }
  791. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  792. qdf_nbuf_t mpdu, bool mpdu_done)
  793. {
  794. /* Process the nbuf */
  795. dp_rx_process_invalid_peer(soc, mpdu);
  796. }
  797. #endif
  798. #ifdef RECEIVE_OFFLOAD
  799. /**
  800. * dp_rx_print_offload_info() - Print offload info from RX TLV
  801. * @rx_tlv: RX TLV for which offload information is to be printed
  802. *
  803. * Return: None
  804. */
  805. static void dp_rx_print_offload_info(uint8_t *rx_tlv)
  806. {
  807. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  808. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  809. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  810. dp_verbose_debug("chksum 0x%x", HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  811. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  812. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  813. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  814. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  815. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  816. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  817. dp_verbose_debug("---------------------------------------------------------");
  818. }
  819. /**
  820. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  821. * @soc: DP SOC handle
  822. * @rx_tlv: RX TLV received for the msdu
  823. * @msdu: msdu for which GRO info needs to be filled
  824. *
  825. * Return: None
  826. */
  827. static
  828. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  829. qdf_nbuf_t msdu)
  830. {
  831. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  832. return;
  833. /* Filling up RX offload info only for TCP packets */
  834. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  835. return;
  836. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  837. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  838. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  839. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  840. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  841. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  842. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  843. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  844. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  845. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  846. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  847. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  848. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  849. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  850. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  851. HAL_RX_TLV_GET_IPV6(rx_tlv);
  852. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  853. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  854. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  855. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  856. dp_rx_print_offload_info(rx_tlv);
  857. }
  858. #else
  859. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  860. qdf_nbuf_t msdu)
  861. {
  862. }
  863. #endif /* RECEIVE_OFFLOAD */
  864. /**
  865. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  866. *
  867. * @nbuf: pointer to msdu.
  868. * @mpdu_len: mpdu length
  869. *
  870. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  871. */
  872. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  873. {
  874. bool last_nbuf;
  875. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  876. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  877. last_nbuf = false;
  878. } else {
  879. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  880. last_nbuf = true;
  881. }
  882. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  883. return last_nbuf;
  884. }
  885. /**
  886. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  887. * multiple nbufs.
  888. * @nbuf: pointer to the first msdu of an amsdu.
  889. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  890. *
  891. *
  892. * This function implements the creation of RX frag_list for cases
  893. * where an MSDU is spread across multiple nbufs.
  894. *
  895. * Return: returns the head nbuf which contains complete frag_list.
  896. */
  897. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  898. {
  899. qdf_nbuf_t parent, next, frag_list;
  900. uint16_t frag_list_len = 0;
  901. uint16_t mpdu_len;
  902. bool last_nbuf;
  903. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  904. /*
  905. * this is a case where the complete msdu fits in one single nbuf.
  906. * in this case HW sets both start and end bit and we only need to
  907. * reset these bits for RAW mode simulator to decap the pkt
  908. */
  909. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  910. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  911. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  912. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  913. return nbuf;
  914. }
  915. /*
  916. * This is a case where we have multiple msdus (A-MSDU) spread across
  917. * multiple nbufs. here we create a fraglist out of these nbufs.
  918. *
  919. * the moment we encounter a nbuf with continuation bit set we
  920. * know for sure we have an MSDU which is spread across multiple
  921. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  922. */
  923. parent = nbuf;
  924. frag_list = nbuf->next;
  925. nbuf = nbuf->next;
  926. /*
  927. * set the start bit in the first nbuf we encounter with continuation
  928. * bit set. This has the proper mpdu length set as it is the first
  929. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  930. * nbufs will form the frag_list of the parent nbuf.
  931. */
  932. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  933. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  934. /*
  935. * this is where we set the length of the fragments which are
  936. * associated to the parent nbuf. We iterate through the frag_list
  937. * till we hit the last_nbuf of the list.
  938. */
  939. do {
  940. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  941. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  942. frag_list_len += qdf_nbuf_len(nbuf);
  943. if (last_nbuf) {
  944. next = nbuf->next;
  945. nbuf->next = NULL;
  946. break;
  947. }
  948. nbuf = nbuf->next;
  949. } while (!last_nbuf);
  950. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  951. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  952. parent->next = next;
  953. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  954. return parent;
  955. }
  956. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  957. struct dp_peer *peer,
  958. qdf_nbuf_t nbuf_head,
  959. qdf_nbuf_t nbuf_tail)
  960. {
  961. struct cdp_tid_rx_stats *stats = NULL;
  962. uint8_t tid = 0;
  963. /*
  964. * highly unlikely to have a vdev without a registered rx
  965. * callback function. if so let us free the nbuf_list.
  966. */
  967. if (qdf_unlikely(!vdev->osif_rx)) {
  968. qdf_nbuf_t nbuf;
  969. do {
  970. nbuf = nbuf_head;
  971. nbuf_head = nbuf_head->next;
  972. tid = qdf_nbuf_get_priority(nbuf);
  973. stats = &vdev->pdev->stats.tid_stats.tid_rx_stats[tid];
  974. stats->fail_cnt[INVALID_PEER_VDEV]++;
  975. stats->delivered_to_stack--;
  976. qdf_nbuf_free(nbuf);
  977. } while (nbuf_head);
  978. return;
  979. }
  980. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  981. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  982. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  983. &nbuf_tail, (struct cdp_peer *) peer);
  984. }
  985. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  986. }
  987. /**
  988. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  989. * @nbuf: pointer to the first msdu of an amsdu.
  990. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  991. *
  992. * The ipsumed field of the skb is set based on whether HW validated the
  993. * IP/TCP/UDP checksum.
  994. *
  995. * Return: void
  996. */
  997. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  998. qdf_nbuf_t nbuf,
  999. uint8_t *rx_tlv_hdr)
  1000. {
  1001. qdf_nbuf_rx_cksum_t cksum = {0};
  1002. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1003. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1004. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1005. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1006. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1007. } else {
  1008. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1009. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1010. }
  1011. }
  1012. /**
  1013. * dp_rx_msdu_stats_update() - update per msdu stats.
  1014. * @soc: core txrx main context
  1015. * @nbuf: pointer to the first msdu of an amsdu.
  1016. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1017. * @peer: pointer to the peer object.
  1018. * @ring_id: reo dest ring number on which pkt is reaped.
  1019. *
  1020. * update all the per msdu stats for that nbuf.
  1021. * Return: void
  1022. */
  1023. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1024. qdf_nbuf_t nbuf,
  1025. uint8_t *rx_tlv_hdr,
  1026. struct dp_peer *peer,
  1027. uint8_t ring_id)
  1028. {
  1029. bool is_ampdu, is_not_amsdu;
  1030. uint16_t peer_id;
  1031. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1032. struct dp_vdev *vdev = peer->vdev;
  1033. qdf_ether_header_t *eh;
  1034. uint16_t msdu_len = qdf_nbuf_len(nbuf);
  1035. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  1036. hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr));
  1037. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1038. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1039. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1040. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1041. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1042. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  1043. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1044. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1045. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1046. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1047. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1048. }
  1049. }
  1050. /*
  1051. * currently we can return from here as we have similar stats
  1052. * updated at per ppdu level instead of msdu level
  1053. */
  1054. if (!soc->process_rx_status)
  1055. return;
  1056. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1057. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1058. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1059. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1060. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1061. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  1062. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1063. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1064. rx_tlv_hdr);
  1065. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1066. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1067. DP_STATS_INC(peer, rx.bw[bw], 1);
  1068. DP_STATS_INC(peer, rx.nss[nss], 1);
  1069. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1070. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1071. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1072. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1073. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1074. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1075. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1076. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1077. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1078. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1079. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1080. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1081. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1082. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1083. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1084. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1085. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1086. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1087. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1088. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1089. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1090. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1091. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1092. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1093. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1094. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1095. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1096. if ((soc->process_rx_status) &&
  1097. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1098. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1099. if (!vdev->pdev)
  1100. return;
  1101. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1102. &peer->stats, peer_id,
  1103. UPDATE_PEER_STATS,
  1104. vdev->pdev->pdev_id);
  1105. #endif
  1106. }
  1107. }
  1108. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1109. void *rx_tlv_hdr)
  1110. {
  1111. if ((hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr) &&
  1112. (hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr) >
  1113. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1114. (hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  1115. (hal_rx_msdu_end_da_idx_get(soc->hal_soc,
  1116. rx_tlv_hdr) >
  1117. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1118. return false;
  1119. return true;
  1120. }
  1121. #ifdef WDS_VENDOR_EXTENSION
  1122. int dp_wds_rx_policy_check(
  1123. uint8_t *rx_tlv_hdr,
  1124. struct dp_vdev *vdev,
  1125. struct dp_peer *peer,
  1126. int rx_mcast
  1127. )
  1128. {
  1129. struct dp_peer *bss_peer;
  1130. int fr_ds, to_ds, rx_3addr, rx_4addr;
  1131. int rx_policy_ucast, rx_policy_mcast;
  1132. if (vdev->opmode == wlan_op_mode_ap) {
  1133. TAILQ_FOREACH(bss_peer, &vdev->peer_list, peer_list_elem) {
  1134. if (bss_peer->bss_peer) {
  1135. /* if wds policy check is not enabled on this vdev, accept all frames */
  1136. if (!bss_peer->wds_ecm.wds_rx_filter) {
  1137. return 1;
  1138. }
  1139. break;
  1140. }
  1141. }
  1142. rx_policy_ucast = bss_peer->wds_ecm.wds_rx_ucast_4addr;
  1143. rx_policy_mcast = bss_peer->wds_ecm.wds_rx_mcast_4addr;
  1144. } else { /* sta mode */
  1145. if (!peer->wds_ecm.wds_rx_filter) {
  1146. return 1;
  1147. }
  1148. rx_policy_ucast = peer->wds_ecm.wds_rx_ucast_4addr;
  1149. rx_policy_mcast = peer->wds_ecm.wds_rx_mcast_4addr;
  1150. }
  1151. /* ------------------------------------------------
  1152. * self
  1153. * peer- rx rx-
  1154. * wds ucast mcast dir policy accept note
  1155. * ------------------------------------------------
  1156. * 1 1 0 11 x1 1 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint met; so, accept
  1157. * 1 1 0 01 x1 0 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint not met; so, drop
  1158. * 1 1 0 10 x1 0 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint not met; so, drop
  1159. * 1 1 0 00 x1 0 bad frame, won't see it
  1160. * 1 0 1 11 1x 1 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint met; so, accept
  1161. * 1 0 1 01 1x 0 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint not met; so, drop
  1162. * 1 0 1 10 1x 0 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint not met; so, drop
  1163. * 1 0 1 00 1x 0 bad frame, won't see it
  1164. * 1 1 0 11 x0 0 AP configured to accept from-ds Rx ucast from wds peers, constraint not met; so, drop
  1165. * 1 1 0 01 x0 0 AP configured to accept from-ds Rx ucast from wds peers, constraint not met; so, drop
  1166. * 1 1 0 10 x0 1 AP configured to accept from-ds Rx ucast from wds peers, constraint met; so, accept
  1167. * 1 1 0 00 x0 0 bad frame, won't see it
  1168. * 1 0 1 11 0x 0 AP configured to accept from-ds Rx mcast from wds peers, constraint not met; so, drop
  1169. * 1 0 1 01 0x 0 AP configured to accept from-ds Rx mcast from wds peers, constraint not met; so, drop
  1170. * 1 0 1 10 0x 1 AP configured to accept from-ds Rx mcast from wds peers, constraint met; so, accept
  1171. * 1 0 1 00 0x 0 bad frame, won't see it
  1172. *
  1173. * 0 x x 11 xx 0 we only accept td-ds Rx frames from non-wds peers in mode.
  1174. * 0 x x 01 xx 1
  1175. * 0 x x 10 xx 0
  1176. * 0 x x 00 xx 0 bad frame, won't see it
  1177. * ------------------------------------------------
  1178. */
  1179. fr_ds = hal_rx_mpdu_get_fr_ds(rx_tlv_hdr);
  1180. to_ds = hal_rx_mpdu_get_to_ds(rx_tlv_hdr);
  1181. rx_3addr = fr_ds ^ to_ds;
  1182. rx_4addr = fr_ds & to_ds;
  1183. if (vdev->opmode == wlan_op_mode_ap) {
  1184. if ((!peer->wds_enabled && rx_3addr && to_ds) ||
  1185. (peer->wds_enabled && !rx_mcast && (rx_4addr == rx_policy_ucast)) ||
  1186. (peer->wds_enabled && rx_mcast && (rx_4addr == rx_policy_mcast))) {
  1187. return 1;
  1188. }
  1189. } else { /* sta mode */
  1190. if ((!rx_mcast && (rx_4addr == rx_policy_ucast)) ||
  1191. (rx_mcast && (rx_4addr == rx_policy_mcast))) {
  1192. return 1;
  1193. }
  1194. }
  1195. return 0;
  1196. }
  1197. #else
  1198. int dp_wds_rx_policy_check(
  1199. uint8_t *rx_tlv_hdr,
  1200. struct dp_vdev *vdev,
  1201. struct dp_peer *peer,
  1202. int rx_mcast
  1203. )
  1204. {
  1205. return 1;
  1206. }
  1207. #endif
  1208. /**
  1209. * dp_rx_process() - Brain of the Rx processing functionality
  1210. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1211. * @soc: core txrx main context
  1212. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1213. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1214. * @quota: No. of units (packets) that can be serviced in one shot.
  1215. *
  1216. * This function implements the core of Rx functionality. This is
  1217. * expected to handle only non-error frames.
  1218. *
  1219. * Return: uint32_t: No. of elements processed
  1220. */
  1221. uint32_t dp_rx_process(struct dp_intr *int_ctx, void *hal_ring,
  1222. uint8_t reo_ring_num, uint32_t quota)
  1223. {
  1224. void *hal_soc;
  1225. void *ring_desc;
  1226. struct dp_rx_desc *rx_desc = NULL;
  1227. qdf_nbuf_t nbuf, next;
  1228. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  1229. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  1230. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1231. uint32_t l2_hdr_offset = 0;
  1232. uint16_t msdu_len = 0;
  1233. uint16_t peer_id;
  1234. struct dp_peer *peer = NULL;
  1235. struct dp_vdev *vdev = NULL;
  1236. uint32_t pkt_len = 0;
  1237. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  1238. struct hal_rx_msdu_desc_info msdu_desc_info = { 0 };
  1239. enum hal_reo_error_status error;
  1240. uint32_t peer_mdata;
  1241. uint8_t *rx_tlv_hdr;
  1242. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1243. uint8_t mac_id = 0;
  1244. struct dp_pdev *pdev;
  1245. struct dp_pdev *rx_pdev;
  1246. struct dp_srng *dp_rxdma_srng;
  1247. struct rx_desc_pool *rx_desc_pool;
  1248. struct dp_soc *soc = int_ctx->soc;
  1249. uint8_t ring_id = 0;
  1250. uint8_t core_id = 0;
  1251. qdf_nbuf_t nbuf_head = NULL;
  1252. qdf_nbuf_t nbuf_tail = NULL;
  1253. qdf_nbuf_t deliver_list_head = NULL;
  1254. qdf_nbuf_t deliver_list_tail = NULL;
  1255. int32_t tid = 0;
  1256. uint32_t dst_num_valid = 0;
  1257. struct cdp_tid_rx_stats *tid_stats;
  1258. DP_HIST_INIT();
  1259. /* Debug -- Remove later */
  1260. qdf_assert(soc && hal_ring);
  1261. hal_soc = soc->hal_soc;
  1262. /* Debug -- Remove later */
  1263. qdf_assert(hal_soc);
  1264. hif_pm_runtime_mark_last_busy(soc->osdev->dev);
  1265. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  1266. /*
  1267. * Need API to convert from hal_ring pointer to
  1268. * Ring Type / Ring Id combo
  1269. */
  1270. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1271. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1272. FL("HAL RING Access Failed -- %pK"), hal_ring);
  1273. hal_srng_access_end(hal_soc, hal_ring);
  1274. goto done;
  1275. }
  1276. /*
  1277. * start reaping the buffers from reo ring and queue
  1278. * them in per vdev queue.
  1279. * Process the received pkts in a different per vdev loop.
  1280. */
  1281. while (qdf_likely(quota)) {
  1282. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring);
  1283. /*
  1284. * in case HW has updated hp after we cached the hp
  1285. * ring_desc can be NULL even there are entries
  1286. * available in the ring. Update the cached_hp
  1287. * and reap the buffers available to read complete
  1288. * mpdu in one reap
  1289. *
  1290. * This is needed for RAW mode we have to read all
  1291. * msdus corresponding to amsdu in one reap to create
  1292. * SG list properly but due to mismatch in cached_hp
  1293. * and actual hp sometimes we are unable to read
  1294. * complete mpdu in one reap.
  1295. */
  1296. if (qdf_unlikely(!ring_desc)) {
  1297. dst_num_valid = hal_srng_dst_num_valid(hal_soc,
  1298. hal_ring,
  1299. true);
  1300. if (dst_num_valid) {
  1301. DP_STATS_INC(soc, rx.hp_oos, 1);
  1302. hal_srng_access_end_unlocked(hal_soc,
  1303. hal_ring);
  1304. continue;
  1305. } else {
  1306. break;
  1307. }
  1308. }
  1309. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1310. ring_id = hal_srng_ring_id_get(hal_ring);
  1311. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1312. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1313. FL("HAL RING 0x%pK:error %d"), hal_ring, error);
  1314. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1315. /* Don't know how to deal with this -- assert */
  1316. qdf_assert(0);
  1317. }
  1318. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1319. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1320. qdf_assert(rx_desc);
  1321. /*
  1322. * this is a unlikely scenario where the host is reaping
  1323. * a descriptor which it already reaped just a while ago
  1324. * but is yet to replenish it back to HW.
  1325. * In this case host will dump the last 128 descriptors
  1326. * including the software descriptor rx_desc and assert.
  1327. */
  1328. if (qdf_unlikely(!rx_desc->in_use)) {
  1329. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1330. dp_rx_dump_info_and_assert(soc, hal_ring,
  1331. ring_desc, rx_desc);
  1332. }
  1333. rx_bufs_reaped[rx_desc->pool_id]++;
  1334. /* TODO */
  1335. /*
  1336. * Need a separate API for unmapping based on
  1337. * phyiscal address
  1338. */
  1339. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1340. QDF_DMA_BIDIRECTIONAL);
  1341. core_id = smp_processor_id();
  1342. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1343. /* Get MPDU DESC info */
  1344. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1345. hal_rx_mpdu_peer_meta_data_set(qdf_nbuf_data(rx_desc->nbuf),
  1346. mpdu_desc_info.peer_meta_data);
  1347. /* Get MSDU DESC info */
  1348. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1349. /*
  1350. * save msdu flags first, last and continuation msdu in
  1351. * nbuf->cb
  1352. */
  1353. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1354. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1355. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1356. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1357. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1358. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1359. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1360. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1361. /*
  1362. * if continuation bit is set then we have MSDU spread
  1363. * across multiple buffers, let us not decrement quota
  1364. * till we reap all buffers of that MSDU.
  1365. */
  1366. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1367. quota -= 1;
  1368. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1369. &tail[rx_desc->pool_id],
  1370. rx_desc);
  1371. }
  1372. done:
  1373. hal_srng_access_end(hal_soc, hal_ring);
  1374. if (nbuf_tail)
  1375. QDF_NBUF_CB_RX_FLUSH_IND(nbuf_tail) = 1;
  1376. /* Update histogram statistics by looping through pdev's */
  1377. DP_RX_HIST_STATS_PER_PDEV();
  1378. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1379. /*
  1380. * continue with next mac_id if no pkts were reaped
  1381. * from that pool
  1382. */
  1383. if (!rx_bufs_reaped[mac_id])
  1384. continue;
  1385. pdev = soc->pdev_list[mac_id];
  1386. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1387. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1388. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1389. rx_desc_pool, rx_bufs_reaped[mac_id],
  1390. &head[mac_id], &tail[mac_id]);
  1391. }
  1392. /* Peer can be NULL is case of LFR */
  1393. if (qdf_likely(peer != NULL))
  1394. vdev = NULL;
  1395. /*
  1396. * BIG loop where each nbuf is dequeued from global queue,
  1397. * processed and queued back on a per vdev basis. These nbufs
  1398. * are sent to stack as and when we run out of nbufs
  1399. * or a new nbuf dequeued from global queue has a different
  1400. * vdev when compared to previous nbuf.
  1401. */
  1402. nbuf = nbuf_head;
  1403. while (nbuf) {
  1404. next = nbuf->next;
  1405. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1406. /* Get TID from first msdu per MPDU, save to skb->priority */
  1407. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1408. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  1409. rx_tlv_hdr);
  1410. DP_RX_TID_SAVE(nbuf, tid);
  1411. /*
  1412. * Check if DMA completed -- msdu_done is the last bit
  1413. * to be written
  1414. */
  1415. rx_pdev = soc->pdev_list[rx_desc->pool_id];
  1416. tid_stats = &rx_pdev->stats.tid_stats.tid_rx_stats[tid];
  1417. if (qdf_unlikely(!hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1418. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1419. FL("MSDU DONE failure"));
  1420. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1421. QDF_TRACE_LEVEL_INFO);
  1422. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1423. qdf_assert(0);
  1424. }
  1425. tid_stats->msdu_cnt++;
  1426. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  1427. tid_stats->mcast_msdu_cnt++;
  1428. if (qdf_nbuf_is_bcast_pkt(nbuf))
  1429. tid_stats->bcast_msdu_cnt++;
  1430. }
  1431. peer_mdata = hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr);
  1432. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1433. peer = dp_peer_find_by_id(soc, peer_id);
  1434. if (peer) {
  1435. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1436. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1437. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1438. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1439. QDF_NBUF_RX_PKT_DATA_TRACK;
  1440. }
  1441. rx_bufs_used++;
  1442. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1443. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1444. deliver_list_tail);
  1445. deliver_list_head = NULL;
  1446. deliver_list_tail = NULL;
  1447. }
  1448. if (qdf_likely(peer != NULL)) {
  1449. vdev = peer->vdev;
  1450. } else {
  1451. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1452. qdf_nbuf_len(nbuf));
  1453. tid_stats->fail_cnt[INVALID_PEER_VDEV]++;
  1454. qdf_nbuf_free(nbuf);
  1455. nbuf = next;
  1456. continue;
  1457. }
  1458. if (qdf_unlikely(vdev == NULL)) {
  1459. tid_stats->fail_cnt[INVALID_PEER_VDEV]++;
  1460. qdf_nbuf_free(nbuf);
  1461. nbuf = next;
  1462. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1463. dp_peer_unref_del_find_by_id(peer);
  1464. continue;
  1465. }
  1466. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1467. /*
  1468. * First IF condition:
  1469. * 802.11 Fragmented pkts are reinjected to REO
  1470. * HW block as SG pkts and for these pkts we only
  1471. * need to pull the RX TLVS header length.
  1472. * Second IF condition:
  1473. * The below condition happens when an MSDU is spread
  1474. * across multiple buffers. This can happen in two cases
  1475. * 1. The nbuf size is smaller then the received msdu.
  1476. * ex: we have set the nbuf size to 2048 during
  1477. * nbuf_alloc. but we received an msdu which is
  1478. * 2304 bytes in size then this msdu is spread
  1479. * across 2 nbufs.
  1480. *
  1481. * 2. AMSDUs when RAW mode is enabled.
  1482. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1483. * across 1st nbuf and 2nd nbuf and last MSDU is
  1484. * spread across 2nd nbuf and 3rd nbuf.
  1485. *
  1486. * for these scenarios let us create a skb frag_list and
  1487. * append these buffers till the last MSDU of the AMSDU
  1488. * Third condition:
  1489. * This is the most likely case, we receive 802.3 pkts
  1490. * decapsulated by HW, here we need to set the pkt length.
  1491. */
  1492. if (qdf_unlikely(qdf_nbuf_get_ext_list(nbuf)))
  1493. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1494. else if (qdf_unlikely(vdev->rx_decap_type ==
  1495. htt_cmn_pkt_type_raw)) {
  1496. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  1497. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1498. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1499. DP_STATS_INC_PKT(peer, rx.raw, 1,
  1500. msdu_len);
  1501. next = nbuf->next;
  1502. } else {
  1503. l2_hdr_offset =
  1504. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1505. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  1506. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1507. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1508. qdf_nbuf_pull_head(nbuf,
  1509. RX_PKT_TLVS_LEN +
  1510. l2_hdr_offset);
  1511. }
  1512. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer,
  1513. hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  1514. QDF_TRACE(QDF_MODULE_ID_DP,
  1515. QDF_TRACE_LEVEL_ERROR,
  1516. FL("Policy Check Drop pkt"));
  1517. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1518. /* Drop & free packet */
  1519. qdf_nbuf_free(nbuf);
  1520. /* Statistics */
  1521. nbuf = next;
  1522. dp_peer_unref_del_find_by_id(peer);
  1523. continue;
  1524. }
  1525. if (qdf_unlikely(peer && peer->bss_peer)) {
  1526. QDF_TRACE(QDF_MODULE_ID_DP,
  1527. QDF_TRACE_LEVEL_ERROR,
  1528. FL("received pkt with same src MAC"));
  1529. tid_stats->fail_cnt[MEC_DROP]++;
  1530. DP_STATS_INC_PKT(peer, rx.mec_drop, 1, msdu_len);
  1531. /* Drop & free packet */
  1532. qdf_nbuf_free(nbuf);
  1533. /* Statistics */
  1534. nbuf = next;
  1535. dp_peer_unref_del_find_by_id(peer);
  1536. continue;
  1537. }
  1538. if (qdf_unlikely(peer && (peer->nawds_enabled == true) &&
  1539. (hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr)) &&
  1540. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) == false))) {
  1541. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1542. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1543. qdf_nbuf_free(nbuf);
  1544. nbuf = next;
  1545. dp_peer_unref_del_find_by_id(peer);
  1546. continue;
  1547. }
  1548. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1549. dp_set_rx_queue(nbuf, ring_id);
  1550. /*
  1551. * HW structures call this L3 header padding --
  1552. * even though this is actually the offset from
  1553. * the buffer beginning where the L2 header
  1554. * begins.
  1555. */
  1556. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1557. FL("rxhash: flow id toeplitz: 0x%x"),
  1558. hal_rx_msdu_start_toeplitz_get(rx_tlv_hdr));
  1559. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer, ring_id);
  1560. if (qdf_unlikely(vdev->mesh_vdev)) {
  1561. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1562. == QDF_STATUS_SUCCESS) {
  1563. QDF_TRACE(QDF_MODULE_ID_DP,
  1564. QDF_TRACE_LEVEL_INFO_MED,
  1565. FL("mesh pkt filtered"));
  1566. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1567. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1568. 1);
  1569. qdf_nbuf_free(nbuf);
  1570. nbuf = next;
  1571. dp_peer_unref_del_find_by_id(peer);
  1572. continue;
  1573. }
  1574. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1575. }
  1576. #ifdef QCA_WIFI_NAPIER_EMULATION_DBG /* Debug code, remove later */
  1577. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1578. "p_id %d msdu_len %d hdr_off %d",
  1579. peer_id, msdu_len, l2_hdr_offset);
  1580. print_hex_dump(KERN_ERR,
  1581. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  1582. qdf_nbuf_data(nbuf), 128, false);
  1583. #endif /* NAPIER_EMULATION */
  1584. if (qdf_likely(vdev->rx_decap_type ==
  1585. htt_cmn_pkt_type_ethernet) &&
  1586. qdf_likely(!vdev->mesh_vdev)) {
  1587. /* WDS Destination Address Learning */
  1588. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1589. /* Due to HW issue, sometimes we see that the sa_idx
  1590. * and da_idx are invalid with sa_valid and da_valid
  1591. * bits set
  1592. *
  1593. * in this case we also see that value of
  1594. * sa_sw_peer_id is set as 0
  1595. *
  1596. * Drop the packet if sa_idx and da_idx OOB or
  1597. * sa_sw_peerid is 0
  1598. */
  1599. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr)) {
  1600. qdf_nbuf_free(nbuf);
  1601. nbuf = next;
  1602. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1603. continue;
  1604. }
  1605. /* WDS Source Port Learning */
  1606. if (vdev->wds_enabled)
  1607. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1608. peer, nbuf);
  1609. /* Intrabss-fwd */
  1610. if (dp_rx_check_ap_bridge(vdev))
  1611. if (dp_rx_intrabss_fwd(soc,
  1612. peer,
  1613. rx_tlv_hdr,
  1614. nbuf)) {
  1615. nbuf = next;
  1616. dp_peer_unref_del_find_by_id(peer);
  1617. tid_stats->intrabss_cnt++;
  1618. continue; /* Get next desc */
  1619. }
  1620. }
  1621. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf);
  1622. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1623. DP_RX_LIST_APPEND(deliver_list_head,
  1624. deliver_list_tail,
  1625. nbuf);
  1626. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1627. qdf_nbuf_len(nbuf));
  1628. tid_stats->delivered_to_stack++;
  1629. nbuf = next;
  1630. dp_peer_unref_del_find_by_id(peer);
  1631. }
  1632. if (deliver_list_head)
  1633. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1634. deliver_list_tail);
  1635. return rx_bufs_used; /* Assume no scale factor for now */
  1636. }
  1637. /**
  1638. * dp_rx_detach() - detach dp rx
  1639. * @pdev: core txrx pdev context
  1640. *
  1641. * This function will detach DP RX into main device context
  1642. * will free DP Rx resources.
  1643. *
  1644. * Return: void
  1645. */
  1646. void
  1647. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1648. {
  1649. uint8_t pdev_id = pdev->pdev_id;
  1650. struct dp_soc *soc = pdev->soc;
  1651. struct rx_desc_pool *rx_desc_pool;
  1652. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1653. if (rx_desc_pool->pool_size != 0) {
  1654. if (!dp_is_soc_reinit(soc))
  1655. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  1656. else
  1657. dp_rx_desc_nbuf_pool_free(soc, rx_desc_pool);
  1658. }
  1659. return;
  1660. }
  1661. /**
  1662. * dp_rx_attach() - attach DP RX
  1663. * @pdev: core txrx pdev context
  1664. *
  1665. * This function will attach a DP RX instance into the main
  1666. * device (SOC) context. Will allocate dp rx resource and
  1667. * initialize resources.
  1668. *
  1669. * Return: QDF_STATUS_SUCCESS: success
  1670. * QDF_STATUS_E_RESOURCES: Error return
  1671. */
  1672. QDF_STATUS
  1673. dp_rx_pdev_attach(struct dp_pdev *pdev)
  1674. {
  1675. uint8_t pdev_id = pdev->pdev_id;
  1676. struct dp_soc *soc = pdev->soc;
  1677. uint32_t rxdma_entries;
  1678. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1679. union dp_rx_desc_list_elem_t *tail = NULL;
  1680. struct dp_srng *dp_rxdma_srng;
  1681. struct rx_desc_pool *rx_desc_pool;
  1682. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  1683. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1684. "nss-wifi<4> skip Rx refil %d", pdev_id);
  1685. return QDF_STATUS_SUCCESS;
  1686. }
  1687. pdev = soc->pdev_list[pdev_id];
  1688. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1689. rxdma_entries = dp_rxdma_srng->num_entries;
  1690. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  1691. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1692. dp_rx_desc_pool_alloc(soc, pdev_id,
  1693. DP_RX_DESC_ALLOC_MULTIPLIER * rxdma_entries,
  1694. rx_desc_pool);
  1695. rx_desc_pool->owner = DP_WBM2SW_RBM;
  1696. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  1697. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng, rx_desc_pool,
  1698. 0, &desc_list, &tail);
  1699. return QDF_STATUS_SUCCESS;
  1700. }
  1701. /*
  1702. * dp_rx_nbuf_prepare() - prepare RX nbuf
  1703. * @soc: core txrx main context
  1704. * @pdev: core txrx pdev context
  1705. *
  1706. * This function alloc & map nbuf for RX dma usage, retry it if failed
  1707. * until retry times reaches max threshold or succeeded.
  1708. *
  1709. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  1710. */
  1711. qdf_nbuf_t
  1712. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  1713. {
  1714. uint8_t *buf;
  1715. int32_t nbuf_retry_count;
  1716. QDF_STATUS ret;
  1717. qdf_nbuf_t nbuf = NULL;
  1718. for (nbuf_retry_count = 0; nbuf_retry_count <
  1719. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  1720. nbuf_retry_count++) {
  1721. /* Allocate a new skb */
  1722. nbuf = qdf_nbuf_alloc(soc->osdev,
  1723. RX_BUFFER_SIZE,
  1724. RX_BUFFER_RESERVATION,
  1725. RX_BUFFER_ALIGNMENT,
  1726. FALSE);
  1727. if (nbuf == NULL) {
  1728. DP_STATS_INC(pdev,
  1729. replenish.nbuf_alloc_fail, 1);
  1730. continue;
  1731. }
  1732. buf = qdf_nbuf_data(nbuf);
  1733. memset(buf, 0, RX_BUFFER_SIZE);
  1734. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  1735. QDF_DMA_BIDIRECTIONAL);
  1736. /* nbuf map failed */
  1737. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1738. qdf_nbuf_free(nbuf);
  1739. DP_STATS_INC(pdev, replenish.map_err, 1);
  1740. continue;
  1741. }
  1742. /* qdf_nbuf alloc and map succeeded */
  1743. break;
  1744. }
  1745. /* qdf_nbuf still alloc or map failed */
  1746. if (qdf_unlikely(nbuf_retry_count >=
  1747. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  1748. return NULL;
  1749. return nbuf;
  1750. }