4db1255f94
Add debug to calculate the time consumed on host during Umac reset handling. Change-Id: I1697f61abf13980182a89ae0674f344f93943b86 CRs-Fixed: 3300163
264 lines
8.7 KiB
C
264 lines
8.7 KiB
C
/*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _DP_UMAC_RESET_H_
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#define _DP_UMAC_RESET_H_
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#include <qdf_types.h>
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struct dp_soc;
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/**
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* enum umac_reset_action - Actions supported by the UMAC reset
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* @UMAC_RESET_ACTION_DO_PRE_RESET: DO_PRE_RESET
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* @UMAC_RESET_ACTION_DO_POST_RESET_START: DO_POST_RESET_START
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* @UMAC_RESET_ACTION_DO_POST_RESET_COMPLETE: DO_POST_RESET_COMPLETE
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* @UMAC_RESET_ACTION_MAX: Maximum actions
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*/
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enum umac_reset_action {
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UMAC_RESET_ACTION_DO_PRE_RESET = 0,
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UMAC_RESET_ACTION_DO_POST_RESET_START = 1,
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UMAC_RESET_ACTION_DO_POST_RESET_COMPLETE = 2,
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UMAC_RESET_ACTION_MAX
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};
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#ifdef DP_UMAC_HW_RESET_SUPPORT
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#define dp_umac_reset_alert(params...) \
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QDF_TRACE_FATAL(QDF_MODULE_ID_DP_UMAC_RESET, params)
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#define dp_umac_reset_err(params...) \
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QDF_TRACE_ERROR(QDF_MODULE_ID_DP_UMAC_RESET, params)
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#define dp_umac_reset_warn(params...) \
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QDF_TRACE_WARN(QDF_MODULE_ID_DP_UMAC_RESET, params)
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#define dp_umac_reset_notice(params...) \
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QDF_TRACE_INFO(QDF_MODULE_ID_DP_UMAC_RESET, params)
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#define dp_umac_reset_info(params...) \
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QDF_TRACE_INFO(QDF_MODULE_ID_DP_UMAC_RESET, params)
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#define dp_umac_reset_debug(params...) \
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QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_UMAC_RESET, params)
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#define DP_UMAC_RESET_SHMEM_ALIGN 8
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#define DP_UMAC_RESET_SHMEM_MAGIC_NUM (0xDEADBEEF)
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/**
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* enum umac_reset_state - States required by the UMAC reset state machine
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* @UMAC_RESET_STATE_WAIT_FOR_DO_PRE_RESET: Waiting for the DO_PRE_RESET event
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* @UMAC_RESET_STATE_DO_PRE_RESET_RECEIVED: Received the DO_PRE_RESET event
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* @UMAC_RESET_STATE_HOST_PRE_RESET_DONE: Host has completed handling the
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* PRE_RESET event
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* @UMAC_RESET_STATE_WAIT_FOR_DO_POST_RESET_START: Waiting for the
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* DO_POST_RESET_START event
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* @UMAC_RESET_STATE_DO_POST_RESET_START_RECEIVED: Received the
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* DO_POST_RESET_START event
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* @UMAC_RESET_STATE_HOST_POST_RESET_START_DONE: Host has completed handling the
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* POST_RESET_START event
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* @UMAC_RESET_STATE_WAIT_FOR_DO_POST_RESET_COMPLETE: Waiting for the
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* DO_POST_RESET_COMPLETE event
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* @UMAC_RESET_STATE_DO_POST_RESET_COMPLETE_RECEIVED: Received the
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* DO_POST_RESET_COMPLETE event
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* @UMAC_RESET_STATE_HOST_POST_RESET_COMPLETE_DONE: Host has completed handling
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* the DO_POST_RESET_COMPLETE event
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*/
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enum umac_reset_state {
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UMAC_RESET_STATE_WAIT_FOR_DO_PRE_RESET = 0,
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UMAC_RESET_STATE_DO_PRE_RESET_RECEIVED,
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UMAC_RESET_STATE_HOST_PRE_RESET_DONE,
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UMAC_RESET_STATE_WAIT_FOR_DO_POST_RESET_START,
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UMAC_RESET_STATE_DO_POST_RESET_START_RECEIVED,
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UMAC_RESET_STATE_HOST_POST_RESET_START_DONE,
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UMAC_RESET_STATE_WAIT_FOR_DO_POST_RESET_COMPLETE,
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UMAC_RESET_STATE_DO_POST_RESET_COMPLETE_RECEIVED,
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UMAC_RESET_STATE_HOST_POST_RESET_COMPLETE_DONE,
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};
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/**
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* enum umac_reset_rx_event - Rx events deduced by the UMAC reset
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* @UMAC_RESET_RX_EVENT_NONE: No event
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* @UMAC_RESET_RX_EVENT_DO_PRE_RESET: DO_PRE_RESET event
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* @UMAC_RESET_RX_EVENT_DO_POST_RESET_START: DO_POST_RESET_START event
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* @UMAC_RESET_RX_EVENT_DO_POST_RESET_COMPELTE: DO_POST_RESET_COMPELTE event
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* @UMAC_RESET_RX_EVENT_ERROR: Error while processing the Rx event
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*/
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enum umac_reset_rx_event {
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UMAC_RESET_RX_EVENT_NONE = 0x0,
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UMAC_RESET_RX_EVENT_DO_PRE_RESET = 0x1,
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UMAC_RESET_RX_EVENT_DO_POST_RESET_START = 0x2,
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UMAC_RESET_RX_EVENT_DO_POST_RESET_COMPELTE = 0x4,
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UMAC_RESET_RX_EVENT_ERROR = 0xFFFFFFFF,
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};
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/**
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* enum umac_reset_tx_cmd: UMAC reset Tx command
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* @UMAC_RESET_TX_CMD_PRE_RESET_DONE: PRE_RESET_DONE
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* @UMAC_RESET_TX_CMD_POST_RESET_START_DONE: POST_RESET_START_DONE
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* @UMAC_RESET_TX_CMD_POST_RESET_COMPLETE_DONE: POST_RESET_COMPLETE_DONE
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*/
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enum umac_reset_tx_cmd {
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UMAC_RESET_TX_CMD_PRE_RESET_DONE,
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UMAC_RESET_TX_CMD_POST_RESET_START_DONE,
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UMAC_RESET_TX_CMD_POST_RESET_COMPLETE_DONE,
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};
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/**
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* struct umac_reset_rx_actions - callbacks for handling UMAC reset actions
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* @cb: Array of pointers where each pointer contains callback for each UMAC
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* reset action for that index
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*/
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struct umac_reset_rx_actions {
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QDF_STATUS (*cb[UMAC_RESET_ACTION_MAX])(struct dp_soc *soc);
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};
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/**
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* struct reset_ts - timestamps of for umac reset events for debug
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* @pre_reset_start: Umac prereset start event timestamp
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* @pre_reset_done: Umac prereset done timestamp
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* @post_reset_start: Umac postreset start event timestamp
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* @post_reset_done: Umac postreset done timestamp
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* @post_reset_complete_start: Umac postreset complete event timestamp
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* @post_reset_complete_done: Umac postreset complete done timestamp
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*/
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struct reset_ts {
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uint64_t pre_reset_start;
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uint64_t pre_reset_done;
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uint64_t post_reset_start;
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uint64_t post_reset_done;
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uint64_t post_reset_complete_start;
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uint64_t post_reset_complete_done;
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};
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/**
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* struct dp_soc_umac_reset_ctx - UMAC reset context at soc level
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* @shmem_paddr_unaligned: Physical address of the shared memory (unaligned)
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* @shmem_vaddr_unaligned: Virtual address of the shared memory (unaligned)
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* @shmem_paddr_aligned: Physical address of the shared memory (aligned)
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* @shmem_vaddr_aligned: Virtual address of the shared memory (aligned)
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* @shmem_size: Size of the shared memory
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* @intr_offset: Offset of the UMAC reset interrupt w.r.t DP base interrupt
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* @current_state: current state of the UMAC reset state machine
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* @shmem_exp_magic_num: Expected magic number in the shared memory
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* @rx_actions: callbacks for handling UMAC reset actions
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* @intr_ctx_bkp: DP Interrupts ring masks backup
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* @nbuf_list: skb list for delayed free
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* @skel_enable: Enable skeleton code for umac reset
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* @ts: timestamps debug
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*/
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struct dp_soc_umac_reset_ctx {
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qdf_dma_addr_t shmem_paddr_unaligned;
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void *shmem_vaddr_unaligned;
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qdf_dma_addr_t shmem_paddr_aligned;
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htt_umac_hang_recovery_msg_shmem_t *shmem_vaddr_aligned;
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size_t shmem_size;
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int intr_offset;
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enum umac_reset_state current_state;
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uint32_t shmem_exp_magic_num;
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struct umac_reset_rx_actions rx_actions;
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struct dp_intr_bkp *intr_ctx_bkp;
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qdf_nbuf_t nbuf_list;
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bool skel_enable;
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struct reset_ts ts;
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};
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/**
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* dp_soc_umac_reset_init() - Initialize UMAC reset context
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* @soc: DP soc object
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*
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* Return: QDF status of operation
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*/
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QDF_STATUS dp_soc_umac_reset_init(struct dp_soc *soc);
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/**
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* dp_soc_umac_reset_deinit() - De-initialize UMAC reset context
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* @txrx_soc: DP soc object
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*
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* Return: QDF status of operation
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*/
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QDF_STATUS dp_soc_umac_reset_deinit(struct cdp_soc_t *txrx_soc);
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/**
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* dp_umac_reset_interrupt_attach() - Register handlers for UMAC reset interrupt
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* @soc: DP soc object
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*
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* Return: QDF status of operation
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*/
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QDF_STATUS dp_umac_reset_interrupt_attach(struct dp_soc *soc);
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/**
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* dp_umac_reset_interrupt_detach() - Unregister UMAC reset interrupt handlers
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* @soc: DP soc object
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*
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* Return: QDF status of operation
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*/
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QDF_STATUS dp_umac_reset_interrupt_detach(struct dp_soc *soc);
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/**
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* dp_umac_reset_register_rx_action_callback() - Register a callback for a given
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* UMAC reset action
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* @soc: DP soc object
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* @handler: callback handler to be registered
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* @action: UMAC reset action for which @handler needs to be registered
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*
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* Return: QDF status of operation
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*/
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QDF_STATUS dp_umac_reset_register_rx_action_callback(
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struct dp_soc *soc,
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QDF_STATUS (*handler)(struct dp_soc *soc),
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enum umac_reset_action action);
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/**
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* dp_umac_reset_notify_action_completion() - Notify that a given action has
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* been completed
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* @soc: DP soc object
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* @action: UMAC reset action that got completed
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*
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* Return: QDF status of operation
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*/
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QDF_STATUS dp_umac_reset_notify_action_completion(
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struct dp_soc *soc,
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enum umac_reset_action action);
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#else
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static inline
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QDF_STATUS dp_soc_umac_reset_init(struct dp_soc *soc)
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{
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return QDF_STATUS_SUCCESS;
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}
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static inline
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QDF_STATUS dp_soc_umac_reset_deinit(struct cdp_soc_t *txrx_soc)
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{
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return QDF_STATUS_SUCCESS;
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}
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static inline
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QDF_STATUS dp_umac_reset_register_rx_action_callback(
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struct dp_soc *soc,
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QDF_STATUS (*handler)(struct dp_soc *soc),
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enum umac_reset_action action)
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{
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return QDF_STATUS_SUCCESS;
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}
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static inline
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QDF_STATUS dp_umac_reset_notify_action_completion(
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struct dp_soc *soc,
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enum umac_reset_action action)
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{
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return QDF_STATUS_SUCCESS;
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}
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#endif /* DP_UMAC_HW_RESET_SUPPORT */
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#endif /* _DP_UMAC_RESET_H_ */
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