sde_rm.c 62 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "[drm:%s] " fmt, __func__
  6. #include "sde_kms.h"
  7. #include "sde_hw_lm.h"
  8. #include "sde_hw_ctl.h"
  9. #include "sde_hw_cdm.h"
  10. #include "sde_hw_dspp.h"
  11. #include "sde_hw_ds.h"
  12. #include "sde_hw_pingpong.h"
  13. #include "sde_hw_intf.h"
  14. #include "sde_hw_wb.h"
  15. #include "sde_encoder.h"
  16. #include "sde_connector.h"
  17. #include "sde_hw_dsc.h"
  18. #include "sde_hw_vdc.h"
  19. #include "sde_crtc.h"
  20. #include "sde_hw_qdss.h"
  21. #define RESERVED_BY_OTHER(h, r) \
  22. (((h)->rsvp && ((h)->rsvp->enc_id != (r)->enc_id)) ||\
  23. ((h)->rsvp_nxt && ((h)->rsvp_nxt->enc_id != (r)->enc_id)))
  24. #define RM_RQ_LOCK(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_LOCK))
  25. #define RM_RQ_CLEAR(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_CLEAR))
  26. #define RM_RQ_DSPP(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_DSPP))
  27. #define RM_RQ_DS(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_DS))
  28. #define RM_RQ_CWB(r) ((r)->top_ctrl & BIT(SDE_RM_TOPCTL_CWB))
  29. #define RM_IS_TOPOLOGY_MATCH(t, r) ((t).num_lm == (r).num_lm && \
  30. (t).num_comp_enc == (r).num_enc && \
  31. (t).num_intf == (r).num_intf && \
  32. (t).comp_type == (r).comp_type)
  33. /**
  34. * toplogy information to be used when ctl path version does not
  35. * support driving more than one interface per ctl_path
  36. */
  37. static const struct sde_rm_topology_def g_top_table[SDE_RM_TOPOLOGY_MAX] = {
  38. { SDE_RM_TOPOLOGY_NONE, 0, 0, 0, 0, false,
  39. MSM_DISPLAY_COMPRESSION_NONE },
  40. { SDE_RM_TOPOLOGY_SINGLEPIPE, 1, 0, 1, 1, false,
  41. MSM_DISPLAY_COMPRESSION_NONE },
  42. { SDE_RM_TOPOLOGY_SINGLEPIPE_DSC, 1, 1, 1, 1, false,
  43. MSM_DISPLAY_COMPRESSION_DSC },
  44. { SDE_RM_TOPOLOGY_DUALPIPE, 2, 0, 2, 2, true,
  45. MSM_DISPLAY_COMPRESSION_NONE },
  46. { SDE_RM_TOPOLOGY_DUALPIPE_DSC, 2, 2, 2, 2, true,
  47. MSM_DISPLAY_COMPRESSION_DSC },
  48. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE, 2, 0, 1, 1, false,
  49. MSM_DISPLAY_COMPRESSION_NONE },
  50. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, 2, 1, 1, 1, false,
  51. MSM_DISPLAY_COMPRESSION_DSC },
  52. { SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, 2, 2, 1, 1, false,
  53. MSM_DISPLAY_COMPRESSION_DSC },
  54. { SDE_RM_TOPOLOGY_PPSPLIT, 1, 0, 2, 1, true,
  55. MSM_DISPLAY_COMPRESSION_NONE },
  56. };
  57. /**
  58. * topology information to be used when the ctl path version
  59. * is SDE_CTL_CFG_VERSION_1_0_0
  60. */
  61. static const struct sde_rm_topology_def g_top_table_v1[SDE_RM_TOPOLOGY_MAX] = {
  62. { SDE_RM_TOPOLOGY_NONE, 0, 0, 0, 0, false,
  63. MSM_DISPLAY_COMPRESSION_NONE },
  64. { SDE_RM_TOPOLOGY_SINGLEPIPE, 1, 0, 1, 1, false,
  65. MSM_DISPLAY_COMPRESSION_NONE },
  66. { SDE_RM_TOPOLOGY_SINGLEPIPE_DSC, 1, 1, 1, 1, false,
  67. MSM_DISPLAY_COMPRESSION_DSC },
  68. { SDE_RM_TOPOLOGY_SINGLEPIPE_VDC, 1, 1, 1, 1, false,
  69. MSM_DISPLAY_COMPRESSION_VDC },
  70. { SDE_RM_TOPOLOGY_DUALPIPE, 2, 0, 2, 1, true,
  71. MSM_DISPLAY_COMPRESSION_NONE },
  72. { SDE_RM_TOPOLOGY_DUALPIPE_DSC, 2, 2, 2, 1, true,
  73. MSM_DISPLAY_COMPRESSION_DSC },
  74. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE, 2, 0, 1, 1, false,
  75. MSM_DISPLAY_COMPRESSION_NONE },
  76. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, 2, 1, 1, 1, false,
  77. MSM_DISPLAY_COMPRESSION_DSC },
  78. { SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_VDC, 2, 1, 1, 1, false,
  79. MSM_DISPLAY_COMPRESSION_VDC },
  80. { SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, 2, 2, 1, 1, false,
  81. MSM_DISPLAY_COMPRESSION_DSC },
  82. { SDE_RM_TOPOLOGY_PPSPLIT, 1, 0, 2, 1, true,
  83. MSM_DISPLAY_COMPRESSION_NONE },
  84. { SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE, 4, 0, 2, 1, false,
  85. MSM_DISPLAY_COMPRESSION_NONE },
  86. { SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE_DSC, 4, 3, 2, 1, false,
  87. MSM_DISPLAY_COMPRESSION_DSC },
  88. { SDE_RM_TOPOLOGY_QUADPIPE_DSCMERGE, 4, 4, 2, 1, false,
  89. MSM_DISPLAY_COMPRESSION_DSC },
  90. { SDE_RM_TOPOLOGY_QUADPIPE_DSC4HSMERGE, 4, 4, 1, 1, false,
  91. MSM_DISPLAY_COMPRESSION_DSC },
  92. };
  93. /**
  94. * struct sde_rm_requirements - Reservation requirements parameter bundle
  95. * @top_ctrl: topology control preference from kernel client
  96. * @top: selected topology for the display
  97. * @hw_res: Hardware resources required as reported by the encoders
  98. */
  99. struct sde_rm_requirements {
  100. uint64_t top_ctrl;
  101. const struct sde_rm_topology_def *topology;
  102. struct sde_encoder_hw_resources hw_res;
  103. };
  104. /**
  105. * struct sde_rm_rsvp - Use Case Reservation tagging structure
  106. * Used to tag HW blocks as reserved by a CRTC->Encoder->Connector chain
  107. * By using as a tag, rather than lists of pointers to HW blocks used
  108. * we can avoid some list management since we don't know how many blocks
  109. * of each type a given use case may require.
  110. * @list: List head for list of all reservations
  111. * @seq: Global RSVP sequence number for debugging, especially for
  112. * differentiating differenct allocations for same encoder.
  113. * @enc_id: Reservations are tracked by Encoder DRM object ID.
  114. * CRTCs may be connected to multiple Encoders.
  115. * An encoder or connector id identifies the display path.
  116. * @topology DRM<->HW topology use case
  117. */
  118. struct sde_rm_rsvp {
  119. struct list_head list;
  120. uint32_t seq;
  121. uint32_t enc_id;
  122. enum sde_rm_topology_name topology;
  123. };
  124. /**
  125. * struct sde_rm_hw_blk - hardware block tracking list member
  126. * @list: List head for list of all hardware blocks tracking items
  127. * @rsvp: Pointer to use case reservation if reserved by a client
  128. * @rsvp_nxt: Temporary pointer used during reservation to the incoming
  129. * request. Will be swapped into rsvp if proposal is accepted
  130. * @type: Type of hardware block this structure tracks
  131. * @id: Hardware ID number, within it's own space, ie. LM_X
  132. * @catalog: Pointer to the hardware catalog entry for this block
  133. * @hw: Pointer to the hardware register access object for this block
  134. */
  135. struct sde_rm_hw_blk {
  136. struct list_head list;
  137. struct sde_rm_rsvp *rsvp;
  138. struct sde_rm_rsvp *rsvp_nxt;
  139. enum sde_hw_blk_type type;
  140. uint32_t id;
  141. struct sde_hw_blk *hw;
  142. };
  143. /**
  144. * sde_rm_dbg_rsvp_stage - enum of steps in making reservation for event logging
  145. */
  146. enum sde_rm_dbg_rsvp_stage {
  147. SDE_RM_STAGE_BEGIN,
  148. SDE_RM_STAGE_AFTER_CLEAR,
  149. SDE_RM_STAGE_AFTER_RSVPNEXT,
  150. SDE_RM_STAGE_FINAL
  151. };
  152. static void _sde_rm_inc_resource_info_lm(struct sde_rm *rm,
  153. struct msm_resource_caps_info *avail_res,
  154. struct sde_rm_hw_blk *blk)
  155. {
  156. struct sde_rm_hw_blk *blk2;
  157. const struct sde_lm_cfg *lm_cfg, *lm_cfg2;
  158. avail_res->num_lm++;
  159. lm_cfg = to_sde_hw_mixer(blk->hw)->cap;
  160. /* Check for 3d muxes by comparing paired lms */
  161. list_for_each_entry(blk2, &rm->hw_blks[SDE_HW_BLK_LM], list) {
  162. lm_cfg2 = to_sde_hw_mixer(blk2->hw)->cap;
  163. /*
  164. * If lm2 is free, or
  165. * lm1 & lm2 reserved by same enc, check mask
  166. */
  167. if ((!blk2->rsvp || (blk->rsvp &&
  168. blk2->rsvp->enc_id == blk->rsvp->enc_id
  169. && lm_cfg->id > lm_cfg2->id)) &&
  170. test_bit(lm_cfg->id, &lm_cfg2->lm_pair_mask))
  171. avail_res->num_3dmux++;
  172. }
  173. }
  174. static void _sde_rm_dec_resource_info_lm(struct sde_rm *rm,
  175. struct msm_resource_caps_info *avail_res,
  176. struct sde_rm_hw_blk *blk)
  177. {
  178. struct sde_rm_hw_blk *blk2;
  179. const struct sde_lm_cfg *lm_cfg, *lm_cfg2;
  180. avail_res->num_lm--;
  181. lm_cfg = to_sde_hw_mixer(blk->hw)->cap;
  182. /* Check for 3d muxes by comparing paired lms */
  183. list_for_each_entry(blk2, &rm->hw_blks[SDE_HW_BLK_LM], list) {
  184. lm_cfg2 = to_sde_hw_mixer(blk2->hw)->cap;
  185. /* If lm2 is free and lm1 is now being reserved */
  186. if (!blk2->rsvp &&
  187. test_bit(lm_cfg->id, &lm_cfg2->lm_pair_mask))
  188. avail_res->num_3dmux--;
  189. }
  190. }
  191. static void _sde_rm_inc_resource_info(struct sde_rm *rm,
  192. struct msm_resource_caps_info *avail_res,
  193. struct sde_rm_hw_blk *blk)
  194. {
  195. enum sde_hw_blk_type type = blk->type;
  196. if (type == SDE_HW_BLK_LM)
  197. _sde_rm_inc_resource_info_lm(rm, avail_res, blk);
  198. else if (type == SDE_HW_BLK_CTL)
  199. avail_res->num_ctl++;
  200. else if (type == SDE_HW_BLK_DSC)
  201. avail_res->num_dsc++;
  202. else if (type == SDE_HW_BLK_VDC)
  203. avail_res->num_vdc++;
  204. }
  205. static void _sde_rm_dec_resource_info(struct sde_rm *rm,
  206. struct msm_resource_caps_info *avail_res,
  207. struct sde_rm_hw_blk *blk)
  208. {
  209. enum sde_hw_blk_type type = blk->type;
  210. if (type == SDE_HW_BLK_LM)
  211. _sde_rm_dec_resource_info_lm(rm, avail_res, blk);
  212. else if (type == SDE_HW_BLK_CTL)
  213. avail_res->num_ctl--;
  214. else if (type == SDE_HW_BLK_DSC)
  215. avail_res->num_dsc--;
  216. else if (type == SDE_HW_BLK_VDC)
  217. avail_res->num_vdc--;
  218. }
  219. void sde_rm_get_resource_info(struct sde_rm *rm,
  220. struct drm_encoder *drm_enc,
  221. struct msm_resource_caps_info *avail_res)
  222. {
  223. struct sde_rm_hw_blk *blk;
  224. enum sde_hw_blk_type type;
  225. struct sde_rm_rsvp rsvp;
  226. memcpy(avail_res, &rm->avail_res,
  227. sizeof(rm->avail_res));
  228. if (!drm_enc)
  229. return;
  230. rsvp.enc_id = drm_enc->base.id;
  231. for (type = 0; type < SDE_HW_BLK_MAX; type++)
  232. list_for_each_entry(blk, &rm->hw_blks[type], list)
  233. if (blk->rsvp && blk->rsvp->enc_id == rsvp.enc_id)
  234. _sde_rm_inc_resource_info(rm, avail_res, blk);
  235. }
  236. static void _sde_rm_print_rsvps(
  237. struct sde_rm *rm,
  238. enum sde_rm_dbg_rsvp_stage stage)
  239. {
  240. struct sde_rm_rsvp *rsvp;
  241. struct sde_rm_hw_blk *blk;
  242. enum sde_hw_blk_type type;
  243. SDE_DEBUG("%d\n", stage);
  244. list_for_each_entry(rsvp, &rm->rsvps, list) {
  245. SDE_DEBUG("%d rsvp[s%ue%u] topology %d\n", stage, rsvp->seq,
  246. rsvp->enc_id, rsvp->topology);
  247. SDE_EVT32(stage, rsvp->seq, rsvp->enc_id, rsvp->topology);
  248. }
  249. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  250. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  251. if (!blk->rsvp && !blk->rsvp_nxt)
  252. continue;
  253. SDE_DEBUG("%d rsvp[s%ue%u->s%ue%u] %d %d\n", stage,
  254. (blk->rsvp) ? blk->rsvp->seq : 0,
  255. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  256. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  257. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  258. blk->type, blk->id);
  259. SDE_EVT32(stage,
  260. (blk->rsvp) ? blk->rsvp->seq : 0,
  261. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  262. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  263. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  264. blk->type, blk->id);
  265. }
  266. }
  267. }
  268. static void _sde_rm_print_rsvps_by_type(
  269. struct sde_rm *rm,
  270. enum sde_hw_blk_type type)
  271. {
  272. struct sde_rm_hw_blk *blk;
  273. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  274. if (!blk->rsvp && !blk->rsvp_nxt)
  275. continue;
  276. SDE_ERROR("rsvp[s%ue%u->s%ue%u] %d %d\n",
  277. (blk->rsvp) ? blk->rsvp->seq : 0,
  278. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  279. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  280. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  281. blk->type, blk->id);
  282. SDE_EVT32((blk->rsvp) ? blk->rsvp->seq : 0,
  283. (blk->rsvp) ? blk->rsvp->enc_id : 0,
  284. (blk->rsvp_nxt) ? blk->rsvp_nxt->seq : 0,
  285. (blk->rsvp_nxt) ? blk->rsvp_nxt->enc_id : 0,
  286. blk->type, blk->id);
  287. }
  288. }
  289. struct sde_hw_mdp *sde_rm_get_mdp(struct sde_rm *rm)
  290. {
  291. return rm->hw_mdp;
  292. }
  293. void sde_rm_init_hw_iter(
  294. struct sde_rm_hw_iter *iter,
  295. uint32_t enc_id,
  296. enum sde_hw_blk_type type)
  297. {
  298. memset(iter, 0, sizeof(*iter));
  299. iter->enc_id = enc_id;
  300. iter->type = type;
  301. }
  302. enum sde_rm_topology_name sde_rm_get_topology_name(struct sde_rm *rm,
  303. struct msm_display_topology topology)
  304. {
  305. int i;
  306. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++)
  307. if (RM_IS_TOPOLOGY_MATCH(rm->topology_tbl[i],
  308. topology))
  309. return rm->topology_tbl[i].top_name;
  310. return SDE_RM_TOPOLOGY_NONE;
  311. }
  312. static bool _sde_rm_get_hw_locked(struct sde_rm *rm, struct sde_rm_hw_iter *i)
  313. {
  314. struct list_head *blk_list;
  315. if (!rm || !i || i->type >= SDE_HW_BLK_MAX) {
  316. SDE_ERROR("invalid rm\n");
  317. return false;
  318. }
  319. i->hw = NULL;
  320. blk_list = &rm->hw_blks[i->type];
  321. if (i->blk && (&i->blk->list == blk_list)) {
  322. SDE_DEBUG("attempt resume iteration past last\n");
  323. return false;
  324. }
  325. i->blk = list_prepare_entry(i->blk, blk_list, list);
  326. list_for_each_entry_continue(i->blk, blk_list, list) {
  327. struct sde_rm_rsvp *rsvp = i->blk->rsvp;
  328. if (i->blk->type != i->type) {
  329. SDE_ERROR("found incorrect block type %d on %d list\n",
  330. i->blk->type, i->type);
  331. return false;
  332. }
  333. if ((i->enc_id == 0) || (rsvp && rsvp->enc_id == i->enc_id)) {
  334. i->hw = i->blk->hw;
  335. SDE_DEBUG("found type %d id %d for enc %d\n",
  336. i->type, i->blk->id, i->enc_id);
  337. return true;
  338. }
  339. }
  340. SDE_DEBUG("no match, type %d for enc %d\n", i->type, i->enc_id);
  341. return false;
  342. }
  343. static bool _sde_rm_request_hw_blk_locked(struct sde_rm *rm,
  344. struct sde_rm_hw_request *hw_blk_info)
  345. {
  346. struct list_head *blk_list;
  347. struct sde_rm_hw_blk *blk = NULL;
  348. if (!rm || !hw_blk_info || hw_blk_info->type >= SDE_HW_BLK_MAX) {
  349. SDE_ERROR("invalid rm\n");
  350. return false;
  351. }
  352. hw_blk_info->hw = NULL;
  353. blk_list = &rm->hw_blks[hw_blk_info->type];
  354. blk = list_prepare_entry(blk, blk_list, list);
  355. list_for_each_entry_continue(blk, blk_list, list) {
  356. if (blk->type != hw_blk_info->type) {
  357. SDE_ERROR("found incorrect block type %d on %d list\n",
  358. blk->type, hw_blk_info->type);
  359. return false;
  360. }
  361. if (blk->hw->id == hw_blk_info->id) {
  362. hw_blk_info->hw = blk->hw;
  363. SDE_DEBUG("found type %d id %d\n",
  364. blk->type, blk->id);
  365. return true;
  366. }
  367. }
  368. SDE_DEBUG("no match, type %d id %d\n", hw_blk_info->type,
  369. hw_blk_info->id);
  370. return false;
  371. }
  372. bool sde_rm_get_hw(struct sde_rm *rm, struct sde_rm_hw_iter *i)
  373. {
  374. bool ret;
  375. mutex_lock(&rm->rm_lock);
  376. ret = _sde_rm_get_hw_locked(rm, i);
  377. mutex_unlock(&rm->rm_lock);
  378. return ret;
  379. }
  380. bool sde_rm_request_hw_blk(struct sde_rm *rm, struct sde_rm_hw_request *hw)
  381. {
  382. bool ret;
  383. mutex_lock(&rm->rm_lock);
  384. ret = _sde_rm_request_hw_blk_locked(rm, hw);
  385. mutex_unlock(&rm->rm_lock);
  386. return ret;
  387. }
  388. static void _sde_rm_hw_destroy(enum sde_hw_blk_type type, void *hw)
  389. {
  390. switch (type) {
  391. case SDE_HW_BLK_LM:
  392. sde_hw_lm_destroy(hw);
  393. break;
  394. case SDE_HW_BLK_DSPP:
  395. sde_hw_dspp_destroy(hw);
  396. break;
  397. case SDE_HW_BLK_DS:
  398. sde_hw_ds_destroy(hw);
  399. break;
  400. case SDE_HW_BLK_CTL:
  401. sde_hw_ctl_destroy(hw);
  402. break;
  403. case SDE_HW_BLK_CDM:
  404. sde_hw_cdm_destroy(hw);
  405. break;
  406. case SDE_HW_BLK_PINGPONG:
  407. sde_hw_pingpong_destroy(hw);
  408. break;
  409. case SDE_HW_BLK_INTF:
  410. sde_hw_intf_destroy(hw);
  411. break;
  412. case SDE_HW_BLK_WB:
  413. sde_hw_wb_destroy(hw);
  414. break;
  415. case SDE_HW_BLK_DSC:
  416. sde_hw_dsc_destroy(hw);
  417. break;
  418. case SDE_HW_BLK_VDC:
  419. sde_hw_vdc_destroy(hw);
  420. break;
  421. case SDE_HW_BLK_QDSS:
  422. sde_hw_qdss_destroy(hw);
  423. break;
  424. case SDE_HW_BLK_SSPP:
  425. /* SSPPs are not managed by the resource manager */
  426. case SDE_HW_BLK_TOP:
  427. /* Top is a singleton, not managed in hw_blks list */
  428. case SDE_HW_BLK_MAX:
  429. default:
  430. SDE_ERROR("unsupported block type %d\n", type);
  431. break;
  432. }
  433. }
  434. int sde_rm_destroy(struct sde_rm *rm)
  435. {
  436. struct sde_rm_rsvp *rsvp_cur, *rsvp_nxt;
  437. struct sde_rm_hw_blk *hw_cur, *hw_nxt;
  438. enum sde_hw_blk_type type;
  439. if (!rm) {
  440. SDE_ERROR("invalid rm\n");
  441. return -EINVAL;
  442. }
  443. list_for_each_entry_safe(rsvp_cur, rsvp_nxt, &rm->rsvps, list) {
  444. list_del(&rsvp_cur->list);
  445. kfree(rsvp_cur);
  446. }
  447. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  448. list_for_each_entry_safe(hw_cur, hw_nxt, &rm->hw_blks[type],
  449. list) {
  450. list_del(&hw_cur->list);
  451. _sde_rm_hw_destroy(hw_cur->type, hw_cur->hw);
  452. kfree(hw_cur);
  453. }
  454. }
  455. sde_hw_mdp_destroy(rm->hw_mdp);
  456. rm->hw_mdp = NULL;
  457. mutex_destroy(&rm->rm_lock);
  458. return 0;
  459. }
  460. static int _sde_rm_hw_blk_create(
  461. struct sde_rm *rm,
  462. struct sde_mdss_cfg *cat,
  463. void __iomem *mmio,
  464. enum sde_hw_blk_type type,
  465. uint32_t id,
  466. void *hw_catalog_info)
  467. {
  468. struct sde_rm_hw_blk *blk;
  469. struct sde_hw_mdp *hw_mdp;
  470. void *hw;
  471. hw_mdp = rm->hw_mdp;
  472. switch (type) {
  473. case SDE_HW_BLK_LM:
  474. hw = sde_hw_lm_init(id, mmio, cat);
  475. break;
  476. case SDE_HW_BLK_DSPP:
  477. hw = sde_hw_dspp_init(id, mmio, cat);
  478. break;
  479. case SDE_HW_BLK_DS:
  480. hw = sde_hw_ds_init(id, mmio, cat);
  481. break;
  482. case SDE_HW_BLK_CTL:
  483. hw = sde_hw_ctl_init(id, mmio, cat);
  484. break;
  485. case SDE_HW_BLK_CDM:
  486. hw = sde_hw_cdm_init(id, mmio, cat, hw_mdp);
  487. break;
  488. case SDE_HW_BLK_PINGPONG:
  489. hw = sde_hw_pingpong_init(id, mmio, cat);
  490. break;
  491. case SDE_HW_BLK_INTF:
  492. hw = sde_hw_intf_init(id, mmio, cat);
  493. break;
  494. case SDE_HW_BLK_WB:
  495. hw = sde_hw_wb_init(id, mmio, cat, hw_mdp);
  496. break;
  497. case SDE_HW_BLK_DSC:
  498. hw = sde_hw_dsc_init(id, mmio, cat);
  499. break;
  500. case SDE_HW_BLK_VDC:
  501. hw = sde_hw_vdc_init(id, mmio, cat);
  502. break;
  503. case SDE_HW_BLK_QDSS:
  504. hw = sde_hw_qdss_init(id, mmio, cat);
  505. break;
  506. case SDE_HW_BLK_SSPP:
  507. /* SSPPs are not managed by the resource manager */
  508. case SDE_HW_BLK_TOP:
  509. /* Top is a singleton, not managed in hw_blks list */
  510. case SDE_HW_BLK_MAX:
  511. default:
  512. SDE_ERROR("unsupported block type %d\n", type);
  513. return -EINVAL;
  514. }
  515. if (IS_ERR_OR_NULL(hw)) {
  516. SDE_ERROR("failed hw object creation: type %d, err %ld\n",
  517. type, PTR_ERR(hw));
  518. return -EFAULT;
  519. }
  520. blk = kzalloc(sizeof(*blk), GFP_KERNEL);
  521. if (!blk) {
  522. _sde_rm_hw_destroy(type, hw);
  523. return -ENOMEM;
  524. }
  525. blk->type = type;
  526. blk->id = id;
  527. blk->hw = hw;
  528. list_add_tail(&blk->list, &rm->hw_blks[type]);
  529. _sde_rm_inc_resource_info(rm, &rm->avail_res, blk);
  530. return 0;
  531. }
  532. static int _sde_rm_hw_blk_create_new(struct sde_rm *rm,
  533. struct sde_mdss_cfg *cat,
  534. void __iomem *mmio)
  535. {
  536. int i, rc = 0;
  537. for (i = 0; i < cat->dspp_count; i++) {
  538. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DSPP,
  539. cat->dspp[i].id, &cat->dspp[i]);
  540. if (rc) {
  541. SDE_ERROR("failed: dspp hw not available\n");
  542. goto fail;
  543. }
  544. }
  545. if (cat->mdp[0].has_dest_scaler) {
  546. for (i = 0; i < cat->ds_count; i++) {
  547. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DS,
  548. cat->ds[i].id, &cat->ds[i]);
  549. if (rc) {
  550. SDE_ERROR("failed: ds hw not available\n");
  551. goto fail;
  552. }
  553. }
  554. }
  555. for (i = 0; i < cat->pingpong_count; i++) {
  556. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_PINGPONG,
  557. cat->pingpong[i].id, &cat->pingpong[i]);
  558. if (rc) {
  559. SDE_ERROR("failed: pp hw not available\n");
  560. goto fail;
  561. }
  562. }
  563. for (i = 0; i < cat->dsc_count; i++) {
  564. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_DSC,
  565. cat->dsc[i].id, &cat->dsc[i]);
  566. if (rc) {
  567. SDE_ERROR("failed: dsc hw not available\n");
  568. goto fail;
  569. }
  570. }
  571. for (i = 0; i < cat->vdc_count; i++) {
  572. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_VDC,
  573. cat->vdc[i].id, &cat->vdc[i]);
  574. if (rc) {
  575. SDE_ERROR("failed: vdc hw not available\n");
  576. goto fail;
  577. }
  578. }
  579. for (i = 0; i < cat->intf_count; i++) {
  580. if (cat->intf[i].type == INTF_NONE) {
  581. SDE_DEBUG("skip intf %d with type none\n", i);
  582. continue;
  583. }
  584. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_INTF,
  585. cat->intf[i].id, &cat->intf[i]);
  586. if (rc) {
  587. SDE_ERROR("failed: intf hw not available\n");
  588. goto fail;
  589. }
  590. }
  591. for (i = 0; i < cat->wb_count; i++) {
  592. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_WB,
  593. cat->wb[i].id, &cat->wb[i]);
  594. if (rc) {
  595. SDE_ERROR("failed: wb hw not available\n");
  596. goto fail;
  597. }
  598. }
  599. for (i = 0; i < cat->ctl_count; i++) {
  600. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_CTL,
  601. cat->ctl[i].id, &cat->ctl[i]);
  602. if (rc) {
  603. SDE_ERROR("failed: ctl hw not available\n");
  604. goto fail;
  605. }
  606. }
  607. for (i = 0; i < cat->cdm_count; i++) {
  608. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_CDM,
  609. cat->cdm[i].id, &cat->cdm[i]);
  610. if (rc) {
  611. SDE_ERROR("failed: cdm hw not available\n");
  612. goto fail;
  613. }
  614. }
  615. for (i = 0; i < cat->qdss_count; i++) {
  616. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_QDSS,
  617. cat->qdss[i].id, &cat->qdss[i]);
  618. if (rc) {
  619. SDE_ERROR("failed: qdss hw not available\n");
  620. goto fail;
  621. }
  622. }
  623. fail:
  624. return rc;
  625. }
  626. int sde_rm_init(struct sde_rm *rm,
  627. struct sde_mdss_cfg *cat,
  628. void __iomem *mmio,
  629. struct drm_device *dev)
  630. {
  631. int i, rc = 0;
  632. enum sde_hw_blk_type type;
  633. if (!rm || !cat || !mmio || !dev) {
  634. SDE_ERROR("invalid input params\n");
  635. return -EINVAL;
  636. }
  637. /* Clear, setup lists */
  638. memset(rm, 0, sizeof(*rm));
  639. mutex_init(&rm->rm_lock);
  640. INIT_LIST_HEAD(&rm->rsvps);
  641. for (type = 0; type < SDE_HW_BLK_MAX; type++)
  642. INIT_LIST_HEAD(&rm->hw_blks[type]);
  643. rm->dev = dev;
  644. if (IS_SDE_CTL_REV_100(cat->ctl_rev))
  645. rm->topology_tbl = g_top_table_v1;
  646. else
  647. rm->topology_tbl = g_top_table;
  648. /* Some of the sub-blocks require an mdptop to be created */
  649. rm->hw_mdp = sde_hw_mdptop_init(MDP_TOP, mmio, cat);
  650. if (IS_ERR_OR_NULL(rm->hw_mdp)) {
  651. rc = PTR_ERR(rm->hw_mdp);
  652. rm->hw_mdp = NULL;
  653. SDE_ERROR("failed: mdp hw not available\n");
  654. goto fail;
  655. }
  656. /* Interrogate HW catalog and create tracking items for hw blocks */
  657. for (i = 0; i < cat->mixer_count; i++) {
  658. struct sde_lm_cfg *lm = &cat->mixer[i];
  659. if (lm->pingpong == PINGPONG_MAX) {
  660. SDE_ERROR("mixer %d without pingpong\n", lm->id);
  661. goto fail;
  662. }
  663. rc = _sde_rm_hw_blk_create(rm, cat, mmio, SDE_HW_BLK_LM,
  664. cat->mixer[i].id, &cat->mixer[i]);
  665. if (rc) {
  666. SDE_ERROR("failed: lm hw not available\n");
  667. goto fail;
  668. }
  669. if (!rm->lm_max_width) {
  670. rm->lm_max_width = lm->sblk->maxwidth;
  671. } else if (rm->lm_max_width != lm->sblk->maxwidth) {
  672. /*
  673. * Don't expect to have hw where lm max widths differ.
  674. * If found, take the min.
  675. */
  676. SDE_ERROR("unsupported: lm maxwidth differs\n");
  677. if (rm->lm_max_width > lm->sblk->maxwidth)
  678. rm->lm_max_width = lm->sblk->maxwidth;
  679. }
  680. }
  681. rc = _sde_rm_hw_blk_create_new(rm, cat, mmio);
  682. if (!rc)
  683. return 0;
  684. fail:
  685. sde_rm_destroy(rm);
  686. return rc;
  687. }
  688. static bool _sde_rm_check_lm(
  689. struct sde_rm *rm,
  690. struct sde_rm_rsvp *rsvp,
  691. struct sde_rm_requirements *reqs,
  692. const struct sde_lm_cfg *lm_cfg,
  693. struct sde_rm_hw_blk *lm,
  694. struct sde_rm_hw_blk **dspp,
  695. struct sde_rm_hw_blk **ds,
  696. struct sde_rm_hw_blk **pp)
  697. {
  698. bool is_valid_dspp, is_valid_ds, ret = true;
  699. is_valid_dspp = (lm_cfg->dspp != DSPP_MAX) ? true : false;
  700. is_valid_ds = (lm_cfg->ds != DS_MAX) ? true : false;
  701. /**
  702. * RM_RQ_X: specification of which LMs to choose
  703. * is_valid_X: indicates whether LM is tied with block X
  704. * ret: true if given LM matches the user requirement,
  705. * false otherwise
  706. */
  707. if (RM_RQ_DSPP(reqs) && RM_RQ_DS(reqs))
  708. ret = (is_valid_dspp && is_valid_ds);
  709. else if (RM_RQ_DSPP(reqs))
  710. ret = is_valid_dspp;
  711. else if (RM_RQ_DS(reqs))
  712. ret = is_valid_ds;
  713. if (!ret) {
  714. SDE_DEBUG(
  715. "fail:lm(%d)req_dspp(%d)dspp(%d)req_ds(%d)ds(%d)\n",
  716. lm_cfg->id, (bool)(RM_RQ_DSPP(reqs)),
  717. lm_cfg->dspp, (bool)(RM_RQ_DS(reqs)),
  718. lm_cfg->ds);
  719. return ret;
  720. }
  721. return true;
  722. }
  723. static bool _sde_rm_reserve_dspp(
  724. struct sde_rm *rm,
  725. struct sde_rm_rsvp *rsvp,
  726. const struct sde_lm_cfg *lm_cfg,
  727. struct sde_rm_hw_blk *lm,
  728. struct sde_rm_hw_blk **dspp)
  729. {
  730. struct sde_rm_hw_iter iter;
  731. if (lm_cfg->dspp != DSPP_MAX) {
  732. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DSPP);
  733. while (_sde_rm_get_hw_locked(rm, &iter)) {
  734. if (iter.blk->id == lm_cfg->dspp) {
  735. *dspp = iter.blk;
  736. break;
  737. }
  738. }
  739. if (!*dspp) {
  740. SDE_DEBUG("lm %d failed to retrieve dspp %d\n", lm->id,
  741. lm_cfg->dspp);
  742. return false;
  743. }
  744. if (RESERVED_BY_OTHER(*dspp, rsvp)) {
  745. SDE_DEBUG("lm %d dspp %d already reserved\n",
  746. lm->id, (*dspp)->id);
  747. return false;
  748. }
  749. }
  750. return true;
  751. }
  752. static bool _sde_rm_reserve_ds(
  753. struct sde_rm *rm,
  754. struct sde_rm_rsvp *rsvp,
  755. const struct sde_lm_cfg *lm_cfg,
  756. struct sde_rm_hw_blk *lm,
  757. struct sde_rm_hw_blk **ds)
  758. {
  759. struct sde_rm_hw_iter iter;
  760. if (lm_cfg->ds != DS_MAX) {
  761. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_DS);
  762. while (_sde_rm_get_hw_locked(rm, &iter)) {
  763. if (iter.blk->id == lm_cfg->ds) {
  764. *ds = iter.blk;
  765. break;
  766. }
  767. }
  768. if (!*ds) {
  769. SDE_DEBUG("lm %d failed to retrieve ds %d\n", lm->id,
  770. lm_cfg->ds);
  771. return false;
  772. }
  773. if (RESERVED_BY_OTHER(*ds, rsvp)) {
  774. SDE_DEBUG("lm %d ds %d already reserved\n",
  775. lm->id, (*ds)->id);
  776. return false;
  777. }
  778. }
  779. return true;
  780. }
  781. static bool _sde_rm_reserve_pp(
  782. struct sde_rm *rm,
  783. struct sde_rm_rsvp *rsvp,
  784. struct sde_rm_requirements *reqs,
  785. const struct sde_lm_cfg *lm_cfg,
  786. const struct sde_pingpong_cfg *pp_cfg,
  787. struct sde_rm_hw_blk *lm,
  788. struct sde_rm_hw_blk **dspp,
  789. struct sde_rm_hw_blk **ds,
  790. struct sde_rm_hw_blk **pp)
  791. {
  792. struct sde_rm_hw_iter iter;
  793. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_PINGPONG);
  794. while (_sde_rm_get_hw_locked(rm, &iter)) {
  795. if (iter.blk->id == lm_cfg->pingpong) {
  796. *pp = iter.blk;
  797. break;
  798. }
  799. }
  800. if (!*pp) {
  801. SDE_ERROR("failed to get pp on lm %d\n", lm_cfg->pingpong);
  802. return false;
  803. }
  804. if (RESERVED_BY_OTHER(*pp, rsvp)) {
  805. SDE_DEBUG("lm %d pp %d already reserved\n", lm->id,
  806. (*pp)->id);
  807. *dspp = NULL;
  808. *ds = NULL;
  809. return false;
  810. }
  811. pp_cfg = to_sde_hw_pingpong((*pp)->hw)->caps;
  812. if ((reqs->topology->top_name == SDE_RM_TOPOLOGY_PPSPLIT) &&
  813. !(test_bit(SDE_PINGPONG_SPLIT, &pp_cfg->features))) {
  814. SDE_DEBUG("pp %d doesn't support ppsplit\n", pp_cfg->id);
  815. *dspp = NULL;
  816. *ds = NULL;
  817. return false;
  818. }
  819. return true;
  820. }
  821. /**
  822. * _sde_rm_check_lm_and_get_connected_blks - check if proposed layer mixer meets
  823. * proposed use case requirements, incl. hardwired dependent blocks like
  824. * pingpong, and dspp.
  825. * @rm: sde resource manager handle
  826. * @rsvp: reservation currently being created
  827. * @reqs: proposed use case requirements
  828. * @lm: proposed layer mixer, function checks if lm, and all other hardwired
  829. * blocks connected to the lm (pp, dspp) are available and appropriate
  830. * @dspp: output parameter, dspp block attached to the layer mixer.
  831. * NULL if dspp was not available, or not matching requirements.
  832. * @pp: output parameter, pingpong block attached to the layer mixer.
  833. * NULL if dspp was not available, or not matching requirements.
  834. * @primary_lm: if non-null, this function check if lm is compatible primary_lm
  835. * as well as satisfying all other requirements
  836. * @Return: true if lm matches all requirements, false otherwise
  837. */
  838. static bool _sde_rm_check_lm_and_get_connected_blks(
  839. struct sde_rm *rm,
  840. struct sde_rm_rsvp *rsvp,
  841. struct sde_rm_requirements *reqs,
  842. struct sde_rm_hw_blk *lm,
  843. struct sde_rm_hw_blk **dspp,
  844. struct sde_rm_hw_blk **ds,
  845. struct sde_rm_hw_blk **pp,
  846. struct sde_rm_hw_blk *primary_lm)
  847. {
  848. const struct sde_lm_cfg *lm_cfg = to_sde_hw_mixer(lm->hw)->cap;
  849. const struct sde_pingpong_cfg *pp_cfg;
  850. bool ret, is_conn_primary, is_conn_secondary;
  851. u32 lm_primary_pref, lm_secondary_pref, cwb_pref;
  852. *dspp = NULL;
  853. *ds = NULL;
  854. *pp = NULL;
  855. lm_primary_pref = lm_cfg->features & BIT(SDE_DISP_PRIMARY_PREF);
  856. lm_secondary_pref = lm_cfg->features & BIT(SDE_DISP_SECONDARY_PREF);
  857. cwb_pref = lm_cfg->features & BIT(SDE_DISP_CWB_PREF);
  858. is_conn_primary = (reqs->hw_res.display_type ==
  859. SDE_CONNECTOR_PRIMARY) ? true : false;
  860. is_conn_secondary = (reqs->hw_res.display_type ==
  861. SDE_CONNECTOR_SECONDARY) ? true : false;
  862. SDE_DEBUG("check lm %d: dspp %d ds %d pp %d features %d disp type %d\n",
  863. lm_cfg->id, lm_cfg->dspp, lm_cfg->ds, lm_cfg->pingpong,
  864. lm_cfg->features, (int)reqs->hw_res.display_type);
  865. /* Check if this layer mixer is a peer of the proposed primary LM */
  866. if (primary_lm) {
  867. const struct sde_lm_cfg *prim_lm_cfg =
  868. to_sde_hw_mixer(primary_lm->hw)->cap;
  869. if (!test_bit(lm_cfg->id, &prim_lm_cfg->lm_pair_mask)) {
  870. SDE_DEBUG("lm %d not peer of lm %d\n", lm_cfg->id,
  871. prim_lm_cfg->id);
  872. return false;
  873. }
  874. }
  875. /* bypass rest of the checks if LM for primary display is found */
  876. if (!lm_primary_pref && !lm_secondary_pref) {
  877. /* Check lm for valid requirements */
  878. ret = _sde_rm_check_lm(rm, rsvp, reqs, lm_cfg, lm,
  879. dspp, ds, pp);
  880. if (!ret)
  881. return ret;
  882. /**
  883. * If CWB is enabled and LM is not CWB supported
  884. * then return false.
  885. */
  886. if (RM_RQ_CWB(reqs) && !cwb_pref) {
  887. SDE_DEBUG("fail: cwb supported lm not allocated\n");
  888. return false;
  889. }
  890. } else if ((!is_conn_primary && lm_primary_pref) ||
  891. (!is_conn_secondary && lm_secondary_pref)) {
  892. SDE_DEBUG(
  893. "display preference is not met. display_type: %d lm_features: %x\n",
  894. (int)reqs->hw_res.display_type, lm_cfg->features);
  895. return false;
  896. }
  897. /* Already reserved? */
  898. if (RESERVED_BY_OTHER(lm, rsvp)) {
  899. SDE_DEBUG("lm %d already reserved\n", lm_cfg->id);
  900. return false;
  901. }
  902. /* Reserve dspp */
  903. ret = _sde_rm_reserve_dspp(rm, rsvp, lm_cfg, lm, dspp);
  904. if (!ret)
  905. return ret;
  906. /* Reserve ds */
  907. ret = _sde_rm_reserve_ds(rm, rsvp, lm_cfg, lm, ds);
  908. if (!ret)
  909. return ret;
  910. /* Reserve pp */
  911. ret = _sde_rm_reserve_pp(rm, rsvp, reqs, lm_cfg, pp_cfg, lm,
  912. dspp, ds, pp);
  913. if (!ret)
  914. return ret;
  915. return true;
  916. }
  917. static int _sde_rm_reserve_lms(
  918. struct sde_rm *rm,
  919. struct sde_rm_rsvp *rsvp,
  920. struct sde_rm_requirements *reqs,
  921. u8 *_lm_ids)
  922. {
  923. struct sde_rm_hw_blk *lm[MAX_BLOCKS];
  924. struct sde_rm_hw_blk *dspp[MAX_BLOCKS];
  925. struct sde_rm_hw_blk *ds[MAX_BLOCKS];
  926. struct sde_rm_hw_blk *pp[MAX_BLOCKS];
  927. struct sde_rm_hw_iter iter_i, iter_j;
  928. int lm_count = 0;
  929. int i, rc = 0;
  930. if (!reqs->topology->num_lm) {
  931. SDE_DEBUG("invalid number of lm: %d\n", reqs->topology->num_lm);
  932. return 0;
  933. }
  934. /* Find a primary mixer */
  935. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_LM);
  936. while (lm_count != reqs->topology->num_lm &&
  937. _sde_rm_get_hw_locked(rm, &iter_i)) {
  938. memset(&lm, 0, sizeof(lm));
  939. memset(&dspp, 0, sizeof(dspp));
  940. memset(&ds, 0, sizeof(ds));
  941. memset(&pp, 0, sizeof(pp));
  942. lm_count = 0;
  943. lm[lm_count] = iter_i.blk;
  944. SDE_DEBUG("blk id = %d, _lm_ids[%d] = %d\n",
  945. iter_i.blk->id,
  946. lm_count,
  947. _lm_ids ? _lm_ids[lm_count] : -1);
  948. if (_lm_ids && (lm[lm_count])->id != _lm_ids[lm_count])
  949. continue;
  950. if (!_sde_rm_check_lm_and_get_connected_blks(
  951. rm, rsvp, reqs, lm[lm_count],
  952. &dspp[lm_count], &ds[lm_count],
  953. &pp[lm_count], NULL))
  954. continue;
  955. ++lm_count;
  956. /* Valid primary mixer found, find matching peers */
  957. sde_rm_init_hw_iter(&iter_j, 0, SDE_HW_BLK_LM);
  958. while (lm_count != reqs->topology->num_lm &&
  959. _sde_rm_get_hw_locked(rm, &iter_j)) {
  960. if (iter_i.blk == iter_j.blk)
  961. continue;
  962. if (!_sde_rm_check_lm_and_get_connected_blks(
  963. rm, rsvp, reqs, iter_j.blk,
  964. &dspp[lm_count], &ds[lm_count],
  965. &pp[lm_count], iter_i.blk))
  966. continue;
  967. lm[lm_count] = iter_j.blk;
  968. SDE_DEBUG("blk id = %d, _lm_ids[%d] = %d\n",
  969. iter_i.blk->id,
  970. lm_count,
  971. _lm_ids ? _lm_ids[lm_count] : -1);
  972. if (_lm_ids && (lm[lm_count])->id != _lm_ids[lm_count])
  973. continue;
  974. ++lm_count;
  975. }
  976. }
  977. if (lm_count != reqs->topology->num_lm) {
  978. SDE_DEBUG("unable to find appropriate mixers\n");
  979. return -ENAVAIL;
  980. }
  981. for (i = 0; i < ARRAY_SIZE(lm); i++) {
  982. if (!lm[i])
  983. break;
  984. lm[i]->rsvp_nxt = rsvp;
  985. pp[i]->rsvp_nxt = rsvp;
  986. if (dspp[i])
  987. dspp[i]->rsvp_nxt = rsvp;
  988. if (ds[i])
  989. ds[i]->rsvp_nxt = rsvp;
  990. SDE_EVT32(lm[i]->type, rsvp->enc_id, lm[i]->id, pp[i]->id,
  991. dspp[i] ? dspp[i]->id : 0,
  992. ds[i] ? ds[i]->id : 0);
  993. }
  994. if (reqs->topology->top_name == SDE_RM_TOPOLOGY_PPSPLIT) {
  995. /* reserve a free PINGPONG_SLAVE block */
  996. rc = -ENAVAIL;
  997. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_PINGPONG);
  998. while (_sde_rm_get_hw_locked(rm, &iter_i)) {
  999. const struct sde_hw_pingpong *pp =
  1000. to_sde_hw_pingpong(iter_i.blk->hw);
  1001. const struct sde_pingpong_cfg *pp_cfg = pp->caps;
  1002. if (!(test_bit(SDE_PINGPONG_SLAVE, &pp_cfg->features)))
  1003. continue;
  1004. if (RESERVED_BY_OTHER(iter_i.blk, rsvp))
  1005. continue;
  1006. iter_i.blk->rsvp_nxt = rsvp;
  1007. rc = 0;
  1008. break;
  1009. }
  1010. }
  1011. return rc;
  1012. }
  1013. static int _sde_rm_reserve_ctls(
  1014. struct sde_rm *rm,
  1015. struct sde_rm_rsvp *rsvp,
  1016. struct sde_rm_requirements *reqs,
  1017. const struct sde_rm_topology_def *top,
  1018. u8 *_ctl_ids)
  1019. {
  1020. struct sde_rm_hw_blk *ctls[MAX_BLOCKS];
  1021. struct sde_rm_hw_iter iter;
  1022. int i = 0;
  1023. if (!top->num_ctl) {
  1024. SDE_DEBUG("invalid number of ctl: %d\n", top->num_ctl);
  1025. return 0;
  1026. }
  1027. memset(&ctls, 0, sizeof(ctls));
  1028. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_CTL);
  1029. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1030. const struct sde_hw_ctl *ctl = to_sde_hw_ctl(iter.blk->hw);
  1031. unsigned long features = ctl->caps->features;
  1032. bool has_split_display, has_ppsplit, primary_pref;
  1033. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  1034. continue;
  1035. has_split_display = BIT(SDE_CTL_SPLIT_DISPLAY) & features;
  1036. has_ppsplit = BIT(SDE_CTL_PINGPONG_SPLIT) & features;
  1037. primary_pref = BIT(SDE_CTL_PRIMARY_PREF) & features;
  1038. SDE_DEBUG("ctl %d caps 0x%lX\n", iter.blk->id, features);
  1039. /*
  1040. * bypass rest feature checks on finding CTL preferred
  1041. * for primary displays.
  1042. */
  1043. if (!primary_pref && !_ctl_ids) {
  1044. if (top->needs_split_display != has_split_display)
  1045. continue;
  1046. if (top->top_name == SDE_RM_TOPOLOGY_PPSPLIT &&
  1047. !has_ppsplit)
  1048. continue;
  1049. } else if (!(reqs->hw_res.display_type ==
  1050. SDE_CONNECTOR_PRIMARY && primary_pref) && !_ctl_ids) {
  1051. SDE_DEBUG(
  1052. "display pref not met. display_type: %d primary_pref: %d\n",
  1053. reqs->hw_res.display_type, primary_pref);
  1054. continue;
  1055. }
  1056. ctls[i] = iter.blk;
  1057. SDE_DEBUG("blk id = %d, _ctl_ids[%d] = %d\n",
  1058. iter.blk->id, i,
  1059. _ctl_ids ? _ctl_ids[i] : -1);
  1060. if (_ctl_ids && (ctls[i]->id != _ctl_ids[i]))
  1061. continue;
  1062. SDE_DEBUG("ctl %d match\n", iter.blk->id);
  1063. if (++i == top->num_ctl)
  1064. break;
  1065. }
  1066. if (i != top->num_ctl)
  1067. return -ENAVAIL;
  1068. for (i = 0; i < ARRAY_SIZE(ctls) && i < top->num_ctl; i++) {
  1069. ctls[i]->rsvp_nxt = rsvp;
  1070. SDE_EVT32(ctls[i]->type, rsvp->enc_id, ctls[i]->id);
  1071. }
  1072. return 0;
  1073. }
  1074. static bool _sde_rm_check_dsc(struct sde_rm *rm,
  1075. struct sde_rm_rsvp *rsvp,
  1076. struct sde_rm_hw_blk *dsc,
  1077. struct sde_rm_hw_blk *paired_dsc)
  1078. {
  1079. const struct sde_dsc_cfg *dsc_cfg = to_sde_hw_dsc(dsc->hw)->caps;
  1080. /* Already reserved? */
  1081. if (RESERVED_BY_OTHER(dsc, rsvp)) {
  1082. SDE_DEBUG("dsc %d already reserved\n", dsc_cfg->id);
  1083. return false;
  1084. }
  1085. /* Check if this dsc is a peer of the proposed paired DSC */
  1086. if (paired_dsc) {
  1087. const struct sde_dsc_cfg *paired_dsc_cfg =
  1088. to_sde_hw_dsc(paired_dsc->hw)->caps;
  1089. if (!test_bit(dsc_cfg->id, paired_dsc_cfg->dsc_pair_mask)) {
  1090. SDE_DEBUG("dsc %d not peer of dsc %d\n", dsc_cfg->id,
  1091. paired_dsc_cfg->id);
  1092. return false;
  1093. }
  1094. }
  1095. return true;
  1096. }
  1097. static bool _sde_rm_check_vdc(struct sde_rm *rm,
  1098. struct sde_rm_rsvp *rsvp,
  1099. struct sde_rm_hw_blk *vdc)
  1100. {
  1101. const struct sde_vdc_cfg *vdc_cfg = to_sde_hw_vdc(vdc->hw)->caps;
  1102. /* Already reserved? */
  1103. if (RESERVED_BY_OTHER(vdc, rsvp)) {
  1104. SDE_DEBUG("vdc %d already reserved\n", vdc_cfg->id);
  1105. return false;
  1106. }
  1107. return true;
  1108. }
  1109. static int _sde_rm_reserve_dsc(
  1110. struct sde_rm *rm,
  1111. struct sde_rm_rsvp *rsvp,
  1112. struct sde_rm_requirements *reqs,
  1113. u8 *_dsc_ids)
  1114. {
  1115. struct sde_rm_hw_iter iter_i, iter_j;
  1116. struct sde_rm_hw_blk *dsc[MAX_BLOCKS];
  1117. u32 reserve_mask = 0;
  1118. int alloc_count = 0;
  1119. int num_dsc_enc;
  1120. struct msm_display_dsc_info *dsc_info;
  1121. int i;
  1122. if (reqs->hw_res.comp_info->comp_type != MSM_DISPLAY_COMPRESSION_DSC) {
  1123. SDE_DEBUG("compression blk dsc not required\n");
  1124. return 0;
  1125. }
  1126. num_dsc_enc = reqs->topology->num_comp_enc;
  1127. dsc_info = &reqs->hw_res.comp_info->dsc_info;
  1128. if ((!num_dsc_enc) || !dsc_info) {
  1129. SDE_DEBUG("invalid topoplogy params: %d, %d\n",
  1130. num_dsc_enc, !(dsc_info == NULL));
  1131. return 0;
  1132. }
  1133. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_DSC);
  1134. /* Find a first DSC */
  1135. while (alloc_count != num_dsc_enc &&
  1136. _sde_rm_get_hw_locked(rm, &iter_i)) {
  1137. const struct sde_hw_dsc *hw_dsc = to_sde_hw_dsc(
  1138. iter_i.blk->hw);
  1139. unsigned long features = hw_dsc->caps->features;
  1140. bool has_422_420_support =
  1141. BIT(SDE_DSC_NATIVE_422_EN) & features;
  1142. if (reserve_mask & (1 << iter_i.blk->id))
  1143. continue;
  1144. if (_dsc_ids && (iter_i.blk->id != _dsc_ids[alloc_count]))
  1145. continue;
  1146. /* if this hw block does not support required feature */
  1147. if (!_dsc_ids && (dsc_info->config.native_422 ||
  1148. dsc_info->config.native_420) && !has_422_420_support)
  1149. continue;
  1150. if (!_sde_rm_check_dsc(rm, rsvp, iter_i.blk, NULL))
  1151. continue;
  1152. SDE_DEBUG("blk id = %d, _dsc_ids[%d] = %d\n",
  1153. iter_i.blk->id,
  1154. alloc_count,
  1155. _dsc_ids ? _dsc_ids[alloc_count] : -1);
  1156. reserve_mask |= (1 << iter_i.blk->id);
  1157. dsc[alloc_count++] = iter_i.blk;
  1158. /* Return if peer is not needed */
  1159. if (alloc_count == num_dsc_enc)
  1160. break;
  1161. /* Valid first dsc found, find matching peers */
  1162. sde_rm_init_hw_iter(&iter_j, 0, SDE_HW_BLK_DSC);
  1163. while (_sde_rm_get_hw_locked(rm, &iter_j)) {
  1164. if (reserve_mask & (1 << iter_j.blk->id))
  1165. continue;
  1166. if (_dsc_ids && (iter_j.blk->id !=
  1167. _dsc_ids[alloc_count]))
  1168. continue;
  1169. if (!_sde_rm_check_dsc(rm, rsvp,
  1170. iter_j.blk, iter_i.blk))
  1171. continue;
  1172. SDE_DEBUG("blk id = %d, _dsc_ids[%d] = %d\n",
  1173. iter_j.blk->id,
  1174. alloc_count,
  1175. _dsc_ids ? _dsc_ids[alloc_count] : -1);
  1176. reserve_mask |= (1 << iter_j.blk->id);
  1177. dsc[alloc_count++] = iter_j.blk;
  1178. break;
  1179. }
  1180. /* Rollback primary DSC if peer is not found */
  1181. if (!iter_j.hw) {
  1182. reserve_mask &= ~(1 << iter_i.blk->id);
  1183. --alloc_count;
  1184. }
  1185. }
  1186. if (alloc_count != num_dsc_enc) {
  1187. SDE_ERROR("couldn't reserve %d dsc blocks for enc id %d\n",
  1188. num_dsc_enc, rsvp->enc_id);
  1189. return -EINVAL;
  1190. }
  1191. for (i = 0; i < alloc_count; i++) {
  1192. if (!dsc[i])
  1193. break;
  1194. dsc[i]->rsvp_nxt = rsvp;
  1195. SDE_EVT32(dsc[i]->type, rsvp->enc_id, dsc[i]->id);
  1196. }
  1197. return 0;
  1198. }
  1199. static int _sde_rm_reserve_vdc(
  1200. struct sde_rm *rm,
  1201. struct sde_rm_rsvp *rsvp,
  1202. struct sde_rm_requirements *reqs,
  1203. const struct sde_rm_topology_def *top,
  1204. u8 *_vdc_ids)
  1205. {
  1206. struct sde_rm_hw_iter iter_i;
  1207. struct sde_rm_hw_blk *vdc[MAX_BLOCKS];
  1208. int alloc_count = 0;
  1209. int num_vdc_enc = top->num_comp_enc;
  1210. int i;
  1211. if (!top->num_comp_enc)
  1212. return 0;
  1213. if (reqs->hw_res.comp_info->comp_type != MSM_DISPLAY_COMPRESSION_VDC)
  1214. return 0;
  1215. sde_rm_init_hw_iter(&iter_i, 0, SDE_HW_BLK_VDC);
  1216. /* Find a VDC */
  1217. while (alloc_count != num_vdc_enc &&
  1218. _sde_rm_get_hw_locked(rm, &iter_i)) {
  1219. memset(&vdc, 0, sizeof(vdc));
  1220. alloc_count = 0;
  1221. if (_vdc_ids && (iter_i.blk->id != _vdc_ids[alloc_count]))
  1222. continue;
  1223. if (!_sde_rm_check_vdc(rm, rsvp, iter_i.blk))
  1224. continue;
  1225. SDE_DEBUG("blk id = %d, _vdc_ids[%d] = %d\n",
  1226. iter_i.blk->id,
  1227. alloc_count,
  1228. _vdc_ids ? _vdc_ids[alloc_count] : -1);
  1229. vdc[alloc_count++] = iter_i.blk;
  1230. }
  1231. if (alloc_count != num_vdc_enc) {
  1232. SDE_ERROR("couldn't reserve %d vdc blocks for enc id %d\n",
  1233. num_vdc_enc, rsvp->enc_id);
  1234. return -EINVAL;
  1235. }
  1236. for (i = 0; i < ARRAY_SIZE(vdc); i++) {
  1237. if (!vdc[i])
  1238. break;
  1239. vdc[i]->rsvp_nxt = rsvp;
  1240. SDE_EVT32(vdc[i]->type, rsvp->enc_id, vdc[i]->id);
  1241. }
  1242. return 0;
  1243. }
  1244. static int _sde_rm_reserve_qdss(
  1245. struct sde_rm *rm,
  1246. struct sde_rm_rsvp *rsvp,
  1247. const struct sde_rm_topology_def *top,
  1248. u8 *_qdss_ids)
  1249. {
  1250. struct sde_rm_hw_iter iter;
  1251. struct msm_drm_private *priv = rm->dev->dev_private;
  1252. struct sde_kms *sde_kms;
  1253. if (!priv->kms) {
  1254. SDE_ERROR("invalid kms\n");
  1255. return -EINVAL;
  1256. }
  1257. sde_kms = to_sde_kms(priv->kms);
  1258. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_QDSS);
  1259. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1260. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  1261. continue;
  1262. SDE_DEBUG("blk id = %d\n", iter.blk->id);
  1263. iter.blk->rsvp_nxt = rsvp;
  1264. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1265. return 0;
  1266. }
  1267. if (!iter.hw && sde_kms->catalog->qdss_count) {
  1268. SDE_DEBUG("couldn't reserve qdss for type %d id %d\n",
  1269. SDE_HW_BLK_QDSS, iter.blk->id);
  1270. return -ENAVAIL;
  1271. }
  1272. return 0;
  1273. }
  1274. static int _sde_rm_reserve_cdm(
  1275. struct sde_rm *rm,
  1276. struct sde_rm_rsvp *rsvp,
  1277. uint32_t id,
  1278. enum sde_hw_blk_type type)
  1279. {
  1280. struct sde_rm_hw_iter iter;
  1281. sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_CDM);
  1282. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1283. const struct sde_hw_cdm *cdm = to_sde_hw_cdm(iter.blk->hw);
  1284. const struct sde_cdm_cfg *caps = cdm->caps;
  1285. bool match = false;
  1286. if (RESERVED_BY_OTHER(iter.blk, rsvp))
  1287. continue;
  1288. if (type == SDE_HW_BLK_INTF && id != INTF_MAX)
  1289. match = test_bit(id, &caps->intf_connect);
  1290. else if (type == SDE_HW_BLK_WB && id != WB_MAX)
  1291. match = test_bit(id, &caps->wb_connect);
  1292. SDE_DEBUG("type %d id %d, cdm intfs %lu wbs %lu match %d\n",
  1293. type, id, caps->intf_connect, caps->wb_connect,
  1294. match);
  1295. if (!match)
  1296. continue;
  1297. iter.blk->rsvp_nxt = rsvp;
  1298. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1299. break;
  1300. }
  1301. if (!iter.hw) {
  1302. SDE_ERROR("couldn't reserve cdm for type %d id %d\n", type, id);
  1303. return -ENAVAIL;
  1304. }
  1305. return 0;
  1306. }
  1307. static int _sde_rm_reserve_intf_or_wb(
  1308. struct sde_rm *rm,
  1309. struct sde_rm_rsvp *rsvp,
  1310. uint32_t id,
  1311. enum sde_hw_blk_type type,
  1312. bool needs_cdm)
  1313. {
  1314. struct sde_rm_hw_iter iter;
  1315. int ret = 0;
  1316. /* Find the block entry in the rm, and note the reservation */
  1317. sde_rm_init_hw_iter(&iter, 0, type);
  1318. while (_sde_rm_get_hw_locked(rm, &iter)) {
  1319. if (iter.blk->id != id)
  1320. continue;
  1321. if (RESERVED_BY_OTHER(iter.blk, rsvp)) {
  1322. SDE_ERROR("type %d id %d already reserved\n", type, id);
  1323. return -ENAVAIL;
  1324. }
  1325. iter.blk->rsvp_nxt = rsvp;
  1326. SDE_EVT32(iter.blk->type, rsvp->enc_id, iter.blk->id);
  1327. break;
  1328. }
  1329. /* Shouldn't happen since wbs / intfs are fixed at probe */
  1330. if (!iter.hw) {
  1331. SDE_ERROR("couldn't find type %d id %d\n", type, id);
  1332. return -EINVAL;
  1333. }
  1334. /* Expected only one intf or wb will request cdm */
  1335. if (needs_cdm)
  1336. ret = _sde_rm_reserve_cdm(rm, rsvp, id, type);
  1337. return ret;
  1338. }
  1339. static int _sde_rm_reserve_intf_related_hw(
  1340. struct sde_rm *rm,
  1341. struct sde_rm_rsvp *rsvp,
  1342. struct sde_encoder_hw_resources *hw_res)
  1343. {
  1344. int i, ret = 0;
  1345. u32 id;
  1346. for (i = 0; i < ARRAY_SIZE(hw_res->intfs); i++) {
  1347. if (hw_res->intfs[i] == INTF_MODE_NONE)
  1348. continue;
  1349. id = i + INTF_0;
  1350. ret = _sde_rm_reserve_intf_or_wb(rm, rsvp, id,
  1351. SDE_HW_BLK_INTF, hw_res->needs_cdm);
  1352. if (ret)
  1353. return ret;
  1354. }
  1355. for (i = 0; i < ARRAY_SIZE(hw_res->wbs); i++) {
  1356. if (hw_res->wbs[i] == INTF_MODE_NONE)
  1357. continue;
  1358. id = i + WB_0;
  1359. ret = _sde_rm_reserve_intf_or_wb(rm, rsvp, id,
  1360. SDE_HW_BLK_WB, hw_res->needs_cdm);
  1361. if (ret)
  1362. return ret;
  1363. }
  1364. return ret;
  1365. }
  1366. static bool _sde_rm_is_display_in_cont_splash(struct sde_kms *sde_kms,
  1367. struct drm_encoder *enc)
  1368. {
  1369. int i;
  1370. struct sde_splash_display *splash_dpy;
  1371. for (i = 0; i < MAX_DSI_DISPLAYS; i++) {
  1372. splash_dpy = &sde_kms->splash_data.splash_display[i];
  1373. if (splash_dpy->encoder == enc)
  1374. return splash_dpy->cont_splash_enabled;
  1375. }
  1376. return false;
  1377. }
  1378. static int _sde_rm_make_lm_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1379. struct sde_rm_requirements *reqs,
  1380. struct sde_splash_display *splash_display)
  1381. {
  1382. int ret, i;
  1383. u8 *hw_ids = NULL;
  1384. /* Check if splash data provided lm_ids */
  1385. if (splash_display) {
  1386. hw_ids = splash_display->lm_ids;
  1387. for (i = 0; i < splash_display->lm_cnt; i++)
  1388. SDE_DEBUG("splash_display->lm_ids[%d] = %d\n",
  1389. i, splash_display->lm_ids[i]);
  1390. if (splash_display->lm_cnt != reqs->topology->num_lm)
  1391. SDE_DEBUG("Configured splash LMs != needed LM cnt\n");
  1392. }
  1393. /*
  1394. * Assign LMs and blocks whose usage is tied to them:
  1395. * DSPP & Pingpong.
  1396. */
  1397. ret = _sde_rm_reserve_lms(rm, rsvp, reqs, hw_ids);
  1398. return ret;
  1399. }
  1400. static int _sde_rm_make_ctl_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1401. struct sde_rm_requirements *reqs,
  1402. struct sde_splash_display *splash_display)
  1403. {
  1404. int ret, i;
  1405. u8 *hw_ids = NULL;
  1406. struct sde_rm_topology_def topology;
  1407. /* Check if splash data provided ctl_ids */
  1408. if (splash_display) {
  1409. hw_ids = splash_display->ctl_ids;
  1410. for (i = 0; i < splash_display->ctl_cnt; i++)
  1411. SDE_DEBUG("splash_display->ctl_ids[%d] = %d\n",
  1412. i, splash_display->ctl_ids[i]);
  1413. }
  1414. /*
  1415. * Do assignment preferring to give away low-resource CTLs first:
  1416. * - Check mixers without Split Display
  1417. * - Only then allow to grab from CTLs with split display capability
  1418. */
  1419. ret = _sde_rm_reserve_ctls(rm, rsvp, reqs, reqs->topology, hw_ids);
  1420. if (ret && !reqs->topology->needs_split_display &&
  1421. reqs->topology->num_ctl > SINGLE_CTL) {
  1422. memcpy(&topology, reqs->topology, sizeof(topology));
  1423. topology.needs_split_display = true;
  1424. ret = _sde_rm_reserve_ctls(rm, rsvp, reqs, &topology, hw_ids);
  1425. }
  1426. return ret;
  1427. }
  1428. static int _sde_rm_make_dsc_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1429. struct sde_rm_requirements *reqs,
  1430. struct sde_splash_display *splash_display)
  1431. {
  1432. int i;
  1433. u8 *hw_ids = NULL;
  1434. /* Check if splash data provided dsc_ids */
  1435. if (splash_display) {
  1436. hw_ids = splash_display->dsc_ids;
  1437. if (splash_display->dsc_cnt)
  1438. reqs->hw_res.comp_info->comp_type =
  1439. MSM_DISPLAY_COMPRESSION_DSC;
  1440. for (i = 0; i < splash_display->dsc_cnt; i++)
  1441. SDE_DEBUG("splash_data.dsc_ids[%d] = %d\n",
  1442. i, splash_display->dsc_ids[i]);
  1443. }
  1444. return _sde_rm_reserve_dsc(rm, rsvp, reqs, hw_ids);
  1445. }
  1446. static int _sde_rm_make_vdc_rsvp(struct sde_rm *rm, struct sde_rm_rsvp *rsvp,
  1447. struct sde_rm_requirements *reqs,
  1448. struct sde_splash_display *splash_display)
  1449. {
  1450. int ret, i;
  1451. u8 *hw_ids = NULL;
  1452. /* Check if splash data provided vdc_ids */
  1453. if (splash_display) {
  1454. hw_ids = splash_display->vdc_ids;
  1455. for (i = 0; i < splash_display->vdc_cnt; i++)
  1456. SDE_DEBUG("splash_data.vdc_ids[%d] = %d\n",
  1457. i, splash_display->vdc_ids[i]);
  1458. }
  1459. ret = _sde_rm_reserve_vdc(rm, rsvp, reqs, reqs->topology, hw_ids);
  1460. return ret;
  1461. }
  1462. static int _sde_rm_make_next_rsvp(struct sde_rm *rm, struct drm_encoder *enc,
  1463. struct drm_crtc_state *crtc_state,
  1464. struct drm_connector_state *conn_state,
  1465. struct sde_rm_rsvp *rsvp,
  1466. struct sde_rm_requirements *reqs)
  1467. {
  1468. struct msm_drm_private *priv;
  1469. struct sde_kms *sde_kms;
  1470. struct sde_splash_display *splash_display = NULL;
  1471. struct sde_splash_data *splash_data;
  1472. int i, ret;
  1473. priv = enc->dev->dev_private;
  1474. sde_kms = to_sde_kms(priv->kms);
  1475. splash_data = &sde_kms->splash_data;
  1476. if (_sde_rm_is_display_in_cont_splash(sde_kms, enc)) {
  1477. for (i = 0; i < ARRAY_SIZE(splash_data->splash_display); i++) {
  1478. if (enc == splash_data->splash_display[i].encoder)
  1479. splash_display =
  1480. &splash_data->splash_display[i];
  1481. }
  1482. if (!splash_display) {
  1483. SDE_ERROR("rm is in cont_splash but data not found\n");
  1484. return -EINVAL;
  1485. }
  1486. }
  1487. /* Create reservation info, tag reserved blocks with it as we go */
  1488. rsvp->seq = ++rm->rsvp_next_seq;
  1489. rsvp->enc_id = enc->base.id;
  1490. rsvp->topology = reqs->topology->top_name;
  1491. list_add_tail(&rsvp->list, &rm->rsvps);
  1492. ret = _sde_rm_make_lm_rsvp(rm, rsvp, reqs, splash_display);
  1493. if (ret) {
  1494. SDE_ERROR("unable to find appropriate mixers\n");
  1495. _sde_rm_print_rsvps_by_type(rm, SDE_HW_BLK_LM);
  1496. return ret;
  1497. }
  1498. ret = _sde_rm_make_ctl_rsvp(rm, rsvp, reqs, splash_display);
  1499. if (ret) {
  1500. SDE_ERROR("unable to find appropriate CTL\n");
  1501. return ret;
  1502. }
  1503. /* Assign INTFs, WBs, and blks whose usage is tied to them: CTL & CDM */
  1504. ret = _sde_rm_reserve_intf_related_hw(rm, rsvp, &reqs->hw_res);
  1505. if (ret)
  1506. return ret;
  1507. ret = _sde_rm_make_dsc_rsvp(rm, rsvp, reqs, splash_display);
  1508. if (ret)
  1509. return ret;
  1510. ret = _sde_rm_make_vdc_rsvp(rm, rsvp, reqs, splash_display);
  1511. if (ret)
  1512. return ret;
  1513. ret = _sde_rm_reserve_qdss(rm, rsvp, reqs->topology, NULL);
  1514. if (ret)
  1515. return ret;
  1516. return ret;
  1517. }
  1518. /**
  1519. * _sde_rm_get_hw_blk_for_cont_splash - retrieve the LM blocks on given CTL
  1520. * and populate the connected HW blk ids in sde_splash_display
  1521. * @rm: Pointer to resource manager structure
  1522. * @ctl: Pointer to CTL hardware block
  1523. * @splash_display: Pointer to struct sde_splash_display
  1524. * return: number of active LM blocks for this CTL block
  1525. */
  1526. static int _sde_rm_get_hw_blk_for_cont_splash(struct sde_rm *rm,
  1527. struct sde_hw_ctl *ctl,
  1528. struct sde_splash_display *splash_display)
  1529. {
  1530. u32 lm_reg;
  1531. struct sde_rm_hw_iter iter_lm, iter_dsc;
  1532. if (!rm || !ctl || !splash_display) {
  1533. SDE_ERROR("invalid input parameters\n");
  1534. return 0;
  1535. }
  1536. sde_rm_init_hw_iter(&iter_lm, 0, SDE_HW_BLK_LM);
  1537. sde_rm_init_hw_iter(&iter_dsc, 0, SDE_HW_BLK_DSC);
  1538. while (_sde_rm_get_hw_locked(rm, &iter_lm)) {
  1539. if (splash_display->lm_cnt >= MAX_DATA_PATH_PER_DSIPLAY)
  1540. break;
  1541. lm_reg = ctl->ops.read_ctl_layers(ctl, iter_lm.blk->id);
  1542. if (!lm_reg)
  1543. continue;
  1544. splash_display->lm_ids[splash_display->lm_cnt++] =
  1545. iter_lm.blk->id;
  1546. SDE_DEBUG("lm_cnt=%d lm_reg[%d]=0x%x\n", splash_display->lm_cnt,
  1547. iter_lm.blk->id - LM_0, lm_reg);
  1548. if (ctl->ops.get_staged_sspp &&
  1549. ctl->ops.get_staged_sspp(ctl, iter_lm.blk->id,
  1550. &splash_display->pipes[
  1551. splash_display->pipe_cnt], 1)) {
  1552. splash_display->pipe_cnt++;
  1553. } else {
  1554. SDE_ERROR("no pipe detected on LM-%d\n",
  1555. iter_lm.blk->id - LM_0);
  1556. return 0;
  1557. }
  1558. }
  1559. while (_sde_rm_get_hw_locked(rm, &iter_dsc)) {
  1560. if (ctl->ops.read_active_status &&
  1561. !(ctl->ops.read_active_status(ctl,
  1562. SDE_HW_BLK_DSC,
  1563. iter_dsc.blk->id)))
  1564. continue;
  1565. splash_display->dsc_ids[splash_display->dsc_cnt++] =
  1566. iter_dsc.blk->id;
  1567. SDE_DEBUG("CTL[%d] path, using dsc[%d]\n",
  1568. ctl->idx,
  1569. iter_dsc.blk->id - DSC_0);
  1570. }
  1571. return splash_display->lm_cnt;
  1572. }
  1573. int sde_rm_cont_splash_res_init(struct msm_drm_private *priv,
  1574. struct sde_rm *rm,
  1575. struct sde_splash_data *splash_data,
  1576. struct sde_mdss_cfg *cat)
  1577. {
  1578. struct sde_rm_hw_iter iter_c;
  1579. int index = 0, ctl_top_cnt;
  1580. struct sde_kms *sde_kms = NULL;
  1581. struct sde_hw_mdp *hw_mdp;
  1582. struct sde_splash_display *splash_display;
  1583. u8 intf_sel;
  1584. if (!priv || !rm || !cat || !splash_data) {
  1585. SDE_ERROR("invalid input parameters\n");
  1586. return -EINVAL;
  1587. }
  1588. SDE_DEBUG("mixer_count=%d, ctl_count=%d, dsc_count=%d\n",
  1589. cat->mixer_count,
  1590. cat->ctl_count,
  1591. cat->dsc_count);
  1592. ctl_top_cnt = cat->ctl_count;
  1593. if (!priv->kms) {
  1594. SDE_ERROR("invalid kms\n");
  1595. return -EINVAL;
  1596. }
  1597. sde_kms = to_sde_kms(priv->kms);
  1598. hw_mdp = sde_rm_get_mdp(rm);
  1599. sde_rm_init_hw_iter(&iter_c, 0, SDE_HW_BLK_CTL);
  1600. while (_sde_rm_get_hw_locked(rm, &iter_c)
  1601. && (index < splash_data->num_splash_displays)) {
  1602. struct sde_hw_ctl *ctl = to_sde_hw_ctl(iter_c.blk->hw);
  1603. if (!ctl->ops.get_ctl_intf) {
  1604. SDE_ERROR("get_ctl_intf not initialized\n");
  1605. return -EINVAL;
  1606. }
  1607. intf_sel = ctl->ops.get_ctl_intf(ctl);
  1608. if (intf_sel) {
  1609. splash_display = &splash_data->splash_display[index];
  1610. SDE_DEBUG("finding resources for display=%d ctl=%d\n",
  1611. index, iter_c.blk->id - CTL_0);
  1612. _sde_rm_get_hw_blk_for_cont_splash(rm,
  1613. ctl, splash_display);
  1614. splash_display->cont_splash_enabled = true;
  1615. splash_display->ctl_ids[splash_display->ctl_cnt++] =
  1616. iter_c.blk->id;
  1617. }
  1618. index++;
  1619. }
  1620. return 0;
  1621. }
  1622. static int _sde_rm_populate_requirements(
  1623. struct sde_rm *rm,
  1624. struct drm_encoder *enc,
  1625. struct drm_crtc_state *crtc_state,
  1626. struct drm_connector_state *conn_state,
  1627. struct sde_rm_requirements *reqs)
  1628. {
  1629. const struct drm_display_mode *mode = &crtc_state->mode;
  1630. int i;
  1631. reqs->top_ctrl = sde_connector_get_property(conn_state,
  1632. CONNECTOR_PROP_TOPOLOGY_CONTROL);
  1633. sde_encoder_get_hw_resources(enc, &reqs->hw_res, conn_state);
  1634. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++) {
  1635. if (RM_IS_TOPOLOGY_MATCH(rm->topology_tbl[i],
  1636. reqs->hw_res.topology)) {
  1637. reqs->topology = &rm->topology_tbl[i];
  1638. break;
  1639. }
  1640. }
  1641. if (!reqs->topology) {
  1642. SDE_ERROR("invalid topology for the display\n");
  1643. return -EINVAL;
  1644. }
  1645. /*
  1646. * select dspp HW block for all dsi displays and ds for only
  1647. * primary dsi display.
  1648. */
  1649. if (conn_state->connector->connector_type == DRM_MODE_CONNECTOR_DSI) {
  1650. if (!RM_RQ_DSPP(reqs))
  1651. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DSPP);
  1652. if (!RM_RQ_DS(reqs) && rm->hw_mdp->caps->has_dest_scaler &&
  1653. sde_encoder_is_primary_display(enc))
  1654. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_DS);
  1655. }
  1656. /**
  1657. * Set the requirement for LM which has CWB support if CWB is
  1658. * found enabled.
  1659. */
  1660. if (!RM_RQ_CWB(reqs) && sde_encoder_in_clone_mode(enc)) {
  1661. reqs->top_ctrl |= BIT(SDE_RM_TOPCTL_CWB);
  1662. /*
  1663. * topology selection based on conn mode is not valid for CWB
  1664. * as WB conn populates modes based on max_mixer_width check
  1665. * but primary can be using dual LMs. This topology override for
  1666. * CWB is to check number of datapath active in primary and
  1667. * allocate same number of LM/PP blocks reserved for CWB
  1668. */
  1669. reqs->topology =
  1670. &rm->topology_tbl[SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE];
  1671. if (sde_crtc_get_num_datapath(crtc_state->crtc) == 1)
  1672. reqs->topology =
  1673. &rm->topology_tbl[SDE_RM_TOPOLOGY_SINGLEPIPE];
  1674. }
  1675. SDE_DEBUG("top_ctrl: 0x%llX num_h_tiles: %d\n", reqs->top_ctrl,
  1676. reqs->hw_res.display_num_of_h_tiles);
  1677. SDE_DEBUG("num_lm: %d num_ctl: %d topology: %d split_display: %d\n",
  1678. reqs->topology->num_lm, reqs->topology->num_ctl,
  1679. reqs->topology->top_name,
  1680. reqs->topology->needs_split_display);
  1681. SDE_EVT32(mode->hdisplay, rm->lm_max_width, reqs->topology->num_lm,
  1682. reqs->top_ctrl, reqs->topology->top_name,
  1683. reqs->topology->num_ctl);
  1684. return 0;
  1685. }
  1686. static struct sde_rm_rsvp *_sde_rm_get_rsvp(
  1687. struct sde_rm *rm,
  1688. struct drm_encoder *enc)
  1689. {
  1690. struct sde_rm_rsvp *i;
  1691. if (!rm || !enc) {
  1692. SDE_ERROR("invalid params\n");
  1693. return NULL;
  1694. }
  1695. if (list_empty(&rm->rsvps))
  1696. return NULL;
  1697. list_for_each_entry(i, &rm->rsvps, list)
  1698. if (i->enc_id == enc->base.id)
  1699. return i;
  1700. return NULL;
  1701. }
  1702. static struct sde_rm_rsvp *_sde_rm_get_rsvp_nxt(
  1703. struct sde_rm *rm,
  1704. struct drm_encoder *enc)
  1705. {
  1706. struct sde_rm_rsvp *i;
  1707. if (list_empty(&rm->rsvps))
  1708. return NULL;
  1709. list_for_each_entry(i, &rm->rsvps, list)
  1710. if (i->enc_id == enc->base.id)
  1711. break;
  1712. list_for_each_entry_continue(i, &rm->rsvps, list)
  1713. if (i->enc_id == enc->base.id)
  1714. return i;
  1715. return NULL;
  1716. }
  1717. static struct drm_connector *_sde_rm_get_connector(
  1718. struct drm_encoder *enc)
  1719. {
  1720. struct drm_connector *conn = NULL, *conn_search;
  1721. struct drm_connector_list_iter conn_iter;
  1722. drm_connector_list_iter_begin(enc->dev, &conn_iter);
  1723. drm_for_each_connector_iter(conn_search, &conn_iter) {
  1724. if (conn_search->encoder == enc) {
  1725. conn = conn_search;
  1726. break;
  1727. }
  1728. }
  1729. drm_connector_list_iter_end(&conn_iter);
  1730. return conn;
  1731. }
  1732. int sde_rm_update_topology(struct sde_rm *rm,
  1733. struct drm_connector_state *conn_state,
  1734. struct msm_display_topology *topology)
  1735. {
  1736. int i, ret = 0;
  1737. struct msm_display_topology top;
  1738. enum sde_rm_topology_name top_name = SDE_RM_TOPOLOGY_NONE;
  1739. if (!conn_state)
  1740. return -EINVAL;
  1741. if (topology) {
  1742. top = *topology;
  1743. for (i = 0; i < SDE_RM_TOPOLOGY_MAX; i++)
  1744. if (RM_IS_TOPOLOGY_MATCH(rm->topology_tbl[i], top)) {
  1745. top_name = rm->topology_tbl[i].top_name;
  1746. break;
  1747. }
  1748. }
  1749. ret = msm_property_set_property(
  1750. sde_connector_get_propinfo(conn_state->connector),
  1751. sde_connector_get_property_state(conn_state),
  1752. CONNECTOR_PROP_TOPOLOGY_NAME, top_name);
  1753. return ret;
  1754. }
  1755. bool sde_rm_topology_is_quad_pipe(struct sde_rm *rm,
  1756. struct drm_crtc_state *state)
  1757. {
  1758. int i;
  1759. struct sde_crtc_state *cstate;
  1760. uint64_t topology = SDE_RM_TOPOLOGY_NONE;
  1761. if ((!rm) || (!state)) {
  1762. pr_err("invalid arguments: rm:%d state:%d\n",
  1763. rm == NULL, state == NULL);
  1764. return false;
  1765. }
  1766. cstate = to_sde_crtc_state(state);
  1767. for (i = 0; i < cstate->num_connectors; i++) {
  1768. struct drm_connector *conn = cstate->connectors[i];
  1769. topology = sde_connector_get_topology_name(conn);
  1770. if (TOPOLOGY_QUADPIPE_MERGE_MODE(topology))
  1771. return true;
  1772. }
  1773. return false;
  1774. }
  1775. /**
  1776. * _sde_rm_release_rsvp - release resources and release a reservation
  1777. * @rm: KMS handle
  1778. * @rsvp: RSVP pointer to release and release resources for
  1779. */
  1780. static void _sde_rm_release_rsvp(
  1781. struct sde_rm *rm,
  1782. struct sde_rm_rsvp *rsvp,
  1783. struct drm_connector *conn)
  1784. {
  1785. struct sde_rm_rsvp *rsvp_c, *rsvp_n;
  1786. struct sde_rm_hw_blk *blk;
  1787. enum sde_hw_blk_type type;
  1788. if (!rsvp)
  1789. return;
  1790. SDE_DEBUG("rel rsvp %d enc %d\n", rsvp->seq, rsvp->enc_id);
  1791. list_for_each_entry_safe(rsvp_c, rsvp_n, &rm->rsvps, list) {
  1792. if (rsvp == rsvp_c) {
  1793. list_del(&rsvp_c->list);
  1794. break;
  1795. }
  1796. }
  1797. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1798. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  1799. if (blk->rsvp == rsvp) {
  1800. blk->rsvp = NULL;
  1801. SDE_DEBUG("rel rsvp %d enc %d %d %d\n",
  1802. rsvp->seq, rsvp->enc_id,
  1803. blk->type, blk->id);
  1804. _sde_rm_inc_resource_info(rm,
  1805. &rm->avail_res, blk);
  1806. }
  1807. if (blk->rsvp_nxt == rsvp) {
  1808. blk->rsvp_nxt = NULL;
  1809. SDE_DEBUG("rel rsvp_nxt %d enc %d %d %d\n",
  1810. rsvp->seq, rsvp->enc_id,
  1811. blk->type, blk->id);
  1812. }
  1813. }
  1814. }
  1815. kfree(rsvp);
  1816. }
  1817. void sde_rm_release(struct sde_rm *rm, struct drm_encoder *enc, bool nxt)
  1818. {
  1819. struct sde_rm_rsvp *rsvp;
  1820. struct drm_connector *conn = NULL;
  1821. struct msm_drm_private *priv;
  1822. struct sde_kms *sde_kms;
  1823. uint64_t top_ctrl = 0;
  1824. if (!rm || !enc) {
  1825. SDE_ERROR("invalid params\n");
  1826. return;
  1827. }
  1828. priv = enc->dev->dev_private;
  1829. if (!priv->kms) {
  1830. SDE_ERROR("invalid kms\n");
  1831. return;
  1832. }
  1833. sde_kms = to_sde_kms(priv->kms);
  1834. mutex_lock(&rm->rm_lock);
  1835. if (nxt)
  1836. rsvp = _sde_rm_get_rsvp_nxt(rm, enc);
  1837. else
  1838. rsvp = _sde_rm_get_rsvp(rm, enc);
  1839. if (!rsvp) {
  1840. SDE_DEBUG("failed to find rsvp for enc %d, nxt %d",
  1841. enc->base.id, nxt);
  1842. goto end;
  1843. }
  1844. if (_sde_rm_is_display_in_cont_splash(sde_kms, enc)) {
  1845. _sde_rm_release_rsvp(rm, rsvp, conn);
  1846. goto end;
  1847. }
  1848. conn = _sde_rm_get_connector(enc);
  1849. if (!conn) {
  1850. SDE_DEBUG("failed to get connector for enc %d, nxt %d",
  1851. enc->base.id, nxt);
  1852. SDE_EVT32(enc->base.id, 0x0, 0xffffffff);
  1853. _sde_rm_release_rsvp(rm, rsvp, conn);
  1854. goto end;
  1855. }
  1856. top_ctrl = sde_connector_get_property(conn->state,
  1857. CONNECTOR_PROP_TOPOLOGY_CONTROL);
  1858. SDE_EVT32(enc->base.id, conn->base.id, rsvp->seq, top_ctrl, nxt);
  1859. if (top_ctrl & BIT(SDE_RM_TOPCTL_RESERVE_LOCK)) {
  1860. SDE_DEBUG("rsvp[s%de%d] not releasing locked resources\n",
  1861. rsvp->seq, rsvp->enc_id);
  1862. } else {
  1863. SDE_DEBUG("release rsvp[s%de%d]\n", rsvp->seq,
  1864. rsvp->enc_id);
  1865. _sde_rm_release_rsvp(rm, rsvp, conn);
  1866. }
  1867. end:
  1868. mutex_unlock(&rm->rm_lock);
  1869. }
  1870. static int _sde_rm_commit_rsvp(
  1871. struct sde_rm *rm,
  1872. struct sde_rm_rsvp *rsvp,
  1873. struct drm_connector_state *conn_state)
  1874. {
  1875. struct sde_rm_hw_blk *blk;
  1876. enum sde_hw_blk_type type;
  1877. int ret = 0;
  1878. /* Swap next rsvp to be the active */
  1879. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  1880. list_for_each_entry(blk, &rm->hw_blks[type], list) {
  1881. if (blk->rsvp_nxt && conn_state->best_encoder->base.id
  1882. == blk->rsvp_nxt->enc_id) {
  1883. blk->rsvp = blk->rsvp_nxt;
  1884. blk->rsvp_nxt = NULL;
  1885. _sde_rm_dec_resource_info(rm,
  1886. &rm->avail_res, blk);
  1887. }
  1888. }
  1889. }
  1890. if (!ret) {
  1891. SDE_DEBUG("rsrv enc %d topology %d\n", rsvp->enc_id,
  1892. rsvp->topology);
  1893. SDE_EVT32(rsvp->enc_id, rsvp->topology);
  1894. }
  1895. return ret;
  1896. }
  1897. int sde_rm_reserve(
  1898. struct sde_rm *rm,
  1899. struct drm_encoder *enc,
  1900. struct drm_crtc_state *crtc_state,
  1901. struct drm_connector_state *conn_state,
  1902. bool test_only)
  1903. {
  1904. struct sde_rm_rsvp *rsvp_cur, *rsvp_nxt;
  1905. struct sde_rm_requirements reqs = {0,};
  1906. struct msm_drm_private *priv;
  1907. struct sde_kms *sde_kms;
  1908. struct msm_compression_info *comp_info;
  1909. int ret;
  1910. if (!rm || !enc || !crtc_state || !conn_state) {
  1911. SDE_ERROR("invalid arguments\n");
  1912. return -EINVAL;
  1913. }
  1914. if (!enc->dev || !enc->dev->dev_private) {
  1915. SDE_ERROR("drm device invalid\n");
  1916. return -EINVAL;
  1917. }
  1918. priv = enc->dev->dev_private;
  1919. if (!priv->kms) {
  1920. SDE_ERROR("invalid kms\n");
  1921. return -EINVAL;
  1922. }
  1923. sde_kms = to_sde_kms(priv->kms);
  1924. /* Check if this is just a page-flip */
  1925. if (!_sde_rm_is_display_in_cont_splash(sde_kms, enc) &&
  1926. !drm_atomic_crtc_needs_modeset(crtc_state))
  1927. return 0;
  1928. comp_info = kzalloc(sizeof(*comp_info), GFP_KERNEL);
  1929. if (!comp_info)
  1930. return -ENOMEM;
  1931. SDE_DEBUG("reserving hw for conn %d enc %d crtc %d test_only %d\n",
  1932. conn_state->connector->base.id, enc->base.id,
  1933. crtc_state->crtc->base.id, test_only);
  1934. SDE_EVT32(enc->base.id, conn_state->connector->base.id);
  1935. mutex_lock(&rm->rm_lock);
  1936. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_BEGIN);
  1937. rsvp_cur = _sde_rm_get_rsvp(rm, enc);
  1938. rsvp_nxt = _sde_rm_get_rsvp_nxt(rm, enc);
  1939. /*
  1940. * RM currently relies on rsvp_nxt assigned to the hw blocks to
  1941. * commit rsvps. This rsvp_nxt can be cleared by a back to back
  1942. * check_only commit with modeset when its predecessor atomic
  1943. * commit is delayed / not committed the reservation yet.
  1944. * Bail out in such cases so that check only commit
  1945. * comes again after earlier commit gets processed.
  1946. */
  1947. if (test_only && rsvp_nxt) {
  1948. SDE_ERROR("cur %d nxt %d enc %d conn %d\n", rsvp_cur->seq,
  1949. rsvp_nxt->seq, enc->base.id,
  1950. conn_state->connector->base.id);
  1951. ret = -EINVAL;
  1952. goto end;
  1953. }
  1954. if (!test_only && rsvp_nxt)
  1955. goto commit_rsvp;
  1956. reqs.hw_res.comp_info = comp_info;
  1957. ret = _sde_rm_populate_requirements(rm, enc, crtc_state,
  1958. conn_state, &reqs);
  1959. if (ret) {
  1960. SDE_ERROR("failed to populate hw requirements\n");
  1961. goto end;
  1962. }
  1963. /*
  1964. * We only support one active reservation per-hw-block. But to implement
  1965. * transactional semantics for test-only, and for allowing failure while
  1966. * modifying your existing reservation, over the course of this
  1967. * function we can have two reservations:
  1968. * Current: Existing reservation
  1969. * Next: Proposed reservation. The proposed reservation may fail, or may
  1970. * be discarded if in test-only mode.
  1971. * If reservation is successful, and we're not in test-only, then we
  1972. * replace the current with the next.
  1973. */
  1974. rsvp_nxt = kzalloc(sizeof(*rsvp_nxt), GFP_KERNEL);
  1975. if (!rsvp_nxt) {
  1976. ret = -ENOMEM;
  1977. goto end;
  1978. }
  1979. /*
  1980. * User can request that we clear out any reservation during the
  1981. * atomic_check phase by using this CLEAR bit
  1982. */
  1983. if (rsvp_cur && test_only && RM_RQ_CLEAR(&reqs)) {
  1984. SDE_DEBUG("test_only & CLEAR: clear rsvp[s%de%d]\n",
  1985. rsvp_cur->seq, rsvp_cur->enc_id);
  1986. _sde_rm_release_rsvp(rm, rsvp_cur, conn_state->connector);
  1987. rsvp_cur = NULL;
  1988. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_AFTER_CLEAR);
  1989. }
  1990. /* Check the proposed reservation, store it in hw's "next" field */
  1991. ret = _sde_rm_make_next_rsvp(rm, enc, crtc_state, conn_state,
  1992. rsvp_nxt, &reqs);
  1993. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_AFTER_RSVPNEXT);
  1994. if (ret) {
  1995. SDE_ERROR("failed to reserve hw resources: %d, test_only %d\n",
  1996. ret, test_only);
  1997. _sde_rm_release_rsvp(rm, rsvp_nxt, conn_state->connector);
  1998. goto end;
  1999. } else if (test_only && !RM_RQ_LOCK(&reqs)) {
  2000. /*
  2001. * Normally, if test_only, test the reservation and then undo
  2002. * However, if the user requests LOCK, then keep the reservation
  2003. * made during the atomic_check phase.
  2004. */
  2005. SDE_DEBUG("test_only: rsvp[s%de%d]\n",
  2006. rsvp_nxt->seq, rsvp_nxt->enc_id);
  2007. goto end;
  2008. } else {
  2009. if (test_only && RM_RQ_LOCK(&reqs))
  2010. SDE_DEBUG("test_only & LOCK: lock rsvp[s%de%d]\n",
  2011. rsvp_nxt->seq, rsvp_nxt->enc_id);
  2012. }
  2013. commit_rsvp:
  2014. _sde_rm_release_rsvp(rm, rsvp_cur, conn_state->connector);
  2015. ret = _sde_rm_commit_rsvp(rm, rsvp_nxt, conn_state);
  2016. end:
  2017. kfree(comp_info);
  2018. _sde_rm_print_rsvps(rm, SDE_RM_STAGE_FINAL);
  2019. mutex_unlock(&rm->rm_lock);
  2020. return ret;
  2021. }
  2022. int sde_rm_ext_blk_create_reserve(struct sde_rm *rm,
  2023. struct sde_hw_blk *hw, struct drm_encoder *enc)
  2024. {
  2025. struct sde_rm_hw_blk *blk;
  2026. struct sde_rm_rsvp *rsvp;
  2027. int ret = 0;
  2028. if (!rm || !hw || !enc) {
  2029. SDE_ERROR("invalid parameters\n");
  2030. return -EINVAL;
  2031. }
  2032. if (hw->type >= SDE_HW_BLK_MAX) {
  2033. SDE_ERROR("invalid HW type\n");
  2034. return -EINVAL;
  2035. }
  2036. mutex_lock(&rm->rm_lock);
  2037. rsvp = _sde_rm_get_rsvp(rm, enc);
  2038. if (!rsvp) {
  2039. rsvp = kzalloc(sizeof(*rsvp), GFP_KERNEL);
  2040. if (!rsvp) {
  2041. ret = -ENOMEM;
  2042. goto end;
  2043. }
  2044. rsvp->seq = ++rm->rsvp_next_seq;
  2045. rsvp->enc_id = enc->base.id;
  2046. list_add_tail(&rsvp->list, &rm->rsvps);
  2047. SDE_DEBUG("create rsvp %d for enc %d\n",
  2048. rsvp->seq, rsvp->enc_id);
  2049. }
  2050. blk = kzalloc(sizeof(*blk), GFP_KERNEL);
  2051. if (!blk) {
  2052. ret = -ENOMEM;
  2053. goto end;
  2054. }
  2055. blk->type = hw->type;
  2056. blk->id = hw->id;
  2057. blk->hw = hw;
  2058. blk->rsvp = rsvp;
  2059. list_add_tail(&blk->list, &rm->hw_blks[hw->type]);
  2060. SDE_DEBUG("create blk %d %d for rsvp %d enc %d\n", blk->type, blk->id,
  2061. rsvp->seq, rsvp->enc_id);
  2062. end:
  2063. mutex_unlock(&rm->rm_lock);
  2064. return ret;
  2065. }
  2066. int sde_rm_ext_blk_destroy(struct sde_rm *rm,
  2067. struct drm_encoder *enc)
  2068. {
  2069. struct sde_rm_hw_blk *blk = NULL, *p;
  2070. struct sde_rm_rsvp *rsvp;
  2071. enum sde_hw_blk_type type;
  2072. int ret = 0;
  2073. if (!rm || !enc) {
  2074. SDE_ERROR("invalid parameters\n");
  2075. return -EINVAL;
  2076. }
  2077. mutex_lock(&rm->rm_lock);
  2078. rsvp = _sde_rm_get_rsvp(rm, enc);
  2079. if (!rsvp) {
  2080. ret = -ENOENT;
  2081. SDE_ERROR("failed to find rsvp for enc %d\n", enc->base.id);
  2082. goto end;
  2083. }
  2084. for (type = 0; type < SDE_HW_BLK_MAX; type++) {
  2085. list_for_each_entry_safe(blk, p, &rm->hw_blks[type], list) {
  2086. if (blk->rsvp == rsvp) {
  2087. list_del(&blk->list);
  2088. SDE_DEBUG("del blk %d %d from rsvp %d enc %d\n",
  2089. blk->type, blk->id,
  2090. rsvp->seq, rsvp->enc_id);
  2091. kfree(blk);
  2092. }
  2093. }
  2094. }
  2095. SDE_DEBUG("del rsvp %d\n", rsvp->seq);
  2096. list_del(&rsvp->list);
  2097. kfree(rsvp);
  2098. end:
  2099. mutex_unlock(&rm->rm_lock);
  2100. return ret;
  2101. }