wcd937x.c 74 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <sound/soc.h>
  15. #include <sound/tlv.h>
  16. #include <soc/soundwire.h>
  17. #include <sound/soc.h>
  18. #include <sound/soc-dapm.h>
  19. #include "internal.h"
  20. #include "wcd937x.h"
  21. #include "../wcdcal-hwdep.h"
  22. #include "wcd937x-registers.h"
  23. #include "../msm-cdc-pinctrl.h"
  24. #include <dt-bindings/sound/audio-codec-port-types.h>
  25. #include "../msm-cdc-supply.h"
  26. #define DRV_NAME "wcd937x_codec"
  27. #define WCD9370_VARIANT 0
  28. #define WCD9375_VARIANT 5
  29. #define NUM_SWRS_DT_PARAMS 5
  30. #define WCD937X_VERSION_1_0 1
  31. #define WCD937X_VERSION_ENTRY_SIZE 32
  32. enum {
  33. CODEC_TX = 0,
  34. CODEC_RX,
  35. };
  36. enum {
  37. ALLOW_BUCK_DISABLE,
  38. HPH_COMP_DELAY,
  39. HPH_PA_DELAY,
  40. };
  41. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  42. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  43. static int wcd937x_handle_post_irq(void *data);
  44. static int wcd937x_reset(struct device *dev);
  45. static int wcd937x_reset_low(struct device *dev);
  46. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  47. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  48. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  49. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  50. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  51. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  52. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  53. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  54. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  55. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  56. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  57. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  58. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  59. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  60. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  61. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  62. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  63. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  64. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  65. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  66. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  67. };
  68. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  69. .name = "wcd937x",
  70. .irqs = wcd937x_irqs,
  71. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  72. .num_regs = 3,
  73. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  74. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  75. .ack_base = WCD937X_DIGITAL_INTR_CLEAR_0,
  76. .use_ack = 1,
  77. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  78. .runtime_pm = false,
  79. .handle_post_irq = wcd937x_handle_post_irq,
  80. .irq_drv_data = NULL,
  81. };
  82. static int wcd937x_handle_post_irq(void *data)
  83. {
  84. struct wcd937x_priv *wcd937x = data;
  85. u32 status1 = 0, status2 = 0, status3 = 0;
  86. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &status1);
  87. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &status2);
  88. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_2, &status3);
  89. wcd937x->tx_swr_dev->slave_irq_pending =
  90. ((status1 || status2 || status3) ? true : false);
  91. return IRQ_HANDLED;
  92. }
  93. static int wcd937x_init_reg(struct snd_soc_component *component)
  94. {
  95. snd_soc_component_update_bits(component, WCD937X_SLEEP_CTL,
  96. 0x0E, 0x0E);
  97. snd_soc_component_update_bits(component, WCD937X_SLEEP_CTL,
  98. 0x80, 0x80);
  99. usleep_range(1000, 1010);
  100. snd_soc_component_update_bits(component, WCD937X_SLEEP_CTL,
  101. 0x40, 0x40);
  102. usleep_range(1000, 1010);
  103. snd_soc_component_update_bits(component, WCD937X_LDORXTX_CONFIG,
  104. 0x10, 0x00);
  105. snd_soc_component_update_bits(component, WCD937X_BIAS_VBG_FINE_ADJ,
  106. 0xF0, 0x80);
  107. snd_soc_component_update_bits(component, WCD937X_ANA_BIAS,
  108. 0x80, 0x80);
  109. snd_soc_component_update_bits(component, WCD937X_ANA_BIAS,
  110. 0x40, 0x40);
  111. usleep_range(10000, 10010);
  112. snd_soc_component_update_bits(component, WCD937X_ANA_BIAS,
  113. 0x40, 0x00);
  114. snd_soc_component_update_bits(component, WCD937X_HPH_OCP_CTL,
  115. 0xFF, 0x3A);
  116. snd_soc_component_update_bits(component, WCD937X_RX_OCP_CTL,
  117. 0x0F, 0x02);
  118. snd_soc_component_update_bits(component, WCD937X_HPH_R_TEST,
  119. 0x01, 0x01);
  120. snd_soc_component_update_bits(component, WCD937X_HPH_L_TEST,
  121. 0x01, 0x01);
  122. return 0;
  123. }
  124. static int wcd937x_set_port_params(struct snd_soc_component *component,
  125. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  126. u8 *ch_mask, u32 *ch_rate,
  127. u8 *port_type, u8 path)
  128. {
  129. int i, j;
  130. u8 num_ports = 0;
  131. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  132. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  133. switch (path) {
  134. case CODEC_RX:
  135. map = &wcd937x->rx_port_mapping;
  136. num_ports = wcd937x->num_rx_ports;
  137. break;
  138. case CODEC_TX:
  139. map = &wcd937x->tx_port_mapping;
  140. num_ports = wcd937x->num_tx_ports;
  141. break;
  142. }
  143. for (i = 0; i <= num_ports; i++) {
  144. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  145. if ((*map)[i][j].slave_port_type == slv_prt_type)
  146. goto found;
  147. }
  148. }
  149. found:
  150. if (i > num_ports || j == MAX_CH_PER_PORT) {
  151. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  152. __func__, slv_prt_type);
  153. return -EINVAL;
  154. }
  155. *port_id = i;
  156. *num_ch = (*map)[i][j].num_ch;
  157. *ch_mask = (*map)[i][j].ch_mask;
  158. *ch_rate = (*map)[i][j].ch_rate;
  159. *port_type = (*map)[i][j].master_port_type;
  160. return 0;
  161. }
  162. static int wcd937x_parse_port_mapping(struct device *dev,
  163. char *prop, u8 path)
  164. {
  165. u32 *dt_array, map_size, map_length;
  166. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  167. u32 slave_port_type, master_port_type;
  168. u32 i, ch_iter = 0;
  169. int ret = 0;
  170. u8 *num_ports = NULL;
  171. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  172. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  173. switch (path) {
  174. case CODEC_RX:
  175. map = &wcd937x->rx_port_mapping;
  176. num_ports = &wcd937x->num_rx_ports;
  177. break;
  178. case CODEC_TX:
  179. map = &wcd937x->tx_port_mapping;
  180. num_ports = &wcd937x->num_tx_ports;
  181. break;
  182. }
  183. if (!of_find_property(dev->of_node, prop,
  184. &map_size)) {
  185. dev_err(dev, "missing port mapping prop %s\n", prop);
  186. ret = -EINVAL;
  187. goto err;
  188. }
  189. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  190. dt_array = kzalloc(map_size, GFP_KERNEL);
  191. if (!dt_array) {
  192. ret = -ENOMEM;
  193. goto err;
  194. }
  195. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  196. NUM_SWRS_DT_PARAMS * map_length);
  197. if (ret) {
  198. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  199. __func__, prop);
  200. ret = -EINVAL;
  201. goto err_pdata_fail;
  202. }
  203. for (i = 0; i < map_length; i++) {
  204. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  205. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  206. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  207. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  208. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  209. if (port_num != old_port_num)
  210. ch_iter = 0;
  211. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  212. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  213. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  214. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  215. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  216. old_port_num = port_num;
  217. }
  218. *num_ports = port_num;
  219. kfree(dt_array);
  220. return 0;
  221. err_pdata_fail:
  222. kfree(dt_array);
  223. err:
  224. return ret;
  225. }
  226. static int wcd937x_tx_connect_port(struct snd_soc_component *component,
  227. u8 slv_port_type, u8 enable)
  228. {
  229. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  230. u8 port_id;
  231. u8 num_ch;
  232. u8 ch_mask;
  233. u32 ch_rate;
  234. u8 port_type;
  235. u8 num_port = 1;
  236. int ret = 0;
  237. ret = wcd937x_set_port_params(component, slv_port_type, &port_id,
  238. &num_ch, &ch_mask, &ch_rate,
  239. &port_type, CODEC_TX);
  240. if (ret)
  241. return ret;
  242. if (enable)
  243. ret = swr_connect_port(wcd937x->tx_swr_dev, &port_id,
  244. num_port, &ch_mask, &ch_rate,
  245. &num_ch, &port_type);
  246. else
  247. ret = swr_disconnect_port(wcd937x->tx_swr_dev, &port_id,
  248. num_port, &ch_mask, &port_type);
  249. return ret;
  250. }
  251. static int wcd937x_rx_connect_port(struct snd_soc_component *component,
  252. u8 slv_port_type, u8 enable)
  253. {
  254. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  255. u8 port_id;
  256. u8 num_ch;
  257. u8 ch_mask;
  258. u32 ch_rate;
  259. u8 port_type;
  260. u8 num_port = 1;
  261. int ret = 0;
  262. ret = wcd937x_set_port_params(component, slv_port_type, &port_id,
  263. &num_ch, &ch_mask, &ch_rate,
  264. &port_type, CODEC_RX);
  265. if (ret)
  266. return ret;
  267. if (enable)
  268. ret = swr_connect_port(wcd937x->rx_swr_dev, &port_id,
  269. num_port, &ch_mask, &ch_rate,
  270. &num_ch, &port_type);
  271. else
  272. ret = swr_disconnect_port(wcd937x->rx_swr_dev, &port_id,
  273. num_port, &ch_mask, &port_type);
  274. return ret;
  275. }
  276. static int wcd937x_rx_clk_enable(struct snd_soc_component *component)
  277. {
  278. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  279. if (wcd937x->rx_clk_cnt == 0) {
  280. snd_soc_component_update_bits(component,
  281. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x08, 0x08);
  282. snd_soc_component_update_bits(component,
  283. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x01, 0x01);
  284. snd_soc_component_update_bits(component,
  285. WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  286. snd_soc_component_update_bits(component,
  287. WCD937X_DIGITAL_CDC_RX0_CTL, 0x40, 0x00);
  288. snd_soc_component_update_bits(component,
  289. WCD937X_DIGITAL_CDC_RX1_CTL, 0x40, 0x00);
  290. snd_soc_component_update_bits(component,
  291. WCD937X_DIGITAL_CDC_RX2_CTL, 0x40, 0x00);
  292. snd_soc_component_update_bits(component,
  293. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x02, 0x02);
  294. }
  295. wcd937x->rx_clk_cnt++;
  296. return 0;
  297. }
  298. static int wcd937x_rx_clk_disable(struct snd_soc_component *component)
  299. {
  300. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  301. if (wcd937x->rx_clk_cnt == 0) {
  302. dev_dbg(wcd937x->dev, "%s:clk already disabled\n", __func__);
  303. return 0;
  304. }
  305. wcd937x->rx_clk_cnt--;
  306. if (wcd937x->rx_clk_cnt == 0) {
  307. snd_soc_component_update_bits(component,
  308. WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  309. snd_soc_component_update_bits(component,
  310. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  311. 0x02, 0x00);
  312. snd_soc_component_update_bits(component,
  313. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  314. 0x01, 0x00);
  315. }
  316. return 0;
  317. }
  318. /*
  319. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding component
  320. * @component: handle to snd_soc_component *
  321. *
  322. * return wcd937x_mbhc handle or error code in case of failure
  323. */
  324. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_component *component)
  325. {
  326. struct wcd937x_priv *wcd937x;
  327. if (!component) {
  328. pr_err("%s: Invalid params, NULL component\n", __func__);
  329. return NULL;
  330. }
  331. wcd937x = snd_soc_component_get_drvdata(component);
  332. if (!wcd937x) {
  333. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  334. return NULL;
  335. }
  336. return wcd937x->mbhc;
  337. }
  338. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  339. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  340. struct snd_kcontrol *kcontrol,
  341. int event)
  342. {
  343. struct snd_soc_component *component =
  344. snd_soc_dapm_to_component(w->dapm);
  345. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  346. int hph_mode = wcd937x->hph_mode;
  347. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  348. w->name, event);
  349. switch (event) {
  350. case SND_SOC_DAPM_PRE_PMU:
  351. wcd937x_rx_clk_enable(component);
  352. snd_soc_component_update_bits(component,
  353. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  354. 0x01, 0x01);
  355. snd_soc_component_update_bits(component,
  356. WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  357. 0x04, 0x04);
  358. snd_soc_component_update_bits(component,
  359. WCD937X_HPH_RDAC_CLK_CTL1,
  360. 0x80, 0x00);
  361. set_bit(HPH_COMP_DELAY, &wcd937x->status_mask);
  362. break;
  363. case SND_SOC_DAPM_POST_PMU:
  364. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  365. snd_soc_component_update_bits(component,
  366. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  367. 0x0F, 0x02);
  368. else if (hph_mode == CLS_H_LOHIFI)
  369. snd_soc_component_update_bits(component,
  370. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  371. 0x0F, 0x06);
  372. if (wcd937x->comp1_enable) {
  373. snd_soc_component_update_bits(component,
  374. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  375. 0x02, 0x02);
  376. snd_soc_component_update_bits(component,
  377. WCD937X_HPH_L_EN, 0x20, 0x00);
  378. if (wcd937x->comp2_enable) {
  379. snd_soc_component_update_bits(component,
  380. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  381. 0x01, 0x01);
  382. snd_soc_component_update_bits(component,
  383. WCD937X_HPH_R_EN, 0x20, 0x00);
  384. }
  385. /*
  386. * 5ms sleep is required after COMP is enabled as per
  387. * HW requirement
  388. */
  389. if (test_bit(HPH_COMP_DELAY, &wcd937x->status_mask)) {
  390. usleep_range(5000, 5100);
  391. clear_bit(HPH_COMP_DELAY,
  392. &wcd937x->status_mask);
  393. }
  394. } else {
  395. snd_soc_component_update_bits(component,
  396. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  397. 0x02, 0x00);
  398. snd_soc_component_update_bits(component,
  399. WCD937X_HPH_L_EN, 0x20, 0x20);
  400. }
  401. snd_soc_component_update_bits(component,
  402. WCD937X_HPH_NEW_INT_HPH_TIMER1, 0x02, 0x00);
  403. break;
  404. case SND_SOC_DAPM_POST_PMD:
  405. snd_soc_component_update_bits(component,
  406. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  407. 0x0F, 0x01);
  408. break;
  409. }
  410. return 0;
  411. }
  412. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  413. struct snd_kcontrol *kcontrol,
  414. int event)
  415. {
  416. struct snd_soc_component *component =
  417. snd_soc_dapm_to_component(w->dapm);
  418. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  419. int hph_mode = wcd937x->hph_mode;
  420. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  421. w->name, event);
  422. switch (event) {
  423. case SND_SOC_DAPM_PRE_PMU:
  424. wcd937x_rx_clk_enable(component);
  425. snd_soc_component_update_bits(component,
  426. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x02, 0x02);
  427. snd_soc_component_update_bits(component,
  428. WCD937X_DIGITAL_CDC_HPH_GAIN_CTL, 0x08, 0x08);
  429. snd_soc_component_update_bits(component,
  430. WCD937X_HPH_RDAC_CLK_CTL1, 0x80, 0x00);
  431. set_bit(HPH_COMP_DELAY, &wcd937x->status_mask);
  432. break;
  433. case SND_SOC_DAPM_POST_PMU:
  434. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  435. snd_soc_component_update_bits(component,
  436. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  437. 0x0F, 0x02);
  438. else if (hph_mode == CLS_H_LOHIFI)
  439. snd_soc_component_update_bits(component,
  440. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  441. 0x0F, 0x06);
  442. if (wcd937x->comp2_enable) {
  443. snd_soc_component_update_bits(component,
  444. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  445. 0x01, 0x01);
  446. snd_soc_component_update_bits(component,
  447. WCD937X_HPH_R_EN, 0x20, 0x00);
  448. if (wcd937x->comp1_enable) {
  449. snd_soc_component_update_bits(component,
  450. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  451. 0x02, 0x02);
  452. snd_soc_component_update_bits(component,
  453. WCD937X_HPH_L_EN, 0x20, 0x00);
  454. }
  455. /*
  456. * 5ms sleep is required after COMP is enabled as per
  457. * HW requirement
  458. */
  459. if (test_bit(HPH_COMP_DELAY, &wcd937x->status_mask)) {
  460. usleep_range(5000, 5100);
  461. clear_bit(HPH_COMP_DELAY,
  462. &wcd937x->status_mask);
  463. }
  464. } else {
  465. snd_soc_component_update_bits(component,
  466. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  467. 0x01, 0x00);
  468. snd_soc_component_update_bits(component,
  469. WCD937X_HPH_R_EN, 0x20, 0x20);
  470. }
  471. snd_soc_component_update_bits(component,
  472. WCD937X_HPH_NEW_INT_HPH_TIMER1, 0x02, 0x00);
  473. break;
  474. case SND_SOC_DAPM_POST_PMD:
  475. snd_soc_component_update_bits(component,
  476. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  477. 0x0F, 0x01);
  478. break;
  479. }
  480. return 0;
  481. }
  482. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  483. struct snd_kcontrol *kcontrol,
  484. int event)
  485. {
  486. struct snd_soc_component *component =
  487. snd_soc_dapm_to_component(w->dapm);
  488. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  489. int hph_mode = wcd937x->hph_mode;
  490. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  491. w->name, event);
  492. switch (event) {
  493. case SND_SOC_DAPM_PRE_PMU:
  494. wcd937x_rx_clk_enable(component);
  495. snd_soc_component_update_bits(component,
  496. WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  497. 0x04, 0x04);
  498. snd_soc_component_update_bits(component,
  499. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  500. 0x01, 0x01);
  501. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_HIFI)
  502. snd_soc_component_update_bits(component,
  503. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  504. 0x0F, 0x02);
  505. else if (hph_mode == CLS_H_LOHIFI)
  506. snd_soc_component_update_bits(component,
  507. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  508. 0x0F, 0x06);
  509. snd_soc_component_update_bits(component,
  510. WCD937X_DIGITAL_CDC_COMP_CTL_0,
  511. 0x02, 0x02);
  512. usleep_range(5000, 5010);
  513. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  514. WCD_CLSH_EVENT_PRE_DAC,
  515. WCD_CLSH_STATE_EAR,
  516. hph_mode);
  517. break;
  518. case SND_SOC_DAPM_POST_PMD:
  519. if (hph_mode == CLS_AB_HIFI || hph_mode == CLS_H_LOHIFI ||
  520. hph_mode == CLS_H_HIFI)
  521. snd_soc_component_update_bits(component,
  522. WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  523. 0x0F, 0x01);
  524. break;
  525. };
  526. return 0;
  527. }
  528. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  529. struct snd_kcontrol *kcontrol,
  530. int event)
  531. {
  532. struct snd_soc_component *component =
  533. snd_soc_dapm_to_component(w->dapm);
  534. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  535. int hph_mode = wcd937x->hph_mode;
  536. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  537. w->name, event);
  538. switch (event) {
  539. case SND_SOC_DAPM_PRE_PMU:
  540. wcd937x_rx_clk_enable(component);
  541. snd_soc_component_update_bits(component,
  542. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  543. 0x04, 0x04);
  544. snd_soc_component_update_bits(component,
  545. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  546. 0x04, 0x04);
  547. snd_soc_component_update_bits(component,
  548. WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  549. 0x01, 0x01);
  550. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  551. WCD_CLSH_EVENT_PRE_DAC,
  552. WCD_CLSH_STATE_AUX,
  553. hph_mode);
  554. break;
  555. case SND_SOC_DAPM_POST_PMD:
  556. wcd937x_rx_clk_disable(component);
  557. snd_soc_component_update_bits(component,
  558. WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  559. 0x04, 0x00);
  560. break;
  561. };
  562. return 0;
  563. }
  564. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  565. struct snd_kcontrol *kcontrol,
  566. int event)
  567. {
  568. struct snd_soc_component *component =
  569. snd_soc_dapm_to_component(w->dapm);
  570. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  571. int ret = 0;
  572. int hph_mode = wcd937x->hph_mode;
  573. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  574. w->name, event);
  575. switch (event) {
  576. case SND_SOC_DAPM_PRE_PMU:
  577. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  578. wcd937x->rx_swr_dev->dev_num,
  579. true);
  580. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  581. WCD_CLSH_EVENT_PRE_DAC,
  582. WCD_CLSH_STATE_HPHR,
  583. hph_mode);
  584. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  585. 0x10, 0x10);
  586. usleep_range(100, 110);
  587. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  588. break;
  589. case SND_SOC_DAPM_POST_PMU:
  590. /*
  591. * 7ms sleep is required after PA is enabled as per
  592. * HW requirement. If compander is disabled, then
  593. * 20ms delay is required.
  594. */
  595. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  596. if (!wcd937x->comp2_enable)
  597. usleep_range(20000, 20100);
  598. else
  599. usleep_range(7000, 7100);
  600. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  601. }
  602. snd_soc_component_update_bits(component,
  603. WCD937X_HPH_NEW_INT_HPH_TIMER1,
  604. 0x02, 0x02);
  605. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  606. snd_soc_component_update_bits(component,
  607. WCD937X_ANA_RX_SUPPLIES,
  608. 0x02, 0x02);
  609. if (wcd937x->update_wcd_event)
  610. wcd937x->update_wcd_event(wcd937x->handle,
  611. WCD_BOLERO_EVT_RX_MUTE,
  612. (WCD_RX2 << 0x10));
  613. break;
  614. case SND_SOC_DAPM_PRE_PMD:
  615. if (wcd937x->update_wcd_event)
  616. wcd937x->update_wcd_event(wcd937x->handle,
  617. WCD_BOLERO_EVT_RX_MUTE,
  618. (WCD_RX2 << 0x10 | 0x1));
  619. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  620. WCD_EVENT_PRE_HPHR_PA_OFF,
  621. &wcd937x->mbhc->wcd_mbhc);
  622. break;
  623. case SND_SOC_DAPM_POST_PMD:
  624. usleep_range(7000, 7010);
  625. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  626. WCD_EVENT_POST_HPHR_PA_OFF,
  627. &wcd937x->mbhc->wcd_mbhc);
  628. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  629. 0x10, 0x00);
  630. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  631. WCD_CLSH_EVENT_POST_PA,
  632. WCD_CLSH_STATE_HPHR,
  633. hph_mode);
  634. break;
  635. };
  636. return ret;
  637. }
  638. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  639. struct snd_kcontrol *kcontrol,
  640. int event)
  641. {
  642. struct snd_soc_component *component =
  643. snd_soc_dapm_to_component(w->dapm);
  644. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  645. int ret = 0;
  646. int hph_mode = wcd937x->hph_mode;
  647. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  648. w->name, event);
  649. switch (event) {
  650. case SND_SOC_DAPM_PRE_PMU:
  651. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  652. wcd937x->rx_swr_dev->dev_num,
  653. true);
  654. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  655. WCD_CLSH_EVENT_PRE_DAC,
  656. WCD_CLSH_STATE_HPHL,
  657. hph_mode);
  658. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  659. 0x20, 0x20);
  660. usleep_range(100, 110);
  661. set_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  662. break;
  663. case SND_SOC_DAPM_POST_PMU:
  664. /*
  665. * 7ms sleep is required after PA is enabled as per
  666. * HW requirement. If compander is disabled, then
  667. * 20ms delay is required.
  668. */
  669. if (test_bit(HPH_PA_DELAY, &wcd937x->status_mask)) {
  670. if (!wcd937x->comp1_enable)
  671. usleep_range(20000, 20100);
  672. else
  673. usleep_range(7000, 7100);
  674. clear_bit(HPH_PA_DELAY, &wcd937x->status_mask);
  675. }
  676. snd_soc_component_update_bits(component,
  677. WCD937X_HPH_NEW_INT_HPH_TIMER1,
  678. 0x02, 0x02);
  679. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  680. snd_soc_component_update_bits(component,
  681. WCD937X_ANA_RX_SUPPLIES,
  682. 0x02, 0x02);
  683. if (wcd937x->update_wcd_event)
  684. wcd937x->update_wcd_event(wcd937x->handle,
  685. WCD_BOLERO_EVT_RX_MUTE,
  686. (WCD_RX1 << 0x10));
  687. break;
  688. case SND_SOC_DAPM_PRE_PMD:
  689. if (wcd937x->update_wcd_event)
  690. wcd937x->update_wcd_event(wcd937x->handle,
  691. WCD_BOLERO_EVT_RX_MUTE,
  692. (WCD_RX1 << 0x10 | 0x1));
  693. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  694. WCD_EVENT_PRE_HPHL_PA_OFF,
  695. &wcd937x->mbhc->wcd_mbhc);
  696. break;
  697. case SND_SOC_DAPM_POST_PMD:
  698. usleep_range(7000, 7010);
  699. blocking_notifier_call_chain(&wcd937x->mbhc->notifier,
  700. WCD_EVENT_POST_HPHL_PA_OFF,
  701. &wcd937x->mbhc->wcd_mbhc);
  702. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  703. 0x20, 0x00);
  704. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  705. WCD_CLSH_EVENT_POST_PA,
  706. WCD_CLSH_STATE_HPHL,
  707. hph_mode);
  708. break;
  709. };
  710. return ret;
  711. }
  712. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  713. struct snd_kcontrol *kcontrol,
  714. int event)
  715. {
  716. struct snd_soc_component *component =
  717. snd_soc_dapm_to_component(w->dapm);
  718. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  719. int hph_mode = wcd937x->hph_mode;
  720. int ret = 0;
  721. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  722. w->name, event);
  723. switch (event) {
  724. case SND_SOC_DAPM_PRE_PMU:
  725. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  726. wcd937x->rx_swr_dev->dev_num,
  727. true);
  728. break;
  729. case SND_SOC_DAPM_POST_PMU:
  730. usleep_range(1000, 1010);
  731. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  732. snd_soc_component_update_bits(component,
  733. WCD937X_ANA_RX_SUPPLIES,
  734. 0x02, 0x02);
  735. if (wcd937x->update_wcd_event)
  736. wcd937x->update_wcd_event(wcd937x->handle,
  737. WCD_BOLERO_EVT_RX_MUTE,
  738. (WCD_RX3 << 0x10));
  739. break;
  740. case SND_SOC_DAPM_PRE_PMD:
  741. if (wcd937x->update_wcd_event)
  742. wcd937x->update_wcd_event(wcd937x->handle,
  743. WCD_BOLERO_EVT_RX_MUTE,
  744. (WCD_RX3 << 0x10 | 0x1));
  745. break;
  746. case SND_SOC_DAPM_POST_PMD:
  747. usleep_range(1000, 1010);
  748. usleep_range(1000, 1010);
  749. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  750. WCD_CLSH_EVENT_POST_PA,
  751. WCD_CLSH_STATE_AUX,
  752. hph_mode);
  753. break;
  754. };
  755. return ret;
  756. }
  757. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  758. struct snd_kcontrol *kcontrol,
  759. int event)
  760. {
  761. struct snd_soc_component *component =
  762. snd_soc_dapm_to_component(w->dapm);
  763. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  764. int hph_mode = wcd937x->hph_mode;
  765. int ret = 0;
  766. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  767. w->name, event);
  768. switch (event) {
  769. case SND_SOC_DAPM_PRE_PMU:
  770. ret = swr_slvdev_datapath_control(wcd937x->rx_swr_dev,
  771. wcd937x->rx_swr_dev->dev_num,
  772. true);
  773. break;
  774. case SND_SOC_DAPM_POST_PMU:
  775. usleep_range(6000, 6010);
  776. if (hph_mode == CLS_AB || hph_mode == CLS_AB_HIFI)
  777. snd_soc_component_update_bits(component,
  778. WCD937X_ANA_RX_SUPPLIES,
  779. 0x02, 0x02);
  780. if (wcd937x->update_wcd_event)
  781. wcd937x->update_wcd_event(wcd937x->handle,
  782. WCD_BOLERO_EVT_RX_MUTE,
  783. (WCD_RX1 << 0x10));
  784. break;
  785. case SND_SOC_DAPM_PRE_PMD:
  786. if (wcd937x->update_wcd_event)
  787. wcd937x->update_wcd_event(wcd937x->handle,
  788. WCD_BOLERO_EVT_RX_MUTE,
  789. (WCD_RX1 << 0x10 | 0x1));
  790. break;
  791. case SND_SOC_DAPM_POST_PMD:
  792. usleep_range(7000, 7010);
  793. wcd_cls_h_fsm(component, &wcd937x->clsh_info,
  794. WCD_CLSH_EVENT_POST_PA,
  795. WCD_CLSH_STATE_EAR,
  796. hph_mode);
  797. break;
  798. };
  799. return ret;
  800. }
  801. static int wcd937x_enable_clsh(struct snd_soc_dapm_widget *w,
  802. struct snd_kcontrol *kcontrol,
  803. int event)
  804. {
  805. struct snd_soc_component *component =
  806. snd_soc_dapm_to_component(w->dapm);
  807. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  808. int mode = wcd937x->hph_mode;
  809. int ret = 0;
  810. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  811. w->name, event);
  812. if (mode == CLS_H_LOHIFI || mode == CLS_H_ULP ||
  813. mode == CLS_H_HIFI || mode == CLS_H_LP) {
  814. wcd937x_rx_connect_port(component, CLSH,
  815. SND_SOC_DAPM_EVENT_ON(event));
  816. }
  817. if (SND_SOC_DAPM_EVENT_OFF(event))
  818. ret = swr_slvdev_datapath_control(
  819. wcd937x->rx_swr_dev,
  820. wcd937x->rx_swr_dev->dev_num,
  821. false);
  822. return ret;
  823. }
  824. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  825. struct snd_kcontrol *kcontrol,
  826. int event)
  827. {
  828. struct snd_soc_component *component =
  829. snd_soc_dapm_to_component(w->dapm);
  830. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  831. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  832. w->name, event);
  833. switch (event) {
  834. case SND_SOC_DAPM_PRE_PMU:
  835. wcd937x_rx_connect_port(component, HPH_L, true);
  836. if (wcd937x->comp1_enable)
  837. wcd937x_rx_connect_port(component, COMP_L, true);
  838. break;
  839. case SND_SOC_DAPM_POST_PMD:
  840. wcd937x_rx_connect_port(component, HPH_L, false);
  841. if (wcd937x->comp1_enable)
  842. wcd937x_rx_connect_port(component, COMP_L, false);
  843. wcd937x_rx_clk_disable(component);
  844. snd_soc_component_update_bits(component,
  845. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  846. 0x01, 0x00);
  847. break;
  848. };
  849. return 0;
  850. }
  851. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  852. struct snd_kcontrol *kcontrol, int event)
  853. {
  854. struct snd_soc_component *component =
  855. snd_soc_dapm_to_component(w->dapm);
  856. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  857. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  858. w->name, event);
  859. switch (event) {
  860. case SND_SOC_DAPM_PRE_PMU:
  861. wcd937x_rx_connect_port(component, HPH_R, true);
  862. if (wcd937x->comp2_enable)
  863. wcd937x_rx_connect_port(component, COMP_R, true);
  864. break;
  865. case SND_SOC_DAPM_POST_PMD:
  866. wcd937x_rx_connect_port(component, HPH_R, false);
  867. if (wcd937x->comp2_enable)
  868. wcd937x_rx_connect_port(component, COMP_R, false);
  869. wcd937x_rx_clk_disable(component);
  870. snd_soc_component_update_bits(component,
  871. WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  872. 0x02, 0x00);
  873. break;
  874. };
  875. return 0;
  876. }
  877. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  878. struct snd_kcontrol *kcontrol,
  879. int event)
  880. {
  881. struct snd_soc_component *component =
  882. snd_soc_dapm_to_component(w->dapm);
  883. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  884. w->name, event);
  885. switch (event) {
  886. case SND_SOC_DAPM_PRE_PMU:
  887. wcd937x_rx_connect_port(component, LO, true);
  888. break;
  889. case SND_SOC_DAPM_POST_PMD:
  890. wcd937x_rx_connect_port(component, LO, false);
  891. usleep_range(6000, 6010);
  892. wcd937x_rx_clk_disable(component);
  893. snd_soc_component_update_bits(component,
  894. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x04, 0x00);
  895. break;
  896. }
  897. return 0;
  898. }
  899. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  900. struct snd_kcontrol *kcontrol,
  901. int event)
  902. {
  903. struct snd_soc_component *component =
  904. snd_soc_dapm_to_component(w->dapm);
  905. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  906. u16 dmic_clk_reg;
  907. s32 *dmic_clk_cnt;
  908. unsigned int dmic;
  909. char *wname;
  910. int ret = 0;
  911. wname = strpbrk(w->name, "012345");
  912. if (!wname) {
  913. dev_err(component->dev, "%s: widget not found\n", __func__);
  914. return -EINVAL;
  915. }
  916. ret = kstrtouint(wname, 10, &dmic);
  917. if (ret < 0) {
  918. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  919. __func__);
  920. return -EINVAL;
  921. }
  922. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  923. w->name, event);
  924. switch (dmic) {
  925. case 0:
  926. case 1:
  927. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  928. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC0_CTL;
  929. break;
  930. case 2:
  931. case 3:
  932. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  933. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  934. break;
  935. case 4:
  936. case 5:
  937. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  938. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  939. break;
  940. default:
  941. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  942. __func__);
  943. return -EINVAL;
  944. };
  945. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  946. __func__, event, dmic, *dmic_clk_cnt);
  947. switch (event) {
  948. case SND_SOC_DAPM_PRE_PMU:
  949. snd_soc_component_update_bits(component,
  950. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x80, 0x80);
  951. snd_soc_component_update_bits(component,
  952. dmic_clk_reg, 0x07, 0x02);
  953. snd_soc_component_update_bits(component,
  954. dmic_clk_reg, 0x08, 0x08);
  955. snd_soc_component_update_bits(component,
  956. dmic_clk_reg, 0x70, 0x20);
  957. wcd937x_tx_connect_port(component, DMIC0 + (w->shift), true);
  958. break;
  959. case SND_SOC_DAPM_POST_PMD:
  960. wcd937x_tx_connect_port(component, DMIC0 + (w->shift), false);
  961. break;
  962. };
  963. return 0;
  964. }
  965. /*
  966. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  967. * @micb_mv: micbias in mv
  968. *
  969. * return register value converted
  970. */
  971. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  972. {
  973. /* min micbias voltage is 1V and maximum is 2.85V */
  974. if (micb_mv < 1000 || micb_mv > 2850) {
  975. pr_err("%s: unsupported micbias voltage\n", __func__);
  976. return -EINVAL;
  977. }
  978. return (micb_mv - 1000) / 50;
  979. }
  980. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  981. /*
  982. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  983. * @component: handle to snd_soc_component *
  984. * @req_volt: micbias voltage to be set
  985. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  986. *
  987. * return 0 if adjustment is success or error code in case of failure
  988. */
  989. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  990. int req_volt, int micb_num)
  991. {
  992. struct wcd937x_priv *wcd937x =
  993. snd_soc_component_get_drvdata(component);
  994. int cur_vout_ctl, req_vout_ctl;
  995. int micb_reg, micb_val, micb_en;
  996. int ret = 0;
  997. switch (micb_num) {
  998. case MIC_BIAS_1:
  999. micb_reg = WCD937X_ANA_MICB1;
  1000. break;
  1001. case MIC_BIAS_2:
  1002. micb_reg = WCD937X_ANA_MICB2;
  1003. break;
  1004. case MIC_BIAS_3:
  1005. micb_reg = WCD937X_ANA_MICB3;
  1006. break;
  1007. default:
  1008. return -EINVAL;
  1009. }
  1010. mutex_lock(&wcd937x->micb_lock);
  1011. /*
  1012. * If requested micbias voltage is same as current micbias
  1013. * voltage, then just return. Otherwise, adjust voltage as
  1014. * per requested value. If micbias is already enabled, then
  1015. * to avoid slow micbias ramp-up or down enable pull-up
  1016. * momentarily, change the micbias value and then re-enable
  1017. * micbias.
  1018. */
  1019. micb_val = snd_soc_component_read32(component, micb_reg);
  1020. micb_en = (micb_val & 0xC0) >> 6;
  1021. cur_vout_ctl = micb_val & 0x3F;
  1022. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  1023. if (req_vout_ctl < 0) {
  1024. ret = -EINVAL;
  1025. goto exit;
  1026. }
  1027. if (cur_vout_ctl == req_vout_ctl) {
  1028. ret = 0;
  1029. goto exit;
  1030. }
  1031. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  1032. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  1033. req_volt, micb_en);
  1034. if (micb_en == 0x1)
  1035. snd_soc_component_update_bits(component, micb_reg, 0xC0, 0x80);
  1036. snd_soc_component_update_bits(component, micb_reg, 0x3F, req_vout_ctl);
  1037. if (micb_en == 0x1) {
  1038. snd_soc_component_update_bits(component, micb_reg, 0xC0, 0x40);
  1039. /*
  1040. * Add 2ms delay as per HW requirement after enabling
  1041. * micbias
  1042. */
  1043. usleep_range(2000, 2100);
  1044. }
  1045. exit:
  1046. mutex_unlock(&wcd937x->micb_lock);
  1047. return ret;
  1048. }
  1049. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  1050. static int wcd937x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  1051. struct snd_kcontrol *kcontrol,
  1052. int event)
  1053. {
  1054. struct snd_soc_component *component =
  1055. snd_soc_dapm_to_component(w->dapm);
  1056. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1057. int ret = 0;
  1058. switch (event) {
  1059. case SND_SOC_DAPM_PRE_PMU:
  1060. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  1061. wcd937x->tx_swr_dev->dev_num,
  1062. true);
  1063. break;
  1064. case SND_SOC_DAPM_POST_PMD:
  1065. ret = swr_slvdev_datapath_control(wcd937x->tx_swr_dev,
  1066. wcd937x->tx_swr_dev->dev_num,
  1067. false);
  1068. break;
  1069. };
  1070. return ret;
  1071. }
  1072. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  1073. struct snd_kcontrol *kcontrol,
  1074. int event){
  1075. struct snd_soc_component *component =
  1076. snd_soc_dapm_to_component(w->dapm);
  1077. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1078. w->name, event);
  1079. switch (event) {
  1080. case SND_SOC_DAPM_PRE_PMU:
  1081. snd_soc_component_update_bits(component,
  1082. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x80, 0x80);
  1083. snd_soc_component_update_bits(component,
  1084. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x08, 0x08);
  1085. snd_soc_component_update_bits(component,
  1086. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  1087. wcd937x_tx_connect_port(component, ADC1 + (w->shift), true);
  1088. break;
  1089. case SND_SOC_DAPM_POST_PMD:
  1090. wcd937x_tx_connect_port(component, ADC1 + (w->shift), false);
  1091. snd_soc_component_update_bits(component,
  1092. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x08, 0x00);
  1093. break;
  1094. };
  1095. return 0;
  1096. }
  1097. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  1098. struct snd_kcontrol *kcontrol, int event)
  1099. {
  1100. struct snd_soc_component *component =
  1101. snd_soc_dapm_to_component(w->dapm);
  1102. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1103. w->name, event);
  1104. switch (event) {
  1105. case SND_SOC_DAPM_PRE_PMU:
  1106. snd_soc_component_update_bits(component,
  1107. WCD937X_DIGITAL_CDC_REQ_CTL, 0x02, 0x02);
  1108. snd_soc_component_update_bits(component,
  1109. WCD937X_DIGITAL_CDC_REQ_CTL, 0x01, 0x00);
  1110. snd_soc_component_update_bits(component,
  1111. WCD937X_ANA_TX_CH2, 0x40, 0x40);
  1112. snd_soc_component_update_bits(component,
  1113. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x30, 0x30);
  1114. snd_soc_component_update_bits(component,
  1115. WCD937X_ANA_TX_CH1, 0x80, 0x80);
  1116. snd_soc_component_update_bits(component,
  1117. WCD937X_ANA_TX_CH2, 0x40, 0x00);
  1118. snd_soc_component_update_bits(component,
  1119. WCD937X_ANA_TX_CH2, 0x80, 0x80);
  1120. break;
  1121. case SND_SOC_DAPM_POST_PMD:
  1122. snd_soc_component_update_bits(component,
  1123. WCD937X_ANA_TX_CH1, 0x80, 0x00);
  1124. snd_soc_component_update_bits(component,
  1125. WCD937X_ANA_TX_CH2, 0x80, 0x00);
  1126. snd_soc_component_update_bits(component,
  1127. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x10, 0x00);
  1128. snd_soc_component_update_bits(component,
  1129. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x00);
  1130. snd_soc_component_update_bits(component,
  1131. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0x80, 0x00);
  1132. break;
  1133. };
  1134. return 0;
  1135. }
  1136. int wcd937x_micbias_control(struct snd_soc_component *component,
  1137. int micb_num, int req, bool is_dapm)
  1138. {
  1139. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1140. int micb_index = micb_num - 1;
  1141. u16 micb_reg;
  1142. int pre_off_event = 0, post_off_event = 0;
  1143. int post_on_event = 0, post_dapm_off = 0;
  1144. int post_dapm_on = 0;
  1145. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  1146. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1147. __func__, micb_index);
  1148. return -EINVAL;
  1149. }
  1150. switch (micb_num) {
  1151. case MIC_BIAS_1:
  1152. micb_reg = WCD937X_ANA_MICB1;
  1153. break;
  1154. case MIC_BIAS_2:
  1155. micb_reg = WCD937X_ANA_MICB2;
  1156. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1157. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1158. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1159. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1160. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1161. break;
  1162. case MIC_BIAS_3:
  1163. micb_reg = WCD937X_ANA_MICB3;
  1164. break;
  1165. default:
  1166. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1167. __func__, micb_num);
  1168. return -EINVAL;
  1169. };
  1170. mutex_lock(&wcd937x->micb_lock);
  1171. switch (req) {
  1172. case MICB_PULLUP_ENABLE:
  1173. wcd937x->pullup_ref[micb_index]++;
  1174. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  1175. (wcd937x->micb_ref[micb_index] == 0))
  1176. snd_soc_component_update_bits(component, micb_reg,
  1177. 0xC0, 0x80);
  1178. break;
  1179. case MICB_PULLUP_DISABLE:
  1180. if (wcd937x->pullup_ref[micb_index] > 0)
  1181. wcd937x->pullup_ref[micb_index]--;
  1182. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  1183. (wcd937x->micb_ref[micb_index] == 0))
  1184. snd_soc_component_update_bits(component, micb_reg,
  1185. 0xC0, 0x00);
  1186. break;
  1187. case MICB_ENABLE:
  1188. wcd937x->micb_ref[micb_index]++;
  1189. if (wcd937x->micb_ref[micb_index] == 1) {
  1190. snd_soc_component_update_bits(component,
  1191. WCD937X_DIGITAL_CDC_DIG_CLK_CTL, 0xE0, 0xE0);
  1192. snd_soc_component_update_bits(component,
  1193. WCD937X_DIGITAL_CDC_ANA_CLK_CTL, 0x10, 0x10);
  1194. snd_soc_component_update_bits(component,
  1195. WCD937X_MICB1_TEST_CTL_2, 0x01, 0x01);
  1196. snd_soc_component_update_bits(component,
  1197. WCD937X_MICB2_TEST_CTL_2, 0x01, 0x01);
  1198. snd_soc_component_update_bits(component,
  1199. WCD937X_MICB3_TEST_CTL_2, 0x01, 0x01);
  1200. snd_soc_component_update_bits(component,
  1201. micb_reg, 0xC0, 0x40);
  1202. if (post_on_event)
  1203. blocking_notifier_call_chain(
  1204. &wcd937x->mbhc->notifier, post_on_event,
  1205. &wcd937x->mbhc->wcd_mbhc);
  1206. }
  1207. if (is_dapm && post_dapm_on && wcd937x->mbhc)
  1208. blocking_notifier_call_chain(
  1209. &wcd937x->mbhc->notifier, post_dapm_on,
  1210. &wcd937x->mbhc->wcd_mbhc);
  1211. break;
  1212. case MICB_DISABLE:
  1213. if (wcd937x->micb_ref[micb_index] > 0)
  1214. wcd937x->micb_ref[micb_index]--;
  1215. if ((wcd937x->micb_ref[micb_index] == 0) &&
  1216. (wcd937x->pullup_ref[micb_index] > 0))
  1217. snd_soc_component_update_bits(component, micb_reg,
  1218. 0xC0, 0x80);
  1219. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  1220. (wcd937x->pullup_ref[micb_index] == 0)) {
  1221. if (pre_off_event && wcd937x->mbhc)
  1222. blocking_notifier_call_chain(
  1223. &wcd937x->mbhc->notifier, pre_off_event,
  1224. &wcd937x->mbhc->wcd_mbhc);
  1225. snd_soc_component_update_bits(component, micb_reg,
  1226. 0xC0, 0x00);
  1227. if (post_off_event && wcd937x->mbhc)
  1228. blocking_notifier_call_chain(
  1229. &wcd937x->mbhc->notifier,
  1230. post_off_event,
  1231. &wcd937x->mbhc->wcd_mbhc);
  1232. }
  1233. if (is_dapm && post_dapm_off && wcd937x->mbhc)
  1234. blocking_notifier_call_chain(
  1235. &wcd937x->mbhc->notifier, post_dapm_off,
  1236. &wcd937x->mbhc->wcd_mbhc);
  1237. break;
  1238. };
  1239. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1240. __func__, micb_num, wcd937x->micb_ref[micb_index],
  1241. wcd937x->pullup_ref[micb_index]);
  1242. mutex_unlock(&wcd937x->micb_lock);
  1243. return 0;
  1244. }
  1245. EXPORT_SYMBOL(wcd937x_micbias_control);
  1246. static int wcd937x_get_logical_addr(struct swr_device *swr_dev)
  1247. {
  1248. int ret = 0;
  1249. uint8_t devnum = 0;
  1250. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1251. if (ret) {
  1252. dev_err(&swr_dev->dev,
  1253. "%s get devnum %d for dev addr %lx failed\n",
  1254. __func__, devnum, swr_dev->addr);
  1255. swr_remove_device(swr_dev);
  1256. return ret;
  1257. }
  1258. swr_dev->dev_num = devnum;
  1259. return 0;
  1260. }
  1261. static int wcd937x_event_notify(struct notifier_block *block,
  1262. unsigned long val,
  1263. void *data)
  1264. {
  1265. u16 event = (val & 0xffff);
  1266. u16 amic = (val >> 0x10);
  1267. u16 mask = 0x40, reg = 0x0;
  1268. int ret = 0;
  1269. struct wcd937x_priv *wcd937x = dev_get_drvdata((struct device *)data);
  1270. struct snd_soc_component *component = wcd937x->component;
  1271. struct wcd_mbhc *mbhc;
  1272. switch (event) {
  1273. case BOLERO_WCD_EVT_TX_CH_HOLD_CLEAR:
  1274. if (amic == 0x1 || amic == 0x2)
  1275. reg = WCD937X_ANA_TX_CH2;
  1276. else if (amic == 0x3)
  1277. reg = WCD937X_ANA_TX_CH3_HPF;
  1278. else
  1279. return 0;
  1280. if (amic == 0x2)
  1281. mask = 0x20;
  1282. snd_soc_component_update_bits(component, reg, mask, 0x00);
  1283. break;
  1284. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1285. snd_soc_component_update_bits(component, WCD937X_ANA_HPH,
  1286. 0xC0, 0x00);
  1287. snd_soc_component_update_bits(component, WCD937X_ANA_EAR,
  1288. 0x80, 0x00);
  1289. snd_soc_component_update_bits(component, WCD937X_AUX_AUXPA,
  1290. 0x80, 0x00);
  1291. break;
  1292. case BOLERO_WCD_EVT_SSR_DOWN:
  1293. wcd937x_reset_low(wcd937x->dev);
  1294. break;
  1295. case BOLERO_WCD_EVT_SSR_UP:
  1296. wcd937x_reset(wcd937x->dev);
  1297. wcd937x_get_logical_addr(wcd937x->tx_swr_dev);
  1298. wcd937x_get_logical_addr(wcd937x->rx_swr_dev);
  1299. regcache_mark_dirty(wcd937x->regmap);
  1300. regcache_sync(wcd937x->regmap);
  1301. /* Initialize MBHC module */
  1302. mbhc = &wcd937x->mbhc->wcd_mbhc;
  1303. ret = wcd937x_mbhc_post_ssr_init(wcd937x->mbhc, component);
  1304. if (ret) {
  1305. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1306. __func__);
  1307. } else {
  1308. wcd937x_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1309. }
  1310. break;
  1311. default:
  1312. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1313. event);
  1314. break;
  1315. }
  1316. return 0;
  1317. }
  1318. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1319. int event)
  1320. {
  1321. struct snd_soc_component *component =
  1322. snd_soc_dapm_to_component(w->dapm);
  1323. int micb_num;
  1324. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1325. __func__, w->name, event);
  1326. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1327. micb_num = MIC_BIAS_1;
  1328. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1329. micb_num = MIC_BIAS_2;
  1330. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1331. micb_num = MIC_BIAS_3;
  1332. else
  1333. return -EINVAL;
  1334. switch (event) {
  1335. case SND_SOC_DAPM_PRE_PMU:
  1336. wcd937x_micbias_control(component, micb_num,
  1337. MICB_ENABLE, true);
  1338. break;
  1339. case SND_SOC_DAPM_POST_PMU:
  1340. usleep_range(1000, 1100);
  1341. break;
  1342. case SND_SOC_DAPM_POST_PMD:
  1343. wcd937x_micbias_control(component, micb_num,
  1344. MICB_DISABLE, true);
  1345. break;
  1346. };
  1347. return 0;
  1348. }
  1349. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1350. struct snd_kcontrol *kcontrol,
  1351. int event)
  1352. {
  1353. return __wcd937x_codec_enable_micbias(w, event);
  1354. }
  1355. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  1356. struct snd_ctl_elem_value *ucontrol)
  1357. {
  1358. struct snd_soc_component *component =
  1359. snd_soc_kcontrol_component(kcontrol);
  1360. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1361. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  1362. return 0;
  1363. }
  1364. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  1365. struct snd_ctl_elem_value *ucontrol)
  1366. {
  1367. struct snd_soc_component *component =
  1368. snd_soc_kcontrol_component(kcontrol);
  1369. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1370. u32 mode_val;
  1371. mode_val = ucontrol->value.enumerated.item[0];
  1372. dev_dbg(component->dev, "%s: mode: %d\n", __func__, mode_val);
  1373. if (mode_val == 0) {
  1374. dev_warn(component->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  1375. __func__);
  1376. mode_val = 3; /* enum will be updated later */
  1377. }
  1378. wcd937x->hph_mode = mode_val;
  1379. return 0;
  1380. }
  1381. static int wcd937x_get_compander(struct snd_kcontrol *kcontrol,
  1382. struct snd_ctl_elem_value *ucontrol)
  1383. {
  1384. struct snd_soc_component *component =
  1385. snd_soc_kcontrol_component(kcontrol);
  1386. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1387. bool hphr;
  1388. struct soc_multi_mixer_control *mc;
  1389. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1390. hphr = mc->shift;
  1391. ucontrol->value.integer.value[0] = hphr ? wcd937x->comp2_enable :
  1392. wcd937x->comp1_enable;
  1393. return 0;
  1394. }
  1395. static int wcd937x_set_compander(struct snd_kcontrol *kcontrol,
  1396. struct snd_ctl_elem_value *ucontrol)
  1397. {
  1398. struct snd_soc_component *component =
  1399. snd_soc_kcontrol_component(kcontrol);
  1400. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1401. int value = ucontrol->value.integer.value[0];
  1402. bool hphr;
  1403. struct soc_multi_mixer_control *mc;
  1404. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1405. hphr = mc->shift;
  1406. if (hphr)
  1407. wcd937x->comp2_enable = value;
  1408. else
  1409. wcd937x->comp1_enable = value;
  1410. return 0;
  1411. }
  1412. static int wcd937x_codec_enable_vdd_buck(struct snd_soc_dapm_widget *w,
  1413. struct snd_kcontrol *kcontrol,
  1414. int event)
  1415. {
  1416. struct snd_soc_component *component =
  1417. snd_soc_dapm_to_component(w->dapm);
  1418. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1419. struct wcd937x_pdata *pdata = NULL;
  1420. int ret = 0;
  1421. pdata = dev_get_platdata(wcd937x->dev);
  1422. if (!pdata) {
  1423. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1424. return -EINVAL;
  1425. }
  1426. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1427. w->name, event);
  1428. switch (event) {
  1429. case SND_SOC_DAPM_PRE_PMU:
  1430. if (test_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask)) {
  1431. dev_dbg(component->dev,
  1432. "%s: buck already in enabled state\n",
  1433. __func__);
  1434. return 0;
  1435. }
  1436. ret = msm_cdc_enable_ondemand_supply(wcd937x->dev,
  1437. wcd937x->supplies,
  1438. pdata->regulator,
  1439. pdata->num_supplies,
  1440. "cdc-vdd-buck");
  1441. if (ret == -EINVAL) {
  1442. dev_err(component->dev, "%s: vdd buck is not enabled\n",
  1443. __func__);
  1444. return ret;
  1445. }
  1446. clear_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1447. /*
  1448. * 200us sleep is required after LDO15 is enabled as per
  1449. * HW requirement
  1450. */
  1451. usleep_range(200, 250);
  1452. break;
  1453. case SND_SOC_DAPM_POST_PMD:
  1454. set_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1455. break;
  1456. }
  1457. return 0;
  1458. }
  1459. static const char * const rx_hph_mode_mux_text[] = {
  1460. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  1461. "CLS_H_ULP", "CLS_AB_HIFI",
  1462. };
  1463. static const struct soc_enum rx_hph_mode_mux_enum =
  1464. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  1465. rx_hph_mode_mux_text);
  1466. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  1467. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  1468. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  1469. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1470. wcd937x_get_compander, wcd937x_set_compander),
  1471. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1472. wcd937x_get_compander, wcd937x_set_compander),
  1473. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  1474. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  1475. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0,
  1476. analog_gain),
  1477. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0,
  1478. analog_gain),
  1479. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0,
  1480. analog_gain),
  1481. };
  1482. static const struct snd_kcontrol_new adc1_switch[] = {
  1483. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1484. };
  1485. static const struct snd_kcontrol_new adc2_switch[] = {
  1486. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1487. };
  1488. static const struct snd_kcontrol_new adc3_switch[] = {
  1489. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1490. };
  1491. static const struct snd_kcontrol_new dmic1_switch[] = {
  1492. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1493. };
  1494. static const struct snd_kcontrol_new dmic2_switch[] = {
  1495. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1496. };
  1497. static const struct snd_kcontrol_new dmic3_switch[] = {
  1498. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1499. };
  1500. static const struct snd_kcontrol_new dmic4_switch[] = {
  1501. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1502. };
  1503. static const struct snd_kcontrol_new dmic5_switch[] = {
  1504. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1505. };
  1506. static const struct snd_kcontrol_new dmic6_switch[] = {
  1507. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1508. };
  1509. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1510. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1511. };
  1512. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  1513. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1514. };
  1515. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1516. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1517. };
  1518. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1519. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1520. };
  1521. static const char * const adc2_mux_text[] = {
  1522. "INP2", "INP3"
  1523. };
  1524. static const char * const rdac3_mux_text[] = {
  1525. "RX1", "RX3"
  1526. };
  1527. static const struct soc_enum adc2_enum =
  1528. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  1529. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1530. static const struct soc_enum rdac3_enum =
  1531. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  1532. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  1533. static const struct snd_kcontrol_new tx_adc2_mux =
  1534. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1535. static const struct snd_kcontrol_new rx_rdac3_mux =
  1536. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  1537. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  1538. /*input widgets*/
  1539. SND_SOC_DAPM_INPUT("AMIC1"),
  1540. SND_SOC_DAPM_INPUT("AMIC2"),
  1541. SND_SOC_DAPM_INPUT("AMIC3"),
  1542. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1543. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1544. SND_SOC_DAPM_INPUT("IN3_AUX"),
  1545. /*tx widgets*/
  1546. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1547. wcd937x_codec_enable_adc,
  1548. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1549. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1550. wcd937x_codec_enable_adc,
  1551. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1552. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  1553. NULL, 0, wcd937x_enable_req,
  1554. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1555. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  1556. NULL, 0, wcd937x_enable_req,
  1557. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1558. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1559. &tx_adc2_mux),
  1560. /*tx mixers*/
  1561. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1562. adc1_switch, ARRAY_SIZE(adc1_switch),
  1563. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1564. SND_SOC_DAPM_POST_PMD),
  1565. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1566. adc2_switch, ARRAY_SIZE(adc2_switch),
  1567. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1568. SND_SOC_DAPM_POST_PMD),
  1569. /* micbias widgets*/
  1570. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1571. wcd937x_codec_enable_micbias,
  1572. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1573. SND_SOC_DAPM_POST_PMD),
  1574. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1575. wcd937x_codec_enable_micbias,
  1576. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1577. SND_SOC_DAPM_POST_PMD),
  1578. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1579. wcd937x_codec_enable_micbias,
  1580. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1581. SND_SOC_DAPM_POST_PMD),
  1582. SND_SOC_DAPM_SUPPLY("VDD_BUCK", SND_SOC_NOPM, 0, 0,
  1583. wcd937x_codec_enable_vdd_buck,
  1584. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1585. SND_SOC_DAPM_SUPPLY_S("CLS_H_PORT", 1, SND_SOC_NOPM, 0, 0,
  1586. wcd937x_enable_clsh,
  1587. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1588. /*rx widgets*/
  1589. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  1590. wcd937x_codec_enable_ear_pa,
  1591. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1592. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1593. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  1594. wcd937x_codec_enable_aux_pa,
  1595. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1596. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1597. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  1598. wcd937x_codec_enable_hphl_pa,
  1599. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1600. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1601. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  1602. wcd937x_codec_enable_hphr_pa,
  1603. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1604. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1605. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1606. wcd937x_codec_hphl_dac_event,
  1607. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1608. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1609. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1610. wcd937x_codec_hphr_dac_event,
  1611. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1612. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1613. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1614. wcd937x_codec_ear_dac_event,
  1615. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1616. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1617. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  1618. wcd937x_codec_aux_dac_event,
  1619. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1620. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1621. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  1622. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1623. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1624. SND_SOC_DAPM_POST_PMD),
  1625. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1626. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1627. SND_SOC_DAPM_POST_PMD),
  1628. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  1629. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  1630. SND_SOC_DAPM_POST_PMD),
  1631. /* rx mixer widgets*/
  1632. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1633. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1634. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  1635. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  1636. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1637. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1638. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1639. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1640. /*output widgets tx*/
  1641. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1642. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1643. /*output widgets rx*/
  1644. SND_SOC_DAPM_OUTPUT("EAR"),
  1645. SND_SOC_DAPM_OUTPUT("AUX"),
  1646. SND_SOC_DAPM_OUTPUT("HPHL"),
  1647. SND_SOC_DAPM_OUTPUT("HPHR"),
  1648. };
  1649. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  1650. /*input widgets*/
  1651. SND_SOC_DAPM_INPUT("AMIC4"),
  1652. /*tx widgets*/
  1653. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 2, 0,
  1654. wcd937x_codec_enable_adc,
  1655. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1656. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  1657. NULL, 0, wcd937x_enable_req,
  1658. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1659. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1660. wcd937x_codec_enable_dmic,
  1661. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1662. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1663. wcd937x_codec_enable_dmic,
  1664. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1665. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 2, 0,
  1666. wcd937x_codec_enable_dmic,
  1667. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1668. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 3, 0,
  1669. wcd937x_codec_enable_dmic,
  1670. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1671. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 4, 0,
  1672. wcd937x_codec_enable_dmic,
  1673. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1674. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 5, 0,
  1675. wcd937x_codec_enable_dmic,
  1676. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1677. /*tx mixer widgets*/
  1678. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1679. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1680. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1681. SND_SOC_DAPM_POST_PMD),
  1682. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1683. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1684. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1685. SND_SOC_DAPM_POST_PMD),
  1686. SND_SOC_DAPM_MIXER_E("DMIC3_MIXER", SND_SOC_NOPM, 0,
  1687. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch),
  1688. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1689. SND_SOC_DAPM_POST_PMD),
  1690. SND_SOC_DAPM_MIXER_E("DMIC4_MIXER", SND_SOC_NOPM, 0,
  1691. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch),
  1692. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1693. SND_SOC_DAPM_POST_PMD),
  1694. SND_SOC_DAPM_MIXER_E("DMIC5_MIXER", SND_SOC_NOPM, 0,
  1695. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch),
  1696. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1697. SND_SOC_DAPM_POST_PMD),
  1698. SND_SOC_DAPM_MIXER_E("DMIC6_MIXER", SND_SOC_NOPM, 0,
  1699. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch),
  1700. wcd937x_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1701. SND_SOC_DAPM_POST_PMD),
  1702. SND_SOC_DAPM_MIXER_E("ADC3_MIXER", SND_SOC_NOPM, 0, 0, adc3_switch,
  1703. ARRAY_SIZE(adc3_switch), wcd937x_tx_swr_ctrl,
  1704. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1705. /*output widgets*/
  1706. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1707. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1708. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  1709. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  1710. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  1711. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  1712. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  1713. };
  1714. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  1715. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1716. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  1717. {"ADC1 REQ", NULL, "ADC1"},
  1718. {"ADC1", NULL, "AMIC1"},
  1719. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1720. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  1721. {"ADC2 REQ", NULL, "ADC2"},
  1722. {"ADC2", NULL, "ADC2 MUX"},
  1723. {"ADC2 MUX", "INP3", "AMIC3"},
  1724. {"ADC2 MUX", "INP2", "AMIC2"},
  1725. {"IN1_HPHL", NULL, "VDD_BUCK"},
  1726. {"IN1_HPHL", NULL, "CLS_H_PORT"},
  1727. {"RX1", NULL, "IN1_HPHL"},
  1728. {"RDAC1", NULL, "RX1"},
  1729. {"HPHL_RDAC", "Switch", "RDAC1"},
  1730. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1731. {"HPHL", NULL, "HPHL PGA"},
  1732. {"IN2_HPHR", NULL, "VDD_BUCK"},
  1733. {"IN2_HPHR", NULL, "CLS_H_PORT"},
  1734. {"RX2", NULL, "IN2_HPHR"},
  1735. {"RDAC2", NULL, "RX2"},
  1736. {"HPHR_RDAC", "Switch", "RDAC2"},
  1737. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1738. {"HPHR", NULL, "HPHR PGA"},
  1739. {"IN3_AUX", NULL, "VDD_BUCK"},
  1740. {"IN3_AUX", NULL, "CLS_H_PORT"},
  1741. {"RX3", NULL, "IN3_AUX"},
  1742. {"RDAC4", NULL, "RX3"},
  1743. {"AUX_RDAC", "Switch", "RDAC4"},
  1744. {"AUX PGA", NULL, "AUX_RDAC"},
  1745. {"AUX", NULL, "AUX PGA"},
  1746. {"RDAC3_MUX", "RX3", "RX3"},
  1747. {"RDAC3_MUX", "RX1", "RX1"},
  1748. {"RDAC3", NULL, "RDAC3_MUX"},
  1749. {"EAR_RDAC", "Switch", "RDAC3"},
  1750. {"EAR PGA", NULL, "EAR_RDAC"},
  1751. {"EAR", NULL, "EAR PGA"},
  1752. };
  1753. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  1754. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  1755. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  1756. {"ADC3 REQ", NULL, "ADC3"},
  1757. {"ADC3", NULL, "AMIC4"},
  1758. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1759. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1760. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1761. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1762. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  1763. {"DMIC3_MIXER", "Switch", "DMIC3"},
  1764. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  1765. {"DMIC4_MIXER", "Switch", "DMIC4"},
  1766. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  1767. {"DMIC5_MIXER", "Switch", "DMIC5"},
  1768. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  1769. {"DMIC6_MIXER", "Switch", "DMIC6"},
  1770. };
  1771. static ssize_t wcd937x_version_read(struct snd_info_entry *entry,
  1772. void *file_private_data,
  1773. struct file *file,
  1774. char __user *buf, size_t count,
  1775. loff_t pos)
  1776. {
  1777. struct wcd937x_priv *priv;
  1778. char buffer[WCD937X_VERSION_ENTRY_SIZE];
  1779. int len = 0;
  1780. priv = (struct wcd937x_priv *) entry->private_data;
  1781. if (!priv) {
  1782. pr_err("%s: wcd937x priv is null\n", __func__);
  1783. return -EINVAL;
  1784. }
  1785. switch (priv->version) {
  1786. case WCD937X_VERSION_1_0:
  1787. len = snprintf(buffer, sizeof(buffer), "WCD937X_1_0\n");
  1788. break;
  1789. default:
  1790. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1791. }
  1792. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1793. }
  1794. static struct snd_info_entry_ops wcd937x_info_ops = {
  1795. .read = wcd937x_version_read,
  1796. };
  1797. /*
  1798. * wcd937x_info_create_codec_entry - creates wcd937x module
  1799. * @codec_root: The parent directory
  1800. * @component: component instance
  1801. *
  1802. * Creates wcd937x module and version entry under the given
  1803. * parent directory.
  1804. *
  1805. * Return: 0 on success or negative error code on failure.
  1806. */
  1807. int wcd937x_info_create_codec_entry(struct snd_info_entry *codec_root,
  1808. struct snd_soc_component *component)
  1809. {
  1810. struct snd_info_entry *version_entry;
  1811. struct wcd937x_priv *priv;
  1812. struct snd_soc_card *card;
  1813. if (!codec_root || !component)
  1814. return -EINVAL;
  1815. priv = snd_soc_component_get_drvdata(component);
  1816. if (priv->entry) {
  1817. dev_dbg(priv->dev,
  1818. "%s:wcd937x module already created\n", __func__);
  1819. return 0;
  1820. }
  1821. card = component->card;
  1822. priv->entry = snd_info_create_subdir(codec_root->module,
  1823. "wcd937x", codec_root);
  1824. if (!priv->entry) {
  1825. dev_dbg(component->dev, "%s: failed to create wcd937x entry\n",
  1826. __func__);
  1827. return -ENOMEM;
  1828. }
  1829. version_entry = snd_info_create_card_entry(card->snd_card,
  1830. "version",
  1831. priv->entry);
  1832. if (!version_entry) {
  1833. dev_dbg(component->dev, "%s: failed to create wcd937x version entry\n",
  1834. __func__);
  1835. return -ENOMEM;
  1836. }
  1837. version_entry->private_data = priv;
  1838. version_entry->size = WCD937X_VERSION_ENTRY_SIZE;
  1839. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1840. version_entry->c.ops = &wcd937x_info_ops;
  1841. if (snd_info_register(version_entry) < 0) {
  1842. snd_info_free_entry(version_entry);
  1843. return -ENOMEM;
  1844. }
  1845. priv->version_entry = version_entry;
  1846. return 0;
  1847. }
  1848. EXPORT_SYMBOL(wcd937x_info_create_codec_entry);
  1849. static int wcd937x_soc_codec_probe(struct snd_soc_component *component)
  1850. {
  1851. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1852. struct snd_soc_dapm_context *dapm =
  1853. snd_soc_component_get_dapm(component);
  1854. int variant;
  1855. int ret = -EINVAL;
  1856. dev_info(component->dev, "%s()\n", __func__);
  1857. wcd937x = snd_soc_component_get_drvdata(component);
  1858. if (!wcd937x)
  1859. return -EINVAL;
  1860. wcd937x->component = component;
  1861. variant = (snd_soc_component_read32(
  1862. component, WCD937X_DIGITAL_EFUSE_REG_0) & 0x0E) >> 1;
  1863. wcd937x->variant = variant;
  1864. wcd937x->fw_data = devm_kzalloc(component->dev,
  1865. sizeof(*(wcd937x->fw_data)),
  1866. GFP_KERNEL);
  1867. if (!wcd937x->fw_data) {
  1868. dev_err(component->dev, "Failed to allocate fw_data\n");
  1869. ret = -ENOMEM;
  1870. goto err;
  1871. }
  1872. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  1873. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  1874. WCD9XXX_CODEC_HWDEP_NODE, component);
  1875. if (ret < 0) {
  1876. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  1877. goto err_hwdep;
  1878. }
  1879. ret = wcd937x_mbhc_init(&wcd937x->mbhc, component, wcd937x->fw_data);
  1880. if (ret) {
  1881. pr_err("%s: mbhc initialization failed\n", __func__);
  1882. goto err_hwdep;
  1883. }
  1884. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1885. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1886. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1887. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1888. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1889. snd_soc_dapm_ignore_suspend(dapm, "IN3_AUX");
  1890. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1891. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1892. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1893. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  1894. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1895. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1896. snd_soc_dapm_sync(dapm);
  1897. wcd_cls_h_init(&wcd937x->clsh_info);
  1898. wcd937x_init_reg(component);
  1899. if (wcd937x->variant == WCD9375_VARIANT) {
  1900. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  1901. ARRAY_SIZE(wcd9375_dapm_widgets));
  1902. if (ret < 0) {
  1903. dev_err(component->dev, "%s: Failed to add snd_ctls\n",
  1904. __func__);
  1905. goto err_hwdep;
  1906. }
  1907. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  1908. ARRAY_SIZE(wcd9375_audio_map));
  1909. if (ret < 0) {
  1910. dev_err(component->dev, "%s: Failed to add routes\n",
  1911. __func__);
  1912. goto err_hwdep;
  1913. }
  1914. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  1915. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1916. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1917. snd_soc_dapm_ignore_suspend(dapm, "DMIC3_OUTPUT");
  1918. snd_soc_dapm_ignore_suspend(dapm, "DMIC4_OUTPUT");
  1919. snd_soc_dapm_ignore_suspend(dapm, "DMIC5_OUTPUT");
  1920. snd_soc_dapm_ignore_suspend(dapm, "DMIC6_OUTPUT");
  1921. snd_soc_dapm_ignore_suspend(dapm, "ADC3_OUTPUT");
  1922. snd_soc_dapm_sync(dapm);
  1923. }
  1924. wcd937x->version = WCD937X_VERSION_1_0;
  1925. /* Register event notifier */
  1926. wcd937x->nblock.notifier_call = wcd937x_event_notify;
  1927. if (wcd937x->register_notifier) {
  1928. ret = wcd937x->register_notifier(wcd937x->handle,
  1929. &wcd937x->nblock,
  1930. true);
  1931. if (ret) {
  1932. dev_err(component->dev,
  1933. "%s: Failed to register notifier %d\n",
  1934. __func__, ret);
  1935. return ret;
  1936. }
  1937. }
  1938. return ret;
  1939. err_hwdep:
  1940. wcd937x->fw_data = NULL;
  1941. err:
  1942. return ret;
  1943. }
  1944. static void wcd937x_soc_codec_remove(struct snd_soc_component *component)
  1945. {
  1946. struct wcd937x_priv *wcd937x = snd_soc_component_get_drvdata(component);
  1947. if (!wcd937x)
  1948. return;
  1949. if (wcd937x->register_notifier)
  1950. wcd937x->register_notifier(wcd937x->handle,
  1951. &wcd937x->nblock,
  1952. false);
  1953. return;
  1954. }
  1955. static const struct snd_soc_component_driver soc_codec_dev_wcd937x = {
  1956. .name = DRV_NAME,
  1957. .probe = wcd937x_soc_codec_probe,
  1958. .remove = wcd937x_soc_codec_remove,
  1959. .controls = wcd937x_snd_controls,
  1960. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  1961. .dapm_widgets = wcd937x_dapm_widgets,
  1962. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  1963. .dapm_routes = wcd937x_audio_map,
  1964. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  1965. };
  1966. #ifdef CONFIG_PM_SLEEP
  1967. static int wcd937x_suspend(struct device *dev)
  1968. {
  1969. struct wcd937x_priv *wcd937x = NULL;
  1970. int ret = 0;
  1971. struct wcd937x_pdata *pdata = NULL;
  1972. if (!dev)
  1973. return -ENODEV;
  1974. wcd937x = dev_get_drvdata(dev);
  1975. if (!wcd937x)
  1976. return -EINVAL;
  1977. pdata = dev_get_platdata(wcd937x->dev);
  1978. if (!pdata) {
  1979. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1980. return -EINVAL;
  1981. }
  1982. if (test_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask)) {
  1983. ret = msm_cdc_disable_ondemand_supply(wcd937x->dev,
  1984. wcd937x->supplies,
  1985. pdata->regulator,
  1986. pdata->num_supplies,
  1987. "cdc-vdd-buck");
  1988. if (ret == -EINVAL) {
  1989. dev_err(dev, "%s: vdd buck is not disabled\n",
  1990. __func__);
  1991. return 0;
  1992. }
  1993. clear_bit(ALLOW_BUCK_DISABLE, &wcd937x->status_mask);
  1994. }
  1995. return 0;
  1996. }
  1997. static int wcd937x_resume(struct device *dev)
  1998. {
  1999. return 0;
  2000. }
  2001. #endif
  2002. static int wcd937x_reset(struct device *dev)
  2003. {
  2004. struct wcd937x_priv *wcd937x = NULL;
  2005. int rc = 0;
  2006. int value = 0;
  2007. if (!dev)
  2008. return -ENODEV;
  2009. wcd937x = dev_get_drvdata(dev);
  2010. if (!wcd937x)
  2011. return -EINVAL;
  2012. if (!wcd937x->rst_np) {
  2013. dev_err(dev, "%s: reset gpio device node not specified\n",
  2014. __func__);
  2015. return -EINVAL;
  2016. }
  2017. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  2018. if (value > 0)
  2019. return 0;
  2020. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  2021. if (rc) {
  2022. dev_err(dev, "%s: wcd sleep state request fail!\n",
  2023. __func__);
  2024. return rc;
  2025. }
  2026. /* 20ms sleep required after pulling the reset gpio to LOW */
  2027. usleep_range(20, 30);
  2028. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  2029. if (rc) {
  2030. dev_err(dev, "%s: wcd active state request fail!\n",
  2031. __func__);
  2032. return rc;
  2033. }
  2034. /* 20ms sleep required after pulling the reset gpio to HIGH */
  2035. usleep_range(20, 30);
  2036. return rc;
  2037. }
  2038. static int wcd937x_read_of_property_u32(struct device *dev, const char *name,
  2039. u32 *val)
  2040. {
  2041. int rc = 0;
  2042. rc = of_property_read_u32(dev->of_node, name, val);
  2043. if (rc)
  2044. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2045. __func__, name, dev->of_node->full_name);
  2046. return rc;
  2047. }
  2048. static void wcd937x_dt_parse_micbias_info(struct device *dev,
  2049. struct wcd937x_micbias_setting *mb)
  2050. {
  2051. u32 prop_val = 0;
  2052. int rc = 0;
  2053. /* MB1 */
  2054. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  2055. NULL)) {
  2056. rc = wcd937x_read_of_property_u32(dev,
  2057. "qcom,cdc-micbias1-mv",
  2058. &prop_val);
  2059. if (!rc)
  2060. mb->micb1_mv = prop_val;
  2061. } else {
  2062. dev_info(dev, "%s: Micbias1 DT property not found\n",
  2063. __func__);
  2064. }
  2065. /* MB2 */
  2066. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  2067. NULL)) {
  2068. rc = wcd937x_read_of_property_u32(dev,
  2069. "qcom,cdc-micbias2-mv",
  2070. &prop_val);
  2071. if (!rc)
  2072. mb->micb2_mv = prop_val;
  2073. } else {
  2074. dev_info(dev, "%s: Micbias2 DT property not found\n",
  2075. __func__);
  2076. }
  2077. /* MB3 */
  2078. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  2079. NULL)) {
  2080. rc = wcd937x_read_of_property_u32(dev,
  2081. "qcom,cdc-micbias3-mv",
  2082. &prop_val);
  2083. if (!rc)
  2084. mb->micb3_mv = prop_val;
  2085. } else {
  2086. dev_info(dev, "%s: Micbias3 DT property not found\n",
  2087. __func__);
  2088. }
  2089. }
  2090. static int wcd937x_reset_low(struct device *dev)
  2091. {
  2092. struct wcd937x_priv *wcd937x = NULL;
  2093. int rc = 0;
  2094. if (!dev)
  2095. return -ENODEV;
  2096. wcd937x = dev_get_drvdata(dev);
  2097. if (!wcd937x)
  2098. return -EINVAL;
  2099. if (!wcd937x->rst_np) {
  2100. dev_err(dev, "%s: reset gpio device node not specified\n",
  2101. __func__);
  2102. return -EINVAL;
  2103. }
  2104. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  2105. if (rc) {
  2106. dev_err(dev, "%s: wcd sleep state request fail!\n",
  2107. __func__);
  2108. return rc;
  2109. }
  2110. /* 20ms sleep required after pulling the reset gpio to LOW */
  2111. usleep_range(20, 30);
  2112. return rc;
  2113. }
  2114. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  2115. {
  2116. struct wcd937x_pdata *pdata = NULL;
  2117. pdata = devm_kzalloc(dev, sizeof(struct wcd937x_pdata),
  2118. GFP_KERNEL);
  2119. if (!pdata)
  2120. return NULL;
  2121. pdata->rst_np = of_parse_phandle(dev->of_node,
  2122. "qcom,wcd-rst-gpio-node", 0);
  2123. if (!pdata->rst_np) {
  2124. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2125. __func__, "qcom,wcd-rst-gpio-node",
  2126. dev->of_node->full_name);
  2127. return NULL;
  2128. }
  2129. /* Parse power supplies */
  2130. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  2131. &pdata->num_supplies);
  2132. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  2133. dev_err(dev, "%s: no power supplies defined for codec\n",
  2134. __func__);
  2135. return NULL;
  2136. }
  2137. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  2138. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  2139. wcd937x_dt_parse_micbias_info(dev, &pdata->micbias);
  2140. return pdata;
  2141. }
  2142. static int wcd937x_bind(struct device *dev)
  2143. {
  2144. int ret = 0, i = 0;
  2145. struct wcd937x_priv *wcd937x = NULL;
  2146. struct wcd937x_pdata *pdata = NULL;
  2147. struct wcd_ctrl_platform_data *plat_data = NULL;
  2148. wcd937x = devm_kzalloc(dev, sizeof(struct wcd937x_priv), GFP_KERNEL);
  2149. if (!wcd937x)
  2150. return -ENOMEM;
  2151. dev_set_drvdata(dev, wcd937x);
  2152. pdata = wcd937x_populate_dt_data(dev);
  2153. if (!pdata) {
  2154. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  2155. return -EINVAL;
  2156. }
  2157. wcd937x->dev = dev;
  2158. wcd937x->dev->platform_data = pdata;
  2159. wcd937x->rst_np = pdata->rst_np;
  2160. ret = msm_cdc_init_supplies(dev, &wcd937x->supplies,
  2161. pdata->regulator, pdata->num_supplies);
  2162. if (!wcd937x->supplies) {
  2163. dev_err(dev, "%s: Cannot init wcd supplies\n",
  2164. __func__);
  2165. return ret;
  2166. }
  2167. plat_data = dev_get_platdata(dev->parent);
  2168. if (!plat_data) {
  2169. dev_err(dev, "%s: platform data from parent is NULL\n",
  2170. __func__);
  2171. return -EINVAL;
  2172. }
  2173. wcd937x->handle = (void *)plat_data->handle;
  2174. if (!wcd937x->handle) {
  2175. dev_err(dev, "%s: handle is NULL\n", __func__);
  2176. return -EINVAL;
  2177. }
  2178. wcd937x->update_wcd_event = plat_data->update_wcd_event;
  2179. if (!wcd937x->update_wcd_event) {
  2180. dev_err(dev, "%s: update_wcd_event api is null!\n",
  2181. __func__);
  2182. return -EINVAL;
  2183. }
  2184. wcd937x->register_notifier = plat_data->register_notifier;
  2185. if (!wcd937x->register_notifier) {
  2186. dev_err(dev, "%s: register_notifier api is null!\n",
  2187. __func__);
  2188. return -EINVAL;
  2189. }
  2190. ret = msm_cdc_enable_static_supplies(dev, wcd937x->supplies,
  2191. pdata->regulator,
  2192. pdata->num_supplies);
  2193. if (ret) {
  2194. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2195. __func__);
  2196. return ret;
  2197. }
  2198. wcd937x_reset(dev);
  2199. /*
  2200. * Add 5msec delay to provide sufficient time for
  2201. * soundwire auto enumeration of slave devices as
  2202. * as per HW requirement.
  2203. */
  2204. usleep_range(5000, 5010);
  2205. ret = component_bind_all(dev, wcd937x);
  2206. if (ret) {
  2207. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2208. __func__, ret);
  2209. return ret;
  2210. }
  2211. ret = wcd937x_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2212. ret |= wcd937x_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2213. if (ret) {
  2214. dev_err(dev, "Failed to read port mapping\n");
  2215. goto err;
  2216. }
  2217. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2218. if (!wcd937x->rx_swr_dev) {
  2219. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2220. __func__);
  2221. ret = -ENODEV;
  2222. goto err;
  2223. }
  2224. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2225. if (!wcd937x->tx_swr_dev) {
  2226. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2227. __func__);
  2228. ret = -ENODEV;
  2229. goto err;
  2230. }
  2231. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  2232. &wcd937x_regmap_config);
  2233. if (!wcd937x->regmap) {
  2234. dev_err(dev, "%s: Regmap init failed\n",
  2235. __func__);
  2236. goto err;
  2237. }
  2238. /* Set all interupts as edge triggered */
  2239. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  2240. regmap_write(wcd937x->regmap,
  2241. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  2242. wcd937x_regmap_irq_chip.irq_drv_data = wcd937x;
  2243. wcd937x->irq_info.wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  2244. wcd937x->irq_info.codec_name = "WCD937X";
  2245. wcd937x->irq_info.regmap = wcd937x->regmap;
  2246. wcd937x->irq_info.dev = dev;
  2247. ret = wcd_irq_init(&wcd937x->irq_info, &wcd937x->virq);
  2248. if (ret) {
  2249. dev_err(dev, "%s: IRQ init failed: %d\n",
  2250. __func__, ret);
  2251. goto err;
  2252. }
  2253. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  2254. mutex_init(&wcd937x->micb_lock);
  2255. ret = snd_soc_register_component(dev, &soc_codec_dev_wcd937x,
  2256. NULL, 0);
  2257. if (ret) {
  2258. dev_err(dev, "%s: Codec registration failed\n",
  2259. __func__);
  2260. goto err_irq;
  2261. }
  2262. return ret;
  2263. err_irq:
  2264. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2265. err:
  2266. component_unbind_all(dev, wcd937x);
  2267. return ret;
  2268. }
  2269. static void wcd937x_unbind(struct device *dev)
  2270. {
  2271. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  2272. wcd_irq_exit(&wcd937x->irq_info, wcd937x->virq);
  2273. snd_soc_unregister_component(dev);
  2274. component_unbind_all(dev, wcd937x);
  2275. mutex_destroy(&wcd937x->micb_lock);
  2276. }
  2277. static const struct of_device_id wcd937x_dt_match[] = {
  2278. { .compatible = "qcom,wcd937x-codec" },
  2279. {}
  2280. };
  2281. static const struct component_master_ops wcd937x_comp_ops = {
  2282. .bind = wcd937x_bind,
  2283. .unbind = wcd937x_unbind,
  2284. };
  2285. static int wcd937x_compare_of(struct device *dev, void *data)
  2286. {
  2287. return dev->of_node == data;
  2288. }
  2289. static void wcd937x_release_of(struct device *dev, void *data)
  2290. {
  2291. of_node_put(data);
  2292. }
  2293. static int wcd937x_add_slave_components(struct device *dev,
  2294. struct component_match **matchptr)
  2295. {
  2296. struct device_node *np, *rx_node, *tx_node;
  2297. np = dev->of_node;
  2298. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2299. if (!rx_node) {
  2300. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2301. return -ENODEV;
  2302. }
  2303. of_node_get(rx_node);
  2304. component_match_add_release(dev, matchptr,
  2305. wcd937x_release_of,
  2306. wcd937x_compare_of,
  2307. rx_node);
  2308. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2309. if (!tx_node) {
  2310. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2311. return -ENODEV;
  2312. }
  2313. of_node_get(tx_node);
  2314. component_match_add_release(dev, matchptr,
  2315. wcd937x_release_of,
  2316. wcd937x_compare_of,
  2317. tx_node);
  2318. return 0;
  2319. }
  2320. static int wcd937x_probe(struct platform_device *pdev)
  2321. {
  2322. struct component_match *match = NULL;
  2323. int ret;
  2324. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  2325. if (ret)
  2326. return ret;
  2327. return component_master_add_with_match(&pdev->dev,
  2328. &wcd937x_comp_ops, match);
  2329. }
  2330. static int wcd937x_remove(struct platform_device *pdev)
  2331. {
  2332. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  2333. return 0;
  2334. }
  2335. #ifdef CONFIG_PM_SLEEP
  2336. static const struct dev_pm_ops wcd937x_dev_pm_ops = {
  2337. SET_SYSTEM_SLEEP_PM_OPS(
  2338. wcd937x_suspend,
  2339. wcd937x_resume
  2340. )
  2341. };
  2342. #endif
  2343. static struct platform_driver wcd937x_codec_driver = {
  2344. .probe = wcd937x_probe,
  2345. .remove = wcd937x_remove,
  2346. .driver = {
  2347. .name = "wcd937x_codec",
  2348. .owner = THIS_MODULE,
  2349. .of_match_table = of_match_ptr(wcd937x_dt_match),
  2350. #ifdef CONFIG_PM_SLEEP
  2351. .pm = &wcd937x_dev_pm_ops,
  2352. #endif
  2353. },
  2354. };
  2355. module_platform_driver(wcd937x_codec_driver);
  2356. MODULE_DESCRIPTION("WCD937X Codec driver");
  2357. MODULE_LICENSE("GPL v2");