reo_entrance_ring.h 45 KB

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  1. /*
  2. * Copyright (c) 2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. //
  19. // DO NOT EDIT! This file is automatically generated
  20. // These definitions are tied to a particular hardware layout
  21. #ifndef _REO_ENTRANCE_RING_H_
  22. #define _REO_ENTRANCE_RING_H_
  23. #if !defined(__ASSEMBLER__)
  24. #endif
  25. #include "rx_mpdu_details.h"
  26. // ################ START SUMMARY #################
  27. //
  28. // Dword Fields
  29. // 0-3 struct rx_mpdu_details reo_level_mpdu_frame_info;
  30. // 4 rx_reo_queue_desc_addr_31_0[31:0]
  31. // 5 rx_reo_queue_desc_addr_39_32[7:0], rounded_mpdu_byte_count[21:8], reo_destination_indication[26:22], frameless_bar[27], reserved_5a[31:28]
  32. // 6 rxdma_push_reason[1:0], rxdma_error_code[6:2], mpdu_fragment_number[10:7], sw_exception[11], sw_exception_mpdu_delink[12], sw_exception_destination_ring_valid[13], sw_exception_destination_ring[18:14], reserved_6a[31:19]
  33. // 7 phy_ppdu_id[15:0], reserved_7a[19:16], ring_id[27:20], looping_count[31:28]
  34. //
  35. // ################ END SUMMARY #################
  36. #define NUM_OF_DWORDS_REO_ENTRANCE_RING 8
  37. struct reo_entrance_ring {
  38. struct rx_mpdu_details reo_level_mpdu_frame_info;
  39. uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0]
  40. uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0]
  41. rounded_mpdu_byte_count : 14, //[21:8]
  42. reo_destination_indication : 5, //[26:22]
  43. frameless_bar : 1, //[27]
  44. reserved_5a : 4; //[31:28]
  45. uint32_t rxdma_push_reason : 2, //[1:0]
  46. rxdma_error_code : 5, //[6:2]
  47. mpdu_fragment_number : 4, //[10:7]
  48. sw_exception : 1, //[11]
  49. sw_exception_mpdu_delink : 1, //[12]
  50. sw_exception_destination_ring_valid: 1, //[13]
  51. sw_exception_destination_ring : 5, //[18:14]
  52. reserved_6a : 13; //[31:19]
  53. uint32_t phy_ppdu_id : 16, //[15:0]
  54. reserved_7a : 4, //[19:16]
  55. ring_id : 8, //[27:20]
  56. looping_count : 4; //[31:28]
  57. };
  58. /*
  59. struct rx_mpdu_details reo_level_mpdu_frame_info
  60. Consumer: REO
  61. Producer: RXDMA
  62. Details related to the MPDU being pushed into the REO
  63. rx_reo_queue_desc_addr_31_0
  64. Consumer: REO
  65. Producer: RXDMA
  66. Address (lower 32 bits) of the REO queue descriptor.
  67. <legal all>
  68. rx_reo_queue_desc_addr_39_32
  69. Consumer: REO
  70. Producer: RXDMA
  71. Address (upper 8 bits) of the REO queue descriptor.
  72. <legal all>
  73. rounded_mpdu_byte_count
  74. An approximation of the number of bytes received in this
  75. MPDU.
  76. Used to keeps stats on the amount of data flowing
  77. through a queue.
  78. <legal all>
  79. reo_destination_indication
  80. RXDMA copy the MPDU's first MSDU's destination
  81. indication field here. This is used for REO to be able to
  82. re-route the packet to a different SW destination ring if
  83. the packet is detected as error in REO.
  84. The ID of the REO exit ring where the MSDU frame shall
  85. push after (MPDU level) reordering has finished.
  86. <enum 0 reo_destination_tcl> Reo will push the frame
  87. into the REO2TCL ring
  88. <enum 1 reo_destination_sw1> Reo will push the frame
  89. into the REO2SW1 ring
  90. <enum 2 reo_destination_sw2> Reo will push the frame
  91. into the REO2SW2 ring
  92. <enum 3 reo_destination_sw3> Reo will push the frame
  93. into the REO2SW3 ring
  94. <enum 4 reo_destination_sw4> Reo will push the frame
  95. into the REO2SW4 ring
  96. <enum 5 reo_destination_release> Reo will push the frame
  97. into the REO_release ring
  98. <enum 6 reo_destination_fw> Reo will push the frame into
  99. the REO2FW ring
  100. <enum 7 reo_destination_sw5> Reo will push the frame
  101. into the REO2SW5 ring (REO remaps this in chips without
  102. REO2SW5 ring, e.g. Pine)
  103. <enum 8 reo_destination_sw6> Reo will push the frame
  104. into the REO2SW6 ring (REO remaps this in chips without
  105. REO2SW6 ring, e.g. Pine)
  106. <enum 9 reo_destination_9> REO remaps this <enum 10
  107. reo_destination_10> REO remaps this
  108. <enum 11 reo_destination_11> REO remaps this
  109. <enum 12 reo_destination_12> REO remaps this <enum 13
  110. reo_destination_13> REO remaps this
  111. <enum 14 reo_destination_14> REO remaps this
  112. <enum 15 reo_destination_15> REO remaps this
  113. <enum 16 reo_destination_16> REO remaps this
  114. <enum 17 reo_destination_17> REO remaps this
  115. <enum 18 reo_destination_18> REO remaps this
  116. <enum 19 reo_destination_19> REO remaps this
  117. <enum 20 reo_destination_20> REO remaps this
  118. <enum 21 reo_destination_21> REO remaps this
  119. <enum 22 reo_destination_22> REO remaps this
  120. <enum 23 reo_destination_23> REO remaps this
  121. <enum 24 reo_destination_24> REO remaps this
  122. <enum 25 reo_destination_25> REO remaps this
  123. <enum 26 reo_destination_26> REO remaps this
  124. <enum 27 reo_destination_27> REO remaps this
  125. <enum 28 reo_destination_28> REO remaps this
  126. <enum 29 reo_destination_29> REO remaps this
  127. <enum 30 reo_destination_30> REO remaps this
  128. <enum 31 reo_destination_31> REO remaps this
  129. <legal all>
  130. frameless_bar
  131. When set, this REO entrance ring struct contains BAR
  132. info from a multi TID BAR frame. The original multi TID BAR
  133. frame itself contained all the REO info for the first TID,
  134. but all the subsequent TID info and their linkage to the REO
  135. descriptors is passed down as 'frameless' BAR info.
  136. The only fields valid in this descriptor when this bit
  137. is set are:
  138. Rx_reo_queue_desc_addr_31_0
  139. RX_reo_queue_desc_addr_39_32
  140. And within the
  141. Reo_level_mpdu_frame_info:
  142. Within Rx_mpdu_desc_info_details:
  143. Mpdu_Sequence_number
  144. BAR_frame
  145. Peer_meta_data
  146. All other fields shall be set to 0
  147. <legal all>
  148. reserved_5a
  149. <legal 0>
  150. rxdma_push_reason
  151. Indicates why rxdma pushed the frame to this ring
  152. This field is ignored by REO.
  153. <enum 0 rxdma_error_detected> RXDMA detected an error an
  154. pushed this frame to this queue
  155. <enum 1 rxdma_routing_instruction> RXDMA pushed the
  156. frame to this queue per received routing instructions. No
  157. error within RXDMA was detected
  158. <enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a
  159. result the MSDU link descriptor might not have the
  160. last_msdu_in_mpdu_flag set, but instead WBM might just see a
  161. NULL pointer in the MSDU link descriptor. This is to be
  162. considered a normal condition for this scenario.
  163. <legal 0 - 2>
  164. rxdma_error_code
  165. Field only valid when 'rxdma_push_reason' set to
  166. 'rxdma_error_detected'.
  167. This field is ignored by REO.
  168. <enum 0 rxdma_overflow_err>MPDU frame is not complete
  169. due to a FIFO overflow error in RXPCU.
  170. <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete
  171. due to receiving incomplete MPDU from the PHY
  172. <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption
  173. error or CRYPTO received an encrypted frame, but did not get
  174. a valid corresponding key id in the peer entry.
  175. <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC
  176. error
  177. <enum 5 rxdma_unecrypted_err>CRYPTO reported an
  178. unencrypted frame error when encrypted was expected
  179. <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU
  180. length error
  181. <enum 7 rxdma_msdu_limit_err>RX OLE reported that max
  182. number of MSDUs allowed in an MPDU got exceeded
  183. <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing
  184. error
  185. <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU
  186. parsing error
  187. <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout
  188. during SA search
  189. <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout
  190. during DA search
  191. <enum 12 rxdma_flow_timeout_err>RX OLE reported a
  192. timeout during flow search
  193. <enum 13 rxdma_flush_request>RXDMA received a flush
  194. request
  195. <enum 14 rxdma_amsdu_fragment_err>Rx PCU reported A-MSDU
  196. present as well as a fragmented MPDU. A-MSDU defragmentation
  197. is not supported in Lithium SW so this is treated as an
  198. error.
  199. mpdu_fragment_number
  200. Field only valid when Reo_level_mpdu_frame_info.
  201. Rx_mpdu_desc_info_details.Fragment_flag is set.
  202. The fragment number from the 802.11 header.
  203. Note that the sequence number is embedded in the field:
  204. Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details.
  205. Mpdu_sequence_number
  206. <legal all>
  207. sw_exception
  208. When not set, REO is performing all its default MPDU
  209. processing operations,
  210. When set, this REO entrance descriptor is generated by
  211. FW, and should be processed as an exception. This implies:
  212. NO re-order function is needed.
  213. MPDU delinking is determined by the setting of field
  214. SW_excection_mpdu_delink
  215. Destination ring selection is based on the setting of
  216. the field SW_exception_destination_ring_valid
  217. In the destination ring descriptor set bit:
  218. SW_exception_entry
  219. Feature supported only in HastingsPrime
  220. <legal all>
  221. sw_exception_mpdu_delink
  222. Field only valid when SW_exception is set.
  223. 1'b0: REO should NOT delink the MPDU, and thus pass this
  224. MPDU on to the destination ring as is. This implies that in
  225. the REO_DESTINATION_RING struct field
  226. Buf_or_link_desc_addr_info should point to an MSDU link
  227. descriptor
  228. 1'b1: REO should perform the normal MPDU delink into
  229. MSDU operations.
  230. Feature supported only in HastingsPrime
  231. <legal all>
  232. sw_exception_destination_ring_valid
  233. Field only valid when SW_exception is set.
  234. 1'b0: REO shall push the MPDU (or delinked MPDU based on
  235. the setting of SW_exception_mpdu_delink) to the destination
  236. ring according to field reo_destination_indication.
  237. 1'b1: REO shall push the MPDU (or delinked MPDU based on
  238. the setting of SW_exception_mpdu_delink) to the destination
  239. ring according to field SW_exception_destination_ring.
  240. Feature supported only in HastingsPrime
  241. <legal all>
  242. sw_exception_destination_ring
  243. Field only valid when fields SW_exception and
  244. SW_exception_destination_ring_valid are set.
  245. The ID of the ring where REO shall push this frame.
  246. <enum 0 reo_destination_tcl> Reo will push the frame
  247. into the REO2TCL ring
  248. <enum 1 reo_destination_sw1> Reo will push the frame
  249. into the REO2SW1 ring
  250. <enum 2 reo_destination_sw2> Reo will push the frame
  251. into the REO2SW1 ring
  252. <enum 3 reo_destination_sw3> Reo will push the frame
  253. into the REO2SW1 ring
  254. <enum 4 reo_destination_sw4> Reo will push the frame
  255. into the REO2SW1 ring
  256. <enum 5 reo_destination_release> Reo will push the frame
  257. into the REO_release ring
  258. <enum 6 reo_destination_fw> Reo will push the frame into
  259. the REO2FW ring
  260. <enum 7 reo_destination_sw5> REO remaps this
  261. <enum 8 reo_destination_sw6> REO remaps this
  262. <enum 9 reo_destination_9> REO remaps this
  263. <enum 10 reo_destination_10> REO remaps this
  264. <enum 11 reo_destination_11> REO remaps this
  265. <enum 12 reo_destination_12> REO remaps this <enum 13
  266. reo_destination_13> REO remaps this
  267. <enum 14 reo_destination_14> REO remaps this
  268. <enum 15 reo_destination_15> REO remaps this
  269. <enum 16 reo_destination_16> REO remaps this
  270. <enum 17 reo_destination_17> REO remaps this
  271. <enum 18 reo_destination_18> REO remaps this
  272. <enum 19 reo_destination_19> REO remaps this
  273. <enum 20 reo_destination_20> REO remaps this
  274. <enum 21 reo_destination_21> REO remaps this
  275. <enum 22 reo_destination_22> REO remaps this
  276. <enum 23 reo_destination_23> REO remaps this
  277. <enum 24 reo_destination_24> REO remaps this
  278. <enum 25 reo_destination_25> REO remaps this
  279. <enum 26 reo_destination_26> REO remaps this
  280. <enum 27 reo_destination_27> REO remaps this
  281. <enum 28 reo_destination_28> REO remaps this
  282. <enum 29 reo_destination_29> REO remaps this
  283. <enum 30 reo_destination_30> REO remaps this
  284. <enum 31 reo_destination_31> REO remaps this
  285. Feature supported only in HastingsPrime
  286. <legal all>
  287. reserved_6a
  288. <legal 0>
  289. phy_ppdu_id
  290. A PPDU counter value that PHY increments for every PPDU
  291. received
  292. The counter value wraps around. Pine RXDMA can be
  293. configured to copy this from the RX_PPDU_START TLV for every
  294. output descriptor.
  295. This field is ignored by REO.
  296. Feature supported only in Pine
  297. <legal all>
  298. reserved_7a
  299. <legal 0>
  300. ring_id
  301. Consumer: SW/REO/DEBUG
  302. Producer: SRNG (of RXDMA)
  303. For debugging.
  304. This field is filled in by the SRNG module.
  305. It help to identify the ring that is being looked <legal
  306. all>
  307. looping_count
  308. Consumer: SW/REO/DEBUG
  309. Producer: SRNG (of RXDMA)
  310. For debugging.
  311. This field is filled in by the SRNG module.
  312. A count value that indicates the number of times the
  313. producer of entries into this Ring has looped around the
  314. ring.
  315. At initialization time, this value is set to 0. On the
  316. first loop, this value is set to 1. After the max value is
  317. reached allowed by the number of bits for this field, the
  318. count value continues with 0 again.
  319. In case SW is the consumer of the ring entries, it can
  320. use this field to figure out up to where the producer of
  321. entries has created new entries. This eliminates the need to
  322. check where the head pointer' of the ring is located once
  323. the SW starts processing an interrupt indicating that new
  324. entries have been put into this ring...
  325. Also note that SW if it wants only needs to look at the
  326. LSB bit of this count value.
  327. <legal all>
  328. */
  329. /* EXTERNAL REFERENCE : struct rx_mpdu_details reo_level_mpdu_frame_info */
  330. /* EXTERNAL REFERENCE : struct buffer_addr_info msdu_link_desc_addr_info */
  331. /* Description REO_ENTRANCE_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
  332. Address (lower 32 bits) of the MSDU buffer OR
  333. MSDU_EXTENSION descriptor OR Link Descriptor
  334. In case of 'NULL' pointer, this field is set to 0
  335. <legal all>
  336. */
  337. #define REO_ENTRANCE_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
  338. #define REO_ENTRANCE_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
  339. #define REO_ENTRANCE_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
  340. /* Description REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
  341. Address (upper 8 bits) of the MSDU buffer OR
  342. MSDU_EXTENSION descriptor OR Link Descriptor
  343. In case of 'NULL' pointer, this field is set to 0
  344. <legal all>
  345. */
  346. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
  347. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
  348. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
  349. /* Description REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
  350. Consumer: WBM
  351. Producer: SW/FW
  352. In case of 'NULL' pointer, this field is set to 0
  353. Indicates to which buffer manager the buffer OR
  354. MSDU_EXTENSION descriptor OR link descriptor that is being
  355. pointed to shall be returned after the frame has been
  356. processed. It is used by WBM for routing purposes.
  357. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  358. to the WMB buffer idle list
  359. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  360. returned to the WMB idle link descriptor idle list
  361. <enum 2 FW_BM> This buffer shall be returned to the FW
  362. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  363. ring 0
  364. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  365. ring 1
  366. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  367. ring 2
  368. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  369. ring 3
  370. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  371. ring 4
  372. <legal all>
  373. */
  374. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  375. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
  376. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
  377. /* Description REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
  378. Cookie field exclusively used by SW.
  379. In case of 'NULL' pointer, this field is set to 0
  380. HW ignores the contents, accept that it passes the
  381. programmed value on to other descriptors together with the
  382. physical address
  383. Field can be used by SW to for example associate the
  384. buffers physical address with the virtual address
  385. The bit definitions as used by SW are within SW HLD
  386. specification
  387. NOTE:
  388. The three most significant bits can have a special
  389. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  390. STRUCT, and field transmit_bw_restriction is set
  391. In case of NON punctured transmission:
  392. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  393. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  394. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  395. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  396. In case of punctured transmission:
  397. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  398. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  399. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  400. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  401. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  402. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  403. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  404. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  405. Note: a punctured transmission is indicated by the
  406. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  407. TLV
  408. <legal all>
  409. */
  410. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
  411. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
  412. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
  413. /* EXTERNAL REFERENCE : struct rx_mpdu_desc_info rx_mpdu_desc_info_details */
  414. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT
  415. Consumer: REO/SW/FW
  416. Producer: RXDMA
  417. The number of MSDUs within the MPDU
  418. <legal all>
  419. */
  420. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
  421. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0
  422. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff
  423. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER
  424. Consumer: REO/SW/FW
  425. Producer: RXDMA
  426. The field can have two different meanings based on the
  427. setting of field 'BAR_frame':
  428. 'BAR_frame' is NOT set:
  429. The MPDU sequence number of the received frame.
  430. 'BAR_frame' is set.
  431. The MPDU Start sequence number from the BAR frame
  432. <legal all>
  433. */
  434. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_OFFSET 0x00000008
  435. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_LSB 8
  436. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_MASK 0x000fff00
  437. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG
  438. Consumer: REO/SW/FW
  439. Producer: RXDMA
  440. When set, this MPDU is a fragment and REO should forward
  441. this fragment MPDU to the REO destination ring without any
  442. reorder checks, pn checks or bitmap update. This implies
  443. that REO is forwarding the pointer to the MSDU link
  444. descriptor. The destination ring is coming from a
  445. programmable register setting in REO
  446. <legal all>
  447. */
  448. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
  449. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 20
  450. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00100000
  451. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT
  452. Consumer: REO/SW/FW
  453. Producer: RXDMA
  454. The retry bit setting from the MPDU header of the
  455. received frame
  456. <legal all>
  457. */
  458. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
  459. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 21
  460. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00200000
  461. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG
  462. Consumer: REO/SW/FW
  463. Producer: RXDMA
  464. When set, the MPDU was received as part of an A-MPDU.
  465. <legal all>
  466. */
  467. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
  468. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 22
  469. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00400000
  470. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME
  471. Consumer: REO/SW/FW
  472. Producer: RXDMA
  473. When set, the received frame is a BAR frame. After
  474. processing, this frame shall be pushed to SW or deleted.
  475. <legal all>
  476. */
  477. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
  478. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 23
  479. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00800000
  480. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO
  481. Consumer: REO/SW/FW
  482. Producer: RXDMA
  483. Copied here by RXDMA from RX_MPDU_END
  484. When not set, REO will Not perform a PN sequence number
  485. check
  486. */
  487. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
  488. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 24
  489. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x01000000
  490. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID
  491. When set, OLE found a valid SA entry for all MSDUs in
  492. this MPDU
  493. <legal all>
  494. */
  495. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000008
  496. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 25
  497. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x02000000
  498. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
  499. When set, at least 1 MSDU within the MPDU has an
  500. unsuccessful MAC source address search due to the expiration
  501. of the search timer.
  502. <legal all>
  503. */
  504. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000008
  505. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 26
  506. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x04000000
  507. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID
  508. When set, OLE found a valid DA entry for all MSDUs in
  509. this MPDU
  510. <legal all>
  511. */
  512. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000008
  513. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 27
  514. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x08000000
  515. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC
  516. Field Only valid if da_is_valid is set
  517. When set, at least one of the DA addresses is a
  518. Multicast or Broadcast address.
  519. <legal all>
  520. */
  521. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000008
  522. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 28
  523. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x10000000
  524. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
  525. When set, at least 1 MSDU within the MPDU has an
  526. unsuccessful MAC destination address search due to the
  527. expiration of the search timer.
  528. <legal all>
  529. */
  530. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000008
  531. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 29
  532. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x20000000
  533. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU
  534. Field only valid when first_msdu_in_mpdu_flag is set.
  535. When set, the contents in the MSDU buffer contains a
  536. 'RAW' MPDU. This 'RAW' MPDU might be spread out over
  537. multiple MSDU buffers.
  538. <legal all>
  539. */
  540. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008
  541. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 30
  542. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x40000000
  543. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG
  544. The More Fragment bit setting from the MPDU header of
  545. the received frame
  546. <legal all>
  547. */
  548. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
  549. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 31
  550. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x80000000
  551. /* Description REO_ENTRANCE_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA
  552. Meta data that SW has programmed in the Peer table entry
  553. of the transmitting STA.
  554. <legal all>
  555. */
  556. #define REO_ENTRANCE_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
  557. #define REO_ENTRANCE_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
  558. #define REO_ENTRANCE_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
  559. /* Description REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0
  560. Consumer: REO
  561. Producer: RXDMA
  562. Address (lower 32 bits) of the REO queue descriptor.
  563. <legal all>
  564. */
  565. #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000010
  566. #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0
  567. #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff
  568. /* Description REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32
  569. Consumer: REO
  570. Producer: RXDMA
  571. Address (upper 8 bits) of the REO queue descriptor.
  572. <legal all>
  573. */
  574. #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000014
  575. #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
  576. #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff
  577. /* Description REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT
  578. An approximation of the number of bytes received in this
  579. MPDU.
  580. Used to keeps stats on the amount of data flowing
  581. through a queue.
  582. <legal all>
  583. */
  584. #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_OFFSET 0x00000014
  585. #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_LSB 8
  586. #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_MASK 0x003fff00
  587. /* Description REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION
  588. RXDMA copy the MPDU's first MSDU's destination
  589. indication field here. This is used for REO to be able to
  590. re-route the packet to a different SW destination ring if
  591. the packet is detected as error in REO.
  592. The ID of the REO exit ring where the MSDU frame shall
  593. push after (MPDU level) reordering has finished.
  594. <enum 0 reo_destination_tcl> Reo will push the frame
  595. into the REO2TCL ring
  596. <enum 1 reo_destination_sw1> Reo will push the frame
  597. into the REO2SW1 ring
  598. <enum 2 reo_destination_sw2> Reo will push the frame
  599. into the REO2SW2 ring
  600. <enum 3 reo_destination_sw3> Reo will push the frame
  601. into the REO2SW3 ring
  602. <enum 4 reo_destination_sw4> Reo will push the frame
  603. into the REO2SW4 ring
  604. <enum 5 reo_destination_release> Reo will push the frame
  605. into the REO_release ring
  606. <enum 6 reo_destination_fw> Reo will push the frame into
  607. the REO2FW ring
  608. <enum 7 reo_destination_sw5> Reo will push the frame
  609. into the REO2SW5 ring (REO remaps this in chips without
  610. REO2SW5 ring, e.g. Pine)
  611. <enum 8 reo_destination_sw6> Reo will push the frame
  612. into the REO2SW6 ring (REO remaps this in chips without
  613. REO2SW6 ring, e.g. Pine)
  614. <enum 9 reo_destination_9> REO remaps this <enum 10
  615. reo_destination_10> REO remaps this
  616. <enum 11 reo_destination_11> REO remaps this
  617. <enum 12 reo_destination_12> REO remaps this <enum 13
  618. reo_destination_13> REO remaps this
  619. <enum 14 reo_destination_14> REO remaps this
  620. <enum 15 reo_destination_15> REO remaps this
  621. <enum 16 reo_destination_16> REO remaps this
  622. <enum 17 reo_destination_17> REO remaps this
  623. <enum 18 reo_destination_18> REO remaps this
  624. <enum 19 reo_destination_19> REO remaps this
  625. <enum 20 reo_destination_20> REO remaps this
  626. <enum 21 reo_destination_21> REO remaps this
  627. <enum 22 reo_destination_22> REO remaps this
  628. <enum 23 reo_destination_23> REO remaps this
  629. <enum 24 reo_destination_24> REO remaps this
  630. <enum 25 reo_destination_25> REO remaps this
  631. <enum 26 reo_destination_26> REO remaps this
  632. <enum 27 reo_destination_27> REO remaps this
  633. <enum 28 reo_destination_28> REO remaps this
  634. <enum 29 reo_destination_29> REO remaps this
  635. <enum 30 reo_destination_30> REO remaps this
  636. <enum 31 reo_destination_31> REO remaps this
  637. <legal all>
  638. */
  639. #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_OFFSET 0x00000014
  640. #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_LSB 22
  641. #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_MASK 0x07c00000
  642. /* Description REO_ENTRANCE_RING_5_FRAMELESS_BAR
  643. When set, this REO entrance ring struct contains BAR
  644. info from a multi TID BAR frame. The original multi TID BAR
  645. frame itself contained all the REO info for the first TID,
  646. but all the subsequent TID info and their linkage to the REO
  647. descriptors is passed down as 'frameless' BAR info.
  648. The only fields valid in this descriptor when this bit
  649. is set are:
  650. Rx_reo_queue_desc_addr_31_0
  651. RX_reo_queue_desc_addr_39_32
  652. And within the
  653. Reo_level_mpdu_frame_info:
  654. Within Rx_mpdu_desc_info_details:
  655. Mpdu_Sequence_number
  656. BAR_frame
  657. Peer_meta_data
  658. All other fields shall be set to 0
  659. <legal all>
  660. */
  661. #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_OFFSET 0x00000014
  662. #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_LSB 27
  663. #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_MASK 0x08000000
  664. /* Description REO_ENTRANCE_RING_5_RESERVED_5A
  665. <legal 0>
  666. */
  667. #define REO_ENTRANCE_RING_5_RESERVED_5A_OFFSET 0x00000014
  668. #define REO_ENTRANCE_RING_5_RESERVED_5A_LSB 28
  669. #define REO_ENTRANCE_RING_5_RESERVED_5A_MASK 0xf0000000
  670. /* Description REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON
  671. Indicates why rxdma pushed the frame to this ring
  672. This field is ignored by REO.
  673. <enum 0 rxdma_error_detected> RXDMA detected an error an
  674. pushed this frame to this queue
  675. <enum 1 rxdma_routing_instruction> RXDMA pushed the
  676. frame to this queue per received routing instructions. No
  677. error within RXDMA was detected
  678. <enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a
  679. result the MSDU link descriptor might not have the
  680. last_msdu_in_mpdu_flag set, but instead WBM might just see a
  681. NULL pointer in the MSDU link descriptor. This is to be
  682. considered a normal condition for this scenario.
  683. <legal 0 - 2>
  684. */
  685. #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_OFFSET 0x00000018
  686. #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_LSB 0
  687. #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_MASK 0x00000003
  688. /* Description REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE
  689. Field only valid when 'rxdma_push_reason' set to
  690. 'rxdma_error_detected'.
  691. This field is ignored by REO.
  692. <enum 0 rxdma_overflow_err>MPDU frame is not complete
  693. due to a FIFO overflow error in RXPCU.
  694. <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete
  695. due to receiving incomplete MPDU from the PHY
  696. <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption
  697. error or CRYPTO received an encrypted frame, but did not get
  698. a valid corresponding key id in the peer entry.
  699. <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC
  700. error
  701. <enum 5 rxdma_unecrypted_err>CRYPTO reported an
  702. unencrypted frame error when encrypted was expected
  703. <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU
  704. length error
  705. <enum 7 rxdma_msdu_limit_err>RX OLE reported that max
  706. number of MSDUs allowed in an MPDU got exceeded
  707. <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing
  708. error
  709. <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU
  710. parsing error
  711. <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout
  712. during SA search
  713. <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout
  714. during DA search
  715. <enum 12 rxdma_flow_timeout_err>RX OLE reported a
  716. timeout during flow search
  717. <enum 13 rxdma_flush_request>RXDMA received a flush
  718. request
  719. <enum 14 rxdma_amsdu_fragment_err>Rx PCU reported A-MSDU
  720. present as well as a fragmented MPDU. A-MSDU defragmentation
  721. is not supported in Lithium SW so this is treated as an
  722. error.
  723. */
  724. #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_OFFSET 0x00000018
  725. #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_LSB 2
  726. #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_MASK 0x0000007c
  727. /* Description REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER
  728. Field only valid when Reo_level_mpdu_frame_info.
  729. Rx_mpdu_desc_info_details.Fragment_flag is set.
  730. The fragment number from the 802.11 header.
  731. Note that the sequence number is embedded in the field:
  732. Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details.
  733. Mpdu_sequence_number
  734. <legal all>
  735. */
  736. #define REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER_OFFSET 0x00000018
  737. #define REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER_LSB 7
  738. #define REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER_MASK 0x00000780
  739. /* Description REO_ENTRANCE_RING_6_SW_EXCEPTION
  740. When not set, REO is performing all its default MPDU
  741. processing operations,
  742. When set, this REO entrance descriptor is generated by
  743. FW, and should be processed as an exception. This implies:
  744. NO re-order function is needed.
  745. MPDU delinking is determined by the setting of field
  746. SW_excection_mpdu_delink
  747. Destination ring selection is based on the setting of
  748. the field SW_exception_destination_ring_valid
  749. In the destination ring descriptor set bit:
  750. SW_exception_entry
  751. Feature supported only in HastingsPrime
  752. <legal all>
  753. */
  754. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_OFFSET 0x00000018
  755. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_LSB 11
  756. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_MASK 0x00000800
  757. /* Description REO_ENTRANCE_RING_6_SW_EXCEPTION_MPDU_DELINK
  758. Field only valid when SW_exception is set.
  759. 1'b0: REO should NOT delink the MPDU, and thus pass this
  760. MPDU on to the destination ring as is. This implies that in
  761. the REO_DESTINATION_RING struct field
  762. Buf_or_link_desc_addr_info should point to an MSDU link
  763. descriptor
  764. 1'b1: REO should perform the normal MPDU delink into
  765. MSDU operations.
  766. Feature supported only in HastingsPrime
  767. <legal all>
  768. */
  769. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_MPDU_DELINK_OFFSET 0x00000018
  770. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_MPDU_DELINK_LSB 12
  771. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_MPDU_DELINK_MASK 0x00001000
  772. /* Description REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_VALID
  773. Field only valid when SW_exception is set.
  774. 1'b0: REO shall push the MPDU (or delinked MPDU based on
  775. the setting of SW_exception_mpdu_delink) to the destination
  776. ring according to field reo_destination_indication.
  777. 1'b1: REO shall push the MPDU (or delinked MPDU based on
  778. the setting of SW_exception_mpdu_delink) to the destination
  779. ring according to field SW_exception_destination_ring.
  780. Feature supported only in HastingsPrime
  781. <legal all>
  782. */
  783. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_VALID_OFFSET 0x00000018
  784. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_VALID_LSB 13
  785. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_VALID_MASK 0x00002000
  786. /* Description REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING
  787. Field only valid when fields SW_exception and
  788. SW_exception_destination_ring_valid are set.
  789. The ID of the ring where REO shall push this frame.
  790. <enum 0 reo_destination_tcl> Reo will push the frame
  791. into the REO2TCL ring
  792. <enum 1 reo_destination_sw1> Reo will push the frame
  793. into the REO2SW1 ring
  794. <enum 2 reo_destination_sw2> Reo will push the frame
  795. into the REO2SW1 ring
  796. <enum 3 reo_destination_sw3> Reo will push the frame
  797. into the REO2SW1 ring
  798. <enum 4 reo_destination_sw4> Reo will push the frame
  799. into the REO2SW1 ring
  800. <enum 5 reo_destination_release> Reo will push the frame
  801. into the REO_release ring
  802. <enum 6 reo_destination_fw> Reo will push the frame into
  803. the REO2FW ring
  804. <enum 7 reo_destination_sw5> REO remaps this
  805. <enum 8 reo_destination_sw6> REO remaps this
  806. <enum 9 reo_destination_9> REO remaps this
  807. <enum 10 reo_destination_10> REO remaps this
  808. <enum 11 reo_destination_11> REO remaps this
  809. <enum 12 reo_destination_12> REO remaps this <enum 13
  810. reo_destination_13> REO remaps this
  811. <enum 14 reo_destination_14> REO remaps this
  812. <enum 15 reo_destination_15> REO remaps this
  813. <enum 16 reo_destination_16> REO remaps this
  814. <enum 17 reo_destination_17> REO remaps this
  815. <enum 18 reo_destination_18> REO remaps this
  816. <enum 19 reo_destination_19> REO remaps this
  817. <enum 20 reo_destination_20> REO remaps this
  818. <enum 21 reo_destination_21> REO remaps this
  819. <enum 22 reo_destination_22> REO remaps this
  820. <enum 23 reo_destination_23> REO remaps this
  821. <enum 24 reo_destination_24> REO remaps this
  822. <enum 25 reo_destination_25> REO remaps this
  823. <enum 26 reo_destination_26> REO remaps this
  824. <enum 27 reo_destination_27> REO remaps this
  825. <enum 28 reo_destination_28> REO remaps this
  826. <enum 29 reo_destination_29> REO remaps this
  827. <enum 30 reo_destination_30> REO remaps this
  828. <enum 31 reo_destination_31> REO remaps this
  829. Feature supported only in HastingsPrime
  830. <legal all>
  831. */
  832. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_OFFSET 0x00000018
  833. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_LSB 14
  834. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_MASK 0x0007c000
  835. /* Description REO_ENTRANCE_RING_6_RESERVED_6A
  836. <legal 0>
  837. */
  838. #define REO_ENTRANCE_RING_6_RESERVED_6A_OFFSET 0x00000018
  839. #define REO_ENTRANCE_RING_6_RESERVED_6A_LSB 19
  840. #define REO_ENTRANCE_RING_6_RESERVED_6A_MASK 0xfff80000
  841. /* Description REO_ENTRANCE_RING_7_PHY_PPDU_ID
  842. A PPDU counter value that PHY increments for every PPDU
  843. received
  844. The counter value wraps around. Pine RXDMA can be
  845. configured to copy this from the RX_PPDU_START TLV for every
  846. output descriptor.
  847. This field is ignored by REO.
  848. Feature supported only in Pine
  849. <legal all>
  850. */
  851. #define REO_ENTRANCE_RING_7_PHY_PPDU_ID_OFFSET 0x0000001c
  852. #define REO_ENTRANCE_RING_7_PHY_PPDU_ID_LSB 0
  853. #define REO_ENTRANCE_RING_7_PHY_PPDU_ID_MASK 0x0000ffff
  854. /* Description REO_ENTRANCE_RING_7_RESERVED_7A
  855. <legal 0>
  856. */
  857. #define REO_ENTRANCE_RING_7_RESERVED_7A_OFFSET 0x0000001c
  858. #define REO_ENTRANCE_RING_7_RESERVED_7A_LSB 16
  859. #define REO_ENTRANCE_RING_7_RESERVED_7A_MASK 0x000f0000
  860. /* Description REO_ENTRANCE_RING_7_RING_ID
  861. Consumer: SW/REO/DEBUG
  862. Producer: SRNG (of RXDMA)
  863. For debugging.
  864. This field is filled in by the SRNG module.
  865. It help to identify the ring that is being looked <legal
  866. all>
  867. */
  868. #define REO_ENTRANCE_RING_7_RING_ID_OFFSET 0x0000001c
  869. #define REO_ENTRANCE_RING_7_RING_ID_LSB 20
  870. #define REO_ENTRANCE_RING_7_RING_ID_MASK 0x0ff00000
  871. /* Description REO_ENTRANCE_RING_7_LOOPING_COUNT
  872. Consumer: SW/REO/DEBUG
  873. Producer: SRNG (of RXDMA)
  874. For debugging.
  875. This field is filled in by the SRNG module.
  876. A count value that indicates the number of times the
  877. producer of entries into this Ring has looped around the
  878. ring.
  879. At initialization time, this value is set to 0. On the
  880. first loop, this value is set to 1. After the max value is
  881. reached allowed by the number of bits for this field, the
  882. count value continues with 0 again.
  883. In case SW is the consumer of the ring entries, it can
  884. use this field to figure out up to where the producer of
  885. entries has created new entries. This eliminates the need to
  886. check where the head pointer' of the ring is located once
  887. the SW starts processing an interrupt indicating that new
  888. entries have been put into this ring...
  889. Also note that SW if it wants only needs to look at the
  890. LSB bit of this count value.
  891. <legal all>
  892. */
  893. #define REO_ENTRANCE_RING_7_LOOPING_COUNT_OFFSET 0x0000001c
  894. #define REO_ENTRANCE_RING_7_LOOPING_COUNT_LSB 28
  895. #define REO_ENTRANCE_RING_7_LOOPING_COUNT_MASK 0xf0000000
  896. #endif // _REO_ENTRANCE_RING_H_