hwio.h 278 KB

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  1. /*
  2. * Copyright (c) 2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef __HWIO_H__
  19. #define __HWIO_H__
  20. /*
  21. ===========================================================================
  22. */
  23. /**
  24. @file hwio.h
  25. @brief Auto-generated HWIO interface include file.
  26. Reference chip release:
  27. WCN6750 (Moselle) [MOSELLE_TOP_P3R9_20200202]
  28. This file contains HWIO register definitions for the following modules:
  29. HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG
  30. HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG
  31. HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG
  32. HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG
  33. HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG
  34. Generation parameters:
  35. { 'filename': 'hwio.h',
  36. 'module-filter-exclude': {},
  37. 'module-filter-include': {},
  38. 'modules': [ 'HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG',
  39. 'HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG',
  40. 'HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG',
  41. 'HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG',
  42. 'HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG']}
  43. */
  44. /*
  45. ===========================================================================
  46. $Header: $
  47. $DateTime: $
  48. $Author: $
  49. ===========================================================================
  50. */
  51. /*----------------------------------------------------------------------------
  52. * MODULE: HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG
  53. *--------------------------------------------------------------------------*/
  54. #define HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE (HOST_SOC_WFSS_CE_REG_BASE + 0x00000000)
  55. #define HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE_SIZE 0x1000
  56. #define HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE_USED 0x404
  57. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000000)
  58. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_RMSK 0xffffffff
  59. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_IN \
  60. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR)
  61. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_INM(m) \
  62. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR, m)
  63. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_OUT(v) \
  64. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR,v)
  65. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_OUTM(m,v) \
  66. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_IN)
  67. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff
  68. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0
  69. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000004)
  70. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_RMSK 0xffffff
  71. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_IN \
  72. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_ADDR)
  73. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_INM(m) \
  74. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_ADDR, m)
  75. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_OUT(v) \
  76. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_ADDR,v)
  77. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_OUTM(m,v) \
  78. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_IN)
  79. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_RING_SIZE_BMSK 0xffff00
  80. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_RING_SIZE_SHFT 0x8
  81. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0xff
  82. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0
  83. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000008)
  84. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_RMSK 0xff
  85. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_IN \
  86. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ADDR)
  87. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_INM(m) \
  88. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ADDR, m)
  89. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_OUT(v) \
  90. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ADDR,v)
  91. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_OUTM(m,v) \
  92. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_IN)
  93. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ENTRY_SIZE_BMSK 0xff
  94. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ENTRY_SIZE_SHFT 0x0
  95. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x0000000c)
  96. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_RMSK 0xffffffff
  97. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_IN \
  98. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_ADDR)
  99. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_INM(m) \
  100. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_ADDR, m)
  101. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000
  102. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10
  103. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_NUM_VALID_WORDS_BMSK 0xffff
  104. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0
  105. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000010)
  106. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_RMSK 0x3fffff
  107. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_IN \
  108. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_ADDR)
  109. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_INM(m) \
  110. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_ADDR, m)
  111. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_OUT(v) \
  112. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_ADDR,v)
  113. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_OUTM(m,v) \
  114. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_IN)
  115. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SPARE_CONTROL_BMSK 0x3fc000
  116. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SPARE_CONTROL_SHFT 0xe
  117. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_SM_STATE2_BMSK 0x3000
  118. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_SM_STATE2_SHFT 0xc
  119. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_SM_STATE1_BMSK 0xf00
  120. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_SM_STATE1_SHFT 0x8
  121. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_IS_IDLE_BMSK 0x80
  122. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_IS_IDLE_SHFT 0x7
  123. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_ENABLE_BMSK 0x40
  124. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_ENABLE_SHFT 0x6
  125. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x20
  126. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5
  127. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x10
  128. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4
  129. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_MSI_SWAP_BIT_BMSK 0x8
  130. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_MSI_SWAP_BIT_SHFT 0x3
  131. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SECURITY_BIT_BMSK 0x4
  132. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SECURITY_BIT_SHFT 0x2
  133. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_LOOPCNT_DISABLE_BMSK 0x2
  134. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1
  135. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_RING_ID_DISABLE_BMSK 0x1
  136. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_RING_ID_DISABLE_SHFT 0x0
  137. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x0000001c)
  138. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_RMSK 0xffffffff
  139. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_IN \
  140. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_ADDR)
  141. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_INM(m) \
  142. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_ADDR, m)
  143. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_OUT(v) \
  144. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_ADDR,v)
  145. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_OUTM(m,v) \
  146. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_IN)
  147. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff
  148. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0
  149. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000020)
  150. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_RMSK 0xff
  151. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_IN \
  152. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_ADDR)
  153. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_INM(m) \
  154. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_ADDR, m)
  155. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_OUT(v) \
  156. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_ADDR,v)
  157. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_OUTM(m,v) \
  158. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_IN)
  159. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0xff
  160. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0
  161. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000030)
  162. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff
  163. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_IN \
  164. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_ADDR)
  165. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_INM(m) \
  166. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_ADDR, m)
  167. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_OUT(v) \
  168. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_ADDR,v)
  169. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_OUTM(m,v) \
  170. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_IN)
  171. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000
  172. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10
  173. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x8000
  174. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf
  175. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x7fff
  176. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0
  177. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000034)
  178. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_RMSK 0xffff
  179. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_IN \
  180. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_ADDR)
  181. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_INM(m) \
  182. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_ADDR, m)
  183. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_OUT(v) \
  184. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_ADDR,v)
  185. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_OUTM(m,v) \
  186. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_IN)
  187. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0xffff
  188. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0
  189. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000038)
  190. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff
  191. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_IN \
  192. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_ADDR)
  193. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_INM(m) \
  194. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_ADDR, m)
  195. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000
  196. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10
  197. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x8000
  198. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf
  199. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x7fff
  200. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0
  201. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x0000003c)
  202. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x3ff
  203. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_IN \
  204. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_ADDR)
  205. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_INM(m) \
  206. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_ADDR, m)
  207. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_OUT(v) \
  208. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_ADDR,v)
  209. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_OUTM(m,v) \
  210. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_IN)
  211. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x3ff
  212. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0
  213. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000040)
  214. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x7
  215. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_IN \
  216. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_ADDR)
  217. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_INM(m) \
  218. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_ADDR, m)
  219. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_OUT(v) \
  220. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_ADDR,v)
  221. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_OUTM(m,v) \
  222. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_IN)
  223. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x7
  224. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0
  225. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000044)
  226. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_RMSK 0xffffff
  227. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_IN \
  228. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_ADDR)
  229. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_INM(m) \
  230. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_ADDR, m)
  231. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0xff0000
  232. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x10
  233. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0xffff
  234. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0
  235. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000048)
  236. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_RMSK 0xffffffff
  237. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_IN \
  238. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR)
  239. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_INM(m) \
  240. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR, m)
  241. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_OUT(v) \
  242. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR,v)
  243. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_OUTM(m,v) \
  244. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_IN)
  245. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff
  246. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0
  247. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x0000004c)
  248. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_RMSK 0x1ff
  249. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_IN \
  250. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR)
  251. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_INM(m) \
  252. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR, m)
  253. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_OUT(v) \
  254. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR,v)
  255. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_OUTM(m,v) \
  256. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_IN)
  257. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x100
  258. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8
  259. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR_BMSK 0xff
  260. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0
  261. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000050)
  262. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_RMSK 0xffffffff
  263. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_IN \
  264. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_ADDR)
  265. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_INM(m) \
  266. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_ADDR, m)
  267. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_OUT(v) \
  268. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_ADDR,v)
  269. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_OUTM(m,v) \
  270. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_IN)
  271. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_VALUE_BMSK 0xffffffff
  272. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_VALUE_SHFT 0x0
  273. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000054)
  274. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_RMSK 0xffff
  275. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_IN \
  276. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_ADDR)
  277. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_INM(m) \
  278. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_ADDR, m)
  279. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_OUT(v) \
  280. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_ADDR,v)
  281. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_OUTM(m,v) \
  282. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_IN)
  283. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0xffff
  284. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0
  285. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000058)
  286. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RMSK 0x1f
  287. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_IN \
  288. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_ADDR)
  289. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_INM(m) \
  290. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_ADDR, m)
  291. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_OUT(v) \
  292. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_ADDR,v)
  293. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_OUTM(m,v) \
  294. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_IN)
  295. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_FLUSH_BMSK 0x10
  296. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_FLUSH_SHFT 0x4
  297. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_HALT_STAT_BMSK 0x8
  298. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_HALT_STAT_SHFT 0x3
  299. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_HALT_BMSK 0x4
  300. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_HALT_SHFT 0x2
  301. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_CE_PRIORITY_BMSK 0x2
  302. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_CE_PRIORITY_SHFT 0x1
  303. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_SRC_RING_BYTE_SWAP_EN_BMSK 0x1
  304. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_SRC_RING_BYTE_SWAP_EN_SHFT 0x0
  305. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x0000005c)
  306. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_RMSK 0x1f
  307. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_IN \
  308. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_ADDR)
  309. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_INM(m) \
  310. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_ADDR, m)
  311. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_OUT(v) \
  312. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_ADDR,v)
  313. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_OUTM(m,v) \
  314. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_IN)
  315. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_WDG_ERR_BMSK 0x10
  316. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_WDG_ERR_SHFT 0x4
  317. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_SRC_LEN_ZERO_ERR_BMSK 0x8
  318. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_SRC_LEN_ZERO_ERR_SHFT 0x3
  319. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_BUF_RD_AXI_ERR_BMSK 0x4
  320. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_BUF_RD_AXI_ERR_SHFT 0x2
  321. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_SRC_SW_INT_BMSK 0x2
  322. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_SRC_SW_INT_SHFT 0x1
  323. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_REG_ERR_BMSK 0x1
  324. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_REG_ERR_SHFT 0x0
  325. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000060)
  326. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_RMSK 0xffffffff
  327. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_IN \
  328. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_ADDR)
  329. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_INM(m) \
  330. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_ADDR, m)
  331. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_OUT(v) \
  332. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_ADDR,v)
  333. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_OUTM(m,v) \
  334. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_IN)
  335. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_STATUS_BMSK 0xffff0000
  336. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_STATUS_SHFT 0x10
  337. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_LIMIT_BMSK 0xffff
  338. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_LIMIT_SHFT 0x0
  339. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000400)
  340. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_RMSK 0xffff
  341. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_IN \
  342. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR)
  343. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_INM(m) \
  344. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR, m)
  345. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_OUT(v) \
  346. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR,v)
  347. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_OUTM(m,v) \
  348. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_IN)
  349. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_HEAD_PTR_BMSK 0xffff
  350. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_HEAD_PTR_SHFT 0x0
  351. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_ADDR (HOST_SOC_CE_0_SRC_WFSS_CE_0_CHANNEL_SRC_REG_REG_BASE + 0x00000404)
  352. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_RMSK 0xffff
  353. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_IN \
  354. in_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_ADDR)
  355. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_INM(m) \
  356. in_dword_masked(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_ADDR, m)
  357. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_OUT(v) \
  358. out_dword(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_ADDR,v)
  359. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_OUTM(m,v) \
  360. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_ADDR,m,v,HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_IN)
  361. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_TAIL_PTR_BMSK 0xffff
  362. #define HWIO_HOST_SOC_CE_0_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_TAIL_PTR_SHFT 0x0
  363. /*----------------------------------------------------------------------------
  364. * MODULE: HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG
  365. *--------------------------------------------------------------------------*/
  366. #define HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE (HOST_SOC_WFSS_CE_REG_BASE + 0x00001000)
  367. #define HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE_SIZE 0x1000
  368. #define HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE_USED 0x40c
  369. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000000)
  370. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_RMSK 0xffffffff
  371. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_IN \
  372. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR)
  373. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_INM(m) \
  374. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR, m)
  375. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_OUT(v) \
  376. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR,v)
  377. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_OUTM(m,v) \
  378. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_IN)
  379. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff
  380. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0
  381. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000004)
  382. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RMSK 0xffffff
  383. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_IN \
  384. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR)
  385. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_INM(m) \
  386. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR, m)
  387. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_OUT(v) \
  388. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR,v)
  389. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_OUTM(m,v) \
  390. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_IN)
  391. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_BMSK 0xffff00
  392. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_SHFT 0x8
  393. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0xff
  394. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0
  395. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000008)
  396. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_RMSK 0xff
  397. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_IN \
  398. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR)
  399. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_INM(m) \
  400. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR, m)
  401. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_OUT(v) \
  402. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR,v)
  403. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_OUTM(m,v) \
  404. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_IN)
  405. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ENTRY_SIZE_BMSK 0xff
  406. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ENTRY_SIZE_SHFT 0x0
  407. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x0000000c)
  408. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_RMSK 0xffffffff
  409. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_IN \
  410. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_ADDR)
  411. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_INM(m) \
  412. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_ADDR, m)
  413. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000
  414. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10
  415. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_NUM_VALID_WORDS_BMSK 0xffff
  416. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0
  417. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000010)
  418. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_RMSK 0x3fffff
  419. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_IN \
  420. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_ADDR)
  421. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_INM(m) \
  422. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_ADDR, m)
  423. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_OUT(v) \
  424. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_ADDR,v)
  425. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_OUTM(m,v) \
  426. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_IN)
  427. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SPARE_CONTROL_BMSK 0x3fc000
  428. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SPARE_CONTROL_SHFT 0xe
  429. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_SM_STATE2_BMSK 0x3000
  430. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_SM_STATE2_SHFT 0xc
  431. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_SM_STATE1_BMSK 0xf00
  432. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_SM_STATE1_SHFT 0x8
  433. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_IS_IDLE_BMSK 0x80
  434. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_IS_IDLE_SHFT 0x7
  435. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_ENABLE_BMSK 0x40
  436. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_ENABLE_SHFT 0x6
  437. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x20
  438. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5
  439. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x10
  440. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4
  441. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_MSI_SWAP_BIT_BMSK 0x8
  442. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_MSI_SWAP_BIT_SHFT 0x3
  443. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SECURITY_BIT_BMSK 0x4
  444. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SECURITY_BIT_SHFT 0x2
  445. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_LOOPCNT_DISABLE_BMSK 0x2
  446. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1
  447. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_RING_ID_DISABLE_BMSK 0x1
  448. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_RING_ID_DISABLE_SHFT 0x0
  449. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x0000001c)
  450. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_RMSK 0xffffffff
  451. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_IN \
  452. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_ADDR)
  453. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_INM(m) \
  454. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_ADDR, m)
  455. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_OUT(v) \
  456. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_ADDR,v)
  457. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_OUTM(m,v) \
  458. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_IN)
  459. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff
  460. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0
  461. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000020)
  462. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_RMSK 0xff
  463. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_IN \
  464. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_ADDR)
  465. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_INM(m) \
  466. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_ADDR, m)
  467. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_OUT(v) \
  468. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_ADDR,v)
  469. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_OUTM(m,v) \
  470. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_IN)
  471. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0xff
  472. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0
  473. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000030)
  474. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff
  475. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_IN \
  476. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_ADDR)
  477. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_INM(m) \
  478. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_ADDR, m)
  479. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_OUT(v) \
  480. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_ADDR,v)
  481. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_OUTM(m,v) \
  482. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_IN)
  483. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000
  484. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10
  485. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x8000
  486. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf
  487. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x7fff
  488. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0
  489. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000034)
  490. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_RMSK 0xffff
  491. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_IN \
  492. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_ADDR)
  493. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_INM(m) \
  494. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_ADDR, m)
  495. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_OUT(v) \
  496. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_ADDR,v)
  497. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_OUTM(m,v) \
  498. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_IN)
  499. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0xffff
  500. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0
  501. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000038)
  502. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff
  503. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_IN \
  504. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_ADDR)
  505. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_INM(m) \
  506. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_ADDR, m)
  507. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000
  508. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10
  509. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x8000
  510. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf
  511. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x7fff
  512. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0
  513. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x0000003c)
  514. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x3ff
  515. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_IN \
  516. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_ADDR)
  517. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_INM(m) \
  518. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_ADDR, m)
  519. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_OUT(v) \
  520. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_ADDR,v)
  521. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_OUTM(m,v) \
  522. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_IN)
  523. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x3ff
  524. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0
  525. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000040)
  526. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x7
  527. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_IN \
  528. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_ADDR)
  529. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_INM(m) \
  530. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_ADDR, m)
  531. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_OUT(v) \
  532. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_ADDR,v)
  533. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_OUTM(m,v) \
  534. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_IN)
  535. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x7
  536. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0
  537. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000044)
  538. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_RMSK 0xffffff
  539. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_IN \
  540. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_ADDR)
  541. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_INM(m) \
  542. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_ADDR, m)
  543. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0xff0000
  544. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x10
  545. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0xffff
  546. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0
  547. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000048)
  548. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_RMSK 0xffffffff
  549. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_IN \
  550. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR)
  551. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_INM(m) \
  552. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR, m)
  553. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_OUT(v) \
  554. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR,v)
  555. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_OUTM(m,v) \
  556. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_IN)
  557. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff
  558. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0
  559. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x0000004c)
  560. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_RMSK 0x1ff
  561. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_IN \
  562. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR)
  563. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_INM(m) \
  564. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR, m)
  565. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_OUT(v) \
  566. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR,v)
  567. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_OUTM(m,v) \
  568. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_IN)
  569. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x100
  570. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8
  571. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR_BMSK 0xff
  572. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0
  573. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000050)
  574. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_RMSK 0xffffffff
  575. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_IN \
  576. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_ADDR)
  577. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_INM(m) \
  578. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_ADDR, m)
  579. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_OUT(v) \
  580. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_ADDR,v)
  581. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_OUTM(m,v) \
  582. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_IN)
  583. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_VALUE_BMSK 0xffffffff
  584. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_VALUE_SHFT 0x0
  585. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000054)
  586. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_RMSK 0xffff
  587. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_IN \
  588. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_ADDR)
  589. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_INM(m) \
  590. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_ADDR, m)
  591. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_OUT(v) \
  592. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_ADDR,v)
  593. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_OUTM(m,v) \
  594. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_IN)
  595. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0xffff
  596. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0
  597. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000058)
  598. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_RMSK 0xffffffff
  599. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_IN \
  600. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR)
  601. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_INM(m) \
  602. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR, m)
  603. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_OUT(v) \
  604. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR,v)
  605. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_OUTM(m,v) \
  606. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_IN)
  607. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff
  608. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0
  609. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x0000005c)
  610. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RMSK 0xffffff
  611. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_IN \
  612. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_ADDR)
  613. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_INM(m) \
  614. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_ADDR, m)
  615. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_OUT(v) \
  616. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_ADDR,v)
  617. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_OUTM(m,v) \
  618. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_IN)
  619. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_SIZE_BMSK 0xffff00
  620. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_SIZE_SHFT 0x8
  621. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0xff
  622. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0
  623. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000060)
  624. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_RMSK 0xffff
  625. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_IN \
  626. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ADDR)
  627. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_INM(m) \
  628. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ADDR, m)
  629. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_OUT(v) \
  630. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ADDR,v)
  631. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_OUTM(m,v) \
  632. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_IN)
  633. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_RING_ID_BMSK 0xff00
  634. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_RING_ID_SHFT 0x8
  635. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ENTRY_SIZE_BMSK 0xff
  636. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ENTRY_SIZE_SHFT 0x0
  637. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000064)
  638. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_RMSK 0xffffffff
  639. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_IN \
  640. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_ADDR)
  641. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_INM(m) \
  642. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_ADDR, m)
  643. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000
  644. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10
  645. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_NUM_VALID_WORDS_BMSK 0xffff
  646. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0
  647. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000068)
  648. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_RMSK 0x3ffffff
  649. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_IN \
  650. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_ADDR)
  651. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_INM(m) \
  652. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_ADDR, m)
  653. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_OUT(v) \
  654. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_ADDR,v)
  655. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_OUTM(m,v) \
  656. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_IN)
  657. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_LOOP_CNT_BMSK 0x3c00000
  658. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_LOOP_CNT_SHFT 0x16
  659. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SPARE_CONTROL_BMSK 0x3fc000
  660. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SPARE_CONTROL_SHFT 0xe
  661. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_SM_STATE2_BMSK 0x3000
  662. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_SM_STATE2_SHFT 0xc
  663. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_SM_STATE1_BMSK 0xf00
  664. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_SM_STATE1_SHFT 0x8
  665. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_IS_IDLE_BMSK 0x80
  666. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_IS_IDLE_SHFT 0x7
  667. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_ENABLE_BMSK 0x40
  668. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_ENABLE_SHFT 0x6
  669. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x20
  670. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5
  671. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x10
  672. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4
  673. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_MSI_SWAP_BIT_BMSK 0x8
  674. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_MSI_SWAP_BIT_SHFT 0x3
  675. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SECURITY_BIT_BMSK 0x4
  676. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SECURITY_BIT_SHFT 0x2
  677. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_LOOPCNT_DISABLE_BMSK 0x2
  678. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1
  679. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_RING_ID_DISABLE_BMSK 0x1
  680. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_RING_ID_DISABLE_SHFT 0x0
  681. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x0000006c)
  682. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_RMSK 0xffffffff
  683. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_IN \
  684. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_ADDR)
  685. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_INM(m) \
  686. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_ADDR, m)
  687. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_OUT(v) \
  688. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_ADDR,v)
  689. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_OUTM(m,v) \
  690. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_IN)
  691. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff
  692. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0
  693. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000070)
  694. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_RMSK 0xff
  695. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_IN \
  696. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_ADDR)
  697. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_INM(m) \
  698. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_ADDR, m)
  699. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_OUT(v) \
  700. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_ADDR,v)
  701. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_OUTM(m,v) \
  702. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_IN)
  703. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0xff
  704. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0
  705. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x0000007c)
  706. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff
  707. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_IN \
  708. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_ADDR)
  709. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_INM(m) \
  710. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_ADDR, m)
  711. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_OUT(v) \
  712. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_ADDR,v)
  713. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_OUTM(m,v) \
  714. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_IN)
  715. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000
  716. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10
  717. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x8000
  718. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf
  719. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x7fff
  720. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0
  721. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000080)
  722. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff
  723. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_IN \
  724. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_ADDR)
  725. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_INM(m) \
  726. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_ADDR, m)
  727. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000
  728. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10
  729. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x8000
  730. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf
  731. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x7fff
  732. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0
  733. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000084)
  734. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_RMSK 0x3ff
  735. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_IN \
  736. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR)
  737. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_INM(m) \
  738. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR, m)
  739. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_OUT(v) \
  740. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR,v)
  741. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(m,v) \
  742. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_IN)
  743. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x3ff
  744. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0
  745. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x000000a0)
  746. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_RMSK 0xffffffff
  747. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_IN \
  748. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR)
  749. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_INM(m) \
  750. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR, m)
  751. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_OUT(v) \
  752. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR,v)
  753. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_OUTM(m,v) \
  754. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_IN)
  755. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff
  756. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0
  757. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x000000a4)
  758. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_RMSK 0x1ff
  759. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_IN \
  760. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR)
  761. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_INM(m) \
  762. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR, m)
  763. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_OUT(v) \
  764. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR,v)
  765. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_OUTM(m,v) \
  766. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_IN)
  767. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x100
  768. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8
  769. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR_BMSK 0xff
  770. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0
  771. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x000000a8)
  772. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_RMSK 0xffffffff
  773. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_IN \
  774. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_ADDR)
  775. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_INM(m) \
  776. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_ADDR, m)
  777. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_OUT(v) \
  778. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_ADDR,v)
  779. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_OUTM(m,v) \
  780. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_IN)
  781. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_VALUE_BMSK 0xffffffff
  782. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_VALUE_SHFT 0x0
  783. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x000000ac)
  784. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_RMSK 0xffff
  785. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_IN \
  786. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_ADDR)
  787. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_INM(m) \
  788. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_ADDR, m)
  789. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_OUT(v) \
  790. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_ADDR,v)
  791. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_OUTM(m,v) \
  792. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_IN)
  793. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0xffff
  794. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0
  795. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x000000b0)
  796. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_RMSK 0x1ffff
  797. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_IN \
  798. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_ADDR)
  799. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_INM(m) \
  800. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_ADDR, m)
  801. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_OUT(v) \
  802. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_ADDR,v)
  803. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_OUTM(m,v) \
  804. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_IN)
  805. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_DST_RING_BYTE_SWAP_EN_BMSK 0x10000
  806. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_DST_RING_BYTE_SWAP_EN_SHFT 0x10
  807. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_DEST_MAX_LENGTH_BMSK 0xffff
  808. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_DEST_MAX_LENGTH_SHFT 0x0
  809. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x000000b4)
  810. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_RMSK 0x3f
  811. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_IN \
  812. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_ADDR)
  813. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_INM(m) \
  814. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_ADDR, m)
  815. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_OUT(v) \
  816. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_ADDR,v)
  817. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_OUTM(m,v) \
  818. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_IN)
  819. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_WDG_ERR_BMSK 0x20
  820. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_WDG_ERR_SHFT 0x5
  821. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_DST_MAX_LEN_ERR_BMSK 0x10
  822. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_DST_MAX_LEN_ERR_SHFT 0x4
  823. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_BUF_WR_AXI_ERR_BMSK 0x8
  824. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_BUF_WR_AXI_ERR_SHFT 0x3
  825. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_STS_SW_INT_BMSK 0x4
  826. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_STS_SW_INT_SHFT 0x2
  827. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_DST_SW_INT_BMSK 0x2
  828. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_DST_SW_INT_SHFT 0x1
  829. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_REG_ERR_BMSK 0x1
  830. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_REG_ERR_SHFT 0x0
  831. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x000000b8)
  832. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RMSK 0xf
  833. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_IN \
  834. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_ADDR)
  835. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_INM(m) \
  836. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_ADDR, m)
  837. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_OUT(v) \
  838. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_ADDR,v)
  839. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_OUTM(m,v) \
  840. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_IN)
  841. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_STAT_FLUSH_BMSK 0x8
  842. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_STAT_FLUSH_SHFT 0x3
  843. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_DST_FLUSH_BMSK 0x4
  844. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_DST_FLUSH_SHFT 0x2
  845. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_HALT_STAT_BMSK 0x2
  846. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_HALT_STAT_SHFT 0x1
  847. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_HALT_BMSK 0x1
  848. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_HALT_SHFT 0x0
  849. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000400)
  850. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_RMSK 0xffff
  851. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_IN \
  852. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR)
  853. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_INM(m) \
  854. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR, m)
  855. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_OUT(v) \
  856. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR,v)
  857. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_OUTM(m,v) \
  858. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_IN)
  859. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_HEAD_PTR_BMSK 0xffff
  860. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_HEAD_PTR_SHFT 0x0
  861. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000404)
  862. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_RMSK 0xffff
  863. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_IN \
  864. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_ADDR)
  865. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_INM(m) \
  866. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_ADDR, m)
  867. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_OUT(v) \
  868. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_ADDR,v)
  869. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_OUTM(m,v) \
  870. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_IN)
  871. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_TAIL_PTR_BMSK 0xffff
  872. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_TAIL_PTR_SHFT 0x0
  873. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x00000408)
  874. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_RMSK 0xffff
  875. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_IN \
  876. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR)
  877. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_INM(m) \
  878. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR, m)
  879. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_OUT(v) \
  880. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR,v)
  881. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_OUTM(m,v) \
  882. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_IN)
  883. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_HEAD_PTR_BMSK 0xffff
  884. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_HEAD_PTR_SHFT 0x0
  885. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_ADDR (HOST_SOC_CE_0_DST_WFSS_CE_0_CHANNEL_DST_REG_REG_BASE + 0x0000040c)
  886. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_RMSK 0xffff
  887. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_IN \
  888. in_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_ADDR)
  889. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_INM(m) \
  890. in_dword_masked(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_ADDR, m)
  891. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_OUT(v) \
  892. out_dword(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_ADDR,v)
  893. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_OUTM(m,v) \
  894. out_dword_masked_ns(HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_ADDR,m,v,HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_IN)
  895. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_TAIL_PTR_BMSK 0xffff
  896. #define HWIO_HOST_SOC_CE_0_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_TAIL_PTR_SHFT 0x0
  897. /*----------------------------------------------------------------------------
  898. * MODULE: HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG
  899. *--------------------------------------------------------------------------*/
  900. #define HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE (HOST_SOC_WFSS_CE_REG_BASE + 0x00002000)
  901. #define HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE_SIZE 0x1000
  902. #define HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE_USED 0x404
  903. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000000)
  904. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_RMSK 0xffffffff
  905. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_IN \
  906. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR)
  907. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_INM(m) \
  908. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR, m)
  909. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_OUT(v) \
  910. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR,v)
  911. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_OUTM(m,v) \
  912. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_IN)
  913. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff
  914. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0
  915. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000004)
  916. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_RMSK 0xffffff
  917. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_IN \
  918. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_ADDR)
  919. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_INM(m) \
  920. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_ADDR, m)
  921. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_OUT(v) \
  922. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_ADDR,v)
  923. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_OUTM(m,v) \
  924. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_IN)
  925. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_RING_SIZE_BMSK 0xffff00
  926. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_RING_SIZE_SHFT 0x8
  927. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0xff
  928. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0
  929. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000008)
  930. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_RMSK 0xff
  931. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_IN \
  932. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ADDR)
  933. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_INM(m) \
  934. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ADDR, m)
  935. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_OUT(v) \
  936. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ADDR,v)
  937. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_OUTM(m,v) \
  938. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_IN)
  939. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ENTRY_SIZE_BMSK 0xff
  940. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_ID_ENTRY_SIZE_SHFT 0x0
  941. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x0000000c)
  942. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_RMSK 0xffffffff
  943. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_IN \
  944. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_ADDR)
  945. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_INM(m) \
  946. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_ADDR, m)
  947. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000
  948. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10
  949. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_NUM_VALID_WORDS_BMSK 0xffff
  950. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0
  951. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000010)
  952. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_RMSK 0x3fffff
  953. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_IN \
  954. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_ADDR)
  955. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_INM(m) \
  956. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_ADDR, m)
  957. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_OUT(v) \
  958. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_ADDR,v)
  959. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_OUTM(m,v) \
  960. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_IN)
  961. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SPARE_CONTROL_BMSK 0x3fc000
  962. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SPARE_CONTROL_SHFT 0xe
  963. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_SM_STATE2_BMSK 0x3000
  964. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_SM_STATE2_SHFT 0xc
  965. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_SM_STATE1_BMSK 0xf00
  966. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_SM_STATE1_SHFT 0x8
  967. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_IS_IDLE_BMSK 0x80
  968. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_IS_IDLE_SHFT 0x7
  969. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_ENABLE_BMSK 0x40
  970. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SRNG_ENABLE_SHFT 0x6
  971. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x20
  972. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5
  973. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x10
  974. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4
  975. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_MSI_SWAP_BIT_BMSK 0x8
  976. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_MSI_SWAP_BIT_SHFT 0x3
  977. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SECURITY_BIT_BMSK 0x4
  978. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_SECURITY_BIT_SHFT 0x2
  979. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_LOOPCNT_DISABLE_BMSK 0x2
  980. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1
  981. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_RING_ID_DISABLE_BMSK 0x1
  982. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MISC_RING_ID_DISABLE_SHFT 0x0
  983. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x0000001c)
  984. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_RMSK 0xffffffff
  985. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_IN \
  986. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_ADDR)
  987. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_INM(m) \
  988. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_ADDR, m)
  989. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_OUT(v) \
  990. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_ADDR,v)
  991. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_OUTM(m,v) \
  992. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_IN)
  993. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff
  994. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0
  995. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000020)
  996. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_RMSK 0xff
  997. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_IN \
  998. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_ADDR)
  999. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_INM(m) \
  1000. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_ADDR, m)
  1001. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_OUT(v) \
  1002. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_ADDR,v)
  1003. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_OUTM(m,v) \
  1004. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_IN)
  1005. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0xff
  1006. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0
  1007. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000030)
  1008. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff
  1009. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_IN \
  1010. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_ADDR)
  1011. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_INM(m) \
  1012. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_ADDR, m)
  1013. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_OUT(v) \
  1014. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_ADDR,v)
  1015. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_OUTM(m,v) \
  1016. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_IN)
  1017. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000
  1018. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10
  1019. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x8000
  1020. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf
  1021. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x7fff
  1022. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0
  1023. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000034)
  1024. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_RMSK 0xffff
  1025. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_IN \
  1026. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_ADDR)
  1027. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_INM(m) \
  1028. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_ADDR, m)
  1029. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_OUT(v) \
  1030. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_ADDR,v)
  1031. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_OUTM(m,v) \
  1032. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_IN)
  1033. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0xffff
  1034. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0
  1035. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000038)
  1036. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff
  1037. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_IN \
  1038. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_ADDR)
  1039. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_INM(m) \
  1040. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_ADDR, m)
  1041. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000
  1042. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10
  1043. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x8000
  1044. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf
  1045. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x7fff
  1046. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0
  1047. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x0000003c)
  1048. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x3ff
  1049. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_IN \
  1050. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_ADDR)
  1051. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_INM(m) \
  1052. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_ADDR, m)
  1053. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_OUT(v) \
  1054. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_ADDR,v)
  1055. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_OUTM(m,v) \
  1056. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_IN)
  1057. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x3ff
  1058. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0
  1059. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000040)
  1060. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x7
  1061. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_IN \
  1062. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_ADDR)
  1063. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_INM(m) \
  1064. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_ADDR, m)
  1065. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_OUT(v) \
  1066. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_ADDR,v)
  1067. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_OUTM(m,v) \
  1068. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_IN)
  1069. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x7
  1070. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0
  1071. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000044)
  1072. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_RMSK 0xffffff
  1073. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_IN \
  1074. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_ADDR)
  1075. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_INM(m) \
  1076. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_ADDR, m)
  1077. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0xff0000
  1078. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x10
  1079. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0xffff
  1080. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0
  1081. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000048)
  1082. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_RMSK 0xffffffff
  1083. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_IN \
  1084. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR)
  1085. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_INM(m) \
  1086. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR, m)
  1087. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_OUT(v) \
  1088. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR,v)
  1089. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_OUTM(m,v) \
  1090. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_IN)
  1091. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff
  1092. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0
  1093. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x0000004c)
  1094. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_RMSK 0x1ff
  1095. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_IN \
  1096. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR)
  1097. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_INM(m) \
  1098. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR, m)
  1099. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_OUT(v) \
  1100. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR,v)
  1101. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_OUTM(m,v) \
  1102. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_IN)
  1103. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x100
  1104. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8
  1105. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR_BMSK 0xff
  1106. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0
  1107. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000050)
  1108. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_RMSK 0xffffffff
  1109. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_IN \
  1110. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_ADDR)
  1111. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_INM(m) \
  1112. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_ADDR, m)
  1113. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_OUT(v) \
  1114. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_ADDR,v)
  1115. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_OUTM(m,v) \
  1116. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_IN)
  1117. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_VALUE_BMSK 0xffffffff
  1118. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_MSI1_DATA_VALUE_SHFT 0x0
  1119. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000054)
  1120. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_RMSK 0xffff
  1121. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_IN \
  1122. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_ADDR)
  1123. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_INM(m) \
  1124. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_ADDR, m)
  1125. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_OUT(v) \
  1126. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_ADDR,v)
  1127. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_OUTM(m,v) \
  1128. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_IN)
  1129. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0xffff
  1130. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0
  1131. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000058)
  1132. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RMSK 0x1f
  1133. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_IN \
  1134. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_ADDR)
  1135. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_INM(m) \
  1136. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_ADDR, m)
  1137. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_OUT(v) \
  1138. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_ADDR,v)
  1139. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_OUTM(m,v) \
  1140. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_IN)
  1141. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_FLUSH_BMSK 0x10
  1142. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_FLUSH_SHFT 0x4
  1143. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_HALT_STAT_BMSK 0x8
  1144. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_HALT_STAT_SHFT 0x3
  1145. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_HALT_BMSK 0x4
  1146. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_RNG_HALT_SHFT 0x2
  1147. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_CE_PRIORITY_BMSK 0x2
  1148. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_CE_PRIORITY_SHFT 0x1
  1149. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_SRC_RING_BYTE_SWAP_EN_BMSK 0x1
  1150. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_SRC_CTRL_SRC_RING_BYTE_SWAP_EN_SHFT 0x0
  1151. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x0000005c)
  1152. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_RMSK 0x1f
  1153. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_IN \
  1154. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_ADDR)
  1155. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_INM(m) \
  1156. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_ADDR, m)
  1157. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_OUT(v) \
  1158. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_ADDR,v)
  1159. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_OUTM(m,v) \
  1160. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_IN)
  1161. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_WDG_ERR_BMSK 0x10
  1162. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_WDG_ERR_SHFT 0x4
  1163. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_SRC_LEN_ZERO_ERR_BMSK 0x8
  1164. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_SRC_LEN_ZERO_ERR_SHFT 0x3
  1165. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_BUF_RD_AXI_ERR_BMSK 0x4
  1166. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_BUF_RD_AXI_ERR_SHFT 0x2
  1167. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_SRC_SW_INT_BMSK 0x2
  1168. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_SRC_SW_INT_SHFT 0x1
  1169. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_REG_ERR_BMSK 0x1
  1170. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_CH_SRC_IS_REG_ERR_SHFT 0x0
  1171. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000060)
  1172. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_RMSK 0xffffffff
  1173. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_IN \
  1174. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_ADDR)
  1175. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_INM(m) \
  1176. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_ADDR, m)
  1177. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_OUT(v) \
  1178. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_ADDR,v)
  1179. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_OUTM(m,v) \
  1180. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_IN)
  1181. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_STATUS_BMSK 0xffff0000
  1182. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_STATUS_SHFT 0x10
  1183. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_LIMIT_BMSK 0xffff
  1184. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R0_CE_WATCHDOG_LIMIT_SHFT 0x0
  1185. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000400)
  1186. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_RMSK 0xffff
  1187. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_IN \
  1188. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR)
  1189. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_INM(m) \
  1190. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR, m)
  1191. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_OUT(v) \
  1192. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR,v)
  1193. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_OUTM(m,v) \
  1194. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_IN)
  1195. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_HEAD_PTR_BMSK 0xffff
  1196. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_HP_HEAD_PTR_SHFT 0x0
  1197. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_ADDR (HOST_SOC_CE_1_SRC_WFSS_CE_1_CHANNEL_SRC_REG_REG_BASE + 0x00000404)
  1198. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_RMSK 0xffff
  1199. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_IN \
  1200. in_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_ADDR)
  1201. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_INM(m) \
  1202. in_dword_masked(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_ADDR, m)
  1203. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_OUT(v) \
  1204. out_dword(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_ADDR,v)
  1205. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_OUTM(m,v) \
  1206. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_ADDR,m,v,HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_IN)
  1207. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_TAIL_PTR_BMSK 0xffff
  1208. #define HWIO_HOST_SOC_CE_1_SRC_WFSS_CE_CHANNEL_SRC_R2_SRC_RING_TP_TAIL_PTR_SHFT 0x0
  1209. /*----------------------------------------------------------------------------
  1210. * MODULE: HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG
  1211. *--------------------------------------------------------------------------*/
  1212. #define HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE (HOST_SOC_WFSS_CE_REG_BASE + 0x00003000)
  1213. #define HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE_SIZE 0x1000
  1214. #define HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE_USED 0x40c
  1215. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000000)
  1216. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_RMSK 0xffffffff
  1217. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_IN \
  1218. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR)
  1219. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_INM(m) \
  1220. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR, m)
  1221. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_OUT(v) \
  1222. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR,v)
  1223. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_OUTM(m,v) \
  1224. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_IN)
  1225. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff
  1226. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0
  1227. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000004)
  1228. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RMSK 0xffffff
  1229. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_IN \
  1230. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR)
  1231. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_INM(m) \
  1232. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR, m)
  1233. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_OUT(v) \
  1234. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR,v)
  1235. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_OUTM(m,v) \
  1236. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_IN)
  1237. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_BMSK 0xffff00
  1238. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_SHFT 0x8
  1239. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0xff
  1240. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0
  1241. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000008)
  1242. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_RMSK 0xff
  1243. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_IN \
  1244. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR)
  1245. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_INM(m) \
  1246. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR, m)
  1247. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_OUT(v) \
  1248. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR,v)
  1249. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_OUTM(m,v) \
  1250. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_IN)
  1251. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ENTRY_SIZE_BMSK 0xff
  1252. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_ID_ENTRY_SIZE_SHFT 0x0
  1253. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x0000000c)
  1254. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_RMSK 0xffffffff
  1255. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_IN \
  1256. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_ADDR)
  1257. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_INM(m) \
  1258. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_ADDR, m)
  1259. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000
  1260. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10
  1261. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_NUM_VALID_WORDS_BMSK 0xffff
  1262. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0
  1263. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000010)
  1264. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_RMSK 0x3fffff
  1265. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_IN \
  1266. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_ADDR)
  1267. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_INM(m) \
  1268. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_ADDR, m)
  1269. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_OUT(v) \
  1270. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_ADDR,v)
  1271. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_OUTM(m,v) \
  1272. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_IN)
  1273. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SPARE_CONTROL_BMSK 0x3fc000
  1274. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SPARE_CONTROL_SHFT 0xe
  1275. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_SM_STATE2_BMSK 0x3000
  1276. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_SM_STATE2_SHFT 0xc
  1277. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_SM_STATE1_BMSK 0xf00
  1278. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_SM_STATE1_SHFT 0x8
  1279. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_IS_IDLE_BMSK 0x80
  1280. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_IS_IDLE_SHFT 0x7
  1281. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_ENABLE_BMSK 0x40
  1282. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SRNG_ENABLE_SHFT 0x6
  1283. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x20
  1284. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5
  1285. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x10
  1286. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4
  1287. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_MSI_SWAP_BIT_BMSK 0x8
  1288. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_MSI_SWAP_BIT_SHFT 0x3
  1289. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SECURITY_BIT_BMSK 0x4
  1290. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_SECURITY_BIT_SHFT 0x2
  1291. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_LOOPCNT_DISABLE_BMSK 0x2
  1292. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1
  1293. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_RING_ID_DISABLE_BMSK 0x1
  1294. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MISC_RING_ID_DISABLE_SHFT 0x0
  1295. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x0000001c)
  1296. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_RMSK 0xffffffff
  1297. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_IN \
  1298. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_ADDR)
  1299. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_INM(m) \
  1300. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_ADDR, m)
  1301. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_OUT(v) \
  1302. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_ADDR,v)
  1303. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_OUTM(m,v) \
  1304. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_IN)
  1305. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_BMSK 0xffffffff
  1306. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_LSB_TAIL_PTR_MEMADDR_LSB_SHFT 0x0
  1307. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000020)
  1308. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_RMSK 0xff
  1309. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_IN \
  1310. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_ADDR)
  1311. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_INM(m) \
  1312. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_ADDR, m)
  1313. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_OUT(v) \
  1314. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_ADDR,v)
  1315. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_OUTM(m,v) \
  1316. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_IN)
  1317. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_BMSK 0xff
  1318. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_TP_ADDR_MSB_TAIL_PTR_MEMADDR_MSB_SHFT 0x0
  1319. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000030)
  1320. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_RMSK 0xffffffff
  1321. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_IN \
  1322. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_ADDR)
  1323. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_INM(m) \
  1324. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_ADDR, m)
  1325. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_OUT(v) \
  1326. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_ADDR,v)
  1327. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_OUTM(m,v) \
  1328. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_IN)
  1329. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000
  1330. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10
  1331. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_BMSK 0x8000
  1332. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_SW_INTERRUPT_MODE_SHFT 0xf
  1333. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_BMSK 0x7fff
  1334. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX0_BATCH_COUNTER_THRESHOLD_SHFT 0x0
  1335. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000034)
  1336. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_RMSK 0xffff
  1337. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_IN \
  1338. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_ADDR)
  1339. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_INM(m) \
  1340. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_ADDR, m)
  1341. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_OUT(v) \
  1342. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_ADDR,v)
  1343. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_OUTM(m,v) \
  1344. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_IN)
  1345. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_BMSK 0xffff
  1346. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_SETUP_IX1_LOW_THRESHOLD_SHFT 0x0
  1347. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000038)
  1348. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_RMSK 0xffffffff
  1349. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_IN \
  1350. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_ADDR)
  1351. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_INM(m) \
  1352. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_ADDR, m)
  1353. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000
  1354. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10
  1355. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_BMSK 0x8000
  1356. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_CURRENT_INT_WIRE_VALUE_SHFT 0xf
  1357. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x7fff
  1358. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0
  1359. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x0000003c)
  1360. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_RMSK 0x3ff
  1361. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_IN \
  1362. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_ADDR)
  1363. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_INM(m) \
  1364. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_ADDR, m)
  1365. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_OUT(v) \
  1366. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_ADDR,v)
  1367. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_OUTM(m,v) \
  1368. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_IN)
  1369. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_BMSK 0x3ff
  1370. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_EMPTY_COUNTER_RING_EMPTY_COUNTER_SHFT 0x0
  1371. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000040)
  1372. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_RMSK 0x7
  1373. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_IN \
  1374. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_ADDR)
  1375. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_INM(m) \
  1376. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_ADDR, m)
  1377. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_OUT(v) \
  1378. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_ADDR,v)
  1379. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_OUTM(m,v) \
  1380. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_IN)
  1381. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_MODE_BMSK 0x7
  1382. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_TIMER_MODE_SHFT 0x0
  1383. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000044)
  1384. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_RMSK 0xffffff
  1385. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_IN \
  1386. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_ADDR)
  1387. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_INM(m) \
  1388. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_ADDR, m)
  1389. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_BMSK 0xff0000
  1390. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_PREFETCH_COUNT_SHFT 0x10
  1391. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_BMSK 0xffff
  1392. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_CONSUMER_PREFETCH_STATUS_INTERNAL_TAIL_PTR_SHFT 0x0
  1393. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000048)
  1394. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_RMSK 0xffffffff
  1395. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_IN \
  1396. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR)
  1397. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_INM(m) \
  1398. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR, m)
  1399. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_OUT(v) \
  1400. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR,v)
  1401. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_OUTM(m,v) \
  1402. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_IN)
  1403. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff
  1404. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0
  1405. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x0000004c)
  1406. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_RMSK 0x1ff
  1407. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_IN \
  1408. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR)
  1409. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_INM(m) \
  1410. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR, m)
  1411. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_OUT(v) \
  1412. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR,v)
  1413. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_OUTM(m,v) \
  1414. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_IN)
  1415. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x100
  1416. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8
  1417. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR_BMSK 0xff
  1418. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0
  1419. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000050)
  1420. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_RMSK 0xffffffff
  1421. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_IN \
  1422. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_ADDR)
  1423. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_INM(m) \
  1424. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_ADDR, m)
  1425. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_OUT(v) \
  1426. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_ADDR,v)
  1427. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_OUTM(m,v) \
  1428. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_IN)
  1429. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_VALUE_BMSK 0xffffffff
  1430. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_MSI1_DATA_VALUE_SHFT 0x0
  1431. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000054)
  1432. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_RMSK 0xffff
  1433. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_IN \
  1434. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_ADDR)
  1435. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_INM(m) \
  1436. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_ADDR, m)
  1437. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_OUT(v) \
  1438. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_ADDR,v)
  1439. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_OUTM(m,v) \
  1440. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_IN)
  1441. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0xffff
  1442. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0
  1443. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000058)
  1444. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_RMSK 0xffffffff
  1445. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_IN \
  1446. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR)
  1447. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_INM(m) \
  1448. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR, m)
  1449. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_OUT(v) \
  1450. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR,v)
  1451. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_OUTM(m,v) \
  1452. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_IN)
  1453. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_RING_BASE_ADDR_LSB_BMSK 0xffffffff
  1454. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_LSB_RING_BASE_ADDR_LSB_SHFT 0x0
  1455. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x0000005c)
  1456. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RMSK 0xffffff
  1457. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_IN \
  1458. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_ADDR)
  1459. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_INM(m) \
  1460. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_ADDR, m)
  1461. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_OUT(v) \
  1462. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_ADDR,v)
  1463. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_OUTM(m,v) \
  1464. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_IN)
  1465. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_SIZE_BMSK 0xffff00
  1466. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_SIZE_SHFT 0x8
  1467. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_BASE_ADDR_MSB_BMSK 0xff
  1468. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_BASE_ADDR_MSB_SHFT 0x0
  1469. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000060)
  1470. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_RMSK 0xffff
  1471. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_IN \
  1472. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ADDR)
  1473. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_INM(m) \
  1474. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ADDR, m)
  1475. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_OUT(v) \
  1476. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ADDR,v)
  1477. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_OUTM(m,v) \
  1478. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_IN)
  1479. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_RING_ID_BMSK 0xff00
  1480. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_RING_ID_SHFT 0x8
  1481. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ENTRY_SIZE_BMSK 0xff
  1482. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_ID_ENTRY_SIZE_SHFT 0x0
  1483. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000064)
  1484. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_RMSK 0xffffffff
  1485. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_IN \
  1486. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_ADDR)
  1487. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_INM(m) \
  1488. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_ADDR, m)
  1489. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_NUM_AVAIL_WORDS_BMSK 0xffff0000
  1490. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_NUM_AVAIL_WORDS_SHFT 0x10
  1491. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_NUM_VALID_WORDS_BMSK 0xffff
  1492. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_STATUS_NUM_VALID_WORDS_SHFT 0x0
  1493. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000068)
  1494. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_RMSK 0x3ffffff
  1495. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_IN \
  1496. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_ADDR)
  1497. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_INM(m) \
  1498. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_ADDR, m)
  1499. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_OUT(v) \
  1500. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_ADDR,v)
  1501. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_OUTM(m,v) \
  1502. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_IN)
  1503. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_LOOP_CNT_BMSK 0x3c00000
  1504. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_LOOP_CNT_SHFT 0x16
  1505. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SPARE_CONTROL_BMSK 0x3fc000
  1506. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SPARE_CONTROL_SHFT 0xe
  1507. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_SM_STATE2_BMSK 0x3000
  1508. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_SM_STATE2_SHFT 0xc
  1509. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_SM_STATE1_BMSK 0xf00
  1510. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_SM_STATE1_SHFT 0x8
  1511. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_IS_IDLE_BMSK 0x80
  1512. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_IS_IDLE_SHFT 0x7
  1513. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_ENABLE_BMSK 0x40
  1514. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SRNG_ENABLE_SHFT 0x6
  1515. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_DATA_TLV_SWAP_BIT_BMSK 0x20
  1516. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_DATA_TLV_SWAP_BIT_SHFT 0x5
  1517. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_HOST_FW_SWAP_BIT_BMSK 0x10
  1518. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_HOST_FW_SWAP_BIT_SHFT 0x4
  1519. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_MSI_SWAP_BIT_BMSK 0x8
  1520. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_MSI_SWAP_BIT_SHFT 0x3
  1521. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SECURITY_BIT_BMSK 0x4
  1522. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_SECURITY_BIT_SHFT 0x2
  1523. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_LOOPCNT_DISABLE_BMSK 0x2
  1524. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_LOOPCNT_DISABLE_SHFT 0x1
  1525. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_RING_ID_DISABLE_BMSK 0x1
  1526. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MISC_RING_ID_DISABLE_SHFT 0x0
  1527. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x0000006c)
  1528. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_RMSK 0xffffffff
  1529. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_IN \
  1530. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_ADDR)
  1531. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_INM(m) \
  1532. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_ADDR, m)
  1533. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_OUT(v) \
  1534. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_ADDR,v)
  1535. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_OUTM(m,v) \
  1536. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_IN)
  1537. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_BMSK 0xffffffff
  1538. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_LSB_HEAD_PTR_MEMADDR_LSB_SHFT 0x0
  1539. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000070)
  1540. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_RMSK 0xff
  1541. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_IN \
  1542. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_ADDR)
  1543. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_INM(m) \
  1544. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_ADDR, m)
  1545. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_OUT(v) \
  1546. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_ADDR,v)
  1547. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_OUTM(m,v) \
  1548. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_IN)
  1549. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_BMSK 0xff
  1550. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_ADDR_MSB_HEAD_PTR_MEMADDR_MSB_SHFT 0x0
  1551. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x0000007c)
  1552. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_RMSK 0xffffffff
  1553. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_IN \
  1554. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_ADDR)
  1555. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_INM(m) \
  1556. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_ADDR, m)
  1557. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_OUT(v) \
  1558. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_ADDR,v)
  1559. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_OUTM(m,v) \
  1560. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_IN)
  1561. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_BMSK 0xffff0000
  1562. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_INTERRUPT_TIMER_THRESHOLD_SHFT 0x10
  1563. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_BMSK 0x8000
  1564. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_SW_INTERRUPT_MODE_SHFT 0xf
  1565. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_BMSK 0x7fff
  1566. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_SETUP_BATCH_COUNTER_THRESHOLD_SHFT 0x0
  1567. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000080)
  1568. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_RMSK 0xffffffff
  1569. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_IN \
  1570. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_ADDR)
  1571. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_INM(m) \
  1572. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_ADDR, m)
  1573. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_BMSK 0xffff0000
  1574. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_CURRENT_INTERRUPT_TIMER_VALUE_SHFT 0x10
  1575. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_BMSK 0x8000
  1576. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_CURRENT_SW_INT_WIRE_VALUE_SHFT 0xf
  1577. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_BMSK 0x7fff
  1578. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_INT_STATUS_INTERNAL_BATCH_COUNTER_VALUE_SHFT 0x0
  1579. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000084)
  1580. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_RMSK 0x3ff
  1581. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_IN \
  1582. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR)
  1583. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_INM(m) \
  1584. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR, m)
  1585. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_OUT(v) \
  1586. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR,v)
  1587. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(m,v) \
  1588. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_IN)
  1589. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_BMSK 0x3ff
  1590. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_PRODUCER_FULL_COUNTER_RING_FULL_COUNTER_SHFT 0x0
  1591. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x000000a0)
  1592. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_RMSK 0xffffffff
  1593. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_IN \
  1594. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR)
  1595. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_INM(m) \
  1596. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR, m)
  1597. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_OUT(v) \
  1598. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR,v)
  1599. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_OUTM(m,v) \
  1600. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_IN)
  1601. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR_BMSK 0xffffffff
  1602. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_LSB_ADDR_SHFT 0x0
  1603. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x000000a4)
  1604. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_RMSK 0x1ff
  1605. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_IN \
  1606. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR)
  1607. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_INM(m) \
  1608. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR, m)
  1609. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_OUT(v) \
  1610. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR,v)
  1611. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_OUTM(m,v) \
  1612. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_IN)
  1613. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_MSI1_ENABLE_BMSK 0x100
  1614. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_MSI1_ENABLE_SHFT 0x8
  1615. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR_BMSK 0xff
  1616. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_BASE_MSB_ADDR_SHFT 0x0
  1617. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x000000a8)
  1618. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_RMSK 0xffffffff
  1619. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_IN \
  1620. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_ADDR)
  1621. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_INM(m) \
  1622. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_ADDR, m)
  1623. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_OUT(v) \
  1624. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_ADDR,v)
  1625. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_OUTM(m,v) \
  1626. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_IN)
  1627. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_VALUE_BMSK 0xffffffff
  1628. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_MSI1_DATA_VALUE_SHFT 0x0
  1629. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x000000ac)
  1630. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_RMSK 0xffff
  1631. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_IN \
  1632. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_ADDR)
  1633. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_INM(m) \
  1634. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_ADDR, m)
  1635. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_OUT(v) \
  1636. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_ADDR,v)
  1637. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_OUTM(m,v) \
  1638. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_IN)
  1639. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_BMSK 0xffff
  1640. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_HP_TP_SW_OFFSET_HP_TP_OFFSET_VALUE_SHFT 0x0
  1641. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x000000b0)
  1642. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_RMSK 0x1ffff
  1643. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_IN \
  1644. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_ADDR)
  1645. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_INM(m) \
  1646. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_ADDR, m)
  1647. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_OUT(v) \
  1648. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_ADDR,v)
  1649. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_OUTM(m,v) \
  1650. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_IN)
  1651. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_DST_RING_BYTE_SWAP_EN_BMSK 0x10000
  1652. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_DST_RING_BYTE_SWAP_EN_SHFT 0x10
  1653. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_DEST_MAX_LENGTH_BMSK 0xffff
  1654. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_DEST_CTRL_DEST_MAX_LENGTH_SHFT 0x0
  1655. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x000000b4)
  1656. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_RMSK 0x3f
  1657. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_IN \
  1658. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_ADDR)
  1659. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_INM(m) \
  1660. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_ADDR, m)
  1661. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_OUT(v) \
  1662. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_ADDR,v)
  1663. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_OUTM(m,v) \
  1664. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_IN)
  1665. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_WDG_ERR_BMSK 0x20
  1666. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_WDG_ERR_SHFT 0x5
  1667. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_DST_MAX_LEN_ERR_BMSK 0x10
  1668. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_DST_MAX_LEN_ERR_SHFT 0x4
  1669. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_BUF_WR_AXI_ERR_BMSK 0x8
  1670. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_BUF_WR_AXI_ERR_SHFT 0x3
  1671. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_STS_SW_INT_BMSK 0x4
  1672. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_STS_SW_INT_SHFT 0x2
  1673. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_DST_SW_INT_BMSK 0x2
  1674. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_DST_SW_INT_SHFT 0x1
  1675. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_REG_ERR_BMSK 0x1
  1676. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DST_IS_REG_ERR_SHFT 0x0
  1677. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x000000b8)
  1678. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RMSK 0xf
  1679. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_IN \
  1680. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_ADDR)
  1681. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_INM(m) \
  1682. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_ADDR, m)
  1683. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_OUT(v) \
  1684. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_ADDR,v)
  1685. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_OUTM(m,v) \
  1686. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_IN)
  1687. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_STAT_FLUSH_BMSK 0x8
  1688. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_STAT_FLUSH_SHFT 0x3
  1689. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_DST_FLUSH_BMSK 0x4
  1690. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_DST_FLUSH_SHFT 0x2
  1691. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_HALT_STAT_BMSK 0x2
  1692. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_HALT_STAT_SHFT 0x1
  1693. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_HALT_BMSK 0x1
  1694. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R0_CE_CH_DEST_CTRL2_RNG_HALT_SHFT 0x0
  1695. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000400)
  1696. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_RMSK 0xffff
  1697. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_IN \
  1698. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR)
  1699. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_INM(m) \
  1700. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR, m)
  1701. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_OUT(v) \
  1702. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR,v)
  1703. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_OUTM(m,v) \
  1704. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_IN)
  1705. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_HEAD_PTR_BMSK 0xffff
  1706. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_HP_HEAD_PTR_SHFT 0x0
  1707. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000404)
  1708. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_RMSK 0xffff
  1709. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_IN \
  1710. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_ADDR)
  1711. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_INM(m) \
  1712. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_ADDR, m)
  1713. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_OUT(v) \
  1714. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_ADDR,v)
  1715. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_OUTM(m,v) \
  1716. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_IN)
  1717. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_TAIL_PTR_BMSK 0xffff
  1718. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_DEST_RING_TP_TAIL_PTR_SHFT 0x0
  1719. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x00000408)
  1720. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_RMSK 0xffff
  1721. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_IN \
  1722. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR)
  1723. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_INM(m) \
  1724. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR, m)
  1725. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_OUT(v) \
  1726. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR,v)
  1727. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_OUTM(m,v) \
  1728. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_IN)
  1729. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_HEAD_PTR_BMSK 0xffff
  1730. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_HP_HEAD_PTR_SHFT 0x0
  1731. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_ADDR (HOST_SOC_CE_1_DST_WFSS_CE_1_CHANNEL_DST_REG_REG_BASE + 0x0000040c)
  1732. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_RMSK 0xffff
  1733. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_IN \
  1734. in_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_ADDR)
  1735. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_INM(m) \
  1736. in_dword_masked(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_ADDR, m)
  1737. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_OUT(v) \
  1738. out_dword(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_ADDR,v)
  1739. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_OUTM(m,v) \
  1740. out_dword_masked_ns(HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_ADDR,m,v,HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_IN)
  1741. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_TAIL_PTR_BMSK 0xffff
  1742. #define HWIO_HOST_SOC_CE_1_DST_WFSS_CE_CHANNEL_DST_R2_STATUS_RING_TP_TAIL_PTR_SHFT 0x0
  1743. /*----------------------------------------------------------------------------
  1744. * MODULE: HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG
  1745. *--------------------------------------------------------------------------*/
  1746. #define HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE (HOST_SOC_WFSS_CE_REG_BASE + 0x00018000)
  1747. #define HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE_SIZE 0x1000
  1748. #define HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE_USED 0x418
  1749. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_LOWER_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000000)
  1750. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_LOWER_RMSK 0xffffffff
  1751. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_LOWER_IN \
  1752. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_LOWER_ADDR)
  1753. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_LOWER_INM(m) \
  1754. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_LOWER_ADDR, m)
  1755. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_LOWER_VALUE_BMSK 0xffffffff
  1756. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_LOWER_VALUE_SHFT 0x0
  1757. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_UPPER_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000004)
  1758. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_UPPER_RMSK 0xff
  1759. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_UPPER_IN \
  1760. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_UPPER_ADDR)
  1761. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_UPPER_INM(m) \
  1762. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_UPPER_ADDR, m)
  1763. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_UPPER_VALUE_BMSK 0xff
  1764. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TESTBUS_UPPER_VALUE_SHFT 0x0
  1765. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000008)
  1766. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_RMSK 0xfff
  1767. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_IN \
  1768. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_ADDR)
  1769. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_INM(m) \
  1770. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_ADDR, m)
  1771. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_SM_STATE_RD_ADDR_BMSK 0xe00
  1772. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_SM_STATE_RD_ADDR_SHFT 0x9
  1773. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_SM_STATE_WR_ADDR_BMSK 0x1f0
  1774. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_SM_STATE_WR_ADDR_SHFT 0x4
  1775. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_SM_STATE_WR_DATA_BMSK 0xf
  1776. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SM_STATES_IX_0_SM_STATE_WR_DATA_SHFT 0x0
  1777. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x0000000c)
  1778. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_RMSK 0x1
  1779. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_IN \
  1780. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_ADDR)
  1781. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_INM(m) \
  1782. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_ADDR, m)
  1783. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_OUT(v) \
  1784. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_ADDR,v)
  1785. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_OUTM(m,v) \
  1786. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_IN)
  1787. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x1
  1788. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0
  1789. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000010)
  1790. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_RMSK 0x80000fff
  1791. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_IN \
  1792. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_ADDR)
  1793. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_INM(m) \
  1794. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_ADDR, m)
  1795. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_OUT(v) \
  1796. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_ADDR,v)
  1797. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_OUTM(m,v) \
  1798. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_IN)
  1799. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_BMSK 0x80000000
  1800. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_CLOCK_GATE_EXTEND_SHFT 0x1f
  1801. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_SPARE_BMSK 0x800
  1802. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_SPARE_SHFT 0xb
  1803. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WDOG_CTR_BMSK 0x400
  1804. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WDOG_CTR_SHFT 0xa
  1805. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_RD_FIFO_BMSK 0x200
  1806. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_RD_FIFO_SHFT 0x9
  1807. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_DATA_FIFO_BMSK 0x100
  1808. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_DATA_FIFO_SHFT 0x8
  1809. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_BMSK 0x80
  1810. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_ADDR_FIFO_SHFT 0x7
  1811. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_RD_AXI_MAS_BMSK 0x40
  1812. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_RD_AXI_MAS_SHFT 0x6
  1813. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_BMSK 0x20
  1814. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_DATA_AXI_MAS_SHFT 0x5
  1815. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_BMSK 0x10
  1816. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_ADDR_AXI_MAS_SHFT 0x4
  1817. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_DATA_CMD_BMSK 0x8
  1818. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_DATA_CMD_SHFT 0x3
  1819. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_ADDR_CMD_BMSK 0x4
  1820. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_WR_ADDR_CMD_SHFT 0x2
  1821. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_RD_CMD_BMSK 0x2
  1822. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_RD_CMD_SHFT 0x1
  1823. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_CORE_BMSK 0x1
  1824. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLOCK_GATE_DISABLE_CORE_SHFT 0x0
  1825. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000014)
  1826. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_RMSK 0x1010101
  1827. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_IN \
  1828. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_ADDR)
  1829. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_INM(m) \
  1830. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_ADDR, m)
  1831. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_BMSK 0x1000000
  1832. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_GXI_WR_LAST_ERR_INT_SHFT 0x18
  1833. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_BMSK 0x10000
  1834. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_GXI_AXI_WR_ERR_INT_SHFT 0x10
  1835. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_BMSK 0x100
  1836. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_GXI_AXI_RD_ERR_INT_SHFT 0x8
  1837. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_BMSK 0x1
  1838. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_INTS_GXI_WDTIMEOUT_INT_SHFT 0x0
  1839. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000018)
  1840. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_RMSK 0x3f3f3f
  1841. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_IN \
  1842. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_ADDR)
  1843. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_INM(m) \
  1844. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_ADDR, m)
  1845. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_BMSK 0x3f0000
  1846. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_AXI_WR_LAST_ERR_PORT_SHFT 0x10
  1847. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_AXI_WR_ERR_PORT_BMSK 0x3f00
  1848. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_AXI_WR_ERR_PORT_SHFT 0x8
  1849. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_AXI_RD_ERR_PORT_BMSK 0x3f
  1850. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_ERR_STATS_AXI_RD_ERR_PORT_SHFT 0x0
  1851. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x0000001c)
  1852. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_RMSK 0xffff3f3f
  1853. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_IN \
  1854. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_ADDR)
  1855. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_INM(m) \
  1856. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_ADDR, m)
  1857. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_OUT(v) \
  1858. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_ADDR,v)
  1859. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_OUTM(m,v) \
  1860. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_IN)
  1861. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_BMSK 0xff000000
  1862. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READ_DATA_SHFT 0x18
  1863. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_BMSK 0xff0000
  1864. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITE_DATA_SHFT 0x10
  1865. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_BMSK 0x3f00
  1866. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_READS_SHFT 0x8
  1867. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_BMSK 0x3f
  1868. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_DEFAULT_CONTROL_GXI_DEFAULT_MAX_PENDING_WRITES_SHFT 0x0
  1869. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000020)
  1870. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_RMSK 0xffff3f3f
  1871. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_IN \
  1872. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_ADDR)
  1873. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_INM(m) \
  1874. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_ADDR, m)
  1875. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_OUT(v) \
  1876. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_ADDR,v)
  1877. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_OUTM(m,v) \
  1878. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_IN)
  1879. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_BMSK 0xff000000
  1880. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READ_DATA_SHFT 0x18
  1881. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_BMSK 0xff0000
  1882. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITE_DATA_SHFT 0x10
  1883. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_BMSK 0x3f00
  1884. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_READS_SHFT 0x8
  1885. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_BMSK 0x3f
  1886. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_REDUCED_CONTROL_GXI_REDUCED_MAX_PENDING_WRITES_SHFT 0x0
  1887. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000024)
  1888. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_RMSK 0xfffffff
  1889. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_IN \
  1890. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_ADDR)
  1891. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_INM(m) \
  1892. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_ADDR, m)
  1893. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_OUT(v) \
  1894. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_ADDR,v)
  1895. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_OUTM(m,v) \
  1896. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_IN)
  1897. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_BMSK 0x8000000
  1898. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_DELAYED_RD_FLUSH_SHFT 0x1b
  1899. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_BMSK 0x4000000
  1900. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_DELAYED_WR_FLUSH_SHFT 0x1a
  1901. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_BMSK 0x2000000
  1902. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_DISABLE_WR_PREFIL_SHFT 0x19
  1903. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_BMSK 0x1000000
  1904. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_MAX_WR_BOUNDARY_SPLIT_SHFT 0x18
  1905. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_BMSK 0x800000
  1906. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_MAX_RD_BOUNDARY_SPLIT_SHFT 0x17
  1907. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_BMSK 0x700000
  1908. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_WRITE_BURST_SIZE_SHFT 0x14
  1909. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_BMSK 0xe0000
  1910. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_READ_BURST_SIZE_SHFT 0x11
  1911. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_BMSK 0x1fe00
  1912. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_READ_ISSUE_THRESHOLD_SHFT 0x9
  1913. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_BMSK 0x1fe
  1914. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_WRITE_PREFETCH_THRESHOLD_SHFT 0x1
  1915. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_CLEAR_STATS_BMSK 0x1
  1916. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_MISC_CONTROL_GXI_CLEAR_STATS_SHFT 0x0
  1917. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000028)
  1918. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_RMSK 0xffff0001
  1919. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_IN \
  1920. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_ADDR)
  1921. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_INM(m) \
  1922. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_ADDR, m)
  1923. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_OUT(v) \
  1924. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_ADDR,v)
  1925. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_OUTM(m,v) \
  1926. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_IN)
  1927. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_BMSK 0xffff0000
  1928. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_GXI_WDOG_LIMIT_SHFT 0x10
  1929. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_BMSK 0x1
  1930. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_CONTROL_GXI_WDOG_DISABLE_SHFT 0x0
  1931. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_STATUS_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x0000002c)
  1932. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_STATUS_RMSK 0xffff
  1933. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_STATUS_IN \
  1934. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_STATUS_ADDR)
  1935. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_STATUS_INM(m) \
  1936. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_STATUS_ADDR, m)
  1937. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_STATUS_GXI_WDOG_STATUS_BMSK 0xffff
  1938. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WDOG_STATUS_GXI_WDOG_STATUS_SHFT 0x0
  1939. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_IDLE_COUNTERS_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000030)
  1940. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_IDLE_COUNTERS_RMSK 0xffffffff
  1941. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_IDLE_COUNTERS_IN \
  1942. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_IDLE_COUNTERS_ADDR)
  1943. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_IDLE_COUNTERS_INM(m) \
  1944. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_IDLE_COUNTERS_ADDR, m)
  1945. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_BMSK 0xffff0000
  1946. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_IDLE_COUNTERS_GXI_READ_IDLE_CNT_SHFT 0x10
  1947. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_BMSK 0xffff
  1948. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_IDLE_COUNTERS_GXI_WRITE_IDLE_CNT_SHFT 0x0
  1949. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000034)
  1950. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_RMSK 0xfffff
  1951. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_IN \
  1952. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_ADDR)
  1953. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_INM(m) \
  1954. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_ADDR, m)
  1955. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_OUT(v) \
  1956. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_ADDR,v)
  1957. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_OUTM(m,v) \
  1958. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_IN)
  1959. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0xe0000
  1960. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11
  1961. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x10000
  1962. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10
  1963. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0xffff
  1964. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0
  1965. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000038)
  1966. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_RMSK 0xfffff
  1967. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_IN \
  1968. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_ADDR)
  1969. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_INM(m) \
  1970. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_ADDR, m)
  1971. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_OUT(v) \
  1972. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_ADDR,v)
  1973. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_OUTM(m,v) \
  1974. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_IN)
  1975. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_BMSK 0xe0000
  1976. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_AXI_LATENCY_RANGE_SHFT 0x11
  1977. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_BMSK 0x10000
  1978. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_AXI_LATENCY_EN_SHFT 0x10
  1979. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_BMSK 0xffff
  1980. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_LATENCY_CTRL_AXI_LATENCY_MIN_SHFT 0x0
  1981. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x0000003c)
  1982. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_RMSK 0xffffffff
  1983. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_IN \
  1984. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR)
  1985. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(m) \
  1986. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR, m)
  1987. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(v) \
  1988. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR,v)
  1989. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(m,v) \
  1990. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_IN)
  1991. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_VALUE_BMSK 0xffffffff
  1992. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_0_VALUE_SHFT 0x0
  1993. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000040)
  1994. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_RMSK 0xffffffff
  1995. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_IN \
  1996. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR)
  1997. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(m) \
  1998. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR, m)
  1999. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(v) \
  2000. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR,v)
  2001. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(m,v) \
  2002. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_IN)
  2003. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_VALUE_BMSK 0xffffffff
  2004. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_WR_ERR_STALL_DISABLE_IX_1_VALUE_SHFT 0x0
  2005. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000044)
  2006. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_RMSK 0xffffffff
  2007. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_IN \
  2008. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR)
  2009. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(m) \
  2010. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR, m)
  2011. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(v) \
  2012. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR,v)
  2013. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(m,v) \
  2014. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_IN)
  2015. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_VALUE_BMSK 0xffffffff
  2016. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_0_VALUE_SHFT 0x0
  2017. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000048)
  2018. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_RMSK 0xffffffff
  2019. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_IN \
  2020. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR)
  2021. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(m) \
  2022. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR, m)
  2023. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(v) \
  2024. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR,v)
  2025. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(m,v) \
  2026. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_IN)
  2027. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_VALUE_BMSK 0xffffffff
  2028. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_GXI_RD_ERR_STALL_DISABLE_IX_1_VALUE_SHFT 0x0
  2029. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x0000004c)
  2030. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_RMSK 0x1ffffff
  2031. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_IN \
  2032. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_ADDR)
  2033. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_INM(m) \
  2034. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_ADDR, m)
  2035. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_OUT(v) \
  2036. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_ADDR,v)
  2037. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_OUTM(m,v) \
  2038. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_IN)
  2039. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_MISC_IE_BMSK 0x1000000
  2040. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_MISC_IE_SHFT 0x18
  2041. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_DST_RING_IE_BMSK 0xfff000
  2042. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_DST_RING_IE_SHFT 0xc
  2043. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_SRC_RING_IE_BMSK 0xfff
  2044. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_0_SRC_RING_IE_SHFT 0x0
  2045. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000050)
  2046. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_RMSK 0xfff
  2047. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_IN \
  2048. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_ADDR)
  2049. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_INM(m) \
  2050. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_ADDR, m)
  2051. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_OUT(v) \
  2052. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_ADDR,v)
  2053. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_OUTM(m,v) \
  2054. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_IN)
  2055. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_STS_RING_IE_BMSK 0xfff
  2056. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_HOST_IE_1_STS_RING_IE_SHFT 0x0
  2057. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000054)
  2058. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_RMSK 0xffffff
  2059. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_IN \
  2060. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_ADDR)
  2061. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_INM(m) \
  2062. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_ADDR, m)
  2063. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_OUT(v) \
  2064. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_ADDR,v)
  2065. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_OUTM(m,v) \
  2066. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_IN)
  2067. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_DEST_BMSK 0xfff000
  2068. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_DEST_SHFT 0xc
  2069. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_SRC_BMSK 0xfff
  2070. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_SECURITY_SRC_SHFT 0x0
  2071. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000058)
  2072. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_RMSK 0x1ffffff
  2073. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_IN \
  2074. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_ADDR)
  2075. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_INM(m) \
  2076. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_ADDR, m)
  2077. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_OUT(v) \
  2078. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_ADDR,v)
  2079. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_OUTM(m,v) \
  2080. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_IN)
  2081. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_MISC_IE_BMSK 0x1000000
  2082. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_MISC_IE_SHFT 0x18
  2083. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_DST_RING_IE_BMSK 0xfff000
  2084. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_DST_RING_IE_SHFT 0xc
  2085. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_SRC_RING_IE_BMSK 0xfff
  2086. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_0_SRC_RING_IE_SHFT 0x0
  2087. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x0000005c)
  2088. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_RMSK 0xfff
  2089. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_IN \
  2090. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_ADDR)
  2091. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_INM(m) \
  2092. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_ADDR, m)
  2093. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_OUT(v) \
  2094. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_ADDR,v)
  2095. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_OUTM(m,v) \
  2096. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_IN)
  2097. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_STS_RING_IE_BMSK 0xfff
  2098. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TARGET_IE_1_STS_RING_IE_SHFT 0x0
  2099. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000060)
  2100. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_RMSK 0xffffffff
  2101. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_IN \
  2102. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_ADDR)
  2103. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_INM(m) \
  2104. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_ADDR, m)
  2105. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_OUT(v) \
  2106. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_ADDR,v)
  2107. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_OUTM(m,v) \
  2108. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_IN)
  2109. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_SEED_0_BMSK 0xffffffff
  2110. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_0_SEED_0_SHFT 0x0
  2111. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000064)
  2112. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_RMSK 0xffffffff
  2113. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_IN \
  2114. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_ADDR)
  2115. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_INM(m) \
  2116. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_ADDR, m)
  2117. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_OUT(v) \
  2118. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_ADDR,v)
  2119. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_OUTM(m,v) \
  2120. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_IN)
  2121. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_SEED_1_BMSK 0xffffffff
  2122. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_1_SEED_1_SHFT 0x0
  2123. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000068)
  2124. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_RMSK 0x1
  2125. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_IN \
  2126. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_ADDR)
  2127. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_INM(m) \
  2128. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_ADDR, m)
  2129. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_OUT(v) \
  2130. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_ADDR,v)
  2131. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_OUTM(m,v) \
  2132. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_IN)
  2133. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_SEED_2_BMSK 0x1
  2134. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_LFSR_SEED_2_SEED_2_SHFT 0x0
  2135. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x0000006c)
  2136. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_RMSK 0xffffffff
  2137. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_IN \
  2138. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_ADDR)
  2139. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_INM(m) \
  2140. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_ADDR, m)
  2141. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_OUT(v) \
  2142. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_ADDR,v)
  2143. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_OUTM(m,v) \
  2144. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_IN)
  2145. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_POLY_0_BMSK 0xffffffff
  2146. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_0_POLY_0_SHFT 0x0
  2147. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000070)
  2148. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_RMSK 0xffffffff
  2149. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_IN \
  2150. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_ADDR)
  2151. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_INM(m) \
  2152. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_ADDR, m)
  2153. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_OUT(v) \
  2154. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_ADDR,v)
  2155. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_OUTM(m,v) \
  2156. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_IN)
  2157. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_POLY_1_BMSK 0xffffffff
  2158. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_1_POLY_1_SHFT 0x0
  2159. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000074)
  2160. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_RMSK 0x1
  2161. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_IN \
  2162. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_ADDR)
  2163. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_INM(m) \
  2164. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_ADDR, m)
  2165. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_OUT(v) \
  2166. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_ADDR,v)
  2167. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_OUTM(m,v) \
  2168. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_IN)
  2169. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_POLY_2_BMSK 0x1
  2170. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_TOEPLITZ_POLY_2_POLY_2_SHFT 0x0
  2171. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_0_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000078)
  2172. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_0_RMSK 0xffffffff
  2173. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_0_IN \
  2174. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_0_ADDR)
  2175. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_0_INM(m) \
  2176. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_0_ADDR, m)
  2177. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_0_VALUE_BMSK 0xffffffff
  2178. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_0_VALUE_SHFT 0x0
  2179. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_1_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x0000007c)
  2180. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_1_RMSK 0xffffffff
  2181. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_1_IN \
  2182. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_1_ADDR)
  2183. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_1_INM(m) \
  2184. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_1_ADDR, m)
  2185. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_1_VALUE_BMSK 0xffffffff
  2186. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_1_VALUE_SHFT 0x0
  2187. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_2_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000080)
  2188. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_2_RMSK 0xffffffff
  2189. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_2_IN \
  2190. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_2_ADDR)
  2191. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_2_INM(m) \
  2192. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_2_ADDR, m)
  2193. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_2_VALUE_BMSK 0xffffffff
  2194. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_2_VALUE_SHFT 0x0
  2195. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_3_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000084)
  2196. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_3_RMSK 0xffffffff
  2197. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_3_IN \
  2198. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_3_ADDR)
  2199. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_3_INM(m) \
  2200. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_3_ADDR, m)
  2201. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_3_VALUE_BMSK 0xffffffff
  2202. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_DEBUG_DMA_3_VALUE_SHFT 0x0
  2203. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000088)
  2204. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_RMSK 0xfffdffff
  2205. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_IN \
  2206. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_ADDR)
  2207. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_INM(m) \
  2208. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_ADDR, m)
  2209. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_OUT(v) \
  2210. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_ADDR,v)
  2211. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_OUTM(m,v) \
  2212. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_IN)
  2213. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_CLK_EXTEND_BMSK 0x80000000
  2214. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_CLK_EXTEND_SHFT 0x1f
  2215. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_WRAPPER_REG_CLK_BMSK 0x40000000
  2216. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_WRAPPER_REG_CLK_SHFT 0x1e
  2217. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_CSM_REG_CLK_BMSK 0x3ffc0000
  2218. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_CSM_REG_CLK_SHFT 0x12
  2219. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_IC_CLK_BMSK 0x10000
  2220. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_IC_CLK_SHFT 0x10
  2221. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_DMA_CLK_BMSK 0xf000
  2222. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_DMA_CLK_SHFT 0xc
  2223. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_CSM_CORE_CLK_BMSK 0xfff
  2224. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_0_CSM_CORE_CLK_SHFT 0x0
  2225. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x0000008c)
  2226. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_RMSK 0xffffff
  2227. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_IN \
  2228. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_ADDR)
  2229. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_INM(m) \
  2230. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_ADDR, m)
  2231. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_OUT(v) \
  2232. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_ADDR,v)
  2233. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_OUTM(m,v) \
  2234. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_IN)
  2235. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_DST_SRNG_CLK_BMSK 0xfff000
  2236. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_DST_SRNG_CLK_SHFT 0xc
  2237. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_SRC_SRNG_CLK_BMSK 0xfff
  2238. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_1_SRC_SRNG_CLK_SHFT 0x0
  2239. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000090)
  2240. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_RMSK 0x1fff
  2241. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_IN \
  2242. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_ADDR)
  2243. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_INM(m) \
  2244. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_ADDR, m)
  2245. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_OUT(v) \
  2246. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_ADDR,v)
  2247. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_OUTM(m,v) \
  2248. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_IN)
  2249. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_TZ_CLK_BMSK 0x1000
  2250. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_TZ_CLK_SHFT 0xc
  2251. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_STS_SRNG_CLK_BMSK 0xfff
  2252. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_CLK_GATE_DIS_2_STS_SRNG_CLK_SHFT 0x0
  2253. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000094)
  2254. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_RMSK 0xfff
  2255. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_IN \
  2256. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_ADDR)
  2257. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_INM(m) \
  2258. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_ADDR, m)
  2259. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_OUT(v) \
  2260. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_ADDR,v)
  2261. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_OUTM(m,v) \
  2262. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_IN)
  2263. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_IDLE_CFG_BMSK 0xfff
  2264. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_IDLE_CONFIG_IDLE_CFG_SHFT 0x0
  2265. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_INVALID_APB_ACC_ADDR_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000098)
  2266. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_INVALID_APB_ACC_ADDR_RMSK 0xffffffff
  2267. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_INVALID_APB_ACC_ADDR_IN \
  2268. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_INVALID_APB_ACC_ADDR_ADDR)
  2269. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_INVALID_APB_ACC_ADDR_INM(m) \
  2270. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_INVALID_APB_ACC_ADDR_ADDR, m)
  2271. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_INVALID_APB_ACC_ADDR_VALUE_BMSK 0xffffffff
  2272. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_INVALID_APB_ACC_ADDR_VALUE_SHFT 0x0
  2273. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x0000009c)
  2274. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_RMSK 0xffffffff
  2275. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_IN \
  2276. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_ADDR)
  2277. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_INM(m) \
  2278. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_ADDR, m)
  2279. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_OUT(v) \
  2280. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_ADDR,v)
  2281. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_OUTM(m,v) \
  2282. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_IN)
  2283. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_VAL_BMSK 0xffffffff
  2284. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R0_CE_S_PARE_REGISTER_VAL_SHFT 0x0
  2285. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000400)
  2286. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_RMSK 0x100ff
  2287. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_IN \
  2288. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_ADDR)
  2289. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_INM(m) \
  2290. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_ADDR, m)
  2291. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_OUT(v) \
  2292. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_ADDR,v)
  2293. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_OUTM(m,v) \
  2294. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_IN)
  2295. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_BMSK 0x10000
  2296. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_HW_ERROR_INTERRUPT_TESTBUS_OVERWRITE_SHFT 0x10
  2297. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_GXI_TESTBUS_SELECT_BMSK 0xff
  2298. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_CTRL_GXI_TESTBUS_SELECT_SHFT 0x0
  2299. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000404)
  2300. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_RMSK 0xffffffff
  2301. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_IN \
  2302. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_ADDR)
  2303. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_INM(m) \
  2304. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_ADDR, m)
  2305. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_OUT(v) \
  2306. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_ADDR,v)
  2307. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_OUTM(m,v) \
  2308. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_IN)
  2309. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_MASK_BMSK 0xffffffff
  2310. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_0_MASK_SHFT 0x0
  2311. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000408)
  2312. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_RMSK 0xffffffff
  2313. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_IN \
  2314. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_ADDR)
  2315. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_INM(m) \
  2316. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_ADDR, m)
  2317. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_OUT(v) \
  2318. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_ADDR,v)
  2319. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_OUTM(m,v) \
  2320. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_IN)
  2321. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_MASK_BMSK 0xffffffff
  2322. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_EVENTMASK_IX_1_MASK_SHFT 0x0
  2323. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_LOW_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x0000040c)
  2324. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_LOW_RMSK 0xffffffff
  2325. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_LOW_IN \
  2326. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_LOW_ADDR)
  2327. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_LOW_INM(m) \
  2328. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_LOW_ADDR, m)
  2329. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_LOW_VAL_BMSK 0xffffffff
  2330. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_LOW_VAL_SHFT 0x0
  2331. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_HIGH_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000410)
  2332. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_HIGH_RMSK 0xff
  2333. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_HIGH_IN \
  2334. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_HIGH_ADDR)
  2335. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_HIGH_INM(m) \
  2336. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_HIGH_ADDR, m)
  2337. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_HIGH_VAL_BMSK 0xff
  2338. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_TESTBUS_HIGH_VAL_SHFT 0x0
  2339. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000414)
  2340. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_RMSK 0xffffffff
  2341. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_IN \
  2342. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR)
  2343. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_INM(m) \
  2344. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR, m)
  2345. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_OUT(v) \
  2346. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR,v)
  2347. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_OUTM(m,v) \
  2348. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_IN)
  2349. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_BMSK 0xfffe0000
  2350. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_END_SHFT 0x11
  2351. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_BMSK 0x1fffc
  2352. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_ADDRESS_RANGE_START_SHFT 0x2
  2353. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_BMSK 0x2
  2354. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_WRITE_ACCESS_REPORT_ENABLE_SHFT 0x1
  2355. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_BMSK 0x1
  2356. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_REG_ACCESS_EVENT_GEN_CTRL_READ_ACCESS_REPORT_ENABLE_SHFT 0x0
  2357. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_ADDR (HOST_SOC_CE_COMMON_WFSS_CE_COMMON_REG_REG_BASE + 0x00000418)
  2358. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_RMSK 0x1
  2359. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_IN \
  2360. in_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_ADDR)
  2361. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_INM(m) \
  2362. in_dword_masked(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_ADDR, m)
  2363. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_OUT(v) \
  2364. out_dword(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_ADDR,v)
  2365. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_OUTM(m,v) \
  2366. out_dword_masked_ns(HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_ADDR,m,v,HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_IN)
  2367. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_BMSK 0x1
  2368. #define HWIO_HOST_SOC_CE_COMMON_WFSS_CE_COMMON_R1_END_OF_TEST_CHECK_END_OF_TEST_SELF_CHECK_SHFT 0x0
  2369. #endif /* __HWIO_H__ */