rx_msdu_details.h 15 KB

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  1. /*
  2. * Copyright (c) 2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. //
  19. // DO NOT EDIT! This file is automatically generated
  20. // These definitions are tied to a particular hardware layout
  21. #ifndef _RX_MSDU_DETAILS_H_
  22. #define _RX_MSDU_DETAILS_H_
  23. #if !defined(__ASSEMBLER__)
  24. #endif
  25. #include "buffer_addr_info.h"
  26. #include "rx_msdu_desc_info.h"
  27. // ################ START SUMMARY #################
  28. //
  29. // Dword Fields
  30. // 0-1 struct buffer_addr_info buffer_addr_info_details;
  31. // 2-3 struct rx_msdu_desc_info rx_msdu_desc_info_details;
  32. //
  33. // ################ END SUMMARY #################
  34. #define NUM_OF_DWORDS_RX_MSDU_DETAILS 4
  35. struct rx_msdu_details {
  36. struct buffer_addr_info buffer_addr_info_details;
  37. struct rx_msdu_desc_info rx_msdu_desc_info_details;
  38. };
  39. /*
  40. struct buffer_addr_info buffer_addr_info_details
  41. Consumer: REO/SW
  42. Producer: RXDMA
  43. Details of the physical address of the buffer containing
  44. an MSDU (or entire MPDU)
  45. struct rx_msdu_desc_info rx_msdu_desc_info_details
  46. Consumer: REO/SW
  47. Producer: RXDMA
  48. General information related to the MSDU that should be
  49. passed on from RXDMA all the way to to the REO destination
  50. ring.
  51. */
  52. /* EXTERNAL REFERENCE : struct buffer_addr_info buffer_addr_info_details */
  53. /* Description RX_MSDU_DETAILS_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0
  54. Address (lower 32 bits) of the MSDU buffer OR
  55. MSDU_EXTENSION descriptor OR Link Descriptor
  56. In case of 'NULL' pointer, this field is set to 0
  57. <legal all>
  58. */
  59. #define RX_MSDU_DETAILS_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET 0x00000000
  60. #define RX_MSDU_DETAILS_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_LSB 0
  61. #define RX_MSDU_DETAILS_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MASK 0xffffffff
  62. /* Description RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32
  63. Address (upper 8 bits) of the MSDU buffer OR
  64. MSDU_EXTENSION descriptor OR Link Descriptor
  65. In case of 'NULL' pointer, this field is set to 0
  66. <legal all>
  67. */
  68. #define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_OFFSET 0x00000004
  69. #define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_LSB 0
  70. #define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MASK 0x000000ff
  71. /* Description RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER
  72. Consumer: WBM
  73. Producer: SW/FW
  74. In case of 'NULL' pointer, this field is set to 0
  75. Indicates to which buffer manager the buffer OR
  76. MSDU_EXTENSION descriptor OR link descriptor that is being
  77. pointed to shall be returned after the frame has been
  78. processed. It is used by WBM for routing purposes.
  79. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  80. to the WMB buffer idle list
  81. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  82. returned to the WMB idle link descriptor idle list
  83. <enum 2 FW_BM> This buffer shall be returned to the FW
  84. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  85. ring 0
  86. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  87. ring 1
  88. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  89. ring 2
  90. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  91. ring 3
  92. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  93. ring 4
  94. <legal all>
  95. */
  96. #define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  97. #define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_LSB 8
  98. #define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MASK 0x00000700
  99. /* Description RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE
  100. Cookie field exclusively used by SW.
  101. In case of 'NULL' pointer, this field is set to 0
  102. HW ignores the contents, accept that it passes the
  103. programmed value on to other descriptors together with the
  104. physical address
  105. Field can be used by SW to for example associate the
  106. buffers physical address with the virtual address
  107. The bit definitions as used by SW are within SW HLD
  108. specification
  109. NOTE:
  110. The three most significant bits can have a special
  111. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  112. STRUCT, and field transmit_bw_restriction is set
  113. In case of NON punctured transmission:
  114. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  115. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  116. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  117. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  118. In case of punctured transmission:
  119. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  120. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  121. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  122. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  123. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  124. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  125. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  126. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  127. Note: a punctured transmission is indicated by the
  128. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  129. TLV
  130. <legal all>
  131. */
  132. #define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_OFFSET 0x00000004
  133. #define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_LSB 11
  134. #define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MASK 0xfffff800
  135. /* EXTERNAL REFERENCE : struct rx_msdu_desc_info rx_msdu_desc_info_details */
  136. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG
  137. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  138. over multiple buffers, this field will be valid in the Last
  139. buffer used by the MSDU
  140. <enum 0 Not_first_msdu> This is not the first MSDU in
  141. the MPDU.
  142. <enum 1 first_msdu> This MSDU is the first one in the
  143. MPDU.
  144. <legal all>
  145. */
  146. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000008
  147. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0
  148. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001
  149. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG
  150. Consumer: WBM/REO/SW/FW
  151. Producer: RXDMA
  152. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  153. over multiple buffers, this field will be valid in the Last
  154. buffer used by the MSDU
  155. <enum 0 Not_last_msdu> There are more MSDUs linked to
  156. this MSDU that belongs to this MPDU
  157. <enum 1 Last_msdu> this MSDU is the last one in the
  158. MPDU. This setting is only allowed in combination with
  159. 'Msdu_continuation' set to 0. This implies that when an msdu
  160. is spread out over multiple buffers and thus
  161. msdu_continuation is set, only for the very last buffer of
  162. the msdu, can the 'last_msdu_in_mpdu_flag' be set.
  163. When both first_msdu_in_mpdu_flag and
  164. last_msdu_in_mpdu_flag are set, the MPDU that this MSDU
  165. belongs to only contains a single MSDU.
  166. <legal all>
  167. */
  168. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000008
  169. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1
  170. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002
  171. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION
  172. When set, this MSDU buffer was not able to hold the
  173. entire MSDU. The next buffer will therefor contain
  174. additional information related to this MSDU.
  175. <legal all>
  176. */
  177. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000008
  178. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2
  179. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004
  180. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH
  181. Parsed from RX_MSDU_START TLV . In the case MSDU spans
  182. over multiple buffers, this field will be valid in the First
  183. buffer used by MSDU.
  184. Full MSDU length in bytes after decapsulation.
  185. This field is still valid for MPDU frames without
  186. A-MSDU. It still represents MSDU length after decapsulation
  187. Or in case of RAW MPDUs, it indicates the length of the
  188. entire MPDU (without FCS field)
  189. <legal all>
  190. */
  191. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000008
  192. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3
  193. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8
  194. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION
  195. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  196. over multiple buffers, this field will be valid in the Last
  197. buffer used by the MSDU
  198. The ID of the REO exit ring where the MSDU frame shall
  199. push after (MPDU level) reordering has finished.
  200. <enum 0 reo_destination_tcl> Reo will push the frame
  201. into the REO2TCL ring
  202. <enum 1 reo_destination_sw1> Reo will push the frame
  203. into the REO2SW1 ring
  204. <enum 2 reo_destination_sw2> Reo will push the frame
  205. into the REO2SW2 ring
  206. <enum 3 reo_destination_sw3> Reo will push the frame
  207. into the REO2SW3 ring
  208. <enum 4 reo_destination_sw4> Reo will push the frame
  209. into the REO2SW4 ring
  210. <enum 5 reo_destination_release> Reo will push the frame
  211. into the REO_release ring
  212. <enum 6 reo_destination_fw> Reo will push the frame into
  213. the REO2FW ring
  214. <enum 7 reo_destination_sw5> Reo will push the frame
  215. into the REO2SW5 ring
  216. <enum 8 reo_destination_sw6> Reo will push the frame
  217. into the REO2SW6 ring
  218. <enum 9 reo_destination_9> REO remaps this <enum 10
  219. reo_destination_10> REO remaps this
  220. <enum 11 reo_destination_11> REO remaps this
  221. <enum 12 reo_destination_12> REO remaps this <enum 13
  222. reo_destination_13> REO remaps this
  223. <enum 14 reo_destination_14> REO remaps this
  224. <enum 15 reo_destination_15> REO remaps this
  225. <enum 16 reo_destination_16> REO remaps this
  226. <enum 17 reo_destination_17> REO remaps this
  227. <enum 18 reo_destination_18> REO remaps this
  228. <enum 19 reo_destination_19> REO remaps this
  229. <enum 20 reo_destination_20> REO remaps this
  230. <enum 21 reo_destination_21> REO remaps this
  231. <enum 22 reo_destination_22> REO remaps this
  232. <enum 23 reo_destination_23> REO remaps this
  233. <enum 24 reo_destination_24> REO remaps this
  234. <enum 25 reo_destination_25> REO remaps this
  235. <enum 26 reo_destination_26> REO remaps this
  236. <enum 27 reo_destination_27> REO remaps this
  237. <enum 28 reo_destination_28> REO remaps this
  238. <enum 29 reo_destination_29> REO remaps this
  239. <enum 30 reo_destination_30> REO remaps this
  240. <enum 31 reo_destination_31> REO remaps this
  241. <legal all>
  242. */
  243. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x00000008
  244. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 17
  245. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x003e0000
  246. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP
  247. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  248. over multiple buffers, this field will be valid in the Last
  249. buffer used by the MSDU
  250. When set, REO shall drop this MSDU and not forward it to
  251. any other ring...
  252. <legal all>
  253. */
  254. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000008
  255. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 22
  256. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00400000
  257. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID
  258. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  259. over multiple buffers, this field will be valid in the Last
  260. buffer used by the MSDU
  261. Indicates that OLE found a valid SA entry for this MSDU
  262. <legal all>
  263. */
  264. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000008
  265. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 23
  266. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00800000
  267. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
  268. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  269. over multiple buffers, this field will be valid in the Last
  270. buffer used by the MSDU
  271. Indicates an unsuccessful MAC source address search due
  272. to the expiring of the search timer for this MSDU
  273. <legal all>
  274. */
  275. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000008
  276. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 24
  277. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x01000000
  278. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID
  279. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  280. over multiple buffers, this field will be valid in the Last
  281. buffer used by the MSDU
  282. Indicates that OLE found a valid DA entry for this MSDU
  283. <legal all>
  284. */
  285. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000008
  286. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 25
  287. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x02000000
  288. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC
  289. Field Only valid if da_is_valid is set
  290. Indicates the DA address was a Multicast of Broadcast
  291. address for this MSDU
  292. <legal all>
  293. */
  294. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000008
  295. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 26
  296. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x04000000
  297. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
  298. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  299. over multiple buffers, this field will be valid in the Last
  300. buffer used by the MSDU
  301. Indicates an unsuccessful MAC destination address search
  302. due to the expiring of the search timer for this MSDU
  303. <legal all>
  304. */
  305. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000008
  306. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 27
  307. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x08000000
  308. /* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A
  309. <legal 0>
  310. */
  311. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x00000008
  312. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_LSB 28
  313. #define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_MASK 0xf0000000
  314. /* Description RX_MSDU_DETAILS_3_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A
  315. <legal 0>
  316. */
  317. #define RX_MSDU_DETAILS_3_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_OFFSET 0x0000000c
  318. #define RX_MSDU_DETAILS_3_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_LSB 0
  319. #define RX_MSDU_DETAILS_3_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_MASK 0xffffffff
  320. #endif // _RX_MSDU_DETAILS_H_