reo_entrance_ring.h 42 KB

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  1. /*
  2. * Copyright (c) 2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. //
  19. // DO NOT EDIT! This file is automatically generated
  20. // These definitions are tied to a particular hardware layout
  21. #ifndef _REO_ENTRANCE_RING_H_
  22. #define _REO_ENTRANCE_RING_H_
  23. #if !defined(__ASSEMBLER__)
  24. #endif
  25. #include "rx_mpdu_details.h"
  26. // ################ START SUMMARY #################
  27. //
  28. // Dword Fields
  29. // 0-3 struct rx_mpdu_details reo_level_mpdu_frame_info;
  30. // 4 rx_reo_queue_desc_addr_31_0[31:0]
  31. // 5 rx_reo_queue_desc_addr_39_32[7:0], rounded_mpdu_byte_count[21:8], reo_destination_indication[26:22], frameless_bar[27], reserved_5a[31:28]
  32. // 6 rxdma_push_reason[1:0], rxdma_error_code[6:2], mpdu_fragment_number[10:7], sw_exception[11], sw_exception_mpdu_delink[12], sw_exception_destination_ring_valid[13], sw_exception_destination_ring[18:14], reserved_6a[31:19]
  33. // 7 reserved_7a[19:0], ring_id[27:20], looping_count[31:28]
  34. //
  35. // ################ END SUMMARY #################
  36. #define NUM_OF_DWORDS_REO_ENTRANCE_RING 8
  37. struct reo_entrance_ring {
  38. struct rx_mpdu_details reo_level_mpdu_frame_info;
  39. uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0]
  40. uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0]
  41. rounded_mpdu_byte_count : 14, //[21:8]
  42. reo_destination_indication : 5, //[26:22]
  43. frameless_bar : 1, //[27]
  44. reserved_5a : 4; //[31:28]
  45. uint32_t rxdma_push_reason : 2, //[1:0]
  46. rxdma_error_code : 5, //[6:2]
  47. mpdu_fragment_number : 4, //[10:7]
  48. sw_exception : 1, //[11]
  49. sw_exception_mpdu_delink : 1, //[12]
  50. sw_exception_destination_ring_valid: 1, //[13]
  51. sw_exception_destination_ring : 5, //[18:14]
  52. reserved_6a : 13; //[31:19]
  53. uint32_t reserved_7a : 20, //[19:0]
  54. ring_id : 8, //[27:20]
  55. looping_count : 4; //[31:28]
  56. };
  57. /*
  58. struct rx_mpdu_details reo_level_mpdu_frame_info
  59. Consumer: REO
  60. Producer: RXDMA
  61. Details related to the MPDU being pushed into the REO
  62. rx_reo_queue_desc_addr_31_0
  63. Consumer: REO
  64. Producer: RXDMA
  65. Address (lower 32 bits) of the REO queue descriptor.
  66. <legal all>
  67. rx_reo_queue_desc_addr_39_32
  68. Consumer: REO
  69. Producer: RXDMA
  70. Address (upper 8 bits) of the REO queue descriptor.
  71. <legal all>
  72. rounded_mpdu_byte_count
  73. An approximation of the number of bytes received in this
  74. MPDU.
  75. Used to keeps stats on the amount of data flowing
  76. through a queue.
  77. <legal all>
  78. reo_destination_indication
  79. RXDMA copy the MPDU's first MSDU's destination
  80. indication field here. This is used for REO to be able to
  81. re-route the packet to a different SW destination ring if
  82. the packet is detected as error in REO.
  83. The ID of the REO exit ring where the MSDU frame shall
  84. push after (MPDU level) reordering has finished.
  85. <enum 0 reo_destination_tcl> Reo will push the frame
  86. into the REO2TCL ring
  87. <enum 1 reo_destination_sw1> Reo will push the frame
  88. into the REO2SW1 ring
  89. <enum 2 reo_destination_sw2> Reo will push the frame
  90. into the REO2SW2 ring
  91. <enum 3 reo_destination_sw3> Reo will push the frame
  92. into the REO2SW3 ring
  93. <enum 4 reo_destination_sw4> Reo will push the frame
  94. into the REO2SW4 ring
  95. <enum 5 reo_destination_release> Reo will push the frame
  96. into the REO_release ring
  97. <enum 6 reo_destination_fw> Reo will push the frame into
  98. the REO2FW ring
  99. <enum 7 reo_destination_sw5> Reo will push the frame
  100. into the REO2SW5 ring
  101. <enum 8 reo_destination_sw6> Reo will push the frame
  102. into the REO2SW6 ring
  103. <enum 9 reo_destination_9> REO remaps this <enum 10
  104. reo_destination_10> REO remaps this
  105. <enum 11 reo_destination_11> REO remaps this
  106. <enum 12 reo_destination_12> REO remaps this <enum 13
  107. reo_destination_13> REO remaps this
  108. <enum 14 reo_destination_14> REO remaps this
  109. <enum 15 reo_destination_15> REO remaps this
  110. <enum 16 reo_destination_16> REO remaps this
  111. <enum 17 reo_destination_17> REO remaps this
  112. <enum 18 reo_destination_18> REO remaps this
  113. <enum 19 reo_destination_19> REO remaps this
  114. <enum 20 reo_destination_20> REO remaps this
  115. <enum 21 reo_destination_21> REO remaps this
  116. <enum 22 reo_destination_22> REO remaps this
  117. <enum 23 reo_destination_23> REO remaps this
  118. <enum 24 reo_destination_24> REO remaps this
  119. <enum 25 reo_destination_25> REO remaps this
  120. <enum 26 reo_destination_26> REO remaps this
  121. <enum 27 reo_destination_27> REO remaps this
  122. <enum 28 reo_destination_28> REO remaps this
  123. <enum 29 reo_destination_29> REO remaps this
  124. <enum 30 reo_destination_30> REO remaps this
  125. <enum 31 reo_destination_31> REO remaps this
  126. <legal all>
  127. frameless_bar
  128. When set, this REO entrance ring struct contains BAR
  129. info from a multi TID BAR frame. The original multi TID BAR
  130. frame itself contained all the REO info for the first TID,
  131. but all the subsequent TID info and their linkage to the REO
  132. descriptors is passed down as 'frameless' BAR info.
  133. The only fields valid in this descriptor when this bit
  134. is set are:
  135. Rx_reo_queue_desc_addr_31_0
  136. RX_reo_queue_desc_addr_39_32
  137. And within the
  138. Reo_level_mpdu_frame_info:
  139. Within Rx_mpdu_desc_info_details:
  140. Mpdu_Sequence_number
  141. BAR_frame
  142. Peer_meta_data
  143. All other fields shall be set to 0
  144. <legal all>
  145. reserved_5a
  146. <legal 0>
  147. rxdma_push_reason
  148. Indicates why rxdma pushed the frame to this ring
  149. This field is ignored by REO.
  150. <enum 0 rxdma_error_detected> RXDMA detected an error an
  151. pushed this frame to this queue
  152. <enum 1 rxdma_routing_instruction> RXDMA pushed the
  153. frame to this queue per received routing instructions. No
  154. error within RXDMA was detected
  155. <enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a
  156. result the MSDU link descriptor might not have the
  157. last_msdu_in_mpdu_flag set, but instead WBM might just see a
  158. NULL pointer in the MSDU link descriptor. This is to be
  159. considered a normal condition for this scenario.
  160. <legal 0 - 2>
  161. rxdma_error_code
  162. Field only valid when 'rxdma_push_reason' set to
  163. 'rxdma_error_detected'.
  164. This field is ignored by REO.
  165. <enum 0 rxdma_overflow_err>MPDU frame is not complete
  166. due to a FIFO overflow error in RXPCU.
  167. <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete
  168. due to receiving incomplete MPDU from the PHY
  169. <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption
  170. error or CRYPTO received an encrypted frame, but did not get
  171. a valid corresponding key id in the peer entry.
  172. <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC
  173. error
  174. <enum 5 rxdma_unecrypted_err>CRYPTO reported an
  175. unencrypted frame error when encrypted was expected
  176. <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU
  177. length error
  178. <enum 7 rxdma_msdu_limit_err>RX OLE reported that max
  179. number of MSDUs allowed in an MPDU got exceeded
  180. <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing
  181. error
  182. <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU
  183. parsing error
  184. <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout
  185. during SA search
  186. <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout
  187. during DA search
  188. <enum 12 rxdma_flow_timeout_err>RX OLE reported a
  189. timeout during flow search
  190. <enum 13 rxdma_flush_request>RXDMA received a flush
  191. request
  192. <enum 14 rxdma_amsdu_fragment_err>Rx PCU reported A-MSDU
  193. present as well as a fragmented MPDU. A-MSDU defragmentation
  194. is not supported in Lithium SW so this is treated as an
  195. error.
  196. mpdu_fragment_number
  197. Field only valid when Reo_level_mpdu_frame_info.
  198. Rx_mpdu_desc_info_details.Fragment_flag is set.
  199. The fragment number from the 802.11 header.
  200. Note that the sequence number is embedded in the field:
  201. Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details.
  202. Mpdu_sequence_number
  203. <legal all>
  204. sw_exception
  205. When not set, REO is performing all its default MPDU
  206. processing operations,
  207. When set, this REO entrance descriptor is generated by
  208. FW, and should be processed as an exception. This implies:
  209. NO re-order function is needed.
  210. MPDU delinking is determined by the setting of field
  211. SW_excection_mpdu_delink
  212. Destination ring selection is based on the setting of
  213. the field SW_exception_destination_ring_valid
  214. In the destination ring descriptor set bit:
  215. SW_exception_entry
  216. Feature supported only in HastingsPrime
  217. <legal all>
  218. sw_exception_mpdu_delink
  219. Field only valid when SW_exception is set.
  220. 1'b0: REO should NOT delink the MPDU, and thus pass this
  221. MPDU on to the destination ring as is. This implies that in
  222. the REO_DESTINATION_RING struct field
  223. Buf_or_link_desc_addr_info should point to an MSDU link
  224. descriptor
  225. 1'b1: REO should perform the normal MPDU delink into
  226. MSDU operations.
  227. Feature supported only in HastingsPrime
  228. <legal all>
  229. sw_exception_destination_ring_valid
  230. Field only valid when SW_exception is set.
  231. 1'b0: REO shall push the MPDU (or delinked MPDU based on
  232. the setting of SW_exception_mpdu_delink) to the destination
  233. ring according to field reo_destination_indication.
  234. 1'b1: REO shall push the MPDU (or delinked MPDU based on
  235. the setting of SW_exception_mpdu_delink) to the destination
  236. ring according to field SW_exception_destination_ring.
  237. Feature supported only in HastingsPrime
  238. <legal all>
  239. sw_exception_destination_ring
  240. Field only valid when fields SW_exception and
  241. SW_exception_destination_ring_valid are set.
  242. The ID of the ring where REO shall push this frame.
  243. <enum 0 reo_destination_tcl> Reo will push the frame
  244. into the REO2TCL ring
  245. <enum 1 reo_destination_sw1> Reo will push the frame
  246. into the REO2SW1 ring
  247. <enum 2 reo_destination_sw2> Reo will push the frame
  248. into the REO2SW1 ring
  249. <enum 3 reo_destination_sw3> Reo will push the frame
  250. into the REO2SW1 ring
  251. <enum 4 reo_destination_sw4> Reo will push the frame
  252. into the REO2SW1 ring
  253. <enum 5 reo_destination_release> Reo will push the frame
  254. into the REO_release ring
  255. <enum 6 reo_destination_fw> Reo will push the frame into
  256. the REO2FW ring
  257. <enum 7 reo_destination_sw5> REO remaps this
  258. <enum 8 reo_destination_sw6> REO remaps this
  259. <enum 9 reo_destination_9> REO remaps this
  260. <enum 10 reo_destination_10> REO remaps this
  261. <enum 11 reo_destination_11> REO remaps this
  262. <enum 12 reo_destination_12> REO remaps this <enum 13
  263. reo_destination_13> REO remaps this
  264. <enum 14 reo_destination_14> REO remaps this
  265. <enum 15 reo_destination_15> REO remaps this
  266. <enum 16 reo_destination_16> REO remaps this
  267. <enum 17 reo_destination_17> REO remaps this
  268. <enum 18 reo_destination_18> REO remaps this
  269. <enum 19 reo_destination_19> REO remaps this
  270. <enum 20 reo_destination_20> REO remaps this
  271. <enum 21 reo_destination_21> REO remaps this
  272. <enum 22 reo_destination_22> REO remaps this
  273. <enum 23 reo_destination_23> REO remaps this
  274. <enum 24 reo_destination_24> REO remaps this
  275. <enum 25 reo_destination_25> REO remaps this
  276. <enum 26 reo_destination_26> REO remaps this
  277. <enum 27 reo_destination_27> REO remaps this
  278. <enum 28 reo_destination_28> REO remaps this
  279. <enum 29 reo_destination_29> REO remaps this
  280. <enum 30 reo_destination_30> REO remaps this
  281. <enum 31 reo_destination_31> REO remaps this
  282. Feature supported only in HastingsPrime
  283. <legal all>
  284. reserved_6a
  285. <legal 0>
  286. reserved_7a
  287. <legal 0>
  288. ring_id
  289. Consumer: SW/REO/DEBUG
  290. Producer: SRNG (of RXDMA)
  291. For debugging.
  292. This field is filled in by the SRNG module.
  293. It help to identify the ring that is being looked <legal
  294. all>
  295. looping_count
  296. Consumer: SW/REO/DEBUG
  297. Producer: SRNG (of RXDMA)
  298. For debugging.
  299. This field is filled in by the SRNG module.
  300. A count value that indicates the number of times the
  301. producer of entries into this Ring has looped around the
  302. ring.
  303. At initialization time, this value is set to 0. On the
  304. first loop, this value is set to 1. After the max value is
  305. reached allowed by the number of bits for this field, the
  306. count value continues with 0 again.
  307. In case SW is the consumer of the ring entries, it can
  308. use this field to figure out up to where the producer of
  309. entries has created new entries. This eliminates the need to
  310. check where the head pointer' of the ring is located once
  311. the SW starts processing an interrupt indicating that new
  312. entries have been put into this ring...
  313. Also note that SW if it wants only needs to look at the
  314. LSB bit of this count value.
  315. <legal all>
  316. */
  317. /* EXTERNAL REFERENCE : struct rx_mpdu_details reo_level_mpdu_frame_info */
  318. /* EXTERNAL REFERENCE : struct buffer_addr_info msdu_link_desc_addr_info */
  319. /* Description REO_ENTRANCE_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
  320. Address (lower 32 bits) of the MSDU buffer OR
  321. MSDU_EXTENSION descriptor OR Link Descriptor
  322. In case of 'NULL' pointer, this field is set to 0
  323. <legal all>
  324. */
  325. #define REO_ENTRANCE_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
  326. #define REO_ENTRANCE_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
  327. #define REO_ENTRANCE_RING_0_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
  328. /* Description REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
  329. Address (upper 8 bits) of the MSDU buffer OR
  330. MSDU_EXTENSION descriptor OR Link Descriptor
  331. In case of 'NULL' pointer, this field is set to 0
  332. <legal all>
  333. */
  334. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
  335. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
  336. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
  337. /* Description REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
  338. Consumer: WBM
  339. Producer: SW/FW
  340. In case of 'NULL' pointer, this field is set to 0
  341. Indicates to which buffer manager the buffer OR
  342. MSDU_EXTENSION descriptor OR link descriptor that is being
  343. pointed to shall be returned after the frame has been
  344. processed. It is used by WBM for routing purposes.
  345. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  346. to the WMB buffer idle list
  347. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  348. returned to the WMB idle link descriptor idle list
  349. <enum 2 FW_BM> This buffer shall be returned to the FW
  350. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  351. ring 0
  352. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  353. ring 1
  354. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  355. ring 2
  356. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  357. ring 3
  358. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  359. ring 4
  360. <legal all>
  361. */
  362. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  363. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
  364. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
  365. /* Description REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
  366. Cookie field exclusively used by SW.
  367. In case of 'NULL' pointer, this field is set to 0
  368. HW ignores the contents, accept that it passes the
  369. programmed value on to other descriptors together with the
  370. physical address
  371. Field can be used by SW to for example associate the
  372. buffers physical address with the virtual address
  373. The bit definitions as used by SW are within SW HLD
  374. specification
  375. NOTE:
  376. The three most significant bits can have a special
  377. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  378. STRUCT, and field transmit_bw_restriction is set
  379. In case of NON punctured transmission:
  380. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  381. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  382. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  383. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  384. In case of punctured transmission:
  385. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  386. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  387. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  388. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  389. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  390. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  391. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  392. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  393. Note: a punctured transmission is indicated by the
  394. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  395. TLV
  396. <legal all>
  397. */
  398. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
  399. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
  400. #define REO_ENTRANCE_RING_1_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
  401. /* EXTERNAL REFERENCE : struct rx_mpdu_desc_info rx_mpdu_desc_info_details */
  402. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT
  403. Consumer: REO/SW/FW
  404. Producer: RXDMA
  405. The number of MSDUs within the MPDU
  406. <legal all>
  407. */
  408. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
  409. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0
  410. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff
  411. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER
  412. Consumer: REO/SW/FW
  413. Producer: RXDMA
  414. The field can have two different meanings based on the
  415. setting of field 'BAR_frame':
  416. 'BAR_frame' is NOT set:
  417. The MPDU sequence number of the received frame.
  418. 'BAR_frame' is set.
  419. The MPDU Start sequence number from the BAR frame
  420. <legal all>
  421. */
  422. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_OFFSET 0x00000008
  423. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_LSB 8
  424. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_MASK 0x000fff00
  425. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG
  426. Consumer: REO/SW/FW
  427. Producer: RXDMA
  428. When set, this MPDU is a fragment and REO should forward
  429. this fragment MPDU to the REO destination ring without any
  430. reorder checks, pn checks or bitmap update. This implies
  431. that REO is forwarding the pointer to the MSDU link
  432. descriptor. The destination ring is coming from a
  433. programmable register setting in REO
  434. <legal all>
  435. */
  436. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
  437. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 20
  438. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00100000
  439. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT
  440. Consumer: REO/SW/FW
  441. Producer: RXDMA
  442. The retry bit setting from the MPDU header of the
  443. received frame
  444. <legal all>
  445. */
  446. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
  447. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 21
  448. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00200000
  449. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG
  450. Consumer: REO/SW/FW
  451. Producer: RXDMA
  452. When set, the MPDU was received as part of an A-MPDU.
  453. <legal all>
  454. */
  455. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
  456. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 22
  457. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00400000
  458. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME
  459. Consumer: REO/SW/FW
  460. Producer: RXDMA
  461. When set, the received frame is a BAR frame. After
  462. processing, this frame shall be pushed to SW or deleted.
  463. <legal all>
  464. */
  465. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
  466. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 23
  467. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00800000
  468. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO
  469. Consumer: REO/SW/FW
  470. Producer: RXDMA
  471. Copied here by RXDMA from RX_MPDU_END
  472. When not set, REO will Not perform a PN sequence number
  473. check
  474. */
  475. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
  476. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 24
  477. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x01000000
  478. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID
  479. When set, OLE found a valid SA entry for all MSDUs in
  480. this MPDU
  481. <legal all>
  482. */
  483. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000008
  484. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 25
  485. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x02000000
  486. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
  487. When set, at least 1 MSDU within the MPDU has an
  488. unsuccessful MAC source address search due to the expiration
  489. of the search timer.
  490. <legal all>
  491. */
  492. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000008
  493. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 26
  494. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x04000000
  495. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID
  496. When set, OLE found a valid DA entry for all MSDUs in
  497. this MPDU
  498. <legal all>
  499. */
  500. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000008
  501. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 27
  502. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x08000000
  503. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC
  504. Field Only valid if da_is_valid is set
  505. When set, at least one of the DA addresses is a
  506. Multicast or Broadcast address.
  507. <legal all>
  508. */
  509. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000008
  510. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 28
  511. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x10000000
  512. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
  513. When set, at least 1 MSDU within the MPDU has an
  514. unsuccessful MAC destination address search due to the
  515. expiration of the search timer.
  516. <legal all>
  517. */
  518. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000008
  519. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 29
  520. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x20000000
  521. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU
  522. Field only valid when first_msdu_in_mpdu_flag is set.
  523. When set, the contents in the MSDU buffer contains a
  524. 'RAW' MPDU. This 'RAW' MPDU might be spread out over
  525. multiple MSDU buffers.
  526. <legal all>
  527. */
  528. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008
  529. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 30
  530. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x40000000
  531. /* Description REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG
  532. The More Fragment bit setting from the MPDU header of
  533. the received frame
  534. <legal all>
  535. */
  536. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
  537. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 31
  538. #define REO_ENTRANCE_RING_2_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x80000000
  539. /* Description REO_ENTRANCE_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA
  540. Meta data that SW has programmed in the Peer table entry
  541. of the transmitting STA.
  542. <legal all>
  543. */
  544. #define REO_ENTRANCE_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
  545. #define REO_ENTRANCE_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
  546. #define REO_ENTRANCE_RING_3_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
  547. /* Description REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0
  548. Consumer: REO
  549. Producer: RXDMA
  550. Address (lower 32 bits) of the REO queue descriptor.
  551. <legal all>
  552. */
  553. #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000010
  554. #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0
  555. #define REO_ENTRANCE_RING_4_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff
  556. /* Description REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32
  557. Consumer: REO
  558. Producer: RXDMA
  559. Address (upper 8 bits) of the REO queue descriptor.
  560. <legal all>
  561. */
  562. #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000014
  563. #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
  564. #define REO_ENTRANCE_RING_5_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff
  565. /* Description REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT
  566. An approximation of the number of bytes received in this
  567. MPDU.
  568. Used to keeps stats on the amount of data flowing
  569. through a queue.
  570. <legal all>
  571. */
  572. #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_OFFSET 0x00000014
  573. #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_LSB 8
  574. #define REO_ENTRANCE_RING_5_ROUNDED_MPDU_BYTE_COUNT_MASK 0x003fff00
  575. /* Description REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION
  576. RXDMA copy the MPDU's first MSDU's destination
  577. indication field here. This is used for REO to be able to
  578. re-route the packet to a different SW destination ring if
  579. the packet is detected as error in REO.
  580. The ID of the REO exit ring where the MSDU frame shall
  581. push after (MPDU level) reordering has finished.
  582. <enum 0 reo_destination_tcl> Reo will push the frame
  583. into the REO2TCL ring
  584. <enum 1 reo_destination_sw1> Reo will push the frame
  585. into the REO2SW1 ring
  586. <enum 2 reo_destination_sw2> Reo will push the frame
  587. into the REO2SW2 ring
  588. <enum 3 reo_destination_sw3> Reo will push the frame
  589. into the REO2SW3 ring
  590. <enum 4 reo_destination_sw4> Reo will push the frame
  591. into the REO2SW4 ring
  592. <enum 5 reo_destination_release> Reo will push the frame
  593. into the REO_release ring
  594. <enum 6 reo_destination_fw> Reo will push the frame into
  595. the REO2FW ring
  596. <enum 7 reo_destination_sw5> Reo will push the frame
  597. into the REO2SW5 ring
  598. <enum 8 reo_destination_sw6> Reo will push the frame
  599. into the REO2SW6 ring
  600. <enum 9 reo_destination_9> REO remaps this <enum 10
  601. reo_destination_10> REO remaps this
  602. <enum 11 reo_destination_11> REO remaps this
  603. <enum 12 reo_destination_12> REO remaps this <enum 13
  604. reo_destination_13> REO remaps this
  605. <enum 14 reo_destination_14> REO remaps this
  606. <enum 15 reo_destination_15> REO remaps this
  607. <enum 16 reo_destination_16> REO remaps this
  608. <enum 17 reo_destination_17> REO remaps this
  609. <enum 18 reo_destination_18> REO remaps this
  610. <enum 19 reo_destination_19> REO remaps this
  611. <enum 20 reo_destination_20> REO remaps this
  612. <enum 21 reo_destination_21> REO remaps this
  613. <enum 22 reo_destination_22> REO remaps this
  614. <enum 23 reo_destination_23> REO remaps this
  615. <enum 24 reo_destination_24> REO remaps this
  616. <enum 25 reo_destination_25> REO remaps this
  617. <enum 26 reo_destination_26> REO remaps this
  618. <enum 27 reo_destination_27> REO remaps this
  619. <enum 28 reo_destination_28> REO remaps this
  620. <enum 29 reo_destination_29> REO remaps this
  621. <enum 30 reo_destination_30> REO remaps this
  622. <enum 31 reo_destination_31> REO remaps this
  623. <legal all>
  624. */
  625. #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_OFFSET 0x00000014
  626. #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_LSB 22
  627. #define REO_ENTRANCE_RING_5_REO_DESTINATION_INDICATION_MASK 0x07c00000
  628. /* Description REO_ENTRANCE_RING_5_FRAMELESS_BAR
  629. When set, this REO entrance ring struct contains BAR
  630. info from a multi TID BAR frame. The original multi TID BAR
  631. frame itself contained all the REO info for the first TID,
  632. but all the subsequent TID info and their linkage to the REO
  633. descriptors is passed down as 'frameless' BAR info.
  634. The only fields valid in this descriptor when this bit
  635. is set are:
  636. Rx_reo_queue_desc_addr_31_0
  637. RX_reo_queue_desc_addr_39_32
  638. And within the
  639. Reo_level_mpdu_frame_info:
  640. Within Rx_mpdu_desc_info_details:
  641. Mpdu_Sequence_number
  642. BAR_frame
  643. Peer_meta_data
  644. All other fields shall be set to 0
  645. <legal all>
  646. */
  647. #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_OFFSET 0x00000014
  648. #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_LSB 27
  649. #define REO_ENTRANCE_RING_5_FRAMELESS_BAR_MASK 0x08000000
  650. /* Description REO_ENTRANCE_RING_5_RESERVED_5A
  651. <legal 0>
  652. */
  653. #define REO_ENTRANCE_RING_5_RESERVED_5A_OFFSET 0x00000014
  654. #define REO_ENTRANCE_RING_5_RESERVED_5A_LSB 28
  655. #define REO_ENTRANCE_RING_5_RESERVED_5A_MASK 0xf0000000
  656. /* Description REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON
  657. Indicates why rxdma pushed the frame to this ring
  658. This field is ignored by REO.
  659. <enum 0 rxdma_error_detected> RXDMA detected an error an
  660. pushed this frame to this queue
  661. <enum 1 rxdma_routing_instruction> RXDMA pushed the
  662. frame to this queue per received routing instructions. No
  663. error within RXDMA was detected
  664. <enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a
  665. result the MSDU link descriptor might not have the
  666. last_msdu_in_mpdu_flag set, but instead WBM might just see a
  667. NULL pointer in the MSDU link descriptor. This is to be
  668. considered a normal condition for this scenario.
  669. <legal 0 - 2>
  670. */
  671. #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_OFFSET 0x00000018
  672. #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_LSB 0
  673. #define REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_MASK 0x00000003
  674. /* Description REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE
  675. Field only valid when 'rxdma_push_reason' set to
  676. 'rxdma_error_detected'.
  677. This field is ignored by REO.
  678. <enum 0 rxdma_overflow_err>MPDU frame is not complete
  679. due to a FIFO overflow error in RXPCU.
  680. <enum 1 rxdma_mpdu_length_err>MPDU frame is not complete
  681. due to receiving incomplete MPDU from the PHY
  682. <enum 3 rxdma_decrypt_err>CRYPTO reported a decryption
  683. error or CRYPTO received an encrypted frame, but did not get
  684. a valid corresponding key id in the peer entry.
  685. <enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC
  686. error
  687. <enum 5 rxdma_unecrypted_err>CRYPTO reported an
  688. unencrypted frame error when encrypted was expected
  689. <enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU
  690. length error
  691. <enum 7 rxdma_msdu_limit_err>RX OLE reported that max
  692. number of MSDUs allowed in an MPDU got exceeded
  693. <enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing
  694. error
  695. <enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU
  696. parsing error
  697. <enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout
  698. during SA search
  699. <enum 11 rxdma_da_timeout_err>RX OLE reported a timeout
  700. during DA search
  701. <enum 12 rxdma_flow_timeout_err>RX OLE reported a
  702. timeout during flow search
  703. <enum 13 rxdma_flush_request>RXDMA received a flush
  704. request
  705. <enum 14 rxdma_amsdu_fragment_err>Rx PCU reported A-MSDU
  706. present as well as a fragmented MPDU. A-MSDU defragmentation
  707. is not supported in Lithium SW so this is treated as an
  708. error.
  709. */
  710. #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_OFFSET 0x00000018
  711. #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_LSB 2
  712. #define REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_MASK 0x0000007c
  713. /* Description REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER
  714. Field only valid when Reo_level_mpdu_frame_info.
  715. Rx_mpdu_desc_info_details.Fragment_flag is set.
  716. The fragment number from the 802.11 header.
  717. Note that the sequence number is embedded in the field:
  718. Reo_level_mpdu_frame_info. Rx_mpdu_desc_info_details.
  719. Mpdu_sequence_number
  720. <legal all>
  721. */
  722. #define REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER_OFFSET 0x00000018
  723. #define REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER_LSB 7
  724. #define REO_ENTRANCE_RING_6_MPDU_FRAGMENT_NUMBER_MASK 0x00000780
  725. /* Description REO_ENTRANCE_RING_6_SW_EXCEPTION
  726. When not set, REO is performing all its default MPDU
  727. processing operations,
  728. When set, this REO entrance descriptor is generated by
  729. FW, and should be processed as an exception. This implies:
  730. NO re-order function is needed.
  731. MPDU delinking is determined by the setting of field
  732. SW_excection_mpdu_delink
  733. Destination ring selection is based on the setting of
  734. the field SW_exception_destination_ring_valid
  735. In the destination ring descriptor set bit:
  736. SW_exception_entry
  737. Feature supported only in HastingsPrime
  738. <legal all>
  739. */
  740. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_OFFSET 0x00000018
  741. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_LSB 11
  742. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_MASK 0x00000800
  743. /* Description REO_ENTRANCE_RING_6_SW_EXCEPTION_MPDU_DELINK
  744. Field only valid when SW_exception is set.
  745. 1'b0: REO should NOT delink the MPDU, and thus pass this
  746. MPDU on to the destination ring as is. This implies that in
  747. the REO_DESTINATION_RING struct field
  748. Buf_or_link_desc_addr_info should point to an MSDU link
  749. descriptor
  750. 1'b1: REO should perform the normal MPDU delink into
  751. MSDU operations.
  752. Feature supported only in HastingsPrime
  753. <legal all>
  754. */
  755. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_MPDU_DELINK_OFFSET 0x00000018
  756. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_MPDU_DELINK_LSB 12
  757. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_MPDU_DELINK_MASK 0x00001000
  758. /* Description REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_VALID
  759. Field only valid when SW_exception is set.
  760. 1'b0: REO shall push the MPDU (or delinked MPDU based on
  761. the setting of SW_exception_mpdu_delink) to the destination
  762. ring according to field reo_destination_indication.
  763. 1'b1: REO shall push the MPDU (or delinked MPDU based on
  764. the setting of SW_exception_mpdu_delink) to the destination
  765. ring according to field SW_exception_destination_ring.
  766. Feature supported only in HastingsPrime
  767. <legal all>
  768. */
  769. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_VALID_OFFSET 0x00000018
  770. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_VALID_LSB 13
  771. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_VALID_MASK 0x00002000
  772. /* Description REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING
  773. Field only valid when fields SW_exception and
  774. SW_exception_destination_ring_valid are set.
  775. The ID of the ring where REO shall push this frame.
  776. <enum 0 reo_destination_tcl> Reo will push the frame
  777. into the REO2TCL ring
  778. <enum 1 reo_destination_sw1> Reo will push the frame
  779. into the REO2SW1 ring
  780. <enum 2 reo_destination_sw2> Reo will push the frame
  781. into the REO2SW1 ring
  782. <enum 3 reo_destination_sw3> Reo will push the frame
  783. into the REO2SW1 ring
  784. <enum 4 reo_destination_sw4> Reo will push the frame
  785. into the REO2SW1 ring
  786. <enum 5 reo_destination_release> Reo will push the frame
  787. into the REO_release ring
  788. <enum 6 reo_destination_fw> Reo will push the frame into
  789. the REO2FW ring
  790. <enum 7 reo_destination_sw5> REO remaps this
  791. <enum 8 reo_destination_sw6> REO remaps this
  792. <enum 9 reo_destination_9> REO remaps this
  793. <enum 10 reo_destination_10> REO remaps this
  794. <enum 11 reo_destination_11> REO remaps this
  795. <enum 12 reo_destination_12> REO remaps this <enum 13
  796. reo_destination_13> REO remaps this
  797. <enum 14 reo_destination_14> REO remaps this
  798. <enum 15 reo_destination_15> REO remaps this
  799. <enum 16 reo_destination_16> REO remaps this
  800. <enum 17 reo_destination_17> REO remaps this
  801. <enum 18 reo_destination_18> REO remaps this
  802. <enum 19 reo_destination_19> REO remaps this
  803. <enum 20 reo_destination_20> REO remaps this
  804. <enum 21 reo_destination_21> REO remaps this
  805. <enum 22 reo_destination_22> REO remaps this
  806. <enum 23 reo_destination_23> REO remaps this
  807. <enum 24 reo_destination_24> REO remaps this
  808. <enum 25 reo_destination_25> REO remaps this
  809. <enum 26 reo_destination_26> REO remaps this
  810. <enum 27 reo_destination_27> REO remaps this
  811. <enum 28 reo_destination_28> REO remaps this
  812. <enum 29 reo_destination_29> REO remaps this
  813. <enum 30 reo_destination_30> REO remaps this
  814. <enum 31 reo_destination_31> REO remaps this
  815. Feature supported only in HastingsPrime
  816. <legal all>
  817. */
  818. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_OFFSET 0x00000018
  819. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_LSB 14
  820. #define REO_ENTRANCE_RING_6_SW_EXCEPTION_DESTINATION_RING_MASK 0x0007c000
  821. /* Description REO_ENTRANCE_RING_6_RESERVED_6A
  822. <legal 0>
  823. */
  824. #define REO_ENTRANCE_RING_6_RESERVED_6A_OFFSET 0x00000018
  825. #define REO_ENTRANCE_RING_6_RESERVED_6A_LSB 19
  826. #define REO_ENTRANCE_RING_6_RESERVED_6A_MASK 0xfff80000
  827. /* Description REO_ENTRANCE_RING_7_RESERVED_7A
  828. <legal 0>
  829. */
  830. #define REO_ENTRANCE_RING_7_RESERVED_7A_OFFSET 0x0000001c
  831. #define REO_ENTRANCE_RING_7_RESERVED_7A_LSB 0
  832. #define REO_ENTRANCE_RING_7_RESERVED_7A_MASK 0x000fffff
  833. /* Description REO_ENTRANCE_RING_7_RING_ID
  834. Consumer: SW/REO/DEBUG
  835. Producer: SRNG (of RXDMA)
  836. For debugging.
  837. This field is filled in by the SRNG module.
  838. It help to identify the ring that is being looked <legal
  839. all>
  840. */
  841. #define REO_ENTRANCE_RING_7_RING_ID_OFFSET 0x0000001c
  842. #define REO_ENTRANCE_RING_7_RING_ID_LSB 20
  843. #define REO_ENTRANCE_RING_7_RING_ID_MASK 0x0ff00000
  844. /* Description REO_ENTRANCE_RING_7_LOOPING_COUNT
  845. Consumer: SW/REO/DEBUG
  846. Producer: SRNG (of RXDMA)
  847. For debugging.
  848. This field is filled in by the SRNG module.
  849. A count value that indicates the number of times the
  850. producer of entries into this Ring has looped around the
  851. ring.
  852. At initialization time, this value is set to 0. On the
  853. first loop, this value is set to 1. After the max value is
  854. reached allowed by the number of bits for this field, the
  855. count value continues with 0 again.
  856. In case SW is the consumer of the ring entries, it can
  857. use this field to figure out up to where the producer of
  858. entries has created new entries. This eliminates the need to
  859. check where the head pointer' of the ring is located once
  860. the SW starts processing an interrupt indicating that new
  861. entries have been put into this ring...
  862. Also note that SW if it wants only needs to look at the
  863. LSB bit of this count value.
  864. <legal all>
  865. */
  866. #define REO_ENTRANCE_RING_7_LOOPING_COUNT_OFFSET 0x0000001c
  867. #define REO_ENTRANCE_RING_7_LOOPING_COUNT_LSB 28
  868. #define REO_ENTRANCE_RING_7_LOOPING_COUNT_MASK 0xf0000000
  869. #endif // _REO_ENTRANCE_RING_H_