dsi_panel.c 108 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dsc_helper.h"
  15. #include "sde_vdc_helper.h"
  16. /**
  17. * topology is currently defined by a set of following 3 values:
  18. * 1. num of layer mixers
  19. * 2. num of compression encoders
  20. * 3. num of interfaces
  21. */
  22. #define TOPOLOGY_SET_LEN 3
  23. #define MAX_TOPOLOGY 5
  24. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  25. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  26. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  27. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  28. #define MAX_PANEL_JITTER 10
  29. #define DEFAULT_PANEL_PREFILL_LINES 25
  30. #define MIN_PREFILL_LINES 35
  31. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  32. {
  33. char *bp;
  34. bp = buf;
  35. /* First 7 bytes are cmd header */
  36. *bp++ = 0x0A;
  37. *bp++ = 1;
  38. *bp++ = 0;
  39. *bp++ = 0;
  40. *bp++ = pps_delay_ms;
  41. *bp++ = 0;
  42. *bp++ = 128;
  43. }
  44. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  45. char *buf, int pps_id, u32 size)
  46. {
  47. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  48. buf += DSI_CMD_PPS_HDR_SIZE;
  49. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  50. size);
  51. }
  52. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  53. char *buf, int pps_id, u32 size)
  54. {
  55. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  56. buf += DSI_CMD_PPS_HDR_SIZE;
  57. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  58. size);
  59. }
  60. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  61. {
  62. int rc = 0;
  63. int i;
  64. struct regulator *vreg = NULL;
  65. for (i = 0; i < panel->power_info.count; i++) {
  66. vreg = devm_regulator_get(panel->parent,
  67. panel->power_info.vregs[i].vreg_name);
  68. rc = PTR_RET(vreg);
  69. if (rc) {
  70. DSI_ERR("failed to get %s regulator\n",
  71. panel->power_info.vregs[i].vreg_name);
  72. goto error_put;
  73. }
  74. panel->power_info.vregs[i].vreg = vreg;
  75. }
  76. return rc;
  77. error_put:
  78. for (i = i - 1; i >= 0; i--) {
  79. devm_regulator_put(panel->power_info.vregs[i].vreg);
  80. panel->power_info.vregs[i].vreg = NULL;
  81. }
  82. return rc;
  83. }
  84. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  85. {
  86. int rc = 0;
  87. int i;
  88. for (i = panel->power_info.count - 1; i >= 0; i--)
  89. devm_regulator_put(panel->power_info.vregs[i].vreg);
  90. return rc;
  91. }
  92. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  93. {
  94. int rc = 0;
  95. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  96. if (gpio_is_valid(r_config->reset_gpio)) {
  97. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  98. if (rc) {
  99. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  100. goto error;
  101. }
  102. }
  103. if (gpio_is_valid(r_config->disp_en_gpio)) {
  104. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  105. if (rc) {
  106. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  107. goto error_release_reset;
  108. }
  109. }
  110. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  111. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  112. if (rc) {
  113. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  114. goto error_release_disp_en;
  115. }
  116. }
  117. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  118. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  119. if (rc) {
  120. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  121. goto error_release_mode_sel;
  122. }
  123. }
  124. if (gpio_is_valid(panel->panel_test_gpio)) {
  125. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  126. if (rc) {
  127. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  128. rc);
  129. panel->panel_test_gpio = -1;
  130. rc = 0;
  131. }
  132. }
  133. goto error;
  134. error_release_mode_sel:
  135. if (gpio_is_valid(panel->bl_config.en_gpio))
  136. gpio_free(panel->bl_config.en_gpio);
  137. error_release_disp_en:
  138. if (gpio_is_valid(r_config->disp_en_gpio))
  139. gpio_free(r_config->disp_en_gpio);
  140. error_release_reset:
  141. if (gpio_is_valid(r_config->reset_gpio))
  142. gpio_free(r_config->reset_gpio);
  143. error:
  144. return rc;
  145. }
  146. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  147. {
  148. int rc = 0;
  149. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  150. if (gpio_is_valid(r_config->reset_gpio))
  151. gpio_free(r_config->reset_gpio);
  152. if (gpio_is_valid(r_config->disp_en_gpio))
  153. gpio_free(r_config->disp_en_gpio);
  154. if (gpio_is_valid(panel->bl_config.en_gpio))
  155. gpio_free(panel->bl_config.en_gpio);
  156. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  157. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  158. if (gpio_is_valid(panel->panel_test_gpio))
  159. gpio_free(panel->panel_test_gpio);
  160. return rc;
  161. }
  162. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  163. {
  164. struct dsi_panel_reset_config *r_config;
  165. if (!panel) {
  166. DSI_ERR("Invalid panel param\n");
  167. return -EINVAL;
  168. }
  169. r_config = &panel->reset_config;
  170. if (!r_config) {
  171. DSI_ERR("Invalid panel reset configuration\n");
  172. return -EINVAL;
  173. }
  174. if (gpio_is_valid(r_config->reset_gpio)) {
  175. gpio_set_value(r_config->reset_gpio, 0);
  176. DSI_INFO("GPIO pulled low to simulate ESD\n");
  177. return 0;
  178. }
  179. DSI_ERR("failed to pull down gpio\n");
  180. return -EINVAL;
  181. }
  182. static int dsi_panel_reset(struct dsi_panel *panel)
  183. {
  184. int rc = 0;
  185. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  186. int i;
  187. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  188. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  189. if (rc) {
  190. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  191. goto exit;
  192. }
  193. }
  194. if (r_config->count) {
  195. rc = gpio_direction_output(r_config->reset_gpio,
  196. r_config->sequence[0].level);
  197. if (rc) {
  198. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  199. goto exit;
  200. }
  201. }
  202. for (i = 0; i < r_config->count; i++) {
  203. gpio_set_value(r_config->reset_gpio,
  204. r_config->sequence[i].level);
  205. if (r_config->sequence[i].sleep_ms)
  206. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  207. (r_config->sequence[i].sleep_ms * 1000) + 100);
  208. }
  209. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  210. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  211. if (rc)
  212. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  213. }
  214. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  215. bool out = true;
  216. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  217. || (panel->reset_config.mode_sel_state
  218. == MODE_GPIO_LOW))
  219. out = false;
  220. else if ((panel->reset_config.mode_sel_state
  221. == MODE_SEL_SINGLE_PORT) ||
  222. (panel->reset_config.mode_sel_state
  223. == MODE_GPIO_HIGH))
  224. out = true;
  225. rc = gpio_direction_output(
  226. panel->reset_config.lcd_mode_sel_gpio, out);
  227. if (rc)
  228. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  229. }
  230. if (gpio_is_valid(panel->panel_test_gpio)) {
  231. rc = gpio_direction_input(panel->panel_test_gpio);
  232. if (rc)
  233. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  234. rc);
  235. }
  236. exit:
  237. return rc;
  238. }
  239. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  240. {
  241. int rc = 0;
  242. struct pinctrl_state *state;
  243. if (panel->host_config.ext_bridge_mode)
  244. return 0;
  245. if (enable)
  246. state = panel->pinctrl.active;
  247. else
  248. state = panel->pinctrl.suspend;
  249. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  250. if (rc)
  251. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  252. panel->name, rc);
  253. return rc;
  254. }
  255. static int dsi_panel_power_on(struct dsi_panel *panel)
  256. {
  257. int rc = 0;
  258. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  259. if (rc) {
  260. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  261. panel->name, rc);
  262. goto exit;
  263. }
  264. rc = dsi_panel_set_pinctrl_state(panel, true);
  265. if (rc) {
  266. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  267. goto error_disable_vregs;
  268. }
  269. rc = dsi_panel_reset(panel);
  270. if (rc) {
  271. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  272. goto error_disable_gpio;
  273. }
  274. goto exit;
  275. error_disable_gpio:
  276. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  277. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  278. if (gpio_is_valid(panel->bl_config.en_gpio))
  279. gpio_set_value(panel->bl_config.en_gpio, 0);
  280. (void)dsi_panel_set_pinctrl_state(panel, false);
  281. error_disable_vregs:
  282. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  283. exit:
  284. return rc;
  285. }
  286. static int dsi_panel_power_off(struct dsi_panel *panel)
  287. {
  288. int rc = 0;
  289. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  290. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  291. if (gpio_is_valid(panel->reset_config.reset_gpio))
  292. gpio_set_value(panel->reset_config.reset_gpio, 0);
  293. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  294. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  295. if (gpio_is_valid(panel->panel_test_gpio)) {
  296. rc = gpio_direction_input(panel->panel_test_gpio);
  297. if (rc)
  298. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  299. rc);
  300. }
  301. rc = dsi_panel_set_pinctrl_state(panel, false);
  302. if (rc) {
  303. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  304. rc);
  305. }
  306. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  307. if (rc)
  308. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  309. panel->name, rc);
  310. return rc;
  311. }
  312. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  313. enum dsi_cmd_set_type type)
  314. {
  315. int rc = 0, i = 0;
  316. ssize_t len;
  317. struct dsi_cmd_desc *cmds;
  318. u32 count;
  319. enum dsi_cmd_set_state state;
  320. struct dsi_display_mode *mode;
  321. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  322. if (!panel || !panel->cur_mode)
  323. return -EINVAL;
  324. mode = panel->cur_mode;
  325. cmds = mode->priv_info->cmd_sets[type].cmds;
  326. count = mode->priv_info->cmd_sets[type].count;
  327. state = mode->priv_info->cmd_sets[type].state;
  328. if (count == 0) {
  329. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  330. panel->name, type);
  331. goto error;
  332. }
  333. for (i = 0; i < count; i++) {
  334. if (state == DSI_CMD_SET_STATE_LP)
  335. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  336. if (cmds->last_command)
  337. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  338. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  339. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  340. len = ops->transfer(panel->host, &cmds->msg);
  341. if (len < 0) {
  342. rc = len;
  343. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  344. goto error;
  345. }
  346. if (cmds->post_wait_ms)
  347. usleep_range(cmds->post_wait_ms*1000,
  348. ((cmds->post_wait_ms*1000)+10));
  349. cmds++;
  350. }
  351. error:
  352. return rc;
  353. }
  354. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  355. {
  356. int rc = 0;
  357. if (panel->host_config.ext_bridge_mode)
  358. return 0;
  359. devm_pinctrl_put(panel->pinctrl.pinctrl);
  360. return rc;
  361. }
  362. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  363. {
  364. int rc = 0;
  365. if (panel->host_config.ext_bridge_mode)
  366. return 0;
  367. /* TODO: pinctrl is defined in dsi dt node */
  368. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  369. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  370. rc = PTR_ERR(panel->pinctrl.pinctrl);
  371. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  372. goto error;
  373. }
  374. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  375. "panel_active");
  376. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  377. rc = PTR_ERR(panel->pinctrl.active);
  378. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  379. goto error;
  380. }
  381. panel->pinctrl.suspend =
  382. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  383. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  384. rc = PTR_ERR(panel->pinctrl.suspend);
  385. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  386. goto error;
  387. }
  388. error:
  389. return rc;
  390. }
  391. static int dsi_panel_wled_register(struct dsi_panel *panel,
  392. struct dsi_backlight_config *bl)
  393. {
  394. struct backlight_device *bd;
  395. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  396. if (!bd) {
  397. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  398. panel->name, -EPROBE_DEFER);
  399. return -EPROBE_DEFER;
  400. }
  401. bl->raw_bd = bd;
  402. return 0;
  403. }
  404. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  405. u32 bl_lvl)
  406. {
  407. int rc = 0;
  408. struct mipi_dsi_device *dsi;
  409. if (!panel || (bl_lvl > 0xffff)) {
  410. DSI_ERR("invalid params\n");
  411. return -EINVAL;
  412. }
  413. dsi = &panel->mipi_device;
  414. if (panel->bl_config.bl_inverted_dbv)
  415. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  416. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  417. if (rc < 0)
  418. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  419. return rc;
  420. }
  421. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  422. u32 bl_lvl)
  423. {
  424. int rc = 0;
  425. u32 duty = 0;
  426. u32 period_ns = 0;
  427. struct dsi_backlight_config *bl;
  428. if (!panel) {
  429. DSI_ERR("Invalid Params\n");
  430. return -EINVAL;
  431. }
  432. bl = &panel->bl_config;
  433. if (!bl->pwm_bl) {
  434. DSI_ERR("pwm device not found\n");
  435. return -EINVAL;
  436. }
  437. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  438. duty = bl_lvl * period_ns;
  439. duty /= bl->bl_max_level;
  440. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  441. if (rc) {
  442. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  443. rc);
  444. goto error;
  445. }
  446. if (bl_lvl == 0 && bl->pwm_enabled) {
  447. pwm_disable(bl->pwm_bl);
  448. bl->pwm_enabled = false;
  449. return 0;
  450. }
  451. if (!bl->pwm_enabled) {
  452. rc = pwm_enable(bl->pwm_bl);
  453. if (rc) {
  454. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  455. rc);
  456. goto error;
  457. }
  458. bl->pwm_enabled = true;
  459. }
  460. error:
  461. return rc;
  462. }
  463. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  464. {
  465. int rc = 0;
  466. struct dsi_backlight_config *bl = &panel->bl_config;
  467. if (panel->host_config.ext_bridge_mode)
  468. return 0;
  469. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  470. switch (bl->type) {
  471. case DSI_BACKLIGHT_WLED:
  472. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  473. break;
  474. case DSI_BACKLIGHT_DCS:
  475. rc = dsi_panel_update_backlight(panel, bl_lvl);
  476. break;
  477. case DSI_BACKLIGHT_EXTERNAL:
  478. break;
  479. case DSI_BACKLIGHT_PWM:
  480. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  481. break;
  482. default:
  483. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  484. rc = -ENOTSUPP;
  485. }
  486. return rc;
  487. }
  488. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  489. {
  490. u32 cur_bl_level;
  491. struct backlight_device *bd = bl->raw_bd;
  492. /* default the brightness level to 50% */
  493. cur_bl_level = bl->bl_max_level >> 1;
  494. switch (bl->type) {
  495. case DSI_BACKLIGHT_WLED:
  496. /* Try to query the backlight level from the backlight device */
  497. if (bd->ops && bd->ops->get_brightness)
  498. cur_bl_level = bd->ops->get_brightness(bd);
  499. break;
  500. case DSI_BACKLIGHT_DCS:
  501. case DSI_BACKLIGHT_EXTERNAL:
  502. case DSI_BACKLIGHT_PWM:
  503. default:
  504. /*
  505. * Ideally, we should read the backlight level from the
  506. * panel. For now, just set it default value.
  507. */
  508. break;
  509. }
  510. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  511. return cur_bl_level;
  512. }
  513. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  514. {
  515. struct dsi_backlight_config *bl = &panel->bl_config;
  516. bl->bl_level = dsi_panel_get_brightness(bl);
  517. }
  518. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  519. {
  520. int rc = 0;
  521. struct dsi_backlight_config *bl = &panel->bl_config;
  522. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  523. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  524. rc = PTR_ERR(bl->pwm_bl);
  525. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  526. rc);
  527. return rc;
  528. }
  529. return 0;
  530. }
  531. static int dsi_panel_bl_register(struct dsi_panel *panel)
  532. {
  533. int rc = 0;
  534. struct dsi_backlight_config *bl = &panel->bl_config;
  535. if (panel->host_config.ext_bridge_mode)
  536. return 0;
  537. switch (bl->type) {
  538. case DSI_BACKLIGHT_WLED:
  539. rc = dsi_panel_wled_register(panel, bl);
  540. break;
  541. case DSI_BACKLIGHT_DCS:
  542. break;
  543. case DSI_BACKLIGHT_EXTERNAL:
  544. break;
  545. case DSI_BACKLIGHT_PWM:
  546. rc = dsi_panel_pwm_register(panel);
  547. break;
  548. default:
  549. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  550. rc = -ENOTSUPP;
  551. goto error;
  552. }
  553. error:
  554. return rc;
  555. }
  556. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  557. {
  558. struct dsi_backlight_config *bl = &panel->bl_config;
  559. devm_pwm_put(panel->parent, bl->pwm_bl);
  560. }
  561. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  562. {
  563. int rc = 0;
  564. struct dsi_backlight_config *bl = &panel->bl_config;
  565. if (panel->host_config.ext_bridge_mode)
  566. return 0;
  567. switch (bl->type) {
  568. case DSI_BACKLIGHT_WLED:
  569. break;
  570. case DSI_BACKLIGHT_DCS:
  571. break;
  572. case DSI_BACKLIGHT_EXTERNAL:
  573. break;
  574. case DSI_BACKLIGHT_PWM:
  575. dsi_panel_pwm_unregister(panel);
  576. break;
  577. default:
  578. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  579. rc = -ENOTSUPP;
  580. goto error;
  581. }
  582. error:
  583. return rc;
  584. }
  585. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  586. struct dsi_parser_utils *utils)
  587. {
  588. int rc = 0;
  589. u64 tmp64 = 0;
  590. struct dsi_display_mode *display_mode;
  591. struct dsi_display_mode_priv_info *priv_info;
  592. display_mode = container_of(mode, struct dsi_display_mode, timing);
  593. priv_info = display_mode->priv_info;
  594. rc = utils->read_u64(utils->data,
  595. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  596. if (rc == -EOVERFLOW) {
  597. tmp64 = 0;
  598. rc = utils->read_u32(utils->data,
  599. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  600. }
  601. mode->clk_rate_hz = !rc ? tmp64 : 0;
  602. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  603. mode->pclk_scale.numer = 1;
  604. mode->pclk_scale.denom = 1;
  605. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  606. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  607. &mode->mdp_transfer_time_us);
  608. if (!rc)
  609. display_mode->priv_info->mdp_transfer_time_us =
  610. mode->mdp_transfer_time_us;
  611. else
  612. display_mode->priv_info->mdp_transfer_time_us = 0;
  613. rc = utils->read_u32(utils->data,
  614. "qcom,mdss-dsi-panel-framerate",
  615. &mode->refresh_rate);
  616. if (rc) {
  617. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  618. rc);
  619. goto error;
  620. }
  621. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  622. &mode->h_active);
  623. if (rc) {
  624. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  625. rc);
  626. goto error;
  627. }
  628. rc = utils->read_u32(utils->data,
  629. "qcom,mdss-dsi-h-front-porch",
  630. &mode->h_front_porch);
  631. if (rc) {
  632. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  633. rc);
  634. goto error;
  635. }
  636. rc = utils->read_u32(utils->data,
  637. "qcom,mdss-dsi-h-back-porch",
  638. &mode->h_back_porch);
  639. if (rc) {
  640. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  641. rc);
  642. goto error;
  643. }
  644. rc = utils->read_u32(utils->data,
  645. "qcom,mdss-dsi-h-pulse-width",
  646. &mode->h_sync_width);
  647. if (rc) {
  648. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  649. rc);
  650. goto error;
  651. }
  652. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  653. &mode->h_skew);
  654. if (rc)
  655. DSI_ERR("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  656. rc);
  657. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  658. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  659. mode->h_sync_width);
  660. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  661. &mode->v_active);
  662. if (rc) {
  663. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  664. rc);
  665. goto error;
  666. }
  667. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  668. &mode->v_back_porch);
  669. if (rc) {
  670. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  671. rc);
  672. goto error;
  673. }
  674. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  675. &mode->v_front_porch);
  676. if (rc) {
  677. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  678. rc);
  679. goto error;
  680. }
  681. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  682. &mode->v_sync_width);
  683. if (rc) {
  684. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  685. rc);
  686. goto error;
  687. }
  688. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  689. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  690. mode->v_sync_width);
  691. error:
  692. return rc;
  693. }
  694. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  695. struct dsi_parser_utils *utils,
  696. const char *name)
  697. {
  698. int rc = 0;
  699. u32 bpp = 0;
  700. enum dsi_pixel_format fmt;
  701. const char *packing;
  702. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  703. if (rc) {
  704. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  705. name, rc);
  706. return rc;
  707. }
  708. host->bpp = bpp;
  709. switch (bpp) {
  710. case 3:
  711. fmt = DSI_PIXEL_FORMAT_RGB111;
  712. break;
  713. case 8:
  714. fmt = DSI_PIXEL_FORMAT_RGB332;
  715. break;
  716. case 12:
  717. fmt = DSI_PIXEL_FORMAT_RGB444;
  718. break;
  719. case 16:
  720. fmt = DSI_PIXEL_FORMAT_RGB565;
  721. break;
  722. case 18:
  723. fmt = DSI_PIXEL_FORMAT_RGB666;
  724. break;
  725. case 24:
  726. default:
  727. fmt = DSI_PIXEL_FORMAT_RGB888;
  728. break;
  729. }
  730. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  731. packing = utils->get_property(utils->data,
  732. "qcom,mdss-dsi-pixel-packing",
  733. NULL);
  734. if (packing && !strcmp(packing, "loose"))
  735. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  736. }
  737. host->dst_format = fmt;
  738. return rc;
  739. }
  740. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  741. struct dsi_parser_utils *utils,
  742. const char *name)
  743. {
  744. int rc = 0;
  745. bool lane_enabled;
  746. u32 num_of_lanes = 0;
  747. lane_enabled = utils->read_bool(utils->data,
  748. "qcom,mdss-dsi-lane-0-state");
  749. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  750. lane_enabled = utils->read_bool(utils->data,
  751. "qcom,mdss-dsi-lane-1-state");
  752. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  753. lane_enabled = utils->read_bool(utils->data,
  754. "qcom,mdss-dsi-lane-2-state");
  755. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  756. lane_enabled = utils->read_bool(utils->data,
  757. "qcom,mdss-dsi-lane-3-state");
  758. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  759. if (host->data_lanes & DSI_DATA_LANE_0)
  760. num_of_lanes++;
  761. if (host->data_lanes & DSI_DATA_LANE_1)
  762. num_of_lanes++;
  763. if (host->data_lanes & DSI_DATA_LANE_2)
  764. num_of_lanes++;
  765. if (host->data_lanes & DSI_DATA_LANE_3)
  766. num_of_lanes++;
  767. host->num_data_lanes = num_of_lanes;
  768. if (host->data_lanes == 0) {
  769. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  770. rc = -EINVAL;
  771. }
  772. return rc;
  773. }
  774. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  775. struct dsi_parser_utils *utils,
  776. const char *name)
  777. {
  778. int rc = 0;
  779. const char *swap_mode;
  780. swap_mode = utils->get_property(utils->data,
  781. "qcom,mdss-dsi-color-order", NULL);
  782. if (swap_mode) {
  783. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  784. host->swap_mode = DSI_COLOR_SWAP_RGB;
  785. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  786. host->swap_mode = DSI_COLOR_SWAP_RBG;
  787. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  788. host->swap_mode = DSI_COLOR_SWAP_BRG;
  789. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  790. host->swap_mode = DSI_COLOR_SWAP_GRB;
  791. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  792. host->swap_mode = DSI_COLOR_SWAP_GBR;
  793. } else {
  794. DSI_ERR("[%s] Unrecognized color order-%s\n",
  795. name, swap_mode);
  796. rc = -EINVAL;
  797. }
  798. } else {
  799. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  800. host->swap_mode = DSI_COLOR_SWAP_RGB;
  801. }
  802. /* bit swap on color channel is not defined in dt */
  803. host->bit_swap_red = false;
  804. host->bit_swap_green = false;
  805. host->bit_swap_blue = false;
  806. return rc;
  807. }
  808. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  809. struct dsi_parser_utils *utils,
  810. const char *name)
  811. {
  812. const char *trig;
  813. int rc = 0;
  814. trig = utils->get_property(utils->data,
  815. "qcom,mdss-dsi-mdp-trigger", NULL);
  816. if (trig) {
  817. if (!strcmp(trig, "none")) {
  818. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  819. } else if (!strcmp(trig, "trigger_te")) {
  820. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  821. } else if (!strcmp(trig, "trigger_sw")) {
  822. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  823. } else if (!strcmp(trig, "trigger_sw_te")) {
  824. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  825. } else {
  826. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  827. name, trig);
  828. rc = -EINVAL;
  829. }
  830. } else {
  831. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  832. name);
  833. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  834. }
  835. trig = utils->get_property(utils->data,
  836. "qcom,mdss-dsi-dma-trigger", NULL);
  837. if (trig) {
  838. if (!strcmp(trig, "none")) {
  839. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  840. } else if (!strcmp(trig, "trigger_te")) {
  841. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  842. } else if (!strcmp(trig, "trigger_sw")) {
  843. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  844. } else if (!strcmp(trig, "trigger_sw_seof")) {
  845. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  846. } else if (!strcmp(trig, "trigger_sw_te")) {
  847. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  848. } else {
  849. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  850. name, trig);
  851. rc = -EINVAL;
  852. }
  853. } else {
  854. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  855. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  856. }
  857. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  858. &host->te_mode);
  859. if (rc) {
  860. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  861. host->te_mode = 1;
  862. rc = 0;
  863. }
  864. return rc;
  865. }
  866. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  867. struct dsi_parser_utils *utils,
  868. const char *name)
  869. {
  870. u32 val = 0;
  871. int rc = 0;
  872. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  873. if (!rc) {
  874. host->t_clk_post = val;
  875. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  876. }
  877. val = 0;
  878. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  879. if (!rc) {
  880. host->t_clk_pre = val;
  881. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  882. }
  883. host->ignore_rx_eot = utils->read_bool(utils->data,
  884. "qcom,mdss-dsi-rx-eot-ignore");
  885. host->append_tx_eot = utils->read_bool(utils->data,
  886. "qcom,mdss-dsi-tx-eot-append");
  887. host->ext_bridge_mode = utils->read_bool(utils->data,
  888. "qcom,mdss-dsi-ext-bridge-mode");
  889. host->force_hs_clk_lane = utils->read_bool(utils->data,
  890. "qcom,mdss-dsi-force-clock-lane-hs");
  891. return 0;
  892. }
  893. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  894. struct dsi_parser_utils *utils,
  895. const char *name)
  896. {
  897. int rc = 0;
  898. u32 val = 0;
  899. bool supported = false;
  900. struct dsi_split_link_config *split_link = &host->split_link;
  901. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  902. if (!supported) {
  903. DSI_DEBUG("[%s] Split link is not supported\n", name);
  904. split_link->split_link_enabled = false;
  905. return;
  906. }
  907. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  908. if (rc || val < 1) {
  909. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  910. split_link->num_sublinks = 2;
  911. } else {
  912. split_link->num_sublinks = val;
  913. }
  914. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  915. if (rc || val < 1) {
  916. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  917. split_link->lanes_per_sublink = 2;
  918. } else {
  919. split_link->lanes_per_sublink = val;
  920. }
  921. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  922. split_link->num_sublinks, split_link->lanes_per_sublink);
  923. split_link->split_link_enabled = true;
  924. }
  925. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  926. {
  927. int rc = 0;
  928. struct dsi_parser_utils *utils = &panel->utils;
  929. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  930. panel->name);
  931. if (rc) {
  932. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  933. panel->name, rc);
  934. goto error;
  935. }
  936. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  937. panel->name);
  938. if (rc) {
  939. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  940. panel->name, rc);
  941. goto error;
  942. }
  943. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  944. panel->name);
  945. if (rc) {
  946. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  947. panel->name, rc);
  948. goto error;
  949. }
  950. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  951. panel->name);
  952. if (rc) {
  953. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  954. panel->name, rc);
  955. goto error;
  956. }
  957. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  958. panel->name);
  959. if (rc) {
  960. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  961. panel->name, rc);
  962. goto error;
  963. }
  964. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  965. panel->name);
  966. error:
  967. return rc;
  968. }
  969. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  970. struct device_node *of_node)
  971. {
  972. int rc = 0;
  973. u32 val = 0;
  974. rc = of_property_read_u32(of_node,
  975. "qcom,mdss-dsi-qsync-min-refresh-rate",
  976. &val);
  977. if (rc)
  978. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  979. panel->name, rc);
  980. panel->qsync_min_fps = val;
  981. return rc;
  982. }
  983. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  984. {
  985. int rc = 0;
  986. bool supported = false;
  987. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  988. struct dsi_parser_utils *utils = &panel->utils;
  989. const char *name = panel->name;
  990. const char *type;
  991. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  992. if (!supported) {
  993. dyn_clk_caps->dyn_clk_support = false;
  994. return rc;
  995. }
  996. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  997. "qcom,dsi-dyn-clk-list");
  998. if (dyn_clk_caps->bit_clk_list_len < 1) {
  999. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1000. return -EINVAL;
  1001. }
  1002. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1003. sizeof(u32), GFP_KERNEL);
  1004. if (!dyn_clk_caps->bit_clk_list)
  1005. return -ENOMEM;
  1006. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1007. dyn_clk_caps->bit_clk_list,
  1008. dyn_clk_caps->bit_clk_list_len);
  1009. if (rc) {
  1010. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1011. return -EINVAL;
  1012. }
  1013. dyn_clk_caps->dyn_clk_support = true;
  1014. type = utils->get_property(utils->data,
  1015. "qcom,dsi-dyn-clk-type", NULL);
  1016. if (!type) {
  1017. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1018. dyn_clk_caps->maintain_const_fps = false;
  1019. return 0;
  1020. }
  1021. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1022. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1023. dyn_clk_caps->maintain_const_fps = true;
  1024. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1025. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1026. dyn_clk_caps->maintain_const_fps = true;
  1027. } else {
  1028. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1029. dyn_clk_caps->maintain_const_fps = false;
  1030. }
  1031. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1032. return 0;
  1033. }
  1034. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1035. {
  1036. int rc = 0;
  1037. bool supported = false;
  1038. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1039. struct dsi_parser_utils *utils = &panel->utils;
  1040. const char *name = panel->name;
  1041. const char *type;
  1042. u32 i;
  1043. supported = utils->read_bool(utils->data,
  1044. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1045. if (!supported) {
  1046. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1047. dfps_caps->dfps_support = false;
  1048. return rc;
  1049. }
  1050. type = utils->get_property(utils->data,
  1051. "qcom,mdss-dsi-pan-fps-update", NULL);
  1052. if (!type) {
  1053. DSI_ERR("[%s] dfps type not defined\n", name);
  1054. rc = -EINVAL;
  1055. goto error;
  1056. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1057. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1058. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1059. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1060. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1061. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1062. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1063. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1064. } else {
  1065. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1066. rc = -EINVAL;
  1067. goto error;
  1068. }
  1069. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1070. "qcom,dsi-supported-dfps-list");
  1071. if (dfps_caps->dfps_list_len < 1) {
  1072. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1073. rc = -EINVAL;
  1074. goto error;
  1075. }
  1076. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1077. GFP_KERNEL);
  1078. if (!dfps_caps->dfps_list) {
  1079. rc = -ENOMEM;
  1080. goto error;
  1081. }
  1082. rc = utils->read_u32_array(utils->data,
  1083. "qcom,dsi-supported-dfps-list",
  1084. dfps_caps->dfps_list,
  1085. dfps_caps->dfps_list_len);
  1086. if (rc) {
  1087. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1088. rc = -EINVAL;
  1089. goto error;
  1090. }
  1091. dfps_caps->dfps_support = true;
  1092. /* calculate max and min fps */
  1093. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1094. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1095. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1096. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1097. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1098. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1099. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1100. }
  1101. error:
  1102. return rc;
  1103. }
  1104. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1105. struct dsi_parser_utils *utils,
  1106. const char *name)
  1107. {
  1108. int rc = 0;
  1109. const char *traffic_mode;
  1110. u32 vc_id = 0;
  1111. u32 val = 0;
  1112. u32 line_no = 0;
  1113. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1114. if (rc) {
  1115. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1116. cfg->pulse_mode_hsa_he = false;
  1117. } else if (val == 1) {
  1118. cfg->pulse_mode_hsa_he = true;
  1119. } else if (val == 0) {
  1120. cfg->pulse_mode_hsa_he = false;
  1121. } else {
  1122. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1123. name);
  1124. rc = -EINVAL;
  1125. goto error;
  1126. }
  1127. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1128. "qcom,mdss-dsi-hfp-power-mode");
  1129. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1130. "qcom,mdss-dsi-hbp-power-mode");
  1131. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1132. "qcom,mdss-dsi-hsa-power-mode");
  1133. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1134. "qcom,mdss-dsi-last-line-interleave");
  1135. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1136. "qcom,mdss-dsi-bllp-eof-power-mode");
  1137. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1138. "qcom,mdss-dsi-bllp-power-mode");
  1139. traffic_mode = utils->get_property(utils->data,
  1140. "qcom,mdss-dsi-traffic-mode",
  1141. NULL);
  1142. if (!traffic_mode) {
  1143. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1144. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1145. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1146. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1147. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1148. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1149. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1150. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1151. } else {
  1152. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1153. traffic_mode);
  1154. rc = -EINVAL;
  1155. goto error;
  1156. }
  1157. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1158. &vc_id);
  1159. if (rc) {
  1160. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1161. cfg->vc_id = 0;
  1162. } else {
  1163. cfg->vc_id = vc_id;
  1164. }
  1165. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1166. &line_no);
  1167. if (rc) {
  1168. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1169. cfg->dma_sched_line = 0x1;
  1170. /* do not fail since we have default value */
  1171. rc = 0;
  1172. } else {
  1173. cfg->dma_sched_line = line_no;
  1174. }
  1175. error:
  1176. return rc;
  1177. }
  1178. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1179. struct dsi_parser_utils *utils,
  1180. const char *name)
  1181. {
  1182. u32 val = 0;
  1183. int rc = 0;
  1184. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1185. if (rc) {
  1186. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1187. cfg->wr_mem_start = 0x2C;
  1188. } else {
  1189. cfg->wr_mem_start = val;
  1190. }
  1191. val = 0;
  1192. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1193. &val);
  1194. if (rc) {
  1195. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1196. cfg->wr_mem_continue = 0x3C;
  1197. } else {
  1198. cfg->wr_mem_continue = val;
  1199. }
  1200. /* TODO: fix following */
  1201. cfg->max_cmd_packets_interleave = 0;
  1202. val = 0;
  1203. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1204. &val);
  1205. if (rc) {
  1206. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1207. cfg->insert_dcs_command = true;
  1208. } else if (val == 1) {
  1209. cfg->insert_dcs_command = true;
  1210. } else if (val == 0) {
  1211. cfg->insert_dcs_command = false;
  1212. } else {
  1213. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1214. name);
  1215. rc = -EINVAL;
  1216. goto error;
  1217. }
  1218. error:
  1219. return rc;
  1220. }
  1221. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1222. {
  1223. int rc = 0;
  1224. struct dsi_parser_utils *utils = &panel->utils;
  1225. bool panel_mode_switch_enabled;
  1226. enum dsi_op_mode panel_mode;
  1227. const char *mode;
  1228. mode = utils->get_property(utils->data,
  1229. "qcom,mdss-dsi-panel-type", NULL);
  1230. if (!mode) {
  1231. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1232. panel_mode = DSI_OP_VIDEO_MODE;
  1233. } else if (!strcmp(mode, "dsi_video_mode")) {
  1234. panel_mode = DSI_OP_VIDEO_MODE;
  1235. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1236. panel_mode = DSI_OP_CMD_MODE;
  1237. } else {
  1238. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1239. rc = -EINVAL;
  1240. goto error;
  1241. }
  1242. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1243. "qcom,mdss-dsi-panel-mode-switch");
  1244. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1245. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1246. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1247. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1248. utils,
  1249. panel->name);
  1250. if (rc) {
  1251. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1252. panel->name, rc);
  1253. goto error;
  1254. }
  1255. }
  1256. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1257. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1258. utils,
  1259. panel->name);
  1260. if (rc) {
  1261. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1262. panel->name, rc);
  1263. goto error;
  1264. }
  1265. }
  1266. panel->poms_align_vsync = utils->read_bool(utils->data,
  1267. "qcom,poms-align-panel-vsync");
  1268. panel->panel_mode = panel_mode;
  1269. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1270. error:
  1271. return rc;
  1272. }
  1273. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1274. {
  1275. int rc = 0;
  1276. u32 val = 0;
  1277. const char *str;
  1278. struct dsi_panel_phy_props *props = &panel->phy_props;
  1279. struct dsi_parser_utils *utils = &panel->utils;
  1280. const char *name = panel->name;
  1281. rc = utils->read_u32(utils->data,
  1282. "qcom,mdss-pan-physical-width-dimension", &val);
  1283. if (rc) {
  1284. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1285. props->panel_width_mm = 0;
  1286. rc = 0;
  1287. } else {
  1288. props->panel_width_mm = val;
  1289. }
  1290. rc = utils->read_u32(utils->data,
  1291. "qcom,mdss-pan-physical-height-dimension",
  1292. &val);
  1293. if (rc) {
  1294. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1295. props->panel_height_mm = 0;
  1296. rc = 0;
  1297. } else {
  1298. props->panel_height_mm = val;
  1299. }
  1300. str = utils->get_property(utils->data,
  1301. "qcom,mdss-dsi-panel-orientation", NULL);
  1302. if (!str) {
  1303. props->rotation = DSI_PANEL_ROTATE_NONE;
  1304. } else if (!strcmp(str, "180")) {
  1305. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1306. } else if (!strcmp(str, "hflip")) {
  1307. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1308. } else if (!strcmp(str, "vflip")) {
  1309. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1310. } else {
  1311. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1312. rc = -EINVAL;
  1313. goto error;
  1314. }
  1315. error:
  1316. return rc;
  1317. }
  1318. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1319. "qcom,mdss-dsi-pre-on-command",
  1320. "qcom,mdss-dsi-on-command",
  1321. "qcom,mdss-dsi-post-panel-on-command",
  1322. "qcom,mdss-dsi-pre-off-command",
  1323. "qcom,mdss-dsi-off-command",
  1324. "qcom,mdss-dsi-post-off-command",
  1325. "qcom,mdss-dsi-pre-res-switch",
  1326. "qcom,mdss-dsi-res-switch",
  1327. "qcom,mdss-dsi-post-res-switch",
  1328. "qcom,cmd-to-video-mode-switch-commands",
  1329. "qcom,cmd-to-video-mode-post-switch-commands",
  1330. "qcom,video-to-cmd-mode-switch-commands",
  1331. "qcom,video-to-cmd-mode-post-switch-commands",
  1332. "qcom,mdss-dsi-panel-status-command",
  1333. "qcom,mdss-dsi-lp1-command",
  1334. "qcom,mdss-dsi-lp2-command",
  1335. "qcom,mdss-dsi-nolp-command",
  1336. "PPS not parsed from DTSI, generated dynamically",
  1337. "ROI not parsed from DTSI, generated dynamically",
  1338. "qcom,mdss-dsi-timing-switch-command",
  1339. "qcom,mdss-dsi-post-mode-switch-on-command",
  1340. "qcom,mdss-dsi-qsync-on-commands",
  1341. "qcom,mdss-dsi-qsync-off-commands",
  1342. };
  1343. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1344. "qcom,mdss-dsi-pre-on-command-state",
  1345. "qcom,mdss-dsi-on-command-state",
  1346. "qcom,mdss-dsi-post-on-command-state",
  1347. "qcom,mdss-dsi-pre-off-command-state",
  1348. "qcom,mdss-dsi-off-command-state",
  1349. "qcom,mdss-dsi-post-off-command-state",
  1350. "qcom,mdss-dsi-pre-res-switch-state",
  1351. "qcom,mdss-dsi-res-switch-state",
  1352. "qcom,mdss-dsi-post-res-switch-state",
  1353. "qcom,cmd-to-video-mode-switch-commands-state",
  1354. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1355. "qcom,video-to-cmd-mode-switch-commands-state",
  1356. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1357. "qcom,mdss-dsi-panel-status-command-state",
  1358. "qcom,mdss-dsi-lp1-command-state",
  1359. "qcom,mdss-dsi-lp2-command-state",
  1360. "qcom,mdss-dsi-nolp-command-state",
  1361. "PPS not parsed from DTSI, generated dynamically",
  1362. "ROI not parsed from DTSI, generated dynamically",
  1363. "qcom,mdss-dsi-timing-switch-command-state",
  1364. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1365. "qcom,mdss-dsi-qsync-on-commands-state",
  1366. "qcom,mdss-dsi-qsync-off-commands-state",
  1367. };
  1368. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1369. {
  1370. const u32 cmd_set_min_size = 7;
  1371. u32 count = 0;
  1372. u32 packet_length;
  1373. u32 tmp;
  1374. while (length >= cmd_set_min_size) {
  1375. packet_length = cmd_set_min_size;
  1376. tmp = ((data[5] << 8) | (data[6]));
  1377. packet_length += tmp;
  1378. if (packet_length > length) {
  1379. DSI_ERR("format error\n");
  1380. return -EINVAL;
  1381. }
  1382. length -= packet_length;
  1383. data += packet_length;
  1384. count++;
  1385. }
  1386. *cnt = count;
  1387. return 0;
  1388. }
  1389. static int dsi_panel_create_cmd_packets(const char *data,
  1390. u32 length,
  1391. u32 count,
  1392. struct dsi_cmd_desc *cmd)
  1393. {
  1394. int rc = 0;
  1395. int i, j;
  1396. u8 *payload;
  1397. for (i = 0; i < count; i++) {
  1398. u32 size;
  1399. cmd[i].msg.type = data[0];
  1400. cmd[i].last_command = (data[1] == 1);
  1401. cmd[i].msg.channel = data[2];
  1402. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1403. cmd[i].msg.ctrl = 0;
  1404. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1405. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1406. size = cmd[i].msg.tx_len * sizeof(u8);
  1407. payload = kzalloc(size, GFP_KERNEL);
  1408. if (!payload) {
  1409. rc = -ENOMEM;
  1410. goto error_free_payloads;
  1411. }
  1412. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1413. payload[j] = data[7 + j];
  1414. cmd[i].msg.tx_buf = payload;
  1415. data += (7 + cmd[i].msg.tx_len);
  1416. }
  1417. return rc;
  1418. error_free_payloads:
  1419. for (i = i - 1; i >= 0; i--) {
  1420. cmd--;
  1421. kfree(cmd->msg.tx_buf);
  1422. }
  1423. return rc;
  1424. }
  1425. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1426. {
  1427. u32 i = 0;
  1428. struct dsi_cmd_desc *cmd;
  1429. for (i = 0; i < set->count; i++) {
  1430. cmd = &set->cmds[i];
  1431. kfree(cmd->msg.tx_buf);
  1432. }
  1433. }
  1434. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1435. {
  1436. kfree(set->cmds);
  1437. }
  1438. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1439. u32 packet_count)
  1440. {
  1441. u32 size;
  1442. size = packet_count * sizeof(*cmd->cmds);
  1443. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1444. if (!cmd->cmds)
  1445. return -ENOMEM;
  1446. cmd->count = packet_count;
  1447. return 0;
  1448. }
  1449. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1450. enum dsi_cmd_set_type type,
  1451. struct dsi_parser_utils *utils)
  1452. {
  1453. int rc = 0;
  1454. u32 length = 0;
  1455. const char *data;
  1456. const char *state;
  1457. u32 packet_count = 0;
  1458. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1459. &length);
  1460. if (!data) {
  1461. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1462. rc = -ENOTSUPP;
  1463. goto error;
  1464. }
  1465. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1466. cmd_set_prop_map[type], length);
  1467. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1468. 8, 1, data, length, false);
  1469. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1470. if (rc) {
  1471. DSI_ERR("commands failed, rc=%d\n", rc);
  1472. goto error;
  1473. }
  1474. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1475. packet_count, length);
  1476. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1477. if (rc) {
  1478. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1479. goto error;
  1480. }
  1481. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1482. cmd->cmds);
  1483. if (rc) {
  1484. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1485. goto error_free_mem;
  1486. }
  1487. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1488. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1489. cmd->state = DSI_CMD_SET_STATE_LP;
  1490. } else if (!strcmp(state, "dsi_hs_mode")) {
  1491. cmd->state = DSI_CMD_SET_STATE_HS;
  1492. } else {
  1493. DSI_ERR("[%s] command state unrecognized-%s\n",
  1494. cmd_set_state_map[type], state);
  1495. goto error_free_mem;
  1496. }
  1497. return rc;
  1498. error_free_mem:
  1499. kfree(cmd->cmds);
  1500. cmd->cmds = NULL;
  1501. error:
  1502. return rc;
  1503. }
  1504. static int dsi_panel_parse_cmd_sets(
  1505. struct dsi_display_mode_priv_info *priv_info,
  1506. struct dsi_parser_utils *utils)
  1507. {
  1508. int rc = 0;
  1509. struct dsi_panel_cmd_set *set;
  1510. u32 i;
  1511. if (!priv_info) {
  1512. DSI_ERR("invalid mode priv info\n");
  1513. return -EINVAL;
  1514. }
  1515. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1516. set = &priv_info->cmd_sets[i];
  1517. set->type = i;
  1518. set->count = 0;
  1519. if (i == DSI_CMD_SET_PPS) {
  1520. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1521. if (rc)
  1522. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1523. i, rc);
  1524. set->state = DSI_CMD_SET_STATE_LP;
  1525. } else {
  1526. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1527. if (rc)
  1528. DSI_DEBUG("failed to parse set %d\n", i);
  1529. }
  1530. }
  1531. rc = 0;
  1532. return rc;
  1533. }
  1534. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1535. {
  1536. int rc = 0;
  1537. int i;
  1538. u32 length = 0;
  1539. u32 count = 0;
  1540. u32 size = 0;
  1541. u32 *arr_32 = NULL;
  1542. const u32 *arr;
  1543. struct dsi_parser_utils *utils = &panel->utils;
  1544. struct dsi_reset_seq *seq;
  1545. if (panel->host_config.ext_bridge_mode)
  1546. return 0;
  1547. arr = utils->get_property(utils->data,
  1548. "qcom,mdss-dsi-reset-sequence", &length);
  1549. if (!arr) {
  1550. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1551. rc = -EINVAL;
  1552. goto error;
  1553. }
  1554. if (length & 0x1) {
  1555. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1556. panel->name);
  1557. rc = -EINVAL;
  1558. goto error;
  1559. }
  1560. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1561. length = length / sizeof(u32);
  1562. size = length * sizeof(u32);
  1563. arr_32 = kzalloc(size, GFP_KERNEL);
  1564. if (!arr_32) {
  1565. rc = -ENOMEM;
  1566. goto error;
  1567. }
  1568. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1569. arr_32, length);
  1570. if (rc) {
  1571. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1572. goto error_free_arr_32;
  1573. }
  1574. count = length / 2;
  1575. size = count * sizeof(*seq);
  1576. seq = kzalloc(size, GFP_KERNEL);
  1577. if (!seq) {
  1578. rc = -ENOMEM;
  1579. goto error_free_arr_32;
  1580. }
  1581. panel->reset_config.sequence = seq;
  1582. panel->reset_config.count = count;
  1583. for (i = 0; i < length; i += 2) {
  1584. seq->level = arr_32[i];
  1585. seq->sleep_ms = arr_32[i + 1];
  1586. seq++;
  1587. }
  1588. error_free_arr_32:
  1589. kfree(arr_32);
  1590. error:
  1591. return rc;
  1592. }
  1593. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1594. {
  1595. struct dsi_parser_utils *utils = &panel->utils;
  1596. const char *string;
  1597. int i, rc = 0;
  1598. panel->ulps_feature_enabled =
  1599. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1600. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1601. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1602. panel->ulps_suspend_enabled =
  1603. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1604. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1605. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1606. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1607. "qcom,mdss-dsi-te-using-wd");
  1608. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1609. "qcom,cmd-sync-wait-broadcast");
  1610. panel->lp11_init = utils->read_bool(utils->data,
  1611. "qcom,mdss-dsi-lp11-init");
  1612. panel->spr_info.enable = false;
  1613. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1614. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1615. if (!rc) {
  1616. // find match for pack-type string
  1617. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1618. if (msm_spr_pack_type_str[i] &&
  1619. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1620. panel->spr_info.enable = true;
  1621. panel->spr_info.pack_type = i;
  1622. break;
  1623. }
  1624. }
  1625. }
  1626. pr_debug("%s source side spr packing, pack-type %s\n",
  1627. panel->spr_info.enable ? "enable" : "disable",
  1628. panel->spr_info.enable ?
  1629. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1630. return 0;
  1631. }
  1632. static int dsi_panel_parse_jitter_config(
  1633. struct dsi_display_mode *mode,
  1634. struct dsi_parser_utils *utils)
  1635. {
  1636. int rc;
  1637. struct dsi_display_mode_priv_info *priv_info;
  1638. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1639. u64 jitter_val = 0;
  1640. priv_info = mode->priv_info;
  1641. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1642. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1643. if (rc) {
  1644. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1645. } else {
  1646. jitter_val = jitter[0];
  1647. jitter_val = div_u64(jitter_val, jitter[1]);
  1648. }
  1649. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1650. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1651. priv_info->panel_jitter_denom =
  1652. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1653. } else {
  1654. priv_info->panel_jitter_numer = jitter[0];
  1655. priv_info->panel_jitter_denom = jitter[1];
  1656. }
  1657. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1658. &priv_info->panel_prefill_lines);
  1659. if (rc) {
  1660. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1661. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1662. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1663. } else if (priv_info->panel_prefill_lines >=
  1664. DSI_V_TOTAL(&mode->timing)) {
  1665. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1666. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1667. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1668. }
  1669. return 0;
  1670. }
  1671. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1672. {
  1673. int rc = 0;
  1674. char *supply_name;
  1675. if (panel->host_config.ext_bridge_mode)
  1676. return 0;
  1677. if (!strcmp(panel->type, "primary"))
  1678. supply_name = "qcom,panel-supply-entries";
  1679. else
  1680. supply_name = "qcom,panel-sec-supply-entries";
  1681. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1682. &panel->power_info, supply_name);
  1683. if (rc) {
  1684. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1685. goto error;
  1686. }
  1687. error:
  1688. return rc;
  1689. }
  1690. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1691. {
  1692. int rc = 0;
  1693. const char *data;
  1694. struct dsi_parser_utils *utils = &panel->utils;
  1695. char *reset_gpio_name, *mode_set_gpio_name;
  1696. if (!strcmp(panel->type, "primary")) {
  1697. reset_gpio_name = "qcom,platform-reset-gpio";
  1698. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1699. } else {
  1700. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1701. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1702. }
  1703. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1704. reset_gpio_name, 0);
  1705. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1706. !panel->host_config.ext_bridge_mode) {
  1707. rc = panel->reset_config.reset_gpio;
  1708. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1709. goto error;
  1710. }
  1711. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1712. "qcom,5v-boost-gpio",
  1713. 0);
  1714. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1715. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1716. panel->name, rc);
  1717. panel->reset_config.disp_en_gpio =
  1718. utils->get_named_gpio(utils->data,
  1719. "qcom,platform-en-gpio", 0);
  1720. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1721. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1722. panel->name, rc);
  1723. }
  1724. }
  1725. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1726. utils->data, mode_set_gpio_name, 0);
  1727. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1728. DSI_DEBUG("mode gpio not specified\n");
  1729. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1730. data = utils->get_property(utils->data,
  1731. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1732. if (data) {
  1733. if (!strcmp(data, "single_port"))
  1734. panel->reset_config.mode_sel_state =
  1735. MODE_SEL_SINGLE_PORT;
  1736. else if (!strcmp(data, "dual_port"))
  1737. panel->reset_config.mode_sel_state =
  1738. MODE_SEL_DUAL_PORT;
  1739. else if (!strcmp(data, "high"))
  1740. panel->reset_config.mode_sel_state =
  1741. MODE_GPIO_HIGH;
  1742. else if (!strcmp(data, "low"))
  1743. panel->reset_config.mode_sel_state =
  1744. MODE_GPIO_LOW;
  1745. } else {
  1746. /* Set default mode as SPLIT mode */
  1747. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1748. }
  1749. /* TODO: release memory */
  1750. rc = dsi_panel_parse_reset_sequence(panel);
  1751. if (rc) {
  1752. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1753. panel->name, rc);
  1754. goto error;
  1755. }
  1756. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1757. "qcom,mdss-dsi-panel-test-pin",
  1758. 0);
  1759. if (!gpio_is_valid(panel->panel_test_gpio))
  1760. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1761. __LINE__);
  1762. error:
  1763. return rc;
  1764. }
  1765. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1766. {
  1767. int rc = 0;
  1768. u32 val;
  1769. struct dsi_backlight_config *config = &panel->bl_config;
  1770. struct dsi_parser_utils *utils = &panel->utils;
  1771. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1772. &val);
  1773. if (rc) {
  1774. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1775. goto error;
  1776. }
  1777. config->pwm_period_usecs = val;
  1778. error:
  1779. return rc;
  1780. }
  1781. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1782. {
  1783. int rc = 0;
  1784. u32 val = 0;
  1785. const char *bl_type;
  1786. const char *data;
  1787. struct dsi_parser_utils *utils = &panel->utils;
  1788. char *bl_name;
  1789. if (!strcmp(panel->type, "primary"))
  1790. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1791. else
  1792. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1793. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1794. if (!bl_type) {
  1795. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1796. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1797. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1798. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1799. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1800. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1801. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1802. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1803. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1804. } else {
  1805. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1806. panel->name, bl_type);
  1807. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1808. }
  1809. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1810. if (!data) {
  1811. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1812. } else if (!strcmp(data, "delay_until_first_frame")) {
  1813. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1814. } else {
  1815. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1816. panel->name, data);
  1817. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1818. }
  1819. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1820. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1821. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1822. if (rc) {
  1823. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1824. panel->name);
  1825. panel->bl_config.bl_min_level = 0;
  1826. } else {
  1827. panel->bl_config.bl_min_level = val;
  1828. }
  1829. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1830. if (rc) {
  1831. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1832. panel->name);
  1833. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1834. } else {
  1835. panel->bl_config.bl_max_level = val;
  1836. }
  1837. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1838. &val);
  1839. if (rc) {
  1840. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1841. panel->name);
  1842. panel->bl_config.brightness_max_level = 255;
  1843. } else {
  1844. panel->bl_config.brightness_max_level = val;
  1845. }
  1846. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  1847. "qcom,mdss-dsi-bl-inverted-dbv");
  1848. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1849. rc = dsi_panel_parse_bl_pwm_config(panel);
  1850. if (rc) {
  1851. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1852. panel->name, rc);
  1853. goto error;
  1854. }
  1855. }
  1856. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1857. "qcom,platform-bklight-en-gpio",
  1858. 0);
  1859. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1860. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1861. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1862. panel->name, rc);
  1863. rc = -EPROBE_DEFER;
  1864. goto error;
  1865. } else {
  1866. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1867. panel->name, rc);
  1868. rc = 0;
  1869. goto error;
  1870. }
  1871. }
  1872. error:
  1873. return rc;
  1874. }
  1875. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1876. struct dsi_parser_utils *utils)
  1877. {
  1878. const char *data;
  1879. u32 len, i;
  1880. int rc = 0;
  1881. struct dsi_display_mode_priv_info *priv_info;
  1882. u64 pixel_clk_khz;
  1883. if (!mode || !mode->priv_info)
  1884. return -EINVAL;
  1885. priv_info = mode->priv_info;
  1886. data = utils->get_property(utils->data,
  1887. "qcom,mdss-dsi-panel-phy-timings", &len);
  1888. if (!data) {
  1889. DSI_DEBUG("Unable to read Phy timing settings\n");
  1890. } else {
  1891. priv_info->phy_timing_val =
  1892. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1893. if (!priv_info->phy_timing_val)
  1894. return -EINVAL;
  1895. for (i = 0; i < len; i++)
  1896. priv_info->phy_timing_val[i] = data[i];
  1897. priv_info->phy_timing_len = len;
  1898. }
  1899. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  1900. /*
  1901. * For command mode we update the pclk as part of
  1902. * function dsi_panel_calc_dsi_transfer_time( )
  1903. * as we set it based on dsi clock or mdp transfer time.
  1904. */
  1905. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  1906. DSI_V_TOTAL(&mode->timing) *
  1907. mode->timing.refresh_rate);
  1908. do_div(pixel_clk_khz, 1000);
  1909. mode->pixel_clk_khz = pixel_clk_khz;
  1910. }
  1911. return rc;
  1912. }
  1913. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1914. struct dsi_parser_utils *utils)
  1915. {
  1916. u32 data;
  1917. int rc = -EINVAL;
  1918. int intf_width;
  1919. const char *compression;
  1920. struct dsi_display_mode_priv_info *priv_info;
  1921. if (!mode || !mode->priv_info)
  1922. return -EINVAL;
  1923. priv_info = mode->priv_info;
  1924. priv_info->dsc_enabled = false;
  1925. compression = utils->get_property(utils->data,
  1926. "qcom,compression-mode", NULL);
  1927. if (compression && !strcmp(compression, "dsc"))
  1928. priv_info->dsc_enabled = true;
  1929. if (!priv_info->dsc_enabled) {
  1930. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  1931. return 0;
  1932. }
  1933. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  1934. if (rc) {
  1935. priv_info->dsc.config.dsc_version_major = 0x1;
  1936. priv_info->dsc.config.dsc_version_minor = 0x1;
  1937. rc = 0;
  1938. } else {
  1939. /* BITS[0..3] provides minor version and BITS[4..7] provide
  1940. * major version information
  1941. */
  1942. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  1943. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  1944. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  1945. ((priv_info->dsc.config.dsc_version_minor
  1946. != 0x1) ||
  1947. (priv_info->dsc.config.dsc_version_minor
  1948. != 0x2))) {
  1949. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  1950. __func__,
  1951. priv_info->dsc.config.dsc_version_major,
  1952. priv_info->dsc.config.dsc_version_minor
  1953. );
  1954. rc = -EINVAL;
  1955. goto error;
  1956. }
  1957. }
  1958. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  1959. if (rc) {
  1960. priv_info->dsc.scr_rev = 0x0;
  1961. rc = 0;
  1962. } else {
  1963. priv_info->dsc.scr_rev = data & 0xff;
  1964. /* only one scr rev supported */
  1965. if (priv_info->dsc.scr_rev > 0x1) {
  1966. DSI_ERR("%s: DSC scr version:%d not supported\n",
  1967. __func__, priv_info->dsc.scr_rev);
  1968. rc = -EINVAL;
  1969. goto error;
  1970. }
  1971. }
  1972. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  1973. if (rc) {
  1974. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  1975. goto error;
  1976. }
  1977. priv_info->dsc.config.slice_height = data;
  1978. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  1979. if (rc) {
  1980. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  1981. goto error;
  1982. }
  1983. priv_info->dsc.config.slice_width = data;
  1984. intf_width = mode->timing.h_active;
  1985. if (intf_width % priv_info->dsc.config.slice_width) {
  1986. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  1987. intf_width, priv_info->dsc.config.slice_width);
  1988. rc = -EINVAL;
  1989. goto error;
  1990. }
  1991. priv_info->dsc.config.pic_width = mode->timing.h_active;
  1992. priv_info->dsc.config.pic_height = mode->timing.v_active;
  1993. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  1994. if (rc) {
  1995. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  1996. goto error;
  1997. } else if (!data || (data > 2)) {
  1998. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  1999. goto error;
  2000. }
  2001. priv_info->dsc.slice_per_pkt = data;
  2002. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2003. &data);
  2004. if (rc) {
  2005. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2006. goto error;
  2007. }
  2008. priv_info->dsc.config.bits_per_component = data;
  2009. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2010. if (rc) {
  2011. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2012. data = 0;
  2013. }
  2014. priv_info->dsc.pps_delay_ms = data;
  2015. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2016. &data);
  2017. if (rc) {
  2018. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2019. goto error;
  2020. }
  2021. priv_info->dsc.config.bits_per_pixel = data << 4;
  2022. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2023. &data);
  2024. if (rc) {
  2025. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2026. rc = 0;
  2027. data = MSM_CHROMA_444;
  2028. }
  2029. priv_info->dsc.chroma_format = data;
  2030. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2031. &data);
  2032. if (rc) {
  2033. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2034. rc = 0;
  2035. data = MSM_RGB;
  2036. }
  2037. priv_info->dsc.source_color_space = data;
  2038. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2039. "qcom,mdss-dsc-block-prediction-enable");
  2040. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2041. priv_info->dsc.config.slice_width);
  2042. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2043. priv_info->dsc.scr_rev);
  2044. if (rc) {
  2045. DSI_DEBUG("failed populating dsc params \n");
  2046. rc = -EINVAL;
  2047. goto error;
  2048. }
  2049. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2050. if (rc) {
  2051. DSI_DEBUG("failed populating other dsc params \n");
  2052. rc = -EINVAL;
  2053. goto error;
  2054. }
  2055. priv_info->pclk_scale.numer =
  2056. priv_info->dsc.config.bits_per_pixel >> 4;
  2057. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2058. priv_info->dsc.chroma_format,
  2059. priv_info->dsc.config.bits_per_component);
  2060. mode->timing.dsc_enabled = true;
  2061. mode->timing.dsc = &priv_info->dsc;
  2062. mode->timing.pclk_scale = priv_info->pclk_scale;
  2063. error:
  2064. return rc;
  2065. }
  2066. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2067. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2068. {
  2069. u32 data;
  2070. int rc = -EINVAL;
  2071. const char *compression;
  2072. struct dsi_display_mode_priv_info *priv_info;
  2073. int intf_width;
  2074. if (!mode || !mode->priv_info)
  2075. return -EINVAL;
  2076. priv_info = mode->priv_info;
  2077. priv_info->vdc_enabled = false;
  2078. compression = utils->get_property(utils->data,
  2079. "qcom,compression-mode", NULL);
  2080. if (compression && !strcmp(compression, "vdc"))
  2081. priv_info->vdc_enabled = true;
  2082. if (!priv_info->vdc_enabled) {
  2083. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2084. return 0;
  2085. }
  2086. priv_info->vdc.panel_mode = panel_mode;
  2087. priv_info->vdc.traffic_mode = traffic_mode;
  2088. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2089. if (rc) {
  2090. priv_info->vdc.version_major = 0x1;
  2091. priv_info->vdc.version_minor = 0x2;
  2092. priv_info->vdc.version_release = 0x0;
  2093. rc = 0;
  2094. } else {
  2095. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2096. * major version information
  2097. */
  2098. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2099. priv_info->vdc.version_minor = data & 0x0F;
  2100. if ((priv_info->vdc.version_major != 0x1) &&
  2101. ((priv_info->vdc.version_minor
  2102. != 0x2))) {
  2103. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2104. __func__,
  2105. priv_info->vdc.version_major,
  2106. priv_info->vdc.version_minor
  2107. );
  2108. rc = -EINVAL;
  2109. goto error;
  2110. }
  2111. }
  2112. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2113. if (rc) {
  2114. priv_info->vdc.version_release = 0x0;
  2115. rc = 0;
  2116. } else {
  2117. priv_info->vdc.version_release = data & 0xff;
  2118. /* only one release version is supported */
  2119. if (priv_info->vdc.version_release != 0x0) {
  2120. DSI_ERR("unsupported vdc release version %d\n",
  2121. priv_info->vdc.version_release);
  2122. rc = -EINVAL;
  2123. goto error;
  2124. }
  2125. }
  2126. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2127. priv_info->vdc.version_major,
  2128. priv_info->vdc.version_minor,
  2129. priv_info->vdc.version_release);
  2130. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2131. if (rc) {
  2132. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2133. goto error;
  2134. }
  2135. priv_info->vdc.slice_height = data;
  2136. /* slice height should be atleast 16 lines */
  2137. if (priv_info->vdc.slice_height < 16) {
  2138. DSI_ERR("invalid slice height %d\n",
  2139. priv_info->vdc.slice_height);
  2140. rc = -EINVAL;
  2141. goto error;
  2142. }
  2143. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2144. if (rc) {
  2145. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2146. goto error;
  2147. }
  2148. priv_info->vdc.slice_width = data;
  2149. /*
  2150. * slide-width should be multiple of 8
  2151. * slice-width should be atlease 64 pixels
  2152. */
  2153. if ((priv_info->vdc.slice_width & 7) ||
  2154. (priv_info->vdc.slice_width < 64)) {
  2155. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2156. rc = -EINVAL;
  2157. goto error;
  2158. }
  2159. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2160. if (rc) {
  2161. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2162. goto error;
  2163. } else if (!data || (data > 2)) {
  2164. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2165. rc = -EINVAL;
  2166. goto error;
  2167. }
  2168. intf_width = mode->timing.h_active;
  2169. priv_info->vdc.slice_per_pkt = data;
  2170. priv_info->vdc.frame_width = mode->timing.h_active;
  2171. priv_info->vdc.frame_height = mode->timing.v_active;
  2172. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2173. &data);
  2174. if (rc) {
  2175. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2176. goto error;
  2177. }
  2178. priv_info->vdc.bits_per_component = data;
  2179. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2180. if (rc) {
  2181. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2182. data = 0;
  2183. }
  2184. priv_info->vdc.pps_delay_ms = data;
  2185. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2186. &data);
  2187. if (rc) {
  2188. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2189. goto error;
  2190. }
  2191. priv_info->vdc.bits_per_pixel = data << 4;
  2192. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2193. &data);
  2194. if (rc) {
  2195. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2196. rc = 0;
  2197. data = MSM_CHROMA_444;
  2198. }
  2199. priv_info->vdc.chroma_format = data;
  2200. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2201. &data);
  2202. if (rc) {
  2203. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2204. rc = 0;
  2205. data = MSM_RGB;
  2206. }
  2207. priv_info->vdc.source_color_space = data;
  2208. rc = sde_vdc_populate_config(&priv_info->vdc,
  2209. intf_width, traffic_mode);
  2210. if (rc) {
  2211. DSI_DEBUG("failed populating vdc config\n");
  2212. rc = -EINVAL;
  2213. goto error;
  2214. }
  2215. priv_info->pclk_scale.numer =
  2216. priv_info->vdc.bits_per_pixel >> 4;
  2217. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2218. priv_info->vdc.chroma_format,
  2219. priv_info->vdc.bits_per_component);
  2220. mode->timing.vdc_enabled = true;
  2221. mode->timing.vdc = &priv_info->vdc;
  2222. mode->timing.pclk_scale = priv_info->pclk_scale;
  2223. error:
  2224. return rc;
  2225. }
  2226. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2227. {
  2228. int rc = 0;
  2229. struct drm_panel_hdr_properties *hdr_prop;
  2230. struct dsi_parser_utils *utils = &panel->utils;
  2231. hdr_prop = &panel->hdr_props;
  2232. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2233. "qcom,mdss-dsi-panel-hdr-enabled");
  2234. if (hdr_prop->hdr_enabled) {
  2235. rc = utils->read_u32_array(utils->data,
  2236. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2237. hdr_prop->display_primaries,
  2238. DISPLAY_PRIMARIES_MAX);
  2239. if (rc) {
  2240. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2241. __func__, __LINE__, rc);
  2242. hdr_prop->hdr_enabled = false;
  2243. return rc;
  2244. }
  2245. rc = utils->read_u32(utils->data,
  2246. "qcom,mdss-dsi-panel-peak-brightness",
  2247. &(hdr_prop->peak_brightness));
  2248. if (rc) {
  2249. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2250. __func__, __LINE__, rc);
  2251. hdr_prop->hdr_enabled = false;
  2252. return rc;
  2253. }
  2254. rc = utils->read_u32(utils->data,
  2255. "qcom,mdss-dsi-panel-blackness-level",
  2256. &(hdr_prop->blackness_level));
  2257. if (rc) {
  2258. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2259. __func__, __LINE__, rc);
  2260. hdr_prop->hdr_enabled = false;
  2261. return rc;
  2262. }
  2263. }
  2264. return 0;
  2265. }
  2266. static int dsi_panel_parse_topology(
  2267. struct dsi_display_mode_priv_info *priv_info,
  2268. struct dsi_parser_utils *utils,
  2269. int topology_override)
  2270. {
  2271. struct msm_display_topology *topology;
  2272. u32 top_count, top_sel, *array = NULL;
  2273. int i, len = 0;
  2274. int rc = -EINVAL;
  2275. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2276. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2277. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2278. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2279. return rc;
  2280. }
  2281. top_count = len / TOPOLOGY_SET_LEN;
  2282. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2283. if (!array)
  2284. return -ENOMEM;
  2285. rc = utils->read_u32_array(utils->data,
  2286. "qcom,display-topology", array, len);
  2287. if (rc) {
  2288. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2289. goto read_fail;
  2290. }
  2291. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2292. if (!topology) {
  2293. rc = -ENOMEM;
  2294. goto read_fail;
  2295. }
  2296. for (i = 0; i < top_count; i++) {
  2297. struct msm_display_topology *top = &topology[i];
  2298. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2299. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2300. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2301. }
  2302. if (topology_override >= 0 && topology_override < top_count) {
  2303. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2304. topology_override,
  2305. topology[topology_override].num_lm,
  2306. topology[topology_override].num_enc,
  2307. topology[topology_override].num_intf);
  2308. top_sel = topology_override;
  2309. goto parse_done;
  2310. }
  2311. rc = utils->read_u32(utils->data,
  2312. "qcom,default-topology-index", &top_sel);
  2313. if (rc) {
  2314. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2315. goto parse_fail;
  2316. }
  2317. if (top_sel >= top_count) {
  2318. rc = -EINVAL;
  2319. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2320. rc);
  2321. goto parse_fail;
  2322. }
  2323. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2324. topology[top_sel].num_lm,
  2325. topology[top_sel].num_enc,
  2326. topology[top_sel].num_intf);
  2327. parse_done:
  2328. memcpy(&priv_info->topology, &topology[top_sel],
  2329. sizeof(struct msm_display_topology));
  2330. parse_fail:
  2331. kfree(topology);
  2332. read_fail:
  2333. kfree(array);
  2334. return rc;
  2335. }
  2336. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2337. struct msm_roi_alignment *align)
  2338. {
  2339. int len = 0, rc = 0;
  2340. u32 value[6];
  2341. struct property *data;
  2342. if (!align)
  2343. return -EINVAL;
  2344. memset(align, 0, sizeof(*align));
  2345. data = utils->find_property(utils->data,
  2346. "qcom,panel-roi-alignment", &len);
  2347. len /= sizeof(u32);
  2348. if (!data) {
  2349. DSI_ERR("panel roi alignment not found\n");
  2350. rc = -EINVAL;
  2351. } else if (len != 6) {
  2352. DSI_ERR("incorrect roi alignment len %d\n", len);
  2353. rc = -EINVAL;
  2354. } else {
  2355. rc = utils->read_u32_array(utils->data,
  2356. "qcom,panel-roi-alignment", value, len);
  2357. if (rc)
  2358. DSI_DEBUG("error reading panel roi alignment values\n");
  2359. else {
  2360. align->xstart_pix_align = value[0];
  2361. align->ystart_pix_align = value[1];
  2362. align->width_pix_align = value[2];
  2363. align->height_pix_align = value[3];
  2364. align->min_width = value[4];
  2365. align->min_height = value[5];
  2366. }
  2367. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2368. align->xstart_pix_align,
  2369. align->width_pix_align,
  2370. align->ystart_pix_align,
  2371. align->height_pix_align,
  2372. align->min_width,
  2373. align->min_height);
  2374. }
  2375. return rc;
  2376. }
  2377. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2378. struct dsi_parser_utils *utils)
  2379. {
  2380. struct msm_roi_caps *roi_caps = NULL;
  2381. const char *data;
  2382. int rc = 0;
  2383. if (!mode || !mode->priv_info) {
  2384. DSI_ERR("invalid arguments\n");
  2385. return -EINVAL;
  2386. }
  2387. roi_caps = &mode->priv_info->roi_caps;
  2388. memset(roi_caps, 0, sizeof(*roi_caps));
  2389. data = utils->get_property(utils->data,
  2390. "qcom,partial-update-enabled", NULL);
  2391. if (data) {
  2392. if (!strcmp(data, "dual_roi"))
  2393. roi_caps->num_roi = 2;
  2394. else if (!strcmp(data, "single_roi"))
  2395. roi_caps->num_roi = 1;
  2396. else {
  2397. DSI_INFO(
  2398. "invalid value for qcom,partial-update-enabled: %s\n",
  2399. data);
  2400. return 0;
  2401. }
  2402. } else {
  2403. DSI_DEBUG("partial update disabled as the property is not set\n");
  2404. return 0;
  2405. }
  2406. roi_caps->merge_rois = utils->read_bool(utils->data,
  2407. "qcom,partial-update-roi-merge");
  2408. roi_caps->enabled = roi_caps->num_roi > 0;
  2409. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2410. roi_caps->enabled);
  2411. if (roi_caps->enabled)
  2412. rc = dsi_panel_parse_roi_alignment(utils,
  2413. &roi_caps->align);
  2414. if (rc)
  2415. memset(roi_caps, 0, sizeof(*roi_caps));
  2416. return rc;
  2417. }
  2418. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2419. struct dsi_parser_utils *utils)
  2420. {
  2421. bool vid_mode_support, cmd_mode_support;
  2422. if (!mode || !mode->priv_info) {
  2423. DSI_ERR("invalid arguments\n");
  2424. return -EINVAL;
  2425. }
  2426. vid_mode_support = utils->read_bool(utils->data,
  2427. "qcom,mdss-dsi-video-mode");
  2428. cmd_mode_support = utils->read_bool(utils->data,
  2429. "qcom,mdss-dsi-cmd-mode");
  2430. if (cmd_mode_support)
  2431. mode->panel_mode = DSI_OP_CMD_MODE;
  2432. else if (vid_mode_support)
  2433. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2434. else
  2435. return -EINVAL;
  2436. return 0;
  2437. };
  2438. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2439. {
  2440. int dms_enabled;
  2441. const char *data;
  2442. struct dsi_parser_utils *utils = &panel->utils;
  2443. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2444. dms_enabled = utils->read_bool(utils->data,
  2445. "qcom,dynamic-mode-switch-enabled");
  2446. if (!dms_enabled)
  2447. return 0;
  2448. data = utils->get_property(utils->data,
  2449. "qcom,dynamic-mode-switch-type", NULL);
  2450. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2451. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2452. } else {
  2453. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2454. panel->name, data);
  2455. return -EINVAL;
  2456. }
  2457. return 0;
  2458. };
  2459. /*
  2460. * The length of all the valid values to be checked should not be greater
  2461. * than the length of returned data from read command.
  2462. */
  2463. static bool
  2464. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2465. {
  2466. int i;
  2467. struct drm_panel_esd_config *config = &panel->esd_config;
  2468. for (i = 0; i < count; ++i) {
  2469. if (config->status_valid_params[i] >
  2470. config->status_cmds_rlen[i]) {
  2471. DSI_DEBUG("ignore valid params\n");
  2472. return false;
  2473. }
  2474. }
  2475. return true;
  2476. }
  2477. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2478. char *prop_key, u32 **target, u32 cmd_cnt)
  2479. {
  2480. int tmp;
  2481. if (!utils->find_property(utils->data, prop_key, &tmp))
  2482. return false;
  2483. tmp /= sizeof(u32);
  2484. if (tmp != cmd_cnt) {
  2485. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2486. tmp, cmd_cnt);
  2487. return false;
  2488. }
  2489. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2490. if (IS_ERR_OR_NULL(*target)) {
  2491. DSI_ERR("Error allocating memory for property\n");
  2492. return false;
  2493. }
  2494. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2495. DSI_ERR("cannot get values from dts\n");
  2496. kfree(*target);
  2497. *target = NULL;
  2498. return false;
  2499. }
  2500. return true;
  2501. }
  2502. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2503. {
  2504. kfree(esd_config->status_buf);
  2505. kfree(esd_config->return_buf);
  2506. kfree(esd_config->status_value);
  2507. kfree(esd_config->status_valid_params);
  2508. kfree(esd_config->status_cmds_rlen);
  2509. kfree(esd_config->status_cmd.cmds);
  2510. }
  2511. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2512. {
  2513. struct drm_panel_esd_config *esd_config;
  2514. int rc = 0;
  2515. u32 tmp;
  2516. u32 i, status_len, *lenp;
  2517. struct property *data;
  2518. struct dsi_parser_utils *utils = &panel->utils;
  2519. if (!panel) {
  2520. DSI_ERR("Invalid Params\n");
  2521. return -EINVAL;
  2522. }
  2523. esd_config = &panel->esd_config;
  2524. if (!esd_config)
  2525. return -EINVAL;
  2526. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2527. DSI_CMD_SET_PANEL_STATUS, utils);
  2528. if (!esd_config->status_cmd.count) {
  2529. DSI_ERR("panel status command parsing failed\n");
  2530. rc = -EINVAL;
  2531. goto error;
  2532. }
  2533. if (!dsi_panel_parse_esd_status_len(utils,
  2534. "qcom,mdss-dsi-panel-status-read-length",
  2535. &panel->esd_config.status_cmds_rlen,
  2536. esd_config->status_cmd.count)) {
  2537. DSI_ERR("Invalid status read length\n");
  2538. rc = -EINVAL;
  2539. goto error1;
  2540. }
  2541. if (dsi_panel_parse_esd_status_len(utils,
  2542. "qcom,mdss-dsi-panel-status-valid-params",
  2543. &panel->esd_config.status_valid_params,
  2544. esd_config->status_cmd.count)) {
  2545. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2546. esd_config->status_cmd.count)) {
  2547. rc = -EINVAL;
  2548. goto error2;
  2549. }
  2550. }
  2551. status_len = 0;
  2552. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2553. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2554. status_len += lenp[i];
  2555. if (!status_len) {
  2556. rc = -EINVAL;
  2557. goto error2;
  2558. }
  2559. /*
  2560. * Some panel may need multiple read commands to properly
  2561. * check panel status. Do a sanity check for proper status
  2562. * value which will be compared with the value read by dsi
  2563. * controller during ESD check. Also check if multiple read
  2564. * commands are there then, there should be corresponding
  2565. * status check values for each read command.
  2566. */
  2567. data = utils->find_property(utils->data,
  2568. "qcom,mdss-dsi-panel-status-value", &tmp);
  2569. tmp /= sizeof(u32);
  2570. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2571. esd_config->groups = tmp / status_len;
  2572. } else {
  2573. DSI_ERR("error parse panel-status-value\n");
  2574. rc = -EINVAL;
  2575. goto error2;
  2576. }
  2577. esd_config->status_value =
  2578. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2579. GFP_KERNEL);
  2580. if (!esd_config->status_value) {
  2581. rc = -ENOMEM;
  2582. goto error2;
  2583. }
  2584. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2585. sizeof(unsigned char), GFP_KERNEL);
  2586. if (!esd_config->return_buf) {
  2587. rc = -ENOMEM;
  2588. goto error3;
  2589. }
  2590. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2591. if (!esd_config->status_buf) {
  2592. rc = -ENOMEM;
  2593. goto error4;
  2594. }
  2595. rc = utils->read_u32_array(utils->data,
  2596. "qcom,mdss-dsi-panel-status-value",
  2597. esd_config->status_value, esd_config->groups * status_len);
  2598. if (rc) {
  2599. DSI_DEBUG("error reading panel status values\n");
  2600. memset(esd_config->status_value, 0,
  2601. esd_config->groups * status_len);
  2602. }
  2603. return 0;
  2604. error4:
  2605. kfree(esd_config->return_buf);
  2606. error3:
  2607. kfree(esd_config->status_value);
  2608. error2:
  2609. kfree(esd_config->status_valid_params);
  2610. kfree(esd_config->status_cmds_rlen);
  2611. error1:
  2612. kfree(esd_config->status_cmd.cmds);
  2613. error:
  2614. return rc;
  2615. }
  2616. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2617. {
  2618. int rc = 0;
  2619. const char *string;
  2620. struct drm_panel_esd_config *esd_config;
  2621. struct dsi_parser_utils *utils = &panel->utils;
  2622. u8 *esd_mode = NULL;
  2623. esd_config = &panel->esd_config;
  2624. esd_config->status_mode = ESD_MODE_MAX;
  2625. esd_config->esd_enabled = utils->read_bool(utils->data,
  2626. "qcom,esd-check-enabled");
  2627. if (!esd_config->esd_enabled)
  2628. return 0;
  2629. rc = utils->read_string(utils->data,
  2630. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2631. if (!rc) {
  2632. if (!strcmp(string, "bta_check")) {
  2633. esd_config->status_mode = ESD_MODE_SW_BTA;
  2634. } else if (!strcmp(string, "reg_read")) {
  2635. esd_config->status_mode = ESD_MODE_REG_READ;
  2636. } else if (!strcmp(string, "te_signal_check")) {
  2637. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2638. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2639. } else {
  2640. DSI_ERR("TE-ESD not valid for video mode\n");
  2641. rc = -EINVAL;
  2642. goto error;
  2643. }
  2644. } else {
  2645. DSI_ERR("No valid panel-status-check-mode string\n");
  2646. rc = -EINVAL;
  2647. goto error;
  2648. }
  2649. } else {
  2650. DSI_DEBUG("status check method not defined!\n");
  2651. rc = -EINVAL;
  2652. goto error;
  2653. }
  2654. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2655. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2656. if (rc) {
  2657. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2658. rc);
  2659. goto error;
  2660. }
  2661. esd_mode = "register_read";
  2662. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2663. esd_mode = "bta_trigger";
  2664. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2665. esd_mode = "te_check";
  2666. }
  2667. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2668. return 0;
  2669. error:
  2670. panel->esd_config.esd_enabled = false;
  2671. return rc;
  2672. }
  2673. static void dsi_panel_update_util(struct dsi_panel *panel,
  2674. struct device_node *parser_node)
  2675. {
  2676. struct dsi_parser_utils *utils = &panel->utils;
  2677. if (parser_node) {
  2678. *utils = *dsi_parser_get_parser_utils();
  2679. utils->data = parser_node;
  2680. DSI_DEBUG("switching to parser APIs\n");
  2681. goto end;
  2682. }
  2683. *utils = *dsi_parser_get_of_utils();
  2684. utils->data = panel->panel_of_node;
  2685. end:
  2686. utils->node = panel->panel_of_node;
  2687. }
  2688. struct dsi_panel *dsi_panel_get(struct device *parent,
  2689. struct device_node *of_node,
  2690. struct device_node *parser_node,
  2691. const char *type,
  2692. int topology_override)
  2693. {
  2694. struct dsi_panel *panel;
  2695. struct dsi_parser_utils *utils;
  2696. const char *panel_physical_type;
  2697. int rc = 0;
  2698. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2699. if (!panel)
  2700. return ERR_PTR(-ENOMEM);
  2701. panel->panel_of_node = of_node;
  2702. panel->parent = parent;
  2703. panel->type = type;
  2704. dsi_panel_update_util(panel, parser_node);
  2705. utils = &panel->utils;
  2706. panel->name = utils->get_property(utils->data,
  2707. "qcom,mdss-dsi-panel-name", NULL);
  2708. if (!panel->name)
  2709. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2710. /*
  2711. * Set panel type to LCD as default.
  2712. */
  2713. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2714. panel_physical_type = utils->get_property(utils->data,
  2715. "qcom,mdss-dsi-panel-physical-type", NULL);
  2716. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2717. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2718. rc = dsi_panel_parse_host_config(panel);
  2719. if (rc) {
  2720. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2721. rc);
  2722. goto error;
  2723. }
  2724. rc = dsi_panel_parse_panel_mode(panel);
  2725. if (rc) {
  2726. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2727. rc);
  2728. goto error;
  2729. }
  2730. rc = dsi_panel_parse_dfps_caps(panel);
  2731. if (rc)
  2732. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2733. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2734. if (rc)
  2735. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2736. /* allow qsync support only if DFPS is with VFP approach */
  2737. if ((panel->dfps_caps.dfps_support) &&
  2738. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2739. panel->qsync_min_fps = 0;
  2740. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2741. if (rc)
  2742. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2743. rc = dsi_panel_parse_phy_props(panel);
  2744. if (rc) {
  2745. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2746. rc);
  2747. goto error;
  2748. }
  2749. rc = dsi_panel_parse_gpios(panel);
  2750. if (rc) {
  2751. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2752. goto error;
  2753. }
  2754. rc = dsi_panel_parse_power_cfg(panel);
  2755. if (rc)
  2756. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2757. rc = dsi_panel_parse_bl_config(panel);
  2758. if (rc) {
  2759. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2760. if (rc == -EPROBE_DEFER)
  2761. goto error;
  2762. }
  2763. rc = dsi_panel_parse_misc_features(panel);
  2764. if (rc)
  2765. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2766. rc = dsi_panel_parse_hdr_config(panel);
  2767. if (rc)
  2768. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2769. rc = dsi_panel_get_mode_count(panel);
  2770. if (rc) {
  2771. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2772. goto error;
  2773. }
  2774. rc = dsi_panel_parse_dms_info(panel);
  2775. if (rc)
  2776. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2777. rc = dsi_panel_parse_esd_config(panel);
  2778. if (rc)
  2779. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2780. rc = dsi_panel_vreg_get(panel);
  2781. if (rc) {
  2782. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2783. panel->name, rc);
  2784. goto error;
  2785. }
  2786. panel->power_mode = SDE_MODE_DPMS_OFF;
  2787. drm_panel_init(&panel->drm_panel);
  2788. panel->drm_panel.dev = &panel->mipi_device.dev;
  2789. panel->mipi_device.dev.of_node = of_node;
  2790. rc = drm_panel_add(&panel->drm_panel);
  2791. if (rc)
  2792. goto error_vreg_put;
  2793. mutex_init(&panel->panel_lock);
  2794. return panel;
  2795. error_vreg_put:
  2796. (void)dsi_panel_vreg_put(panel);
  2797. error:
  2798. kfree(panel);
  2799. return ERR_PTR(rc);
  2800. }
  2801. void dsi_panel_put(struct dsi_panel *panel)
  2802. {
  2803. drm_panel_remove(&panel->drm_panel);
  2804. /* free resources allocated for ESD check */
  2805. dsi_panel_esd_config_deinit(&panel->esd_config);
  2806. kfree(panel);
  2807. }
  2808. int dsi_panel_drv_init(struct dsi_panel *panel,
  2809. struct mipi_dsi_host *host)
  2810. {
  2811. int rc = 0;
  2812. struct mipi_dsi_device *dev;
  2813. if (!panel || !host) {
  2814. DSI_ERR("invalid params\n");
  2815. return -EINVAL;
  2816. }
  2817. mutex_lock(&panel->panel_lock);
  2818. dev = &panel->mipi_device;
  2819. dev->host = host;
  2820. /*
  2821. * We dont have device structure since panel is not a device node.
  2822. * When using drm panel framework, the device is probed when the host is
  2823. * create.
  2824. */
  2825. dev->channel = 0;
  2826. dev->lanes = 4;
  2827. panel->host = host;
  2828. rc = dsi_panel_pinctrl_init(panel);
  2829. if (rc) {
  2830. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2831. panel->name, rc);
  2832. goto exit;
  2833. }
  2834. rc = dsi_panel_gpio_request(panel);
  2835. if (rc) {
  2836. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2837. rc);
  2838. goto error_pinctrl_deinit;
  2839. }
  2840. rc = dsi_panel_bl_register(panel);
  2841. if (rc) {
  2842. if (rc != -EPROBE_DEFER)
  2843. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2844. panel->name, rc);
  2845. goto error_gpio_release;
  2846. }
  2847. goto exit;
  2848. error_gpio_release:
  2849. (void)dsi_panel_gpio_release(panel);
  2850. error_pinctrl_deinit:
  2851. (void)dsi_panel_pinctrl_deinit(panel);
  2852. exit:
  2853. mutex_unlock(&panel->panel_lock);
  2854. return rc;
  2855. }
  2856. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2857. {
  2858. int rc = 0;
  2859. if (!panel) {
  2860. DSI_ERR("invalid params\n");
  2861. return -EINVAL;
  2862. }
  2863. mutex_lock(&panel->panel_lock);
  2864. rc = dsi_panel_bl_unregister(panel);
  2865. if (rc)
  2866. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2867. panel->name, rc);
  2868. rc = dsi_panel_gpio_release(panel);
  2869. if (rc)
  2870. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2871. rc);
  2872. rc = dsi_panel_pinctrl_deinit(panel);
  2873. if (rc)
  2874. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2875. rc);
  2876. rc = dsi_panel_vreg_put(panel);
  2877. if (rc)
  2878. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2879. panel->host = NULL;
  2880. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2881. mutex_unlock(&panel->panel_lock);
  2882. return rc;
  2883. }
  2884. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2885. struct dsi_display_mode *mode)
  2886. {
  2887. return 0;
  2888. }
  2889. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2890. {
  2891. const u32 SINGLE_MODE_SUPPORT = 1;
  2892. struct dsi_parser_utils *utils;
  2893. struct device_node *timings_np, *child_np;
  2894. int num_dfps_rates, num_bit_clks;
  2895. int num_video_modes = 0, num_cmd_modes = 0;
  2896. int count, rc = 0;
  2897. if (!panel) {
  2898. DSI_ERR("invalid params\n");
  2899. return -EINVAL;
  2900. }
  2901. utils = &panel->utils;
  2902. panel->num_timing_nodes = 0;
  2903. timings_np = utils->get_child_by_name(utils->data,
  2904. "qcom,mdss-dsi-display-timings");
  2905. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2906. DSI_ERR("no display timing nodes defined\n");
  2907. rc = -EINVAL;
  2908. goto error;
  2909. }
  2910. count = utils->get_child_count(timings_np);
  2911. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2912. count > DSI_MODE_MAX) {
  2913. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2914. rc = -EINVAL;
  2915. goto error;
  2916. }
  2917. /* No multiresolution support is available for video mode panels.
  2918. * Multi-mode is supported for video mode during POMS is enabled.
  2919. */
  2920. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2921. !panel->host_config.ext_bridge_mode &&
  2922. !panel->panel_mode_switch_enabled)
  2923. count = SINGLE_MODE_SUPPORT;
  2924. panel->num_timing_nodes = count;
  2925. dsi_for_each_child_node(timings_np, child_np) {
  2926. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  2927. num_video_modes++;
  2928. else if (utils->read_bool(child_np,
  2929. "qcom,mdss-dsi-cmd-mode"))
  2930. num_cmd_modes++;
  2931. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  2932. num_video_modes++;
  2933. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  2934. num_cmd_modes++;
  2935. }
  2936. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  2937. panel->dfps_caps.dfps_list_len;
  2938. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  2939. panel->dyn_clk_caps.bit_clk_list_len;
  2940. /*
  2941. * Inflate num_of_modes by fps and bit clks in dfps.
  2942. * Single command mode for video mode panels supporting
  2943. * panel operating mode switch.
  2944. */
  2945. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  2946. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  2947. (panel->panel_mode_switch_enabled))
  2948. num_cmd_modes = 1;
  2949. else
  2950. num_cmd_modes = num_cmd_modes * num_bit_clks;
  2951. panel->num_display_modes = num_video_modes + num_cmd_modes;
  2952. error:
  2953. return rc;
  2954. }
  2955. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2956. struct dsi_panel_phy_props *phy_props)
  2957. {
  2958. int rc = 0;
  2959. if (!panel || !phy_props) {
  2960. DSI_ERR("invalid params\n");
  2961. return -EINVAL;
  2962. }
  2963. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2964. return rc;
  2965. }
  2966. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2967. struct dsi_dfps_capabilities *dfps_caps)
  2968. {
  2969. int rc = 0;
  2970. if (!panel || !dfps_caps) {
  2971. DSI_ERR("invalid params\n");
  2972. return -EINVAL;
  2973. }
  2974. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2975. return rc;
  2976. }
  2977. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2978. {
  2979. int i;
  2980. if (!mode->priv_info)
  2981. return;
  2982. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2983. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2984. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2985. }
  2986. kfree(mode->priv_info);
  2987. }
  2988. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2989. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2990. {
  2991. u32 frame_time_us,nslices;
  2992. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  2993. dsi_transfer_time_us, pixel_clk_khz;
  2994. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  2995. struct dsi_mode_info *timing = &mode->timing;
  2996. struct dsi_display_mode *display_mode;
  2997. u32 jitter_numer, jitter_denom, prefill_lines;
  2998. u32 min_threshold_us, prefill_time_us;
  2999. u16 bpp;
  3000. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3001. * + 1 byte dcs data command.
  3002. */
  3003. const u32 packet_overhead = 56;
  3004. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3005. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3006. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3007. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3008. if (timing->dsc_enabled) {
  3009. nslices = (timing->h_active)/(dsc->config.slice_width);
  3010. /* (slice width x bit-per-pixel + packet overhead) x
  3011. * number of slices x height x fps / lane
  3012. */
  3013. bpp = DSC_BPP(dsc->config);
  3014. bits_per_line = ((dsc->config.slice_width * bpp) +
  3015. packet_overhead) * nslices;
  3016. bits_per_line = bits_per_line / (config->num_data_lanes);
  3017. min_bitclk_hz = (bits_per_line * timing->v_active *
  3018. timing->refresh_rate);
  3019. } else {
  3020. total_active_pixels = ((dsi_h_active_dce(timing)
  3021. * timing->v_active));
  3022. /* calculate the actual bitclk needed to transfer the frame */
  3023. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3024. (config->bpp));
  3025. do_div(min_bitclk_hz, config->num_data_lanes);
  3026. }
  3027. timing->min_dsi_clk_hz = min_bitclk_hz;
  3028. if (timing->clk_rate_hz) {
  3029. /* adjust the transfer time proportionately for bit clk*/
  3030. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3031. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3032. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3033. } else if (mode->priv_info->mdp_transfer_time_us) {
  3034. timing->dsi_transfer_time_us =
  3035. mode->priv_info->mdp_transfer_time_us;
  3036. } else {
  3037. min_threshold_us = mult_frac(frame_time_us,
  3038. jitter_numer, (jitter_denom * 100));
  3039. /*
  3040. * Increase the prefill_lines proportionately as recommended
  3041. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3042. */
  3043. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3044. timing->refresh_rate, 60);
  3045. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3046. (timing->v_active));
  3047. /*
  3048. * Threshold is sum of panel jitter time, prefill line time
  3049. * plus 100usec buffer time.
  3050. */
  3051. min_threshold_us = min_threshold_us + 100 + prefill_time_us;
  3052. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3053. if (min_threshold_us > frame_threshold_us)
  3054. frame_threshold_us = min_threshold_us;
  3055. timing->dsi_transfer_time_us = frame_time_us -
  3056. frame_threshold_us;
  3057. }
  3058. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3059. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3060. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3061. timing->mdp_transfer_time_us =
  3062. mode->priv_info->mdp_transfer_time_us;
  3063. }
  3064. /* Calculate pclk_khz to update modeinfo */
  3065. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3066. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3067. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3068. do_div(pixel_clk_khz, config->bpp);
  3069. display_mode->pixel_clk_khz = pixel_clk_khz;
  3070. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3071. }
  3072. int dsi_panel_get_mode(struct dsi_panel *panel,
  3073. u32 index, struct dsi_display_mode *mode,
  3074. int topology_override)
  3075. {
  3076. struct device_node *timings_np, *child_np;
  3077. struct dsi_parser_utils *utils;
  3078. struct dsi_display_mode_priv_info *prv_info;
  3079. u32 child_idx = 0;
  3080. int rc = 0, num_timings;
  3081. int traffic_mode;
  3082. int panel_mode;
  3083. void *utils_data = NULL;
  3084. if (!panel || !mode) {
  3085. DSI_ERR("invalid params\n");
  3086. return -EINVAL;
  3087. }
  3088. mutex_lock(&panel->panel_lock);
  3089. utils = &panel->utils;
  3090. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3091. if (!mode->priv_info) {
  3092. rc = -ENOMEM;
  3093. goto done;
  3094. }
  3095. prv_info = mode->priv_info;
  3096. timings_np = utils->get_child_by_name(utils->data,
  3097. "qcom,mdss-dsi-display-timings");
  3098. if (!timings_np) {
  3099. DSI_ERR("no display timing nodes defined\n");
  3100. rc = -EINVAL;
  3101. goto parse_fail;
  3102. }
  3103. num_timings = utils->get_child_count(timings_np);
  3104. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3105. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3106. rc = -EINVAL;
  3107. goto parse_fail;
  3108. }
  3109. utils_data = utils->data;
  3110. traffic_mode = panel->video_config.traffic_mode;
  3111. panel_mode = panel->panel_mode;
  3112. dsi_for_each_child_node(timings_np, child_np) {
  3113. if (index != child_idx++)
  3114. continue;
  3115. utils->data = child_np;
  3116. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3117. if (rc) {
  3118. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3119. goto parse_fail;
  3120. }
  3121. rc = dsi_panel_parse_dsc_params(mode, utils);
  3122. if (rc) {
  3123. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3124. goto parse_fail;
  3125. }
  3126. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3127. panel_mode);
  3128. if (rc) {
  3129. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3130. goto parse_fail;
  3131. }
  3132. rc = dsi_panel_parse_topology(prv_info, utils,
  3133. topology_override);
  3134. if (rc) {
  3135. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3136. goto parse_fail;
  3137. }
  3138. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3139. if (rc) {
  3140. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3141. goto parse_fail;
  3142. }
  3143. rc = dsi_panel_parse_jitter_config(mode, utils);
  3144. if (rc)
  3145. DSI_ERR(
  3146. "failed to parse panel jitter config, rc=%d\n", rc);
  3147. rc = dsi_panel_parse_phy_timing(mode, utils);
  3148. if (rc) {
  3149. DSI_ERR(
  3150. "failed to parse panel phy timings, rc=%d\n", rc);
  3151. goto parse_fail;
  3152. }
  3153. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3154. if (rc)
  3155. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3156. if (panel->panel_mode_switch_enabled) {
  3157. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3158. if (rc) {
  3159. rc = 0;
  3160. mode->panel_mode = panel->panel_mode;
  3161. DSI_INFO(
  3162. "POMS: panel mode isn't specified in timing[%d]\n",
  3163. child_idx);
  3164. }
  3165. } else {
  3166. mode->panel_mode = panel->panel_mode;
  3167. }
  3168. }
  3169. goto done;
  3170. parse_fail:
  3171. kfree(mode->priv_info);
  3172. mode->priv_info = NULL;
  3173. done:
  3174. utils->data = utils_data;
  3175. mutex_unlock(&panel->panel_lock);
  3176. return rc;
  3177. }
  3178. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3179. struct dsi_display_mode *mode,
  3180. struct dsi_host_config *config)
  3181. {
  3182. int rc = 0;
  3183. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3184. if (!panel || !mode || !config) {
  3185. DSI_ERR("invalid params\n");
  3186. return -EINVAL;
  3187. }
  3188. mutex_lock(&panel->panel_lock);
  3189. config->panel_mode = panel->panel_mode;
  3190. memcpy(&config->common_config, &panel->host_config,
  3191. sizeof(config->common_config));
  3192. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3193. memcpy(&config->u.video_engine, &panel->video_config,
  3194. sizeof(config->u.video_engine));
  3195. } else {
  3196. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3197. sizeof(config->u.cmd_engine));
  3198. }
  3199. memcpy(&config->video_timing, &mode->timing,
  3200. sizeof(config->video_timing));
  3201. config->video_timing.mdp_transfer_time_us =
  3202. mode->priv_info->mdp_transfer_time_us;
  3203. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3204. config->video_timing.dsc = &mode->priv_info->dsc;
  3205. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3206. config->video_timing.vdc = &mode->priv_info->vdc;
  3207. if (dyn_clk_caps->dyn_clk_support)
  3208. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3209. else
  3210. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3211. config->esc_clk_rate_hz = 19200000;
  3212. mutex_unlock(&panel->panel_lock);
  3213. return rc;
  3214. }
  3215. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3216. {
  3217. int rc = 0;
  3218. if (!panel) {
  3219. DSI_ERR("invalid params\n");
  3220. return -EINVAL;
  3221. }
  3222. mutex_lock(&panel->panel_lock);
  3223. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3224. if (panel->lp11_init)
  3225. goto error;
  3226. rc = dsi_panel_power_on(panel);
  3227. if (rc) {
  3228. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3229. goto error;
  3230. }
  3231. error:
  3232. mutex_unlock(&panel->panel_lock);
  3233. return rc;
  3234. }
  3235. int dsi_panel_update_pps(struct dsi_panel *panel)
  3236. {
  3237. int rc = 0;
  3238. struct dsi_panel_cmd_set *set = NULL;
  3239. struct dsi_display_mode_priv_info *priv_info = NULL;
  3240. if (!panel || !panel->cur_mode) {
  3241. DSI_ERR("invalid params\n");
  3242. return -EINVAL;
  3243. }
  3244. mutex_lock(&panel->panel_lock);
  3245. priv_info = panel->cur_mode->priv_info;
  3246. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3247. if (priv_info->dsc_enabled)
  3248. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3249. panel->dce_pps_cmd, 0,
  3250. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3251. else if (priv_info->vdc_enabled)
  3252. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3253. panel->dce_pps_cmd, 0,
  3254. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3255. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3256. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3257. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3258. if (rc) {
  3259. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3260. goto error;
  3261. }
  3262. }
  3263. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3264. if (rc) {
  3265. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3266. panel->name, rc);
  3267. }
  3268. dsi_panel_destroy_cmd_packets(set);
  3269. error:
  3270. mutex_unlock(&panel->panel_lock);
  3271. return rc;
  3272. }
  3273. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3274. {
  3275. int rc = 0;
  3276. if (!panel) {
  3277. DSI_ERR("invalid params\n");
  3278. return -EINVAL;
  3279. }
  3280. mutex_lock(&panel->panel_lock);
  3281. if (!panel->panel_initialized)
  3282. goto exit;
  3283. /*
  3284. * Consider LP1->LP2->LP1.
  3285. * If the panel is already in LP mode, do not need to
  3286. * set the regulator.
  3287. * IBB and AB power mode would be set at the same time
  3288. * in PMIC driver, so we only call ibb setting that is enough.
  3289. */
  3290. if (dsi_panel_is_type_oled(panel) &&
  3291. panel->power_mode != SDE_MODE_DPMS_LP2)
  3292. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3293. "ibb", REGULATOR_MODE_IDLE);
  3294. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3295. if (rc)
  3296. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3297. panel->name, rc);
  3298. exit:
  3299. mutex_unlock(&panel->panel_lock);
  3300. return rc;
  3301. }
  3302. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3303. {
  3304. int rc = 0;
  3305. if (!panel) {
  3306. DSI_ERR("invalid params\n");
  3307. return -EINVAL;
  3308. }
  3309. mutex_lock(&panel->panel_lock);
  3310. if (!panel->panel_initialized)
  3311. goto exit;
  3312. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3313. if (rc)
  3314. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3315. panel->name, rc);
  3316. exit:
  3317. mutex_unlock(&panel->panel_lock);
  3318. return rc;
  3319. }
  3320. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3321. {
  3322. int rc = 0;
  3323. if (!panel) {
  3324. DSI_ERR("invalid params\n");
  3325. return -EINVAL;
  3326. }
  3327. mutex_lock(&panel->panel_lock);
  3328. if (!panel->panel_initialized)
  3329. goto exit;
  3330. /*
  3331. * Consider about LP1->LP2->NOLP.
  3332. */
  3333. if (dsi_panel_is_type_oled(panel) &&
  3334. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3335. panel->power_mode == SDE_MODE_DPMS_LP2))
  3336. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3337. "ibb", REGULATOR_MODE_NORMAL);
  3338. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3339. if (rc)
  3340. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3341. panel->name, rc);
  3342. exit:
  3343. mutex_unlock(&panel->panel_lock);
  3344. return rc;
  3345. }
  3346. int dsi_panel_prepare(struct dsi_panel *panel)
  3347. {
  3348. int rc = 0;
  3349. if (!panel) {
  3350. DSI_ERR("invalid params\n");
  3351. return -EINVAL;
  3352. }
  3353. mutex_lock(&panel->panel_lock);
  3354. if (panel->lp11_init) {
  3355. rc = dsi_panel_power_on(panel);
  3356. if (rc) {
  3357. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3358. panel->name, rc);
  3359. goto error;
  3360. }
  3361. }
  3362. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3363. if (rc) {
  3364. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3365. panel->name, rc);
  3366. goto error;
  3367. }
  3368. error:
  3369. mutex_unlock(&panel->panel_lock);
  3370. return rc;
  3371. }
  3372. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3373. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3374. {
  3375. static const int ROI_CMD_LEN = 5;
  3376. int rc = 0;
  3377. /* DTYPE_DCS_LWRITE */
  3378. char *caset, *paset;
  3379. set->cmds = NULL;
  3380. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3381. if (!caset) {
  3382. rc = -ENOMEM;
  3383. goto exit;
  3384. }
  3385. caset[0] = 0x2a;
  3386. caset[1] = (roi->x & 0xFF00) >> 8;
  3387. caset[2] = roi->x & 0xFF;
  3388. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3389. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3390. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3391. if (!paset) {
  3392. rc = -ENOMEM;
  3393. goto error_free_mem;
  3394. }
  3395. paset[0] = 0x2b;
  3396. paset[1] = (roi->y & 0xFF00) >> 8;
  3397. paset[2] = roi->y & 0xFF;
  3398. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3399. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3400. set->type = DSI_CMD_SET_ROI;
  3401. set->state = DSI_CMD_SET_STATE_LP;
  3402. set->count = 2; /* send caset + paset together */
  3403. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3404. if (!set->cmds) {
  3405. rc = -ENOMEM;
  3406. goto error_free_mem;
  3407. }
  3408. set->cmds[0].msg.channel = 0;
  3409. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3410. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3411. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3412. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3413. set->cmds[0].msg.tx_buf = caset;
  3414. set->cmds[0].msg.rx_len = 0;
  3415. set->cmds[0].msg.rx_buf = 0;
  3416. set->cmds[0].msg.wait_ms = 0;
  3417. set->cmds[0].last_command = 0;
  3418. set->cmds[0].post_wait_ms = 0;
  3419. set->cmds[1].msg.channel = 0;
  3420. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3421. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3422. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3423. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3424. set->cmds[1].msg.tx_buf = paset;
  3425. set->cmds[1].msg.rx_len = 0;
  3426. set->cmds[1].msg.rx_buf = 0;
  3427. set->cmds[1].msg.wait_ms = 0;
  3428. set->cmds[1].last_command = 1;
  3429. set->cmds[1].post_wait_ms = 0;
  3430. goto exit;
  3431. error_free_mem:
  3432. kfree(caset);
  3433. kfree(paset);
  3434. kfree(set->cmds);
  3435. exit:
  3436. return rc;
  3437. }
  3438. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3439. int ctrl_idx)
  3440. {
  3441. int rc = 0;
  3442. if (!panel) {
  3443. DSI_ERR("invalid params\n");
  3444. return -EINVAL;
  3445. }
  3446. mutex_lock(&panel->panel_lock);
  3447. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3448. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3449. if (rc)
  3450. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3451. panel->name, rc);
  3452. mutex_unlock(&panel->panel_lock);
  3453. return rc;
  3454. }
  3455. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3456. int ctrl_idx)
  3457. {
  3458. int rc = 0;
  3459. if (!panel) {
  3460. DSI_ERR("invalid params\n");
  3461. return -EINVAL;
  3462. }
  3463. mutex_lock(&panel->panel_lock);
  3464. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3465. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3466. if (rc)
  3467. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3468. panel->name, rc);
  3469. mutex_unlock(&panel->panel_lock);
  3470. return rc;
  3471. }
  3472. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3473. struct dsi_rect *roi)
  3474. {
  3475. int rc = 0;
  3476. struct dsi_panel_cmd_set *set;
  3477. struct dsi_display_mode_priv_info *priv_info;
  3478. if (!panel || !panel->cur_mode) {
  3479. DSI_ERR("Invalid params\n");
  3480. return -EINVAL;
  3481. }
  3482. priv_info = panel->cur_mode->priv_info;
  3483. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3484. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3485. if (rc) {
  3486. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3487. panel->name, rc);
  3488. return rc;
  3489. }
  3490. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3491. roi->x, roi->y, roi->w, roi->h);
  3492. mutex_lock(&panel->panel_lock);
  3493. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3494. if (rc)
  3495. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3496. panel->name, rc);
  3497. mutex_unlock(&panel->panel_lock);
  3498. dsi_panel_destroy_cmd_packets(set);
  3499. dsi_panel_dealloc_cmd_packets(set);
  3500. return rc;
  3501. }
  3502. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3503. {
  3504. int rc = 0;
  3505. if (!panel) {
  3506. DSI_ERR("Invalid params\n");
  3507. return -EINVAL;
  3508. }
  3509. mutex_lock(&panel->panel_lock);
  3510. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3511. if (rc)
  3512. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3513. panel->name, rc);
  3514. mutex_unlock(&panel->panel_lock);
  3515. return rc;
  3516. }
  3517. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3518. {
  3519. int rc = 0;
  3520. if (!panel) {
  3521. DSI_ERR("Invalid params\n");
  3522. return -EINVAL;
  3523. }
  3524. mutex_lock(&panel->panel_lock);
  3525. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3526. if (rc)
  3527. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3528. panel->name, rc);
  3529. mutex_unlock(&panel->panel_lock);
  3530. return rc;
  3531. }
  3532. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3533. {
  3534. int rc = 0;
  3535. if (!panel) {
  3536. DSI_ERR("Invalid params\n");
  3537. return -EINVAL;
  3538. }
  3539. mutex_lock(&panel->panel_lock);
  3540. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3541. if (rc)
  3542. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3543. panel->name, rc);
  3544. mutex_unlock(&panel->panel_lock);
  3545. return rc;
  3546. }
  3547. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3548. {
  3549. int rc = 0;
  3550. if (!panel) {
  3551. DSI_ERR("Invalid params\n");
  3552. return -EINVAL;
  3553. }
  3554. mutex_lock(&panel->panel_lock);
  3555. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3556. if (rc)
  3557. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3558. panel->name, rc);
  3559. mutex_unlock(&panel->panel_lock);
  3560. return rc;
  3561. }
  3562. int dsi_panel_switch(struct dsi_panel *panel)
  3563. {
  3564. int rc = 0;
  3565. if (!panel) {
  3566. DSI_ERR("Invalid params\n");
  3567. return -EINVAL;
  3568. }
  3569. mutex_lock(&panel->panel_lock);
  3570. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3571. if (rc)
  3572. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3573. panel->name, rc);
  3574. mutex_unlock(&panel->panel_lock);
  3575. return rc;
  3576. }
  3577. int dsi_panel_post_switch(struct dsi_panel *panel)
  3578. {
  3579. int rc = 0;
  3580. if (!panel) {
  3581. DSI_ERR("Invalid params\n");
  3582. return -EINVAL;
  3583. }
  3584. mutex_lock(&panel->panel_lock);
  3585. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3586. if (rc)
  3587. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3588. panel->name, rc);
  3589. mutex_unlock(&panel->panel_lock);
  3590. return rc;
  3591. }
  3592. int dsi_panel_enable(struct dsi_panel *panel)
  3593. {
  3594. int rc = 0;
  3595. if (!panel) {
  3596. DSI_ERR("Invalid params\n");
  3597. return -EINVAL;
  3598. }
  3599. mutex_lock(&panel->panel_lock);
  3600. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3601. if (rc)
  3602. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3603. panel->name, rc);
  3604. else
  3605. panel->panel_initialized = true;
  3606. mutex_unlock(&panel->panel_lock);
  3607. return rc;
  3608. }
  3609. int dsi_panel_post_enable(struct dsi_panel *panel)
  3610. {
  3611. int rc = 0;
  3612. if (!panel) {
  3613. DSI_ERR("invalid params\n");
  3614. return -EINVAL;
  3615. }
  3616. mutex_lock(&panel->panel_lock);
  3617. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3618. if (rc) {
  3619. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3620. panel->name, rc);
  3621. goto error;
  3622. }
  3623. error:
  3624. mutex_unlock(&panel->panel_lock);
  3625. return rc;
  3626. }
  3627. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3628. {
  3629. int rc = 0;
  3630. if (!panel) {
  3631. DSI_ERR("invalid params\n");
  3632. return -EINVAL;
  3633. }
  3634. mutex_lock(&panel->panel_lock);
  3635. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3636. if (rc) {
  3637. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3638. panel->name, rc);
  3639. goto error;
  3640. }
  3641. error:
  3642. mutex_unlock(&panel->panel_lock);
  3643. return rc;
  3644. }
  3645. int dsi_panel_disable(struct dsi_panel *panel)
  3646. {
  3647. int rc = 0;
  3648. if (!panel) {
  3649. DSI_ERR("invalid params\n");
  3650. return -EINVAL;
  3651. }
  3652. mutex_lock(&panel->panel_lock);
  3653. /* Avoid sending panel off commands when ESD recovery is underway */
  3654. if (!atomic_read(&panel->esd_recovery_pending)) {
  3655. /*
  3656. * Need to set IBB/AB regulator mode to STANDBY,
  3657. * if panel is going off from AOD mode.
  3658. */
  3659. if (dsi_panel_is_type_oled(panel) &&
  3660. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3661. panel->power_mode == SDE_MODE_DPMS_LP2))
  3662. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3663. "ibb", REGULATOR_MODE_STANDBY);
  3664. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3665. if (rc) {
  3666. /*
  3667. * Sending panel off commands may fail when DSI
  3668. * controller is in a bad state. These failures can be
  3669. * ignored since controller will go for full reset on
  3670. * subsequent display enable anyway.
  3671. */
  3672. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3673. panel->name, rc);
  3674. rc = 0;
  3675. }
  3676. }
  3677. panel->panel_initialized = false;
  3678. panel->power_mode = SDE_MODE_DPMS_OFF;
  3679. mutex_unlock(&panel->panel_lock);
  3680. return rc;
  3681. }
  3682. int dsi_panel_unprepare(struct dsi_panel *panel)
  3683. {
  3684. int rc = 0;
  3685. if (!panel) {
  3686. DSI_ERR("invalid params\n");
  3687. return -EINVAL;
  3688. }
  3689. mutex_lock(&panel->panel_lock);
  3690. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3691. if (rc) {
  3692. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3693. panel->name, rc);
  3694. goto error;
  3695. }
  3696. error:
  3697. mutex_unlock(&panel->panel_lock);
  3698. return rc;
  3699. }
  3700. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3701. {
  3702. int rc = 0;
  3703. if (!panel) {
  3704. DSI_ERR("invalid params\n");
  3705. return -EINVAL;
  3706. }
  3707. mutex_lock(&panel->panel_lock);
  3708. rc = dsi_panel_power_off(panel);
  3709. if (rc) {
  3710. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3711. panel->name, rc);
  3712. goto error;
  3713. }
  3714. error:
  3715. mutex_unlock(&panel->panel_lock);
  3716. return rc;
  3717. }