c3fae0027c
Added qcn6432 target header files based on E3R47 under qcn6432 to make fw-api project compatible to host. Change-Id: I3bdf6298281323f4f0fe75aed04db93cd698ee1f CRs-Fixed: 3463782
106 baris
4.3 KiB
C
106 baris
4.3 KiB
C
/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _MLO_STA_ID_DETAILS_H_
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#define _MLO_STA_ID_DETAILS_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#define NUM_OF_WORDS_MLO_STA_ID_DETAILS 1
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struct mlo_sta_id_details {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint16_t nstr_mlo_sta_id : 10, // [9:0]
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block_self_ml_sync : 1, // [10:10]
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block_partner_ml_sync : 1, // [11:11]
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nstr_mlo_sta_id_valid : 1, // [12:12]
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reserved_0a : 3; // [15:13]
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#else
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uint16_t reserved_0a : 3, // [15:13]
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nstr_mlo_sta_id_valid : 1, // [12:12]
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block_partner_ml_sync : 1, // [11:11]
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block_self_ml_sync : 1, // [10:10]
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nstr_mlo_sta_id : 10; // [9:0]
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#endif
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};
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/* Description NSTR_MLO_STA_ID
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ID of peer participating in non-STR MLO
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*/
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#define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_OFFSET 0x00000000
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#define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_LSB 0
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#define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_MSB 9
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#define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_MASK 0x000003ff
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/* Description BLOCK_SELF_ML_SYNC
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Only valid for TX
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When set, this provides an indication to block the peer
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for self-link.
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*/
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#define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_OFFSET 0x00000000
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#define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_LSB 10
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#define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_MSB 10
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#define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_MASK 0x00000400
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/* Description BLOCK_PARTNER_ML_SYNC
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Only valid for TX
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When set, this provides an indication to block the peer
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for partner links.
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*/
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#define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_OFFSET 0x00000000
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#define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_LSB 11
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#define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_MSB 11
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#define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_MASK 0x00000800
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/* Description NSTR_MLO_STA_ID_VALID
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All the fields in this TLV are valid only if this bit is
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set.
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*/
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#define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_OFFSET 0x00000000
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#define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_LSB 12
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#define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_MSB 12
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#define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_MASK 0x00001000
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/* Description RESERVED_0A
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<legal 0>
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*/
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#define MLO_STA_ID_DETAILS_RESERVED_0A_OFFSET 0x00000000
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#define MLO_STA_ID_DETAILS_RESERVED_0A_LSB 13
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#define MLO_STA_ID_DETAILS_RESERVED_0A_MSB 15
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#define MLO_STA_ID_DETAILS_RESERVED_0A_MASK 0x0000e000
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#endif // MLO_STA_ID_DETAILS
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