main.c 113 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include "main.h"
  47. #include "qmi.h"
  48. #include "debug.h"
  49. #include "power.h"
  50. #include "genl.h"
  51. #define MAX_PROP_SIZE 32
  52. #define NUM_LOG_PAGES 10
  53. #define NUM_LOG_LONG_PAGES 4
  54. #define ICNSS_MAGIC 0x5abc5abc
  55. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  56. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  57. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  58. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  59. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  60. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  61. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  62. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  63. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  64. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  65. #define ICNSS_MAX_PROBE_CNT 2
  66. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  67. #define PROBE_TIMEOUT 15000
  68. #define SMP2P_SOC_WAKE_TIMEOUT 500
  69. #ifdef CONFIG_ICNSS2_DEBUG
  70. static unsigned long qmi_timeout = 3000;
  71. module_param(qmi_timeout, ulong, 0600);
  72. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  73. #else
  74. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  75. #endif
  76. static struct icnss_priv *penv;
  77. static struct work_struct wpss_loader;
  78. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  79. #define ICNSS_EVENT_PENDING 2989
  80. #define ICNSS_EVENT_SYNC BIT(0)
  81. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  82. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  83. ICNSS_EVENT_SYNC)
  84. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  85. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  86. #define SMP2P_GET_MAX_RETRY 4
  87. #define SMP2P_GET_RETRY_DELAY_MS 500
  88. #define RAMDUMP_NUM_DEVICES 256
  89. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  90. #define WLAN_EN_TEMP_THRESHOLD 5000
  91. #define WLAN_EN_DELAY 500
  92. #define ICNSS_RPROC_LEN 10
  93. static DEFINE_IDA(rd_minor_id);
  94. enum icnss_pdr_cause_index {
  95. ICNSS_FW_CRASH,
  96. ICNSS_ROOT_PD_CRASH,
  97. ICNSS_ROOT_PD_SHUTDOWN,
  98. ICNSS_HOST_ERROR,
  99. };
  100. static const char * const icnss_pdr_cause[] = {
  101. [ICNSS_FW_CRASH] = "FW crash",
  102. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  103. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  104. [ICNSS_HOST_ERROR] = "Host error",
  105. };
  106. static void icnss_set_plat_priv(struct icnss_priv *priv)
  107. {
  108. penv = priv;
  109. }
  110. static struct icnss_priv *icnss_get_plat_priv()
  111. {
  112. return penv;
  113. }
  114. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  115. struct kobj_attribute *attr,
  116. const char *buf, size_t count)
  117. {
  118. struct icnss_priv *priv = icnss_get_plat_priv();
  119. atomic_set(&priv->is_shutdown, true);
  120. icnss_pr_dbg("Received shutdown indication");
  121. return count;
  122. }
  123. static struct kobj_attribute icnss_sysfs_attribute =
  124. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  125. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  126. {
  127. if (atomic_inc_return(&priv->pm_count) != 1)
  128. return;
  129. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  130. atomic_read(&priv->pm_count));
  131. pm_stay_awake(&priv->pdev->dev);
  132. priv->stats.pm_stay_awake++;
  133. }
  134. static void icnss_pm_relax(struct icnss_priv *priv)
  135. {
  136. int r = atomic_dec_return(&priv->pm_count);
  137. WARN_ON(r < 0);
  138. if (r != 0)
  139. return;
  140. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  141. atomic_read(&priv->pm_count));
  142. pm_relax(&priv->pdev->dev);
  143. priv->stats.pm_relax++;
  144. }
  145. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  146. {
  147. switch (type) {
  148. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  149. return "SERVER_ARRIVE";
  150. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  151. return "SERVER_EXIT";
  152. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  153. return "FW_READY";
  154. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  155. return "REGISTER_DRIVER";
  156. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  157. return "UNREGISTER_DRIVER";
  158. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  159. return "PD_SERVICE_DOWN";
  160. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  161. return "FW_EARLY_CRASH_IND";
  162. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  163. return "IDLE_SHUTDOWN";
  164. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  165. return "IDLE_RESTART";
  166. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  167. return "FW_INIT_DONE";
  168. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  169. return "QDSS_TRACE_REQ_MEM";
  170. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  171. return "QDSS_TRACE_SAVE";
  172. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  173. return "QDSS_TRACE_FREE";
  174. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  175. return "M3_DUMP_UPLOAD";
  176. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  177. return "QDSS_TRACE_REQ_DATA";
  178. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  179. return "SUBSYS_RESTART_LEVEL";
  180. case ICNSS_DRIVER_EVENT_MAX:
  181. return "EVENT_MAX";
  182. }
  183. return "UNKNOWN";
  184. };
  185. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  186. {
  187. switch (type) {
  188. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  189. return "SOC_WAKE_REQUEST";
  190. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  191. return "SOC_WAKE_RELEASE";
  192. case ICNSS_SOC_WAKE_EVENT_MAX:
  193. return "SOC_EVENT_MAX";
  194. }
  195. return "UNKNOWN";
  196. };
  197. int icnss_driver_event_post(struct icnss_priv *priv,
  198. enum icnss_driver_event_type type,
  199. u32 flags, void *data)
  200. {
  201. struct icnss_driver_event *event;
  202. unsigned long irq_flags;
  203. int gfp = GFP_KERNEL;
  204. int ret = 0;
  205. if (!priv)
  206. return -ENODEV;
  207. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  208. icnss_driver_event_to_str(type), type, current->comm,
  209. flags, priv->state);
  210. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  211. icnss_pr_err("Invalid Event type: %d, can't post", type);
  212. return -EINVAL;
  213. }
  214. if (in_interrupt() || irqs_disabled())
  215. gfp = GFP_ATOMIC;
  216. event = kzalloc(sizeof(*event), gfp);
  217. if (event == NULL)
  218. return -ENOMEM;
  219. icnss_pm_stay_awake(priv);
  220. event->type = type;
  221. event->data = data;
  222. init_completion(&event->complete);
  223. event->ret = ICNSS_EVENT_PENDING;
  224. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  225. spin_lock_irqsave(&priv->event_lock, irq_flags);
  226. list_add_tail(&event->list, &priv->event_list);
  227. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  228. priv->stats.events[type].posted++;
  229. queue_work(priv->event_wq, &priv->event_work);
  230. if (!(flags & ICNSS_EVENT_SYNC))
  231. goto out;
  232. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  233. wait_for_completion(&event->complete);
  234. else
  235. ret = wait_for_completion_interruptible(&event->complete);
  236. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  237. icnss_driver_event_to_str(type), type, priv->state, ret,
  238. event->ret);
  239. spin_lock_irqsave(&priv->event_lock, irq_flags);
  240. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  241. event->sync = false;
  242. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  243. ret = -EINTR;
  244. goto out;
  245. }
  246. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  247. ret = event->ret;
  248. kfree(event);
  249. out:
  250. icnss_pm_relax(priv);
  251. return ret;
  252. }
  253. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  254. enum icnss_soc_wake_event_type type,
  255. u32 flags, void *data)
  256. {
  257. struct icnss_soc_wake_event *event;
  258. unsigned long irq_flags;
  259. int gfp = GFP_KERNEL;
  260. int ret = 0;
  261. if (!priv)
  262. return -ENODEV;
  263. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  264. icnss_soc_wake_event_to_str(type),
  265. type, current->comm, flags, priv->state);
  266. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  267. icnss_pr_err("Invalid Event type: %d, can't post", type);
  268. return -EINVAL;
  269. }
  270. if (in_interrupt() || irqs_disabled())
  271. gfp = GFP_ATOMIC;
  272. event = kzalloc(sizeof(*event), gfp);
  273. if (!event)
  274. return -ENOMEM;
  275. icnss_pm_stay_awake(priv);
  276. event->type = type;
  277. event->data = data;
  278. init_completion(&event->complete);
  279. event->ret = ICNSS_EVENT_PENDING;
  280. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  281. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  282. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  283. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  284. priv->stats.soc_wake_events[type].posted++;
  285. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  286. if (!(flags & ICNSS_EVENT_SYNC))
  287. goto out;
  288. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  289. wait_for_completion(&event->complete);
  290. else
  291. ret = wait_for_completion_interruptible(&event->complete);
  292. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  293. icnss_soc_wake_event_to_str(type),
  294. type, priv->state, ret, event->ret);
  295. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  296. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  297. event->sync = false;
  298. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  299. ret = -EINTR;
  300. goto out;
  301. }
  302. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  303. ret = event->ret;
  304. kfree(event);
  305. out:
  306. icnss_pm_relax(priv);
  307. return ret;
  308. }
  309. bool icnss_is_fw_ready(void)
  310. {
  311. if (!penv)
  312. return false;
  313. else
  314. return test_bit(ICNSS_FW_READY, &penv->state);
  315. }
  316. EXPORT_SYMBOL(icnss_is_fw_ready);
  317. void icnss_block_shutdown(bool status)
  318. {
  319. if (!penv)
  320. return;
  321. if (status) {
  322. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  323. reinit_completion(&penv->unblock_shutdown);
  324. } else {
  325. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  326. complete(&penv->unblock_shutdown);
  327. }
  328. }
  329. EXPORT_SYMBOL(icnss_block_shutdown);
  330. bool icnss_is_fw_down(void)
  331. {
  332. struct icnss_priv *priv = icnss_get_plat_priv();
  333. if (!priv)
  334. return false;
  335. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  336. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  337. test_bit(ICNSS_REJUVENATE, &priv->state);
  338. }
  339. EXPORT_SYMBOL(icnss_is_fw_down);
  340. unsigned long icnss_get_device_config(void)
  341. {
  342. struct icnss_priv *priv = icnss_get_plat_priv();
  343. if (!priv)
  344. return 0;
  345. return priv->device_config;
  346. }
  347. EXPORT_SYMBOL(icnss_get_device_config);
  348. bool icnss_is_rejuvenate(void)
  349. {
  350. if (!penv)
  351. return false;
  352. else
  353. return test_bit(ICNSS_REJUVENATE, &penv->state);
  354. }
  355. EXPORT_SYMBOL(icnss_is_rejuvenate);
  356. bool icnss_is_pdr(void)
  357. {
  358. if (!penv)
  359. return false;
  360. else
  361. return test_bit(ICNSS_PDR, &penv->state);
  362. }
  363. EXPORT_SYMBOL(icnss_is_pdr);
  364. static int icnss_send_smp2p(struct icnss_priv *priv,
  365. enum icnss_smp2p_msg_id msg_id,
  366. enum smp2p_out_entry smp2p_entry)
  367. {
  368. unsigned int value = 0;
  369. int ret;
  370. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  371. return -EINVAL;
  372. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  373. if (msg_id == ICNSS_RESET_MSG) {
  374. priv->smp2p_info[smp2p_entry].seq = 0;
  375. ret = qcom_smem_state_update_bits(
  376. priv->smp2p_info[smp2p_entry].smem_state,
  377. ICNSS_SMEM_VALUE_MASK,
  378. 0);
  379. if (ret)
  380. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  381. ret, icnss_smp2p_str[smp2p_entry]);
  382. return ret;
  383. }
  384. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  385. return -ENODEV;
  386. value |= priv->smp2p_info[smp2p_entry].seq++;
  387. value <<= ICNSS_SMEM_SEQ_NO_POS;
  388. value |= msg_id;
  389. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  390. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  391. reinit_completion(&penv->smp2p_soc_wake_wait);
  392. ret = qcom_smem_state_update_bits(
  393. priv->smp2p_info[smp2p_entry].smem_state,
  394. ICNSS_SMEM_VALUE_MASK,
  395. value);
  396. if (ret) {
  397. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  398. icnss_smp2p_str[smp2p_entry]);
  399. } else {
  400. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  401. msg_id == ICNSS_SOC_WAKE_REL) {
  402. if (!wait_for_completion_timeout(
  403. &priv->smp2p_soc_wake_wait,
  404. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  405. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  406. icnss_smp2p_str[smp2p_entry]);
  407. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  408. ICNSS_ASSERT(0);
  409. }
  410. }
  411. }
  412. return ret;
  413. }
  414. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  415. {
  416. struct icnss_priv *priv = ctx;
  417. if (priv)
  418. priv->force_err_fatal = true;
  419. icnss_pr_err("Received force error fatal request from FW\n");
  420. return IRQ_HANDLED;
  421. }
  422. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  423. {
  424. struct icnss_priv *priv = ctx;
  425. struct icnss_uevent_fw_down_data fw_down_data = {0};
  426. icnss_pr_err("Received early crash indication from FW\n");
  427. if (priv) {
  428. set_bit(ICNSS_FW_DOWN, &priv->state);
  429. icnss_ignore_fw_timeout(true);
  430. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  431. clear_bit(ICNSS_FW_READY, &priv->state);
  432. fw_down_data.crashed = true;
  433. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  434. &fw_down_data);
  435. }
  436. }
  437. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  438. 0, NULL);
  439. return IRQ_HANDLED;
  440. }
  441. static void register_fw_error_notifications(struct device *dev)
  442. {
  443. struct icnss_priv *priv = dev_get_drvdata(dev);
  444. struct device_node *dev_node;
  445. int irq = 0, ret = 0;
  446. if (!priv)
  447. return;
  448. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  449. if (!dev_node) {
  450. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  451. return;
  452. }
  453. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  454. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  455. ret = irq = of_irq_get_byname(dev_node,
  456. "qcom,smp2p-force-fatal-error");
  457. if (ret < 0) {
  458. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  459. irq);
  460. return;
  461. }
  462. }
  463. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  464. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  465. "wlanfw-err", priv);
  466. if (ret < 0) {
  467. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  468. irq, ret);
  469. return;
  470. }
  471. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  472. priv->fw_error_fatal_irq = irq;
  473. }
  474. static void register_early_crash_notifications(struct device *dev)
  475. {
  476. struct icnss_priv *priv = dev_get_drvdata(dev);
  477. struct device_node *dev_node;
  478. int irq = 0, ret = 0;
  479. if (!priv)
  480. return;
  481. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  482. if (!dev_node) {
  483. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  484. return;
  485. }
  486. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  487. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  488. ret = irq = of_irq_get_byname(dev_node,
  489. "qcom,smp2p-early-crash-ind");
  490. if (ret < 0) {
  491. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  492. irq);
  493. return;
  494. }
  495. }
  496. ret = devm_request_threaded_irq(dev, irq, NULL,
  497. fw_crash_indication_handler,
  498. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  499. "wlanfw-early-crash-ind", priv);
  500. if (ret < 0) {
  501. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  502. irq, ret);
  503. return;
  504. }
  505. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  506. priv->fw_early_crash_irq = irq;
  507. }
  508. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  509. {
  510. struct thermal_zone_device *thermal_dev;
  511. const char *tsens;
  512. int ret;
  513. ret = of_property_read_string(priv->pdev->dev.of_node,
  514. "tsens",
  515. &tsens);
  516. if (ret)
  517. return ret;
  518. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  519. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  520. if (IS_ERR(thermal_dev)) {
  521. icnss_pr_err("Fail to get thermal zone. ret: %d",
  522. PTR_ERR(thermal_dev));
  523. return PTR_ERR(thermal_dev);
  524. }
  525. ret = thermal_zone_get_temp(thermal_dev, temp);
  526. if (ret)
  527. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  528. return ret;
  529. }
  530. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  531. {
  532. struct icnss_priv *priv = ctx;
  533. if (priv)
  534. complete(&priv->smp2p_soc_wake_wait);
  535. return IRQ_HANDLED;
  536. }
  537. static void register_soc_wake_notif(struct device *dev)
  538. {
  539. struct icnss_priv *priv = dev_get_drvdata(dev);
  540. struct device_node *dev_node;
  541. int irq = 0, ret = 0;
  542. if (!priv)
  543. return;
  544. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  545. if (!dev_node) {
  546. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  547. return;
  548. }
  549. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  550. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  551. ret = irq = of_irq_get_byname(dev_node,
  552. "qcom,smp2p-soc-wake-ack");
  553. if (ret < 0) {
  554. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  555. irq);
  556. return;
  557. }
  558. }
  559. ret = devm_request_threaded_irq(dev, irq, NULL,
  560. fw_soc_wake_ack_handler,
  561. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  562. IRQF_TRIGGER_FALLING,
  563. "wlanfw-soc-wake-ack", priv);
  564. if (ret < 0) {
  565. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  566. irq, ret);
  567. return;
  568. }
  569. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  570. priv->fw_soc_wake_ack_irq = irq;
  571. }
  572. int icnss_call_driver_uevent(struct icnss_priv *priv,
  573. enum icnss_uevent uevent, void *data)
  574. {
  575. struct icnss_uevent_data uevent_data;
  576. if (!priv->ops || !priv->ops->uevent)
  577. return 0;
  578. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  579. priv->state, uevent);
  580. uevent_data.uevent = uevent;
  581. uevent_data.data = data;
  582. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  583. }
  584. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  585. {
  586. int i;
  587. int ret = 0;
  588. ret = icnss_qmi_get_dms_mac(priv);
  589. if (ret == 0 && priv->dms.mac_valid)
  590. goto qmi_send;
  591. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  592. * Thus assert on failure to get MAC from DMS even after retries
  593. */
  594. if (priv->use_nv_mac) {
  595. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  596. if (priv->dms.mac_valid)
  597. break;
  598. ret = icnss_qmi_get_dms_mac(priv);
  599. if (ret != -EAGAIN)
  600. break;
  601. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  602. }
  603. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  604. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  605. ICNSS_ASSERT(0);
  606. return -EINVAL;
  607. }
  608. }
  609. qmi_send:
  610. if (priv->dms.mac_valid)
  611. ret =
  612. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  613. ARRAY_SIZE(priv->dms.mac));
  614. return ret;
  615. }
  616. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  617. enum smp2p_out_entry smp2p_entry)
  618. {
  619. int retry = 0;
  620. int error;
  621. if (priv->smp2p_info[smp2p_entry].smem_state)
  622. return;
  623. retry:
  624. priv->smp2p_info[smp2p_entry].smem_state =
  625. qcom_smem_state_get(&priv->pdev->dev,
  626. icnss_smp2p_str[smp2p_entry],
  627. &priv->smp2p_info[smp2p_entry].smem_bit);
  628. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  629. if (retry++ < SMP2P_GET_MAX_RETRY) {
  630. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  631. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  632. error, icnss_smp2p_str[smp2p_entry]);
  633. msleep(SMP2P_GET_RETRY_DELAY_MS);
  634. goto retry;
  635. }
  636. ICNSS_ASSERT(0);
  637. return;
  638. }
  639. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  640. }
  641. static inline
  642. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  643. {
  644. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  645. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  646. } else {
  647. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  648. }
  649. }
  650. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  651. void *data)
  652. {
  653. int ret = 0;
  654. int temp = 0;
  655. bool ignore_assert = false;
  656. if (!priv)
  657. return -ENODEV;
  658. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  659. clear_bit(ICNSS_FW_DOWN, &priv->state);
  660. clear_bit(ICNSS_FW_READY, &priv->state);
  661. icnss_ignore_fw_timeout(false);
  662. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  663. icnss_pr_err("QMI Server already in Connected State\n");
  664. ICNSS_ASSERT(0);
  665. }
  666. ret = icnss_connect_to_fw_server(priv, data);
  667. if (ret)
  668. goto fail;
  669. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  670. ret = wlfw_ind_register_send_sync_msg(priv);
  671. if (ret < 0) {
  672. if (ret == -EALREADY) {
  673. ret = 0;
  674. goto qmi_registered;
  675. }
  676. ignore_assert = true;
  677. goto fail;
  678. }
  679. if (priv->device_id == WCN6750_DEVICE_ID) {
  680. if (!icnss_get_temperature(priv, &temp)) {
  681. icnss_pr_dbg("Temperature: %d\n", temp);
  682. if (temp < WLAN_EN_TEMP_THRESHOLD)
  683. icnss_set_wlan_en_delay(priv);
  684. }
  685. ret = wlfw_host_cap_send_sync(priv);
  686. if (ret < 0)
  687. goto fail;
  688. }
  689. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  690. if (!priv->msa_va) {
  691. icnss_pr_err("Invalid MSA address\n");
  692. ret = -EINVAL;
  693. goto fail;
  694. }
  695. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  696. if (ret < 0) {
  697. ignore_assert = true;
  698. goto fail;
  699. }
  700. ret = wlfw_msa_ready_send_sync_msg(priv);
  701. if (ret < 0) {
  702. ignore_assert = true;
  703. goto fail;
  704. }
  705. }
  706. ret = wlfw_cap_send_sync_msg(priv);
  707. if (ret < 0) {
  708. ignore_assert = true;
  709. goto fail;
  710. }
  711. ret = icnss_hw_power_on(priv);
  712. if (ret)
  713. goto fail;
  714. if (priv->device_id == WCN6750_DEVICE_ID) {
  715. ret = wlfw_device_info_send_msg(priv);
  716. if (ret < 0) {
  717. ignore_assert = true;
  718. goto device_info_failure;
  719. }
  720. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  721. priv->mem_base_pa,
  722. priv->mem_base_size);
  723. if (!priv->mem_base_va) {
  724. icnss_pr_err("Ioremap failed for bar address\n");
  725. goto device_info_failure;
  726. }
  727. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  728. &priv->mem_base_pa,
  729. priv->mem_base_va);
  730. if (priv->mhi_state_info_pa)
  731. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  732. priv->mhi_state_info_pa,
  733. PAGE_SIZE);
  734. if (!priv->mhi_state_info_va)
  735. icnss_pr_err("Ioremap failed for MHI info address\n");
  736. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  737. &priv->mhi_state_info_pa,
  738. priv->mhi_state_info_va);
  739. }
  740. if (priv->bdf_download_support) {
  741. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  742. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  743. priv->ctrl_params.bdf_type);
  744. if (ret < 0)
  745. goto device_info_failure;
  746. }
  747. if (priv->device_id == WCN6750_DEVICE_ID) {
  748. if (!priv->fw_soc_wake_ack_irq)
  749. register_soc_wake_notif(&priv->pdev->dev);
  750. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  751. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  752. }
  753. if (priv->wpss_supported)
  754. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  755. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  756. if (priv->bdf_download_support) {
  757. ret = wlfw_cal_report_req(priv);
  758. if (ret < 0)
  759. goto device_info_failure;
  760. }
  761. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  762. dynamic_feature_mask);
  763. }
  764. if (!priv->fw_error_fatal_irq)
  765. register_fw_error_notifications(&priv->pdev->dev);
  766. if (!priv->fw_early_crash_irq)
  767. register_early_crash_notifications(&priv->pdev->dev);
  768. if (priv->psf_supported)
  769. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  770. return ret;
  771. device_info_failure:
  772. icnss_hw_power_off(priv);
  773. fail:
  774. ICNSS_ASSERT(ignore_assert);
  775. qmi_registered:
  776. return ret;
  777. }
  778. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  779. {
  780. if (!priv)
  781. return -ENODEV;
  782. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  783. icnss_clear_server(priv);
  784. if (priv->psf_supported)
  785. priv->last_updated_voltage = 0;
  786. return 0;
  787. }
  788. static int icnss_call_driver_probe(struct icnss_priv *priv)
  789. {
  790. int ret = 0;
  791. int probe_cnt = 0;
  792. if (!priv->ops || !priv->ops->probe)
  793. return 0;
  794. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  795. return -EINVAL;
  796. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  797. icnss_hw_power_on(priv);
  798. icnss_block_shutdown(true);
  799. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  800. ret = priv->ops->probe(&priv->pdev->dev);
  801. probe_cnt++;
  802. if (ret != -EPROBE_DEFER)
  803. break;
  804. }
  805. if (ret < 0) {
  806. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  807. ret, priv->state, probe_cnt);
  808. icnss_block_shutdown(false);
  809. goto out;
  810. }
  811. icnss_block_shutdown(false);
  812. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  813. return 0;
  814. out:
  815. icnss_hw_power_off(priv);
  816. return ret;
  817. }
  818. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  819. {
  820. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  821. goto out;
  822. if (!priv->ops || !priv->ops->shutdown)
  823. goto out;
  824. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  825. goto out;
  826. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  827. priv->ops->shutdown(&priv->pdev->dev);
  828. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  829. out:
  830. return 0;
  831. }
  832. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  833. {
  834. int ret = 0;
  835. icnss_pm_relax(priv);
  836. icnss_call_driver_shutdown(priv);
  837. clear_bit(ICNSS_PDR, &priv->state);
  838. clear_bit(ICNSS_REJUVENATE, &priv->state);
  839. clear_bit(ICNSS_PD_RESTART, &priv->state);
  840. priv->early_crash_ind = false;
  841. priv->is_ssr = false;
  842. if (!priv->ops || !priv->ops->reinit)
  843. goto out;
  844. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  845. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  846. priv->state);
  847. goto out;
  848. }
  849. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  850. goto call_probe;
  851. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  852. icnss_hw_power_on(priv);
  853. icnss_block_shutdown(true);
  854. ret = priv->ops->reinit(&priv->pdev->dev);
  855. if (ret < 0) {
  856. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  857. ret, priv->state);
  858. if (!priv->allow_recursive_recovery)
  859. ICNSS_ASSERT(false);
  860. icnss_block_shutdown(false);
  861. goto out_power_off;
  862. }
  863. icnss_block_shutdown(false);
  864. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  865. return 0;
  866. call_probe:
  867. return icnss_call_driver_probe(priv);
  868. out_power_off:
  869. icnss_hw_power_off(priv);
  870. out:
  871. return ret;
  872. }
  873. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  874. {
  875. int ret = 0;
  876. if (!priv)
  877. return -ENODEV;
  878. set_bit(ICNSS_FW_READY, &priv->state);
  879. clear_bit(ICNSS_MODE_ON, &priv->state);
  880. atomic_set(&priv->soc_wake_ref_count, 0);
  881. if (priv->device_id == WCN6750_DEVICE_ID)
  882. icnss_free_qdss_mem(priv);
  883. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  884. icnss_hw_power_off(priv);
  885. if (!priv->pdev) {
  886. icnss_pr_err("Device is not ready\n");
  887. ret = -ENODEV;
  888. goto out;
  889. }
  890. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  891. ret = icnss_pd_restart_complete(priv);
  892. } else {
  893. if (priv->wpss_supported)
  894. icnss_setup_dms_mac(priv);
  895. ret = icnss_call_driver_probe(priv);
  896. }
  897. icnss_vreg_unvote(priv);
  898. out:
  899. return ret;
  900. }
  901. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  902. {
  903. int ret = 0;
  904. if (!priv)
  905. return -ENODEV;
  906. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  907. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  908. icnss_pr_info("Failed to download qdss configuration file");
  909. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state))
  910. ret = wlfw_wlan_mode_send_sync_msg(priv,
  911. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  912. else
  913. icnss_driver_event_fw_ready_ind(priv, NULL);
  914. return ret;
  915. }
  916. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  917. {
  918. struct platform_device *pdev = priv->pdev;
  919. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  920. int i, j;
  921. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  922. if (!qdss_mem[i].va && qdss_mem[i].size) {
  923. qdss_mem[i].va =
  924. dma_alloc_coherent(&pdev->dev,
  925. qdss_mem[i].size,
  926. &qdss_mem[i].pa,
  927. GFP_KERNEL);
  928. if (!qdss_mem[i].va) {
  929. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  930. qdss_mem[i].size,
  931. qdss_mem[i].type, i);
  932. break;
  933. }
  934. }
  935. }
  936. /* Best-effort allocation for QDSS trace */
  937. if (i < priv->qdss_mem_seg_len) {
  938. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  939. qdss_mem[j].type = 0;
  940. qdss_mem[j].size = 0;
  941. }
  942. priv->qdss_mem_seg_len = i;
  943. }
  944. return 0;
  945. }
  946. void icnss_free_qdss_mem(struct icnss_priv *priv)
  947. {
  948. struct platform_device *pdev = priv->pdev;
  949. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  950. int i;
  951. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  952. if (qdss_mem[i].va && qdss_mem[i].size) {
  953. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  954. &qdss_mem[i].pa, qdss_mem[i].size,
  955. qdss_mem[i].type);
  956. dma_free_coherent(&pdev->dev,
  957. qdss_mem[i].size, qdss_mem[i].va,
  958. qdss_mem[i].pa);
  959. qdss_mem[i].va = NULL;
  960. qdss_mem[i].pa = 0;
  961. qdss_mem[i].size = 0;
  962. qdss_mem[i].type = 0;
  963. }
  964. }
  965. priv->qdss_mem_seg_len = 0;
  966. }
  967. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  968. {
  969. int ret = 0;
  970. ret = icnss_alloc_qdss_mem(priv);
  971. if (ret < 0)
  972. return ret;
  973. return wlfw_qdss_trace_mem_info_send_sync(priv);
  974. }
  975. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  976. u64 pa, u32 size, int *seg_id)
  977. {
  978. int i = 0;
  979. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  980. u64 offset = 0;
  981. void *va = NULL;
  982. u64 local_pa;
  983. u32 local_size;
  984. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  985. local_pa = (u64)qdss_mem[i].pa;
  986. local_size = (u32)qdss_mem[i].size;
  987. if (pa == local_pa && size <= local_size) {
  988. va = qdss_mem[i].va;
  989. break;
  990. }
  991. if (pa > local_pa &&
  992. pa < local_pa + local_size &&
  993. pa + size <= local_pa + local_size) {
  994. offset = pa - local_pa;
  995. va = qdss_mem[i].va + offset;
  996. break;
  997. }
  998. }
  999. *seg_id = i;
  1000. return va;
  1001. }
  1002. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1003. void *data)
  1004. {
  1005. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1006. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1007. int ret = 0;
  1008. int i;
  1009. void *va = NULL;
  1010. u64 pa;
  1011. u32 size;
  1012. int seg_id = 0;
  1013. if (!priv->qdss_mem_seg_len) {
  1014. icnss_pr_err("Memory for QDSS trace is not available\n");
  1015. return -ENOMEM;
  1016. }
  1017. if (event_data->mem_seg_len == 0) {
  1018. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1019. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1020. ICNSS_GENL_MSG_TYPE_QDSS,
  1021. event_data->file_name,
  1022. qdss_mem[i].size);
  1023. if (ret < 0) {
  1024. icnss_pr_err("Fail to save QDSS data: %d\n",
  1025. ret);
  1026. break;
  1027. }
  1028. }
  1029. } else {
  1030. for (i = 0; i < event_data->mem_seg_len; i++) {
  1031. pa = event_data->mem_seg[i].addr;
  1032. size = event_data->mem_seg[i].size;
  1033. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1034. size, &seg_id);
  1035. if (!va) {
  1036. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1037. &pa);
  1038. ret = -EINVAL;
  1039. break;
  1040. }
  1041. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1042. event_data->file_name, size);
  1043. if (ret < 0) {
  1044. icnss_pr_err("Fail to save QDSS data: %d\n",
  1045. ret);
  1046. break;
  1047. }
  1048. }
  1049. }
  1050. kfree(data);
  1051. return ret;
  1052. }
  1053. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1054. {
  1055. int dec, c = atomic_read(v);
  1056. do {
  1057. dec = c - 1;
  1058. if (unlikely(dec < 1))
  1059. break;
  1060. } while (!atomic_try_cmpxchg(v, &c, dec));
  1061. return dec;
  1062. }
  1063. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1064. void *data)
  1065. {
  1066. int ret = 0;
  1067. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1068. if (!priv)
  1069. return -ENODEV;
  1070. if (!data)
  1071. return -EINVAL;
  1072. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1073. event_data->total_size);
  1074. kfree(data);
  1075. return ret;
  1076. }
  1077. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1078. {
  1079. int ret = 0;
  1080. if (!priv)
  1081. return -ENODEV;
  1082. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1083. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1084. atomic_read(&priv->soc_wake_ref_count));
  1085. return 0;
  1086. }
  1087. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1088. ICNSS_SMP2P_OUT_SOC_WAKE);
  1089. if (!ret)
  1090. atomic_inc(&priv->soc_wake_ref_count);
  1091. return ret;
  1092. }
  1093. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1094. {
  1095. int ret = 0;
  1096. if (!priv)
  1097. return -ENODEV;
  1098. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1099. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1100. priv->soc_wake_ref_count);
  1101. return 0;
  1102. }
  1103. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1104. ICNSS_SMP2P_OUT_SOC_WAKE);
  1105. return ret;
  1106. }
  1107. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1108. void *data)
  1109. {
  1110. int ret = 0;
  1111. int probe_cnt = 0;
  1112. if (priv->ops)
  1113. return -EEXIST;
  1114. priv->ops = data;
  1115. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1116. set_bit(ICNSS_FW_READY, &priv->state);
  1117. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1118. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1119. priv->state);
  1120. return -ENODEV;
  1121. }
  1122. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1123. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1124. priv->state);
  1125. goto out;
  1126. }
  1127. ret = icnss_hw_power_on(priv);
  1128. if (ret)
  1129. goto out;
  1130. icnss_block_shutdown(true);
  1131. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1132. ret = priv->ops->probe(&priv->pdev->dev);
  1133. probe_cnt++;
  1134. if (ret != -EPROBE_DEFER)
  1135. break;
  1136. }
  1137. if (ret) {
  1138. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1139. ret, priv->state, probe_cnt);
  1140. icnss_block_shutdown(false);
  1141. goto power_off;
  1142. }
  1143. icnss_block_shutdown(false);
  1144. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1145. return 0;
  1146. power_off:
  1147. icnss_hw_power_off(priv);
  1148. out:
  1149. return ret;
  1150. }
  1151. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1152. void *data)
  1153. {
  1154. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1155. priv->ops = NULL;
  1156. goto out;
  1157. }
  1158. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1159. icnss_block_shutdown(true);
  1160. if (priv->ops)
  1161. priv->ops->remove(&priv->pdev->dev);
  1162. icnss_block_shutdown(false);
  1163. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1164. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1165. priv->ops = NULL;
  1166. icnss_hw_power_off(priv);
  1167. out:
  1168. return 0;
  1169. }
  1170. static int icnss_fw_crashed(struct icnss_priv *priv,
  1171. struct icnss_event_pd_service_down_data *event_data)
  1172. {
  1173. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1174. set_bit(ICNSS_PD_RESTART, &priv->state);
  1175. clear_bit(ICNSS_FW_READY, &priv->state);
  1176. icnss_pm_stay_awake(priv);
  1177. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1178. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1179. if (event_data && event_data->fw_rejuvenate)
  1180. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1181. return 0;
  1182. }
  1183. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1184. struct icnss_uevent_hang_data *hang_data)
  1185. {
  1186. if (!priv->hang_event_data_va)
  1187. return -EINVAL;
  1188. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1189. priv->hang_event_data_len,
  1190. GFP_ATOMIC);
  1191. if (!priv->hang_event_data)
  1192. return -ENOMEM;
  1193. // Update the hang event params
  1194. hang_data->hang_event_data = priv->hang_event_data;
  1195. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1196. return 0;
  1197. }
  1198. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1199. {
  1200. struct icnss_uevent_hang_data hang_data = {0};
  1201. int ret = 0xFF;
  1202. if (priv->early_crash_ind) {
  1203. ret = icnss_update_hang_event_data(priv, &hang_data);
  1204. if (ret)
  1205. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1206. }
  1207. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1208. &hang_data);
  1209. if (!ret) {
  1210. kfree(priv->hang_event_data);
  1211. priv->hang_event_data = NULL;
  1212. }
  1213. return 0;
  1214. }
  1215. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1216. void *data)
  1217. {
  1218. struct icnss_event_pd_service_down_data *event_data = data;
  1219. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1220. icnss_ignore_fw_timeout(false);
  1221. goto out;
  1222. }
  1223. if (priv->force_err_fatal)
  1224. ICNSS_ASSERT(0);
  1225. if (priv->device_id == WCN6750_DEVICE_ID) {
  1226. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1227. ICNSS_SMP2P_OUT_SOC_WAKE);
  1228. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1229. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1230. }
  1231. if (priv->wpss_supported)
  1232. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1233. ICNSS_SMP2P_OUT_POWER_SAVE);
  1234. icnss_send_hang_event_data(priv);
  1235. if (priv->early_crash_ind) {
  1236. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1237. event_data->crashed, priv->state);
  1238. goto out;
  1239. }
  1240. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1241. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1242. event_data->crashed, priv->state);
  1243. if (!priv->allow_recursive_recovery)
  1244. ICNSS_ASSERT(0);
  1245. goto out;
  1246. }
  1247. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1248. icnss_fw_crashed(priv, event_data);
  1249. out:
  1250. kfree(data);
  1251. return 0;
  1252. }
  1253. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1254. void *data)
  1255. {
  1256. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1257. icnss_ignore_fw_timeout(false);
  1258. goto out;
  1259. }
  1260. priv->early_crash_ind = true;
  1261. icnss_fw_crashed(priv, NULL);
  1262. out:
  1263. kfree(data);
  1264. return 0;
  1265. }
  1266. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1267. void *data)
  1268. {
  1269. int ret = 0;
  1270. if (!priv->ops || !priv->ops->idle_shutdown)
  1271. return 0;
  1272. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1273. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1274. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1275. ret = -EBUSY;
  1276. } else {
  1277. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1278. priv->state);
  1279. icnss_block_shutdown(true);
  1280. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1281. icnss_block_shutdown(false);
  1282. }
  1283. return ret;
  1284. }
  1285. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1286. void *data)
  1287. {
  1288. int ret = 0;
  1289. if (!priv->ops || !priv->ops->idle_restart)
  1290. return 0;
  1291. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1292. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1293. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1294. ret = -EBUSY;
  1295. } else {
  1296. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1297. priv->state);
  1298. icnss_block_shutdown(true);
  1299. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1300. icnss_block_shutdown(false);
  1301. }
  1302. return ret;
  1303. }
  1304. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1305. {
  1306. icnss_free_qdss_mem(priv);
  1307. return 0;
  1308. }
  1309. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1310. void *data)
  1311. {
  1312. struct icnss_m3_upload_segments_req_data *event_data = data;
  1313. struct qcom_dump_segment segment;
  1314. int i, status = 0, ret = 0;
  1315. struct list_head head;
  1316. if (!dump_enabled()) {
  1317. icnss_pr_info("Dump collection is not enabled\n");
  1318. return ret;
  1319. }
  1320. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1321. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1322. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1323. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1324. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1325. return ret;
  1326. INIT_LIST_HEAD(&head);
  1327. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1328. memset(&segment, 0, sizeof(segment));
  1329. segment.va = devm_ioremap(&priv->pdev->dev,
  1330. event_data->m3_segment[i].addr,
  1331. event_data->m3_segment[i].size);
  1332. if (!segment.va) {
  1333. icnss_pr_err("Failed to ioremap M3 Dump region");
  1334. ret = -ENOMEM;
  1335. goto send_resp;
  1336. }
  1337. segment.size = event_data->m3_segment[i].size;
  1338. list_add(&segment.node, &head);
  1339. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1340. event_data->m3_segment[i].name);
  1341. switch (event_data->m3_segment[i].type) {
  1342. case QMI_M3_SEGMENT_PHYAREG_V01:
  1343. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1344. break;
  1345. case QMI_M3_SEGMENT_PHYDBG_V01:
  1346. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1347. break;
  1348. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1349. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1350. break;
  1351. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1352. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1353. break;
  1354. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1355. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1356. break;
  1357. default:
  1358. icnss_pr_err("Invalid Segment type: %d",
  1359. event_data->m3_segment[i].type);
  1360. }
  1361. if (ret) {
  1362. status = ret;
  1363. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1364. event_data->m3_segment[i].name, ret);
  1365. }
  1366. list_del(&segment.node);
  1367. }
  1368. send_resp:
  1369. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1370. status);
  1371. return ret;
  1372. }
  1373. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1374. {
  1375. int ret = 0;
  1376. struct icnss_subsys_restart_level_data *event_data = data;
  1377. if (!priv)
  1378. return -ENODEV;
  1379. if (!data)
  1380. return -EINVAL;
  1381. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1382. kfree(data);
  1383. return ret;
  1384. }
  1385. static void icnss_driver_event_work(struct work_struct *work)
  1386. {
  1387. struct icnss_priv *priv =
  1388. container_of(work, struct icnss_priv, event_work);
  1389. struct icnss_driver_event *event;
  1390. unsigned long flags;
  1391. int ret;
  1392. icnss_pm_stay_awake(priv);
  1393. spin_lock_irqsave(&priv->event_lock, flags);
  1394. while (!list_empty(&priv->event_list)) {
  1395. event = list_first_entry(&priv->event_list,
  1396. struct icnss_driver_event, list);
  1397. list_del(&event->list);
  1398. spin_unlock_irqrestore(&priv->event_lock, flags);
  1399. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1400. icnss_driver_event_to_str(event->type),
  1401. event->sync ? "-sync" : "", event->type,
  1402. priv->state);
  1403. switch (event->type) {
  1404. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1405. ret = icnss_driver_event_server_arrive(priv,
  1406. event->data);
  1407. break;
  1408. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1409. ret = icnss_driver_event_server_exit(priv);
  1410. break;
  1411. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1412. ret = icnss_driver_event_fw_ready_ind(priv,
  1413. event->data);
  1414. break;
  1415. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1416. ret = icnss_driver_event_register_driver(priv,
  1417. event->data);
  1418. break;
  1419. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1420. ret = icnss_driver_event_unregister_driver(priv,
  1421. event->data);
  1422. break;
  1423. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1424. ret = icnss_driver_event_pd_service_down(priv,
  1425. event->data);
  1426. break;
  1427. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1428. ret = icnss_driver_event_early_crash_ind(priv,
  1429. event->data);
  1430. break;
  1431. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1432. ret = icnss_driver_event_idle_shutdown(priv,
  1433. event->data);
  1434. break;
  1435. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1436. ret = icnss_driver_event_idle_restart(priv,
  1437. event->data);
  1438. break;
  1439. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1440. ret = icnss_driver_event_fw_init_done(priv,
  1441. event->data);
  1442. break;
  1443. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1444. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1445. break;
  1446. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1447. ret = icnss_qdss_trace_save_hdlr(priv,
  1448. event->data);
  1449. break;
  1450. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1451. ret = icnss_qdss_trace_free_hdlr(priv);
  1452. break;
  1453. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1454. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1455. break;
  1456. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1457. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1458. event->data);
  1459. break;
  1460. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1461. ret = icnss_subsys_restart_level(priv, event->data);
  1462. break;
  1463. default:
  1464. icnss_pr_err("Invalid Event type: %d", event->type);
  1465. kfree(event);
  1466. continue;
  1467. }
  1468. priv->stats.events[event->type].processed++;
  1469. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1470. icnss_driver_event_to_str(event->type),
  1471. event->sync ? "-sync" : "", event->type, ret,
  1472. priv->state);
  1473. spin_lock_irqsave(&priv->event_lock, flags);
  1474. if (event->sync) {
  1475. event->ret = ret;
  1476. complete(&event->complete);
  1477. continue;
  1478. }
  1479. spin_unlock_irqrestore(&priv->event_lock, flags);
  1480. kfree(event);
  1481. spin_lock_irqsave(&priv->event_lock, flags);
  1482. }
  1483. spin_unlock_irqrestore(&priv->event_lock, flags);
  1484. icnss_pm_relax(priv);
  1485. }
  1486. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1487. {
  1488. struct icnss_priv *priv =
  1489. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1490. struct icnss_soc_wake_event *event;
  1491. unsigned long flags;
  1492. int ret;
  1493. icnss_pm_stay_awake(priv);
  1494. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1495. while (!list_empty(&priv->soc_wake_msg_list)) {
  1496. event = list_first_entry(&priv->soc_wake_msg_list,
  1497. struct icnss_soc_wake_event, list);
  1498. list_del(&event->list);
  1499. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1500. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1501. icnss_soc_wake_event_to_str(event->type),
  1502. event->sync ? "-sync" : "", event->type,
  1503. priv->state);
  1504. switch (event->type) {
  1505. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1506. ret = icnss_event_soc_wake_request(priv,
  1507. event->data);
  1508. break;
  1509. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1510. ret = icnss_event_soc_wake_release(priv,
  1511. event->data);
  1512. break;
  1513. default:
  1514. icnss_pr_err("Invalid Event type: %d", event->type);
  1515. kfree(event);
  1516. continue;
  1517. }
  1518. priv->stats.soc_wake_events[event->type].processed++;
  1519. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1520. icnss_soc_wake_event_to_str(event->type),
  1521. event->sync ? "-sync" : "", event->type, ret,
  1522. priv->state);
  1523. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1524. if (event->sync) {
  1525. event->ret = ret;
  1526. complete(&event->complete);
  1527. continue;
  1528. }
  1529. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1530. kfree(event);
  1531. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1532. }
  1533. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1534. icnss_pm_relax(priv);
  1535. }
  1536. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1537. {
  1538. int ret = 0;
  1539. struct qcom_dump_segment segment;
  1540. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1541. struct list_head head;
  1542. if (!dump_enabled()) {
  1543. icnss_pr_info("Dump collection is not enabled\n");
  1544. return ret;
  1545. }
  1546. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1547. return ret;
  1548. INIT_LIST_HEAD(&head);
  1549. memset(&segment, 0, sizeof(segment));
  1550. segment.va = priv->msa_va;
  1551. segment.size = priv->msa_mem_size;
  1552. list_add(&segment.node, &head);
  1553. if (!msa0_dump_dev->dev) {
  1554. icnss_pr_err("Created Dump Device not found\n");
  1555. return 0;
  1556. }
  1557. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1558. if (ret) {
  1559. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1560. return ret;
  1561. }
  1562. list_del(&segment.node);
  1563. return ret;
  1564. }
  1565. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1566. void *data)
  1567. {
  1568. struct qcom_ssr_notify_data *notif = data;
  1569. int ret = 0;
  1570. if (!notif->crashed) {
  1571. if (atomic_read(&priv->is_shutdown)) {
  1572. atomic_set(&priv->is_shutdown, false);
  1573. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1574. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1575. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1576. clear_bit(ICNSS_FW_READY, &priv->state);
  1577. icnss_driver_event_post(priv,
  1578. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1579. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1580. NULL);
  1581. }
  1582. }
  1583. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1584. if (!wait_for_completion_timeout(
  1585. &priv->unblock_shutdown,
  1586. msecs_to_jiffies(PROBE_TIMEOUT)))
  1587. icnss_pr_err("modem block shutdown timeout\n");
  1588. }
  1589. ret = wlfw_send_modem_shutdown_msg(priv);
  1590. if (ret < 0)
  1591. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1592. ret);
  1593. }
  1594. }
  1595. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1596. {
  1597. switch (code) {
  1598. case QCOM_SSR_BEFORE_POWERUP:
  1599. return "BEFORE_POWERUP";
  1600. case QCOM_SSR_AFTER_POWERUP:
  1601. return "AFTER_POWERUP";
  1602. case QCOM_SSR_BEFORE_SHUTDOWN:
  1603. return "BEFORE_SHUTDOWN";
  1604. case QCOM_SSR_AFTER_SHUTDOWN:
  1605. return "AFTER_SHUTDOWN";
  1606. default:
  1607. return "UNKNOWN";
  1608. }
  1609. };
  1610. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1611. unsigned long code,
  1612. void *data)
  1613. {
  1614. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1615. wpss_early_ssr_nb);
  1616. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1617. icnss_qcom_ssr_notify_state_to_str(code), code);
  1618. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1619. set_bit(ICNSS_FW_DOWN, &priv->state);
  1620. icnss_ignore_fw_timeout(true);
  1621. }
  1622. return NOTIFY_DONE;
  1623. }
  1624. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1625. unsigned long code,
  1626. void *data)
  1627. {
  1628. struct icnss_event_pd_service_down_data *event_data;
  1629. struct qcom_ssr_notify_data *notif = data;
  1630. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1631. wpss_ssr_nb);
  1632. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1633. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1634. icnss_qcom_ssr_notify_state_to_str(code), code);
  1635. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1636. icnss_pr_info("Collecting msa0 segment dump\n");
  1637. icnss_msa0_ramdump(priv);
  1638. goto out;
  1639. }
  1640. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1641. goto out;
  1642. priv->is_ssr = true;
  1643. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1644. priv->state, notif->crashed);
  1645. set_bit(ICNSS_FW_DOWN, &priv->state);
  1646. if (notif->crashed)
  1647. priv->stats.recovery.root_pd_crash++;
  1648. else
  1649. priv->stats.recovery.root_pd_shutdown++;
  1650. icnss_ignore_fw_timeout(true);
  1651. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1652. if (event_data == NULL)
  1653. return notifier_from_errno(-ENOMEM);
  1654. event_data->crashed = notif->crashed;
  1655. fw_down_data.crashed = !!notif->crashed;
  1656. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1657. clear_bit(ICNSS_FW_READY, &priv->state);
  1658. fw_down_data.crashed = !!notif->crashed;
  1659. icnss_call_driver_uevent(priv,
  1660. ICNSS_UEVENT_FW_DOWN,
  1661. &fw_down_data);
  1662. }
  1663. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1664. ICNSS_EVENT_SYNC, event_data);
  1665. out:
  1666. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1667. return NOTIFY_OK;
  1668. }
  1669. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1670. unsigned long code,
  1671. void *data)
  1672. {
  1673. struct icnss_event_pd_service_down_data *event_data;
  1674. struct qcom_ssr_notify_data *notif = data;
  1675. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1676. modem_ssr_nb);
  1677. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1678. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1679. icnss_qcom_ssr_notify_state_to_str(code), code);
  1680. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1681. icnss_pr_info("Collecting msa0 segment dump\n");
  1682. icnss_msa0_ramdump(priv);
  1683. goto out;
  1684. }
  1685. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1686. goto out;
  1687. priv->is_ssr = true;
  1688. if (notif->crashed) {
  1689. priv->stats.recovery.root_pd_crash++;
  1690. priv->root_pd_shutdown = false;
  1691. } else {
  1692. priv->stats.recovery.root_pd_shutdown++;
  1693. priv->root_pd_shutdown = true;
  1694. }
  1695. icnss_update_state_send_modem_shutdown(priv, data);
  1696. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1697. set_bit(ICNSS_FW_DOWN, &priv->state);
  1698. icnss_ignore_fw_timeout(true);
  1699. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1700. clear_bit(ICNSS_FW_READY, &priv->state);
  1701. fw_down_data.crashed = !!notif->crashed;
  1702. icnss_call_driver_uevent(priv,
  1703. ICNSS_UEVENT_FW_DOWN,
  1704. &fw_down_data);
  1705. }
  1706. goto out;
  1707. }
  1708. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1709. priv->state, notif->crashed);
  1710. set_bit(ICNSS_FW_DOWN, &priv->state);
  1711. icnss_ignore_fw_timeout(true);
  1712. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1713. if (event_data == NULL)
  1714. return notifier_from_errno(-ENOMEM);
  1715. event_data->crashed = notif->crashed;
  1716. fw_down_data.crashed = !!notif->crashed;
  1717. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1718. clear_bit(ICNSS_FW_READY, &priv->state);
  1719. fw_down_data.crashed = !!notif->crashed;
  1720. icnss_call_driver_uevent(priv,
  1721. ICNSS_UEVENT_FW_DOWN,
  1722. &fw_down_data);
  1723. }
  1724. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1725. ICNSS_EVENT_SYNC, event_data);
  1726. out:
  1727. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1728. return NOTIFY_OK;
  1729. }
  1730. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1731. {
  1732. int ret = 0;
  1733. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1734. priv->wpss_early_notify_handler =
  1735. qcom_register_early_ssr_notifier("wpss",
  1736. &priv->wpss_early_ssr_nb);
  1737. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1738. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1739. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1740. }
  1741. return ret;
  1742. }
  1743. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1744. {
  1745. int ret = 0;
  1746. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1747. /*
  1748. * Assign priority of icnss wpss notifier callback over IPA
  1749. * modem notifier callback which is 0
  1750. */
  1751. priv->wpss_ssr_nb.priority = 1;
  1752. priv->wpss_notify_handler =
  1753. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1754. if (IS_ERR(priv->wpss_notify_handler)) {
  1755. ret = PTR_ERR(priv->wpss_notify_handler);
  1756. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1757. }
  1758. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1759. return ret;
  1760. }
  1761. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1762. {
  1763. int ret = 0;
  1764. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1765. /*
  1766. * Assign priority of icnss modem notifier callback over IPA
  1767. * modem notifier callback which is 0
  1768. */
  1769. priv->modem_ssr_nb.priority = 1;
  1770. priv->modem_notify_handler =
  1771. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1772. if (IS_ERR(priv->modem_notify_handler)) {
  1773. ret = PTR_ERR(priv->modem_notify_handler);
  1774. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1775. }
  1776. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1777. return ret;
  1778. }
  1779. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1780. {
  1781. if (IS_ERR(priv->wpss_early_notify_handler))
  1782. return;
  1783. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1784. &priv->wpss_early_ssr_nb);
  1785. priv->wpss_early_notify_handler = NULL;
  1786. }
  1787. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1788. {
  1789. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1790. return 0;
  1791. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1792. &priv->wpss_ssr_nb);
  1793. priv->wpss_notify_handler = NULL;
  1794. return 0;
  1795. }
  1796. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1797. {
  1798. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1799. return 0;
  1800. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1801. &priv->modem_ssr_nb);
  1802. priv->modem_notify_handler = NULL;
  1803. return 0;
  1804. }
  1805. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1806. {
  1807. struct icnss_priv *priv = priv_cb;
  1808. struct icnss_event_pd_service_down_data *event_data;
  1809. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1810. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1811. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1812. state, priv->state);
  1813. switch (state) {
  1814. case SERVREG_SERVICE_STATE_DOWN:
  1815. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1816. if (!event_data)
  1817. return;
  1818. event_data->crashed = true;
  1819. if (!priv->is_ssr) {
  1820. set_bit(ICNSS_PDR, &penv->state);
  1821. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1822. cause = ICNSS_HOST_ERROR;
  1823. priv->stats.recovery.pdr_host_error++;
  1824. } else {
  1825. cause = ICNSS_FW_CRASH;
  1826. priv->stats.recovery.pdr_fw_crash++;
  1827. }
  1828. } else if (priv->root_pd_shutdown) {
  1829. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1830. event_data->crashed = false;
  1831. }
  1832. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1833. priv->state, icnss_pdr_cause[cause]);
  1834. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1835. set_bit(ICNSS_FW_DOWN, &priv->state);
  1836. icnss_ignore_fw_timeout(true);
  1837. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1838. clear_bit(ICNSS_FW_READY, &priv->state);
  1839. fw_down_data.crashed = event_data->crashed;
  1840. icnss_call_driver_uevent(priv,
  1841. ICNSS_UEVENT_FW_DOWN,
  1842. &fw_down_data);
  1843. }
  1844. }
  1845. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1846. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1847. ICNSS_EVENT_SYNC, event_data);
  1848. break;
  1849. case SERVREG_SERVICE_STATE_UP:
  1850. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1851. break;
  1852. default:
  1853. break;
  1854. }
  1855. return;
  1856. }
  1857. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1858. {
  1859. struct pdr_handle *handle = NULL;
  1860. struct pdr_service *service = NULL;
  1861. int err = 0;
  1862. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1863. if (IS_ERR_OR_NULL(handle)) {
  1864. err = PTR_ERR(handle);
  1865. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1866. goto out;
  1867. }
  1868. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1869. if (IS_ERR_OR_NULL(service)) {
  1870. err = PTR_ERR(service);
  1871. icnss_pr_err("Failed to add lookup, err %d", err);
  1872. goto out;
  1873. }
  1874. priv->pdr_handle = handle;
  1875. priv->pdr_service = service;
  1876. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1877. icnss_pr_info("PDR registration happened");
  1878. out:
  1879. return err;
  1880. }
  1881. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  1882. {
  1883. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  1884. return;
  1885. pdr_handle_release(priv->pdr_handle);
  1886. }
  1887. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  1888. {
  1889. int ret = 0;
  1890. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  1891. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  1892. ret = PTR_ERR(priv->icnss_ramdump_class);
  1893. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  1894. return ret;
  1895. }
  1896. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  1897. ICNSS_RAMDUMP_NAME);
  1898. if (ret < 0) {
  1899. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  1900. goto fail_alloc_major;
  1901. }
  1902. return 0;
  1903. fail_alloc_major:
  1904. class_destroy(priv->icnss_ramdump_class);
  1905. return ret;
  1906. }
  1907. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  1908. {
  1909. int ret = 0;
  1910. struct icnss_ramdump_info *ramdump_info;
  1911. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  1912. if (!ramdump_info)
  1913. return ERR_PTR(-ENOMEM);
  1914. if (!dev_name) {
  1915. icnss_pr_err("%s: Invalid device name.\n", __func__);
  1916. return NULL;
  1917. }
  1918. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  1919. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  1920. if (ramdump_info->minor < 0) {
  1921. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  1922. ramdump_info->minor);
  1923. ret = -ENODEV;
  1924. goto fail_out_of_minors;
  1925. }
  1926. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  1927. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  1928. ramdump_info->minor),
  1929. ramdump_info, ramdump_info->name);
  1930. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  1931. ret = PTR_ERR(ramdump_info->dev);
  1932. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  1933. ramdump_info->name, ret);
  1934. goto fail_device_create;
  1935. }
  1936. return (void *)ramdump_info;
  1937. fail_device_create:
  1938. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  1939. fail_out_of_minors:
  1940. kfree(ramdump_info);
  1941. return ERR_PTR(ret);
  1942. }
  1943. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  1944. {
  1945. int ret = 0;
  1946. if (!priv || !priv->pdev) {
  1947. icnss_pr_err("Platform priv or pdev is NULL\n");
  1948. return -EINVAL;
  1949. }
  1950. ret = icnss_ramdump_devnode_init(priv);
  1951. if (ret)
  1952. return ret;
  1953. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  1954. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  1955. icnss_pr_err("Failed to create msa0 dump device!");
  1956. return -ENOMEM;
  1957. }
  1958. if (priv->device_id == WCN6750_DEVICE_ID) {
  1959. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  1960. ICNSS_M3_SEGMENT(
  1961. ICNSS_M3_SEGMENT_PHYAREG));
  1962. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1963. !priv->m3_dump_phyareg->dev) {
  1964. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  1965. return -ENOMEM;
  1966. }
  1967. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  1968. ICNSS_M3_SEGMENT(
  1969. ICNSS_M3_SEGMENT_PHYA));
  1970. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1971. !priv->m3_dump_phydbg->dev) {
  1972. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  1973. return -ENOMEM;
  1974. }
  1975. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  1976. ICNSS_M3_SEGMENT(
  1977. ICNSS_M3_SEGMENT_WMACREG));
  1978. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1979. !priv->m3_dump_wmac0reg->dev) {
  1980. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  1981. return -ENOMEM;
  1982. }
  1983. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  1984. ICNSS_M3_SEGMENT(
  1985. ICNSS_M3_SEGMENT_WCSSDBG));
  1986. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1987. !priv->m3_dump_wcssdbg->dev) {
  1988. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  1989. return -ENOMEM;
  1990. }
  1991. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  1992. ICNSS_M3_SEGMENT(
  1993. ICNSS_M3_SEGMENT_PHYAM3));
  1994. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  1995. !priv->m3_dump_phyapdmem->dev) {
  1996. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  1997. return -ENOMEM;
  1998. }
  1999. }
  2000. return 0;
  2001. }
  2002. static int icnss_enable_recovery(struct icnss_priv *priv)
  2003. {
  2004. int ret;
  2005. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2006. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2007. return 0;
  2008. }
  2009. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2010. icnss_pr_dbg("SSR disabled through module parameter\n");
  2011. goto enable_pdr;
  2012. }
  2013. ret = icnss_register_ramdump_devices(priv);
  2014. if (ret)
  2015. return ret;
  2016. if (priv->wpss_supported) {
  2017. icnss_wpss_early_ssr_register_notifier(priv);
  2018. icnss_wpss_ssr_register_notifier(priv);
  2019. return 0;
  2020. }
  2021. icnss_modem_ssr_register_notifier(priv);
  2022. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2023. icnss_pr_dbg("PDR disabled through module parameter\n");
  2024. return 0;
  2025. }
  2026. enable_pdr:
  2027. ret = icnss_pd_restart_enable(priv);
  2028. if (ret)
  2029. return ret;
  2030. return 0;
  2031. }
  2032. static int icnss_dev_id_match(struct icnss_priv *priv,
  2033. struct device_info *dev_info)
  2034. {
  2035. while (dev_info->device_id) {
  2036. if (priv->device_id == dev_info->device_id)
  2037. return 1;
  2038. dev_info++;
  2039. }
  2040. return 0;
  2041. }
  2042. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2043. unsigned long *thermal_state)
  2044. {
  2045. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2046. *thermal_state = icnss_tcdev->max_thermal_state;
  2047. return 0;
  2048. }
  2049. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2050. unsigned long *thermal_state)
  2051. {
  2052. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2053. *thermal_state = icnss_tcdev->curr_thermal_state;
  2054. return 0;
  2055. }
  2056. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2057. unsigned long thermal_state)
  2058. {
  2059. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2060. struct device *dev = &penv->pdev->dev;
  2061. int ret = 0;
  2062. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2063. return 0;
  2064. if (thermal_state > icnss_tcdev->max_thermal_state)
  2065. return -EINVAL;
  2066. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2067. thermal_state, icnss_tcdev->tcdev_id);
  2068. mutex_lock(&penv->tcdev_lock);
  2069. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2070. icnss_tcdev->tcdev_id);
  2071. if (!ret)
  2072. icnss_tcdev->curr_thermal_state = thermal_state;
  2073. mutex_unlock(&penv->tcdev_lock);
  2074. if (ret) {
  2075. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2076. ret, icnss_tcdev->tcdev_id);
  2077. return ret;
  2078. }
  2079. return 0;
  2080. }
  2081. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2082. .get_max_state = icnss_tcdev_get_max_state,
  2083. .get_cur_state = icnss_tcdev_get_cur_state,
  2084. .set_cur_state = icnss_tcdev_set_cur_state,
  2085. };
  2086. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2087. int tcdev_id)
  2088. {
  2089. struct icnss_priv *priv = dev_get_drvdata(dev);
  2090. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2091. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2092. struct device_node *dev_node;
  2093. int ret = 0;
  2094. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2095. if (!icnss_tcdev)
  2096. return -ENOMEM;
  2097. icnss_tcdev->tcdev_id = tcdev_id;
  2098. icnss_tcdev->max_thermal_state = max_state;
  2099. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2100. "qcom,icnss_cdev%d", tcdev_id);
  2101. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2102. if (!dev_node) {
  2103. icnss_pr_err("Failed to get cooling device node\n");
  2104. return -EINVAL;
  2105. }
  2106. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2107. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2108. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2109. dev_node,
  2110. cdev_node_name, icnss_tcdev,
  2111. &icnss_cooling_ops);
  2112. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2113. ret = PTR_ERR(icnss_tcdev->tcdev);
  2114. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2115. ret, icnss_tcdev->tcdev_id);
  2116. } else {
  2117. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2118. icnss_tcdev->tcdev_id);
  2119. list_add(&icnss_tcdev->tcdev_list,
  2120. &priv->icnss_tcdev_list);
  2121. }
  2122. } else {
  2123. icnss_pr_dbg("Cooling device registration not supported");
  2124. ret = -EOPNOTSUPP;
  2125. }
  2126. return ret;
  2127. }
  2128. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2129. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2130. {
  2131. struct icnss_priv *priv = dev_get_drvdata(dev);
  2132. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2133. while (!list_empty(&priv->icnss_tcdev_list)) {
  2134. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2135. struct icnss_thermal_cdev,
  2136. tcdev_list);
  2137. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2138. list_del(&icnss_tcdev->tcdev_list);
  2139. kfree(icnss_tcdev);
  2140. }
  2141. }
  2142. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2143. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2144. unsigned long *thermal_state,
  2145. int tcdev_id)
  2146. {
  2147. struct icnss_priv *priv = dev_get_drvdata(dev);
  2148. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2149. mutex_lock(&priv->tcdev_lock);
  2150. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2151. if (icnss_tcdev->tcdev_id != tcdev_id)
  2152. continue;
  2153. *thermal_state = icnss_tcdev->curr_thermal_state;
  2154. mutex_unlock(&priv->tcdev_lock);
  2155. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2156. icnss_tcdev->curr_thermal_state, tcdev_id);
  2157. return 0;
  2158. }
  2159. mutex_unlock(&priv->tcdev_lock);
  2160. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2161. return -EINVAL;
  2162. }
  2163. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2164. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2165. int cmd_len, void *cb_ctx,
  2166. int (*cb)(void *ctx, void *event, int event_len))
  2167. {
  2168. struct icnss_priv *priv = icnss_get_plat_priv();
  2169. int ret;
  2170. if (!priv)
  2171. return -ENODEV;
  2172. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2173. return -EINVAL;
  2174. priv->get_info_cb = cb;
  2175. priv->get_info_cb_ctx = cb_ctx;
  2176. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2177. if (ret) {
  2178. priv->get_info_cb = NULL;
  2179. priv->get_info_cb_ctx = NULL;
  2180. }
  2181. return ret;
  2182. }
  2183. EXPORT_SYMBOL(icnss_qmi_send);
  2184. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2185. struct module *owner, const char *mod_name)
  2186. {
  2187. int ret = 0;
  2188. struct icnss_priv *priv = icnss_get_plat_priv();
  2189. if (!priv || !priv->pdev) {
  2190. ret = -ENODEV;
  2191. goto out;
  2192. }
  2193. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2194. if (priv->ops) {
  2195. icnss_pr_err("Driver already registered\n");
  2196. ret = -EEXIST;
  2197. goto out;
  2198. }
  2199. if (!ops->dev_info) {
  2200. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2201. return -EINVAL;
  2202. }
  2203. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2204. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2205. ops->dev_info->name);
  2206. return -ENODEV;
  2207. }
  2208. if (!ops->probe || !ops->remove) {
  2209. ret = -EINVAL;
  2210. goto out;
  2211. }
  2212. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2213. 0, ops);
  2214. if (ret == -EINTR)
  2215. ret = 0;
  2216. out:
  2217. return ret;
  2218. }
  2219. EXPORT_SYMBOL(__icnss_register_driver);
  2220. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2221. {
  2222. int ret;
  2223. struct icnss_priv *priv = icnss_get_plat_priv();
  2224. if (!priv || !priv->pdev) {
  2225. ret = -ENODEV;
  2226. goto out;
  2227. }
  2228. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2229. if (!priv->ops) {
  2230. icnss_pr_err("Driver not registered\n");
  2231. ret = -ENOENT;
  2232. goto out;
  2233. }
  2234. ret = icnss_driver_event_post(priv,
  2235. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2236. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2237. out:
  2238. return ret;
  2239. }
  2240. EXPORT_SYMBOL(icnss_unregister_driver);
  2241. static struct icnss_msi_config msi_config = {
  2242. .total_vectors = 28,
  2243. .total_users = 2,
  2244. .users = (struct icnss_msi_user[]) {
  2245. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2246. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2247. },
  2248. };
  2249. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2250. {
  2251. priv->msi_config = &msi_config;
  2252. return 0;
  2253. }
  2254. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2255. int *num_vectors, u32 *user_base_data,
  2256. u32 *base_vector)
  2257. {
  2258. struct icnss_priv *priv = dev_get_drvdata(dev);
  2259. struct icnss_msi_config *msi_config;
  2260. int idx;
  2261. if (!priv)
  2262. return -ENODEV;
  2263. msi_config = priv->msi_config;
  2264. if (!msi_config) {
  2265. icnss_pr_err("MSI is not supported.\n");
  2266. return -EINVAL;
  2267. }
  2268. for (idx = 0; idx < msi_config->total_users; idx++) {
  2269. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2270. *num_vectors = msi_config->users[idx].num_vectors;
  2271. *user_base_data = msi_config->users[idx].base_vector
  2272. + priv->msi_base_data;
  2273. *base_vector = msi_config->users[idx].base_vector;
  2274. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2275. user_name, *num_vectors, *user_base_data,
  2276. *base_vector);
  2277. return 0;
  2278. }
  2279. }
  2280. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2281. return -EINVAL;
  2282. }
  2283. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2284. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2285. {
  2286. struct icnss_priv *priv = dev_get_drvdata(dev);
  2287. int irq_num;
  2288. irq_num = priv->srng_irqs[vector];
  2289. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2290. irq_num, vector);
  2291. return irq_num;
  2292. }
  2293. EXPORT_SYMBOL(icnss_get_msi_irq);
  2294. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2295. u32 *msi_addr_high)
  2296. {
  2297. struct icnss_priv *priv = dev_get_drvdata(dev);
  2298. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2299. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2300. }
  2301. EXPORT_SYMBOL(icnss_get_msi_address);
  2302. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2303. irqreturn_t (*handler)(int, void *),
  2304. unsigned long flags, const char *name, void *ctx)
  2305. {
  2306. int ret = 0;
  2307. unsigned int irq;
  2308. struct ce_irq_list *irq_entry;
  2309. struct icnss_priv *priv = dev_get_drvdata(dev);
  2310. if (!priv || !priv->pdev) {
  2311. ret = -ENODEV;
  2312. goto out;
  2313. }
  2314. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2315. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2316. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2317. ret = -EINVAL;
  2318. goto out;
  2319. }
  2320. irq = priv->ce_irqs[ce_id];
  2321. irq_entry = &priv->ce_irq_list[ce_id];
  2322. if (irq_entry->handler || irq_entry->irq) {
  2323. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2324. irq, ce_id);
  2325. ret = -EEXIST;
  2326. goto out;
  2327. }
  2328. ret = request_irq(irq, handler, flags, name, ctx);
  2329. if (ret) {
  2330. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2331. irq, ce_id, ret);
  2332. goto out;
  2333. }
  2334. irq_entry->irq = irq;
  2335. irq_entry->handler = handler;
  2336. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2337. penv->stats.ce_irqs[ce_id].request++;
  2338. out:
  2339. return ret;
  2340. }
  2341. EXPORT_SYMBOL(icnss_ce_request_irq);
  2342. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2343. {
  2344. int ret = 0;
  2345. unsigned int irq;
  2346. struct ce_irq_list *irq_entry;
  2347. if (!penv || !penv->pdev || !dev) {
  2348. ret = -ENODEV;
  2349. goto out;
  2350. }
  2351. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2352. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2353. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2354. ret = -EINVAL;
  2355. goto out;
  2356. }
  2357. irq = penv->ce_irqs[ce_id];
  2358. irq_entry = &penv->ce_irq_list[ce_id];
  2359. if (!irq_entry->handler || !irq_entry->irq) {
  2360. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2361. ret = -EEXIST;
  2362. goto out;
  2363. }
  2364. free_irq(irq, ctx);
  2365. irq_entry->irq = 0;
  2366. irq_entry->handler = NULL;
  2367. penv->stats.ce_irqs[ce_id].free++;
  2368. out:
  2369. return ret;
  2370. }
  2371. EXPORT_SYMBOL(icnss_ce_free_irq);
  2372. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2373. {
  2374. unsigned int irq;
  2375. if (!penv || !penv->pdev || !dev) {
  2376. icnss_pr_err("Platform driver not initialized\n");
  2377. return;
  2378. }
  2379. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2380. penv->state);
  2381. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2382. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2383. return;
  2384. }
  2385. penv->stats.ce_irqs[ce_id].enable++;
  2386. irq = penv->ce_irqs[ce_id];
  2387. enable_irq(irq);
  2388. }
  2389. EXPORT_SYMBOL(icnss_enable_irq);
  2390. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2391. {
  2392. unsigned int irq;
  2393. if (!penv || !penv->pdev || !dev) {
  2394. icnss_pr_err("Platform driver not initialized\n");
  2395. return;
  2396. }
  2397. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2398. penv->state);
  2399. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2400. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2401. ce_id);
  2402. return;
  2403. }
  2404. irq = penv->ce_irqs[ce_id];
  2405. disable_irq(irq);
  2406. penv->stats.ce_irqs[ce_id].disable++;
  2407. }
  2408. EXPORT_SYMBOL(icnss_disable_irq);
  2409. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2410. {
  2411. char *fw_build_timestamp = NULL;
  2412. struct icnss_priv *priv = dev_get_drvdata(dev);
  2413. if (!priv) {
  2414. icnss_pr_err("Platform driver not initialized\n");
  2415. return -EINVAL;
  2416. }
  2417. info->v_addr = priv->mem_base_va;
  2418. info->p_addr = priv->mem_base_pa;
  2419. info->chip_id = priv->chip_info.chip_id;
  2420. info->chip_family = priv->chip_info.chip_family;
  2421. info->board_id = priv->board_id;
  2422. info->soc_id = priv->soc_id;
  2423. info->fw_version = priv->fw_version_info.fw_version;
  2424. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2425. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2426. strlcpy(info->fw_build_timestamp,
  2427. priv->fw_version_info.fw_build_timestamp,
  2428. WLFW_MAX_TIMESTAMP_LEN + 1);
  2429. strlcpy(info->fw_build_id, priv->fw_build_id,
  2430. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2431. return 0;
  2432. }
  2433. EXPORT_SYMBOL(icnss_get_soc_info);
  2434. int icnss_get_mhi_state(struct device *dev)
  2435. {
  2436. struct icnss_priv *priv = dev_get_drvdata(dev);
  2437. if (!priv) {
  2438. icnss_pr_err("Platform driver not initialized\n");
  2439. return -EINVAL;
  2440. }
  2441. if (!priv->mhi_state_info_va)
  2442. return -ENOMEM;
  2443. return ioread32(priv->mhi_state_info_va);
  2444. }
  2445. EXPORT_SYMBOL(icnss_get_mhi_state);
  2446. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2447. {
  2448. int ret;
  2449. struct icnss_priv *priv;
  2450. if (!dev)
  2451. return -ENODEV;
  2452. priv = dev_get_drvdata(dev);
  2453. if (!priv) {
  2454. icnss_pr_err("Platform driver not initialized\n");
  2455. return -EINVAL;
  2456. }
  2457. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2458. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2459. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2460. priv->state);
  2461. return -EINVAL;
  2462. }
  2463. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2464. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2465. if (ret)
  2466. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2467. ret, fw_log_mode);
  2468. return ret;
  2469. }
  2470. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2471. int icnss_force_wake_request(struct device *dev)
  2472. {
  2473. struct icnss_priv *priv;
  2474. if (!dev)
  2475. return -ENODEV;
  2476. priv = dev_get_drvdata(dev);
  2477. if (!priv) {
  2478. icnss_pr_err("Platform driver not initialized\n");
  2479. return -EINVAL;
  2480. }
  2481. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2482. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2483. atomic_read(&priv->soc_wake_ref_count));
  2484. return 0;
  2485. }
  2486. icnss_pr_soc_wake("Calling SOC Wake request");
  2487. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2488. 0, NULL);
  2489. return 0;
  2490. }
  2491. EXPORT_SYMBOL(icnss_force_wake_request);
  2492. int icnss_force_wake_release(struct device *dev)
  2493. {
  2494. struct icnss_priv *priv;
  2495. if (!dev)
  2496. return -ENODEV;
  2497. priv = dev_get_drvdata(dev);
  2498. if (!priv) {
  2499. icnss_pr_err("Platform driver not initialized\n");
  2500. return -EINVAL;
  2501. }
  2502. icnss_pr_soc_wake("Calling SOC Wake response");
  2503. if (atomic_read(&priv->soc_wake_ref_count) &&
  2504. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2505. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2506. atomic_read(&priv->soc_wake_ref_count));
  2507. return 0;
  2508. }
  2509. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2510. 0, NULL);
  2511. return 0;
  2512. }
  2513. EXPORT_SYMBOL(icnss_force_wake_release);
  2514. int icnss_is_device_awake(struct device *dev)
  2515. {
  2516. struct icnss_priv *priv = dev_get_drvdata(dev);
  2517. if (!priv) {
  2518. icnss_pr_err("Platform driver not initialized\n");
  2519. return -EINVAL;
  2520. }
  2521. return atomic_read(&priv->soc_wake_ref_count);
  2522. }
  2523. EXPORT_SYMBOL(icnss_is_device_awake);
  2524. int icnss_is_pci_ep_awake(struct device *dev)
  2525. {
  2526. struct icnss_priv *priv = dev_get_drvdata(dev);
  2527. if (!priv) {
  2528. icnss_pr_err("Platform driver not initialized\n");
  2529. return -EINVAL;
  2530. }
  2531. if (!priv->mhi_state_info_va)
  2532. return -ENOMEM;
  2533. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2534. }
  2535. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2536. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2537. uint32_t mem_type, uint32_t data_len,
  2538. uint8_t *output)
  2539. {
  2540. int ret = 0;
  2541. struct icnss_priv *priv = dev_get_drvdata(dev);
  2542. if (priv->magic != ICNSS_MAGIC) {
  2543. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2544. dev, priv, priv->magic);
  2545. return -EINVAL;
  2546. }
  2547. if (!output || data_len == 0
  2548. || data_len > WLFW_MAX_DATA_SIZE) {
  2549. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2550. output, data_len);
  2551. ret = -EINVAL;
  2552. goto out;
  2553. }
  2554. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2555. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2556. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2557. priv->state);
  2558. ret = -EINVAL;
  2559. goto out;
  2560. }
  2561. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2562. data_len, output);
  2563. out:
  2564. return ret;
  2565. }
  2566. EXPORT_SYMBOL(icnss_athdiag_read);
  2567. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2568. uint32_t mem_type, uint32_t data_len,
  2569. uint8_t *input)
  2570. {
  2571. int ret = 0;
  2572. struct icnss_priv *priv = dev_get_drvdata(dev);
  2573. if (priv->magic != ICNSS_MAGIC) {
  2574. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2575. dev, priv, priv->magic);
  2576. return -EINVAL;
  2577. }
  2578. if (!input || data_len == 0
  2579. || data_len > WLFW_MAX_DATA_SIZE) {
  2580. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2581. input, data_len);
  2582. ret = -EINVAL;
  2583. goto out;
  2584. }
  2585. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2586. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2587. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2588. priv->state);
  2589. ret = -EINVAL;
  2590. goto out;
  2591. }
  2592. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2593. data_len, input);
  2594. out:
  2595. return ret;
  2596. }
  2597. EXPORT_SYMBOL(icnss_athdiag_write);
  2598. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2599. enum icnss_driver_mode mode,
  2600. const char *host_version)
  2601. {
  2602. struct icnss_priv *priv = dev_get_drvdata(dev);
  2603. int temp = 0;
  2604. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2605. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2606. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2607. priv->state);
  2608. return -EINVAL;
  2609. }
  2610. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2611. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2612. priv->state);
  2613. return -EINVAL;
  2614. }
  2615. if (priv->wpss_supported &&
  2616. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2617. icnss_setup_dms_mac(priv);
  2618. if (priv->device_id == WCN6750_DEVICE_ID) {
  2619. if (!icnss_get_temperature(priv, &temp)) {
  2620. icnss_pr_dbg("Temperature: %d\n", temp);
  2621. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2622. icnss_set_wlan_en_delay(priv);
  2623. }
  2624. }
  2625. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2626. }
  2627. EXPORT_SYMBOL(icnss_wlan_enable);
  2628. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2629. {
  2630. struct icnss_priv *priv = dev_get_drvdata(dev);
  2631. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2632. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2633. priv->state);
  2634. return 0;
  2635. }
  2636. return icnss_send_wlan_disable_to_fw(priv);
  2637. }
  2638. EXPORT_SYMBOL(icnss_wlan_disable);
  2639. bool icnss_is_qmi_disable(struct device *dev)
  2640. {
  2641. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2642. }
  2643. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2644. int icnss_get_ce_id(struct device *dev, int irq)
  2645. {
  2646. int i;
  2647. if (!penv || !penv->pdev || !dev)
  2648. return -ENODEV;
  2649. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2650. if (penv->ce_irqs[i] == irq)
  2651. return i;
  2652. }
  2653. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2654. return -EINVAL;
  2655. }
  2656. EXPORT_SYMBOL(icnss_get_ce_id);
  2657. int icnss_get_irq(struct device *dev, int ce_id)
  2658. {
  2659. int irq;
  2660. if (!penv || !penv->pdev || !dev)
  2661. return -ENODEV;
  2662. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2663. return -EINVAL;
  2664. irq = penv->ce_irqs[ce_id];
  2665. return irq;
  2666. }
  2667. EXPORT_SYMBOL(icnss_get_irq);
  2668. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2669. {
  2670. struct icnss_priv *priv = dev_get_drvdata(dev);
  2671. if (!priv) {
  2672. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2673. return NULL;
  2674. }
  2675. return priv->iommu_domain;
  2676. }
  2677. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2678. int icnss_smmu_map(struct device *dev,
  2679. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2680. {
  2681. struct icnss_priv *priv = dev_get_drvdata(dev);
  2682. int flag = IOMMU_READ | IOMMU_WRITE;
  2683. bool dma_coherent = false;
  2684. unsigned long iova;
  2685. int prop_len = 0;
  2686. size_t len;
  2687. int ret = 0;
  2688. if (!priv) {
  2689. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2690. dev, priv);
  2691. return -EINVAL;
  2692. }
  2693. if (!iova_addr) {
  2694. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2695. &paddr, size);
  2696. return -EINVAL;
  2697. }
  2698. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2699. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2700. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2701. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2702. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2703. iova,
  2704. &priv->smmu_iova_ipa_start,
  2705. priv->smmu_iova_ipa_len);
  2706. return -ENOMEM;
  2707. }
  2708. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2709. icnss_pr_dbg("dma-coherent is %s\n",
  2710. dma_coherent ? "enabled" : "disabled");
  2711. if (dma_coherent)
  2712. flag |= IOMMU_CACHE;
  2713. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2714. ret = iommu_map(priv->iommu_domain, iova,
  2715. rounddown(paddr, PAGE_SIZE), len,
  2716. flag);
  2717. if (ret) {
  2718. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2719. return ret;
  2720. }
  2721. priv->smmu_iova_ipa_current = iova + len;
  2722. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2723. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2724. return 0;
  2725. }
  2726. EXPORT_SYMBOL(icnss_smmu_map);
  2727. int icnss_smmu_unmap(struct device *dev,
  2728. uint32_t iova_addr, size_t size)
  2729. {
  2730. struct icnss_priv *priv = dev_get_drvdata(dev);
  2731. unsigned long iova;
  2732. size_t len, unmapped_len;
  2733. if (!priv) {
  2734. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2735. dev, priv);
  2736. return -EINVAL;
  2737. }
  2738. if (!iova_addr) {
  2739. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2740. size);
  2741. return -EINVAL;
  2742. }
  2743. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2744. PAGE_SIZE);
  2745. iova = rounddown(iova_addr, PAGE_SIZE);
  2746. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2747. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2748. iova,
  2749. &priv->smmu_iova_ipa_start,
  2750. priv->smmu_iova_ipa_len);
  2751. return -ENOMEM;
  2752. }
  2753. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2754. iova, len);
  2755. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2756. if (unmapped_len != len) {
  2757. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2758. return -EINVAL;
  2759. }
  2760. priv->smmu_iova_ipa_current = iova;
  2761. return 0;
  2762. }
  2763. EXPORT_SYMBOL(icnss_smmu_unmap);
  2764. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2765. {
  2766. return socinfo_get_serial_number();
  2767. }
  2768. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2769. int icnss_trigger_recovery(struct device *dev)
  2770. {
  2771. int ret = 0;
  2772. struct icnss_priv *priv = dev_get_drvdata(dev);
  2773. if (priv->magic != ICNSS_MAGIC) {
  2774. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2775. ret = -EINVAL;
  2776. goto out;
  2777. }
  2778. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2779. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2780. priv->state);
  2781. ret = -EPERM;
  2782. goto out;
  2783. }
  2784. if (priv->wpss_supported) {
  2785. icnss_pr_vdbg("Initiate Root PD restart");
  2786. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2787. ICNSS_SMP2P_OUT_POWER_SAVE);
  2788. if (!ret)
  2789. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2790. return ret;
  2791. }
  2792. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2793. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2794. priv->state);
  2795. ret = -EOPNOTSUPP;
  2796. goto out;
  2797. }
  2798. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2799. priv->state);
  2800. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2801. if (!ret)
  2802. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2803. out:
  2804. return ret;
  2805. }
  2806. EXPORT_SYMBOL(icnss_trigger_recovery);
  2807. int icnss_idle_shutdown(struct device *dev)
  2808. {
  2809. struct icnss_priv *priv = dev_get_drvdata(dev);
  2810. if (!priv) {
  2811. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2812. return -EINVAL;
  2813. }
  2814. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2815. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2816. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2817. return -EBUSY;
  2818. }
  2819. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2820. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2821. }
  2822. EXPORT_SYMBOL(icnss_idle_shutdown);
  2823. int icnss_idle_restart(struct device *dev)
  2824. {
  2825. struct icnss_priv *priv = dev_get_drvdata(dev);
  2826. if (!priv) {
  2827. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2828. return -EINVAL;
  2829. }
  2830. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2831. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2832. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2833. return -EBUSY;
  2834. }
  2835. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2836. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2837. }
  2838. EXPORT_SYMBOL(icnss_idle_restart);
  2839. int icnss_exit_power_save(struct device *dev)
  2840. {
  2841. struct icnss_priv *priv = dev_get_drvdata(dev);
  2842. icnss_pr_vdbg("Calling Exit Power Save\n");
  2843. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2844. !test_bit(ICNSS_MODE_ON, &priv->state))
  2845. return 0;
  2846. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2847. ICNSS_SMP2P_OUT_POWER_SAVE);
  2848. }
  2849. EXPORT_SYMBOL(icnss_exit_power_save);
  2850. int icnss_prevent_l1(struct device *dev)
  2851. {
  2852. struct icnss_priv *priv = dev_get_drvdata(dev);
  2853. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2854. !test_bit(ICNSS_MODE_ON, &priv->state))
  2855. return 0;
  2856. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2857. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2858. }
  2859. EXPORT_SYMBOL(icnss_prevent_l1);
  2860. void icnss_allow_l1(struct device *dev)
  2861. {
  2862. struct icnss_priv *priv = dev_get_drvdata(dev);
  2863. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2864. !test_bit(ICNSS_MODE_ON, &priv->state))
  2865. return;
  2866. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2867. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2868. }
  2869. EXPORT_SYMBOL(icnss_allow_l1);
  2870. void icnss_allow_recursive_recovery(struct device *dev)
  2871. {
  2872. struct icnss_priv *priv = dev_get_drvdata(dev);
  2873. priv->allow_recursive_recovery = true;
  2874. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2875. }
  2876. void icnss_disallow_recursive_recovery(struct device *dev)
  2877. {
  2878. struct icnss_priv *priv = dev_get_drvdata(dev);
  2879. priv->allow_recursive_recovery = false;
  2880. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  2881. }
  2882. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  2883. {
  2884. struct kobject *icnss_kobject;
  2885. int ret = 0;
  2886. atomic_set(&priv->is_shutdown, false);
  2887. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  2888. if (!icnss_kobject) {
  2889. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  2890. return -EINVAL;
  2891. }
  2892. priv->icnss_kobject = icnss_kobject;
  2893. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  2894. if (ret) {
  2895. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  2896. return ret;
  2897. }
  2898. return ret;
  2899. }
  2900. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  2901. {
  2902. struct kobject *icnss_kobject;
  2903. icnss_kobject = priv->icnss_kobject;
  2904. if (icnss_kobject)
  2905. kobject_put(icnss_kobject);
  2906. }
  2907. static ssize_t qdss_tr_start_store(struct device *dev,
  2908. struct device_attribute *attr,
  2909. const char *buf, size_t count)
  2910. {
  2911. struct icnss_priv *priv = dev_get_drvdata(dev);
  2912. wlfw_qdss_trace_start(priv);
  2913. icnss_pr_dbg("Received QDSS start command\n");
  2914. return count;
  2915. }
  2916. static ssize_t qdss_tr_stop_store(struct device *dev,
  2917. struct device_attribute *attr,
  2918. const char *user_buf, size_t count)
  2919. {
  2920. struct icnss_priv *priv = dev_get_drvdata(dev);
  2921. u32 option = 0;
  2922. if (sscanf(user_buf, "%du", &option) != 1)
  2923. return -EINVAL;
  2924. wlfw_qdss_trace_stop(priv, option);
  2925. icnss_pr_dbg("Received QDSS stop command\n");
  2926. return count;
  2927. }
  2928. static ssize_t qdss_conf_download_store(struct device *dev,
  2929. struct device_attribute *attr,
  2930. const char *buf, size_t count)
  2931. {
  2932. struct icnss_priv *priv = dev_get_drvdata(dev);
  2933. icnss_wlfw_qdss_dnld_send_sync(priv);
  2934. icnss_pr_dbg("Received QDSS download config command\n");
  2935. return count;
  2936. }
  2937. static ssize_t hw_trc_override_store(struct device *dev,
  2938. struct device_attribute *attr,
  2939. const char *buf, size_t count)
  2940. {
  2941. struct icnss_priv *priv = dev_get_drvdata(dev);
  2942. int tmp = 0;
  2943. if (sscanf(buf, "%du", &tmp) != 1)
  2944. return -EINVAL;
  2945. priv->hw_trc_override = tmp;
  2946. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2947. return count;
  2948. }
  2949. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  2950. {
  2951. struct icnss_priv *priv = icnss_get_plat_priv();
  2952. phandle rproc_phandle;
  2953. int ret;
  2954. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  2955. &rproc_phandle)) {
  2956. icnss_pr_err("error reading rproc phandle\n");
  2957. return;
  2958. }
  2959. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  2960. if (IS_ERR_OR_NULL(priv->rproc)) {
  2961. icnss_pr_err("rproc not found");
  2962. return;
  2963. }
  2964. ret = rproc_boot(priv->rproc);
  2965. if (ret) {
  2966. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  2967. rproc_put(priv->rproc);
  2968. }
  2969. }
  2970. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  2971. {
  2972. if (priv && priv->rproc) {
  2973. rproc_shutdown(priv->rproc);
  2974. rproc_put(priv->rproc);
  2975. priv->rproc = NULL;
  2976. }
  2977. }
  2978. static ssize_t wpss_boot_store(struct device *dev,
  2979. struct device_attribute *attr,
  2980. const char *buf, size_t count)
  2981. {
  2982. struct icnss_priv *priv = dev_get_drvdata(dev);
  2983. int wpss_rproc = 0;
  2984. if (!priv->wpss_supported)
  2985. return count;
  2986. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  2987. icnss_pr_err("Failed to read wpss rproc info");
  2988. return -EINVAL;
  2989. }
  2990. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  2991. if (wpss_rproc == 1)
  2992. schedule_work(&wpss_loader);
  2993. else if (wpss_rproc == 0)
  2994. icnss_wpss_unload(priv);
  2995. return count;
  2996. }
  2997. static ssize_t wlan_en_delay_store(struct device *dev,
  2998. struct device_attribute *attr,
  2999. const char *buf, size_t count)
  3000. {
  3001. struct icnss_priv *priv = dev_get_drvdata(dev);
  3002. uint32_t wlan_en_delay = 0;
  3003. if (priv->device_id != WCN6750_DEVICE_ID)
  3004. return count;
  3005. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3006. icnss_pr_err("Failed to read wlan_en_delay");
  3007. return -EINVAL;
  3008. }
  3009. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3010. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3011. return count;
  3012. }
  3013. static DEVICE_ATTR_WO(qdss_tr_start);
  3014. static DEVICE_ATTR_WO(qdss_tr_stop);
  3015. static DEVICE_ATTR_WO(qdss_conf_download);
  3016. static DEVICE_ATTR_WO(hw_trc_override);
  3017. static DEVICE_ATTR_WO(wpss_boot);
  3018. static DEVICE_ATTR_WO(wlan_en_delay);
  3019. static struct attribute *icnss_attrs[] = {
  3020. &dev_attr_qdss_tr_start.attr,
  3021. &dev_attr_qdss_tr_stop.attr,
  3022. &dev_attr_qdss_conf_download.attr,
  3023. &dev_attr_hw_trc_override.attr,
  3024. &dev_attr_wpss_boot.attr,
  3025. &dev_attr_wlan_en_delay.attr,
  3026. NULL,
  3027. };
  3028. static struct attribute_group icnss_attr_group = {
  3029. .attrs = icnss_attrs,
  3030. };
  3031. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3032. {
  3033. struct device *dev = &priv->pdev->dev;
  3034. int ret;
  3035. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3036. if (ret) {
  3037. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3038. ret);
  3039. goto out;
  3040. }
  3041. return 0;
  3042. out:
  3043. return ret;
  3044. }
  3045. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3046. {
  3047. sysfs_remove_link(kernel_kobj, "icnss");
  3048. }
  3049. static int icnss_sysfs_create(struct icnss_priv *priv)
  3050. {
  3051. int ret = 0;
  3052. ret = devm_device_add_group(&priv->pdev->dev,
  3053. &icnss_attr_group);
  3054. if (ret) {
  3055. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3056. ret);
  3057. goto out;
  3058. }
  3059. icnss_create_sysfs_link(priv);
  3060. ret = icnss_create_shutdown_sysfs(priv);
  3061. if (ret)
  3062. goto remove_icnss_group;
  3063. return 0;
  3064. remove_icnss_group:
  3065. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3066. out:
  3067. return ret;
  3068. }
  3069. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3070. {
  3071. icnss_destroy_shutdown_sysfs(priv);
  3072. icnss_remove_sysfs_link(priv);
  3073. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3074. }
  3075. static int icnss_resource_parse(struct icnss_priv *priv)
  3076. {
  3077. int ret = 0, i = 0;
  3078. struct platform_device *pdev = priv->pdev;
  3079. struct device *dev = &pdev->dev;
  3080. struct resource *res;
  3081. u32 int_prop;
  3082. ret = icnss_get_vreg(priv);
  3083. if (ret) {
  3084. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3085. goto out;
  3086. }
  3087. ret = icnss_get_clk(priv);
  3088. if (ret) {
  3089. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3090. goto put_vreg;
  3091. }
  3092. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3093. ret = icnss_get_psf_info(priv);
  3094. if (ret < 0)
  3095. goto out;
  3096. priv->psf_supported = true;
  3097. }
  3098. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3099. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3100. "membase");
  3101. if (!res) {
  3102. icnss_pr_err("Memory base not found in DT\n");
  3103. ret = -EINVAL;
  3104. goto put_clk;
  3105. }
  3106. priv->mem_base_pa = res->start;
  3107. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3108. resource_size(res));
  3109. if (!priv->mem_base_va) {
  3110. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3111. &priv->mem_base_pa);
  3112. ret = -EINVAL;
  3113. goto put_clk;
  3114. }
  3115. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3116. &priv->mem_base_pa,
  3117. priv->mem_base_va);
  3118. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3119. res = platform_get_resource(priv->pdev,
  3120. IORESOURCE_IRQ, i);
  3121. if (!res) {
  3122. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3123. ret = -ENODEV;
  3124. goto put_clk;
  3125. } else {
  3126. priv->ce_irqs[i] = res->start;
  3127. }
  3128. }
  3129. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3130. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3131. "msi_addr");
  3132. if (!res) {
  3133. icnss_pr_err("MSI address not found in DT\n");
  3134. ret = -EINVAL;
  3135. goto put_clk;
  3136. }
  3137. priv->msi_addr_pa = res->start;
  3138. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3139. PAGE_SIZE,
  3140. DMA_FROM_DEVICE, 0);
  3141. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3142. icnss_pr_err("MSI: failed to map msi address\n");
  3143. priv->msi_addr_iova = 0;
  3144. ret = -ENOMEM;
  3145. goto put_clk;
  3146. }
  3147. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3148. &priv->msi_addr_pa,
  3149. priv->msi_addr_iova);
  3150. ret = of_property_read_u32_index(dev->of_node,
  3151. "interrupts",
  3152. 1,
  3153. &int_prop);
  3154. if (ret) {
  3155. icnss_pr_dbg("Read interrupt prop failed");
  3156. goto put_clk;
  3157. }
  3158. priv->msi_base_data = int_prop + 32;
  3159. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3160. priv->msi_base_data, int_prop);
  3161. icnss_get_msi_assignment(priv);
  3162. for (i = 0; i < msi_config.total_vectors; i++) {
  3163. res = platform_get_resource(priv->pdev,
  3164. IORESOURCE_IRQ, i);
  3165. if (!res) {
  3166. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3167. ret = -ENODEV;
  3168. goto put_clk;
  3169. } else {
  3170. priv->srng_irqs[i] = res->start;
  3171. }
  3172. }
  3173. }
  3174. return 0;
  3175. put_clk:
  3176. icnss_put_clk(priv);
  3177. put_vreg:
  3178. icnss_put_vreg(priv);
  3179. out:
  3180. return ret;
  3181. }
  3182. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3183. {
  3184. int ret = 0;
  3185. struct platform_device *pdev = priv->pdev;
  3186. struct device *dev = &pdev->dev;
  3187. struct device_node *np = NULL;
  3188. u64 prop_size = 0;
  3189. const __be32 *addrp = NULL;
  3190. np = of_parse_phandle(dev->of_node,
  3191. "qcom,wlan-msa-fixed-region", 0);
  3192. if (np) {
  3193. addrp = of_get_address(np, 0, &prop_size, NULL);
  3194. if (!addrp) {
  3195. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3196. ret = -EINVAL;
  3197. of_node_put(np);
  3198. goto out;
  3199. }
  3200. priv->msa_pa = of_translate_address(np, addrp);
  3201. if (priv->msa_pa == OF_BAD_ADDR) {
  3202. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3203. ret = -EINVAL;
  3204. of_node_put(np);
  3205. goto out;
  3206. }
  3207. of_node_put(np);
  3208. priv->msa_va = memremap(priv->msa_pa,
  3209. (unsigned long)prop_size, MEMREMAP_WT);
  3210. if (!priv->msa_va) {
  3211. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3212. &priv->msa_pa);
  3213. ret = -EINVAL;
  3214. goto out;
  3215. }
  3216. priv->msa_mem_size = prop_size;
  3217. } else {
  3218. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3219. &priv->msa_mem_size);
  3220. if (ret || priv->msa_mem_size == 0) {
  3221. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3222. priv->msa_mem_size, ret);
  3223. goto out;
  3224. }
  3225. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3226. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3227. if (!priv->msa_va) {
  3228. icnss_pr_err("DMA alloc failed for MSA\n");
  3229. ret = -ENOMEM;
  3230. goto out;
  3231. }
  3232. }
  3233. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3234. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3235. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3236. "qcom,fw-prefix");
  3237. return 0;
  3238. out:
  3239. return ret;
  3240. }
  3241. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3242. struct device *dev, unsigned long iova,
  3243. int flags, void *handler_token)
  3244. {
  3245. struct icnss_priv *priv = handler_token;
  3246. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3247. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3248. if (!priv) {
  3249. icnss_pr_err("priv is NULL\n");
  3250. return -ENODEV;
  3251. }
  3252. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3253. fw_down_data.crashed = true;
  3254. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3255. &fw_down_data);
  3256. }
  3257. icnss_trigger_recovery(&priv->pdev->dev);
  3258. /* IOMMU driver requires non-zero return value to print debug info. */
  3259. return -EINVAL;
  3260. }
  3261. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3262. {
  3263. int ret = 0;
  3264. struct platform_device *pdev = priv->pdev;
  3265. struct device *dev = &pdev->dev;
  3266. const char *iommu_dma_type;
  3267. struct resource *res;
  3268. u32 addr_win[2];
  3269. ret = of_property_read_u32_array(dev->of_node,
  3270. "qcom,iommu-dma-addr-pool",
  3271. addr_win,
  3272. ARRAY_SIZE(addr_win));
  3273. if (ret) {
  3274. icnss_pr_err("SMMU IOVA base not found\n");
  3275. } else {
  3276. priv->smmu_iova_start = addr_win[0];
  3277. priv->smmu_iova_len = addr_win[1];
  3278. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3279. &priv->smmu_iova_start,
  3280. priv->smmu_iova_len);
  3281. priv->iommu_domain =
  3282. iommu_get_domain_for_dev(&pdev->dev);
  3283. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3284. &iommu_dma_type);
  3285. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3286. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3287. priv->smmu_s1_enable = true;
  3288. if (priv->device_id == WCN6750_DEVICE_ID)
  3289. iommu_set_fault_handler(priv->iommu_domain,
  3290. icnss_smmu_fault_handler,
  3291. priv);
  3292. }
  3293. res = platform_get_resource_byname(pdev,
  3294. IORESOURCE_MEM,
  3295. "smmu_iova_ipa");
  3296. if (!res) {
  3297. icnss_pr_err("SMMU IOVA IPA not found\n");
  3298. } else {
  3299. priv->smmu_iova_ipa_start = res->start;
  3300. priv->smmu_iova_ipa_current = res->start;
  3301. priv->smmu_iova_ipa_len = resource_size(res);
  3302. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3303. &priv->smmu_iova_ipa_start,
  3304. priv->smmu_iova_ipa_len);
  3305. }
  3306. }
  3307. return 0;
  3308. }
  3309. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3310. {
  3311. if (!priv)
  3312. return -ENODEV;
  3313. if (!priv->smmu_iova_len)
  3314. return -EINVAL;
  3315. *addr = priv->smmu_iova_start;
  3316. *size = priv->smmu_iova_len;
  3317. return 0;
  3318. }
  3319. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3320. {
  3321. if (!priv)
  3322. return -ENODEV;
  3323. if (!priv->smmu_iova_ipa_len)
  3324. return -EINVAL;
  3325. *addr = priv->smmu_iova_ipa_start;
  3326. *size = priv->smmu_iova_ipa_len;
  3327. return 0;
  3328. }
  3329. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3330. char *name)
  3331. {
  3332. if (!priv)
  3333. return;
  3334. if (!priv->use_prefix_path) {
  3335. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3336. return;
  3337. }
  3338. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3339. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3340. ADRASTEA_PATH_PREFIX "%s", name);
  3341. else
  3342. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3343. QCA6750_PATH_PREFIX "%s", name);
  3344. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3345. }
  3346. static const struct platform_device_id icnss_platform_id_table[] = {
  3347. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3348. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3349. { },
  3350. };
  3351. static const struct of_device_id icnss_dt_match[] = {
  3352. {
  3353. .compatible = "qcom,wcn6750",
  3354. .data = (void *)&icnss_platform_id_table[0]},
  3355. {
  3356. .compatible = "qcom,icnss",
  3357. .data = (void *)&icnss_platform_id_table[1]},
  3358. { },
  3359. };
  3360. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3361. static void icnss_init_control_params(struct icnss_priv *priv)
  3362. {
  3363. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3364. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3365. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3366. if (priv->device_id == WCN6750_DEVICE_ID ||
  3367. of_property_read_bool(priv->pdev->dev.of_node,
  3368. "wpss-support-enable"))
  3369. priv->wpss_supported = true;
  3370. if (of_property_read_bool(priv->pdev->dev.of_node,
  3371. "bdf-download-support"))
  3372. priv->bdf_download_support = true;
  3373. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3374. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3375. }
  3376. static void icnss_read_device_configs(struct icnss_priv *priv)
  3377. {
  3378. if (of_property_read_bool(priv->pdev->dev.of_node,
  3379. "wlan-ipa-disabled")) {
  3380. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3381. }
  3382. }
  3383. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3384. {
  3385. pm_runtime_get_sync(&priv->pdev->dev);
  3386. pm_runtime_forbid(&priv->pdev->dev);
  3387. pm_runtime_set_active(&priv->pdev->dev);
  3388. pm_runtime_enable(&priv->pdev->dev);
  3389. }
  3390. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3391. {
  3392. pm_runtime_disable(&priv->pdev->dev);
  3393. pm_runtime_allow(&priv->pdev->dev);
  3394. pm_runtime_put_sync(&priv->pdev->dev);
  3395. }
  3396. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3397. {
  3398. return of_property_read_bool(priv->pdev->dev.of_node,
  3399. "use-nv-mac");
  3400. }
  3401. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3402. {
  3403. struct icnss_subsys_restart_level_data *restart_level_data;
  3404. icnss_pr_info("rproc name: %s recovery disable: %d",
  3405. rproc->name, rproc->recovery_disabled);
  3406. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3407. if (!restart_level_data)
  3408. return;
  3409. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3410. if (rproc->recovery_disabled)
  3411. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3412. else
  3413. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3414. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3415. 0, restart_level_data);
  3416. }
  3417. }
  3418. static int icnss_probe(struct platform_device *pdev)
  3419. {
  3420. int ret = 0;
  3421. struct device *dev = &pdev->dev;
  3422. struct icnss_priv *priv;
  3423. const struct of_device_id *of_id;
  3424. const struct platform_device_id *device_id;
  3425. if (dev_get_drvdata(dev)) {
  3426. icnss_pr_err("Driver is already initialized\n");
  3427. return -EEXIST;
  3428. }
  3429. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3430. if (!of_id || !of_id->data) {
  3431. icnss_pr_err("Failed to find of match device!\n");
  3432. ret = -ENODEV;
  3433. goto out_reset_drvdata;
  3434. }
  3435. device_id = of_id->data;
  3436. icnss_pr_dbg("Platform driver probe\n");
  3437. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3438. if (!priv)
  3439. return -ENOMEM;
  3440. priv->magic = ICNSS_MAGIC;
  3441. dev_set_drvdata(dev, priv);
  3442. priv->pdev = pdev;
  3443. priv->device_id = device_id->driver_data;
  3444. priv->is_chain1_supported = true;
  3445. INIT_LIST_HEAD(&priv->vreg_list);
  3446. INIT_LIST_HEAD(&priv->clk_list);
  3447. icnss_allow_recursive_recovery(dev);
  3448. icnss_init_control_params(priv);
  3449. icnss_read_device_configs(priv);
  3450. ret = icnss_resource_parse(priv);
  3451. if (ret)
  3452. goto out_reset_drvdata;
  3453. ret = icnss_msa_dt_parse(priv);
  3454. if (ret)
  3455. goto out_free_resources;
  3456. ret = icnss_smmu_dt_parse(priv);
  3457. if (ret)
  3458. goto out_free_resources;
  3459. spin_lock_init(&priv->event_lock);
  3460. spin_lock_init(&priv->on_off_lock);
  3461. spin_lock_init(&priv->soc_wake_msg_lock);
  3462. mutex_init(&priv->dev_lock);
  3463. mutex_init(&priv->tcdev_lock);
  3464. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3465. if (!priv->event_wq) {
  3466. icnss_pr_err("Workqueue creation failed\n");
  3467. ret = -EFAULT;
  3468. goto smmu_cleanup;
  3469. }
  3470. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3471. INIT_LIST_HEAD(&priv->event_list);
  3472. ret = icnss_register_fw_service(priv);
  3473. if (ret < 0) {
  3474. icnss_pr_err("fw service registration failed: %d\n", ret);
  3475. goto out_destroy_wq;
  3476. }
  3477. icnss_enable_recovery(priv);
  3478. icnss_debugfs_create(priv);
  3479. icnss_sysfs_create(priv);
  3480. ret = device_init_wakeup(&priv->pdev->dev, true);
  3481. if (ret)
  3482. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3483. ret);
  3484. icnss_set_plat_priv(priv);
  3485. init_completion(&priv->unblock_shutdown);
  3486. if (priv->device_id == WCN6750_DEVICE_ID) {
  3487. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3488. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3489. if (!priv->soc_wake_wq) {
  3490. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3491. ret = -EFAULT;
  3492. goto out_unregister_fw_service;
  3493. }
  3494. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3495. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3496. ret = icnss_genl_init();
  3497. if (ret < 0)
  3498. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3499. init_completion(&priv->smp2p_soc_wake_wait);
  3500. icnss_runtime_pm_init(priv);
  3501. icnss_aop_mbox_init(priv);
  3502. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3503. priv->bdf_download_support = true;
  3504. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3505. }
  3506. if (priv->wpss_supported) {
  3507. ret = icnss_dms_init(priv);
  3508. if (ret)
  3509. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3510. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3511. icnss_pr_dbg("NV MAC feature is %s\n",
  3512. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3513. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3514. }
  3515. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3516. icnss_pr_info("Platform driver probed successfully\n");
  3517. return 0;
  3518. out_unregister_fw_service:
  3519. icnss_unregister_fw_service(priv);
  3520. out_destroy_wq:
  3521. destroy_workqueue(priv->event_wq);
  3522. smmu_cleanup:
  3523. priv->iommu_domain = NULL;
  3524. out_free_resources:
  3525. icnss_put_resources(priv);
  3526. out_reset_drvdata:
  3527. dev_set_drvdata(dev, NULL);
  3528. return ret;
  3529. }
  3530. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3531. {
  3532. if (IS_ERR_OR_NULL(ramdump_info))
  3533. return;
  3534. device_unregister(ramdump_info->dev);
  3535. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3536. kfree(ramdump_info);
  3537. }
  3538. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3539. {
  3540. if (priv->batt_psy)
  3541. power_supply_put(penv->batt_psy);
  3542. if (priv->psf_supported) {
  3543. flush_workqueue(priv->soc_update_wq);
  3544. destroy_workqueue(priv->soc_update_wq);
  3545. power_supply_unreg_notifier(&priv->psf_nb);
  3546. }
  3547. }
  3548. static int icnss_remove(struct platform_device *pdev)
  3549. {
  3550. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3551. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3552. device_init_wakeup(&priv->pdev->dev, false);
  3553. icnss_debugfs_destroy(priv);
  3554. icnss_unregister_power_supply_notifier(penv);
  3555. icnss_sysfs_destroy(priv);
  3556. complete_all(&priv->unblock_shutdown);
  3557. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3558. if (priv->wpss_supported) {
  3559. icnss_dms_deinit(priv);
  3560. icnss_wpss_early_ssr_unregister_notifier(priv);
  3561. icnss_wpss_ssr_unregister_notifier(priv);
  3562. } else {
  3563. icnss_modem_ssr_unregister_notifier(priv);
  3564. icnss_pdr_unregister_notifier(priv);
  3565. }
  3566. if (priv->device_id == WCN6750_DEVICE_ID) {
  3567. icnss_genl_exit();
  3568. icnss_runtime_pm_deinit(priv);
  3569. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3570. mbox_free_channel(priv->mbox_chan);
  3571. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3572. complete_all(&priv->smp2p_soc_wake_wait);
  3573. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3574. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3575. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3576. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3577. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3578. if (priv->soc_wake_wq)
  3579. destroy_workqueue(priv->soc_wake_wq);
  3580. }
  3581. class_destroy(priv->icnss_ramdump_class);
  3582. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3583. icnss_unregister_fw_service(priv);
  3584. if (priv->event_wq)
  3585. destroy_workqueue(priv->event_wq);
  3586. priv->iommu_domain = NULL;
  3587. icnss_hw_power_off(priv);
  3588. icnss_put_resources(priv);
  3589. dev_set_drvdata(&pdev->dev, NULL);
  3590. return 0;
  3591. }
  3592. #ifdef CONFIG_PM_SLEEP
  3593. static int icnss_pm_suspend(struct device *dev)
  3594. {
  3595. struct icnss_priv *priv = dev_get_drvdata(dev);
  3596. int ret = 0;
  3597. if (priv->magic != ICNSS_MAGIC) {
  3598. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3599. dev, priv, priv->magic);
  3600. return -EINVAL;
  3601. }
  3602. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3603. if (!priv->ops || !priv->ops->pm_suspend ||
  3604. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3605. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3606. return 0;
  3607. ret = priv->ops->pm_suspend(dev);
  3608. if (ret == 0) {
  3609. if (priv->device_id == WCN6750_DEVICE_ID) {
  3610. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3611. !test_bit(ICNSS_MODE_ON, &priv->state))
  3612. return 0;
  3613. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3614. ICNSS_SMP2P_OUT_POWER_SAVE);
  3615. }
  3616. priv->stats.pm_suspend++;
  3617. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3618. } else {
  3619. priv->stats.pm_suspend_err++;
  3620. }
  3621. return ret;
  3622. }
  3623. static int icnss_pm_resume(struct device *dev)
  3624. {
  3625. struct icnss_priv *priv = dev_get_drvdata(dev);
  3626. int ret = 0;
  3627. if (priv->magic != ICNSS_MAGIC) {
  3628. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3629. dev, priv, priv->magic);
  3630. return -EINVAL;
  3631. }
  3632. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3633. if (!priv->ops || !priv->ops->pm_resume ||
  3634. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3635. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3636. goto out;
  3637. ret = priv->ops->pm_resume(dev);
  3638. out:
  3639. if (ret == 0) {
  3640. priv->stats.pm_resume++;
  3641. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3642. } else {
  3643. priv->stats.pm_resume_err++;
  3644. }
  3645. return ret;
  3646. }
  3647. static int icnss_pm_suspend_noirq(struct device *dev)
  3648. {
  3649. struct icnss_priv *priv = dev_get_drvdata(dev);
  3650. int ret = 0;
  3651. if (priv->magic != ICNSS_MAGIC) {
  3652. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3653. dev, priv, priv->magic);
  3654. return -EINVAL;
  3655. }
  3656. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3657. if (!priv->ops || !priv->ops->suspend_noirq ||
  3658. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3659. goto out;
  3660. ret = priv->ops->suspend_noirq(dev);
  3661. out:
  3662. if (ret == 0) {
  3663. priv->stats.pm_suspend_noirq++;
  3664. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3665. } else {
  3666. priv->stats.pm_suspend_noirq_err++;
  3667. }
  3668. return ret;
  3669. }
  3670. static int icnss_pm_resume_noirq(struct device *dev)
  3671. {
  3672. struct icnss_priv *priv = dev_get_drvdata(dev);
  3673. int ret = 0;
  3674. if (priv->magic != ICNSS_MAGIC) {
  3675. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3676. dev, priv, priv->magic);
  3677. return -EINVAL;
  3678. }
  3679. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3680. if (!priv->ops || !priv->ops->resume_noirq ||
  3681. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3682. goto out;
  3683. ret = priv->ops->resume_noirq(dev);
  3684. out:
  3685. if (ret == 0) {
  3686. priv->stats.pm_resume_noirq++;
  3687. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3688. } else {
  3689. priv->stats.pm_resume_noirq_err++;
  3690. }
  3691. return ret;
  3692. }
  3693. static int icnss_pm_runtime_suspend(struct device *dev)
  3694. {
  3695. struct icnss_priv *priv = dev_get_drvdata(dev);
  3696. int ret = 0;
  3697. if (priv->device_id != WCN6750_DEVICE_ID) {
  3698. icnss_pr_err("Ignore runtime suspend:\n");
  3699. goto out;
  3700. }
  3701. if (priv->magic != ICNSS_MAGIC) {
  3702. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3703. dev, priv, priv->magic);
  3704. return -EINVAL;
  3705. }
  3706. if (!priv->ops || !priv->ops->runtime_suspend ||
  3707. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3708. goto out;
  3709. icnss_pr_vdbg("Runtime suspend\n");
  3710. ret = priv->ops->runtime_suspend(dev);
  3711. if (!ret) {
  3712. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3713. !test_bit(ICNSS_MODE_ON, &priv->state))
  3714. return 0;
  3715. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3716. ICNSS_SMP2P_OUT_POWER_SAVE);
  3717. }
  3718. out:
  3719. return ret;
  3720. }
  3721. static int icnss_pm_runtime_resume(struct device *dev)
  3722. {
  3723. struct icnss_priv *priv = dev_get_drvdata(dev);
  3724. int ret = 0;
  3725. if (priv->device_id != WCN6750_DEVICE_ID) {
  3726. icnss_pr_err("Ignore runtime resume:\n");
  3727. goto out;
  3728. }
  3729. if (priv->magic != ICNSS_MAGIC) {
  3730. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3731. dev, priv, priv->magic);
  3732. return -EINVAL;
  3733. }
  3734. if (!priv->ops || !priv->ops->runtime_resume ||
  3735. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3736. goto out;
  3737. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3738. ret = priv->ops->runtime_resume(dev);
  3739. out:
  3740. return ret;
  3741. }
  3742. static int icnss_pm_runtime_idle(struct device *dev)
  3743. {
  3744. struct icnss_priv *priv = dev_get_drvdata(dev);
  3745. if (priv->device_id != WCN6750_DEVICE_ID) {
  3746. icnss_pr_err("Ignore runtime idle:\n");
  3747. goto out;
  3748. }
  3749. icnss_pr_vdbg("Runtime idle\n");
  3750. pm_request_autosuspend(dev);
  3751. out:
  3752. return -EBUSY;
  3753. }
  3754. #endif
  3755. static const struct dev_pm_ops icnss_pm_ops = {
  3756. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3757. icnss_pm_resume)
  3758. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3759. icnss_pm_resume_noirq)
  3760. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3761. icnss_pm_runtime_idle)
  3762. };
  3763. static struct platform_driver icnss_driver = {
  3764. .probe = icnss_probe,
  3765. .remove = icnss_remove,
  3766. .driver = {
  3767. .name = "icnss2",
  3768. .pm = &icnss_pm_ops,
  3769. .of_match_table = icnss_dt_match,
  3770. },
  3771. };
  3772. static int __init icnss_initialize(void)
  3773. {
  3774. icnss_debug_init();
  3775. return platform_driver_register(&icnss_driver);
  3776. }
  3777. static void __exit icnss_exit(void)
  3778. {
  3779. platform_driver_unregister(&icnss_driver);
  3780. icnss_debug_deinit();
  3781. }
  3782. module_init(icnss_initialize);
  3783. module_exit(icnss_exit);
  3784. MODULE_LICENSE("GPL v2");
  3785. MODULE_DESCRIPTION("iWCN CORE platform driver");