main.c 125 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #ifdef SLATE_MODULE_ENABLED
  47. #include <linux/soc/qcom/slatecom_interface.h>
  48. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  49. #include <uapi/linux/slatecom_interface.h>
  50. #endif
  51. #include "main.h"
  52. #include "qmi.h"
  53. #include "debug.h"
  54. #include "power.h"
  55. #include "genl.h"
  56. #define MAX_PROP_SIZE 32
  57. #define NUM_LOG_PAGES 10
  58. #define NUM_LOG_LONG_PAGES 4
  59. #define ICNSS_MAGIC 0x5abc5abc
  60. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  61. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  62. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  63. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  64. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  65. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  66. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  67. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  68. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  69. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  70. #define ICNSS_MAX_PROBE_CNT 2
  71. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  72. #define PROBE_TIMEOUT 15000
  73. #define SMP2P_SOC_WAKE_TIMEOUT 500
  74. #ifdef CONFIG_ICNSS2_DEBUG
  75. static unsigned long qmi_timeout = 3000;
  76. module_param(qmi_timeout, ulong, 0600);
  77. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  78. #else
  79. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  80. #endif
  81. #define ICNSS_RECOVERY_TIMEOUT 60000
  82. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  83. #define ICNSS_CAL_TIMEOUT 40000
  84. static struct icnss_priv *penv;
  85. static struct work_struct wpss_loader;
  86. static struct work_struct wpss_ssr_work;
  87. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  88. #define ICNSS_EVENT_PENDING 2989
  89. #define ICNSS_EVENT_SYNC BIT(0)
  90. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  91. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  92. ICNSS_EVENT_SYNC)
  93. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  94. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  95. #define SMP2P_GET_MAX_RETRY 4
  96. #define SMP2P_GET_RETRY_DELAY_MS 500
  97. #define RAMDUMP_NUM_DEVICES 256
  98. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  99. #define WLAN_EN_TEMP_THRESHOLD 5000
  100. #define WLAN_EN_DELAY 500
  101. #define ICNSS_RPROC_LEN 10
  102. static DEFINE_IDA(rd_minor_id);
  103. enum icnss_pdr_cause_index {
  104. ICNSS_FW_CRASH,
  105. ICNSS_ROOT_PD_CRASH,
  106. ICNSS_ROOT_PD_SHUTDOWN,
  107. ICNSS_HOST_ERROR,
  108. };
  109. static const char * const icnss_pdr_cause[] = {
  110. [ICNSS_FW_CRASH] = "FW crash",
  111. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  112. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  113. [ICNSS_HOST_ERROR] = "Host error",
  114. };
  115. static void icnss_set_plat_priv(struct icnss_priv *priv)
  116. {
  117. penv = priv;
  118. }
  119. static struct icnss_priv *icnss_get_plat_priv(void)
  120. {
  121. return penv;
  122. }
  123. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  124. {
  125. if (priv && priv->rproc) {
  126. rproc_shutdown(priv->rproc);
  127. rproc_put(priv->rproc);
  128. priv->rproc = NULL;
  129. }
  130. }
  131. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  132. struct kobj_attribute *attr,
  133. const char *buf, size_t count)
  134. {
  135. struct icnss_priv *priv = icnss_get_plat_priv();
  136. if (!priv)
  137. return count;
  138. icnss_pr_dbg("Received shutdown indication");
  139. atomic_set(&priv->is_shutdown, true);
  140. if ((priv->wpss_supported || priv->rproc_fw_download) &&
  141. priv->device_id == ADRASTEA_DEVICE_ID)
  142. icnss_wpss_unload(priv);
  143. return count;
  144. }
  145. static struct kobj_attribute icnss_sysfs_attribute =
  146. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  147. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  148. {
  149. if (atomic_inc_return(&priv->pm_count) != 1)
  150. return;
  151. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  152. atomic_read(&priv->pm_count));
  153. pm_stay_awake(&priv->pdev->dev);
  154. priv->stats.pm_stay_awake++;
  155. }
  156. static void icnss_pm_relax(struct icnss_priv *priv)
  157. {
  158. int r = atomic_dec_return(&priv->pm_count);
  159. WARN_ON(r < 0);
  160. if (r != 0)
  161. return;
  162. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  163. atomic_read(&priv->pm_count));
  164. pm_relax(&priv->pdev->dev);
  165. priv->stats.pm_relax++;
  166. }
  167. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  168. {
  169. switch (type) {
  170. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  171. return "SERVER_ARRIVE";
  172. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  173. return "SERVER_EXIT";
  174. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  175. return "FW_READY";
  176. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  177. return "REGISTER_DRIVER";
  178. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  179. return "UNREGISTER_DRIVER";
  180. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  181. return "PD_SERVICE_DOWN";
  182. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  183. return "FW_EARLY_CRASH_IND";
  184. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  185. return "IDLE_SHUTDOWN";
  186. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  187. return "IDLE_RESTART";
  188. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  189. return "FW_INIT_DONE";
  190. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  191. return "QDSS_TRACE_REQ_MEM";
  192. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  193. return "QDSS_TRACE_SAVE";
  194. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  195. return "QDSS_TRACE_FREE";
  196. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  197. return "M3_DUMP_UPLOAD";
  198. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  199. return "QDSS_TRACE_REQ_DATA";
  200. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  201. return "SUBSYS_RESTART_LEVEL";
  202. case ICNSS_DRIVER_EVENT_MAX:
  203. return "EVENT_MAX";
  204. }
  205. return "UNKNOWN";
  206. };
  207. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  208. {
  209. switch (type) {
  210. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  211. return "SOC_WAKE_REQUEST";
  212. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  213. return "SOC_WAKE_RELEASE";
  214. case ICNSS_SOC_WAKE_EVENT_MAX:
  215. return "SOC_EVENT_MAX";
  216. }
  217. return "UNKNOWN";
  218. };
  219. int icnss_driver_event_post(struct icnss_priv *priv,
  220. enum icnss_driver_event_type type,
  221. u32 flags, void *data)
  222. {
  223. struct icnss_driver_event *event;
  224. unsigned long irq_flags;
  225. int gfp = GFP_KERNEL;
  226. int ret = 0;
  227. if (!priv)
  228. return -ENODEV;
  229. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  230. icnss_driver_event_to_str(type), type, current->comm,
  231. flags, priv->state);
  232. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  233. icnss_pr_err("Invalid Event type: %d, can't post", type);
  234. return -EINVAL;
  235. }
  236. if (in_interrupt() || irqs_disabled())
  237. gfp = GFP_ATOMIC;
  238. event = kzalloc(sizeof(*event), gfp);
  239. if (event == NULL)
  240. return -ENOMEM;
  241. icnss_pm_stay_awake(priv);
  242. event->type = type;
  243. event->data = data;
  244. init_completion(&event->complete);
  245. event->ret = ICNSS_EVENT_PENDING;
  246. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  247. spin_lock_irqsave(&priv->event_lock, irq_flags);
  248. list_add_tail(&event->list, &priv->event_list);
  249. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  250. priv->stats.events[type].posted++;
  251. queue_work(priv->event_wq, &priv->event_work);
  252. if (!(flags & ICNSS_EVENT_SYNC))
  253. goto out;
  254. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  255. wait_for_completion(&event->complete);
  256. else
  257. ret = wait_for_completion_interruptible(&event->complete);
  258. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  259. icnss_driver_event_to_str(type), type, priv->state, ret,
  260. event->ret);
  261. spin_lock_irqsave(&priv->event_lock, irq_flags);
  262. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  263. event->sync = false;
  264. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  265. ret = -EINTR;
  266. goto out;
  267. }
  268. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  269. ret = event->ret;
  270. kfree(event);
  271. out:
  272. icnss_pm_relax(priv);
  273. return ret;
  274. }
  275. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  276. enum icnss_soc_wake_event_type type,
  277. u32 flags, void *data)
  278. {
  279. struct icnss_soc_wake_event *event;
  280. unsigned long irq_flags;
  281. int gfp = GFP_KERNEL;
  282. int ret = 0;
  283. if (!priv)
  284. return -ENODEV;
  285. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  286. icnss_soc_wake_event_to_str(type),
  287. type, current->comm, flags, priv->state);
  288. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  289. icnss_pr_err("Invalid Event type: %d, can't post", type);
  290. return -EINVAL;
  291. }
  292. if (in_interrupt() || irqs_disabled())
  293. gfp = GFP_ATOMIC;
  294. event = kzalloc(sizeof(*event), gfp);
  295. if (!event)
  296. return -ENOMEM;
  297. icnss_pm_stay_awake(priv);
  298. event->type = type;
  299. event->data = data;
  300. init_completion(&event->complete);
  301. event->ret = ICNSS_EVENT_PENDING;
  302. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  303. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  304. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  305. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  306. priv->stats.soc_wake_events[type].posted++;
  307. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  308. if (!(flags & ICNSS_EVENT_SYNC))
  309. goto out;
  310. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  311. wait_for_completion(&event->complete);
  312. else
  313. ret = wait_for_completion_interruptible(&event->complete);
  314. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  315. icnss_soc_wake_event_to_str(type),
  316. type, priv->state, ret, event->ret);
  317. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  318. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  319. event->sync = false;
  320. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  321. ret = -EINTR;
  322. goto out;
  323. }
  324. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  325. ret = event->ret;
  326. kfree(event);
  327. out:
  328. icnss_pm_relax(priv);
  329. return ret;
  330. }
  331. bool icnss_is_fw_ready(void)
  332. {
  333. if (!penv)
  334. return false;
  335. else
  336. return test_bit(ICNSS_FW_READY, &penv->state);
  337. }
  338. EXPORT_SYMBOL(icnss_is_fw_ready);
  339. void icnss_block_shutdown(bool status)
  340. {
  341. if (!penv)
  342. return;
  343. if (status) {
  344. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  345. reinit_completion(&penv->unblock_shutdown);
  346. } else {
  347. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  348. complete(&penv->unblock_shutdown);
  349. }
  350. }
  351. EXPORT_SYMBOL(icnss_block_shutdown);
  352. bool icnss_is_fw_down(void)
  353. {
  354. struct icnss_priv *priv = icnss_get_plat_priv();
  355. if (!priv)
  356. return false;
  357. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  358. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  359. test_bit(ICNSS_REJUVENATE, &priv->state);
  360. }
  361. EXPORT_SYMBOL(icnss_is_fw_down);
  362. unsigned long icnss_get_device_config(void)
  363. {
  364. struct icnss_priv *priv = icnss_get_plat_priv();
  365. if (!priv)
  366. return 0;
  367. return priv->device_config;
  368. }
  369. EXPORT_SYMBOL(icnss_get_device_config);
  370. bool icnss_is_rejuvenate(void)
  371. {
  372. if (!penv)
  373. return false;
  374. else
  375. return test_bit(ICNSS_REJUVENATE, &penv->state);
  376. }
  377. EXPORT_SYMBOL(icnss_is_rejuvenate);
  378. bool icnss_is_pdr(void)
  379. {
  380. if (!penv)
  381. return false;
  382. else
  383. return test_bit(ICNSS_PDR, &penv->state);
  384. }
  385. EXPORT_SYMBOL(icnss_is_pdr);
  386. static int icnss_send_smp2p(struct icnss_priv *priv,
  387. enum icnss_smp2p_msg_id msg_id,
  388. enum smp2p_out_entry smp2p_entry)
  389. {
  390. unsigned int value = 0;
  391. int ret;
  392. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  393. return -EINVAL;
  394. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  395. if (msg_id == ICNSS_RESET_MSG) {
  396. priv->smp2p_info[smp2p_entry].seq = 0;
  397. ret = qcom_smem_state_update_bits(
  398. priv->smp2p_info[smp2p_entry].smem_state,
  399. ICNSS_SMEM_VALUE_MASK,
  400. 0);
  401. if (ret)
  402. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  403. ret, icnss_smp2p_str[smp2p_entry]);
  404. return ret;
  405. }
  406. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  407. !test_bit(ICNSS_FW_READY, &priv->state)) {
  408. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  409. priv->state);
  410. return -EINVAL;
  411. }
  412. value |= priv->smp2p_info[smp2p_entry].seq++;
  413. value <<= ICNSS_SMEM_SEQ_NO_POS;
  414. value |= msg_id;
  415. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  416. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  417. reinit_completion(&penv->smp2p_soc_wake_wait);
  418. ret = qcom_smem_state_update_bits(
  419. priv->smp2p_info[smp2p_entry].smem_state,
  420. ICNSS_SMEM_VALUE_MASK,
  421. value);
  422. if (ret) {
  423. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  424. icnss_smp2p_str[smp2p_entry]);
  425. } else {
  426. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  427. msg_id == ICNSS_SOC_WAKE_REL) {
  428. if (!wait_for_completion_timeout(
  429. &priv->smp2p_soc_wake_wait,
  430. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  431. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  432. icnss_smp2p_str[smp2p_entry]);
  433. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  434. ICNSS_ASSERT(0);
  435. }
  436. }
  437. }
  438. return ret;
  439. }
  440. bool icnss_is_low_power(void)
  441. {
  442. if (!penv)
  443. return false;
  444. else
  445. return test_bit(ICNSS_LOW_POWER, &penv->state);
  446. }
  447. EXPORT_SYMBOL(icnss_is_low_power);
  448. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  449. {
  450. struct icnss_priv *priv = ctx;
  451. if (priv)
  452. priv->force_err_fatal = true;
  453. icnss_pr_err("Received force error fatal request from FW\n");
  454. return IRQ_HANDLED;
  455. }
  456. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  457. {
  458. struct icnss_priv *priv = ctx;
  459. struct icnss_uevent_fw_down_data fw_down_data = {0};
  460. icnss_pr_err("Received early crash indication from FW\n");
  461. if (priv) {
  462. if (priv->wpss_self_recovery_enabled)
  463. mod_timer(&priv->wpss_ssr_timer,
  464. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  465. set_bit(ICNSS_FW_DOWN, &priv->state);
  466. icnss_ignore_fw_timeout(true);
  467. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  468. clear_bit(ICNSS_FW_READY, &priv->state);
  469. fw_down_data.crashed = true;
  470. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  471. &fw_down_data);
  472. }
  473. }
  474. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  475. 0, NULL);
  476. return IRQ_HANDLED;
  477. }
  478. static void register_fw_error_notifications(struct device *dev)
  479. {
  480. struct icnss_priv *priv = dev_get_drvdata(dev);
  481. struct device_node *dev_node;
  482. int irq = 0, ret = 0;
  483. if (!priv)
  484. return;
  485. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  486. if (!dev_node) {
  487. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  488. return;
  489. }
  490. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  491. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  492. ret = irq = of_irq_get_byname(dev_node,
  493. "qcom,smp2p-force-fatal-error");
  494. if (ret < 0) {
  495. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  496. irq);
  497. return;
  498. }
  499. }
  500. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  501. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  502. "wlanfw-err", priv);
  503. if (ret < 0) {
  504. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  505. irq, ret);
  506. return;
  507. }
  508. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  509. priv->fw_error_fatal_irq = irq;
  510. }
  511. static void register_early_crash_notifications(struct device *dev)
  512. {
  513. struct icnss_priv *priv = dev_get_drvdata(dev);
  514. struct device_node *dev_node;
  515. int irq = 0, ret = 0;
  516. if (!priv)
  517. return;
  518. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  519. if (!dev_node) {
  520. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  521. return;
  522. }
  523. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  524. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  525. ret = irq = of_irq_get_byname(dev_node,
  526. "qcom,smp2p-early-crash-ind");
  527. if (ret < 0) {
  528. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  529. irq);
  530. return;
  531. }
  532. }
  533. ret = devm_request_threaded_irq(dev, irq, NULL,
  534. fw_crash_indication_handler,
  535. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  536. "wlanfw-early-crash-ind", priv);
  537. if (ret < 0) {
  538. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  539. irq, ret);
  540. return;
  541. }
  542. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  543. priv->fw_early_crash_irq = irq;
  544. }
  545. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  546. {
  547. struct thermal_zone_device *thermal_dev;
  548. const char *tsens;
  549. int ret;
  550. ret = of_property_read_string(priv->pdev->dev.of_node,
  551. "tsens",
  552. &tsens);
  553. if (ret)
  554. return ret;
  555. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  556. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  557. if (IS_ERR(thermal_dev)) {
  558. icnss_pr_err("Fail to get thermal zone. ret: %d",
  559. PTR_ERR(thermal_dev));
  560. return PTR_ERR(thermal_dev);
  561. }
  562. ret = thermal_zone_get_temp(thermal_dev, temp);
  563. if (ret)
  564. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  565. return ret;
  566. }
  567. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  568. {
  569. struct icnss_priv *priv = ctx;
  570. if (priv)
  571. complete(&priv->smp2p_soc_wake_wait);
  572. return IRQ_HANDLED;
  573. }
  574. static void register_soc_wake_notif(struct device *dev)
  575. {
  576. struct icnss_priv *priv = dev_get_drvdata(dev);
  577. struct device_node *dev_node;
  578. int irq = 0, ret = 0;
  579. if (!priv)
  580. return;
  581. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  582. if (!dev_node) {
  583. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  584. return;
  585. }
  586. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  587. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  588. ret = irq = of_irq_get_byname(dev_node,
  589. "qcom,smp2p-soc-wake-ack");
  590. if (ret < 0) {
  591. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  592. irq);
  593. return;
  594. }
  595. }
  596. ret = devm_request_threaded_irq(dev, irq, NULL,
  597. fw_soc_wake_ack_handler,
  598. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  599. IRQF_TRIGGER_FALLING,
  600. "wlanfw-soc-wake-ack", priv);
  601. if (ret < 0) {
  602. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  603. irq, ret);
  604. return;
  605. }
  606. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  607. priv->fw_soc_wake_ack_irq = irq;
  608. }
  609. int icnss_call_driver_uevent(struct icnss_priv *priv,
  610. enum icnss_uevent uevent, void *data)
  611. {
  612. struct icnss_uevent_data uevent_data;
  613. if (!priv->ops || !priv->ops->uevent)
  614. return 0;
  615. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  616. priv->state, uevent);
  617. uevent_data.uevent = uevent;
  618. uevent_data.data = data;
  619. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  620. }
  621. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  622. {
  623. int i;
  624. int ret = 0;
  625. ret = icnss_qmi_get_dms_mac(priv);
  626. if (ret == 0 && priv->dms.mac_valid)
  627. goto qmi_send;
  628. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  629. * Thus assert on failure to get MAC from DMS even after retries
  630. */
  631. if (priv->use_nv_mac) {
  632. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  633. if (priv->dms.mac_valid)
  634. break;
  635. ret = icnss_qmi_get_dms_mac(priv);
  636. if (ret != -EAGAIN)
  637. break;
  638. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  639. }
  640. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  641. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  642. ICNSS_ASSERT(0);
  643. return -EINVAL;
  644. }
  645. }
  646. qmi_send:
  647. if (priv->dms.mac_valid)
  648. ret =
  649. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  650. ARRAY_SIZE(priv->dms.mac));
  651. return ret;
  652. }
  653. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  654. enum smp2p_out_entry smp2p_entry)
  655. {
  656. int retry = 0;
  657. int error;
  658. if (priv->smp2p_info[smp2p_entry].smem_state)
  659. return;
  660. retry:
  661. priv->smp2p_info[smp2p_entry].smem_state =
  662. qcom_smem_state_get(&priv->pdev->dev,
  663. icnss_smp2p_str[smp2p_entry],
  664. &priv->smp2p_info[smp2p_entry].smem_bit);
  665. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  666. if (retry++ < SMP2P_GET_MAX_RETRY) {
  667. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  668. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  669. error, icnss_smp2p_str[smp2p_entry]);
  670. msleep(SMP2P_GET_RETRY_DELAY_MS);
  671. goto retry;
  672. }
  673. ICNSS_ASSERT(0);
  674. return;
  675. }
  676. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  677. }
  678. static inline
  679. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  680. {
  681. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  682. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  683. } else {
  684. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  685. }
  686. }
  687. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  688. {
  689. switch (val) {
  690. case WLAN_RF_SLATE:
  691. return WLFW_WLAN_RF_SLATE_V01;
  692. case WLAN_RF_APACHE:
  693. return WLFW_WLAN_RF_APACHE_V01;
  694. default:
  695. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  696. }
  697. }
  698. #ifdef SLATE_MODULE_ENABLED
  699. static void icnss_send_wlan_boot_init(void)
  700. {
  701. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  702. icnss_pr_info("sent wlan boot init command\n");
  703. }
  704. static void icnss_send_wlan_boot_complete(void)
  705. {
  706. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  707. icnss_pr_info("sent wlan boot complete command\n");
  708. }
  709. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  710. {
  711. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  712. reinit_completion(&priv->slate_boot_complete);
  713. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  714. priv->state);
  715. wait_for_completion(&priv->slate_boot_complete);
  716. }
  717. if (!test_bit(ICNSS_SLATE_UP, &priv->state))
  718. return -EINVAL;
  719. icnss_send_wlan_boot_init();
  720. return 0;
  721. }
  722. #else
  723. static void icnss_send_wlan_boot_complete(void)
  724. {
  725. }
  726. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  727. {
  728. return 0;
  729. }
  730. #endif
  731. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  732. void *data)
  733. {
  734. int ret = 0;
  735. int temp = 0;
  736. bool ignore_assert = false;
  737. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  738. if (!priv)
  739. return -ENODEV;
  740. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  741. clear_bit(ICNSS_FW_DOWN, &priv->state);
  742. clear_bit(ICNSS_FW_READY, &priv->state);
  743. if (priv->is_slate_rfa) {
  744. ret = icnss_wait_for_slate_complete(priv);
  745. if (ret == -EINVAL) {
  746. icnss_pr_err("Slate complete failed\n");
  747. return ret;
  748. }
  749. }
  750. icnss_ignore_fw_timeout(false);
  751. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  752. icnss_pr_err("QMI Server already in Connected State\n");
  753. ICNSS_ASSERT(0);
  754. }
  755. ret = icnss_connect_to_fw_server(priv, data);
  756. if (ret)
  757. goto fail;
  758. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  759. ret = wlfw_ind_register_send_sync_msg(priv);
  760. if (ret < 0) {
  761. if (ret == -EALREADY) {
  762. ret = 0;
  763. goto qmi_registered;
  764. }
  765. ignore_assert = true;
  766. goto fail;
  767. }
  768. if (priv->is_rf_subtype_valid) {
  769. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  770. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  771. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  772. if (ret < 0)
  773. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  774. ret);
  775. } else {
  776. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  777. priv->rf_subtype);
  778. }
  779. }
  780. if (priv->device_id == WCN6750_DEVICE_ID ||
  781. priv->device_id == WCN6450_DEVICE_ID) {
  782. if (!icnss_get_temperature(priv, &temp)) {
  783. icnss_pr_dbg("Temperature: %d\n", temp);
  784. if (temp < WLAN_EN_TEMP_THRESHOLD)
  785. icnss_set_wlan_en_delay(priv);
  786. }
  787. ret = wlfw_host_cap_send_sync(priv);
  788. if (ret < 0)
  789. goto fail;
  790. }
  791. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  792. if (!priv->msa_va) {
  793. icnss_pr_err("Invalid MSA address\n");
  794. ret = -EINVAL;
  795. goto fail;
  796. }
  797. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  798. if (ret < 0) {
  799. ignore_assert = true;
  800. goto fail;
  801. }
  802. ret = wlfw_msa_ready_send_sync_msg(priv);
  803. if (ret < 0) {
  804. ignore_assert = true;
  805. goto fail;
  806. }
  807. }
  808. if (priv->device_id == WCN6450_DEVICE_ID)
  809. icnss_hw_power_off(priv);
  810. ret = wlfw_cap_send_sync_msg(priv);
  811. if (ret < 0) {
  812. ignore_assert = true;
  813. goto fail;
  814. }
  815. ret = icnss_hw_power_on(priv);
  816. if (ret)
  817. goto fail;
  818. if (priv->device_id == WCN6750_DEVICE_ID ||
  819. priv->device_id == WCN6450_DEVICE_ID) {
  820. ret = wlfw_device_info_send_msg(priv);
  821. if (ret < 0) {
  822. ignore_assert = true;
  823. goto device_info_failure;
  824. }
  825. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  826. priv->mem_base_pa,
  827. priv->mem_base_size);
  828. if (!priv->mem_base_va) {
  829. icnss_pr_err("Ioremap failed for bar address\n");
  830. goto device_info_failure;
  831. }
  832. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  833. &priv->mem_base_pa,
  834. priv->mem_base_va);
  835. if (priv->mhi_state_info_pa)
  836. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  837. priv->mhi_state_info_pa,
  838. PAGE_SIZE);
  839. if (!priv->mhi_state_info_va)
  840. icnss_pr_err("Ioremap failed for MHI info address\n");
  841. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  842. &priv->mhi_state_info_pa,
  843. priv->mhi_state_info_va);
  844. }
  845. if (priv->bdf_download_support) {
  846. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  847. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  848. priv->ctrl_params.bdf_type);
  849. if (ret < 0)
  850. goto device_info_failure;
  851. }
  852. if (priv->device_id == WCN6450_DEVICE_ID) {
  853. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  854. if (ret < 0)
  855. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  856. ret);
  857. }
  858. if (priv->device_id == WCN6750_DEVICE_ID ||
  859. priv->device_id == WCN6450_DEVICE_ID) {
  860. if (!priv->fw_soc_wake_ack_irq)
  861. register_soc_wake_notif(&priv->pdev->dev);
  862. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  863. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  864. }
  865. if (priv->wpss_supported)
  866. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  867. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  868. if (priv->bdf_download_support) {
  869. ret = wlfw_cal_report_req(priv);
  870. if (ret < 0)
  871. goto device_info_failure;
  872. }
  873. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  874. dynamic_feature_mask);
  875. }
  876. if (!priv->fw_error_fatal_irq)
  877. register_fw_error_notifications(&priv->pdev->dev);
  878. if (!priv->fw_early_crash_irq)
  879. register_early_crash_notifications(&priv->pdev->dev);
  880. if (priv->psf_supported)
  881. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  882. return ret;
  883. device_info_failure:
  884. icnss_hw_power_off(priv);
  885. fail:
  886. ICNSS_ASSERT(ignore_assert);
  887. qmi_registered:
  888. return ret;
  889. }
  890. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  891. {
  892. if (!priv)
  893. return -ENODEV;
  894. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  895. icnss_clear_server(priv);
  896. if (priv->psf_supported)
  897. priv->last_updated_voltage = 0;
  898. return 0;
  899. }
  900. static int icnss_call_driver_probe(struct icnss_priv *priv)
  901. {
  902. int ret = 0;
  903. int probe_cnt = 0;
  904. if (!priv->ops || !priv->ops->probe)
  905. return 0;
  906. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  907. return -EINVAL;
  908. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  909. icnss_hw_power_on(priv);
  910. icnss_block_shutdown(true);
  911. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  912. ret = priv->ops->probe(&priv->pdev->dev);
  913. probe_cnt++;
  914. if (ret != -EPROBE_DEFER)
  915. break;
  916. }
  917. if (ret < 0) {
  918. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  919. ret, priv->state, probe_cnt);
  920. icnss_block_shutdown(false);
  921. goto out;
  922. }
  923. icnss_block_shutdown(false);
  924. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  925. return 0;
  926. out:
  927. icnss_hw_power_off(priv);
  928. return ret;
  929. }
  930. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  931. {
  932. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  933. goto out;
  934. if (!priv->ops || !priv->ops->shutdown)
  935. goto out;
  936. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  937. goto out;
  938. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  939. priv->ops->shutdown(&priv->pdev->dev);
  940. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  941. out:
  942. return 0;
  943. }
  944. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  945. {
  946. int ret = 0;
  947. icnss_pm_relax(priv);
  948. icnss_call_driver_shutdown(priv);
  949. clear_bit(ICNSS_PDR, &priv->state);
  950. clear_bit(ICNSS_REJUVENATE, &priv->state);
  951. clear_bit(ICNSS_PD_RESTART, &priv->state);
  952. clear_bit(ICNSS_LOW_POWER, &priv->state);
  953. priv->early_crash_ind = false;
  954. priv->is_ssr = false;
  955. if (!priv->ops || !priv->ops->reinit)
  956. goto out;
  957. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  958. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  959. priv->state);
  960. goto out;
  961. }
  962. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  963. goto call_probe;
  964. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  965. icnss_hw_power_on(priv);
  966. icnss_block_shutdown(true);
  967. ret = priv->ops->reinit(&priv->pdev->dev);
  968. if (ret < 0) {
  969. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  970. ret, priv->state);
  971. if (!priv->allow_recursive_recovery)
  972. ICNSS_ASSERT(false);
  973. icnss_block_shutdown(false);
  974. goto out_power_off;
  975. }
  976. icnss_block_shutdown(false);
  977. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  978. return 0;
  979. call_probe:
  980. return icnss_call_driver_probe(priv);
  981. out_power_off:
  982. icnss_hw_power_off(priv);
  983. out:
  984. return ret;
  985. }
  986. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  987. {
  988. int ret = 0;
  989. if (!priv)
  990. return -ENODEV;
  991. del_timer(&priv->recovery_timer);
  992. set_bit(ICNSS_FW_READY, &priv->state);
  993. clear_bit(ICNSS_MODE_ON, &priv->state);
  994. atomic_set(&priv->soc_wake_ref_count, 0);
  995. if (priv->device_id == WCN6750_DEVICE_ID ||
  996. priv->device_id == WCN6450_DEVICE_ID)
  997. icnss_free_qdss_mem(priv);
  998. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  999. icnss_hw_power_off(priv);
  1000. if (!priv->pdev) {
  1001. icnss_pr_err("Device is not ready\n");
  1002. ret = -ENODEV;
  1003. goto out;
  1004. }
  1005. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  1006. icnss_send_wlan_boot_complete();
  1007. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1008. ret = icnss_pd_restart_complete(priv);
  1009. } else {
  1010. if (priv->wpss_supported)
  1011. icnss_setup_dms_mac(priv);
  1012. ret = icnss_call_driver_probe(priv);
  1013. }
  1014. icnss_vreg_unvote(priv);
  1015. out:
  1016. return ret;
  1017. }
  1018. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1019. {
  1020. int ret = 0;
  1021. if (!priv)
  1022. return -ENODEV;
  1023. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1024. if (priv->device_id == WCN6750_DEVICE_ID) {
  1025. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1026. if (ret < 0)
  1027. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1028. ret);
  1029. }
  1030. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1031. mod_timer(&priv->recovery_timer,
  1032. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1033. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1034. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1035. } else {
  1036. icnss_driver_event_fw_ready_ind(priv, NULL);
  1037. }
  1038. return ret;
  1039. }
  1040. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1041. {
  1042. struct platform_device *pdev = priv->pdev;
  1043. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1044. int i, j;
  1045. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1046. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1047. qdss_mem[i].va =
  1048. dma_alloc_coherent(&pdev->dev,
  1049. qdss_mem[i].size,
  1050. &qdss_mem[i].pa,
  1051. GFP_KERNEL);
  1052. if (!qdss_mem[i].va) {
  1053. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1054. qdss_mem[i].size,
  1055. qdss_mem[i].type, i);
  1056. break;
  1057. }
  1058. }
  1059. }
  1060. /* Best-effort allocation for QDSS trace */
  1061. if (i < priv->qdss_mem_seg_len) {
  1062. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1063. qdss_mem[j].type = 0;
  1064. qdss_mem[j].size = 0;
  1065. }
  1066. priv->qdss_mem_seg_len = i;
  1067. }
  1068. return 0;
  1069. }
  1070. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1071. {
  1072. struct platform_device *pdev = priv->pdev;
  1073. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1074. int i;
  1075. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1076. if (qdss_mem[i].va && qdss_mem[i].size) {
  1077. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1078. &qdss_mem[i].pa, qdss_mem[i].size,
  1079. qdss_mem[i].type);
  1080. dma_free_coherent(&pdev->dev,
  1081. qdss_mem[i].size, qdss_mem[i].va,
  1082. qdss_mem[i].pa);
  1083. qdss_mem[i].va = NULL;
  1084. qdss_mem[i].pa = 0;
  1085. qdss_mem[i].size = 0;
  1086. qdss_mem[i].type = 0;
  1087. }
  1088. }
  1089. priv->qdss_mem_seg_len = 0;
  1090. }
  1091. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1092. {
  1093. int ret = 0;
  1094. ret = icnss_alloc_qdss_mem(priv);
  1095. if (ret < 0)
  1096. return ret;
  1097. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1098. }
  1099. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1100. u64 pa, u32 size, int *seg_id)
  1101. {
  1102. int i = 0;
  1103. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1104. u64 offset = 0;
  1105. void *va = NULL;
  1106. u64 local_pa;
  1107. u32 local_size;
  1108. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1109. local_pa = (u64)qdss_mem[i].pa;
  1110. local_size = (u32)qdss_mem[i].size;
  1111. if (pa == local_pa && size <= local_size) {
  1112. va = qdss_mem[i].va;
  1113. break;
  1114. }
  1115. if (pa > local_pa &&
  1116. pa < local_pa + local_size &&
  1117. pa + size <= local_pa + local_size) {
  1118. offset = pa - local_pa;
  1119. va = qdss_mem[i].va + offset;
  1120. break;
  1121. }
  1122. }
  1123. *seg_id = i;
  1124. return va;
  1125. }
  1126. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1127. void *data)
  1128. {
  1129. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1130. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1131. int ret = 0;
  1132. int i;
  1133. void *va = NULL;
  1134. u64 pa;
  1135. u32 size;
  1136. int seg_id = 0;
  1137. if (!priv->qdss_mem_seg_len) {
  1138. icnss_pr_err("Memory for QDSS trace is not available\n");
  1139. return -ENOMEM;
  1140. }
  1141. if (event_data->mem_seg_len == 0) {
  1142. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1143. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1144. ICNSS_GENL_MSG_TYPE_QDSS,
  1145. event_data->file_name,
  1146. qdss_mem[i].size);
  1147. if (ret < 0) {
  1148. icnss_pr_err("Fail to save QDSS data: %d\n",
  1149. ret);
  1150. break;
  1151. }
  1152. }
  1153. } else {
  1154. for (i = 0; i < event_data->mem_seg_len; i++) {
  1155. pa = event_data->mem_seg[i].addr;
  1156. size = event_data->mem_seg[i].size;
  1157. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1158. size, &seg_id);
  1159. if (!va) {
  1160. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1161. &pa);
  1162. ret = -EINVAL;
  1163. break;
  1164. }
  1165. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1166. event_data->file_name, size);
  1167. if (ret < 0) {
  1168. icnss_pr_err("Fail to save QDSS data: %d\n",
  1169. ret);
  1170. break;
  1171. }
  1172. }
  1173. }
  1174. kfree(data);
  1175. return ret;
  1176. }
  1177. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1178. {
  1179. int dec, c = atomic_read(v);
  1180. do {
  1181. dec = c - 1;
  1182. if (unlikely(dec < 1))
  1183. break;
  1184. } while (!atomic_try_cmpxchg(v, &c, dec));
  1185. return dec;
  1186. }
  1187. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1188. void *data)
  1189. {
  1190. int ret = 0;
  1191. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1192. if (!priv)
  1193. return -ENODEV;
  1194. if (!data)
  1195. return -EINVAL;
  1196. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1197. event_data->total_size);
  1198. kfree(data);
  1199. return ret;
  1200. }
  1201. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1202. {
  1203. int ret = 0;
  1204. if (!priv)
  1205. return -ENODEV;
  1206. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1207. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1208. atomic_read(&priv->soc_wake_ref_count));
  1209. return 0;
  1210. }
  1211. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1212. ICNSS_SMP2P_OUT_SOC_WAKE);
  1213. if (!ret)
  1214. atomic_inc(&priv->soc_wake_ref_count);
  1215. return ret;
  1216. }
  1217. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1218. {
  1219. int ret = 0;
  1220. if (!priv)
  1221. return -ENODEV;
  1222. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1223. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1224. priv->soc_wake_ref_count);
  1225. return 0;
  1226. }
  1227. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1228. ICNSS_SMP2P_OUT_SOC_WAKE);
  1229. return ret;
  1230. }
  1231. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1232. void *data)
  1233. {
  1234. int ret = 0;
  1235. int probe_cnt = 0;
  1236. if (priv->ops)
  1237. return -EEXIST;
  1238. priv->ops = data;
  1239. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1240. set_bit(ICNSS_FW_READY, &priv->state);
  1241. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1242. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1243. priv->state);
  1244. return -ENODEV;
  1245. }
  1246. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1247. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1248. priv->state);
  1249. goto out;
  1250. }
  1251. ret = icnss_hw_power_on(priv);
  1252. if (ret)
  1253. goto out;
  1254. icnss_block_shutdown(true);
  1255. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1256. ret = priv->ops->probe(&priv->pdev->dev);
  1257. probe_cnt++;
  1258. if (ret != -EPROBE_DEFER)
  1259. break;
  1260. }
  1261. if (ret) {
  1262. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1263. ret, priv->state, probe_cnt);
  1264. icnss_block_shutdown(false);
  1265. goto power_off;
  1266. }
  1267. icnss_block_shutdown(false);
  1268. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1269. return 0;
  1270. power_off:
  1271. icnss_hw_power_off(priv);
  1272. out:
  1273. return ret;
  1274. }
  1275. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1276. void *data)
  1277. {
  1278. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1279. priv->ops = NULL;
  1280. goto out;
  1281. }
  1282. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1283. icnss_block_shutdown(true);
  1284. if (priv->ops)
  1285. priv->ops->remove(&priv->pdev->dev);
  1286. icnss_block_shutdown(false);
  1287. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1288. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1289. priv->ops = NULL;
  1290. icnss_hw_power_off(priv);
  1291. out:
  1292. return 0;
  1293. }
  1294. static int icnss_fw_crashed(struct icnss_priv *priv,
  1295. struct icnss_event_pd_service_down_data *event_data)
  1296. {
  1297. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1298. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1299. set_bit(ICNSS_PD_RESTART, &priv->state);
  1300. icnss_pm_stay_awake(priv);
  1301. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state) &&
  1302. test_bit(ICNSS_FW_READY, &priv->state)) {
  1303. clear_bit(ICNSS_FW_READY, &priv->state);
  1304. fw_down_data.crashed = true;
  1305. icnss_call_driver_uevent(priv,
  1306. ICNSS_UEVENT_FW_DOWN,
  1307. &fw_down_data);
  1308. }
  1309. if (event_data && event_data->fw_rejuvenate)
  1310. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1311. return 0;
  1312. }
  1313. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1314. struct icnss_uevent_hang_data *hang_data)
  1315. {
  1316. if (!priv->hang_event_data_va)
  1317. return -EINVAL;
  1318. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1319. priv->hang_event_data_len,
  1320. GFP_ATOMIC);
  1321. if (!priv->hang_event_data)
  1322. return -ENOMEM;
  1323. // Update the hang event params
  1324. hang_data->hang_event_data = priv->hang_event_data;
  1325. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1326. return 0;
  1327. }
  1328. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1329. {
  1330. struct icnss_uevent_hang_data hang_data = {0};
  1331. int ret = 0xFF;
  1332. if (priv->early_crash_ind) {
  1333. ret = icnss_update_hang_event_data(priv, &hang_data);
  1334. if (ret)
  1335. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1336. }
  1337. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1338. &hang_data);
  1339. if (!ret) {
  1340. kfree(priv->hang_event_data);
  1341. priv->hang_event_data = NULL;
  1342. }
  1343. return 0;
  1344. }
  1345. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1346. void *data)
  1347. {
  1348. struct icnss_event_pd_service_down_data *event_data = data;
  1349. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1350. icnss_ignore_fw_timeout(false);
  1351. goto out;
  1352. }
  1353. if (priv->force_err_fatal)
  1354. ICNSS_ASSERT(0);
  1355. if (priv->device_id == WCN6750_DEVICE_ID ||
  1356. priv->device_id == WCN6450_DEVICE_ID) {
  1357. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1358. ICNSS_SMP2P_OUT_SOC_WAKE);
  1359. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1360. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1361. }
  1362. if (priv->wpss_supported)
  1363. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1364. ICNSS_SMP2P_OUT_POWER_SAVE);
  1365. icnss_send_hang_event_data(priv);
  1366. if (priv->early_crash_ind) {
  1367. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1368. event_data->crashed, priv->state);
  1369. goto out;
  1370. }
  1371. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1372. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1373. event_data->crashed, priv->state);
  1374. if (!priv->allow_recursive_recovery)
  1375. ICNSS_ASSERT(0);
  1376. goto out;
  1377. }
  1378. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1379. icnss_fw_crashed(priv, event_data);
  1380. out:
  1381. kfree(data);
  1382. return 0;
  1383. }
  1384. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1385. void *data)
  1386. {
  1387. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1388. icnss_ignore_fw_timeout(false);
  1389. goto out;
  1390. }
  1391. priv->early_crash_ind = true;
  1392. icnss_fw_crashed(priv, NULL);
  1393. out:
  1394. kfree(data);
  1395. return 0;
  1396. }
  1397. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1398. void *data)
  1399. {
  1400. int ret = 0;
  1401. if (!priv->ops || !priv->ops->idle_shutdown)
  1402. return 0;
  1403. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1404. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1405. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1406. ret = -EBUSY;
  1407. } else {
  1408. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1409. priv->state);
  1410. icnss_block_shutdown(true);
  1411. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1412. icnss_block_shutdown(false);
  1413. }
  1414. return ret;
  1415. }
  1416. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1417. void *data)
  1418. {
  1419. int ret = 0;
  1420. if (!priv->ops || !priv->ops->idle_restart)
  1421. return 0;
  1422. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1423. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1424. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1425. ret = -EBUSY;
  1426. } else {
  1427. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1428. priv->state);
  1429. icnss_block_shutdown(true);
  1430. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1431. icnss_block_shutdown(false);
  1432. }
  1433. return ret;
  1434. }
  1435. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1436. {
  1437. icnss_free_qdss_mem(priv);
  1438. return 0;
  1439. }
  1440. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1441. void *data)
  1442. {
  1443. struct icnss_m3_upload_segments_req_data *event_data = data;
  1444. struct qcom_dump_segment segment;
  1445. int i, status = 0, ret = 0;
  1446. struct list_head head;
  1447. if (!dump_enabled()) {
  1448. icnss_pr_info("Dump collection is not enabled\n");
  1449. return ret;
  1450. }
  1451. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1452. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1453. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1454. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1455. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1456. return ret;
  1457. INIT_LIST_HEAD(&head);
  1458. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1459. memset(&segment, 0, sizeof(segment));
  1460. segment.va = devm_ioremap(&priv->pdev->dev,
  1461. event_data->m3_segment[i].addr,
  1462. event_data->m3_segment[i].size);
  1463. if (!segment.va) {
  1464. icnss_pr_err("Failed to ioremap M3 Dump region");
  1465. ret = -ENOMEM;
  1466. goto send_resp;
  1467. }
  1468. segment.size = event_data->m3_segment[i].size;
  1469. list_add(&segment.node, &head);
  1470. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1471. event_data->m3_segment[i].name);
  1472. switch (event_data->m3_segment[i].type) {
  1473. case QMI_M3_SEGMENT_PHYAREG_V01:
  1474. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1475. break;
  1476. case QMI_M3_SEGMENT_PHYDBG_V01:
  1477. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1478. break;
  1479. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1480. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1481. break;
  1482. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1483. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1484. break;
  1485. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1486. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1487. break;
  1488. default:
  1489. icnss_pr_err("Invalid Segment type: %d",
  1490. event_data->m3_segment[i].type);
  1491. }
  1492. if (ret) {
  1493. status = ret;
  1494. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1495. event_data->m3_segment[i].name, ret);
  1496. }
  1497. list_del(&segment.node);
  1498. }
  1499. send_resp:
  1500. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1501. status);
  1502. return ret;
  1503. }
  1504. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1505. {
  1506. int ret = 0;
  1507. struct icnss_subsys_restart_level_data *event_data = data;
  1508. if (!priv)
  1509. return -ENODEV;
  1510. if (!data)
  1511. return -EINVAL;
  1512. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1513. kfree(data);
  1514. return ret;
  1515. }
  1516. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1517. {
  1518. int ret;
  1519. struct icnss_priv *priv = icnss_get_plat_priv();
  1520. rproc_shutdown(priv->rproc);
  1521. ret = rproc_boot(priv->rproc);
  1522. if (ret) {
  1523. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1524. rproc_put(priv->rproc);
  1525. }
  1526. }
  1527. static void icnss_driver_event_work(struct work_struct *work)
  1528. {
  1529. struct icnss_priv *priv =
  1530. container_of(work, struct icnss_priv, event_work);
  1531. struct icnss_driver_event *event;
  1532. unsigned long flags;
  1533. int ret;
  1534. icnss_pm_stay_awake(priv);
  1535. spin_lock_irqsave(&priv->event_lock, flags);
  1536. while (!list_empty(&priv->event_list)) {
  1537. event = list_first_entry(&priv->event_list,
  1538. struct icnss_driver_event, list);
  1539. list_del(&event->list);
  1540. spin_unlock_irqrestore(&priv->event_lock, flags);
  1541. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1542. icnss_driver_event_to_str(event->type),
  1543. event->sync ? "-sync" : "", event->type,
  1544. priv->state);
  1545. switch (event->type) {
  1546. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1547. ret = icnss_driver_event_server_arrive(priv,
  1548. event->data);
  1549. break;
  1550. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1551. ret = icnss_driver_event_server_exit(priv);
  1552. break;
  1553. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1554. ret = icnss_driver_event_fw_ready_ind(priv,
  1555. event->data);
  1556. break;
  1557. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1558. ret = icnss_driver_event_register_driver(priv,
  1559. event->data);
  1560. break;
  1561. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1562. ret = icnss_driver_event_unregister_driver(priv,
  1563. event->data);
  1564. break;
  1565. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1566. ret = icnss_driver_event_pd_service_down(priv,
  1567. event->data);
  1568. break;
  1569. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1570. ret = icnss_driver_event_early_crash_ind(priv,
  1571. event->data);
  1572. break;
  1573. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1574. ret = icnss_driver_event_idle_shutdown(priv,
  1575. event->data);
  1576. break;
  1577. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1578. ret = icnss_driver_event_idle_restart(priv,
  1579. event->data);
  1580. break;
  1581. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1582. ret = icnss_driver_event_fw_init_done(priv,
  1583. event->data);
  1584. break;
  1585. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1586. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1587. break;
  1588. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1589. ret = icnss_qdss_trace_save_hdlr(priv,
  1590. event->data);
  1591. break;
  1592. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1593. ret = icnss_qdss_trace_free_hdlr(priv);
  1594. break;
  1595. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1596. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1597. break;
  1598. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1599. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1600. event->data);
  1601. break;
  1602. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1603. ret = icnss_subsys_restart_level(priv, event->data);
  1604. break;
  1605. default:
  1606. icnss_pr_err("Invalid Event type: %d", event->type);
  1607. kfree(event);
  1608. continue;
  1609. }
  1610. priv->stats.events[event->type].processed++;
  1611. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1612. icnss_driver_event_to_str(event->type),
  1613. event->sync ? "-sync" : "", event->type, ret,
  1614. priv->state);
  1615. spin_lock_irqsave(&priv->event_lock, flags);
  1616. if (event->sync) {
  1617. event->ret = ret;
  1618. complete(&event->complete);
  1619. continue;
  1620. }
  1621. spin_unlock_irqrestore(&priv->event_lock, flags);
  1622. kfree(event);
  1623. spin_lock_irqsave(&priv->event_lock, flags);
  1624. }
  1625. spin_unlock_irqrestore(&priv->event_lock, flags);
  1626. icnss_pm_relax(priv);
  1627. }
  1628. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1629. {
  1630. struct icnss_priv *priv =
  1631. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1632. struct icnss_soc_wake_event *event;
  1633. unsigned long flags;
  1634. int ret;
  1635. icnss_pm_stay_awake(priv);
  1636. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1637. while (!list_empty(&priv->soc_wake_msg_list)) {
  1638. event = list_first_entry(&priv->soc_wake_msg_list,
  1639. struct icnss_soc_wake_event, list);
  1640. list_del(&event->list);
  1641. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1642. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1643. icnss_soc_wake_event_to_str(event->type),
  1644. event->sync ? "-sync" : "", event->type,
  1645. priv->state);
  1646. switch (event->type) {
  1647. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1648. ret = icnss_event_soc_wake_request(priv,
  1649. event->data);
  1650. break;
  1651. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1652. ret = icnss_event_soc_wake_release(priv,
  1653. event->data);
  1654. break;
  1655. default:
  1656. icnss_pr_err("Invalid Event type: %d", event->type);
  1657. kfree(event);
  1658. continue;
  1659. }
  1660. priv->stats.soc_wake_events[event->type].processed++;
  1661. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1662. icnss_soc_wake_event_to_str(event->type),
  1663. event->sync ? "-sync" : "", event->type, ret,
  1664. priv->state);
  1665. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1666. if (event->sync) {
  1667. event->ret = ret;
  1668. complete(&event->complete);
  1669. continue;
  1670. }
  1671. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1672. kfree(event);
  1673. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1674. }
  1675. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1676. icnss_pm_relax(priv);
  1677. }
  1678. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1679. {
  1680. int ret = 0;
  1681. struct qcom_dump_segment segment;
  1682. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1683. struct list_head head;
  1684. if (!dump_enabled()) {
  1685. icnss_pr_info("Dump collection is not enabled\n");
  1686. return ret;
  1687. }
  1688. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1689. return ret;
  1690. INIT_LIST_HEAD(&head);
  1691. memset(&segment, 0, sizeof(segment));
  1692. segment.va = priv->msa_va;
  1693. segment.size = priv->msa_mem_size;
  1694. list_add(&segment.node, &head);
  1695. if (!msa0_dump_dev->dev) {
  1696. icnss_pr_err("Created Dump Device not found\n");
  1697. return 0;
  1698. }
  1699. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1700. if (ret) {
  1701. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1702. return ret;
  1703. }
  1704. list_del(&segment.node);
  1705. return ret;
  1706. }
  1707. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1708. void *data)
  1709. {
  1710. struct qcom_ssr_notify_data *notif = data;
  1711. int ret = 0;
  1712. if (!notif->crashed) {
  1713. if (atomic_read(&priv->is_shutdown)) {
  1714. atomic_set(&priv->is_shutdown, false);
  1715. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1716. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1717. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1718. clear_bit(ICNSS_FW_READY, &priv->state);
  1719. icnss_driver_event_post(priv,
  1720. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1721. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1722. NULL);
  1723. }
  1724. }
  1725. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1726. if (!wait_for_completion_timeout(
  1727. &priv->unblock_shutdown,
  1728. msecs_to_jiffies(PROBE_TIMEOUT)))
  1729. icnss_pr_err("modem block shutdown timeout\n");
  1730. }
  1731. ret = wlfw_send_modem_shutdown_msg(priv);
  1732. if (ret < 0)
  1733. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1734. ret);
  1735. }
  1736. }
  1737. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1738. {
  1739. switch (code) {
  1740. case QCOM_SSR_BEFORE_POWERUP:
  1741. return "BEFORE_POWERUP";
  1742. case QCOM_SSR_AFTER_POWERUP:
  1743. return "AFTER_POWERUP";
  1744. case QCOM_SSR_BEFORE_SHUTDOWN:
  1745. return "BEFORE_SHUTDOWN";
  1746. case QCOM_SSR_AFTER_SHUTDOWN:
  1747. return "AFTER_SHUTDOWN";
  1748. default:
  1749. return "UNKNOWN";
  1750. }
  1751. };
  1752. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1753. unsigned long code,
  1754. void *data)
  1755. {
  1756. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1757. wpss_early_ssr_nb);
  1758. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1759. icnss_qcom_ssr_notify_state_to_str(code), code);
  1760. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1761. set_bit(ICNSS_FW_DOWN, &priv->state);
  1762. icnss_ignore_fw_timeout(true);
  1763. }
  1764. return NOTIFY_DONE;
  1765. }
  1766. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1767. unsigned long code,
  1768. void *data)
  1769. {
  1770. struct icnss_event_pd_service_down_data *event_data;
  1771. struct qcom_ssr_notify_data *notif = data;
  1772. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1773. wpss_ssr_nb);
  1774. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1775. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1776. icnss_qcom_ssr_notify_state_to_str(code), code);
  1777. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1778. icnss_pr_info("Collecting msa0 segment dump\n");
  1779. icnss_msa0_ramdump(priv);
  1780. goto out;
  1781. }
  1782. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1783. goto out;
  1784. if (priv->wpss_self_recovery_enabled)
  1785. del_timer(&priv->wpss_ssr_timer);
  1786. priv->is_ssr = true;
  1787. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1788. priv->state, notif->crashed);
  1789. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1790. icnss_update_state_send_modem_shutdown(priv, data);
  1791. set_bit(ICNSS_FW_DOWN, &priv->state);
  1792. icnss_ignore_fw_timeout(true);
  1793. if (notif->crashed)
  1794. priv->stats.recovery.root_pd_crash++;
  1795. else
  1796. priv->stats.recovery.root_pd_shutdown++;
  1797. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1798. if (event_data == NULL)
  1799. return notifier_from_errno(-ENOMEM);
  1800. event_data->crashed = notif->crashed;
  1801. fw_down_data.crashed = !!notif->crashed;
  1802. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1803. clear_bit(ICNSS_FW_READY, &priv->state);
  1804. fw_down_data.crashed = !!notif->crashed;
  1805. icnss_call_driver_uevent(priv,
  1806. ICNSS_UEVENT_FW_DOWN,
  1807. &fw_down_data);
  1808. }
  1809. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1810. ICNSS_EVENT_SYNC, event_data);
  1811. if (notif->crashed)
  1812. mod_timer(&priv->recovery_timer,
  1813. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1814. out:
  1815. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1816. return NOTIFY_OK;
  1817. }
  1818. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1819. unsigned long code,
  1820. void *data)
  1821. {
  1822. struct icnss_event_pd_service_down_data *event_data;
  1823. struct qcom_ssr_notify_data *notif = data;
  1824. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1825. modem_ssr_nb);
  1826. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1827. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1828. icnss_qcom_ssr_notify_state_to_str(code), code);
  1829. switch (code) {
  1830. case QCOM_SSR_BEFORE_SHUTDOWN:
  1831. if (priv->is_slate_rfa)
  1832. complete(&priv->slate_boot_complete);
  1833. if (!notif->crashed &&
  1834. priv->low_power_support) { /* Hibernate */
  1835. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1836. icnss_driver_event_post(
  1837. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1838. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1839. set_bit(ICNSS_LOW_POWER, &priv->state);
  1840. }
  1841. break;
  1842. case QCOM_SSR_AFTER_SHUTDOWN:
  1843. /* Collect ramdump only when there was a crash. */
  1844. if (notif->crashed) {
  1845. icnss_pr_info("Collecting msa0 segment dump\n");
  1846. icnss_msa0_ramdump(priv);
  1847. }
  1848. goto out;
  1849. default:
  1850. goto out;
  1851. }
  1852. priv->is_ssr = true;
  1853. if (notif->crashed) {
  1854. priv->stats.recovery.root_pd_crash++;
  1855. priv->root_pd_shutdown = false;
  1856. } else {
  1857. priv->stats.recovery.root_pd_shutdown++;
  1858. priv->root_pd_shutdown = true;
  1859. }
  1860. icnss_update_state_send_modem_shutdown(priv, data);
  1861. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1862. set_bit(ICNSS_FW_DOWN, &priv->state);
  1863. icnss_ignore_fw_timeout(true);
  1864. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1865. clear_bit(ICNSS_FW_READY, &priv->state);
  1866. fw_down_data.crashed = !!notif->crashed;
  1867. icnss_call_driver_uevent(priv,
  1868. ICNSS_UEVENT_FW_DOWN,
  1869. &fw_down_data);
  1870. }
  1871. goto out;
  1872. }
  1873. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1874. priv->state, notif->crashed);
  1875. set_bit(ICNSS_FW_DOWN, &priv->state);
  1876. icnss_ignore_fw_timeout(true);
  1877. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1878. if (event_data == NULL)
  1879. return notifier_from_errno(-ENOMEM);
  1880. event_data->crashed = notif->crashed;
  1881. fw_down_data.crashed = !!notif->crashed;
  1882. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1883. clear_bit(ICNSS_FW_READY, &priv->state);
  1884. fw_down_data.crashed = !!notif->crashed;
  1885. icnss_call_driver_uevent(priv,
  1886. ICNSS_UEVENT_FW_DOWN,
  1887. &fw_down_data);
  1888. }
  1889. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1890. ICNSS_EVENT_SYNC, event_data);
  1891. if (notif->crashed)
  1892. mod_timer(&priv->recovery_timer,
  1893. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1894. out:
  1895. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1896. return NOTIFY_OK;
  1897. }
  1898. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1899. {
  1900. int ret = 0;
  1901. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1902. priv->wpss_early_notify_handler =
  1903. qcom_register_early_ssr_notifier("wpss",
  1904. &priv->wpss_early_ssr_nb);
  1905. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1906. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1907. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1908. }
  1909. return ret;
  1910. }
  1911. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1912. {
  1913. int ret = 0;
  1914. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1915. /*
  1916. * Assign priority of icnss wpss notifier callback over IPA
  1917. * modem notifier callback which is 0
  1918. */
  1919. priv->wpss_ssr_nb.priority = 1;
  1920. priv->wpss_notify_handler =
  1921. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1922. if (IS_ERR(priv->wpss_notify_handler)) {
  1923. ret = PTR_ERR(priv->wpss_notify_handler);
  1924. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1925. }
  1926. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1927. return ret;
  1928. }
  1929. #ifdef SLATE_MODULE_ENABLED
  1930. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  1931. unsigned long event, void *data)
  1932. {
  1933. icnss_pr_info("Received slate event 0x%x\n", event);
  1934. if (event == SLATE_STATUS) {
  1935. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1936. seb_nb);
  1937. enum boot_status status = *(enum boot_status *)data;
  1938. if (status == SLATE_READY) {
  1939. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  1940. priv->state);
  1941. set_bit(ICNSS_SLATE_READY, &priv->state);
  1942. set_bit(ICNSS_SLATE_UP, &priv->state);
  1943. complete(&priv->slate_boot_complete);
  1944. }
  1945. }
  1946. return NOTIFY_OK;
  1947. }
  1948. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1949. {
  1950. int ret = 0;
  1951. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  1952. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  1953. &priv->seb_nb);
  1954. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  1955. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  1956. icnss_pr_err("SLATE event register notifier failed: %d\n",
  1957. ret);
  1958. }
  1959. return ret;
  1960. }
  1961. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  1962. {
  1963. int ret = 0;
  1964. ret = seb_unregister_for_slate_event(priv->seb_handle, &priv->seb_nb);
  1965. if (ret < 0)
  1966. icnss_pr_err("Slate event unregister failed: %d\n", ret);
  1967. return ret;
  1968. }
  1969. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1970. unsigned long code,
  1971. void *data)
  1972. {
  1973. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1974. slate_ssr_nb);
  1975. int ret = 0;
  1976. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1977. if (code == QCOM_SSR_AFTER_POWERUP &&
  1978. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  1979. set_bit(ICNSS_SLATE_UP, &priv->state);
  1980. complete(&priv->slate_boot_complete);
  1981. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1982. priv->state);
  1983. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1984. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1985. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1986. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1987. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1988. priv->state);
  1989. goto skip_pdr;
  1990. }
  1991. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1992. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1993. if (ret < 0) {
  1994. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1995. ret, priv->state);
  1996. goto skip_pdr;
  1997. }
  1998. }
  1999. skip_pdr:
  2000. return NOTIFY_OK;
  2001. }
  2002. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2003. {
  2004. int ret = 0;
  2005. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  2006. priv->slate_notify_handler =
  2007. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  2008. if (IS_ERR(priv->slate_notify_handler)) {
  2009. ret = PTR_ERR(priv->slate_notify_handler);
  2010. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  2011. }
  2012. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  2013. return ret;
  2014. }
  2015. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2016. {
  2017. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  2018. return 0;
  2019. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  2020. &priv->slate_ssr_nb);
  2021. priv->slate_notify_handler = NULL;
  2022. return 0;
  2023. }
  2024. #else
  2025. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2026. {
  2027. return 0;
  2028. }
  2029. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2030. {
  2031. return 0;
  2032. }
  2033. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2034. {
  2035. return 0;
  2036. }
  2037. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2038. {
  2039. return 0;
  2040. }
  2041. #endif
  2042. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2043. {
  2044. int ret = 0;
  2045. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2046. /*
  2047. * Assign priority of icnss modem notifier callback over IPA
  2048. * modem notifier callback which is 0
  2049. */
  2050. priv->modem_ssr_nb.priority = 1;
  2051. priv->modem_notify_handler =
  2052. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2053. if (IS_ERR(priv->modem_notify_handler)) {
  2054. ret = PTR_ERR(priv->modem_notify_handler);
  2055. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2056. }
  2057. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2058. return ret;
  2059. }
  2060. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2061. {
  2062. if (IS_ERR(priv->wpss_early_notify_handler))
  2063. return;
  2064. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2065. &priv->wpss_early_ssr_nb);
  2066. priv->wpss_early_notify_handler = NULL;
  2067. }
  2068. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2069. {
  2070. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2071. return 0;
  2072. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2073. &priv->wpss_ssr_nb);
  2074. priv->wpss_notify_handler = NULL;
  2075. return 0;
  2076. }
  2077. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2078. {
  2079. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2080. return 0;
  2081. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2082. &priv->modem_ssr_nb);
  2083. priv->modem_notify_handler = NULL;
  2084. return 0;
  2085. }
  2086. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2087. {
  2088. struct icnss_priv *priv = priv_cb;
  2089. struct icnss_event_pd_service_down_data *event_data;
  2090. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2091. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2092. if (!priv)
  2093. return;
  2094. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2095. state, priv->state);
  2096. switch (state) {
  2097. case SERVREG_SERVICE_STATE_DOWN:
  2098. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2099. if (!event_data)
  2100. return;
  2101. event_data->crashed = true;
  2102. if (!priv->is_ssr) {
  2103. set_bit(ICNSS_PDR, &penv->state);
  2104. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2105. cause = ICNSS_HOST_ERROR;
  2106. priv->stats.recovery.pdr_host_error++;
  2107. } else {
  2108. cause = ICNSS_FW_CRASH;
  2109. priv->stats.recovery.pdr_fw_crash++;
  2110. }
  2111. } else if (priv->root_pd_shutdown) {
  2112. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2113. event_data->crashed = false;
  2114. }
  2115. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2116. priv->state, icnss_pdr_cause[cause]);
  2117. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2118. set_bit(ICNSS_FW_DOWN, &priv->state);
  2119. icnss_ignore_fw_timeout(true);
  2120. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2121. clear_bit(ICNSS_FW_READY, &priv->state);
  2122. fw_down_data.crashed = event_data->crashed;
  2123. icnss_call_driver_uevent(priv,
  2124. ICNSS_UEVENT_FW_DOWN,
  2125. &fw_down_data);
  2126. }
  2127. }
  2128. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2129. if (event_data->crashed)
  2130. mod_timer(&priv->recovery_timer,
  2131. jiffies +
  2132. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2133. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2134. ICNSS_EVENT_SYNC, event_data);
  2135. break;
  2136. case SERVREG_SERVICE_STATE_UP:
  2137. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2138. break;
  2139. default:
  2140. break;
  2141. }
  2142. return;
  2143. }
  2144. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2145. {
  2146. struct pdr_handle *handle = NULL;
  2147. struct pdr_service *service = NULL;
  2148. int err = 0;
  2149. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2150. if (IS_ERR_OR_NULL(handle)) {
  2151. err = PTR_ERR(handle);
  2152. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2153. goto out;
  2154. }
  2155. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2156. if (IS_ERR_OR_NULL(service)) {
  2157. err = PTR_ERR(service);
  2158. icnss_pr_err("Failed to add lookup, err %d", err);
  2159. goto out;
  2160. }
  2161. priv->pdr_handle = handle;
  2162. priv->pdr_service = service;
  2163. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2164. icnss_pr_info("PDR registration happened");
  2165. out:
  2166. return err;
  2167. }
  2168. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2169. {
  2170. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2171. return;
  2172. pdr_handle_release(priv->pdr_handle);
  2173. }
  2174. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2175. {
  2176. int ret = 0;
  2177. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2178. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2179. ret = PTR_ERR(priv->icnss_ramdump_class);
  2180. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2181. return ret;
  2182. }
  2183. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2184. ICNSS_RAMDUMP_NAME);
  2185. if (ret < 0) {
  2186. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2187. goto fail_alloc_major;
  2188. }
  2189. return 0;
  2190. fail_alloc_major:
  2191. class_destroy(priv->icnss_ramdump_class);
  2192. return ret;
  2193. }
  2194. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2195. {
  2196. int ret = 0;
  2197. struct icnss_ramdump_info *ramdump_info;
  2198. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2199. if (!ramdump_info)
  2200. return ERR_PTR(-ENOMEM);
  2201. if (!dev_name) {
  2202. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2203. return NULL;
  2204. }
  2205. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2206. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2207. if (ramdump_info->minor < 0) {
  2208. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2209. ramdump_info->minor);
  2210. ret = -ENODEV;
  2211. goto fail_out_of_minors;
  2212. }
  2213. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2214. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2215. ramdump_info->minor),
  2216. ramdump_info, ramdump_info->name);
  2217. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2218. ret = PTR_ERR(ramdump_info->dev);
  2219. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2220. ramdump_info->name, ret);
  2221. goto fail_device_create;
  2222. }
  2223. return (void *)ramdump_info;
  2224. fail_device_create:
  2225. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2226. fail_out_of_minors:
  2227. kfree(ramdump_info);
  2228. return ERR_PTR(ret);
  2229. }
  2230. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2231. {
  2232. int ret = 0;
  2233. if (!priv || !priv->pdev) {
  2234. icnss_pr_err("Platform priv or pdev is NULL\n");
  2235. return -EINVAL;
  2236. }
  2237. ret = icnss_ramdump_devnode_init(priv);
  2238. if (ret)
  2239. return ret;
  2240. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2241. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2242. icnss_pr_err("Failed to create msa0 dump device!");
  2243. return -ENOMEM;
  2244. }
  2245. if (priv->device_id == WCN6750_DEVICE_ID ||
  2246. priv->device_id == WCN6450_DEVICE_ID) {
  2247. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2248. ICNSS_M3_SEGMENT(
  2249. ICNSS_M3_SEGMENT_PHYAREG));
  2250. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2251. !priv->m3_dump_phyareg->dev) {
  2252. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2253. return -ENOMEM;
  2254. }
  2255. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2256. ICNSS_M3_SEGMENT(
  2257. ICNSS_M3_SEGMENT_PHYA));
  2258. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2259. !priv->m3_dump_phydbg->dev) {
  2260. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2261. return -ENOMEM;
  2262. }
  2263. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2264. ICNSS_M3_SEGMENT(
  2265. ICNSS_M3_SEGMENT_WMACREG));
  2266. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2267. !priv->m3_dump_wmac0reg->dev) {
  2268. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2269. return -ENOMEM;
  2270. }
  2271. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2272. ICNSS_M3_SEGMENT(
  2273. ICNSS_M3_SEGMENT_WCSSDBG));
  2274. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2275. !priv->m3_dump_wcssdbg->dev) {
  2276. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2277. return -ENOMEM;
  2278. }
  2279. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2280. ICNSS_M3_SEGMENT(
  2281. ICNSS_M3_SEGMENT_PHYAM3));
  2282. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2283. !priv->m3_dump_phyapdmem->dev) {
  2284. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2285. return -ENOMEM;
  2286. }
  2287. }
  2288. return 0;
  2289. }
  2290. static int icnss_enable_recovery(struct icnss_priv *priv)
  2291. {
  2292. int ret;
  2293. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2294. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2295. return 0;
  2296. }
  2297. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2298. icnss_pr_dbg("SSR disabled through module parameter\n");
  2299. goto enable_pdr;
  2300. }
  2301. ret = icnss_register_ramdump_devices(priv);
  2302. if (ret)
  2303. return ret;
  2304. if (priv->wpss_supported) {
  2305. icnss_wpss_early_ssr_register_notifier(priv);
  2306. icnss_wpss_ssr_register_notifier(priv);
  2307. return 0;
  2308. }
  2309. if (!(priv->rproc_fw_download))
  2310. icnss_modem_ssr_register_notifier(priv);
  2311. if (priv->is_slate_rfa) {
  2312. icnss_slate_ssr_register_notifier(priv);
  2313. icnss_register_slate_event_notifier(priv);
  2314. }
  2315. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2316. icnss_pr_dbg("PDR disabled through module parameter\n");
  2317. return 0;
  2318. }
  2319. enable_pdr:
  2320. ret = icnss_pd_restart_enable(priv);
  2321. if (ret)
  2322. return ret;
  2323. return 0;
  2324. }
  2325. static int icnss_dev_id_match(struct icnss_priv *priv,
  2326. struct device_info *dev_info)
  2327. {
  2328. while (dev_info->device_id) {
  2329. if (priv->device_id == dev_info->device_id)
  2330. return 1;
  2331. dev_info++;
  2332. }
  2333. return 0;
  2334. }
  2335. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2336. unsigned long *thermal_state)
  2337. {
  2338. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2339. *thermal_state = icnss_tcdev->max_thermal_state;
  2340. return 0;
  2341. }
  2342. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2343. unsigned long *thermal_state)
  2344. {
  2345. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2346. *thermal_state = icnss_tcdev->curr_thermal_state;
  2347. return 0;
  2348. }
  2349. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2350. unsigned long thermal_state)
  2351. {
  2352. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2353. struct device *dev = &penv->pdev->dev;
  2354. int ret = 0;
  2355. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2356. return 0;
  2357. if (thermal_state > icnss_tcdev->max_thermal_state)
  2358. return -EINVAL;
  2359. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2360. thermal_state, icnss_tcdev->tcdev_id);
  2361. mutex_lock(&penv->tcdev_lock);
  2362. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2363. icnss_tcdev->tcdev_id);
  2364. if (!ret)
  2365. icnss_tcdev->curr_thermal_state = thermal_state;
  2366. mutex_unlock(&penv->tcdev_lock);
  2367. if (ret) {
  2368. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2369. ret, icnss_tcdev->tcdev_id);
  2370. return ret;
  2371. }
  2372. return 0;
  2373. }
  2374. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2375. .get_max_state = icnss_tcdev_get_max_state,
  2376. .get_cur_state = icnss_tcdev_get_cur_state,
  2377. .set_cur_state = icnss_tcdev_set_cur_state,
  2378. };
  2379. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2380. int tcdev_id)
  2381. {
  2382. struct icnss_priv *priv = dev_get_drvdata(dev);
  2383. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2384. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2385. struct device_node *dev_node;
  2386. int ret = 0;
  2387. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2388. if (!icnss_tcdev)
  2389. return -ENOMEM;
  2390. icnss_tcdev->tcdev_id = tcdev_id;
  2391. icnss_tcdev->max_thermal_state = max_state;
  2392. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2393. "qcom,icnss_cdev%d", tcdev_id);
  2394. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2395. if (!dev_node) {
  2396. icnss_pr_err("Failed to get cooling device node\n");
  2397. return -EINVAL;
  2398. }
  2399. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2400. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2401. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2402. dev_node,
  2403. cdev_node_name, icnss_tcdev,
  2404. &icnss_cooling_ops);
  2405. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2406. ret = PTR_ERR(icnss_tcdev->tcdev);
  2407. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2408. ret, icnss_tcdev->tcdev_id);
  2409. } else {
  2410. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2411. icnss_tcdev->tcdev_id);
  2412. list_add(&icnss_tcdev->tcdev_list,
  2413. &priv->icnss_tcdev_list);
  2414. }
  2415. } else {
  2416. icnss_pr_dbg("Cooling device registration not supported");
  2417. ret = -EOPNOTSUPP;
  2418. }
  2419. return ret;
  2420. }
  2421. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2422. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2423. {
  2424. struct icnss_priv *priv = dev_get_drvdata(dev);
  2425. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2426. while (!list_empty(&priv->icnss_tcdev_list)) {
  2427. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2428. struct icnss_thermal_cdev,
  2429. tcdev_list);
  2430. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2431. list_del(&icnss_tcdev->tcdev_list);
  2432. kfree(icnss_tcdev);
  2433. }
  2434. }
  2435. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2436. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2437. unsigned long *thermal_state,
  2438. int tcdev_id)
  2439. {
  2440. struct icnss_priv *priv = dev_get_drvdata(dev);
  2441. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2442. mutex_lock(&priv->tcdev_lock);
  2443. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2444. if (icnss_tcdev->tcdev_id != tcdev_id)
  2445. continue;
  2446. *thermal_state = icnss_tcdev->curr_thermal_state;
  2447. mutex_unlock(&priv->tcdev_lock);
  2448. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2449. icnss_tcdev->curr_thermal_state, tcdev_id);
  2450. return 0;
  2451. }
  2452. mutex_unlock(&priv->tcdev_lock);
  2453. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2454. return -EINVAL;
  2455. }
  2456. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2457. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2458. int cmd_len, void *cb_ctx,
  2459. int (*cb)(void *ctx, void *event, int event_len))
  2460. {
  2461. struct icnss_priv *priv = icnss_get_plat_priv();
  2462. int ret;
  2463. if (!priv)
  2464. return -ENODEV;
  2465. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2466. return -EINVAL;
  2467. priv->get_info_cb = cb;
  2468. priv->get_info_cb_ctx = cb_ctx;
  2469. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2470. if (ret) {
  2471. priv->get_info_cb = NULL;
  2472. priv->get_info_cb_ctx = NULL;
  2473. }
  2474. return ret;
  2475. }
  2476. EXPORT_SYMBOL(icnss_qmi_send);
  2477. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2478. struct module *owner, const char *mod_name)
  2479. {
  2480. int ret = 0;
  2481. struct icnss_priv *priv = icnss_get_plat_priv();
  2482. if (!priv || !priv->pdev) {
  2483. ret = -ENODEV;
  2484. goto out;
  2485. }
  2486. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2487. if (priv->ops) {
  2488. icnss_pr_err("Driver already registered\n");
  2489. ret = -EEXIST;
  2490. goto out;
  2491. }
  2492. if (!ops->dev_info) {
  2493. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2494. return -EINVAL;
  2495. }
  2496. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2497. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2498. ops->dev_info->name);
  2499. return -ENODEV;
  2500. }
  2501. if (!ops->probe || !ops->remove) {
  2502. ret = -EINVAL;
  2503. goto out;
  2504. }
  2505. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2506. 0, ops);
  2507. if (ret == -EINTR)
  2508. ret = 0;
  2509. out:
  2510. return ret;
  2511. }
  2512. EXPORT_SYMBOL(__icnss_register_driver);
  2513. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2514. {
  2515. int ret;
  2516. struct icnss_priv *priv = icnss_get_plat_priv();
  2517. if (!priv || !priv->pdev) {
  2518. ret = -ENODEV;
  2519. goto out;
  2520. }
  2521. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2522. if (!priv->ops) {
  2523. icnss_pr_err("Driver not registered\n");
  2524. ret = -ENOENT;
  2525. goto out;
  2526. }
  2527. ret = icnss_driver_event_post(priv,
  2528. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2529. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2530. out:
  2531. return ret;
  2532. }
  2533. EXPORT_SYMBOL(icnss_unregister_driver);
  2534. static struct icnss_msi_config msi_config_wcn6750 = {
  2535. .total_vectors = 28,
  2536. .total_users = 2,
  2537. .users = (struct icnss_msi_user[]) {
  2538. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2539. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2540. },
  2541. };
  2542. static struct icnss_msi_config msi_config_wcn6450 = {
  2543. .total_vectors = 14,
  2544. .total_users = 2,
  2545. .users = (struct icnss_msi_user[]) {
  2546. { .name = "CE", .num_vectors = 12, .base_vector = 0 },
  2547. { .name = "DP", .num_vectors = 2, .base_vector = 12 },
  2548. },
  2549. };
  2550. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2551. {
  2552. if (priv->device_id == WCN6750_DEVICE_ID)
  2553. priv->msi_config = &msi_config_wcn6750;
  2554. else
  2555. priv->msi_config = &msi_config_wcn6450;
  2556. return 0;
  2557. }
  2558. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2559. int *num_vectors, u32 *user_base_data,
  2560. u32 *base_vector)
  2561. {
  2562. struct icnss_priv *priv = dev_get_drvdata(dev);
  2563. struct icnss_msi_config *msi_config;
  2564. int idx;
  2565. if (!priv)
  2566. return -ENODEV;
  2567. msi_config = priv->msi_config;
  2568. if (!msi_config) {
  2569. icnss_pr_err("MSI is not supported.\n");
  2570. return -EINVAL;
  2571. }
  2572. for (idx = 0; idx < msi_config->total_users; idx++) {
  2573. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2574. *num_vectors = msi_config->users[idx].num_vectors;
  2575. *user_base_data = msi_config->users[idx].base_vector
  2576. + priv->msi_base_data;
  2577. *base_vector = msi_config->users[idx].base_vector;
  2578. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2579. user_name, *num_vectors, *user_base_data,
  2580. *base_vector);
  2581. return 0;
  2582. }
  2583. }
  2584. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2585. return -EINVAL;
  2586. }
  2587. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2588. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2589. {
  2590. struct icnss_priv *priv = dev_get_drvdata(dev);
  2591. int irq_num;
  2592. irq_num = priv->srng_irqs[vector];
  2593. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2594. irq_num, vector);
  2595. return irq_num;
  2596. }
  2597. EXPORT_SYMBOL(icnss_get_msi_irq);
  2598. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2599. u32 *msi_addr_high)
  2600. {
  2601. struct icnss_priv *priv = dev_get_drvdata(dev);
  2602. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2603. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2604. }
  2605. EXPORT_SYMBOL(icnss_get_msi_address);
  2606. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2607. irqreturn_t (*handler)(int, void *),
  2608. unsigned long flags, const char *name, void *ctx)
  2609. {
  2610. int ret = 0;
  2611. unsigned int irq;
  2612. struct ce_irq_list *irq_entry;
  2613. struct icnss_priv *priv = dev_get_drvdata(dev);
  2614. if (!priv || !priv->pdev) {
  2615. ret = -ENODEV;
  2616. goto out;
  2617. }
  2618. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2619. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2620. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2621. ret = -EINVAL;
  2622. goto out;
  2623. }
  2624. irq = priv->ce_irqs[ce_id];
  2625. irq_entry = &priv->ce_irq_list[ce_id];
  2626. if (irq_entry->handler || irq_entry->irq) {
  2627. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2628. irq, ce_id);
  2629. ret = -EEXIST;
  2630. goto out;
  2631. }
  2632. ret = request_irq(irq, handler, flags, name, ctx);
  2633. if (ret) {
  2634. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2635. irq, ce_id, ret);
  2636. goto out;
  2637. }
  2638. irq_entry->irq = irq;
  2639. irq_entry->handler = handler;
  2640. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2641. penv->stats.ce_irqs[ce_id].request++;
  2642. out:
  2643. return ret;
  2644. }
  2645. EXPORT_SYMBOL(icnss_ce_request_irq);
  2646. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2647. {
  2648. int ret = 0;
  2649. unsigned int irq;
  2650. struct ce_irq_list *irq_entry;
  2651. if (!penv || !penv->pdev || !dev) {
  2652. ret = -ENODEV;
  2653. goto out;
  2654. }
  2655. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2656. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2657. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2658. ret = -EINVAL;
  2659. goto out;
  2660. }
  2661. irq = penv->ce_irqs[ce_id];
  2662. irq_entry = &penv->ce_irq_list[ce_id];
  2663. if (!irq_entry->handler || !irq_entry->irq) {
  2664. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2665. ret = -EEXIST;
  2666. goto out;
  2667. }
  2668. free_irq(irq, ctx);
  2669. irq_entry->irq = 0;
  2670. irq_entry->handler = NULL;
  2671. penv->stats.ce_irqs[ce_id].free++;
  2672. out:
  2673. return ret;
  2674. }
  2675. EXPORT_SYMBOL(icnss_ce_free_irq);
  2676. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2677. {
  2678. unsigned int irq;
  2679. if (!penv || !penv->pdev || !dev) {
  2680. icnss_pr_err("Platform driver not initialized\n");
  2681. return;
  2682. }
  2683. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2684. penv->state);
  2685. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2686. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2687. return;
  2688. }
  2689. penv->stats.ce_irqs[ce_id].enable++;
  2690. irq = penv->ce_irqs[ce_id];
  2691. enable_irq(irq);
  2692. }
  2693. EXPORT_SYMBOL(icnss_enable_irq);
  2694. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2695. {
  2696. unsigned int irq;
  2697. if (!penv || !penv->pdev || !dev) {
  2698. icnss_pr_err("Platform driver not initialized\n");
  2699. return;
  2700. }
  2701. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2702. penv->state);
  2703. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2704. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2705. ce_id);
  2706. return;
  2707. }
  2708. irq = penv->ce_irqs[ce_id];
  2709. disable_irq(irq);
  2710. penv->stats.ce_irqs[ce_id].disable++;
  2711. }
  2712. EXPORT_SYMBOL(icnss_disable_irq);
  2713. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2714. {
  2715. char *fw_build_timestamp = NULL;
  2716. struct icnss_priv *priv = dev_get_drvdata(dev);
  2717. if (!priv) {
  2718. icnss_pr_err("Platform driver not initialized\n");
  2719. return -EINVAL;
  2720. }
  2721. info->v_addr = priv->mem_base_va;
  2722. info->p_addr = priv->mem_base_pa;
  2723. info->chip_id = priv->chip_info.chip_id;
  2724. info->chip_family = priv->chip_info.chip_family;
  2725. info->board_id = priv->board_id;
  2726. info->soc_id = priv->soc_id;
  2727. info->fw_version = priv->fw_version_info.fw_version;
  2728. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2729. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2730. strlcpy(info->fw_build_timestamp,
  2731. priv->fw_version_info.fw_build_timestamp,
  2732. WLFW_MAX_TIMESTAMP_LEN + 1);
  2733. strlcpy(info->fw_build_id, priv->fw_build_id,
  2734. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2735. info->rd_card_chain_cap = priv->rd_card_chain_cap;
  2736. info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
  2737. info->phy_qam_cap = priv->phy_qam_cap;
  2738. return 0;
  2739. }
  2740. EXPORT_SYMBOL(icnss_get_soc_info);
  2741. int icnss_get_mhi_state(struct device *dev)
  2742. {
  2743. struct icnss_priv *priv = dev_get_drvdata(dev);
  2744. if (!priv) {
  2745. icnss_pr_err("Platform driver not initialized\n");
  2746. return -EINVAL;
  2747. }
  2748. if (!priv->mhi_state_info_va)
  2749. return -ENOMEM;
  2750. return ioread32(priv->mhi_state_info_va);
  2751. }
  2752. EXPORT_SYMBOL(icnss_get_mhi_state);
  2753. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2754. {
  2755. int ret;
  2756. struct icnss_priv *priv;
  2757. if (!dev)
  2758. return -ENODEV;
  2759. priv = dev_get_drvdata(dev);
  2760. if (!priv) {
  2761. icnss_pr_err("Platform driver not initialized\n");
  2762. return -EINVAL;
  2763. }
  2764. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2765. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2766. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2767. priv->state);
  2768. return -EINVAL;
  2769. }
  2770. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2771. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2772. if (ret)
  2773. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2774. ret, fw_log_mode);
  2775. return ret;
  2776. }
  2777. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2778. int icnss_force_wake_request(struct device *dev)
  2779. {
  2780. struct icnss_priv *priv;
  2781. if (!dev)
  2782. return -ENODEV;
  2783. priv = dev_get_drvdata(dev);
  2784. if (!priv) {
  2785. icnss_pr_err("Platform driver not initialized\n");
  2786. return -EINVAL;
  2787. }
  2788. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2789. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2790. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2791. priv->state);
  2792. return -EINVAL;
  2793. }
  2794. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2795. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2796. atomic_read(&priv->soc_wake_ref_count));
  2797. return 0;
  2798. }
  2799. icnss_pr_soc_wake("Calling SOC Wake request");
  2800. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2801. 0, NULL);
  2802. return 0;
  2803. }
  2804. EXPORT_SYMBOL(icnss_force_wake_request);
  2805. int icnss_force_wake_release(struct device *dev)
  2806. {
  2807. struct icnss_priv *priv;
  2808. if (!dev)
  2809. return -ENODEV;
  2810. priv = dev_get_drvdata(dev);
  2811. if (!priv) {
  2812. icnss_pr_err("Platform driver not initialized\n");
  2813. return -EINVAL;
  2814. }
  2815. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2816. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2817. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2818. priv->state);
  2819. return -EINVAL;
  2820. }
  2821. icnss_pr_soc_wake("Calling SOC Wake response");
  2822. if (atomic_read(&priv->soc_wake_ref_count) &&
  2823. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2824. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2825. atomic_read(&priv->soc_wake_ref_count));
  2826. return 0;
  2827. }
  2828. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2829. 0, NULL);
  2830. return 0;
  2831. }
  2832. EXPORT_SYMBOL(icnss_force_wake_release);
  2833. int icnss_is_device_awake(struct device *dev)
  2834. {
  2835. struct icnss_priv *priv = dev_get_drvdata(dev);
  2836. if (!priv) {
  2837. icnss_pr_err("Platform driver not initialized\n");
  2838. return -EINVAL;
  2839. }
  2840. return atomic_read(&priv->soc_wake_ref_count);
  2841. }
  2842. EXPORT_SYMBOL(icnss_is_device_awake);
  2843. int icnss_is_pci_ep_awake(struct device *dev)
  2844. {
  2845. struct icnss_priv *priv = dev_get_drvdata(dev);
  2846. if (!priv) {
  2847. icnss_pr_err("Platform driver not initialized\n");
  2848. return -EINVAL;
  2849. }
  2850. if (!priv->mhi_state_info_va)
  2851. return -ENOMEM;
  2852. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2853. }
  2854. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2855. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2856. uint32_t mem_type, uint32_t data_len,
  2857. uint8_t *output)
  2858. {
  2859. int ret = 0;
  2860. struct icnss_priv *priv = dev_get_drvdata(dev);
  2861. if (priv->magic != ICNSS_MAGIC) {
  2862. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2863. dev, priv, priv->magic);
  2864. return -EINVAL;
  2865. }
  2866. if (!output || data_len == 0
  2867. || data_len > WLFW_MAX_DATA_SIZE) {
  2868. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2869. output, data_len);
  2870. ret = -EINVAL;
  2871. goto out;
  2872. }
  2873. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2874. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2875. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2876. priv->state);
  2877. ret = -EINVAL;
  2878. goto out;
  2879. }
  2880. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2881. data_len, output);
  2882. out:
  2883. return ret;
  2884. }
  2885. EXPORT_SYMBOL(icnss_athdiag_read);
  2886. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2887. uint32_t mem_type, uint32_t data_len,
  2888. uint8_t *input)
  2889. {
  2890. int ret = 0;
  2891. struct icnss_priv *priv = dev_get_drvdata(dev);
  2892. if (priv->magic != ICNSS_MAGIC) {
  2893. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2894. dev, priv, priv->magic);
  2895. return -EINVAL;
  2896. }
  2897. if (!input || data_len == 0
  2898. || data_len > WLFW_MAX_DATA_SIZE) {
  2899. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2900. input, data_len);
  2901. ret = -EINVAL;
  2902. goto out;
  2903. }
  2904. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2905. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2906. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2907. priv->state);
  2908. ret = -EINVAL;
  2909. goto out;
  2910. }
  2911. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2912. data_len, input);
  2913. out:
  2914. return ret;
  2915. }
  2916. EXPORT_SYMBOL(icnss_athdiag_write);
  2917. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2918. enum icnss_driver_mode mode,
  2919. const char *host_version)
  2920. {
  2921. struct icnss_priv *priv = dev_get_drvdata(dev);
  2922. int temp = 0, ret = 0;
  2923. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2924. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2925. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2926. priv->state);
  2927. return -EINVAL;
  2928. }
  2929. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2930. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2931. priv->state);
  2932. return -EINVAL;
  2933. }
  2934. if (priv->wpss_supported &&
  2935. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2936. icnss_setup_dms_mac(priv);
  2937. if (priv->device_id == WCN6750_DEVICE_ID) {
  2938. if (!icnss_get_temperature(priv, &temp)) {
  2939. icnss_pr_dbg("Temperature: %d\n", temp);
  2940. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2941. icnss_set_wlan_en_delay(priv);
  2942. }
  2943. }
  2944. if (priv->device_id == WCN6450_DEVICE_ID)
  2945. icnss_hw_power_off(priv);
  2946. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2947. if (priv->device_id == WCN6450_DEVICE_ID)
  2948. icnss_hw_power_on(priv);
  2949. return ret;
  2950. }
  2951. EXPORT_SYMBOL(icnss_wlan_enable);
  2952. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2953. {
  2954. struct icnss_priv *priv = dev_get_drvdata(dev);
  2955. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2956. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2957. priv->state);
  2958. return 0;
  2959. }
  2960. return icnss_send_wlan_disable_to_fw(priv);
  2961. }
  2962. EXPORT_SYMBOL(icnss_wlan_disable);
  2963. bool icnss_is_qmi_disable(struct device *dev)
  2964. {
  2965. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2966. }
  2967. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2968. int icnss_get_ce_id(struct device *dev, int irq)
  2969. {
  2970. int i;
  2971. if (!penv || !penv->pdev || !dev)
  2972. return -ENODEV;
  2973. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2974. if (penv->ce_irqs[i] == irq)
  2975. return i;
  2976. }
  2977. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2978. return -EINVAL;
  2979. }
  2980. EXPORT_SYMBOL(icnss_get_ce_id);
  2981. int icnss_get_irq(struct device *dev, int ce_id)
  2982. {
  2983. int irq;
  2984. if (!penv || !penv->pdev || !dev)
  2985. return -ENODEV;
  2986. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2987. return -EINVAL;
  2988. irq = penv->ce_irqs[ce_id];
  2989. return irq;
  2990. }
  2991. EXPORT_SYMBOL(icnss_get_irq);
  2992. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2993. {
  2994. struct icnss_priv *priv = dev_get_drvdata(dev);
  2995. if (!priv) {
  2996. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2997. return NULL;
  2998. }
  2999. return priv->iommu_domain;
  3000. }
  3001. EXPORT_SYMBOL(icnss_smmu_get_domain);
  3002. int icnss_smmu_map(struct device *dev,
  3003. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  3004. {
  3005. struct icnss_priv *priv = dev_get_drvdata(dev);
  3006. int flag = IOMMU_READ | IOMMU_WRITE;
  3007. bool dma_coherent = false;
  3008. unsigned long iova;
  3009. int prop_len = 0;
  3010. size_t len;
  3011. int ret = 0;
  3012. if (!priv) {
  3013. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3014. dev, priv);
  3015. return -EINVAL;
  3016. }
  3017. if (!iova_addr) {
  3018. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  3019. &paddr, size);
  3020. return -EINVAL;
  3021. }
  3022. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  3023. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  3024. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  3025. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3026. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3027. iova,
  3028. &priv->smmu_iova_ipa_start,
  3029. priv->smmu_iova_ipa_len);
  3030. return -ENOMEM;
  3031. }
  3032. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  3033. icnss_pr_dbg("dma-coherent is %s\n",
  3034. dma_coherent ? "enabled" : "disabled");
  3035. if (dma_coherent)
  3036. flag |= IOMMU_CACHE;
  3037. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3038. ret = iommu_map(priv->iommu_domain, iova,
  3039. rounddown(paddr, PAGE_SIZE), len,
  3040. flag);
  3041. if (ret) {
  3042. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3043. return ret;
  3044. }
  3045. priv->smmu_iova_ipa_current = iova + len;
  3046. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3047. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3048. return 0;
  3049. }
  3050. EXPORT_SYMBOL(icnss_smmu_map);
  3051. int icnss_smmu_unmap(struct device *dev,
  3052. uint32_t iova_addr, size_t size)
  3053. {
  3054. struct icnss_priv *priv = dev_get_drvdata(dev);
  3055. unsigned long iova;
  3056. size_t len, unmapped_len;
  3057. if (!priv) {
  3058. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3059. dev, priv);
  3060. return -EINVAL;
  3061. }
  3062. if (!iova_addr) {
  3063. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3064. size);
  3065. return -EINVAL;
  3066. }
  3067. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3068. PAGE_SIZE);
  3069. iova = rounddown(iova_addr, PAGE_SIZE);
  3070. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3071. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3072. iova,
  3073. &priv->smmu_iova_ipa_start,
  3074. priv->smmu_iova_ipa_len);
  3075. return -ENOMEM;
  3076. }
  3077. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3078. iova, len);
  3079. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3080. if (unmapped_len != len) {
  3081. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3082. return -EINVAL;
  3083. }
  3084. priv->smmu_iova_ipa_current = iova;
  3085. return 0;
  3086. }
  3087. EXPORT_SYMBOL(icnss_smmu_unmap);
  3088. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3089. {
  3090. return socinfo_get_serial_number();
  3091. }
  3092. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3093. int icnss_trigger_recovery(struct device *dev)
  3094. {
  3095. int ret = 0;
  3096. struct icnss_priv *priv = dev_get_drvdata(dev);
  3097. if (priv->magic != ICNSS_MAGIC) {
  3098. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3099. ret = -EINVAL;
  3100. goto out;
  3101. }
  3102. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3103. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3104. priv->state);
  3105. ret = -EPERM;
  3106. goto out;
  3107. }
  3108. if (priv->wpss_supported) {
  3109. icnss_pr_vdbg("Initiate Root PD restart");
  3110. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3111. ICNSS_SMP2P_OUT_POWER_SAVE);
  3112. if (!ret)
  3113. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3114. return ret;
  3115. }
  3116. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3117. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3118. priv->state);
  3119. ret = -EOPNOTSUPP;
  3120. goto out;
  3121. }
  3122. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3123. priv->state);
  3124. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3125. if (!ret)
  3126. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3127. out:
  3128. return ret;
  3129. }
  3130. EXPORT_SYMBOL(icnss_trigger_recovery);
  3131. int icnss_idle_shutdown(struct device *dev)
  3132. {
  3133. struct icnss_priv *priv = dev_get_drvdata(dev);
  3134. if (!priv) {
  3135. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3136. return -EINVAL;
  3137. }
  3138. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3139. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3140. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3141. return -EBUSY;
  3142. }
  3143. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3144. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3145. }
  3146. EXPORT_SYMBOL(icnss_idle_shutdown);
  3147. int icnss_idle_restart(struct device *dev)
  3148. {
  3149. struct icnss_priv *priv = dev_get_drvdata(dev);
  3150. if (!priv) {
  3151. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3152. return -EINVAL;
  3153. }
  3154. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3155. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3156. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3157. return -EBUSY;
  3158. }
  3159. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3160. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3161. }
  3162. EXPORT_SYMBOL(icnss_idle_restart);
  3163. int icnss_exit_power_save(struct device *dev)
  3164. {
  3165. struct icnss_priv *priv = dev_get_drvdata(dev);
  3166. icnss_pr_vdbg("Calling Exit Power Save\n");
  3167. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3168. !test_bit(ICNSS_MODE_ON, &priv->state))
  3169. return 0;
  3170. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3171. ICNSS_SMP2P_OUT_POWER_SAVE);
  3172. }
  3173. EXPORT_SYMBOL(icnss_exit_power_save);
  3174. int icnss_prevent_l1(struct device *dev)
  3175. {
  3176. struct icnss_priv *priv = dev_get_drvdata(dev);
  3177. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3178. !test_bit(ICNSS_MODE_ON, &priv->state))
  3179. return 0;
  3180. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3181. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3182. }
  3183. EXPORT_SYMBOL(icnss_prevent_l1);
  3184. void icnss_allow_l1(struct device *dev)
  3185. {
  3186. struct icnss_priv *priv = dev_get_drvdata(dev);
  3187. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3188. !test_bit(ICNSS_MODE_ON, &priv->state))
  3189. return;
  3190. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3191. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3192. }
  3193. EXPORT_SYMBOL(icnss_allow_l1);
  3194. void icnss_allow_recursive_recovery(struct device *dev)
  3195. {
  3196. struct icnss_priv *priv = dev_get_drvdata(dev);
  3197. priv->allow_recursive_recovery = true;
  3198. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3199. }
  3200. void icnss_disallow_recursive_recovery(struct device *dev)
  3201. {
  3202. struct icnss_priv *priv = dev_get_drvdata(dev);
  3203. priv->allow_recursive_recovery = false;
  3204. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3205. }
  3206. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3207. {
  3208. struct kobject *icnss_kobject;
  3209. int ret = 0;
  3210. atomic_set(&priv->is_shutdown, false);
  3211. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3212. if (!icnss_kobject) {
  3213. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3214. return -EINVAL;
  3215. }
  3216. priv->icnss_kobject = icnss_kobject;
  3217. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3218. if (ret) {
  3219. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3220. return ret;
  3221. }
  3222. return ret;
  3223. }
  3224. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3225. {
  3226. struct kobject *icnss_kobject;
  3227. icnss_kobject = priv->icnss_kobject;
  3228. if (icnss_kobject)
  3229. kobject_put(icnss_kobject);
  3230. }
  3231. static ssize_t qdss_tr_start_store(struct device *dev,
  3232. struct device_attribute *attr,
  3233. const char *buf, size_t count)
  3234. {
  3235. struct icnss_priv *priv = dev_get_drvdata(dev);
  3236. wlfw_qdss_trace_start(priv);
  3237. icnss_pr_dbg("Received QDSS start command\n");
  3238. return count;
  3239. }
  3240. static ssize_t qdss_tr_stop_store(struct device *dev,
  3241. struct device_attribute *attr,
  3242. const char *user_buf, size_t count)
  3243. {
  3244. struct icnss_priv *priv = dev_get_drvdata(dev);
  3245. u32 option = 0;
  3246. if (sscanf(user_buf, "%du", &option) != 1)
  3247. return -EINVAL;
  3248. wlfw_qdss_trace_stop(priv, option);
  3249. icnss_pr_dbg("Received QDSS stop command\n");
  3250. return count;
  3251. }
  3252. static ssize_t qdss_conf_download_store(struct device *dev,
  3253. struct device_attribute *attr,
  3254. const char *buf, size_t count)
  3255. {
  3256. struct icnss_priv *priv = dev_get_drvdata(dev);
  3257. icnss_wlfw_qdss_dnld_send_sync(priv);
  3258. icnss_pr_dbg("Received QDSS download config command\n");
  3259. return count;
  3260. }
  3261. static ssize_t hw_trc_override_store(struct device *dev,
  3262. struct device_attribute *attr,
  3263. const char *buf, size_t count)
  3264. {
  3265. struct icnss_priv *priv = dev_get_drvdata(dev);
  3266. int tmp = 0;
  3267. if (sscanf(buf, "%du", &tmp) != 1)
  3268. return -EINVAL;
  3269. priv->hw_trc_override = tmp;
  3270. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3271. return count;
  3272. }
  3273. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3274. {
  3275. struct icnss_priv *priv = icnss_get_plat_priv();
  3276. phandle rproc_phandle;
  3277. int ret;
  3278. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3279. &rproc_phandle)) {
  3280. icnss_pr_err("error reading rproc phandle\n");
  3281. return;
  3282. }
  3283. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3284. if (IS_ERR_OR_NULL(priv->rproc)) {
  3285. icnss_pr_err("rproc not found");
  3286. return;
  3287. }
  3288. ret = rproc_boot(priv->rproc);
  3289. if (ret) {
  3290. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3291. rproc_put(priv->rproc);
  3292. }
  3293. }
  3294. static ssize_t wpss_boot_store(struct device *dev,
  3295. struct device_attribute *attr,
  3296. const char *buf, size_t count)
  3297. {
  3298. struct icnss_priv *priv = dev_get_drvdata(dev);
  3299. int wpss_rproc = 0;
  3300. if (!priv->wpss_supported && !priv->rproc_fw_download)
  3301. return count;
  3302. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3303. icnss_pr_err("Failed to read wpss rproc info");
  3304. return -EINVAL;
  3305. }
  3306. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3307. if (wpss_rproc == 1)
  3308. schedule_work(&wpss_loader);
  3309. else if (wpss_rproc == 0)
  3310. icnss_wpss_unload(priv);
  3311. return count;
  3312. }
  3313. static ssize_t wlan_en_delay_store(struct device *dev,
  3314. struct device_attribute *attr,
  3315. const char *buf, size_t count)
  3316. {
  3317. struct icnss_priv *priv = dev_get_drvdata(dev);
  3318. uint32_t wlan_en_delay = 0;
  3319. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3320. return count;
  3321. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3322. icnss_pr_err("Failed to read wlan_en_delay");
  3323. return -EINVAL;
  3324. }
  3325. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3326. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3327. return count;
  3328. }
  3329. static DEVICE_ATTR_WO(qdss_tr_start);
  3330. static DEVICE_ATTR_WO(qdss_tr_stop);
  3331. static DEVICE_ATTR_WO(qdss_conf_download);
  3332. static DEVICE_ATTR_WO(hw_trc_override);
  3333. static DEVICE_ATTR_WO(wpss_boot);
  3334. static DEVICE_ATTR_WO(wlan_en_delay);
  3335. static struct attribute *icnss_attrs[] = {
  3336. &dev_attr_qdss_tr_start.attr,
  3337. &dev_attr_qdss_tr_stop.attr,
  3338. &dev_attr_qdss_conf_download.attr,
  3339. &dev_attr_hw_trc_override.attr,
  3340. &dev_attr_wpss_boot.attr,
  3341. &dev_attr_wlan_en_delay.attr,
  3342. NULL,
  3343. };
  3344. static struct attribute_group icnss_attr_group = {
  3345. .attrs = icnss_attrs,
  3346. };
  3347. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3348. {
  3349. struct device *dev = &priv->pdev->dev;
  3350. int ret;
  3351. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3352. if (ret) {
  3353. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3354. ret);
  3355. goto out;
  3356. }
  3357. return 0;
  3358. out:
  3359. return ret;
  3360. }
  3361. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3362. {
  3363. sysfs_remove_link(kernel_kobj, "icnss");
  3364. }
  3365. static int icnss_sysfs_create(struct icnss_priv *priv)
  3366. {
  3367. int ret = 0;
  3368. ret = devm_device_add_group(&priv->pdev->dev,
  3369. &icnss_attr_group);
  3370. if (ret) {
  3371. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3372. ret);
  3373. goto out;
  3374. }
  3375. icnss_create_sysfs_link(priv);
  3376. ret = icnss_create_shutdown_sysfs(priv);
  3377. if (ret)
  3378. goto remove_icnss_group;
  3379. return 0;
  3380. remove_icnss_group:
  3381. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3382. out:
  3383. return ret;
  3384. }
  3385. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3386. {
  3387. icnss_destroy_shutdown_sysfs(priv);
  3388. icnss_remove_sysfs_link(priv);
  3389. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3390. }
  3391. static int icnss_resource_parse(struct icnss_priv *priv)
  3392. {
  3393. int ret = 0, i = 0, irq = 0;
  3394. struct platform_device *pdev = priv->pdev;
  3395. struct device *dev = &pdev->dev;
  3396. struct resource *res;
  3397. u32 int_prop;
  3398. ret = icnss_get_vreg(priv);
  3399. if (ret) {
  3400. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3401. goto out;
  3402. }
  3403. ret = icnss_get_clk(priv);
  3404. if (ret) {
  3405. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3406. goto put_vreg;
  3407. }
  3408. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3409. ret = icnss_get_psf_info(priv);
  3410. if (ret < 0)
  3411. goto out;
  3412. priv->psf_supported = true;
  3413. }
  3414. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3415. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3416. "membase");
  3417. if (!res) {
  3418. icnss_pr_err("Memory base not found in DT\n");
  3419. ret = -EINVAL;
  3420. goto put_clk;
  3421. }
  3422. priv->mem_base_pa = res->start;
  3423. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3424. resource_size(res));
  3425. if (!priv->mem_base_va) {
  3426. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3427. &priv->mem_base_pa);
  3428. ret = -EINVAL;
  3429. goto put_clk;
  3430. }
  3431. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3432. &priv->mem_base_pa,
  3433. priv->mem_base_va);
  3434. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3435. irq = platform_get_irq(pdev, i);
  3436. if (irq < 0) {
  3437. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3438. ret = -ENODEV;
  3439. goto put_clk;
  3440. } else {
  3441. priv->ce_irqs[i] = irq;
  3442. }
  3443. }
  3444. if (of_property_read_bool(pdev->dev.of_node,
  3445. "qcom,is_low_power")) {
  3446. priv->low_power_support = true;
  3447. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3448. }
  3449. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3450. &priv->rf_subtype) == 0) {
  3451. priv->is_rf_subtype_valid = true;
  3452. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3453. }
  3454. if (of_property_read_bool(pdev->dev.of_node,
  3455. "qcom,is_slate_rfa")) {
  3456. priv->is_slate_rfa = true;
  3457. icnss_pr_err("SLATE rfa is enabled\n");
  3458. }
  3459. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3460. priv->device_id == WCN6450_DEVICE_ID) {
  3461. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3462. "msi_addr");
  3463. if (!res) {
  3464. icnss_pr_err("MSI address not found in DT\n");
  3465. ret = -EINVAL;
  3466. goto put_clk;
  3467. }
  3468. priv->msi_addr_pa = res->start;
  3469. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3470. PAGE_SIZE,
  3471. DMA_FROM_DEVICE, 0);
  3472. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3473. icnss_pr_err("MSI: failed to map msi address\n");
  3474. priv->msi_addr_iova = 0;
  3475. ret = -ENOMEM;
  3476. goto put_clk;
  3477. }
  3478. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3479. &priv->msi_addr_pa,
  3480. priv->msi_addr_iova);
  3481. ret = of_property_read_u32_index(dev->of_node,
  3482. "interrupts",
  3483. 1,
  3484. &int_prop);
  3485. if (ret) {
  3486. icnss_pr_dbg("Read interrupt prop failed");
  3487. goto put_clk;
  3488. }
  3489. priv->msi_base_data = int_prop + 32;
  3490. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3491. priv->msi_base_data, int_prop);
  3492. icnss_get_msi_assignment(priv);
  3493. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3494. irq = platform_get_irq(priv->pdev, i);
  3495. if (irq < 0) {
  3496. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3497. ret = -ENODEV;
  3498. goto put_clk;
  3499. } else {
  3500. priv->srng_irqs[i] = irq;
  3501. }
  3502. }
  3503. }
  3504. return 0;
  3505. put_clk:
  3506. icnss_put_clk(priv);
  3507. put_vreg:
  3508. icnss_put_vreg(priv);
  3509. out:
  3510. return ret;
  3511. }
  3512. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3513. {
  3514. int ret = 0;
  3515. struct platform_device *pdev = priv->pdev;
  3516. struct device *dev = &pdev->dev;
  3517. struct device_node *np = NULL;
  3518. u64 prop_size = 0;
  3519. const __be32 *addrp = NULL;
  3520. np = of_parse_phandle(dev->of_node,
  3521. "qcom,wlan-msa-fixed-region", 0);
  3522. if (np) {
  3523. addrp = of_get_address(np, 0, &prop_size, NULL);
  3524. if (!addrp) {
  3525. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3526. ret = -EINVAL;
  3527. of_node_put(np);
  3528. goto out;
  3529. }
  3530. priv->msa_pa = of_translate_address(np, addrp);
  3531. if (priv->msa_pa == OF_BAD_ADDR) {
  3532. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3533. ret = -EINVAL;
  3534. of_node_put(np);
  3535. goto out;
  3536. }
  3537. of_node_put(np);
  3538. priv->msa_va = memremap(priv->msa_pa,
  3539. (unsigned long)prop_size, MEMREMAP_WT);
  3540. if (!priv->msa_va) {
  3541. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3542. &priv->msa_pa);
  3543. ret = -EINVAL;
  3544. goto out;
  3545. }
  3546. priv->msa_mem_size = prop_size;
  3547. } else {
  3548. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3549. &priv->msa_mem_size);
  3550. if (ret || priv->msa_mem_size == 0) {
  3551. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3552. priv->msa_mem_size, ret);
  3553. goto out;
  3554. }
  3555. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3556. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3557. if (!priv->msa_va) {
  3558. icnss_pr_err("DMA alloc failed for MSA\n");
  3559. ret = -ENOMEM;
  3560. goto out;
  3561. }
  3562. }
  3563. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3564. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3565. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3566. "qcom,fw-prefix");
  3567. return 0;
  3568. out:
  3569. return ret;
  3570. }
  3571. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3572. struct device *dev, unsigned long iova,
  3573. int flags, void *handler_token)
  3574. {
  3575. struct icnss_priv *priv = handler_token;
  3576. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3577. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3578. if (!priv) {
  3579. icnss_pr_err("priv is NULL\n");
  3580. return -ENODEV;
  3581. }
  3582. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3583. fw_down_data.crashed = true;
  3584. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3585. &fw_down_data);
  3586. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3587. &fw_down_data);
  3588. }
  3589. icnss_trigger_recovery(&priv->pdev->dev);
  3590. /* IOMMU driver requires -ENOSYS return value to print debug info. */
  3591. return -ENOSYS;
  3592. }
  3593. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3594. {
  3595. int ret = 0;
  3596. struct platform_device *pdev = priv->pdev;
  3597. struct device *dev = &pdev->dev;
  3598. const char *iommu_dma_type;
  3599. struct resource *res;
  3600. u32 addr_win[2];
  3601. ret = of_property_read_u32_array(dev->of_node,
  3602. "qcom,iommu-dma-addr-pool",
  3603. addr_win,
  3604. ARRAY_SIZE(addr_win));
  3605. if (ret) {
  3606. icnss_pr_err("SMMU IOVA base not found\n");
  3607. } else {
  3608. priv->smmu_iova_start = addr_win[0];
  3609. priv->smmu_iova_len = addr_win[1];
  3610. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3611. &priv->smmu_iova_start,
  3612. priv->smmu_iova_len);
  3613. priv->iommu_domain =
  3614. iommu_get_domain_for_dev(&pdev->dev);
  3615. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3616. &iommu_dma_type);
  3617. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3618. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3619. priv->smmu_s1_enable = true;
  3620. if (priv->device_id == WCN6750_DEVICE_ID ||
  3621. priv->device_id == WCN6450_DEVICE_ID)
  3622. iommu_set_fault_handler(priv->iommu_domain,
  3623. icnss_smmu_fault_handler,
  3624. priv);
  3625. }
  3626. res = platform_get_resource_byname(pdev,
  3627. IORESOURCE_MEM,
  3628. "smmu_iova_ipa");
  3629. if (!res) {
  3630. icnss_pr_err("SMMU IOVA IPA not found\n");
  3631. } else {
  3632. priv->smmu_iova_ipa_start = res->start;
  3633. priv->smmu_iova_ipa_current = res->start;
  3634. priv->smmu_iova_ipa_len = resource_size(res);
  3635. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3636. &priv->smmu_iova_ipa_start,
  3637. priv->smmu_iova_ipa_len);
  3638. }
  3639. }
  3640. return 0;
  3641. }
  3642. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3643. {
  3644. if (!priv)
  3645. return -ENODEV;
  3646. if (!priv->smmu_iova_len)
  3647. return -EINVAL;
  3648. *addr = priv->smmu_iova_start;
  3649. *size = priv->smmu_iova_len;
  3650. return 0;
  3651. }
  3652. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3653. {
  3654. if (!priv)
  3655. return -ENODEV;
  3656. if (!priv->smmu_iova_ipa_len)
  3657. return -EINVAL;
  3658. *addr = priv->smmu_iova_ipa_start;
  3659. *size = priv->smmu_iova_ipa_len;
  3660. return 0;
  3661. }
  3662. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3663. char *name)
  3664. {
  3665. if (!priv)
  3666. return;
  3667. if (!priv->use_prefix_path) {
  3668. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3669. return;
  3670. }
  3671. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3672. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3673. ADRASTEA_PATH_PREFIX "%s", name);
  3674. else if (priv->device_id == WCN6750_DEVICE_ID)
  3675. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3676. QCA6750_PATH_PREFIX "%s", name);
  3677. else if (priv->device_id == WCN6450_DEVICE_ID)
  3678. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3679. WCN6450_PATH_PREFIX "%s", name);
  3680. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3681. }
  3682. static const struct platform_device_id icnss_platform_id_table[] = {
  3683. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3684. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3685. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3686. { },
  3687. };
  3688. static const struct of_device_id icnss_dt_match[] = {
  3689. {
  3690. .compatible = "qcom,wcn6750",
  3691. .data = (void *)&icnss_platform_id_table[0]},
  3692. {
  3693. .compatible = "qcom,icnss",
  3694. .data = (void *)&icnss_platform_id_table[1]},
  3695. {
  3696. .compatible = "qcom,wcn6450",
  3697. .data = (void *)&icnss_platform_id_table[2]},
  3698. { },
  3699. };
  3700. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3701. static void icnss_init_control_params(struct icnss_priv *priv)
  3702. {
  3703. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3704. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3705. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3706. if (priv->device_id == WCN6750_DEVICE_ID ||
  3707. of_property_read_bool(priv->pdev->dev.of_node,
  3708. "wpss-support-enable"))
  3709. priv->wpss_supported = true;
  3710. if (of_property_read_bool(priv->pdev->dev.of_node,
  3711. "bdf-download-support"))
  3712. priv->bdf_download_support = true;
  3713. if (of_property_read_bool(priv->pdev->dev.of_node,
  3714. "rproc-fw-download"))
  3715. priv->rproc_fw_download = true;
  3716. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3717. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3718. }
  3719. static void icnss_read_device_configs(struct icnss_priv *priv)
  3720. {
  3721. if (of_property_read_bool(priv->pdev->dev.of_node,
  3722. "wlan-ipa-disabled")) {
  3723. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3724. }
  3725. if (of_property_read_bool(priv->pdev->dev.of_node,
  3726. "qcom,wpss-self-recovery"))
  3727. priv->wpss_self_recovery_enabled = true;
  3728. }
  3729. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3730. {
  3731. pm_runtime_get_sync(&priv->pdev->dev);
  3732. pm_runtime_forbid(&priv->pdev->dev);
  3733. pm_runtime_set_active(&priv->pdev->dev);
  3734. pm_runtime_enable(&priv->pdev->dev);
  3735. }
  3736. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3737. {
  3738. pm_runtime_disable(&priv->pdev->dev);
  3739. pm_runtime_allow(&priv->pdev->dev);
  3740. pm_runtime_put_sync(&priv->pdev->dev);
  3741. }
  3742. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3743. {
  3744. return of_property_read_bool(priv->pdev->dev.of_node,
  3745. "use-nv-mac");
  3746. }
  3747. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3748. {
  3749. struct icnss_subsys_restart_level_data *restart_level_data;
  3750. icnss_pr_info("rproc name: %s recovery disable: %d",
  3751. rproc->name, rproc->recovery_disabled);
  3752. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3753. if (!restart_level_data)
  3754. return;
  3755. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3756. if (rproc->recovery_disabled)
  3757. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3758. else
  3759. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3760. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3761. 0, restart_level_data);
  3762. }
  3763. }
  3764. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3765. static void icnss_initialize_mem_pool(unsigned long device_id)
  3766. {
  3767. cnss_initialize_prealloc_pool(device_id);
  3768. }
  3769. static void icnss_deinitialize_mem_pool(void)
  3770. {
  3771. cnss_deinitialize_prealloc_pool();
  3772. }
  3773. #else
  3774. static void icnss_initialize_mem_pool(unsigned long device_id)
  3775. {
  3776. }
  3777. static void icnss_deinitialize_mem_pool(void)
  3778. {
  3779. }
  3780. #endif
  3781. static int icnss_probe(struct platform_device *pdev)
  3782. {
  3783. int ret = 0;
  3784. struct device *dev = &pdev->dev;
  3785. struct icnss_priv *priv;
  3786. const struct of_device_id *of_id;
  3787. const struct platform_device_id *device_id;
  3788. if (dev_get_drvdata(dev)) {
  3789. icnss_pr_err("Driver is already initialized\n");
  3790. return -EEXIST;
  3791. }
  3792. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3793. if (!of_id || !of_id->data) {
  3794. icnss_pr_err("Failed to find of match device!\n");
  3795. ret = -ENODEV;
  3796. goto out_reset_drvdata;
  3797. }
  3798. device_id = of_id->data;
  3799. icnss_pr_dbg("Platform driver probe\n");
  3800. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3801. if (!priv)
  3802. return -ENOMEM;
  3803. priv->magic = ICNSS_MAGIC;
  3804. dev_set_drvdata(dev, priv);
  3805. priv->pdev = pdev;
  3806. priv->device_id = device_id->driver_data;
  3807. priv->is_chain1_supported = true;
  3808. INIT_LIST_HEAD(&priv->vreg_list);
  3809. INIT_LIST_HEAD(&priv->clk_list);
  3810. icnss_allow_recursive_recovery(dev);
  3811. icnss_initialize_mem_pool(priv->device_id);
  3812. icnss_init_control_params(priv);
  3813. icnss_read_device_configs(priv);
  3814. ret = icnss_resource_parse(priv);
  3815. if (ret)
  3816. goto out_reset_drvdata;
  3817. ret = icnss_msa_dt_parse(priv);
  3818. if (ret)
  3819. goto out_free_resources;
  3820. ret = icnss_smmu_dt_parse(priv);
  3821. if (ret)
  3822. goto out_free_resources;
  3823. spin_lock_init(&priv->event_lock);
  3824. spin_lock_init(&priv->on_off_lock);
  3825. spin_lock_init(&priv->soc_wake_msg_lock);
  3826. mutex_init(&priv->dev_lock);
  3827. mutex_init(&priv->tcdev_lock);
  3828. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3829. if (!priv->event_wq) {
  3830. icnss_pr_err("Workqueue creation failed\n");
  3831. ret = -EFAULT;
  3832. goto smmu_cleanup;
  3833. }
  3834. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3835. INIT_LIST_HEAD(&priv->event_list);
  3836. if (priv->is_slate_rfa)
  3837. init_completion(&priv->slate_boot_complete);
  3838. ret = icnss_register_fw_service(priv);
  3839. if (ret < 0) {
  3840. icnss_pr_err("fw service registration failed: %d\n", ret);
  3841. goto out_destroy_wq;
  3842. }
  3843. icnss_enable_recovery(priv);
  3844. icnss_debugfs_create(priv);
  3845. icnss_sysfs_create(priv);
  3846. ret = device_init_wakeup(&priv->pdev->dev, true);
  3847. if (ret)
  3848. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3849. ret);
  3850. icnss_set_plat_priv(priv);
  3851. init_completion(&priv->unblock_shutdown);
  3852. if (priv->device_id == WCN6750_DEVICE_ID ||
  3853. priv->device_id == WCN6450_DEVICE_ID) {
  3854. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3855. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3856. if (!priv->soc_wake_wq) {
  3857. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3858. ret = -EFAULT;
  3859. goto out_unregister_fw_service;
  3860. }
  3861. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3862. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3863. ret = icnss_genl_init();
  3864. if (ret < 0)
  3865. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3866. init_completion(&priv->smp2p_soc_wake_wait);
  3867. icnss_runtime_pm_init(priv);
  3868. icnss_aop_interface_init(priv);
  3869. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3870. priv->bdf_download_support = true;
  3871. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3872. }
  3873. if (priv->wpss_supported) {
  3874. ret = icnss_dms_init(priv);
  3875. if (ret)
  3876. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3877. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3878. icnss_pr_dbg("NV MAC feature is %s\n",
  3879. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3880. }
  3881. if (priv->wpss_supported || priv->rproc_fw_download)
  3882. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3883. timer_setup(&priv->recovery_timer,
  3884. icnss_recovery_timeout_hdlr, 0);
  3885. if (priv->wpss_self_recovery_enabled) {
  3886. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3887. timer_setup(&priv->wpss_ssr_timer,
  3888. icnss_wpss_ssr_timeout_hdlr, 0);
  3889. }
  3890. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3891. icnss_pr_info("Platform driver probed successfully\n");
  3892. return 0;
  3893. out_unregister_fw_service:
  3894. icnss_unregister_fw_service(priv);
  3895. out_destroy_wq:
  3896. destroy_workqueue(priv->event_wq);
  3897. smmu_cleanup:
  3898. priv->iommu_domain = NULL;
  3899. out_free_resources:
  3900. icnss_put_resources(priv);
  3901. out_reset_drvdata:
  3902. icnss_deinitialize_mem_pool();
  3903. dev_set_drvdata(dev, NULL);
  3904. return ret;
  3905. }
  3906. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3907. {
  3908. if (IS_ERR_OR_NULL(ramdump_info))
  3909. return;
  3910. device_unregister(ramdump_info->dev);
  3911. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3912. kfree(ramdump_info);
  3913. }
  3914. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3915. {
  3916. if (priv->batt_psy)
  3917. power_supply_put(penv->batt_psy);
  3918. if (priv->psf_supported) {
  3919. flush_workqueue(priv->soc_update_wq);
  3920. destroy_workqueue(priv->soc_update_wq);
  3921. power_supply_unreg_notifier(&priv->psf_nb);
  3922. }
  3923. }
  3924. static int icnss_remove(struct platform_device *pdev)
  3925. {
  3926. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3927. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3928. del_timer(&priv->recovery_timer);
  3929. if (priv->wpss_self_recovery_enabled)
  3930. del_timer(&priv->wpss_ssr_timer);
  3931. device_init_wakeup(&priv->pdev->dev, false);
  3932. icnss_debugfs_destroy(priv);
  3933. icnss_unregister_power_supply_notifier(penv);
  3934. icnss_sysfs_destroy(priv);
  3935. complete_all(&priv->unblock_shutdown);
  3936. if (priv->is_slate_rfa) {
  3937. complete(&priv->slate_boot_complete);
  3938. icnss_slate_ssr_unregister_notifier(priv);
  3939. icnss_unregister_slate_event_notifier(priv);
  3940. }
  3941. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3942. if (priv->wpss_supported) {
  3943. icnss_dms_deinit(priv);
  3944. icnss_wpss_early_ssr_unregister_notifier(priv);
  3945. icnss_wpss_ssr_unregister_notifier(priv);
  3946. } else {
  3947. icnss_modem_ssr_unregister_notifier(priv);
  3948. icnss_pdr_unregister_notifier(priv);
  3949. }
  3950. if (priv->device_id == WCN6750_DEVICE_ID ||
  3951. priv->device_id == WCN6450_DEVICE_ID) {
  3952. icnss_genl_exit();
  3953. icnss_runtime_pm_deinit(priv);
  3954. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3955. complete_all(&priv->smp2p_soc_wake_wait);
  3956. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3957. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3958. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3959. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3960. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3961. if (priv->soc_wake_wq)
  3962. destroy_workqueue(priv->soc_wake_wq);
  3963. icnss_aop_interface_deinit(priv);
  3964. }
  3965. class_destroy(priv->icnss_ramdump_class);
  3966. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3967. icnss_unregister_fw_service(priv);
  3968. if (priv->event_wq)
  3969. destroy_workqueue(priv->event_wq);
  3970. priv->iommu_domain = NULL;
  3971. icnss_hw_power_off(priv);
  3972. icnss_put_resources(priv);
  3973. icnss_deinitialize_mem_pool();
  3974. dev_set_drvdata(&pdev->dev, NULL);
  3975. return 0;
  3976. }
  3977. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3978. {
  3979. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3980. /* This is to handle if slate is not up and modem SSR is triggered */
  3981. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state))
  3982. return;
  3983. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3984. ICNSS_ASSERT(0);
  3985. }
  3986. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3987. {
  3988. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3989. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3990. priv->state);
  3991. schedule_work(&wpss_ssr_work);
  3992. }
  3993. #ifdef CONFIG_PM_SLEEP
  3994. static int icnss_pm_suspend(struct device *dev)
  3995. {
  3996. struct icnss_priv *priv = dev_get_drvdata(dev);
  3997. int ret = 0;
  3998. if (priv->magic != ICNSS_MAGIC) {
  3999. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  4000. dev, priv, priv->magic);
  4001. return -EINVAL;
  4002. }
  4003. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  4004. if (!priv->ops || !priv->ops->pm_suspend ||
  4005. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4006. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4007. return 0;
  4008. ret = priv->ops->pm_suspend(dev);
  4009. if (ret == 0) {
  4010. if (priv->device_id == WCN6750_DEVICE_ID ||
  4011. priv->device_id == WCN6450_DEVICE_ID) {
  4012. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4013. !test_bit(ICNSS_MODE_ON, &priv->state))
  4014. return 0;
  4015. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4016. ICNSS_SMP2P_OUT_POWER_SAVE);
  4017. }
  4018. priv->stats.pm_suspend++;
  4019. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  4020. } else {
  4021. priv->stats.pm_suspend_err++;
  4022. }
  4023. return ret;
  4024. }
  4025. static int icnss_pm_resume(struct device *dev)
  4026. {
  4027. struct icnss_priv *priv = dev_get_drvdata(dev);
  4028. int ret = 0;
  4029. if (priv->magic != ICNSS_MAGIC) {
  4030. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  4031. dev, priv, priv->magic);
  4032. return -EINVAL;
  4033. }
  4034. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  4035. if (!priv->ops || !priv->ops->pm_resume ||
  4036. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4037. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4038. goto out;
  4039. ret = priv->ops->pm_resume(dev);
  4040. out:
  4041. if (ret == 0) {
  4042. priv->stats.pm_resume++;
  4043. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4044. } else {
  4045. priv->stats.pm_resume_err++;
  4046. }
  4047. return ret;
  4048. }
  4049. static int icnss_pm_suspend_noirq(struct device *dev)
  4050. {
  4051. struct icnss_priv *priv = dev_get_drvdata(dev);
  4052. int ret = 0;
  4053. if (priv->magic != ICNSS_MAGIC) {
  4054. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4055. dev, priv, priv->magic);
  4056. return -EINVAL;
  4057. }
  4058. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4059. if (!priv->ops || !priv->ops->suspend_noirq ||
  4060. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4061. goto out;
  4062. ret = priv->ops->suspend_noirq(dev);
  4063. out:
  4064. if (ret == 0) {
  4065. priv->stats.pm_suspend_noirq++;
  4066. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4067. } else {
  4068. priv->stats.pm_suspend_noirq_err++;
  4069. }
  4070. return ret;
  4071. }
  4072. static int icnss_pm_resume_noirq(struct device *dev)
  4073. {
  4074. struct icnss_priv *priv = dev_get_drvdata(dev);
  4075. int ret = 0;
  4076. if (priv->magic != ICNSS_MAGIC) {
  4077. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4078. dev, priv, priv->magic);
  4079. return -EINVAL;
  4080. }
  4081. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4082. if (!priv->ops || !priv->ops->resume_noirq ||
  4083. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4084. goto out;
  4085. ret = priv->ops->resume_noirq(dev);
  4086. out:
  4087. if (ret == 0) {
  4088. priv->stats.pm_resume_noirq++;
  4089. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4090. } else {
  4091. priv->stats.pm_resume_noirq_err++;
  4092. }
  4093. return ret;
  4094. }
  4095. static int icnss_pm_runtime_suspend(struct device *dev)
  4096. {
  4097. struct icnss_priv *priv = dev_get_drvdata(dev);
  4098. int ret = 0;
  4099. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4100. icnss_pr_err("Ignore runtime suspend:\n");
  4101. goto out;
  4102. }
  4103. if (priv->magic != ICNSS_MAGIC) {
  4104. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4105. dev, priv, priv->magic);
  4106. return -EINVAL;
  4107. }
  4108. if (!priv->ops || !priv->ops->runtime_suspend ||
  4109. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4110. goto out;
  4111. icnss_pr_vdbg("Runtime suspend\n");
  4112. ret = priv->ops->runtime_suspend(dev);
  4113. if (!ret) {
  4114. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4115. !test_bit(ICNSS_MODE_ON, &priv->state))
  4116. return 0;
  4117. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4118. ICNSS_SMP2P_OUT_POWER_SAVE);
  4119. }
  4120. out:
  4121. return ret;
  4122. }
  4123. static int icnss_pm_runtime_resume(struct device *dev)
  4124. {
  4125. struct icnss_priv *priv = dev_get_drvdata(dev);
  4126. int ret = 0;
  4127. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4128. icnss_pr_err("Ignore runtime resume\n");
  4129. goto out;
  4130. }
  4131. if (priv->magic != ICNSS_MAGIC) {
  4132. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4133. dev, priv, priv->magic);
  4134. return -EINVAL;
  4135. }
  4136. if (!priv->ops || !priv->ops->runtime_resume ||
  4137. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4138. goto out;
  4139. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4140. ret = priv->ops->runtime_resume(dev);
  4141. out:
  4142. return ret;
  4143. }
  4144. static int icnss_pm_runtime_idle(struct device *dev)
  4145. {
  4146. struct icnss_priv *priv = dev_get_drvdata(dev);
  4147. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4148. icnss_pr_err("Ignore runtime idle\n");
  4149. goto out;
  4150. }
  4151. icnss_pr_vdbg("Runtime idle\n");
  4152. pm_request_autosuspend(dev);
  4153. out:
  4154. return -EBUSY;
  4155. }
  4156. #endif
  4157. static const struct dev_pm_ops icnss_pm_ops = {
  4158. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4159. icnss_pm_resume)
  4160. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4161. icnss_pm_resume_noirq)
  4162. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4163. icnss_pm_runtime_idle)
  4164. };
  4165. static struct platform_driver icnss_driver = {
  4166. .probe = icnss_probe,
  4167. .remove = icnss_remove,
  4168. .driver = {
  4169. .name = "icnss2",
  4170. .pm = &icnss_pm_ops,
  4171. .of_match_table = icnss_dt_match,
  4172. },
  4173. };
  4174. static int __init icnss_initialize(void)
  4175. {
  4176. icnss_debug_init();
  4177. return platform_driver_register(&icnss_driver);
  4178. }
  4179. static void __exit icnss_exit(void)
  4180. {
  4181. platform_driver_unregister(&icnss_driver);
  4182. icnss_debug_deinit();
  4183. }
  4184. module_init(icnss_initialize);
  4185. module_exit(icnss_exit);
  4186. MODULE_LICENSE("GPL v2");
  4187. MODULE_DESCRIPTION("iWCN CORE platform driver");