wsa883x.c 44 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/init.h>
  7. #include <linux/slab.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/device.h>
  10. #include <linux/printk.h>
  11. #include <linux/bitops.h>
  12. #include <linux/regulator/consumer.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/delay.h>
  15. #include <linux/kernel.h>
  16. #include <linux/gpio.h>
  17. #include <linux/of_gpio.h>
  18. #include <linux/of_platform.h>
  19. #include <linux/regmap.h>
  20. #include <linux/debugfs.h>
  21. #include <soc/soundwire.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/tlv.h>
  27. #include <asoc/msm-cdc-pinctrl.h>
  28. #include <asoc/msm-cdc-supply.h>
  29. #include "wsa883x.h"
  30. #include "internal.h"
  31. #define T1_TEMP -10
  32. #define T2_TEMP 150
  33. #define LOW_TEMP_THRESHOLD 5
  34. #define HIGH_TEMP_THRESHOLD 45
  35. #define TEMP_INVALID 0xFFFF
  36. #define WSA883X_TEMP_RETRY 3
  37. #define WSA883X_VBAT_TIMER_SEC 2
  38. static int wsa883x_vbat_timer_sec = WSA883X_VBAT_TIMER_SEC;
  39. module_param(wsa883x_vbat_timer_sec, int, 0664);
  40. MODULE_PARM_DESC(wsa883x_vbat_timer_sec, "timer for VBAT monitor polling");
  41. #define DRV_NAME "wsa-codec"
  42. enum {
  43. WSA_4OHMS =4,
  44. WSA_8OHMS = 8,
  45. WSA_16OHMS = 16,
  46. WSA_32OHMS = 32,
  47. };
  48. struct wsa_temp_register {
  49. u8 d1_msb;
  50. u8 d1_lsb;
  51. u8 d2_msb;
  52. u8 d2_lsb;
  53. u8 dmeas_msb;
  54. u8 dmeas_lsb;
  55. };
  56. struct wsa_reg_mask_val {
  57. u16 reg;
  58. u8 mask;
  59. u8 val;
  60. };
  61. static const struct wsa_reg_mask_val reg_init[] = {
  62. {WSA883X_PA_FSM_BYP, 0x01, 0x00},
  63. {WSA883X_ISENSE2, 0xE0, 0x40},
  64. {WSA883X_ADC_6, 0x02, 0x02},
  65. {WSA883X_CDC_SPK_DSM_A2_0, 0xFF, 0x0A},
  66. {WSA883X_CDC_SPK_DSM_A2_1, 0x0F, 0x08},
  67. {WSA883X_CDC_SPK_DSM_A3_0, 0xFF, 0xF3},
  68. {WSA883X_CDC_SPK_DSM_A3_1, 0x07, 0x07},
  69. {WSA883X_CDC_SPK_DSM_A4_0, 0xFF, 0x79},
  70. {WSA883X_CDC_SPK_DSM_A4_1, 0x03, 0x02},
  71. {WSA883X_CDC_SPK_DSM_A5_0, 0xFF, 0x0B},
  72. {WSA883X_CDC_SPK_DSM_A5_1, 0x03, 0x02},
  73. {WSA883X_CDC_SPK_DSM_A6_0, 0xFF, 0x8A},
  74. {WSA883X_CDC_SPK_DSM_A7_0, 0xFF, 0x9B},
  75. {WSA883X_CDC_SPK_DSM_C_0, 0xFF, 0x68},
  76. {WSA883X_CDC_SPK_DSM_C_1, 0xFF, 0x54},
  77. {WSA883X_CDC_SPK_DSM_C_2, 0xFF, 0xF2},
  78. {WSA883X_CDC_SPK_DSM_C_3, 0x3F, 0x20},
  79. {WSA883X_CDC_SPK_DSM_R1, 0xFF, 0x83},
  80. {WSA883X_CDC_SPK_DSM_R2, 0xFF, 0x7F},
  81. {WSA883X_CDC_SPK_DSM_R3, 0xFF, 0x9D},
  82. {WSA883X_CDC_SPK_DSM_R4, 0xFF, 0x82},
  83. {WSA883X_CDC_SPK_DSM_R5, 0xFF, 0x8B},
  84. {WSA883X_CDC_SPK_DSM_R6, 0xFF, 0x9B},
  85. {WSA883X_CDC_SPK_DSM_R7, 0xFF, 0x3F},
  86. {WSA883X_DRE_CTL_0, 0xF0, 0x90},
  87. {WSA883X_DRE_IDLE_DET_CTL, 0x10, 0x00},
  88. {WSA883X_PDM_WD_CTL, 0x01, 0x01},
  89. {WSA883X_CURRENT_LIMIT, 0x78, 0x40},
  90. {WSA883X_DRE_CTL_0, 0x07, 0x02},
  91. {WSA883X_VAGC_TIME, 0x03, 0x02},
  92. {WSA883X_VAGC_CTL, 0x01, 0x01},
  93. {WSA883X_TAGC_CTL, 0x0E, 0x0A},
  94. {WSA883X_TAGC_TIME, 0x0C, 0x0C},
  95. {WSA883X_TAGC_E2E_GAIN, 0x1F, 0x02},
  96. {WSA883X_TEMP_CONFIG0, 0x07, 0x02},
  97. {WSA883X_TEMP_CONFIG1, 0x07, 0x02},
  98. {WSA883X_OTP_REG_1, 0xFF, 0x49},
  99. {WSA883X_OTP_REG_2, 0xC0, 0x80},
  100. {WSA883X_OTP_REG_3, 0xFF, 0xC9},
  101. {WSA883X_OTP_REG_4, 0xC0, 0x40},
  102. {WSA883X_TAGC_CTL, 0x01, 0x01},
  103. {WSA883X_ADC_2, 0x40, 0x00},
  104. {WSA883X_ADC_7, 0x04, 0x04},
  105. {WSA883X_ADC_7, 0x02, 0x02},
  106. {WSA883X_CKWD_CTL_0, 0x60, 0x00},
  107. {WSA883X_CKWD_CTL_1, 0x1F, 0x1B},
  108. {WSA883X_GMAMP_SUP1, 0x60, 0x60},
  109. };
  110. static int wsa883x_get_temperature(struct snd_soc_component *component,
  111. int *temp);
  112. enum {
  113. WSA8830 = 0,
  114. WSA8835,
  115. };
  116. enum {
  117. SPKR_STATUS = 0,
  118. };
  119. enum {
  120. WSA883X_IRQ_INT_SAF2WAR = 0,
  121. WSA883X_IRQ_INT_WAR2SAF,
  122. WSA883X_IRQ_INT_DISABLE,
  123. WSA883X_IRQ_INT_OCP,
  124. WSA883X_IRQ_INT_CLIP,
  125. WSA883X_IRQ_INT_PDM_WD,
  126. WSA883X_IRQ_INT_CLK_WD,
  127. WSA883X_IRQ_INT_INTR_PIN,
  128. WSA883X_IRQ_INT_UVLO,
  129. WSA883X_IRQ_INT_PA_ON_ERR,
  130. WSA883X_NUM_IRQS,
  131. };
  132. static const struct regmap_irq wsa883x_irqs[WSA883X_NUM_IRQS] = {
  133. REGMAP_IRQ_REG(WSA883X_IRQ_INT_SAF2WAR, 0, 0x01),
  134. REGMAP_IRQ_REG(WSA883X_IRQ_INT_WAR2SAF, 0, 0x02),
  135. REGMAP_IRQ_REG(WSA883X_IRQ_INT_DISABLE, 0, 0x04),
  136. REGMAP_IRQ_REG(WSA883X_IRQ_INT_OCP, 0, 0x08),
  137. REGMAP_IRQ_REG(WSA883X_IRQ_INT_CLIP, 0, 0x10),
  138. REGMAP_IRQ_REG(WSA883X_IRQ_INT_PDM_WD, 0, 0x20),
  139. REGMAP_IRQ_REG(WSA883X_IRQ_INT_CLK_WD, 0, 0x40),
  140. REGMAP_IRQ_REG(WSA883X_IRQ_INT_INTR_PIN, 0, 0x80),
  141. REGMAP_IRQ_REG(WSA883X_IRQ_INT_UVLO, 1, 0x01),
  142. REGMAP_IRQ_REG(WSA883X_IRQ_INT_PA_ON_ERR, 1, 0x02),
  143. };
  144. static struct regmap_irq_chip wsa883x_regmap_irq_chip = {
  145. .name = "wsa883x",
  146. .irqs = wsa883x_irqs,
  147. .num_irqs = ARRAY_SIZE(wsa883x_irqs),
  148. .num_regs = 2,
  149. .status_base = WSA883X_INTR_STATUS0,
  150. .mask_base = WSA883X_INTR_MASK0,
  151. .type_base = WSA883X_INTR_LEVEL0,
  152. .ack_base = WSA883X_INTR_CLEAR0,
  153. .use_ack = 1,
  154. .runtime_pm = false,
  155. .irq_drv_data = NULL,
  156. };
  157. #ifdef CONFIG_DEBUG_FS
  158. static int codec_debug_open(struct inode *inode, struct file *file)
  159. {
  160. file->private_data = inode->i_private;
  161. return 0;
  162. }
  163. static int get_parameters(char *buf, u32 *param1, int num_of_par)
  164. {
  165. char *token;
  166. int base, cnt;
  167. token = strsep(&buf, " ");
  168. for (cnt = 0; cnt < num_of_par; cnt++) {
  169. if (token) {
  170. if ((token[1] == 'x') || (token[1] == 'X'))
  171. base = 16;
  172. else
  173. base = 10;
  174. if (kstrtou32(token, base, &param1[cnt]) != 0)
  175. return -EINVAL;
  176. token = strsep(&buf, " ");
  177. } else {
  178. return -EINVAL;
  179. }
  180. }
  181. return 0;
  182. }
  183. static bool is_swr_slave_reg_readable(int reg)
  184. {
  185. int ret = true;
  186. if (((reg > 0x46) && (reg < 0x4A)) ||
  187. ((reg > 0x4A) && (reg < 0x50)) ||
  188. ((reg > 0x55) && (reg < 0xD0)) ||
  189. ((reg > 0xD0) && (reg < 0xE0)) ||
  190. ((reg > 0xE0) && (reg < 0xF0)) ||
  191. ((reg > 0xF0) && (reg < 0x100)) ||
  192. ((reg > 0x105) && (reg < 0x120)) ||
  193. ((reg > 0x205) && (reg < 0x220)) ||
  194. ((reg > 0x305) && (reg < 0x320)) ||
  195. ((reg > 0x405) && (reg < 0x420)) ||
  196. ((reg > 0x128) && (reg < 0x130)) ||
  197. ((reg > 0x228) && (reg < 0x230)) ||
  198. ((reg > 0x328) && (reg < 0x330)) ||
  199. ((reg > 0x428) && (reg < 0x430)) ||
  200. ((reg > 0x138) && (reg < 0x205)) ||
  201. ((reg > 0x238) && (reg < 0x305)) ||
  202. ((reg > 0x338) && (reg < 0x405)) ||
  203. ((reg > 0x405) && (reg < 0xF00)) ||
  204. ((reg > 0xF05) && (reg < 0xF20)) ||
  205. ((reg > 0xF25) && (reg < 0xF30)) ||
  206. ((reg > 0xF35) && (reg < 0x2000)))
  207. ret = false;
  208. return ret;
  209. }
  210. static ssize_t swr_slave_reg_show(struct swr_device *pdev, char __user *ubuf,
  211. size_t count, loff_t *ppos)
  212. {
  213. int i, reg_val, len;
  214. ssize_t total = 0;
  215. char tmp_buf[SWR_SLV_MAX_BUF_LEN];
  216. if (!ubuf || !ppos)
  217. return 0;
  218. for (i = (((int) *ppos/BYTES_PER_LINE) + SWR_SLV_START_REG_ADDR);
  219. i <= SWR_SLV_MAX_REG_ADDR; i++) {
  220. if (!is_swr_slave_reg_readable(i))
  221. continue;
  222. swr_read(pdev, pdev->dev_num, i, &reg_val, 1);
  223. len = snprintf(tmp_buf, sizeof(tmp_buf), "0x%.3x: 0x%.2x\n", i,
  224. (reg_val & 0xFF));
  225. if (((total + len) >= count - 1) || (len < 0))
  226. break;
  227. if (copy_to_user((ubuf + total), tmp_buf, len)) {
  228. pr_err("%s: fail to copy reg dump\n", __func__);
  229. total = -EFAULT;
  230. goto copy_err;
  231. }
  232. total += len;
  233. *ppos += len;
  234. }
  235. copy_err:
  236. *ppos = SWR_SLV_MAX_REG_ADDR * BYTES_PER_LINE;
  237. return total;
  238. }
  239. static ssize_t codec_debug_dump(struct file *file, char __user *ubuf,
  240. size_t count, loff_t *ppos)
  241. {
  242. struct swr_device *pdev;
  243. if (!count || !file || !ppos || !ubuf)
  244. return -EINVAL;
  245. pdev = file->private_data;
  246. if (!pdev)
  247. return -EINVAL;
  248. if (*ppos < 0)
  249. return -EINVAL;
  250. return swr_slave_reg_show(pdev, ubuf, count, ppos);
  251. }
  252. static ssize_t codec_debug_read(struct file *file, char __user *ubuf,
  253. size_t count, loff_t *ppos)
  254. {
  255. char lbuf[SWR_SLV_RD_BUF_LEN];
  256. struct swr_device *pdev = NULL;
  257. struct wsa883x_priv *wsa883x = NULL;
  258. if (!count || !file || !ppos || !ubuf)
  259. return -EINVAL;
  260. pdev = file->private_data;
  261. if (!pdev)
  262. return -EINVAL;
  263. wsa883x = swr_get_dev_data(pdev);
  264. if (!wsa883x)
  265. return -EINVAL;
  266. if (*ppos < 0)
  267. return -EINVAL;
  268. snprintf(lbuf, sizeof(lbuf), "0x%x\n",
  269. (wsa883x->read_data & 0xFF));
  270. return simple_read_from_buffer(ubuf, count, ppos, lbuf,
  271. strnlen(lbuf, 7));
  272. }
  273. static ssize_t codec_debug_peek_write(struct file *file,
  274. const char __user *ubuf, size_t cnt, loff_t *ppos)
  275. {
  276. char lbuf[SWR_SLV_WR_BUF_LEN];
  277. int rc = 0;
  278. u32 param[5];
  279. struct swr_device *pdev = NULL;
  280. struct wsa883x_priv *wsa883x = NULL;
  281. if (!cnt || !file || !ppos || !ubuf)
  282. return -EINVAL;
  283. pdev = file->private_data;
  284. if (!pdev)
  285. return -EINVAL;
  286. wsa883x = swr_get_dev_data(pdev);
  287. if (!wsa883x)
  288. return -EINVAL;
  289. if (*ppos < 0)
  290. return -EINVAL;
  291. if (cnt > sizeof(lbuf) - 1)
  292. return -EINVAL;
  293. rc = copy_from_user(lbuf, ubuf, cnt);
  294. if (rc)
  295. return -EFAULT;
  296. lbuf[cnt] = '\0';
  297. rc = get_parameters(lbuf, param, 1);
  298. if (!((param[0] <= SWR_SLV_MAX_REG_ADDR) && (rc == 0)))
  299. return -EINVAL;
  300. swr_read(pdev, pdev->dev_num, param[0], &wsa883x->read_data, 1);
  301. if (rc == 0)
  302. rc = cnt;
  303. else
  304. pr_err("%s: rc = %d\n", __func__, rc);
  305. return rc;
  306. }
  307. static ssize_t codec_debug_write(struct file *file,
  308. const char __user *ubuf, size_t cnt, loff_t *ppos)
  309. {
  310. char lbuf[SWR_SLV_WR_BUF_LEN];
  311. int rc = 0;
  312. u32 param[5];
  313. struct swr_device *pdev;
  314. if (!file || !ppos || !ubuf)
  315. return -EINVAL;
  316. pdev = file->private_data;
  317. if (!pdev)
  318. return -EINVAL;
  319. if (cnt > sizeof(lbuf) - 1)
  320. return -EINVAL;
  321. rc = copy_from_user(lbuf, ubuf, cnt);
  322. if (rc)
  323. return -EFAULT;
  324. lbuf[cnt] = '\0';
  325. rc = get_parameters(lbuf, param, 2);
  326. if (!((param[0] <= SWR_SLV_MAX_REG_ADDR) &&
  327. (param[1] <= 0xFF) && (rc == 0)))
  328. return -EINVAL;
  329. swr_write(pdev, pdev->dev_num, param[0], &param[1]);
  330. if (rc == 0)
  331. rc = cnt;
  332. else
  333. pr_err("%s: rc = %d\n", __func__, rc);
  334. return rc;
  335. }
  336. static const struct file_operations codec_debug_write_ops = {
  337. .open = codec_debug_open,
  338. .write = codec_debug_write,
  339. };
  340. static const struct file_operations codec_debug_read_ops = {
  341. .open = codec_debug_open,
  342. .read = codec_debug_read,
  343. .write = codec_debug_peek_write,
  344. };
  345. static const struct file_operations codec_debug_dump_ops = {
  346. .open = codec_debug_open,
  347. .read = codec_debug_dump,
  348. };
  349. #endif
  350. static irqreturn_t wsa883x_saf2war_handle_irq(int irq, void *data)
  351. {
  352. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  353. __func__, irq);
  354. return IRQ_HANDLED;
  355. }
  356. static irqreturn_t wsa883x_war2saf_handle_irq(int irq, void *data)
  357. {
  358. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  359. __func__, irq);
  360. return IRQ_HANDLED;
  361. }
  362. static irqreturn_t wsa883x_otp_handle_irq(int irq, void *data)
  363. {
  364. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  365. __func__, irq);
  366. return IRQ_HANDLED;
  367. }
  368. static irqreturn_t wsa883x_ocp_handle_irq(int irq, void *data)
  369. {
  370. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  371. __func__, irq);
  372. return IRQ_HANDLED;
  373. }
  374. static irqreturn_t wsa883x_clip_handle_irq(int irq, void *data)
  375. {
  376. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  377. __func__, irq);
  378. return IRQ_HANDLED;
  379. }
  380. static irqreturn_t wsa883x_pdm_wd_handle_irq(int irq, void *data)
  381. {
  382. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  383. __func__, irq);
  384. return IRQ_HANDLED;
  385. }
  386. static irqreturn_t wsa883x_clk_wd_handle_irq(int irq, void *data)
  387. {
  388. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  389. __func__, irq);
  390. return IRQ_HANDLED;
  391. }
  392. static irqreturn_t wsa883x_ext_int_handle_irq(int irq, void *data)
  393. {
  394. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  395. __func__, irq);
  396. return IRQ_HANDLED;
  397. }
  398. static irqreturn_t wsa883x_uvlo_handle_irq(int irq, void *data)
  399. {
  400. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  401. __func__, irq);
  402. return IRQ_HANDLED;
  403. }
  404. static irqreturn_t wsa883x_pa_on_err_handle_irq(int irq, void *data)
  405. {
  406. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  407. __func__, irq);
  408. return IRQ_HANDLED;
  409. }
  410. static const char * const wsa_dev_mode_text[] = {
  411. "speaker", "receiver", "ultrasound"
  412. };
  413. static const struct soc_enum wsa_dev_mode_enum =
  414. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_dev_mode_text), wsa_dev_mode_text);
  415. static int wsa_dev_mode_get(struct snd_kcontrol *kcontrol,
  416. struct snd_ctl_elem_value *ucontrol)
  417. {
  418. struct snd_soc_component *component =
  419. snd_soc_kcontrol_component(kcontrol);
  420. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  421. ucontrol->value.integer.value[0] = wsa883x->dev_mode;
  422. dev_dbg(component->dev, "%s: mode = 0x%x\n", __func__,
  423. wsa883x->dev_mode);
  424. return 0;
  425. }
  426. static int wsa_dev_mode_put(struct snd_kcontrol *kcontrol,
  427. struct snd_ctl_elem_value *ucontrol)
  428. {
  429. struct snd_soc_component *component =
  430. snd_soc_kcontrol_component(kcontrol);
  431. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  432. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  433. __func__, ucontrol->value.integer.value[0]);
  434. wsa883x->dev_mode = ucontrol->value.integer.value[0];
  435. return 0;
  436. }
  437. static const char * const wsa_pa_gain_text[] = {
  438. "G_18_DB", "G_16P5_DB", "G_15_DB", "G_13P5_DB", "G_12_DB", "G_10P5_DB",
  439. "G_9_DB", "G_7P5_DB", "G_6_DB", "G_4P5_DB", "G_3_DB", "G_1P5_DB",
  440. "G_0_DB"
  441. };
  442. static const struct soc_enum wsa_pa_gain_enum =
  443. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_pa_gain_text), wsa_pa_gain_text);
  444. static int wsa_pa_gain_get(struct snd_kcontrol *kcontrol,
  445. struct snd_ctl_elem_value *ucontrol)
  446. {
  447. struct snd_soc_component *component =
  448. snd_soc_kcontrol_component(kcontrol);
  449. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  450. ucontrol->value.integer.value[0] = wsa883x->pa_gain;
  451. dev_dbg(component->dev, "%s: PA gain = 0x%x\n", __func__,
  452. wsa883x->pa_gain);
  453. return 0;
  454. }
  455. static int wsa_pa_gain_put(struct snd_kcontrol *kcontrol,
  456. struct snd_ctl_elem_value *ucontrol)
  457. {
  458. struct snd_soc_component *component =
  459. snd_soc_kcontrol_component(kcontrol);
  460. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  461. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  462. __func__, ucontrol->value.integer.value[0]);
  463. wsa883x->pa_gain = ucontrol->value.integer.value[0];
  464. return 0;
  465. }
  466. static int wsa883x_get_mute(struct snd_kcontrol *kcontrol,
  467. struct snd_ctl_elem_value *ucontrol)
  468. {
  469. struct snd_soc_component *component =
  470. snd_soc_kcontrol_component(kcontrol);
  471. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  472. ucontrol->value.integer.value[0] = wsa883x->pa_mute;
  473. return 0;
  474. }
  475. static int wsa883x_set_mute(struct snd_kcontrol *kcontrol,
  476. struct snd_ctl_elem_value *ucontrol)
  477. {
  478. struct snd_soc_component *component =
  479. snd_soc_kcontrol_component(kcontrol);
  480. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  481. int value = ucontrol->value.integer.value[0];
  482. dev_dbg(component->dev, "%s: mute current %d, new %d\n",
  483. __func__, wsa883x->pa_mute, value);
  484. wsa883x->pa_mute = value;
  485. return 0;
  486. }
  487. static int wsa_get_temp(struct snd_kcontrol *kcontrol,
  488. struct snd_ctl_elem_value *ucontrol)
  489. {
  490. struct snd_soc_component *component =
  491. snd_soc_kcontrol_component(kcontrol);
  492. int temp = 0;
  493. wsa883x_get_temperature(component, &temp);
  494. ucontrol->value.integer.value[0] = temp;
  495. return 0;
  496. }
  497. static ssize_t wsa883x_codec_version_read(struct snd_info_entry *entry,
  498. void *file_private_data, struct file *file,
  499. char __user *buf, size_t count, loff_t pos)
  500. {
  501. struct wsa883x_priv *wsa883x;
  502. char buffer[WSA883X_VERSION_ENTRY_SIZE];
  503. int len = 0;
  504. wsa883x = (struct wsa883x_priv *) entry->private_data;
  505. if (!wsa883x) {
  506. pr_err("%s: wsa883x priv is null\n", __func__);
  507. return -EINVAL;
  508. }
  509. switch (wsa883x->version) {
  510. case WSA883X_VERSION_1_0:
  511. len = snprintf(buffer, sizeof(buffer), "WSA883X_1_0\n");
  512. break;
  513. case WSA883X_VERSION_1_1:
  514. len = snprintf(buffer, sizeof(buffer), "WSA883X_1_1\n");
  515. break;
  516. default:
  517. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  518. break;
  519. }
  520. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  521. }
  522. static struct snd_info_entry_ops wsa883x_codec_info_ops = {
  523. .read = wsa883x_codec_version_read,
  524. };
  525. static ssize_t wsa883x_variant_read(struct snd_info_entry *entry,
  526. void *file_private_data,
  527. struct file *file,
  528. char __user *buf, size_t count,
  529. loff_t pos)
  530. {
  531. struct wsa883x_priv *wsa883x;
  532. char buffer[WSA883X_VARIANT_ENTRY_SIZE];
  533. int len = 0;
  534. wsa883x = (struct wsa883x_priv *) entry->private_data;
  535. if (!wsa883x) {
  536. pr_err("%s: wsa883x priv is null\n", __func__);
  537. return -EINVAL;
  538. }
  539. switch (wsa883x->variant) {
  540. case WSA8830:
  541. len = snprintf(buffer, sizeof(buffer), "WSA8830\n");
  542. break;
  543. case WSA8835:
  544. len = snprintf(buffer, sizeof(buffer), "WSA8835\n");
  545. break;
  546. default:
  547. len = snprintf(buffer, sizeof(buffer), "UNDEFINED\n");
  548. break;
  549. }
  550. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  551. }
  552. static struct snd_info_entry_ops wsa883x_variant_ops = {
  553. .read = wsa883x_variant_read,
  554. };
  555. /*
  556. * wsa883x_codec_info_create_codec_entry - creates wsa883x module
  557. * @codec_root: The parent directory
  558. * @component: Codec instance
  559. *
  560. * Creates wsa883x module and version entry under the given
  561. * parent directory.
  562. *
  563. * Return: 0 on success or negative error code on failure.
  564. */
  565. int wsa883x_codec_info_create_codec_entry(struct snd_info_entry *codec_root,
  566. struct snd_soc_component *component)
  567. {
  568. struct snd_info_entry *version_entry;
  569. struct snd_info_entry *variant_entry;
  570. struct wsa883x_priv *wsa883x;
  571. struct snd_soc_card *card;
  572. char name[80];
  573. if (!codec_root || !component)
  574. return -EINVAL;
  575. wsa883x = snd_soc_component_get_drvdata(component);
  576. if (wsa883x->entry) {
  577. dev_dbg(wsa883x->dev,
  578. "%s:wsa883x module already created\n", __func__);
  579. return 0;
  580. }
  581. card = component->card;
  582. snprintf(name, sizeof(name), "%s.%x", "wsa883x",
  583. (u32)wsa883x->swr_slave->addr);
  584. wsa883x->entry = snd_info_create_module_entry(codec_root->module,
  585. (const char *)name,
  586. codec_root);
  587. if (!wsa883x->entry) {
  588. dev_dbg(component->dev, "%s: failed to create wsa883x entry\n",
  589. __func__);
  590. return -ENOMEM;
  591. }
  592. wsa883x->entry->mode = S_IFDIR | 0555;
  593. if (snd_info_register(wsa883x->entry) < 0) {
  594. snd_info_free_entry(wsa883x->entry);
  595. return -ENOMEM;
  596. }
  597. version_entry = snd_info_create_card_entry(card->snd_card,
  598. "version",
  599. wsa883x->entry);
  600. if (!version_entry) {
  601. dev_dbg(component->dev, "%s: failed to create wsa883x version entry\n",
  602. __func__);
  603. snd_info_free_entry(wsa883x->entry);
  604. return -ENOMEM;
  605. }
  606. version_entry->private_data = wsa883x;
  607. version_entry->size = WSA883X_VERSION_ENTRY_SIZE;
  608. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  609. version_entry->c.ops = &wsa883x_codec_info_ops;
  610. if (snd_info_register(version_entry) < 0) {
  611. snd_info_free_entry(version_entry);
  612. snd_info_free_entry(wsa883x->entry);
  613. return -ENOMEM;
  614. }
  615. wsa883x->version_entry = version_entry;
  616. variant_entry = snd_info_create_card_entry(card->snd_card,
  617. "variant",
  618. wsa883x->entry);
  619. if (!variant_entry) {
  620. dev_dbg(component->dev,
  621. "%s: failed to create wsa883x variant entry\n",
  622. __func__);
  623. snd_info_free_entry(version_entry);
  624. snd_info_free_entry(wsa883x->entry);
  625. return -ENOMEM;
  626. }
  627. variant_entry->private_data = wsa883x;
  628. variant_entry->size = WSA883X_VARIANT_ENTRY_SIZE;
  629. variant_entry->content = SNDRV_INFO_CONTENT_DATA;
  630. variant_entry->c.ops = &wsa883x_variant_ops;
  631. if (snd_info_register(variant_entry) < 0) {
  632. snd_info_free_entry(variant_entry);
  633. snd_info_free_entry(version_entry);
  634. snd_info_free_entry(wsa883x->entry);
  635. return -ENOMEM;
  636. }
  637. wsa883x->variant_entry = variant_entry;
  638. return 0;
  639. }
  640. EXPORT_SYMBOL(wsa883x_codec_info_create_codec_entry);
  641. static int wsa883x_get_compander(struct snd_kcontrol *kcontrol,
  642. struct snd_ctl_elem_value *ucontrol)
  643. {
  644. struct snd_soc_component *component =
  645. snd_soc_kcontrol_component(kcontrol);
  646. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  647. ucontrol->value.integer.value[0] = wsa883x->comp_enable;
  648. return 0;
  649. }
  650. static int wsa883x_set_compander(struct snd_kcontrol *kcontrol,
  651. struct snd_ctl_elem_value *ucontrol)
  652. {
  653. struct snd_soc_component *component =
  654. snd_soc_kcontrol_component(kcontrol);
  655. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  656. int value = ucontrol->value.integer.value[0];
  657. dev_dbg(component->dev, "%s: Compander enable current %d, new %d\n",
  658. __func__, wsa883x->comp_enable, value);
  659. wsa883x->comp_enable = value;
  660. return 0;
  661. }
  662. static int wsa883x_get_visense(struct snd_kcontrol *kcontrol,
  663. struct snd_ctl_elem_value *ucontrol)
  664. {
  665. struct snd_soc_component *component =
  666. snd_soc_kcontrol_component(kcontrol);
  667. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  668. ucontrol->value.integer.value[0] = wsa883x->visense_enable;
  669. return 0;
  670. }
  671. static int wsa883x_set_visense(struct snd_kcontrol *kcontrol,
  672. struct snd_ctl_elem_value *ucontrol)
  673. {
  674. struct snd_soc_component *component =
  675. snd_soc_kcontrol_component(kcontrol);
  676. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  677. int value = ucontrol->value.integer.value[0];
  678. dev_dbg(component->dev, "%s: VIsense enable current %d, new %d\n",
  679. __func__, wsa883x->visense_enable, value);
  680. wsa883x->visense_enable = value;
  681. return 0;
  682. }
  683. static int wsa883x_get_ext_vdd_spk(struct snd_kcontrol *kcontrol,
  684. struct snd_ctl_elem_value *ucontrol)
  685. {
  686. struct snd_soc_component *component =
  687. snd_soc_kcontrol_component(kcontrol);
  688. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  689. ucontrol->value.integer.value[0] = wsa883x->ext_vdd_spk;
  690. return 0;
  691. }
  692. static int wsa883x_put_ext_vdd_spk(struct snd_kcontrol *kcontrol,
  693. struct snd_ctl_elem_value *ucontrol)
  694. {
  695. struct snd_soc_component *component =
  696. snd_soc_kcontrol_component(kcontrol);
  697. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  698. int value = ucontrol->value.integer.value[0];
  699. dev_dbg(component->dev, "%s: Ext VDD SPK enable current %d, new %d\n",
  700. __func__, wsa883x->ext_vdd_spk, value);
  701. wsa883x->ext_vdd_spk = value;
  702. return 0;
  703. }
  704. static const struct snd_kcontrol_new wsa883x_snd_controls[] = {
  705. SOC_ENUM_EXT("WSA PA Gain", wsa_pa_gain_enum,
  706. wsa_pa_gain_get, wsa_pa_gain_put),
  707. SOC_SINGLE_EXT("WSA PA Mute", SND_SOC_NOPM, 0, 1, 0,
  708. wsa883x_get_mute, wsa883x_set_mute),
  709. SOC_SINGLE_EXT("WSA Temp", SND_SOC_NOPM, 0, UINT_MAX, 0,
  710. wsa_get_temp, NULL),
  711. SOC_ENUM_EXT("WSA MODE", wsa_dev_mode_enum,
  712. wsa_dev_mode_get, wsa_dev_mode_put),
  713. SOC_SINGLE_EXT("COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  714. wsa883x_get_compander, wsa883x_set_compander),
  715. SOC_SINGLE_EXT("VISENSE Switch", SND_SOC_NOPM, 0, 1, 0,
  716. wsa883x_get_visense, wsa883x_set_visense),
  717. SOC_SINGLE_EXT("External VDD_SPK", SND_SOC_NOPM, 0, 1, 0,
  718. wsa883x_get_ext_vdd_spk, wsa883x_put_ext_vdd_spk),
  719. };
  720. static const struct snd_kcontrol_new swr_dac_port[] = {
  721. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  722. };
  723. static int wsa883x_set_port(struct snd_soc_component *component, int port_idx,
  724. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  725. u8 *port_type)
  726. {
  727. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  728. *port_id = wsa883x->port[port_idx].port_id;
  729. *num_ch = wsa883x->port[port_idx].num_ch;
  730. *ch_mask = wsa883x->port[port_idx].ch_mask;
  731. *ch_rate = wsa883x->port[port_idx].ch_rate;
  732. *port_type = wsa883x->port[port_idx].port_type;
  733. return 0;
  734. }
  735. static int wsa883x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
  736. struct snd_kcontrol *kcontrol, int event)
  737. {
  738. struct snd_soc_component *component =
  739. snd_soc_dapm_to_component(w->dapm);
  740. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  741. u8 port_id[WSA883X_MAX_SWR_PORTS];
  742. u8 num_ch[WSA883X_MAX_SWR_PORTS];
  743. u8 ch_mask[WSA883X_MAX_SWR_PORTS];
  744. u32 ch_rate[WSA883X_MAX_SWR_PORTS];
  745. u8 port_type[WSA883X_MAX_SWR_PORTS];
  746. u8 num_port = 0;
  747. dev_dbg(component->dev, "%s: event %d name %s\n", __func__,
  748. event, w->name);
  749. if (wsa883x == NULL)
  750. return -EINVAL;
  751. switch (event) {
  752. case SND_SOC_DAPM_PRE_PMU:
  753. wsa883x_set_port(component, SWR_DAC_PORT,
  754. &port_id[num_port], &num_ch[num_port],
  755. &ch_mask[num_port], &ch_rate[num_port],
  756. &port_type[num_port]);
  757. ++num_port;
  758. if (wsa883x->comp_enable) {
  759. wsa883x_set_port(component, SWR_COMP_PORT,
  760. &port_id[num_port], &num_ch[num_port],
  761. &ch_mask[num_port], &ch_rate[num_port],
  762. &port_type[num_port]);
  763. ++num_port;
  764. }
  765. if (wsa883x->visense_enable) {
  766. wsa883x_set_port(component, SWR_VISENSE_PORT,
  767. &port_id[num_port], &num_ch[num_port],
  768. &ch_mask[num_port], &ch_rate[num_port],
  769. &port_type[num_port]);
  770. ++num_port;
  771. }
  772. swr_connect_port(wsa883x->swr_slave, &port_id[0], num_port,
  773. &ch_mask[0], &ch_rate[0], &num_ch[0],
  774. &port_type[0]);
  775. break;
  776. case SND_SOC_DAPM_POST_PMU:
  777. break;
  778. case SND_SOC_DAPM_PRE_PMD:
  779. wsa883x_set_port(component, SWR_DAC_PORT,
  780. &port_id[num_port], &num_ch[num_port],
  781. &ch_mask[num_port], &ch_rate[num_port],
  782. &port_type[num_port]);
  783. ++num_port;
  784. if (wsa883x->comp_enable) {
  785. wsa883x_set_port(component, SWR_COMP_PORT,
  786. &port_id[num_port], &num_ch[num_port],
  787. &ch_mask[num_port], &ch_rate[num_port],
  788. &port_type[num_port]);
  789. ++num_port;
  790. }
  791. if (wsa883x->visense_enable) {
  792. wsa883x_set_port(component, SWR_VISENSE_PORT,
  793. &port_id[num_port], &num_ch[num_port],
  794. &ch_mask[num_port], &ch_rate[num_port],
  795. &port_type[num_port]);
  796. ++num_port;
  797. }
  798. swr_disconnect_port(wsa883x->swr_slave, &port_id[0], num_port,
  799. &ch_mask[0], &port_type[0]);
  800. break;
  801. case SND_SOC_DAPM_POST_PMD:
  802. if (swr_set_device_group(wsa883x->swr_slave, SWR_GROUP_NONE))
  803. dev_err(component->dev,
  804. "%s: set num ch failed\n", __func__);
  805. swr_slvdev_datapath_control(wsa883x->swr_slave,
  806. wsa883x->swr_slave->dev_num,
  807. false);
  808. break;
  809. default:
  810. break;
  811. }
  812. return 0;
  813. }
  814. static int wsa883x_spkr_event(struct snd_soc_dapm_widget *w,
  815. struct snd_kcontrol *kcontrol, int event)
  816. {
  817. struct snd_soc_component *component =
  818. snd_soc_dapm_to_component(w->dapm);
  819. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  820. dev_dbg(component->dev, "%s: %s %d\n", __func__, w->name, event);
  821. switch (event) {
  822. case SND_SOC_DAPM_POST_PMU:
  823. swr_slvdev_datapath_control(wsa883x->swr_slave,
  824. wsa883x->swr_slave->dev_num,
  825. true);
  826. wcd_enable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD);
  827. /* Force remove group */
  828. swr_remove_from_group(wsa883x->swr_slave,
  829. wsa883x->swr_slave->dev_num);
  830. snd_soc_component_update_bits(component,
  831. WSA883X_VBAT_ADC_FLT_CTL,
  832. 0x0E, 0x06);
  833. snd_soc_component_update_bits(component,
  834. WSA883X_VBAT_ADC_FLT_CTL,
  835. 0x01, 0x01);
  836. schedule_delayed_work(&wsa883x->vbat_work,
  837. msecs_to_jiffies(wsa883x_vbat_timer_sec * 1000));
  838. set_bit(SPKR_STATUS, &wsa883x->status_mask);
  839. break;
  840. case SND_SOC_DAPM_PRE_PMD:
  841. cancel_delayed_work_sync(&wsa883x->vbat_work);
  842. snd_soc_component_update_bits(component,
  843. WSA883X_VBAT_ADC_FLT_CTL,
  844. 0x01, 0x00);
  845. snd_soc_component_update_bits(component,
  846. WSA883X_VBAT_ADC_FLT_CTL,
  847. 0x0E, 0x00);
  848. snd_soc_component_update_bits(component, WSA883X_PA_FSM_CTL,
  849. 0x01, 0x00);
  850. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD);
  851. clear_bit(SPKR_STATUS, &wsa883x->status_mask);
  852. break;
  853. }
  854. return 0;
  855. }
  856. static const struct snd_soc_dapm_widget wsa883x_dapm_widgets[] = {
  857. SND_SOC_DAPM_INPUT("IN"),
  858. SND_SOC_DAPM_MIXER_E("SWR DAC_Port", SND_SOC_NOPM, 0, 0, swr_dac_port,
  859. ARRAY_SIZE(swr_dac_port), wsa883x_enable_swr_dac_port,
  860. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  861. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  862. SND_SOC_DAPM_SPK("SPKR", wsa883x_spkr_event),
  863. };
  864. static const struct snd_soc_dapm_route wsa883x_audio_map[] = {
  865. {"SWR DAC_Port", "Switch", "IN"},
  866. {"SPKR", NULL, "SWR DAC_Port"},
  867. };
  868. int wsa883x_set_channel_map(struct snd_soc_component *component, u8 *port,
  869. u8 num_port, unsigned int *ch_mask,
  870. unsigned int *ch_rate, u8 *port_type)
  871. {
  872. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  873. int i;
  874. if (!port || !ch_mask || !ch_rate ||
  875. (num_port > WSA883X_MAX_SWR_PORTS)) {
  876. dev_err(component->dev,
  877. "%s: Invalid port=%pK, ch_mask=%pK, ch_rate=%pK\n",
  878. __func__, port, ch_mask, ch_rate);
  879. return -EINVAL;
  880. }
  881. for (i = 0; i < num_port; i++) {
  882. wsa883x->port[i].port_id = port[i];
  883. wsa883x->port[i].ch_mask = ch_mask[i];
  884. wsa883x->port[i].ch_rate = ch_rate[i];
  885. wsa883x->port[i].num_ch = __sw_hweight8(ch_mask[i]);
  886. if (port_type)
  887. wsa883x->port[i].port_type = port_type[i];
  888. }
  889. return 0;
  890. }
  891. EXPORT_SYMBOL(wsa883x_set_channel_map);
  892. static void wsa883x_codec_init(struct snd_soc_component *component)
  893. {
  894. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  895. int i;
  896. if (!wsa883x)
  897. return;
  898. for (i = 0; i < ARRAY_SIZE(reg_init); i++)
  899. snd_soc_component_update_bits(component, reg_init[i].reg,
  900. reg_init[i].mask, reg_init[i].val);
  901. }
  902. static int32_t wsa883x_temp_reg_read(struct snd_soc_component *component,
  903. struct wsa_temp_register *wsa_temp_reg)
  904. {
  905. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  906. if (!wsa883x) {
  907. dev_err(component->dev, "%s: wsa883x is NULL\n", __func__);
  908. return -EINVAL;
  909. }
  910. mutex_lock(&wsa883x->res_lock);
  911. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  912. 0x01, 0x01);
  913. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  914. 0x04, 0x04);
  915. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  916. 0x02, 0x02);
  917. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  918. 0x80, 0x80);
  919. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  920. 0x20, 0x20);
  921. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  922. 0x40, 0x40);
  923. snd_soc_component_update_bits(component, WSA883X_TADC_VALUE_CTL,
  924. 0x01, 0x00);
  925. wsa_temp_reg->dmeas_msb = snd_soc_component_read32(
  926. component, WSA883X_TEMP_MSB);
  927. wsa_temp_reg->dmeas_lsb = snd_soc_component_read32(
  928. component, WSA883X_TEMP_LSB);
  929. snd_soc_component_update_bits(component, WSA883X_TADC_VALUE_CTL,
  930. 0x01, 0x01);
  931. wsa_temp_reg->d1_msb = snd_soc_component_read32(
  932. component, WSA883X_OTP_REG_1);
  933. wsa_temp_reg->d1_lsb = snd_soc_component_read32(
  934. component, WSA883X_OTP_REG_2);
  935. wsa_temp_reg->d2_msb = snd_soc_component_read32(
  936. component, WSA883X_OTP_REG_3);
  937. wsa_temp_reg->d2_lsb = snd_soc_component_read32(
  938. component, WSA883X_OTP_REG_4);
  939. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  940. 0xE7, 0x00);
  941. mutex_unlock(&wsa883x->res_lock);
  942. return 0;
  943. }
  944. static int wsa883x_get_temperature(struct snd_soc_component *component,
  945. int *temp)
  946. {
  947. struct wsa_temp_register reg;
  948. int dmeas, d1, d2;
  949. int ret = 0;
  950. int temp_val = 0;
  951. int t1 = T1_TEMP;
  952. int t2 = T2_TEMP;
  953. u8 retry = WSA883X_TEMP_RETRY;
  954. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  955. if (!wsa883x)
  956. return -EINVAL;
  957. do {
  958. ret = wsa883x_temp_reg_read(component, &reg);
  959. if (ret) {
  960. pr_err("%s: temp read failed: %d, current temp: %d\n",
  961. __func__, ret, wsa883x->curr_temp);
  962. if (temp)
  963. *temp = wsa883x->curr_temp;
  964. return 0;
  965. }
  966. /*
  967. * Temperature register values are expected to be in the
  968. * following range.
  969. * d1_msb = 68 - 92 and d1_lsb = 0, 64, 128, 192
  970. * d2_msb = 185 -218 and d2_lsb = 0, 64, 128, 192
  971. */
  972. if ((reg.d1_msb < 68 || reg.d1_msb > 92) ||
  973. (!(reg.d1_lsb == 0 || reg.d1_lsb == 64 || reg.d1_lsb == 128 ||
  974. reg.d1_lsb == 192)) ||
  975. (reg.d2_msb < 185 || reg.d2_msb > 218) ||
  976. (!(reg.d2_lsb == 0 || reg.d2_lsb == 64 || reg.d2_lsb == 128 ||
  977. reg.d2_lsb == 192))) {
  978. printk_ratelimited("%s: Temperature registers[%d %d %d %d] are out of range\n",
  979. __func__, reg.d1_msb, reg.d1_lsb, reg.d2_msb,
  980. reg.d2_lsb);
  981. }
  982. dmeas = ((reg.dmeas_msb << 0x8) | reg.dmeas_lsb) >> 0x6;
  983. d1 = ((reg.d1_msb << 0x8) | reg.d1_lsb) >> 0x6;
  984. d2 = ((reg.d2_msb << 0x8) | reg.d2_lsb) >> 0x6;
  985. if (d1 == d2)
  986. temp_val = TEMP_INVALID;
  987. else
  988. temp_val = t1 + (((dmeas - d1) * (t2 - t1))/(d2 - d1));
  989. if (temp_val <= LOW_TEMP_THRESHOLD ||
  990. temp_val >= HIGH_TEMP_THRESHOLD) {
  991. pr_debug("%s: T0: %d is out of range[%d, %d]\n", __func__,
  992. temp_val, LOW_TEMP_THRESHOLD, HIGH_TEMP_THRESHOLD);
  993. if (retry--)
  994. msleep(10);
  995. } else {
  996. break;
  997. }
  998. } while (retry);
  999. wsa883x->curr_temp = temp_val;
  1000. if (temp)
  1001. *temp = temp_val;
  1002. pr_debug("%s: t0 measured: %d dmeas = %d, d1 = %d, d2 = %d\n",
  1003. __func__, temp_val, dmeas, d1, d2);
  1004. return ret;
  1005. }
  1006. static void wsa883x_vbat_monitor_work(struct work_struct *work)
  1007. {
  1008. struct wsa883x_priv *wsa883x;
  1009. struct delayed_work *dwork;
  1010. struct snd_soc_component *component;
  1011. u16 val = 0, vbat_code = 0;
  1012. int vbat_val = 0;
  1013. dwork = to_delayed_work(work);
  1014. wsa883x = container_of(dwork, struct wsa883x_priv, vbat_work);
  1015. component = wsa883x->component;
  1016. val = snd_soc_component_read32(component, WSA883X_VBAT_DIN_MSB);
  1017. vbat_code = (val << 2);
  1018. val = (snd_soc_component_read32(component, WSA883X_VBAT_DIN_LSB)
  1019. & 0xC0);
  1020. vbat_code |= (val >> 6);
  1021. vbat_val = ((vbat_code * 5) / 1023);
  1022. dev_dbg(component->dev, "%s: instant vbat code = %d val = %d\n",
  1023. __func__, vbat_code, vbat_val);
  1024. val = snd_soc_component_read32(component, WSA883X_VBAT_DOUT);
  1025. vbat_val = ((val * 5) / 255);
  1026. dev_dbg(component->dev, "%s: low pass vbat code = %d val = %d\n",
  1027. __func__, val, vbat_val);
  1028. schedule_delayed_work(&wsa883x->vbat_work,
  1029. msecs_to_jiffies(wsa883x_vbat_timer_sec * 1000));
  1030. }
  1031. static int wsa883x_codec_probe(struct snd_soc_component *component)
  1032. {
  1033. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1034. struct swr_device *dev;
  1035. int variant = 0, version = 0;
  1036. if (!wsa883x)
  1037. return -EINVAL;
  1038. snd_soc_component_init_regmap(component, wsa883x->regmap);
  1039. dev = wsa883x->swr_slave;
  1040. wsa883x->component = component;
  1041. variant = (snd_soc_component_read32(component, WSA883X_OTP_REG_0)
  1042. & 0x0F);
  1043. wsa883x->variant = variant;
  1044. version = (snd_soc_component_read32(component, WSA883X_CHIP_ID0)
  1045. & 0xFF);
  1046. wsa883x->version = version;
  1047. wsa883x_codec_init(component);
  1048. wsa883x->global_pa_cnt = 0;
  1049. INIT_DELAYED_WORK(&wsa883x->vbat_work, wsa883x_vbat_monitor_work);
  1050. return 0;
  1051. }
  1052. static void wsa883x_codec_remove(struct snd_soc_component *component)
  1053. {
  1054. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1055. if (!wsa883x)
  1056. return;
  1057. snd_soc_component_exit_regmap(component);
  1058. return;
  1059. }
  1060. static const struct snd_soc_component_driver soc_codec_dev_wsa883x = {
  1061. .name = DRV_NAME,
  1062. .probe = wsa883x_codec_probe,
  1063. .remove = wsa883x_codec_remove,
  1064. .controls = wsa883x_snd_controls,
  1065. .num_controls = ARRAY_SIZE(wsa883x_snd_controls),
  1066. .dapm_widgets = wsa883x_dapm_widgets,
  1067. .num_dapm_widgets = ARRAY_SIZE(wsa883x_dapm_widgets),
  1068. .dapm_routes = wsa883x_audio_map,
  1069. .num_dapm_routes = ARRAY_SIZE(wsa883x_audio_map),
  1070. };
  1071. static int wsa883x_gpio_ctrl(struct wsa883x_priv *wsa883x, bool enable)
  1072. {
  1073. int ret = 0;
  1074. if (enable)
  1075. ret = msm_cdc_pinctrl_select_active_state(
  1076. wsa883x->wsa_rst_np);
  1077. else
  1078. ret = msm_cdc_pinctrl_select_sleep_state(
  1079. wsa883x->wsa_rst_np);
  1080. if (ret != 0)
  1081. dev_err(wsa883x->dev,
  1082. "%s: Failed to turn state %d; ret=%d\n",
  1083. __func__, enable, ret);
  1084. return ret;
  1085. }
  1086. static int wsa883x_event_notify(struct notifier_block *nb,
  1087. unsigned long val, void *ptr)
  1088. {
  1089. u16 event = (val & 0xffff);
  1090. struct wsa883x_priv *wsa883x = container_of(nb, struct wsa883x_priv,
  1091. parent_nblock);
  1092. if (!wsa883x)
  1093. return -EINVAL;
  1094. switch (event) {
  1095. case BOLERO_WSA_EVT_PA_OFF_PRE_SSR:
  1096. if (delayed_work_pending(&wsa883x->vbat_work))
  1097. cancel_delayed_work_sync(&wsa883x->vbat_work);
  1098. snd_soc_component_update_bits(wsa883x->component,
  1099. WSA883X_PA_FSM_CTL,
  1100. 0x01, 0x00);
  1101. break;
  1102. case BOLERO_WSA_EVT_PA_ON_POST_FSCLK:
  1103. if (test_bit(SPKR_STATUS, &wsa883x->status_mask))
  1104. snd_soc_component_update_bits(wsa883x->component,
  1105. WSA883X_PA_FSM_CTL,
  1106. 0x01, 0x01);
  1107. break;
  1108. default:
  1109. dev_dbg(wsa883x->dev, "%s: unknown event %d\n",
  1110. __func__, event);
  1111. break;
  1112. }
  1113. return 0;
  1114. }
  1115. static int wsa883x_enable_supplies(struct device * dev,
  1116. struct wsa883x_priv *priv)
  1117. {
  1118. int ret = 0;
  1119. /* Parse power supplies */
  1120. msm_cdc_get_power_supplies(dev, &priv->regulator,
  1121. &priv->num_supplies);
  1122. if (!priv->regulator || (priv->num_supplies <= 0)) {
  1123. dev_err(dev, "%s: no power supplies defined\n", __func__);
  1124. return -EINVAL;
  1125. }
  1126. ret = msm_cdc_init_supplies(dev, &priv->supplies,
  1127. priv->regulator, priv->num_supplies);
  1128. if (!priv->supplies) {
  1129. dev_err(dev, "%s: Cannot init wsa supplies\n",
  1130. __func__);
  1131. return ret;
  1132. }
  1133. ret = msm_cdc_enable_static_supplies(dev, priv->supplies,
  1134. priv->regulator,
  1135. priv->num_supplies);
  1136. if (ret)
  1137. dev_err(dev, "%s: wsa static supply enable failed!\n",
  1138. __func__);
  1139. return ret;
  1140. }
  1141. static int wsa883x_swr_probe(struct swr_device *pdev)
  1142. {
  1143. int ret = 0, i = 0;
  1144. struct wsa883x_priv *wsa883x;
  1145. u8 devnum = 0;
  1146. bool pin_state_current = false;
  1147. struct wsa_ctrl_platform_data *plat_data = NULL;
  1148. wsa883x = devm_kzalloc(&pdev->dev, sizeof(struct wsa883x_priv),
  1149. GFP_KERNEL);
  1150. if (!wsa883x)
  1151. return -ENOMEM;
  1152. ret = wsa883x_enable_supplies(&pdev->dev, wsa883x);
  1153. if (ret)
  1154. return -EINVAL;
  1155. wsa883x->wsa_rst_np = of_parse_phandle(pdev->dev.of_node,
  1156. "qcom,spkr-sd-n-node", 0);
  1157. if (!wsa883x->wsa_rst_np) {
  1158. dev_dbg(&pdev->dev, "%s: pinctrl not defined\n", __func__);
  1159. goto err;
  1160. }
  1161. swr_set_dev_data(pdev, wsa883x);
  1162. wsa883x->swr_slave = pdev;
  1163. pin_state_current = msm_cdc_pinctrl_get_state(wsa883x->wsa_rst_np);
  1164. wsa883x_gpio_ctrl(wsa883x, true);
  1165. /*
  1166. * Add 5msec delay to provide sufficient time for
  1167. * soundwire auto enumeration of slave devices as
  1168. * as per HW requirement.
  1169. */
  1170. usleep_range(5000, 5010);
  1171. ret = swr_get_logical_dev_num(pdev, pdev->addr, &devnum);
  1172. if (ret) {
  1173. dev_dbg(&pdev->dev,
  1174. "%s get devnum %d for dev addr %lx failed\n",
  1175. __func__, devnum, pdev->addr);
  1176. goto dev_err;
  1177. }
  1178. pdev->dev_num = devnum;
  1179. wsa883x->regmap = devm_regmap_init_swr(pdev,
  1180. &wsa883x_regmap_config);
  1181. if (IS_ERR(wsa883x->regmap)) {
  1182. ret = PTR_ERR(wsa883x->regmap);
  1183. dev_err(&pdev->dev, "%s: regmap_init failed %d\n",
  1184. __func__, ret);
  1185. goto dev_err;
  1186. }
  1187. /* Set all interrupts as edge triggered */
  1188. for (i = 0; i < wsa883x_regmap_irq_chip.num_regs; i++)
  1189. regmap_write(wsa883x->regmap, (WSA883X_INTR_LEVEL0 + i), 0);
  1190. wsa883x_regmap_irq_chip.irq_drv_data = wsa883x;
  1191. wsa883x->irq_info.wcd_regmap_irq_chip = &wsa883x_regmap_irq_chip;
  1192. wsa883x->irq_info.codec_name = "WSA883X";
  1193. wsa883x->irq_info.regmap = wsa883x->regmap;
  1194. wsa883x->irq_info.dev = &pdev->dev;
  1195. ret = wcd_irq_init(&wsa883x->irq_info, &wsa883x->virq);
  1196. if (ret) {
  1197. dev_err(wsa883x->dev, "%s: IRQ init failed: %d\n",
  1198. __func__, ret);
  1199. goto dev_err;
  1200. }
  1201. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR,
  1202. "WSA SAF2WAR", wsa883x_saf2war_handle_irq, NULL);
  1203. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF,
  1204. "WSA WAR2SAF", wsa883x_war2saf_handle_irq, NULL);
  1205. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE,
  1206. "WSA OTP", wsa883x_otp_handle_irq, NULL);
  1207. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP,
  1208. "WSA OCP", wsa883x_ocp_handle_irq, NULL);
  1209. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP);
  1210. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP,
  1211. "WSA CLIP", wsa883x_clip_handle_irq, NULL);
  1212. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP);
  1213. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD,
  1214. "WSA PDM WD", wsa883x_pdm_wd_handle_irq, NULL);
  1215. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD);
  1216. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD,
  1217. "WSA CLK WD", wsa883x_clk_wd_handle_irq, NULL);
  1218. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD);
  1219. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_INTR_PIN,
  1220. "WSA EXT INT", wsa883x_ext_int_handle_irq, NULL);
  1221. /* Under Voltage Lock out (UVLO) interrupt handle */
  1222. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO,
  1223. "WSA UVLO", wsa883x_uvlo_handle_irq, NULL);
  1224. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR,
  1225. "WSA PA ERR", wsa883x_pa_on_err_handle_irq, NULL);
  1226. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR);
  1227. ret = snd_soc_register_component(&pdev->dev, &soc_codec_dev_wsa883x,
  1228. NULL, 0);
  1229. if (ret) {
  1230. dev_err(&pdev->dev, "%s: Codec registration failed\n",
  1231. __func__);
  1232. goto err_irq;
  1233. }
  1234. wsa883x->parent_np = of_parse_phandle(pdev->dev.of_node,
  1235. "qcom,bolero-handle", 0);
  1236. if (wsa883x->parent_np) {
  1237. wsa883x->parent_dev =
  1238. of_find_device_by_node(wsa883x->parent_np);
  1239. if (wsa883x->parent_dev) {
  1240. plat_data = dev_get_platdata(&wsa883x->parent_dev->dev);
  1241. if (plat_data) {
  1242. wsa883x->parent_nblock.notifier_call =
  1243. wsa883x_event_notify;
  1244. if (plat_data->register_notifier)
  1245. plat_data->register_notifier(
  1246. plat_data->handle,
  1247. &wsa883x->parent_nblock,
  1248. true);
  1249. wsa883x->register_notifier =
  1250. plat_data->register_notifier;
  1251. wsa883x->handle = plat_data->handle;
  1252. } else {
  1253. dev_err(&pdev->dev, "%s: plat data not found\n",
  1254. __func__);
  1255. }
  1256. } else {
  1257. dev_err(&pdev->dev, "%s: parent dev not found\n",
  1258. __func__);
  1259. }
  1260. } else {
  1261. dev_info(&pdev->dev, "%s: parent node not found\n", __func__);
  1262. }
  1263. mutex_init(&wsa883x->res_lock);
  1264. #ifdef CONFIG_DEBUG_FS
  1265. if (!wsa883x->debugfs_dent) {
  1266. wsa883x->debugfs_dent = debugfs_create_dir(
  1267. dev_name(&pdev->dev), 0);
  1268. if (!IS_ERR(wsa883x->debugfs_dent)) {
  1269. wsa883x->debugfs_peek =
  1270. debugfs_create_file("swrslave_peek",
  1271. S_IFREG | 0444,
  1272. wsa883x->debugfs_dent,
  1273. (void *) pdev,
  1274. &codec_debug_read_ops);
  1275. wsa883x->debugfs_poke =
  1276. debugfs_create_file("swrslave_poke",
  1277. S_IFREG | 0444,
  1278. wsa883x->debugfs_dent,
  1279. (void *) pdev,
  1280. &codec_debug_write_ops);
  1281. wsa883x->debugfs_reg_dump =
  1282. debugfs_create_file(
  1283. "swrslave_reg_dump",
  1284. S_IFREG | 0444,
  1285. wsa883x->debugfs_dent,
  1286. (void *) pdev,
  1287. &codec_debug_dump_ops);
  1288. }
  1289. }
  1290. #endif
  1291. return 0;
  1292. err_irq:
  1293. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR, NULL);
  1294. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF, NULL);
  1295. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE, NULL);
  1296. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP, NULL);
  1297. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP, NULL);
  1298. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD, NULL);
  1299. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD, NULL);
  1300. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_INTR_PIN, NULL);
  1301. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO, NULL);
  1302. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR, NULL);
  1303. wcd_irq_exit(&wsa883x->irq_info, wsa883x->virq);
  1304. dev_err:
  1305. if (pin_state_current == false)
  1306. wsa883x_gpio_ctrl(wsa883x, false);
  1307. swr_remove_device(pdev);
  1308. err:
  1309. return ret;
  1310. }
  1311. static int wsa883x_swr_remove(struct swr_device *pdev)
  1312. {
  1313. struct wsa883x_priv *wsa883x;
  1314. wsa883x = swr_get_dev_data(pdev);
  1315. if (!wsa883x) {
  1316. dev_err(&pdev->dev, "%s: wsa883x is NULL\n", __func__);
  1317. return -EINVAL;
  1318. }
  1319. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR, NULL);
  1320. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF, NULL);
  1321. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE, NULL);
  1322. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP, NULL);
  1323. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP, NULL);
  1324. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD, NULL);
  1325. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD, NULL);
  1326. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_INTR_PIN, NULL);
  1327. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO, NULL);
  1328. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR, NULL);
  1329. if (wsa883x->register_notifier)
  1330. wsa883x->register_notifier(wsa883x->handle,
  1331. &wsa883x->parent_nblock, false);
  1332. #ifdef CONFIG_DEBUG_FS
  1333. debugfs_remove_recursive(wsa883x->debugfs_dent);
  1334. wsa883x->debugfs_dent = NULL;
  1335. #endif
  1336. mutex_destroy(&wsa883x->res_lock);
  1337. snd_soc_unregister_component(&pdev->dev);
  1338. swr_set_dev_data(pdev, NULL);
  1339. return 0;
  1340. }
  1341. #ifdef CONFIG_PM_SLEEP
  1342. static int wsa883x_swr_suspend(struct device *dev)
  1343. {
  1344. dev_dbg(dev, "%s: system suspend\n", __func__);
  1345. return 0;
  1346. }
  1347. static int wsa883x_swr_resume(struct device *dev)
  1348. {
  1349. struct wsa883x_priv *wsa883x = swr_get_dev_data(to_swr_device(dev));
  1350. if (!wsa883x) {
  1351. dev_err(dev, "%s: wsa883x private data is NULL\n", __func__);
  1352. return -EINVAL;
  1353. }
  1354. dev_dbg(dev, "%s: system resume\n", __func__);
  1355. return 0;
  1356. }
  1357. #endif /* CONFIG_PM_SLEEP */
  1358. static const struct dev_pm_ops wsa883x_swr_pm_ops = {
  1359. SET_SYSTEM_SLEEP_PM_OPS(wsa883x_swr_suspend, wsa883x_swr_resume)
  1360. };
  1361. static const struct swr_device_id wsa883x_swr_id[] = {
  1362. {"wsa883x", 0},
  1363. {}
  1364. };
  1365. static const struct of_device_id wsa883x_swr_dt_match[] = {
  1366. {
  1367. .compatible = "qcom,wsa883x",
  1368. },
  1369. {}
  1370. };
  1371. static struct swr_driver wsa883x_swr_driver = {
  1372. .driver = {
  1373. .name = "wsa883x",
  1374. .owner = THIS_MODULE,
  1375. .pm = &wsa883x_swr_pm_ops,
  1376. .of_match_table = wsa883x_swr_dt_match,
  1377. },
  1378. .probe = wsa883x_swr_probe,
  1379. .remove = wsa883x_swr_remove,
  1380. .id_table = wsa883x_swr_id,
  1381. };
  1382. static int __init wsa883x_swr_init(void)
  1383. {
  1384. return swr_driver_register(&wsa883x_swr_driver);
  1385. }
  1386. static void __exit wsa883x_swr_exit(void)
  1387. {
  1388. swr_driver_unregister(&wsa883x_swr_driver);
  1389. }
  1390. module_init(wsa883x_swr_init);
  1391. module_exit(wsa883x_swr_exit);
  1392. MODULE_DESCRIPTION("WSA883x codec driver");
  1393. MODULE_LICENSE("GPL v2");