main.c 123 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #ifdef SLATE_MODULE_ENABLED
  47. #include <linux/soc/qcom/slatecom_interface.h>
  48. #endif
  49. #include "main.h"
  50. #include "qmi.h"
  51. #include "debug.h"
  52. #include "power.h"
  53. #include "genl.h"
  54. #define MAX_PROP_SIZE 32
  55. #define NUM_LOG_PAGES 10
  56. #define NUM_LOG_LONG_PAGES 4
  57. #define ICNSS_MAGIC 0x5abc5abc
  58. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  59. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  60. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  61. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  62. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  63. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  64. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  65. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  66. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  67. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  68. #define ICNSS_MAX_PROBE_CNT 2
  69. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  70. #define PROBE_TIMEOUT 15000
  71. #define SMP2P_SOC_WAKE_TIMEOUT 500
  72. #ifdef CONFIG_ICNSS2_DEBUG
  73. static unsigned long qmi_timeout = 3000;
  74. module_param(qmi_timeout, ulong, 0600);
  75. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  76. #else
  77. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  78. #endif
  79. #define ICNSS_RECOVERY_TIMEOUT 60000
  80. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  81. #define ICNSS_CAL_TIMEOUT 40000
  82. static struct icnss_priv *penv;
  83. static struct work_struct wpss_loader;
  84. static struct work_struct wpss_ssr_work;
  85. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  86. #define ICNSS_EVENT_PENDING 2989
  87. #define ICNSS_EVENT_SYNC BIT(0)
  88. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  89. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  90. ICNSS_EVENT_SYNC)
  91. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  92. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  93. #define SMP2P_GET_MAX_RETRY 4
  94. #define SMP2P_GET_RETRY_DELAY_MS 500
  95. #define RAMDUMP_NUM_DEVICES 256
  96. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  97. #define WLAN_EN_TEMP_THRESHOLD 5000
  98. #define WLAN_EN_DELAY 500
  99. #define ICNSS_RPROC_LEN 10
  100. static DEFINE_IDA(rd_minor_id);
  101. enum icnss_pdr_cause_index {
  102. ICNSS_FW_CRASH,
  103. ICNSS_ROOT_PD_CRASH,
  104. ICNSS_ROOT_PD_SHUTDOWN,
  105. ICNSS_HOST_ERROR,
  106. };
  107. static const char * const icnss_pdr_cause[] = {
  108. [ICNSS_FW_CRASH] = "FW crash",
  109. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  110. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  111. [ICNSS_HOST_ERROR] = "Host error",
  112. };
  113. static void icnss_set_plat_priv(struct icnss_priv *priv)
  114. {
  115. penv = priv;
  116. }
  117. static struct icnss_priv *icnss_get_plat_priv(void)
  118. {
  119. return penv;
  120. }
  121. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  122. {
  123. if (priv && priv->rproc) {
  124. rproc_shutdown(priv->rproc);
  125. rproc_put(priv->rproc);
  126. priv->rproc = NULL;
  127. }
  128. }
  129. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  130. struct kobj_attribute *attr,
  131. const char *buf, size_t count)
  132. {
  133. struct icnss_priv *priv = icnss_get_plat_priv();
  134. if (!priv)
  135. return count;
  136. icnss_pr_dbg("Received shutdown indication");
  137. atomic_set(&priv->is_shutdown, true);
  138. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  139. icnss_wpss_unload(priv);
  140. return count;
  141. }
  142. static struct kobj_attribute icnss_sysfs_attribute =
  143. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  144. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  145. {
  146. if (atomic_inc_return(&priv->pm_count) != 1)
  147. return;
  148. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  149. atomic_read(&priv->pm_count));
  150. pm_stay_awake(&priv->pdev->dev);
  151. priv->stats.pm_stay_awake++;
  152. }
  153. static void icnss_pm_relax(struct icnss_priv *priv)
  154. {
  155. int r = atomic_dec_return(&priv->pm_count);
  156. WARN_ON(r < 0);
  157. if (r != 0)
  158. return;
  159. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  160. atomic_read(&priv->pm_count));
  161. pm_relax(&priv->pdev->dev);
  162. priv->stats.pm_relax++;
  163. }
  164. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  165. {
  166. switch (type) {
  167. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  168. return "SERVER_ARRIVE";
  169. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  170. return "SERVER_EXIT";
  171. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  172. return "FW_READY";
  173. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  174. return "REGISTER_DRIVER";
  175. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  176. return "UNREGISTER_DRIVER";
  177. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  178. return "PD_SERVICE_DOWN";
  179. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  180. return "FW_EARLY_CRASH_IND";
  181. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  182. return "IDLE_SHUTDOWN";
  183. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  184. return "IDLE_RESTART";
  185. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  186. return "FW_INIT_DONE";
  187. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  188. return "QDSS_TRACE_REQ_MEM";
  189. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  190. return "QDSS_TRACE_SAVE";
  191. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  192. return "QDSS_TRACE_FREE";
  193. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  194. return "M3_DUMP_UPLOAD";
  195. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  196. return "QDSS_TRACE_REQ_DATA";
  197. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  198. return "SUBSYS_RESTART_LEVEL";
  199. case ICNSS_DRIVER_EVENT_MAX:
  200. return "EVENT_MAX";
  201. }
  202. return "UNKNOWN";
  203. };
  204. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  205. {
  206. switch (type) {
  207. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  208. return "SOC_WAKE_REQUEST";
  209. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  210. return "SOC_WAKE_RELEASE";
  211. case ICNSS_SOC_WAKE_EVENT_MAX:
  212. return "SOC_EVENT_MAX";
  213. }
  214. return "UNKNOWN";
  215. };
  216. int icnss_driver_event_post(struct icnss_priv *priv,
  217. enum icnss_driver_event_type type,
  218. u32 flags, void *data)
  219. {
  220. struct icnss_driver_event *event;
  221. unsigned long irq_flags;
  222. int gfp = GFP_KERNEL;
  223. int ret = 0;
  224. if (!priv)
  225. return -ENODEV;
  226. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  227. icnss_driver_event_to_str(type), type, current->comm,
  228. flags, priv->state);
  229. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  230. icnss_pr_err("Invalid Event type: %d, can't post", type);
  231. return -EINVAL;
  232. }
  233. if (in_interrupt() || irqs_disabled())
  234. gfp = GFP_ATOMIC;
  235. event = kzalloc(sizeof(*event), gfp);
  236. if (event == NULL)
  237. return -ENOMEM;
  238. icnss_pm_stay_awake(priv);
  239. event->type = type;
  240. event->data = data;
  241. init_completion(&event->complete);
  242. event->ret = ICNSS_EVENT_PENDING;
  243. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  244. spin_lock_irqsave(&priv->event_lock, irq_flags);
  245. list_add_tail(&event->list, &priv->event_list);
  246. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  247. priv->stats.events[type].posted++;
  248. queue_work(priv->event_wq, &priv->event_work);
  249. if (!(flags & ICNSS_EVENT_SYNC))
  250. goto out;
  251. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  252. wait_for_completion(&event->complete);
  253. else
  254. ret = wait_for_completion_interruptible(&event->complete);
  255. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  256. icnss_driver_event_to_str(type), type, priv->state, ret,
  257. event->ret);
  258. spin_lock_irqsave(&priv->event_lock, irq_flags);
  259. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  260. event->sync = false;
  261. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  262. ret = -EINTR;
  263. goto out;
  264. }
  265. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  266. ret = event->ret;
  267. kfree(event);
  268. out:
  269. icnss_pm_relax(priv);
  270. return ret;
  271. }
  272. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  273. enum icnss_soc_wake_event_type type,
  274. u32 flags, void *data)
  275. {
  276. struct icnss_soc_wake_event *event;
  277. unsigned long irq_flags;
  278. int gfp = GFP_KERNEL;
  279. int ret = 0;
  280. if (!priv)
  281. return -ENODEV;
  282. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  283. icnss_soc_wake_event_to_str(type),
  284. type, current->comm, flags, priv->state);
  285. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  286. icnss_pr_err("Invalid Event type: %d, can't post", type);
  287. return -EINVAL;
  288. }
  289. if (in_interrupt() || irqs_disabled())
  290. gfp = GFP_ATOMIC;
  291. event = kzalloc(sizeof(*event), gfp);
  292. if (!event)
  293. return -ENOMEM;
  294. icnss_pm_stay_awake(priv);
  295. event->type = type;
  296. event->data = data;
  297. init_completion(&event->complete);
  298. event->ret = ICNSS_EVENT_PENDING;
  299. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  300. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  301. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  302. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  303. priv->stats.soc_wake_events[type].posted++;
  304. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  305. if (!(flags & ICNSS_EVENT_SYNC))
  306. goto out;
  307. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  308. wait_for_completion(&event->complete);
  309. else
  310. ret = wait_for_completion_interruptible(&event->complete);
  311. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  312. icnss_soc_wake_event_to_str(type),
  313. type, priv->state, ret, event->ret);
  314. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  315. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  316. event->sync = false;
  317. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  318. ret = -EINTR;
  319. goto out;
  320. }
  321. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  322. ret = event->ret;
  323. kfree(event);
  324. out:
  325. icnss_pm_relax(priv);
  326. return ret;
  327. }
  328. bool icnss_is_fw_ready(void)
  329. {
  330. if (!penv)
  331. return false;
  332. else
  333. return test_bit(ICNSS_FW_READY, &penv->state);
  334. }
  335. EXPORT_SYMBOL(icnss_is_fw_ready);
  336. void icnss_block_shutdown(bool status)
  337. {
  338. if (!penv)
  339. return;
  340. if (status) {
  341. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  342. reinit_completion(&penv->unblock_shutdown);
  343. } else {
  344. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  345. complete(&penv->unblock_shutdown);
  346. }
  347. }
  348. EXPORT_SYMBOL(icnss_block_shutdown);
  349. bool icnss_is_fw_down(void)
  350. {
  351. struct icnss_priv *priv = icnss_get_plat_priv();
  352. if (!priv)
  353. return false;
  354. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  355. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  356. test_bit(ICNSS_REJUVENATE, &priv->state);
  357. }
  358. EXPORT_SYMBOL(icnss_is_fw_down);
  359. unsigned long icnss_get_device_config(void)
  360. {
  361. struct icnss_priv *priv = icnss_get_plat_priv();
  362. if (!priv)
  363. return 0;
  364. return priv->device_config;
  365. }
  366. EXPORT_SYMBOL(icnss_get_device_config);
  367. bool icnss_is_rejuvenate(void)
  368. {
  369. if (!penv)
  370. return false;
  371. else
  372. return test_bit(ICNSS_REJUVENATE, &penv->state);
  373. }
  374. EXPORT_SYMBOL(icnss_is_rejuvenate);
  375. bool icnss_is_pdr(void)
  376. {
  377. if (!penv)
  378. return false;
  379. else
  380. return test_bit(ICNSS_PDR, &penv->state);
  381. }
  382. EXPORT_SYMBOL(icnss_is_pdr);
  383. static int icnss_send_smp2p(struct icnss_priv *priv,
  384. enum icnss_smp2p_msg_id msg_id,
  385. enum smp2p_out_entry smp2p_entry)
  386. {
  387. unsigned int value = 0;
  388. int ret;
  389. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  390. return -EINVAL;
  391. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  392. if (msg_id == ICNSS_RESET_MSG) {
  393. priv->smp2p_info[smp2p_entry].seq = 0;
  394. ret = qcom_smem_state_update_bits(
  395. priv->smp2p_info[smp2p_entry].smem_state,
  396. ICNSS_SMEM_VALUE_MASK,
  397. 0);
  398. if (ret)
  399. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  400. ret, icnss_smp2p_str[smp2p_entry]);
  401. return ret;
  402. }
  403. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  404. !test_bit(ICNSS_FW_READY, &priv->state)) {
  405. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  406. priv->state);
  407. return -EINVAL;
  408. }
  409. value |= priv->smp2p_info[smp2p_entry].seq++;
  410. value <<= ICNSS_SMEM_SEQ_NO_POS;
  411. value |= msg_id;
  412. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  413. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  414. reinit_completion(&penv->smp2p_soc_wake_wait);
  415. ret = qcom_smem_state_update_bits(
  416. priv->smp2p_info[smp2p_entry].smem_state,
  417. ICNSS_SMEM_VALUE_MASK,
  418. value);
  419. if (ret) {
  420. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  421. icnss_smp2p_str[smp2p_entry]);
  422. } else {
  423. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  424. msg_id == ICNSS_SOC_WAKE_REL) {
  425. if (!wait_for_completion_timeout(
  426. &priv->smp2p_soc_wake_wait,
  427. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  428. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  429. icnss_smp2p_str[smp2p_entry]);
  430. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  431. ICNSS_ASSERT(0);
  432. }
  433. }
  434. }
  435. return ret;
  436. }
  437. bool icnss_is_low_power(void)
  438. {
  439. if (!penv)
  440. return false;
  441. else
  442. return test_bit(ICNSS_LOW_POWER, &penv->state);
  443. }
  444. EXPORT_SYMBOL(icnss_is_low_power);
  445. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  446. {
  447. struct icnss_priv *priv = ctx;
  448. if (priv)
  449. priv->force_err_fatal = true;
  450. icnss_pr_err("Received force error fatal request from FW\n");
  451. return IRQ_HANDLED;
  452. }
  453. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  454. {
  455. struct icnss_priv *priv = ctx;
  456. struct icnss_uevent_fw_down_data fw_down_data = {0};
  457. icnss_pr_err("Received early crash indication from FW\n");
  458. if (priv) {
  459. if (priv->wpss_self_recovery_enabled)
  460. mod_timer(&priv->wpss_ssr_timer,
  461. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  462. set_bit(ICNSS_FW_DOWN, &priv->state);
  463. icnss_ignore_fw_timeout(true);
  464. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  465. clear_bit(ICNSS_FW_READY, &priv->state);
  466. fw_down_data.crashed = true;
  467. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  468. &fw_down_data);
  469. }
  470. }
  471. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  472. 0, NULL);
  473. return IRQ_HANDLED;
  474. }
  475. static void register_fw_error_notifications(struct device *dev)
  476. {
  477. struct icnss_priv *priv = dev_get_drvdata(dev);
  478. struct device_node *dev_node;
  479. int irq = 0, ret = 0;
  480. if (!priv)
  481. return;
  482. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  483. if (!dev_node) {
  484. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  485. return;
  486. }
  487. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  488. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  489. ret = irq = of_irq_get_byname(dev_node,
  490. "qcom,smp2p-force-fatal-error");
  491. if (ret < 0) {
  492. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  493. irq);
  494. return;
  495. }
  496. }
  497. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  498. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  499. "wlanfw-err", priv);
  500. if (ret < 0) {
  501. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  502. irq, ret);
  503. return;
  504. }
  505. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  506. priv->fw_error_fatal_irq = irq;
  507. }
  508. static void register_early_crash_notifications(struct device *dev)
  509. {
  510. struct icnss_priv *priv = dev_get_drvdata(dev);
  511. struct device_node *dev_node;
  512. int irq = 0, ret = 0;
  513. if (!priv)
  514. return;
  515. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  516. if (!dev_node) {
  517. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  518. return;
  519. }
  520. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  521. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  522. ret = irq = of_irq_get_byname(dev_node,
  523. "qcom,smp2p-early-crash-ind");
  524. if (ret < 0) {
  525. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  526. irq);
  527. return;
  528. }
  529. }
  530. ret = devm_request_threaded_irq(dev, irq, NULL,
  531. fw_crash_indication_handler,
  532. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  533. "wlanfw-early-crash-ind", priv);
  534. if (ret < 0) {
  535. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  536. irq, ret);
  537. return;
  538. }
  539. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  540. priv->fw_early_crash_irq = irq;
  541. }
  542. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  543. {
  544. struct thermal_zone_device *thermal_dev;
  545. const char *tsens;
  546. int ret;
  547. ret = of_property_read_string(priv->pdev->dev.of_node,
  548. "tsens",
  549. &tsens);
  550. if (ret)
  551. return ret;
  552. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  553. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  554. if (IS_ERR(thermal_dev)) {
  555. icnss_pr_err("Fail to get thermal zone. ret: %d",
  556. PTR_ERR(thermal_dev));
  557. return PTR_ERR(thermal_dev);
  558. }
  559. ret = thermal_zone_get_temp(thermal_dev, temp);
  560. if (ret)
  561. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  562. return ret;
  563. }
  564. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  565. {
  566. struct icnss_priv *priv = ctx;
  567. if (priv)
  568. complete(&priv->smp2p_soc_wake_wait);
  569. return IRQ_HANDLED;
  570. }
  571. static void register_soc_wake_notif(struct device *dev)
  572. {
  573. struct icnss_priv *priv = dev_get_drvdata(dev);
  574. struct device_node *dev_node;
  575. int irq = 0, ret = 0;
  576. if (!priv)
  577. return;
  578. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  579. if (!dev_node) {
  580. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  581. return;
  582. }
  583. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  584. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  585. ret = irq = of_irq_get_byname(dev_node,
  586. "qcom,smp2p-soc-wake-ack");
  587. if (ret < 0) {
  588. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  589. irq);
  590. return;
  591. }
  592. }
  593. ret = devm_request_threaded_irq(dev, irq, NULL,
  594. fw_soc_wake_ack_handler,
  595. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  596. IRQF_TRIGGER_FALLING,
  597. "wlanfw-soc-wake-ack", priv);
  598. if (ret < 0) {
  599. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  600. irq, ret);
  601. return;
  602. }
  603. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  604. priv->fw_soc_wake_ack_irq = irq;
  605. }
  606. int icnss_call_driver_uevent(struct icnss_priv *priv,
  607. enum icnss_uevent uevent, void *data)
  608. {
  609. struct icnss_uevent_data uevent_data;
  610. if (!priv->ops || !priv->ops->uevent)
  611. return 0;
  612. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  613. priv->state, uevent);
  614. uevent_data.uevent = uevent;
  615. uevent_data.data = data;
  616. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  617. }
  618. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  619. {
  620. int i;
  621. int ret = 0;
  622. ret = icnss_qmi_get_dms_mac(priv);
  623. if (ret == 0 && priv->dms.mac_valid)
  624. goto qmi_send;
  625. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  626. * Thus assert on failure to get MAC from DMS even after retries
  627. */
  628. if (priv->use_nv_mac) {
  629. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  630. if (priv->dms.mac_valid)
  631. break;
  632. ret = icnss_qmi_get_dms_mac(priv);
  633. if (ret != -EAGAIN)
  634. break;
  635. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  636. }
  637. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  638. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  639. ICNSS_ASSERT(0);
  640. return -EINVAL;
  641. }
  642. }
  643. qmi_send:
  644. if (priv->dms.mac_valid)
  645. ret =
  646. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  647. ARRAY_SIZE(priv->dms.mac));
  648. return ret;
  649. }
  650. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  651. enum smp2p_out_entry smp2p_entry)
  652. {
  653. int retry = 0;
  654. int error;
  655. if (priv->smp2p_info[smp2p_entry].smem_state)
  656. return;
  657. retry:
  658. priv->smp2p_info[smp2p_entry].smem_state =
  659. qcom_smem_state_get(&priv->pdev->dev,
  660. icnss_smp2p_str[smp2p_entry],
  661. &priv->smp2p_info[smp2p_entry].smem_bit);
  662. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  663. if (retry++ < SMP2P_GET_MAX_RETRY) {
  664. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  665. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  666. error, icnss_smp2p_str[smp2p_entry]);
  667. msleep(SMP2P_GET_RETRY_DELAY_MS);
  668. goto retry;
  669. }
  670. ICNSS_ASSERT(0);
  671. return;
  672. }
  673. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  674. }
  675. static inline
  676. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  677. {
  678. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  679. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  680. } else {
  681. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  682. }
  683. }
  684. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  685. {
  686. switch (val) {
  687. case WLAN_RF_SLATE:
  688. return WLFW_WLAN_RF_SLATE_V01;
  689. case WLAN_RF_APACHE:
  690. return WLFW_WLAN_RF_APACHE_V01;
  691. default:
  692. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  693. }
  694. }
  695. #ifdef SLATE_MODULE_ENABLED
  696. static void icnss_send_wlan_boot_init(void)
  697. {
  698. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  699. icnss_pr_info("sent wlan boot init command\n");
  700. }
  701. static void icnss_send_wlan_boot_complete(void)
  702. {
  703. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  704. icnss_pr_info("sent wlan boot complete command\n");
  705. }
  706. static void icnss_wait_for_slate_complete(struct icnss_priv *priv)
  707. {
  708. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  709. reinit_completion(&priv->slate_boot_complete);
  710. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  711. priv->state);
  712. wait_for_completion(&priv->slate_boot_complete);
  713. }
  714. icnss_send_wlan_boot_init();
  715. }
  716. #else
  717. static void icnss_send_wlan_boot_complete(void)
  718. {
  719. }
  720. static void icnss_wait_for_slate_complete(struct icnss_priv *priv)
  721. {
  722. }
  723. #endif
  724. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  725. void *data)
  726. {
  727. int ret = 0;
  728. int temp = 0;
  729. bool ignore_assert = false;
  730. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  731. if (!priv)
  732. return -ENODEV;
  733. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  734. clear_bit(ICNSS_FW_DOWN, &priv->state);
  735. clear_bit(ICNSS_FW_READY, &priv->state);
  736. icnss_ignore_fw_timeout(false);
  737. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  738. icnss_pr_err("QMI Server already in Connected State\n");
  739. ICNSS_ASSERT(0);
  740. }
  741. ret = icnss_connect_to_fw_server(priv, data);
  742. if (ret)
  743. goto fail;
  744. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  745. if (priv->is_slate_rfa)
  746. icnss_wait_for_slate_complete(priv);
  747. ret = wlfw_ind_register_send_sync_msg(priv);
  748. if (ret < 0) {
  749. if (ret == -EALREADY) {
  750. ret = 0;
  751. goto qmi_registered;
  752. }
  753. ignore_assert = true;
  754. goto fail;
  755. }
  756. if (priv->is_rf_subtype_valid) {
  757. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  758. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  759. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  760. if (ret < 0)
  761. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  762. ret);
  763. } else {
  764. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  765. priv->rf_subtype);
  766. }
  767. }
  768. if (priv->device_id == WCN6750_DEVICE_ID ||
  769. priv->device_id == WCN6450_DEVICE_ID) {
  770. if (!icnss_get_temperature(priv, &temp)) {
  771. icnss_pr_dbg("Temperature: %d\n", temp);
  772. if (temp < WLAN_EN_TEMP_THRESHOLD)
  773. icnss_set_wlan_en_delay(priv);
  774. }
  775. ret = wlfw_host_cap_send_sync(priv);
  776. if (ret < 0)
  777. goto fail;
  778. }
  779. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  780. if (!priv->msa_va) {
  781. icnss_pr_err("Invalid MSA address\n");
  782. ret = -EINVAL;
  783. goto fail;
  784. }
  785. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  786. if (ret < 0) {
  787. ignore_assert = true;
  788. goto fail;
  789. }
  790. ret = wlfw_msa_ready_send_sync_msg(priv);
  791. if (ret < 0) {
  792. ignore_assert = true;
  793. goto fail;
  794. }
  795. }
  796. if (priv->device_id == WCN6450_DEVICE_ID)
  797. icnss_hw_power_off(priv);
  798. ret = wlfw_cap_send_sync_msg(priv);
  799. if (ret < 0) {
  800. ignore_assert = true;
  801. goto fail;
  802. }
  803. ret = icnss_hw_power_on(priv);
  804. if (ret)
  805. goto fail;
  806. if (priv->device_id == WCN6750_DEVICE_ID ||
  807. priv->device_id == WCN6450_DEVICE_ID) {
  808. ret = wlfw_device_info_send_msg(priv);
  809. if (ret < 0) {
  810. ignore_assert = true;
  811. goto device_info_failure;
  812. }
  813. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  814. priv->mem_base_pa,
  815. priv->mem_base_size);
  816. if (!priv->mem_base_va) {
  817. icnss_pr_err("Ioremap failed for bar address\n");
  818. goto device_info_failure;
  819. }
  820. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  821. &priv->mem_base_pa,
  822. priv->mem_base_va);
  823. if (priv->mhi_state_info_pa)
  824. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  825. priv->mhi_state_info_pa,
  826. PAGE_SIZE);
  827. if (!priv->mhi_state_info_va)
  828. icnss_pr_err("Ioremap failed for MHI info address\n");
  829. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  830. &priv->mhi_state_info_pa,
  831. priv->mhi_state_info_va);
  832. }
  833. if (priv->bdf_download_support) {
  834. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  835. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  836. priv->ctrl_params.bdf_type);
  837. if (ret < 0)
  838. goto device_info_failure;
  839. }
  840. if (priv->device_id == WCN6450_DEVICE_ID) {
  841. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  842. if (ret < 0)
  843. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  844. ret);
  845. }
  846. if (priv->device_id == WCN6750_DEVICE_ID ||
  847. priv->device_id == WCN6450_DEVICE_ID) {
  848. if (!priv->fw_soc_wake_ack_irq)
  849. register_soc_wake_notif(&priv->pdev->dev);
  850. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  851. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  852. }
  853. if (priv->wpss_supported)
  854. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  855. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  856. if (priv->bdf_download_support) {
  857. ret = wlfw_cal_report_req(priv);
  858. if (ret < 0)
  859. goto device_info_failure;
  860. }
  861. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  862. dynamic_feature_mask);
  863. }
  864. if (!priv->fw_error_fatal_irq)
  865. register_fw_error_notifications(&priv->pdev->dev);
  866. if (!priv->fw_early_crash_irq)
  867. register_early_crash_notifications(&priv->pdev->dev);
  868. if (priv->psf_supported)
  869. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  870. return ret;
  871. device_info_failure:
  872. icnss_hw_power_off(priv);
  873. fail:
  874. ICNSS_ASSERT(ignore_assert);
  875. qmi_registered:
  876. return ret;
  877. }
  878. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  879. {
  880. if (!priv)
  881. return -ENODEV;
  882. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  883. icnss_clear_server(priv);
  884. if (priv->psf_supported)
  885. priv->last_updated_voltage = 0;
  886. return 0;
  887. }
  888. static int icnss_call_driver_probe(struct icnss_priv *priv)
  889. {
  890. int ret = 0;
  891. int probe_cnt = 0;
  892. if (!priv->ops || !priv->ops->probe)
  893. return 0;
  894. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  895. return -EINVAL;
  896. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  897. icnss_hw_power_on(priv);
  898. icnss_block_shutdown(true);
  899. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  900. ret = priv->ops->probe(&priv->pdev->dev);
  901. probe_cnt++;
  902. if (ret != -EPROBE_DEFER)
  903. break;
  904. }
  905. if (ret < 0) {
  906. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  907. ret, priv->state, probe_cnt);
  908. icnss_block_shutdown(false);
  909. goto out;
  910. }
  911. icnss_block_shutdown(false);
  912. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  913. return 0;
  914. out:
  915. icnss_hw_power_off(priv);
  916. return ret;
  917. }
  918. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  919. {
  920. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  921. goto out;
  922. if (!priv->ops || !priv->ops->shutdown)
  923. goto out;
  924. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  925. goto out;
  926. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  927. priv->ops->shutdown(&priv->pdev->dev);
  928. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  929. out:
  930. return 0;
  931. }
  932. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  933. {
  934. int ret = 0;
  935. icnss_pm_relax(priv);
  936. icnss_call_driver_shutdown(priv);
  937. clear_bit(ICNSS_PDR, &priv->state);
  938. clear_bit(ICNSS_REJUVENATE, &priv->state);
  939. clear_bit(ICNSS_PD_RESTART, &priv->state);
  940. clear_bit(ICNSS_LOW_POWER, &priv->state);
  941. priv->early_crash_ind = false;
  942. priv->is_ssr = false;
  943. if (!priv->ops || !priv->ops->reinit)
  944. goto out;
  945. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  946. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  947. priv->state);
  948. goto out;
  949. }
  950. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  951. goto call_probe;
  952. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  953. icnss_hw_power_on(priv);
  954. icnss_block_shutdown(true);
  955. ret = priv->ops->reinit(&priv->pdev->dev);
  956. if (ret < 0) {
  957. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  958. ret, priv->state);
  959. if (!priv->allow_recursive_recovery)
  960. ICNSS_ASSERT(false);
  961. icnss_block_shutdown(false);
  962. goto out_power_off;
  963. }
  964. icnss_block_shutdown(false);
  965. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  966. return 0;
  967. call_probe:
  968. return icnss_call_driver_probe(priv);
  969. out_power_off:
  970. icnss_hw_power_off(priv);
  971. out:
  972. return ret;
  973. }
  974. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  975. {
  976. int ret = 0;
  977. if (!priv)
  978. return -ENODEV;
  979. del_timer(&priv->recovery_timer);
  980. set_bit(ICNSS_FW_READY, &priv->state);
  981. clear_bit(ICNSS_MODE_ON, &priv->state);
  982. atomic_set(&priv->soc_wake_ref_count, 0);
  983. if (priv->device_id == WCN6750_DEVICE_ID ||
  984. priv->device_id == WCN6450_DEVICE_ID)
  985. icnss_free_qdss_mem(priv);
  986. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  987. icnss_hw_power_off(priv);
  988. if (!priv->pdev) {
  989. icnss_pr_err("Device is not ready\n");
  990. ret = -ENODEV;
  991. goto out;
  992. }
  993. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  994. icnss_send_wlan_boot_complete();
  995. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  996. ret = icnss_pd_restart_complete(priv);
  997. } else {
  998. if (priv->wpss_supported)
  999. icnss_setup_dms_mac(priv);
  1000. ret = icnss_call_driver_probe(priv);
  1001. }
  1002. icnss_vreg_unvote(priv);
  1003. out:
  1004. return ret;
  1005. }
  1006. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1007. {
  1008. int ret = 0;
  1009. if (!priv)
  1010. return -ENODEV;
  1011. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1012. if (priv->device_id == WCN6750_DEVICE_ID) {
  1013. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1014. if (ret < 0)
  1015. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1016. ret);
  1017. }
  1018. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1019. mod_timer(&priv->recovery_timer,
  1020. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1021. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1022. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1023. } else {
  1024. icnss_driver_event_fw_ready_ind(priv, NULL);
  1025. }
  1026. return ret;
  1027. }
  1028. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1029. {
  1030. struct platform_device *pdev = priv->pdev;
  1031. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1032. int i, j;
  1033. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1034. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1035. qdss_mem[i].va =
  1036. dma_alloc_coherent(&pdev->dev,
  1037. qdss_mem[i].size,
  1038. &qdss_mem[i].pa,
  1039. GFP_KERNEL);
  1040. if (!qdss_mem[i].va) {
  1041. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1042. qdss_mem[i].size,
  1043. qdss_mem[i].type, i);
  1044. break;
  1045. }
  1046. }
  1047. }
  1048. /* Best-effort allocation for QDSS trace */
  1049. if (i < priv->qdss_mem_seg_len) {
  1050. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1051. qdss_mem[j].type = 0;
  1052. qdss_mem[j].size = 0;
  1053. }
  1054. priv->qdss_mem_seg_len = i;
  1055. }
  1056. return 0;
  1057. }
  1058. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1059. {
  1060. struct platform_device *pdev = priv->pdev;
  1061. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1062. int i;
  1063. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1064. if (qdss_mem[i].va && qdss_mem[i].size) {
  1065. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1066. &qdss_mem[i].pa, qdss_mem[i].size,
  1067. qdss_mem[i].type);
  1068. dma_free_coherent(&pdev->dev,
  1069. qdss_mem[i].size, qdss_mem[i].va,
  1070. qdss_mem[i].pa);
  1071. qdss_mem[i].va = NULL;
  1072. qdss_mem[i].pa = 0;
  1073. qdss_mem[i].size = 0;
  1074. qdss_mem[i].type = 0;
  1075. }
  1076. }
  1077. priv->qdss_mem_seg_len = 0;
  1078. }
  1079. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1080. {
  1081. int ret = 0;
  1082. ret = icnss_alloc_qdss_mem(priv);
  1083. if (ret < 0)
  1084. return ret;
  1085. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1086. }
  1087. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1088. u64 pa, u32 size, int *seg_id)
  1089. {
  1090. int i = 0;
  1091. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1092. u64 offset = 0;
  1093. void *va = NULL;
  1094. u64 local_pa;
  1095. u32 local_size;
  1096. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1097. local_pa = (u64)qdss_mem[i].pa;
  1098. local_size = (u32)qdss_mem[i].size;
  1099. if (pa == local_pa && size <= local_size) {
  1100. va = qdss_mem[i].va;
  1101. break;
  1102. }
  1103. if (pa > local_pa &&
  1104. pa < local_pa + local_size &&
  1105. pa + size <= local_pa + local_size) {
  1106. offset = pa - local_pa;
  1107. va = qdss_mem[i].va + offset;
  1108. break;
  1109. }
  1110. }
  1111. *seg_id = i;
  1112. return va;
  1113. }
  1114. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1115. void *data)
  1116. {
  1117. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1118. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1119. int ret = 0;
  1120. int i;
  1121. void *va = NULL;
  1122. u64 pa;
  1123. u32 size;
  1124. int seg_id = 0;
  1125. if (!priv->qdss_mem_seg_len) {
  1126. icnss_pr_err("Memory for QDSS trace is not available\n");
  1127. return -ENOMEM;
  1128. }
  1129. if (event_data->mem_seg_len == 0) {
  1130. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1131. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1132. ICNSS_GENL_MSG_TYPE_QDSS,
  1133. event_data->file_name,
  1134. qdss_mem[i].size);
  1135. if (ret < 0) {
  1136. icnss_pr_err("Fail to save QDSS data: %d\n",
  1137. ret);
  1138. break;
  1139. }
  1140. }
  1141. } else {
  1142. for (i = 0; i < event_data->mem_seg_len; i++) {
  1143. pa = event_data->mem_seg[i].addr;
  1144. size = event_data->mem_seg[i].size;
  1145. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1146. size, &seg_id);
  1147. if (!va) {
  1148. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1149. &pa);
  1150. ret = -EINVAL;
  1151. break;
  1152. }
  1153. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1154. event_data->file_name, size);
  1155. if (ret < 0) {
  1156. icnss_pr_err("Fail to save QDSS data: %d\n",
  1157. ret);
  1158. break;
  1159. }
  1160. }
  1161. }
  1162. kfree(data);
  1163. return ret;
  1164. }
  1165. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1166. {
  1167. int dec, c = atomic_read(v);
  1168. do {
  1169. dec = c - 1;
  1170. if (unlikely(dec < 1))
  1171. break;
  1172. } while (!atomic_try_cmpxchg(v, &c, dec));
  1173. return dec;
  1174. }
  1175. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1176. void *data)
  1177. {
  1178. int ret = 0;
  1179. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1180. if (!priv)
  1181. return -ENODEV;
  1182. if (!data)
  1183. return -EINVAL;
  1184. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1185. event_data->total_size);
  1186. kfree(data);
  1187. return ret;
  1188. }
  1189. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1190. {
  1191. int ret = 0;
  1192. if (!priv)
  1193. return -ENODEV;
  1194. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1195. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1196. atomic_read(&priv->soc_wake_ref_count));
  1197. return 0;
  1198. }
  1199. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1200. ICNSS_SMP2P_OUT_SOC_WAKE);
  1201. if (!ret)
  1202. atomic_inc(&priv->soc_wake_ref_count);
  1203. return ret;
  1204. }
  1205. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1206. {
  1207. int ret = 0;
  1208. if (!priv)
  1209. return -ENODEV;
  1210. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1211. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1212. priv->soc_wake_ref_count);
  1213. return 0;
  1214. }
  1215. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1216. ICNSS_SMP2P_OUT_SOC_WAKE);
  1217. return ret;
  1218. }
  1219. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1220. void *data)
  1221. {
  1222. int ret = 0;
  1223. int probe_cnt = 0;
  1224. if (priv->ops)
  1225. return -EEXIST;
  1226. priv->ops = data;
  1227. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1228. set_bit(ICNSS_FW_READY, &priv->state);
  1229. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1230. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1231. priv->state);
  1232. return -ENODEV;
  1233. }
  1234. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1235. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1236. priv->state);
  1237. goto out;
  1238. }
  1239. ret = icnss_hw_power_on(priv);
  1240. if (ret)
  1241. goto out;
  1242. icnss_block_shutdown(true);
  1243. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1244. ret = priv->ops->probe(&priv->pdev->dev);
  1245. probe_cnt++;
  1246. if (ret != -EPROBE_DEFER)
  1247. break;
  1248. }
  1249. if (ret) {
  1250. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1251. ret, priv->state, probe_cnt);
  1252. icnss_block_shutdown(false);
  1253. goto power_off;
  1254. }
  1255. icnss_block_shutdown(false);
  1256. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1257. return 0;
  1258. power_off:
  1259. icnss_hw_power_off(priv);
  1260. out:
  1261. return ret;
  1262. }
  1263. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1264. void *data)
  1265. {
  1266. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1267. priv->ops = NULL;
  1268. goto out;
  1269. }
  1270. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1271. icnss_block_shutdown(true);
  1272. if (priv->ops)
  1273. priv->ops->remove(&priv->pdev->dev);
  1274. icnss_block_shutdown(false);
  1275. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1276. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1277. priv->ops = NULL;
  1278. icnss_hw_power_off(priv);
  1279. out:
  1280. return 0;
  1281. }
  1282. static int icnss_fw_crashed(struct icnss_priv *priv,
  1283. struct icnss_event_pd_service_down_data *event_data)
  1284. {
  1285. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1286. set_bit(ICNSS_PD_RESTART, &priv->state);
  1287. clear_bit(ICNSS_FW_READY, &priv->state);
  1288. icnss_pm_stay_awake(priv);
  1289. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1290. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1291. if (event_data && event_data->fw_rejuvenate)
  1292. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1293. return 0;
  1294. }
  1295. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1296. struct icnss_uevent_hang_data *hang_data)
  1297. {
  1298. if (!priv->hang_event_data_va)
  1299. return -EINVAL;
  1300. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1301. priv->hang_event_data_len,
  1302. GFP_ATOMIC);
  1303. if (!priv->hang_event_data)
  1304. return -ENOMEM;
  1305. // Update the hang event params
  1306. hang_data->hang_event_data = priv->hang_event_data;
  1307. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1308. return 0;
  1309. }
  1310. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1311. {
  1312. struct icnss_uevent_hang_data hang_data = {0};
  1313. int ret = 0xFF;
  1314. if (priv->early_crash_ind) {
  1315. ret = icnss_update_hang_event_data(priv, &hang_data);
  1316. if (ret)
  1317. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1318. }
  1319. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1320. &hang_data);
  1321. if (!ret) {
  1322. kfree(priv->hang_event_data);
  1323. priv->hang_event_data = NULL;
  1324. }
  1325. return 0;
  1326. }
  1327. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1328. void *data)
  1329. {
  1330. struct icnss_event_pd_service_down_data *event_data = data;
  1331. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1332. icnss_ignore_fw_timeout(false);
  1333. goto out;
  1334. }
  1335. if (priv->force_err_fatal)
  1336. ICNSS_ASSERT(0);
  1337. if (priv->device_id == WCN6750_DEVICE_ID ||
  1338. priv->device_id == WCN6450_DEVICE_ID) {
  1339. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1340. ICNSS_SMP2P_OUT_SOC_WAKE);
  1341. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1342. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1343. }
  1344. if (priv->wpss_supported)
  1345. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1346. ICNSS_SMP2P_OUT_POWER_SAVE);
  1347. icnss_send_hang_event_data(priv);
  1348. if (priv->early_crash_ind) {
  1349. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1350. event_data->crashed, priv->state);
  1351. goto out;
  1352. }
  1353. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1354. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1355. event_data->crashed, priv->state);
  1356. if (!priv->allow_recursive_recovery)
  1357. ICNSS_ASSERT(0);
  1358. goto out;
  1359. }
  1360. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1361. icnss_fw_crashed(priv, event_data);
  1362. out:
  1363. kfree(data);
  1364. return 0;
  1365. }
  1366. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1367. void *data)
  1368. {
  1369. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1370. icnss_ignore_fw_timeout(false);
  1371. goto out;
  1372. }
  1373. priv->early_crash_ind = true;
  1374. icnss_fw_crashed(priv, NULL);
  1375. out:
  1376. kfree(data);
  1377. return 0;
  1378. }
  1379. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1380. void *data)
  1381. {
  1382. int ret = 0;
  1383. if (!priv->ops || !priv->ops->idle_shutdown)
  1384. return 0;
  1385. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1386. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1387. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1388. ret = -EBUSY;
  1389. } else {
  1390. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1391. priv->state);
  1392. icnss_block_shutdown(true);
  1393. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1394. icnss_block_shutdown(false);
  1395. }
  1396. return ret;
  1397. }
  1398. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1399. void *data)
  1400. {
  1401. int ret = 0;
  1402. if (!priv->ops || !priv->ops->idle_restart)
  1403. return 0;
  1404. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1405. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1406. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1407. ret = -EBUSY;
  1408. } else {
  1409. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1410. priv->state);
  1411. icnss_block_shutdown(true);
  1412. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1413. icnss_block_shutdown(false);
  1414. }
  1415. return ret;
  1416. }
  1417. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1418. {
  1419. icnss_free_qdss_mem(priv);
  1420. return 0;
  1421. }
  1422. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1423. void *data)
  1424. {
  1425. struct icnss_m3_upload_segments_req_data *event_data = data;
  1426. struct qcom_dump_segment segment;
  1427. int i, status = 0, ret = 0;
  1428. struct list_head head;
  1429. if (!dump_enabled()) {
  1430. icnss_pr_info("Dump collection is not enabled\n");
  1431. return ret;
  1432. }
  1433. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1434. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1435. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1436. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1437. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1438. return ret;
  1439. INIT_LIST_HEAD(&head);
  1440. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1441. memset(&segment, 0, sizeof(segment));
  1442. segment.va = devm_ioremap(&priv->pdev->dev,
  1443. event_data->m3_segment[i].addr,
  1444. event_data->m3_segment[i].size);
  1445. if (!segment.va) {
  1446. icnss_pr_err("Failed to ioremap M3 Dump region");
  1447. ret = -ENOMEM;
  1448. goto send_resp;
  1449. }
  1450. segment.size = event_data->m3_segment[i].size;
  1451. list_add(&segment.node, &head);
  1452. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1453. event_data->m3_segment[i].name);
  1454. switch (event_data->m3_segment[i].type) {
  1455. case QMI_M3_SEGMENT_PHYAREG_V01:
  1456. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1457. break;
  1458. case QMI_M3_SEGMENT_PHYDBG_V01:
  1459. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1460. break;
  1461. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1462. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1463. break;
  1464. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1465. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1466. break;
  1467. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1468. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1469. break;
  1470. default:
  1471. icnss_pr_err("Invalid Segment type: %d",
  1472. event_data->m3_segment[i].type);
  1473. }
  1474. if (ret) {
  1475. status = ret;
  1476. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1477. event_data->m3_segment[i].name, ret);
  1478. }
  1479. list_del(&segment.node);
  1480. }
  1481. send_resp:
  1482. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1483. status);
  1484. return ret;
  1485. }
  1486. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1487. {
  1488. int ret = 0;
  1489. struct icnss_subsys_restart_level_data *event_data = data;
  1490. if (!priv)
  1491. return -ENODEV;
  1492. if (!data)
  1493. return -EINVAL;
  1494. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1495. kfree(data);
  1496. return ret;
  1497. }
  1498. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1499. {
  1500. int ret;
  1501. struct icnss_priv *priv = icnss_get_plat_priv();
  1502. rproc_shutdown(priv->rproc);
  1503. ret = rproc_boot(priv->rproc);
  1504. if (ret) {
  1505. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1506. rproc_put(priv->rproc);
  1507. }
  1508. }
  1509. static void icnss_driver_event_work(struct work_struct *work)
  1510. {
  1511. struct icnss_priv *priv =
  1512. container_of(work, struct icnss_priv, event_work);
  1513. struct icnss_driver_event *event;
  1514. unsigned long flags;
  1515. int ret;
  1516. icnss_pm_stay_awake(priv);
  1517. spin_lock_irqsave(&priv->event_lock, flags);
  1518. while (!list_empty(&priv->event_list)) {
  1519. event = list_first_entry(&priv->event_list,
  1520. struct icnss_driver_event, list);
  1521. list_del(&event->list);
  1522. spin_unlock_irqrestore(&priv->event_lock, flags);
  1523. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1524. icnss_driver_event_to_str(event->type),
  1525. event->sync ? "-sync" : "", event->type,
  1526. priv->state);
  1527. switch (event->type) {
  1528. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1529. ret = icnss_driver_event_server_arrive(priv,
  1530. event->data);
  1531. break;
  1532. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1533. ret = icnss_driver_event_server_exit(priv);
  1534. break;
  1535. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1536. ret = icnss_driver_event_fw_ready_ind(priv,
  1537. event->data);
  1538. break;
  1539. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1540. ret = icnss_driver_event_register_driver(priv,
  1541. event->data);
  1542. break;
  1543. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1544. ret = icnss_driver_event_unregister_driver(priv,
  1545. event->data);
  1546. break;
  1547. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1548. ret = icnss_driver_event_pd_service_down(priv,
  1549. event->data);
  1550. break;
  1551. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1552. ret = icnss_driver_event_early_crash_ind(priv,
  1553. event->data);
  1554. break;
  1555. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1556. ret = icnss_driver_event_idle_shutdown(priv,
  1557. event->data);
  1558. break;
  1559. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1560. ret = icnss_driver_event_idle_restart(priv,
  1561. event->data);
  1562. break;
  1563. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1564. ret = icnss_driver_event_fw_init_done(priv,
  1565. event->data);
  1566. break;
  1567. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1568. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1569. break;
  1570. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1571. ret = icnss_qdss_trace_save_hdlr(priv,
  1572. event->data);
  1573. break;
  1574. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1575. ret = icnss_qdss_trace_free_hdlr(priv);
  1576. break;
  1577. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1578. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1579. break;
  1580. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1581. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1582. event->data);
  1583. break;
  1584. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1585. ret = icnss_subsys_restart_level(priv, event->data);
  1586. break;
  1587. default:
  1588. icnss_pr_err("Invalid Event type: %d", event->type);
  1589. kfree(event);
  1590. continue;
  1591. }
  1592. priv->stats.events[event->type].processed++;
  1593. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1594. icnss_driver_event_to_str(event->type),
  1595. event->sync ? "-sync" : "", event->type, ret,
  1596. priv->state);
  1597. spin_lock_irqsave(&priv->event_lock, flags);
  1598. if (event->sync) {
  1599. event->ret = ret;
  1600. complete(&event->complete);
  1601. continue;
  1602. }
  1603. spin_unlock_irqrestore(&priv->event_lock, flags);
  1604. kfree(event);
  1605. spin_lock_irqsave(&priv->event_lock, flags);
  1606. }
  1607. spin_unlock_irqrestore(&priv->event_lock, flags);
  1608. icnss_pm_relax(priv);
  1609. }
  1610. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1611. {
  1612. struct icnss_priv *priv =
  1613. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1614. struct icnss_soc_wake_event *event;
  1615. unsigned long flags;
  1616. int ret;
  1617. icnss_pm_stay_awake(priv);
  1618. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1619. while (!list_empty(&priv->soc_wake_msg_list)) {
  1620. event = list_first_entry(&priv->soc_wake_msg_list,
  1621. struct icnss_soc_wake_event, list);
  1622. list_del(&event->list);
  1623. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1624. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1625. icnss_soc_wake_event_to_str(event->type),
  1626. event->sync ? "-sync" : "", event->type,
  1627. priv->state);
  1628. switch (event->type) {
  1629. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1630. ret = icnss_event_soc_wake_request(priv,
  1631. event->data);
  1632. break;
  1633. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1634. ret = icnss_event_soc_wake_release(priv,
  1635. event->data);
  1636. break;
  1637. default:
  1638. icnss_pr_err("Invalid Event type: %d", event->type);
  1639. kfree(event);
  1640. continue;
  1641. }
  1642. priv->stats.soc_wake_events[event->type].processed++;
  1643. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1644. icnss_soc_wake_event_to_str(event->type),
  1645. event->sync ? "-sync" : "", event->type, ret,
  1646. priv->state);
  1647. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1648. if (event->sync) {
  1649. event->ret = ret;
  1650. complete(&event->complete);
  1651. continue;
  1652. }
  1653. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1654. kfree(event);
  1655. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1656. }
  1657. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1658. icnss_pm_relax(priv);
  1659. }
  1660. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1661. {
  1662. int ret = 0;
  1663. struct qcom_dump_segment segment;
  1664. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1665. struct list_head head;
  1666. if (!dump_enabled()) {
  1667. icnss_pr_info("Dump collection is not enabled\n");
  1668. return ret;
  1669. }
  1670. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1671. return ret;
  1672. INIT_LIST_HEAD(&head);
  1673. memset(&segment, 0, sizeof(segment));
  1674. segment.va = priv->msa_va;
  1675. segment.size = priv->msa_mem_size;
  1676. list_add(&segment.node, &head);
  1677. if (!msa0_dump_dev->dev) {
  1678. icnss_pr_err("Created Dump Device not found\n");
  1679. return 0;
  1680. }
  1681. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1682. if (ret) {
  1683. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1684. return ret;
  1685. }
  1686. list_del(&segment.node);
  1687. return ret;
  1688. }
  1689. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1690. void *data)
  1691. {
  1692. struct qcom_ssr_notify_data *notif = data;
  1693. int ret = 0;
  1694. if (!notif->crashed) {
  1695. if (atomic_read(&priv->is_shutdown)) {
  1696. atomic_set(&priv->is_shutdown, false);
  1697. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1698. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1699. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1700. clear_bit(ICNSS_FW_READY, &priv->state);
  1701. icnss_driver_event_post(priv,
  1702. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1703. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1704. NULL);
  1705. }
  1706. }
  1707. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1708. if (!wait_for_completion_timeout(
  1709. &priv->unblock_shutdown,
  1710. msecs_to_jiffies(PROBE_TIMEOUT)))
  1711. icnss_pr_err("modem block shutdown timeout\n");
  1712. }
  1713. ret = wlfw_send_modem_shutdown_msg(priv);
  1714. if (ret < 0)
  1715. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1716. ret);
  1717. }
  1718. }
  1719. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1720. {
  1721. switch (code) {
  1722. case QCOM_SSR_BEFORE_POWERUP:
  1723. return "BEFORE_POWERUP";
  1724. case QCOM_SSR_AFTER_POWERUP:
  1725. return "AFTER_POWERUP";
  1726. case QCOM_SSR_BEFORE_SHUTDOWN:
  1727. return "BEFORE_SHUTDOWN";
  1728. case QCOM_SSR_AFTER_SHUTDOWN:
  1729. return "AFTER_SHUTDOWN";
  1730. default:
  1731. return "UNKNOWN";
  1732. }
  1733. };
  1734. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1735. unsigned long code,
  1736. void *data)
  1737. {
  1738. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1739. wpss_early_ssr_nb);
  1740. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1741. icnss_qcom_ssr_notify_state_to_str(code), code);
  1742. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1743. set_bit(ICNSS_FW_DOWN, &priv->state);
  1744. icnss_ignore_fw_timeout(true);
  1745. }
  1746. return NOTIFY_DONE;
  1747. }
  1748. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1749. unsigned long code,
  1750. void *data)
  1751. {
  1752. struct icnss_event_pd_service_down_data *event_data;
  1753. struct qcom_ssr_notify_data *notif = data;
  1754. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1755. wpss_ssr_nb);
  1756. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1757. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1758. icnss_qcom_ssr_notify_state_to_str(code), code);
  1759. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1760. icnss_pr_info("Collecting msa0 segment dump\n");
  1761. icnss_msa0_ramdump(priv);
  1762. goto out;
  1763. }
  1764. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1765. goto out;
  1766. if (priv->wpss_self_recovery_enabled)
  1767. del_timer(&priv->wpss_ssr_timer);
  1768. priv->is_ssr = true;
  1769. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1770. priv->state, notif->crashed);
  1771. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1772. icnss_update_state_send_modem_shutdown(priv, data);
  1773. set_bit(ICNSS_FW_DOWN, &priv->state);
  1774. icnss_ignore_fw_timeout(true);
  1775. if (notif->crashed)
  1776. priv->stats.recovery.root_pd_crash++;
  1777. else
  1778. priv->stats.recovery.root_pd_shutdown++;
  1779. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1780. if (event_data == NULL)
  1781. return notifier_from_errno(-ENOMEM);
  1782. event_data->crashed = notif->crashed;
  1783. fw_down_data.crashed = !!notif->crashed;
  1784. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1785. clear_bit(ICNSS_FW_READY, &priv->state);
  1786. fw_down_data.crashed = !!notif->crashed;
  1787. icnss_call_driver_uevent(priv,
  1788. ICNSS_UEVENT_FW_DOWN,
  1789. &fw_down_data);
  1790. }
  1791. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1792. ICNSS_EVENT_SYNC, event_data);
  1793. if (notif->crashed)
  1794. mod_timer(&priv->recovery_timer,
  1795. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1796. out:
  1797. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1798. return NOTIFY_OK;
  1799. }
  1800. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1801. unsigned long code,
  1802. void *data)
  1803. {
  1804. struct icnss_event_pd_service_down_data *event_data;
  1805. struct qcom_ssr_notify_data *notif = data;
  1806. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1807. modem_ssr_nb);
  1808. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1809. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1810. icnss_qcom_ssr_notify_state_to_str(code), code);
  1811. switch (code) {
  1812. case QCOM_SSR_BEFORE_SHUTDOWN:
  1813. if (!notif->crashed &&
  1814. priv->low_power_support) { /* Hibernate */
  1815. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1816. icnss_driver_event_post(
  1817. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1818. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1819. set_bit(ICNSS_LOW_POWER, &priv->state);
  1820. }
  1821. break;
  1822. case QCOM_SSR_AFTER_SHUTDOWN:
  1823. /* Collect ramdump only when there was a crash. */
  1824. if (notif->crashed) {
  1825. icnss_pr_info("Collecting msa0 segment dump\n");
  1826. icnss_msa0_ramdump(priv);
  1827. }
  1828. goto out;
  1829. default:
  1830. goto out;
  1831. }
  1832. priv->is_ssr = true;
  1833. if (notif->crashed) {
  1834. priv->stats.recovery.root_pd_crash++;
  1835. priv->root_pd_shutdown = false;
  1836. } else {
  1837. priv->stats.recovery.root_pd_shutdown++;
  1838. priv->root_pd_shutdown = true;
  1839. }
  1840. icnss_update_state_send_modem_shutdown(priv, data);
  1841. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1842. set_bit(ICNSS_FW_DOWN, &priv->state);
  1843. icnss_ignore_fw_timeout(true);
  1844. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1845. clear_bit(ICNSS_FW_READY, &priv->state);
  1846. fw_down_data.crashed = !!notif->crashed;
  1847. icnss_call_driver_uevent(priv,
  1848. ICNSS_UEVENT_FW_DOWN,
  1849. &fw_down_data);
  1850. }
  1851. goto out;
  1852. }
  1853. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1854. priv->state, notif->crashed);
  1855. set_bit(ICNSS_FW_DOWN, &priv->state);
  1856. icnss_ignore_fw_timeout(true);
  1857. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1858. if (event_data == NULL)
  1859. return notifier_from_errno(-ENOMEM);
  1860. event_data->crashed = notif->crashed;
  1861. fw_down_data.crashed = !!notif->crashed;
  1862. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1863. clear_bit(ICNSS_FW_READY, &priv->state);
  1864. fw_down_data.crashed = !!notif->crashed;
  1865. icnss_call_driver_uevent(priv,
  1866. ICNSS_UEVENT_FW_DOWN,
  1867. &fw_down_data);
  1868. }
  1869. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1870. ICNSS_EVENT_SYNC, event_data);
  1871. if (notif->crashed)
  1872. mod_timer(&priv->recovery_timer,
  1873. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1874. out:
  1875. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1876. return NOTIFY_OK;
  1877. }
  1878. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1879. {
  1880. int ret = 0;
  1881. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1882. priv->wpss_early_notify_handler =
  1883. qcom_register_early_ssr_notifier("wpss",
  1884. &priv->wpss_early_ssr_nb);
  1885. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1886. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1887. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1888. }
  1889. return ret;
  1890. }
  1891. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1892. {
  1893. int ret = 0;
  1894. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1895. /*
  1896. * Assign priority of icnss wpss notifier callback over IPA
  1897. * modem notifier callback which is 0
  1898. */
  1899. priv->wpss_ssr_nb.priority = 1;
  1900. priv->wpss_notify_handler =
  1901. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1902. if (IS_ERR(priv->wpss_notify_handler)) {
  1903. ret = PTR_ERR(priv->wpss_notify_handler);
  1904. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1905. }
  1906. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1907. return ret;
  1908. }
  1909. #ifdef SLATE_MODULE_ENABLED
  1910. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1911. unsigned long code,
  1912. void *data)
  1913. {
  1914. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1915. slate_ssr_nb);
  1916. int ret = 0;
  1917. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1918. if (code == QCOM_SSR_AFTER_POWERUP) {
  1919. set_bit(ICNSS_SLATE_UP, &priv->state);
  1920. complete(&priv->slate_boot_complete);
  1921. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1922. priv->state);
  1923. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1924. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1925. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1926. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1927. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1928. priv->state);
  1929. goto skip_pdr;
  1930. }
  1931. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1932. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1933. if (ret < 0) {
  1934. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1935. ret, priv->state);
  1936. goto skip_pdr;
  1937. }
  1938. }
  1939. skip_pdr:
  1940. return NOTIFY_OK;
  1941. }
  1942. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1943. {
  1944. int ret = 0;
  1945. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1946. priv->slate_notify_handler =
  1947. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1948. if (IS_ERR(priv->slate_notify_handler)) {
  1949. ret = PTR_ERR(priv->slate_notify_handler);
  1950. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1951. }
  1952. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1953. return ret;
  1954. }
  1955. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1956. {
  1957. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1958. return 0;
  1959. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1960. &priv->slate_ssr_nb);
  1961. priv->slate_notify_handler = NULL;
  1962. return 0;
  1963. }
  1964. #else
  1965. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1966. {
  1967. return 0;
  1968. }
  1969. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1970. {
  1971. return 0;
  1972. }
  1973. #endif
  1974. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1975. {
  1976. int ret = 0;
  1977. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1978. /*
  1979. * Assign priority of icnss modem notifier callback over IPA
  1980. * modem notifier callback which is 0
  1981. */
  1982. priv->modem_ssr_nb.priority = 1;
  1983. priv->modem_notify_handler =
  1984. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1985. if (IS_ERR(priv->modem_notify_handler)) {
  1986. ret = PTR_ERR(priv->modem_notify_handler);
  1987. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1988. }
  1989. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1990. return ret;
  1991. }
  1992. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1993. {
  1994. if (IS_ERR(priv->wpss_early_notify_handler))
  1995. return;
  1996. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1997. &priv->wpss_early_ssr_nb);
  1998. priv->wpss_early_notify_handler = NULL;
  1999. }
  2000. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2001. {
  2002. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2003. return 0;
  2004. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2005. &priv->wpss_ssr_nb);
  2006. priv->wpss_notify_handler = NULL;
  2007. return 0;
  2008. }
  2009. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2010. {
  2011. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2012. return 0;
  2013. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2014. &priv->modem_ssr_nb);
  2015. priv->modem_notify_handler = NULL;
  2016. return 0;
  2017. }
  2018. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2019. {
  2020. struct icnss_priv *priv = priv_cb;
  2021. struct icnss_event_pd_service_down_data *event_data;
  2022. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2023. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2024. if (!priv)
  2025. return;
  2026. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2027. state, priv->state);
  2028. switch (state) {
  2029. case SERVREG_SERVICE_STATE_DOWN:
  2030. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2031. if (!event_data)
  2032. return;
  2033. event_data->crashed = true;
  2034. if (!priv->is_ssr) {
  2035. set_bit(ICNSS_PDR, &penv->state);
  2036. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2037. cause = ICNSS_HOST_ERROR;
  2038. priv->stats.recovery.pdr_host_error++;
  2039. } else {
  2040. cause = ICNSS_FW_CRASH;
  2041. priv->stats.recovery.pdr_fw_crash++;
  2042. }
  2043. } else if (priv->root_pd_shutdown) {
  2044. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2045. event_data->crashed = false;
  2046. }
  2047. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2048. priv->state, icnss_pdr_cause[cause]);
  2049. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2050. set_bit(ICNSS_FW_DOWN, &priv->state);
  2051. icnss_ignore_fw_timeout(true);
  2052. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2053. clear_bit(ICNSS_FW_READY, &priv->state);
  2054. fw_down_data.crashed = event_data->crashed;
  2055. icnss_call_driver_uevent(priv,
  2056. ICNSS_UEVENT_FW_DOWN,
  2057. &fw_down_data);
  2058. }
  2059. }
  2060. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2061. if (event_data->crashed)
  2062. mod_timer(&priv->recovery_timer,
  2063. jiffies +
  2064. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2065. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2066. ICNSS_EVENT_SYNC, event_data);
  2067. break;
  2068. case SERVREG_SERVICE_STATE_UP:
  2069. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2070. break;
  2071. default:
  2072. break;
  2073. }
  2074. return;
  2075. }
  2076. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2077. {
  2078. struct pdr_handle *handle = NULL;
  2079. struct pdr_service *service = NULL;
  2080. int err = 0;
  2081. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2082. if (IS_ERR_OR_NULL(handle)) {
  2083. err = PTR_ERR(handle);
  2084. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2085. goto out;
  2086. }
  2087. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2088. if (IS_ERR_OR_NULL(service)) {
  2089. err = PTR_ERR(service);
  2090. icnss_pr_err("Failed to add lookup, err %d", err);
  2091. goto out;
  2092. }
  2093. priv->pdr_handle = handle;
  2094. priv->pdr_service = service;
  2095. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2096. icnss_pr_info("PDR registration happened");
  2097. out:
  2098. return err;
  2099. }
  2100. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2101. {
  2102. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2103. return;
  2104. pdr_handle_release(priv->pdr_handle);
  2105. }
  2106. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2107. {
  2108. int ret = 0;
  2109. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2110. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2111. ret = PTR_ERR(priv->icnss_ramdump_class);
  2112. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2113. return ret;
  2114. }
  2115. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2116. ICNSS_RAMDUMP_NAME);
  2117. if (ret < 0) {
  2118. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2119. goto fail_alloc_major;
  2120. }
  2121. return 0;
  2122. fail_alloc_major:
  2123. class_destroy(priv->icnss_ramdump_class);
  2124. return ret;
  2125. }
  2126. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2127. {
  2128. int ret = 0;
  2129. struct icnss_ramdump_info *ramdump_info;
  2130. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2131. if (!ramdump_info)
  2132. return ERR_PTR(-ENOMEM);
  2133. if (!dev_name) {
  2134. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2135. return NULL;
  2136. }
  2137. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2138. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2139. if (ramdump_info->minor < 0) {
  2140. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2141. ramdump_info->minor);
  2142. ret = -ENODEV;
  2143. goto fail_out_of_minors;
  2144. }
  2145. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2146. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2147. ramdump_info->minor),
  2148. ramdump_info, ramdump_info->name);
  2149. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2150. ret = PTR_ERR(ramdump_info->dev);
  2151. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2152. ramdump_info->name, ret);
  2153. goto fail_device_create;
  2154. }
  2155. return (void *)ramdump_info;
  2156. fail_device_create:
  2157. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2158. fail_out_of_minors:
  2159. kfree(ramdump_info);
  2160. return ERR_PTR(ret);
  2161. }
  2162. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2163. {
  2164. int ret = 0;
  2165. if (!priv || !priv->pdev) {
  2166. icnss_pr_err("Platform priv or pdev is NULL\n");
  2167. return -EINVAL;
  2168. }
  2169. ret = icnss_ramdump_devnode_init(priv);
  2170. if (ret)
  2171. return ret;
  2172. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2173. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2174. icnss_pr_err("Failed to create msa0 dump device!");
  2175. return -ENOMEM;
  2176. }
  2177. if (priv->device_id == WCN6750_DEVICE_ID ||
  2178. priv->device_id == WCN6450_DEVICE_ID) {
  2179. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2180. ICNSS_M3_SEGMENT(
  2181. ICNSS_M3_SEGMENT_PHYAREG));
  2182. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2183. !priv->m3_dump_phyareg->dev) {
  2184. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2185. return -ENOMEM;
  2186. }
  2187. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2188. ICNSS_M3_SEGMENT(
  2189. ICNSS_M3_SEGMENT_PHYA));
  2190. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2191. !priv->m3_dump_phydbg->dev) {
  2192. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2193. return -ENOMEM;
  2194. }
  2195. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2196. ICNSS_M3_SEGMENT(
  2197. ICNSS_M3_SEGMENT_WMACREG));
  2198. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2199. !priv->m3_dump_wmac0reg->dev) {
  2200. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2201. return -ENOMEM;
  2202. }
  2203. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2204. ICNSS_M3_SEGMENT(
  2205. ICNSS_M3_SEGMENT_WCSSDBG));
  2206. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2207. !priv->m3_dump_wcssdbg->dev) {
  2208. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2209. return -ENOMEM;
  2210. }
  2211. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2212. ICNSS_M3_SEGMENT(
  2213. ICNSS_M3_SEGMENT_PHYAM3));
  2214. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2215. !priv->m3_dump_phyapdmem->dev) {
  2216. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2217. return -ENOMEM;
  2218. }
  2219. }
  2220. return 0;
  2221. }
  2222. static int icnss_enable_recovery(struct icnss_priv *priv)
  2223. {
  2224. int ret;
  2225. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2226. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2227. return 0;
  2228. }
  2229. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2230. icnss_pr_dbg("SSR disabled through module parameter\n");
  2231. goto enable_pdr;
  2232. }
  2233. ret = icnss_register_ramdump_devices(priv);
  2234. if (ret)
  2235. return ret;
  2236. if (priv->wpss_supported) {
  2237. icnss_wpss_early_ssr_register_notifier(priv);
  2238. icnss_wpss_ssr_register_notifier(priv);
  2239. return 0;
  2240. }
  2241. icnss_modem_ssr_register_notifier(priv);
  2242. if (priv->is_slate_rfa)
  2243. icnss_slate_ssr_register_notifier(priv);
  2244. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2245. icnss_pr_dbg("PDR disabled through module parameter\n");
  2246. return 0;
  2247. }
  2248. enable_pdr:
  2249. ret = icnss_pd_restart_enable(priv);
  2250. if (ret)
  2251. return ret;
  2252. return 0;
  2253. }
  2254. static int icnss_dev_id_match(struct icnss_priv *priv,
  2255. struct device_info *dev_info)
  2256. {
  2257. while (dev_info->device_id) {
  2258. if (priv->device_id == dev_info->device_id)
  2259. return 1;
  2260. dev_info++;
  2261. }
  2262. return 0;
  2263. }
  2264. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2265. unsigned long *thermal_state)
  2266. {
  2267. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2268. *thermal_state = icnss_tcdev->max_thermal_state;
  2269. return 0;
  2270. }
  2271. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2272. unsigned long *thermal_state)
  2273. {
  2274. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2275. *thermal_state = icnss_tcdev->curr_thermal_state;
  2276. return 0;
  2277. }
  2278. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2279. unsigned long thermal_state)
  2280. {
  2281. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2282. struct device *dev = &penv->pdev->dev;
  2283. int ret = 0;
  2284. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2285. return 0;
  2286. if (thermal_state > icnss_tcdev->max_thermal_state)
  2287. return -EINVAL;
  2288. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2289. thermal_state, icnss_tcdev->tcdev_id);
  2290. mutex_lock(&penv->tcdev_lock);
  2291. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2292. icnss_tcdev->tcdev_id);
  2293. if (!ret)
  2294. icnss_tcdev->curr_thermal_state = thermal_state;
  2295. mutex_unlock(&penv->tcdev_lock);
  2296. if (ret) {
  2297. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2298. ret, icnss_tcdev->tcdev_id);
  2299. return ret;
  2300. }
  2301. return 0;
  2302. }
  2303. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2304. .get_max_state = icnss_tcdev_get_max_state,
  2305. .get_cur_state = icnss_tcdev_get_cur_state,
  2306. .set_cur_state = icnss_tcdev_set_cur_state,
  2307. };
  2308. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2309. int tcdev_id)
  2310. {
  2311. struct icnss_priv *priv = dev_get_drvdata(dev);
  2312. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2313. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2314. struct device_node *dev_node;
  2315. int ret = 0;
  2316. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2317. if (!icnss_tcdev)
  2318. return -ENOMEM;
  2319. icnss_tcdev->tcdev_id = tcdev_id;
  2320. icnss_tcdev->max_thermal_state = max_state;
  2321. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2322. "qcom,icnss_cdev%d", tcdev_id);
  2323. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2324. if (!dev_node) {
  2325. icnss_pr_err("Failed to get cooling device node\n");
  2326. return -EINVAL;
  2327. }
  2328. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2329. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2330. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2331. dev_node,
  2332. cdev_node_name, icnss_tcdev,
  2333. &icnss_cooling_ops);
  2334. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2335. ret = PTR_ERR(icnss_tcdev->tcdev);
  2336. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2337. ret, icnss_tcdev->tcdev_id);
  2338. } else {
  2339. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2340. icnss_tcdev->tcdev_id);
  2341. list_add(&icnss_tcdev->tcdev_list,
  2342. &priv->icnss_tcdev_list);
  2343. }
  2344. } else {
  2345. icnss_pr_dbg("Cooling device registration not supported");
  2346. ret = -EOPNOTSUPP;
  2347. }
  2348. return ret;
  2349. }
  2350. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2351. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2352. {
  2353. struct icnss_priv *priv = dev_get_drvdata(dev);
  2354. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2355. while (!list_empty(&priv->icnss_tcdev_list)) {
  2356. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2357. struct icnss_thermal_cdev,
  2358. tcdev_list);
  2359. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2360. list_del(&icnss_tcdev->tcdev_list);
  2361. kfree(icnss_tcdev);
  2362. }
  2363. }
  2364. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2365. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2366. unsigned long *thermal_state,
  2367. int tcdev_id)
  2368. {
  2369. struct icnss_priv *priv = dev_get_drvdata(dev);
  2370. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2371. mutex_lock(&priv->tcdev_lock);
  2372. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2373. if (icnss_tcdev->tcdev_id != tcdev_id)
  2374. continue;
  2375. *thermal_state = icnss_tcdev->curr_thermal_state;
  2376. mutex_unlock(&priv->tcdev_lock);
  2377. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2378. icnss_tcdev->curr_thermal_state, tcdev_id);
  2379. return 0;
  2380. }
  2381. mutex_unlock(&priv->tcdev_lock);
  2382. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2383. return -EINVAL;
  2384. }
  2385. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2386. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2387. int cmd_len, void *cb_ctx,
  2388. int (*cb)(void *ctx, void *event, int event_len))
  2389. {
  2390. struct icnss_priv *priv = icnss_get_plat_priv();
  2391. int ret;
  2392. if (!priv)
  2393. return -ENODEV;
  2394. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2395. return -EINVAL;
  2396. priv->get_info_cb = cb;
  2397. priv->get_info_cb_ctx = cb_ctx;
  2398. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2399. if (ret) {
  2400. priv->get_info_cb = NULL;
  2401. priv->get_info_cb_ctx = NULL;
  2402. }
  2403. return ret;
  2404. }
  2405. EXPORT_SYMBOL(icnss_qmi_send);
  2406. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2407. struct module *owner, const char *mod_name)
  2408. {
  2409. int ret = 0;
  2410. struct icnss_priv *priv = icnss_get_plat_priv();
  2411. if (!priv || !priv->pdev) {
  2412. ret = -ENODEV;
  2413. goto out;
  2414. }
  2415. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2416. if (priv->ops) {
  2417. icnss_pr_err("Driver already registered\n");
  2418. ret = -EEXIST;
  2419. goto out;
  2420. }
  2421. if (!ops->dev_info) {
  2422. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2423. return -EINVAL;
  2424. }
  2425. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2426. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2427. ops->dev_info->name);
  2428. return -ENODEV;
  2429. }
  2430. if (!ops->probe || !ops->remove) {
  2431. ret = -EINVAL;
  2432. goto out;
  2433. }
  2434. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2435. 0, ops);
  2436. if (ret == -EINTR)
  2437. ret = 0;
  2438. out:
  2439. return ret;
  2440. }
  2441. EXPORT_SYMBOL(__icnss_register_driver);
  2442. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2443. {
  2444. int ret;
  2445. struct icnss_priv *priv = icnss_get_plat_priv();
  2446. if (!priv || !priv->pdev) {
  2447. ret = -ENODEV;
  2448. goto out;
  2449. }
  2450. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2451. if (!priv->ops) {
  2452. icnss_pr_err("Driver not registered\n");
  2453. ret = -ENOENT;
  2454. goto out;
  2455. }
  2456. ret = icnss_driver_event_post(priv,
  2457. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2458. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2459. out:
  2460. return ret;
  2461. }
  2462. EXPORT_SYMBOL(icnss_unregister_driver);
  2463. static struct icnss_msi_config msi_config_wcn6750 = {
  2464. .total_vectors = 28,
  2465. .total_users = 2,
  2466. .users = (struct icnss_msi_user[]) {
  2467. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2468. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2469. },
  2470. };
  2471. static struct icnss_msi_config msi_config_wcn6450 = {
  2472. .total_vectors = 10,
  2473. .total_users = 1,
  2474. .users = (struct icnss_msi_user[]) {
  2475. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2476. },
  2477. };
  2478. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2479. {
  2480. if (priv->device_id == WCN6750_DEVICE_ID)
  2481. priv->msi_config = &msi_config_wcn6750;
  2482. else
  2483. priv->msi_config = &msi_config_wcn6450;
  2484. return 0;
  2485. }
  2486. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2487. int *num_vectors, u32 *user_base_data,
  2488. u32 *base_vector)
  2489. {
  2490. struct icnss_priv *priv = dev_get_drvdata(dev);
  2491. struct icnss_msi_config *msi_config;
  2492. int idx;
  2493. if (!priv)
  2494. return -ENODEV;
  2495. msi_config = priv->msi_config;
  2496. if (!msi_config) {
  2497. icnss_pr_err("MSI is not supported.\n");
  2498. return -EINVAL;
  2499. }
  2500. for (idx = 0; idx < msi_config->total_users; idx++) {
  2501. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2502. *num_vectors = msi_config->users[idx].num_vectors;
  2503. *user_base_data = msi_config->users[idx].base_vector
  2504. + priv->msi_base_data;
  2505. *base_vector = msi_config->users[idx].base_vector;
  2506. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2507. user_name, *num_vectors, *user_base_data,
  2508. *base_vector);
  2509. return 0;
  2510. }
  2511. }
  2512. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2513. return -EINVAL;
  2514. }
  2515. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2516. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2517. {
  2518. struct icnss_priv *priv = dev_get_drvdata(dev);
  2519. int irq_num;
  2520. irq_num = priv->srng_irqs[vector];
  2521. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2522. irq_num, vector);
  2523. return irq_num;
  2524. }
  2525. EXPORT_SYMBOL(icnss_get_msi_irq);
  2526. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2527. u32 *msi_addr_high)
  2528. {
  2529. struct icnss_priv *priv = dev_get_drvdata(dev);
  2530. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2531. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2532. }
  2533. EXPORT_SYMBOL(icnss_get_msi_address);
  2534. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2535. irqreturn_t (*handler)(int, void *),
  2536. unsigned long flags, const char *name, void *ctx)
  2537. {
  2538. int ret = 0;
  2539. unsigned int irq;
  2540. struct ce_irq_list *irq_entry;
  2541. struct icnss_priv *priv = dev_get_drvdata(dev);
  2542. if (!priv || !priv->pdev) {
  2543. ret = -ENODEV;
  2544. goto out;
  2545. }
  2546. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2547. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2548. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2549. ret = -EINVAL;
  2550. goto out;
  2551. }
  2552. irq = priv->ce_irqs[ce_id];
  2553. irq_entry = &priv->ce_irq_list[ce_id];
  2554. if (irq_entry->handler || irq_entry->irq) {
  2555. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2556. irq, ce_id);
  2557. ret = -EEXIST;
  2558. goto out;
  2559. }
  2560. ret = request_irq(irq, handler, flags, name, ctx);
  2561. if (ret) {
  2562. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2563. irq, ce_id, ret);
  2564. goto out;
  2565. }
  2566. irq_entry->irq = irq;
  2567. irq_entry->handler = handler;
  2568. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2569. penv->stats.ce_irqs[ce_id].request++;
  2570. out:
  2571. return ret;
  2572. }
  2573. EXPORT_SYMBOL(icnss_ce_request_irq);
  2574. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2575. {
  2576. int ret = 0;
  2577. unsigned int irq;
  2578. struct ce_irq_list *irq_entry;
  2579. if (!penv || !penv->pdev || !dev) {
  2580. ret = -ENODEV;
  2581. goto out;
  2582. }
  2583. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2584. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2585. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2586. ret = -EINVAL;
  2587. goto out;
  2588. }
  2589. irq = penv->ce_irqs[ce_id];
  2590. irq_entry = &penv->ce_irq_list[ce_id];
  2591. if (!irq_entry->handler || !irq_entry->irq) {
  2592. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2593. ret = -EEXIST;
  2594. goto out;
  2595. }
  2596. free_irq(irq, ctx);
  2597. irq_entry->irq = 0;
  2598. irq_entry->handler = NULL;
  2599. penv->stats.ce_irqs[ce_id].free++;
  2600. out:
  2601. return ret;
  2602. }
  2603. EXPORT_SYMBOL(icnss_ce_free_irq);
  2604. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2605. {
  2606. unsigned int irq;
  2607. if (!penv || !penv->pdev || !dev) {
  2608. icnss_pr_err("Platform driver not initialized\n");
  2609. return;
  2610. }
  2611. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2612. penv->state);
  2613. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2614. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2615. return;
  2616. }
  2617. penv->stats.ce_irqs[ce_id].enable++;
  2618. irq = penv->ce_irqs[ce_id];
  2619. enable_irq(irq);
  2620. }
  2621. EXPORT_SYMBOL(icnss_enable_irq);
  2622. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2623. {
  2624. unsigned int irq;
  2625. if (!penv || !penv->pdev || !dev) {
  2626. icnss_pr_err("Platform driver not initialized\n");
  2627. return;
  2628. }
  2629. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2630. penv->state);
  2631. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2632. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2633. ce_id);
  2634. return;
  2635. }
  2636. irq = penv->ce_irqs[ce_id];
  2637. disable_irq(irq);
  2638. penv->stats.ce_irqs[ce_id].disable++;
  2639. }
  2640. EXPORT_SYMBOL(icnss_disable_irq);
  2641. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2642. {
  2643. char *fw_build_timestamp = NULL;
  2644. struct icnss_priv *priv = dev_get_drvdata(dev);
  2645. if (!priv) {
  2646. icnss_pr_err("Platform driver not initialized\n");
  2647. return -EINVAL;
  2648. }
  2649. info->v_addr = priv->mem_base_va;
  2650. info->p_addr = priv->mem_base_pa;
  2651. info->chip_id = priv->chip_info.chip_id;
  2652. info->chip_family = priv->chip_info.chip_family;
  2653. info->board_id = priv->board_id;
  2654. info->soc_id = priv->soc_id;
  2655. info->fw_version = priv->fw_version_info.fw_version;
  2656. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2657. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2658. strlcpy(info->fw_build_timestamp,
  2659. priv->fw_version_info.fw_build_timestamp,
  2660. WLFW_MAX_TIMESTAMP_LEN + 1);
  2661. strlcpy(info->fw_build_id, priv->fw_build_id,
  2662. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2663. return 0;
  2664. }
  2665. EXPORT_SYMBOL(icnss_get_soc_info);
  2666. int icnss_get_mhi_state(struct device *dev)
  2667. {
  2668. struct icnss_priv *priv = dev_get_drvdata(dev);
  2669. if (!priv) {
  2670. icnss_pr_err("Platform driver not initialized\n");
  2671. return -EINVAL;
  2672. }
  2673. if (!priv->mhi_state_info_va)
  2674. return -ENOMEM;
  2675. return ioread32(priv->mhi_state_info_va);
  2676. }
  2677. EXPORT_SYMBOL(icnss_get_mhi_state);
  2678. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2679. {
  2680. int ret;
  2681. struct icnss_priv *priv;
  2682. if (!dev)
  2683. return -ENODEV;
  2684. priv = dev_get_drvdata(dev);
  2685. if (!priv) {
  2686. icnss_pr_err("Platform driver not initialized\n");
  2687. return -EINVAL;
  2688. }
  2689. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2690. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2691. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2692. priv->state);
  2693. return -EINVAL;
  2694. }
  2695. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2696. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2697. if (ret)
  2698. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2699. ret, fw_log_mode);
  2700. return ret;
  2701. }
  2702. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2703. int icnss_force_wake_request(struct device *dev)
  2704. {
  2705. struct icnss_priv *priv;
  2706. if (!dev)
  2707. return -ENODEV;
  2708. priv = dev_get_drvdata(dev);
  2709. if (!priv) {
  2710. icnss_pr_err("Platform driver not initialized\n");
  2711. return -EINVAL;
  2712. }
  2713. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2714. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2715. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2716. priv->state);
  2717. return -EINVAL;
  2718. }
  2719. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2720. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2721. atomic_read(&priv->soc_wake_ref_count));
  2722. return 0;
  2723. }
  2724. icnss_pr_soc_wake("Calling SOC Wake request");
  2725. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2726. 0, NULL);
  2727. return 0;
  2728. }
  2729. EXPORT_SYMBOL(icnss_force_wake_request);
  2730. int icnss_force_wake_release(struct device *dev)
  2731. {
  2732. struct icnss_priv *priv;
  2733. if (!dev)
  2734. return -ENODEV;
  2735. priv = dev_get_drvdata(dev);
  2736. if (!priv) {
  2737. icnss_pr_err("Platform driver not initialized\n");
  2738. return -EINVAL;
  2739. }
  2740. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2741. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2742. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2743. priv->state);
  2744. return -EINVAL;
  2745. }
  2746. icnss_pr_soc_wake("Calling SOC Wake response");
  2747. if (atomic_read(&priv->soc_wake_ref_count) &&
  2748. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2749. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2750. atomic_read(&priv->soc_wake_ref_count));
  2751. return 0;
  2752. }
  2753. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2754. 0, NULL);
  2755. return 0;
  2756. }
  2757. EXPORT_SYMBOL(icnss_force_wake_release);
  2758. int icnss_is_device_awake(struct device *dev)
  2759. {
  2760. struct icnss_priv *priv = dev_get_drvdata(dev);
  2761. if (!priv) {
  2762. icnss_pr_err("Platform driver not initialized\n");
  2763. return -EINVAL;
  2764. }
  2765. return atomic_read(&priv->soc_wake_ref_count);
  2766. }
  2767. EXPORT_SYMBOL(icnss_is_device_awake);
  2768. int icnss_is_pci_ep_awake(struct device *dev)
  2769. {
  2770. struct icnss_priv *priv = dev_get_drvdata(dev);
  2771. if (!priv) {
  2772. icnss_pr_err("Platform driver not initialized\n");
  2773. return -EINVAL;
  2774. }
  2775. if (!priv->mhi_state_info_va)
  2776. return -ENOMEM;
  2777. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2778. }
  2779. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2780. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2781. uint32_t mem_type, uint32_t data_len,
  2782. uint8_t *output)
  2783. {
  2784. int ret = 0;
  2785. struct icnss_priv *priv = dev_get_drvdata(dev);
  2786. if (priv->magic != ICNSS_MAGIC) {
  2787. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2788. dev, priv, priv->magic);
  2789. return -EINVAL;
  2790. }
  2791. if (!output || data_len == 0
  2792. || data_len > WLFW_MAX_DATA_SIZE) {
  2793. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2794. output, data_len);
  2795. ret = -EINVAL;
  2796. goto out;
  2797. }
  2798. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2799. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2800. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2801. priv->state);
  2802. ret = -EINVAL;
  2803. goto out;
  2804. }
  2805. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2806. data_len, output);
  2807. out:
  2808. return ret;
  2809. }
  2810. EXPORT_SYMBOL(icnss_athdiag_read);
  2811. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2812. uint32_t mem_type, uint32_t data_len,
  2813. uint8_t *input)
  2814. {
  2815. int ret = 0;
  2816. struct icnss_priv *priv = dev_get_drvdata(dev);
  2817. if (priv->magic != ICNSS_MAGIC) {
  2818. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2819. dev, priv, priv->magic);
  2820. return -EINVAL;
  2821. }
  2822. if (!input || data_len == 0
  2823. || data_len > WLFW_MAX_DATA_SIZE) {
  2824. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2825. input, data_len);
  2826. ret = -EINVAL;
  2827. goto out;
  2828. }
  2829. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2830. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2831. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2832. priv->state);
  2833. ret = -EINVAL;
  2834. goto out;
  2835. }
  2836. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2837. data_len, input);
  2838. out:
  2839. return ret;
  2840. }
  2841. EXPORT_SYMBOL(icnss_athdiag_write);
  2842. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2843. enum icnss_driver_mode mode,
  2844. const char *host_version)
  2845. {
  2846. struct icnss_priv *priv = dev_get_drvdata(dev);
  2847. int temp = 0, ret = 0;
  2848. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2849. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2850. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2851. priv->state);
  2852. return -EINVAL;
  2853. }
  2854. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2855. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2856. priv->state);
  2857. return -EINVAL;
  2858. }
  2859. if (priv->wpss_supported &&
  2860. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2861. icnss_setup_dms_mac(priv);
  2862. if (priv->device_id == WCN6750_DEVICE_ID) {
  2863. if (!icnss_get_temperature(priv, &temp)) {
  2864. icnss_pr_dbg("Temperature: %d\n", temp);
  2865. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2866. icnss_set_wlan_en_delay(priv);
  2867. }
  2868. }
  2869. if (priv->device_id == WCN6450_DEVICE_ID)
  2870. icnss_hw_power_off(priv);
  2871. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2872. if (priv->device_id == WCN6450_DEVICE_ID)
  2873. icnss_hw_power_on(priv);
  2874. return ret;
  2875. }
  2876. EXPORT_SYMBOL(icnss_wlan_enable);
  2877. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2878. {
  2879. struct icnss_priv *priv = dev_get_drvdata(dev);
  2880. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2881. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2882. priv->state);
  2883. return 0;
  2884. }
  2885. return icnss_send_wlan_disable_to_fw(priv);
  2886. }
  2887. EXPORT_SYMBOL(icnss_wlan_disable);
  2888. bool icnss_is_qmi_disable(struct device *dev)
  2889. {
  2890. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2891. }
  2892. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2893. int icnss_get_ce_id(struct device *dev, int irq)
  2894. {
  2895. int i;
  2896. if (!penv || !penv->pdev || !dev)
  2897. return -ENODEV;
  2898. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2899. if (penv->ce_irqs[i] == irq)
  2900. return i;
  2901. }
  2902. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2903. return -EINVAL;
  2904. }
  2905. EXPORT_SYMBOL(icnss_get_ce_id);
  2906. int icnss_get_irq(struct device *dev, int ce_id)
  2907. {
  2908. int irq;
  2909. if (!penv || !penv->pdev || !dev)
  2910. return -ENODEV;
  2911. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2912. return -EINVAL;
  2913. irq = penv->ce_irqs[ce_id];
  2914. return irq;
  2915. }
  2916. EXPORT_SYMBOL(icnss_get_irq);
  2917. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2918. {
  2919. struct icnss_priv *priv = dev_get_drvdata(dev);
  2920. if (!priv) {
  2921. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2922. return NULL;
  2923. }
  2924. return priv->iommu_domain;
  2925. }
  2926. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2927. int icnss_smmu_map(struct device *dev,
  2928. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2929. {
  2930. struct icnss_priv *priv = dev_get_drvdata(dev);
  2931. int flag = IOMMU_READ | IOMMU_WRITE;
  2932. bool dma_coherent = false;
  2933. unsigned long iova;
  2934. int prop_len = 0;
  2935. size_t len;
  2936. int ret = 0;
  2937. if (!priv) {
  2938. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2939. dev, priv);
  2940. return -EINVAL;
  2941. }
  2942. if (!iova_addr) {
  2943. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2944. &paddr, size);
  2945. return -EINVAL;
  2946. }
  2947. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2948. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2949. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2950. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2951. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2952. iova,
  2953. &priv->smmu_iova_ipa_start,
  2954. priv->smmu_iova_ipa_len);
  2955. return -ENOMEM;
  2956. }
  2957. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2958. icnss_pr_dbg("dma-coherent is %s\n",
  2959. dma_coherent ? "enabled" : "disabled");
  2960. if (dma_coherent)
  2961. flag |= IOMMU_CACHE;
  2962. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2963. ret = iommu_map(priv->iommu_domain, iova,
  2964. rounddown(paddr, PAGE_SIZE), len,
  2965. flag);
  2966. if (ret) {
  2967. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2968. return ret;
  2969. }
  2970. priv->smmu_iova_ipa_current = iova + len;
  2971. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2972. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2973. return 0;
  2974. }
  2975. EXPORT_SYMBOL(icnss_smmu_map);
  2976. int icnss_smmu_unmap(struct device *dev,
  2977. uint32_t iova_addr, size_t size)
  2978. {
  2979. struct icnss_priv *priv = dev_get_drvdata(dev);
  2980. unsigned long iova;
  2981. size_t len, unmapped_len;
  2982. if (!priv) {
  2983. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2984. dev, priv);
  2985. return -EINVAL;
  2986. }
  2987. if (!iova_addr) {
  2988. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2989. size);
  2990. return -EINVAL;
  2991. }
  2992. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2993. PAGE_SIZE);
  2994. iova = rounddown(iova_addr, PAGE_SIZE);
  2995. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2996. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2997. iova,
  2998. &priv->smmu_iova_ipa_start,
  2999. priv->smmu_iova_ipa_len);
  3000. return -ENOMEM;
  3001. }
  3002. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3003. iova, len);
  3004. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3005. if (unmapped_len != len) {
  3006. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3007. return -EINVAL;
  3008. }
  3009. priv->smmu_iova_ipa_current = iova;
  3010. return 0;
  3011. }
  3012. EXPORT_SYMBOL(icnss_smmu_unmap);
  3013. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3014. {
  3015. return socinfo_get_serial_number();
  3016. }
  3017. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3018. int icnss_trigger_recovery(struct device *dev)
  3019. {
  3020. int ret = 0;
  3021. struct icnss_priv *priv = dev_get_drvdata(dev);
  3022. if (priv->magic != ICNSS_MAGIC) {
  3023. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3024. ret = -EINVAL;
  3025. goto out;
  3026. }
  3027. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3028. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3029. priv->state);
  3030. ret = -EPERM;
  3031. goto out;
  3032. }
  3033. if (priv->wpss_supported) {
  3034. icnss_pr_vdbg("Initiate Root PD restart");
  3035. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3036. ICNSS_SMP2P_OUT_POWER_SAVE);
  3037. if (!ret)
  3038. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3039. return ret;
  3040. }
  3041. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3042. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3043. priv->state);
  3044. ret = -EOPNOTSUPP;
  3045. goto out;
  3046. }
  3047. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3048. priv->state);
  3049. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3050. if (!ret)
  3051. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3052. out:
  3053. return ret;
  3054. }
  3055. EXPORT_SYMBOL(icnss_trigger_recovery);
  3056. int icnss_idle_shutdown(struct device *dev)
  3057. {
  3058. struct icnss_priv *priv = dev_get_drvdata(dev);
  3059. if (!priv) {
  3060. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3061. return -EINVAL;
  3062. }
  3063. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3064. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3065. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3066. return -EBUSY;
  3067. }
  3068. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3069. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3070. }
  3071. EXPORT_SYMBOL(icnss_idle_shutdown);
  3072. int icnss_idle_restart(struct device *dev)
  3073. {
  3074. struct icnss_priv *priv = dev_get_drvdata(dev);
  3075. if (!priv) {
  3076. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3077. return -EINVAL;
  3078. }
  3079. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3080. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3081. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3082. return -EBUSY;
  3083. }
  3084. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3085. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3086. }
  3087. EXPORT_SYMBOL(icnss_idle_restart);
  3088. int icnss_exit_power_save(struct device *dev)
  3089. {
  3090. struct icnss_priv *priv = dev_get_drvdata(dev);
  3091. icnss_pr_vdbg("Calling Exit Power Save\n");
  3092. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3093. !test_bit(ICNSS_MODE_ON, &priv->state))
  3094. return 0;
  3095. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3096. ICNSS_SMP2P_OUT_POWER_SAVE);
  3097. }
  3098. EXPORT_SYMBOL(icnss_exit_power_save);
  3099. int icnss_prevent_l1(struct device *dev)
  3100. {
  3101. struct icnss_priv *priv = dev_get_drvdata(dev);
  3102. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3103. !test_bit(ICNSS_MODE_ON, &priv->state))
  3104. return 0;
  3105. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3106. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3107. }
  3108. EXPORT_SYMBOL(icnss_prevent_l1);
  3109. void icnss_allow_l1(struct device *dev)
  3110. {
  3111. struct icnss_priv *priv = dev_get_drvdata(dev);
  3112. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3113. !test_bit(ICNSS_MODE_ON, &priv->state))
  3114. return;
  3115. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3116. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3117. }
  3118. EXPORT_SYMBOL(icnss_allow_l1);
  3119. void icnss_allow_recursive_recovery(struct device *dev)
  3120. {
  3121. struct icnss_priv *priv = dev_get_drvdata(dev);
  3122. priv->allow_recursive_recovery = true;
  3123. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3124. }
  3125. void icnss_disallow_recursive_recovery(struct device *dev)
  3126. {
  3127. struct icnss_priv *priv = dev_get_drvdata(dev);
  3128. priv->allow_recursive_recovery = false;
  3129. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3130. }
  3131. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3132. {
  3133. struct kobject *icnss_kobject;
  3134. int ret = 0;
  3135. atomic_set(&priv->is_shutdown, false);
  3136. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3137. if (!icnss_kobject) {
  3138. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3139. return -EINVAL;
  3140. }
  3141. priv->icnss_kobject = icnss_kobject;
  3142. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3143. if (ret) {
  3144. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3145. return ret;
  3146. }
  3147. return ret;
  3148. }
  3149. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3150. {
  3151. struct kobject *icnss_kobject;
  3152. icnss_kobject = priv->icnss_kobject;
  3153. if (icnss_kobject)
  3154. kobject_put(icnss_kobject);
  3155. }
  3156. static ssize_t qdss_tr_start_store(struct device *dev,
  3157. struct device_attribute *attr,
  3158. const char *buf, size_t count)
  3159. {
  3160. struct icnss_priv *priv = dev_get_drvdata(dev);
  3161. wlfw_qdss_trace_start(priv);
  3162. icnss_pr_dbg("Received QDSS start command\n");
  3163. return count;
  3164. }
  3165. static ssize_t qdss_tr_stop_store(struct device *dev,
  3166. struct device_attribute *attr,
  3167. const char *user_buf, size_t count)
  3168. {
  3169. struct icnss_priv *priv = dev_get_drvdata(dev);
  3170. u32 option = 0;
  3171. if (sscanf(user_buf, "%du", &option) != 1)
  3172. return -EINVAL;
  3173. wlfw_qdss_trace_stop(priv, option);
  3174. icnss_pr_dbg("Received QDSS stop command\n");
  3175. return count;
  3176. }
  3177. static ssize_t qdss_conf_download_store(struct device *dev,
  3178. struct device_attribute *attr,
  3179. const char *buf, size_t count)
  3180. {
  3181. struct icnss_priv *priv = dev_get_drvdata(dev);
  3182. icnss_wlfw_qdss_dnld_send_sync(priv);
  3183. icnss_pr_dbg("Received QDSS download config command\n");
  3184. return count;
  3185. }
  3186. static ssize_t hw_trc_override_store(struct device *dev,
  3187. struct device_attribute *attr,
  3188. const char *buf, size_t count)
  3189. {
  3190. struct icnss_priv *priv = dev_get_drvdata(dev);
  3191. int tmp = 0;
  3192. if (sscanf(buf, "%du", &tmp) != 1)
  3193. return -EINVAL;
  3194. priv->hw_trc_override = tmp;
  3195. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3196. return count;
  3197. }
  3198. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3199. {
  3200. struct icnss_priv *priv = icnss_get_plat_priv();
  3201. phandle rproc_phandle;
  3202. int ret;
  3203. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3204. &rproc_phandle)) {
  3205. icnss_pr_err("error reading rproc phandle\n");
  3206. return;
  3207. }
  3208. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3209. if (IS_ERR_OR_NULL(priv->rproc)) {
  3210. icnss_pr_err("rproc not found");
  3211. return;
  3212. }
  3213. ret = rproc_boot(priv->rproc);
  3214. if (ret) {
  3215. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3216. rproc_put(priv->rproc);
  3217. }
  3218. }
  3219. static ssize_t wpss_boot_store(struct device *dev,
  3220. struct device_attribute *attr,
  3221. const char *buf, size_t count)
  3222. {
  3223. struct icnss_priv *priv = dev_get_drvdata(dev);
  3224. int wpss_rproc = 0;
  3225. if (!priv->wpss_supported)
  3226. return count;
  3227. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3228. icnss_pr_err("Failed to read wpss rproc info");
  3229. return -EINVAL;
  3230. }
  3231. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3232. if (wpss_rproc == 1)
  3233. schedule_work(&wpss_loader);
  3234. else if (wpss_rproc == 0)
  3235. icnss_wpss_unload(priv);
  3236. return count;
  3237. }
  3238. static ssize_t wlan_en_delay_store(struct device *dev,
  3239. struct device_attribute *attr,
  3240. const char *buf, size_t count)
  3241. {
  3242. struct icnss_priv *priv = dev_get_drvdata(dev);
  3243. uint32_t wlan_en_delay = 0;
  3244. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3245. return count;
  3246. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3247. icnss_pr_err("Failed to read wlan_en_delay");
  3248. return -EINVAL;
  3249. }
  3250. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3251. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3252. return count;
  3253. }
  3254. static DEVICE_ATTR_WO(qdss_tr_start);
  3255. static DEVICE_ATTR_WO(qdss_tr_stop);
  3256. static DEVICE_ATTR_WO(qdss_conf_download);
  3257. static DEVICE_ATTR_WO(hw_trc_override);
  3258. static DEVICE_ATTR_WO(wpss_boot);
  3259. static DEVICE_ATTR_WO(wlan_en_delay);
  3260. static struct attribute *icnss_attrs[] = {
  3261. &dev_attr_qdss_tr_start.attr,
  3262. &dev_attr_qdss_tr_stop.attr,
  3263. &dev_attr_qdss_conf_download.attr,
  3264. &dev_attr_hw_trc_override.attr,
  3265. &dev_attr_wpss_boot.attr,
  3266. &dev_attr_wlan_en_delay.attr,
  3267. NULL,
  3268. };
  3269. static struct attribute_group icnss_attr_group = {
  3270. .attrs = icnss_attrs,
  3271. };
  3272. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3273. {
  3274. struct device *dev = &priv->pdev->dev;
  3275. int ret;
  3276. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3277. if (ret) {
  3278. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3279. ret);
  3280. goto out;
  3281. }
  3282. return 0;
  3283. out:
  3284. return ret;
  3285. }
  3286. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3287. {
  3288. sysfs_remove_link(kernel_kobj, "icnss");
  3289. }
  3290. static int icnss_sysfs_create(struct icnss_priv *priv)
  3291. {
  3292. int ret = 0;
  3293. ret = devm_device_add_group(&priv->pdev->dev,
  3294. &icnss_attr_group);
  3295. if (ret) {
  3296. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3297. ret);
  3298. goto out;
  3299. }
  3300. icnss_create_sysfs_link(priv);
  3301. ret = icnss_create_shutdown_sysfs(priv);
  3302. if (ret)
  3303. goto remove_icnss_group;
  3304. return 0;
  3305. remove_icnss_group:
  3306. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3307. out:
  3308. return ret;
  3309. }
  3310. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3311. {
  3312. icnss_destroy_shutdown_sysfs(priv);
  3313. icnss_remove_sysfs_link(priv);
  3314. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3315. }
  3316. static int icnss_resource_parse(struct icnss_priv *priv)
  3317. {
  3318. int ret = 0, i = 0;
  3319. struct platform_device *pdev = priv->pdev;
  3320. struct device *dev = &pdev->dev;
  3321. struct resource *res;
  3322. u32 int_prop;
  3323. ret = icnss_get_vreg(priv);
  3324. if (ret) {
  3325. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3326. goto out;
  3327. }
  3328. ret = icnss_get_clk(priv);
  3329. if (ret) {
  3330. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3331. goto put_vreg;
  3332. }
  3333. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3334. ret = icnss_get_psf_info(priv);
  3335. if (ret < 0)
  3336. goto out;
  3337. priv->psf_supported = true;
  3338. }
  3339. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3340. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3341. "membase");
  3342. if (!res) {
  3343. icnss_pr_err("Memory base not found in DT\n");
  3344. ret = -EINVAL;
  3345. goto put_clk;
  3346. }
  3347. priv->mem_base_pa = res->start;
  3348. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3349. resource_size(res));
  3350. if (!priv->mem_base_va) {
  3351. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3352. &priv->mem_base_pa);
  3353. ret = -EINVAL;
  3354. goto put_clk;
  3355. }
  3356. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3357. &priv->mem_base_pa,
  3358. priv->mem_base_va);
  3359. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3360. res = platform_get_resource(priv->pdev,
  3361. IORESOURCE_IRQ, i);
  3362. if (!res) {
  3363. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3364. ret = -ENODEV;
  3365. goto put_clk;
  3366. } else {
  3367. priv->ce_irqs[i] = res->start;
  3368. }
  3369. }
  3370. if (of_property_read_bool(pdev->dev.of_node,
  3371. "qcom,is_low_power")) {
  3372. priv->low_power_support = true;
  3373. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3374. }
  3375. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3376. &priv->rf_subtype) == 0) {
  3377. priv->is_rf_subtype_valid = true;
  3378. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3379. }
  3380. if (of_property_read_bool(pdev->dev.of_node,
  3381. "qcom,is_slate_rfa")) {
  3382. priv->is_slate_rfa = true;
  3383. icnss_pr_err("SLATE rfa is enabled\n");
  3384. }
  3385. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3386. priv->device_id == WCN6450_DEVICE_ID) {
  3387. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3388. "msi_addr");
  3389. if (!res) {
  3390. icnss_pr_err("MSI address not found in DT\n");
  3391. ret = -EINVAL;
  3392. goto put_clk;
  3393. }
  3394. priv->msi_addr_pa = res->start;
  3395. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3396. PAGE_SIZE,
  3397. DMA_FROM_DEVICE, 0);
  3398. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3399. icnss_pr_err("MSI: failed to map msi address\n");
  3400. priv->msi_addr_iova = 0;
  3401. ret = -ENOMEM;
  3402. goto put_clk;
  3403. }
  3404. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3405. &priv->msi_addr_pa,
  3406. priv->msi_addr_iova);
  3407. ret = of_property_read_u32_index(dev->of_node,
  3408. "interrupts",
  3409. 1,
  3410. &int_prop);
  3411. if (ret) {
  3412. icnss_pr_dbg("Read interrupt prop failed");
  3413. goto put_clk;
  3414. }
  3415. priv->msi_base_data = int_prop + 32;
  3416. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3417. priv->msi_base_data, int_prop);
  3418. icnss_get_msi_assignment(priv);
  3419. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3420. res = platform_get_resource(priv->pdev,
  3421. IORESOURCE_IRQ, i);
  3422. if (!res) {
  3423. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3424. ret = -ENODEV;
  3425. goto put_clk;
  3426. } else {
  3427. priv->srng_irqs[i] = res->start;
  3428. }
  3429. }
  3430. }
  3431. return 0;
  3432. put_clk:
  3433. icnss_put_clk(priv);
  3434. put_vreg:
  3435. icnss_put_vreg(priv);
  3436. out:
  3437. return ret;
  3438. }
  3439. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3440. {
  3441. int ret = 0;
  3442. struct platform_device *pdev = priv->pdev;
  3443. struct device *dev = &pdev->dev;
  3444. struct device_node *np = NULL;
  3445. u64 prop_size = 0;
  3446. const __be32 *addrp = NULL;
  3447. np = of_parse_phandle(dev->of_node,
  3448. "qcom,wlan-msa-fixed-region", 0);
  3449. if (np) {
  3450. addrp = of_get_address(np, 0, &prop_size, NULL);
  3451. if (!addrp) {
  3452. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3453. ret = -EINVAL;
  3454. of_node_put(np);
  3455. goto out;
  3456. }
  3457. priv->msa_pa = of_translate_address(np, addrp);
  3458. if (priv->msa_pa == OF_BAD_ADDR) {
  3459. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3460. ret = -EINVAL;
  3461. of_node_put(np);
  3462. goto out;
  3463. }
  3464. of_node_put(np);
  3465. priv->msa_va = memremap(priv->msa_pa,
  3466. (unsigned long)prop_size, MEMREMAP_WT);
  3467. if (!priv->msa_va) {
  3468. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3469. &priv->msa_pa);
  3470. ret = -EINVAL;
  3471. goto out;
  3472. }
  3473. priv->msa_mem_size = prop_size;
  3474. } else {
  3475. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3476. &priv->msa_mem_size);
  3477. if (ret || priv->msa_mem_size == 0) {
  3478. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3479. priv->msa_mem_size, ret);
  3480. goto out;
  3481. }
  3482. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3483. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3484. if (!priv->msa_va) {
  3485. icnss_pr_err("DMA alloc failed for MSA\n");
  3486. ret = -ENOMEM;
  3487. goto out;
  3488. }
  3489. }
  3490. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3491. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3492. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3493. "qcom,fw-prefix");
  3494. return 0;
  3495. out:
  3496. return ret;
  3497. }
  3498. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3499. struct device *dev, unsigned long iova,
  3500. int flags, void *handler_token)
  3501. {
  3502. struct icnss_priv *priv = handler_token;
  3503. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3504. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3505. if (!priv) {
  3506. icnss_pr_err("priv is NULL\n");
  3507. return -ENODEV;
  3508. }
  3509. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3510. fw_down_data.crashed = true;
  3511. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3512. &fw_down_data);
  3513. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3514. &fw_down_data);
  3515. }
  3516. icnss_trigger_recovery(&priv->pdev->dev);
  3517. /* IOMMU driver requires non-zero return value to print debug info. */
  3518. return -EINVAL;
  3519. }
  3520. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3521. {
  3522. int ret = 0;
  3523. struct platform_device *pdev = priv->pdev;
  3524. struct device *dev = &pdev->dev;
  3525. const char *iommu_dma_type;
  3526. struct resource *res;
  3527. u32 addr_win[2];
  3528. ret = of_property_read_u32_array(dev->of_node,
  3529. "qcom,iommu-dma-addr-pool",
  3530. addr_win,
  3531. ARRAY_SIZE(addr_win));
  3532. if (ret) {
  3533. icnss_pr_err("SMMU IOVA base not found\n");
  3534. } else {
  3535. priv->smmu_iova_start = addr_win[0];
  3536. priv->smmu_iova_len = addr_win[1];
  3537. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3538. &priv->smmu_iova_start,
  3539. priv->smmu_iova_len);
  3540. priv->iommu_domain =
  3541. iommu_get_domain_for_dev(&pdev->dev);
  3542. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3543. &iommu_dma_type);
  3544. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3545. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3546. priv->smmu_s1_enable = true;
  3547. if (priv->device_id == WCN6750_DEVICE_ID ||
  3548. priv->device_id == WCN6450_DEVICE_ID)
  3549. iommu_set_fault_handler(priv->iommu_domain,
  3550. icnss_smmu_fault_handler,
  3551. priv);
  3552. }
  3553. res = platform_get_resource_byname(pdev,
  3554. IORESOURCE_MEM,
  3555. "smmu_iova_ipa");
  3556. if (!res) {
  3557. icnss_pr_err("SMMU IOVA IPA not found\n");
  3558. } else {
  3559. priv->smmu_iova_ipa_start = res->start;
  3560. priv->smmu_iova_ipa_current = res->start;
  3561. priv->smmu_iova_ipa_len = resource_size(res);
  3562. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3563. &priv->smmu_iova_ipa_start,
  3564. priv->smmu_iova_ipa_len);
  3565. }
  3566. }
  3567. return 0;
  3568. }
  3569. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3570. {
  3571. if (!priv)
  3572. return -ENODEV;
  3573. if (!priv->smmu_iova_len)
  3574. return -EINVAL;
  3575. *addr = priv->smmu_iova_start;
  3576. *size = priv->smmu_iova_len;
  3577. return 0;
  3578. }
  3579. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3580. {
  3581. if (!priv)
  3582. return -ENODEV;
  3583. if (!priv->smmu_iova_ipa_len)
  3584. return -EINVAL;
  3585. *addr = priv->smmu_iova_ipa_start;
  3586. *size = priv->smmu_iova_ipa_len;
  3587. return 0;
  3588. }
  3589. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3590. char *name)
  3591. {
  3592. if (!priv)
  3593. return;
  3594. if (!priv->use_prefix_path) {
  3595. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3596. return;
  3597. }
  3598. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3599. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3600. ADRASTEA_PATH_PREFIX "%s", name);
  3601. else if (priv->device_id == WCN6750_DEVICE_ID)
  3602. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3603. QCA6750_PATH_PREFIX "%s", name);
  3604. else if (priv->device_id == WCN6450_DEVICE_ID)
  3605. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3606. WCN6450_PATH_PREFIX "%s", name);
  3607. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3608. }
  3609. static const struct platform_device_id icnss_platform_id_table[] = {
  3610. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3611. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3612. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3613. { },
  3614. };
  3615. static const struct of_device_id icnss_dt_match[] = {
  3616. {
  3617. .compatible = "qcom,wcn6750",
  3618. .data = (void *)&icnss_platform_id_table[0]},
  3619. {
  3620. .compatible = "qcom,icnss",
  3621. .data = (void *)&icnss_platform_id_table[1]},
  3622. {
  3623. .compatible = "qcom,wcn6450",
  3624. .data = (void *)&icnss_platform_id_table[2]},
  3625. { },
  3626. };
  3627. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3628. static void icnss_init_control_params(struct icnss_priv *priv)
  3629. {
  3630. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3631. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3632. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3633. if (priv->device_id == WCN6750_DEVICE_ID ||
  3634. of_property_read_bool(priv->pdev->dev.of_node,
  3635. "wpss-support-enable"))
  3636. priv->wpss_supported = true;
  3637. if (of_property_read_bool(priv->pdev->dev.of_node,
  3638. "bdf-download-support"))
  3639. priv->bdf_download_support = true;
  3640. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3641. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3642. }
  3643. static void icnss_read_device_configs(struct icnss_priv *priv)
  3644. {
  3645. if (of_property_read_bool(priv->pdev->dev.of_node,
  3646. "wlan-ipa-disabled")) {
  3647. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3648. }
  3649. if (of_property_read_bool(priv->pdev->dev.of_node,
  3650. "qcom,wpss-self-recovery"))
  3651. priv->wpss_self_recovery_enabled = true;
  3652. }
  3653. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3654. {
  3655. pm_runtime_get_sync(&priv->pdev->dev);
  3656. pm_runtime_forbid(&priv->pdev->dev);
  3657. pm_runtime_set_active(&priv->pdev->dev);
  3658. pm_runtime_enable(&priv->pdev->dev);
  3659. }
  3660. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3661. {
  3662. pm_runtime_disable(&priv->pdev->dev);
  3663. pm_runtime_allow(&priv->pdev->dev);
  3664. pm_runtime_put_sync(&priv->pdev->dev);
  3665. }
  3666. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3667. {
  3668. return of_property_read_bool(priv->pdev->dev.of_node,
  3669. "use-nv-mac");
  3670. }
  3671. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3672. {
  3673. struct icnss_subsys_restart_level_data *restart_level_data;
  3674. icnss_pr_info("rproc name: %s recovery disable: %d",
  3675. rproc->name, rproc->recovery_disabled);
  3676. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3677. if (!restart_level_data)
  3678. return;
  3679. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3680. if (rproc->recovery_disabled)
  3681. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3682. else
  3683. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3684. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3685. 0, restart_level_data);
  3686. }
  3687. }
  3688. #ifdef CONFIG_WCNSS_MEM_PRE_ALLOC
  3689. static void icnss_initialize_mem_pool(unsigned long device_id)
  3690. {
  3691. cnss_initialize_prealloc_pool(device_id);
  3692. }
  3693. static void icnss_deinitialize_mem_pool(void)
  3694. {
  3695. cnss_deinitialize_prealloc_pool();
  3696. }
  3697. #else
  3698. static void icnss_initialize_mem_pool(unsigned long device_id)
  3699. {
  3700. }
  3701. static void icnss_deinitialize_mem_pool(void)
  3702. {
  3703. }
  3704. #endif
  3705. static int icnss_probe(struct platform_device *pdev)
  3706. {
  3707. int ret = 0;
  3708. struct device *dev = &pdev->dev;
  3709. struct icnss_priv *priv;
  3710. const struct of_device_id *of_id;
  3711. const struct platform_device_id *device_id;
  3712. if (dev_get_drvdata(dev)) {
  3713. icnss_pr_err("Driver is already initialized\n");
  3714. return -EEXIST;
  3715. }
  3716. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3717. if (!of_id || !of_id->data) {
  3718. icnss_pr_err("Failed to find of match device!\n");
  3719. ret = -ENODEV;
  3720. goto out_reset_drvdata;
  3721. }
  3722. device_id = of_id->data;
  3723. icnss_pr_dbg("Platform driver probe\n");
  3724. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3725. if (!priv)
  3726. return -ENOMEM;
  3727. priv->magic = ICNSS_MAGIC;
  3728. dev_set_drvdata(dev, priv);
  3729. priv->pdev = pdev;
  3730. priv->device_id = device_id->driver_data;
  3731. priv->is_chain1_supported = true;
  3732. INIT_LIST_HEAD(&priv->vreg_list);
  3733. INIT_LIST_HEAD(&priv->clk_list);
  3734. icnss_allow_recursive_recovery(dev);
  3735. icnss_initialize_mem_pool(priv->device_id);
  3736. icnss_init_control_params(priv);
  3737. icnss_read_device_configs(priv);
  3738. ret = icnss_resource_parse(priv);
  3739. if (ret)
  3740. goto out_reset_drvdata;
  3741. ret = icnss_msa_dt_parse(priv);
  3742. if (ret)
  3743. goto out_free_resources;
  3744. ret = icnss_smmu_dt_parse(priv);
  3745. if (ret)
  3746. goto out_free_resources;
  3747. spin_lock_init(&priv->event_lock);
  3748. spin_lock_init(&priv->on_off_lock);
  3749. spin_lock_init(&priv->soc_wake_msg_lock);
  3750. mutex_init(&priv->dev_lock);
  3751. mutex_init(&priv->tcdev_lock);
  3752. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3753. if (!priv->event_wq) {
  3754. icnss_pr_err("Workqueue creation failed\n");
  3755. ret = -EFAULT;
  3756. goto smmu_cleanup;
  3757. }
  3758. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3759. INIT_LIST_HEAD(&priv->event_list);
  3760. if (priv->is_slate_rfa)
  3761. init_completion(&priv->slate_boot_complete);
  3762. ret = icnss_register_fw_service(priv);
  3763. if (ret < 0) {
  3764. icnss_pr_err("fw service registration failed: %d\n", ret);
  3765. goto out_destroy_wq;
  3766. }
  3767. icnss_enable_recovery(priv);
  3768. icnss_debugfs_create(priv);
  3769. icnss_sysfs_create(priv);
  3770. ret = device_init_wakeup(&priv->pdev->dev, true);
  3771. if (ret)
  3772. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3773. ret);
  3774. icnss_set_plat_priv(priv);
  3775. init_completion(&priv->unblock_shutdown);
  3776. if (priv->device_id == WCN6750_DEVICE_ID ||
  3777. priv->device_id == WCN6450_DEVICE_ID) {
  3778. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3779. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3780. if (!priv->soc_wake_wq) {
  3781. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3782. ret = -EFAULT;
  3783. goto out_unregister_fw_service;
  3784. }
  3785. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3786. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3787. ret = icnss_genl_init();
  3788. if (ret < 0)
  3789. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3790. init_completion(&priv->smp2p_soc_wake_wait);
  3791. icnss_runtime_pm_init(priv);
  3792. icnss_aop_mbox_init(priv);
  3793. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3794. priv->bdf_download_support = true;
  3795. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3796. }
  3797. if (priv->wpss_supported) {
  3798. ret = icnss_dms_init(priv);
  3799. if (ret)
  3800. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3801. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3802. icnss_pr_dbg("NV MAC feature is %s\n",
  3803. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3804. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3805. }
  3806. timer_setup(&priv->recovery_timer,
  3807. icnss_recovery_timeout_hdlr, 0);
  3808. if (priv->wpss_self_recovery_enabled) {
  3809. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3810. timer_setup(&priv->wpss_ssr_timer,
  3811. icnss_wpss_ssr_timeout_hdlr, 0);
  3812. }
  3813. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3814. icnss_pr_info("Platform driver probed successfully\n");
  3815. return 0;
  3816. out_unregister_fw_service:
  3817. icnss_unregister_fw_service(priv);
  3818. out_destroy_wq:
  3819. destroy_workqueue(priv->event_wq);
  3820. smmu_cleanup:
  3821. priv->iommu_domain = NULL;
  3822. out_free_resources:
  3823. icnss_put_resources(priv);
  3824. out_reset_drvdata:
  3825. icnss_deinitialize_mem_pool();
  3826. dev_set_drvdata(dev, NULL);
  3827. return ret;
  3828. }
  3829. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3830. {
  3831. if (IS_ERR_OR_NULL(ramdump_info))
  3832. return;
  3833. device_unregister(ramdump_info->dev);
  3834. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3835. kfree(ramdump_info);
  3836. }
  3837. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3838. {
  3839. if (priv->batt_psy)
  3840. power_supply_put(penv->batt_psy);
  3841. if (priv->psf_supported) {
  3842. flush_workqueue(priv->soc_update_wq);
  3843. destroy_workqueue(priv->soc_update_wq);
  3844. power_supply_unreg_notifier(&priv->psf_nb);
  3845. }
  3846. }
  3847. static int icnss_remove(struct platform_device *pdev)
  3848. {
  3849. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3850. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3851. del_timer(&priv->recovery_timer);
  3852. if (priv->wpss_self_recovery_enabled)
  3853. del_timer(&priv->wpss_ssr_timer);
  3854. device_init_wakeup(&priv->pdev->dev, false);
  3855. icnss_debugfs_destroy(priv);
  3856. icnss_unregister_power_supply_notifier(penv);
  3857. icnss_sysfs_destroy(priv);
  3858. complete_all(&priv->unblock_shutdown);
  3859. if (priv->is_slate_rfa)
  3860. icnss_slate_ssr_unregister_notifier(priv);
  3861. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3862. if (priv->wpss_supported) {
  3863. icnss_dms_deinit(priv);
  3864. icnss_wpss_early_ssr_unregister_notifier(priv);
  3865. icnss_wpss_ssr_unregister_notifier(priv);
  3866. } else {
  3867. icnss_modem_ssr_unregister_notifier(priv);
  3868. icnss_pdr_unregister_notifier(priv);
  3869. }
  3870. if (priv->device_id == WCN6750_DEVICE_ID ||
  3871. priv->device_id == WCN6450_DEVICE_ID) {
  3872. icnss_genl_exit();
  3873. icnss_runtime_pm_deinit(priv);
  3874. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3875. mbox_free_channel(priv->mbox_chan);
  3876. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3877. complete_all(&priv->smp2p_soc_wake_wait);
  3878. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3879. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3880. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3881. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3882. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3883. if (priv->soc_wake_wq)
  3884. destroy_workqueue(priv->soc_wake_wq);
  3885. }
  3886. class_destroy(priv->icnss_ramdump_class);
  3887. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3888. icnss_unregister_fw_service(priv);
  3889. if (priv->event_wq)
  3890. destroy_workqueue(priv->event_wq);
  3891. priv->iommu_domain = NULL;
  3892. icnss_hw_power_off(priv);
  3893. icnss_put_resources(priv);
  3894. icnss_deinitialize_mem_pool();
  3895. dev_set_drvdata(&pdev->dev, NULL);
  3896. return 0;
  3897. }
  3898. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3899. {
  3900. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3901. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3902. ICNSS_ASSERT(0);
  3903. }
  3904. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3905. {
  3906. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3907. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3908. priv->state);
  3909. schedule_work(&wpss_ssr_work);
  3910. }
  3911. #ifdef CONFIG_PM_SLEEP
  3912. static int icnss_pm_suspend(struct device *dev)
  3913. {
  3914. struct icnss_priv *priv = dev_get_drvdata(dev);
  3915. int ret = 0;
  3916. if (priv->magic != ICNSS_MAGIC) {
  3917. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3918. dev, priv, priv->magic);
  3919. return -EINVAL;
  3920. }
  3921. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3922. if (!priv->ops || !priv->ops->pm_suspend ||
  3923. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3924. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3925. return 0;
  3926. ret = priv->ops->pm_suspend(dev);
  3927. if (ret == 0) {
  3928. if (priv->device_id == WCN6750_DEVICE_ID ||
  3929. priv->device_id == WCN6450_DEVICE_ID) {
  3930. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3931. !test_bit(ICNSS_MODE_ON, &priv->state))
  3932. return 0;
  3933. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3934. ICNSS_SMP2P_OUT_POWER_SAVE);
  3935. }
  3936. priv->stats.pm_suspend++;
  3937. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3938. } else {
  3939. priv->stats.pm_suspend_err++;
  3940. }
  3941. return ret;
  3942. }
  3943. static int icnss_pm_resume(struct device *dev)
  3944. {
  3945. struct icnss_priv *priv = dev_get_drvdata(dev);
  3946. int ret = 0;
  3947. if (priv->magic != ICNSS_MAGIC) {
  3948. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3949. dev, priv, priv->magic);
  3950. return -EINVAL;
  3951. }
  3952. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3953. if (!priv->ops || !priv->ops->pm_resume ||
  3954. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3955. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3956. goto out;
  3957. ret = priv->ops->pm_resume(dev);
  3958. out:
  3959. if (ret == 0) {
  3960. priv->stats.pm_resume++;
  3961. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3962. } else {
  3963. priv->stats.pm_resume_err++;
  3964. }
  3965. return ret;
  3966. }
  3967. static int icnss_pm_suspend_noirq(struct device *dev)
  3968. {
  3969. struct icnss_priv *priv = dev_get_drvdata(dev);
  3970. int ret = 0;
  3971. if (priv->magic != ICNSS_MAGIC) {
  3972. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3973. dev, priv, priv->magic);
  3974. return -EINVAL;
  3975. }
  3976. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3977. if (!priv->ops || !priv->ops->suspend_noirq ||
  3978. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3979. goto out;
  3980. ret = priv->ops->suspend_noirq(dev);
  3981. out:
  3982. if (ret == 0) {
  3983. priv->stats.pm_suspend_noirq++;
  3984. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3985. } else {
  3986. priv->stats.pm_suspend_noirq_err++;
  3987. }
  3988. return ret;
  3989. }
  3990. static int icnss_pm_resume_noirq(struct device *dev)
  3991. {
  3992. struct icnss_priv *priv = dev_get_drvdata(dev);
  3993. int ret = 0;
  3994. if (priv->magic != ICNSS_MAGIC) {
  3995. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3996. dev, priv, priv->magic);
  3997. return -EINVAL;
  3998. }
  3999. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4000. if (!priv->ops || !priv->ops->resume_noirq ||
  4001. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4002. goto out;
  4003. ret = priv->ops->resume_noirq(dev);
  4004. out:
  4005. if (ret == 0) {
  4006. priv->stats.pm_resume_noirq++;
  4007. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4008. } else {
  4009. priv->stats.pm_resume_noirq_err++;
  4010. }
  4011. return ret;
  4012. }
  4013. static int icnss_pm_runtime_suspend(struct device *dev)
  4014. {
  4015. struct icnss_priv *priv = dev_get_drvdata(dev);
  4016. int ret = 0;
  4017. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4018. icnss_pr_err("Ignore runtime suspend:\n");
  4019. goto out;
  4020. }
  4021. if (priv->magic != ICNSS_MAGIC) {
  4022. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4023. dev, priv, priv->magic);
  4024. return -EINVAL;
  4025. }
  4026. if (!priv->ops || !priv->ops->runtime_suspend ||
  4027. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4028. goto out;
  4029. icnss_pr_vdbg("Runtime suspend\n");
  4030. ret = priv->ops->runtime_suspend(dev);
  4031. if (!ret) {
  4032. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4033. !test_bit(ICNSS_MODE_ON, &priv->state))
  4034. return 0;
  4035. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4036. ICNSS_SMP2P_OUT_POWER_SAVE);
  4037. }
  4038. out:
  4039. return ret;
  4040. }
  4041. static int icnss_pm_runtime_resume(struct device *dev)
  4042. {
  4043. struct icnss_priv *priv = dev_get_drvdata(dev);
  4044. int ret = 0;
  4045. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4046. icnss_pr_err("Ignore runtime resume\n");
  4047. goto out;
  4048. }
  4049. if (priv->magic != ICNSS_MAGIC) {
  4050. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4051. dev, priv, priv->magic);
  4052. return -EINVAL;
  4053. }
  4054. if (!priv->ops || !priv->ops->runtime_resume ||
  4055. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4056. goto out;
  4057. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4058. ret = priv->ops->runtime_resume(dev);
  4059. out:
  4060. return ret;
  4061. }
  4062. static int icnss_pm_runtime_idle(struct device *dev)
  4063. {
  4064. struct icnss_priv *priv = dev_get_drvdata(dev);
  4065. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4066. icnss_pr_err("Ignore runtime idle\n");
  4067. goto out;
  4068. }
  4069. icnss_pr_vdbg("Runtime idle\n");
  4070. pm_request_autosuspend(dev);
  4071. out:
  4072. return -EBUSY;
  4073. }
  4074. #endif
  4075. static const struct dev_pm_ops icnss_pm_ops = {
  4076. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4077. icnss_pm_resume)
  4078. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4079. icnss_pm_resume_noirq)
  4080. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4081. icnss_pm_runtime_idle)
  4082. };
  4083. static struct platform_driver icnss_driver = {
  4084. .probe = icnss_probe,
  4085. .remove = icnss_remove,
  4086. .driver = {
  4087. .name = "icnss2",
  4088. .pm = &icnss_pm_ops,
  4089. .of_match_table = icnss_dt_match,
  4090. },
  4091. };
  4092. static int __init icnss_initialize(void)
  4093. {
  4094. icnss_debug_init();
  4095. return platform_driver_register(&icnss_driver);
  4096. }
  4097. static void __exit icnss_exit(void)
  4098. {
  4099. platform_driver_unregister(&icnss_driver);
  4100. icnss_debug_deinit();
  4101. }
  4102. module_init(icnss_initialize);
  4103. module_exit(icnss_exit);
  4104. MODULE_LICENSE("GPL v2");
  4105. MODULE_DESCRIPTION("iWCN CORE platform driver");