dp_rx.c 39 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_nbuf.h"
  24. #include <ieee80211.h>
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #ifdef RX_DESC_DEBUG_CHECK
  31. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  32. {
  33. rx_desc->magic = DP_RX_DESC_MAGIC;
  34. rx_desc->nbuf = nbuf;
  35. }
  36. #else
  37. static inline void dp_rx_desc_prep(struct dp_rx_desc *rx_desc, qdf_nbuf_t nbuf)
  38. {
  39. rx_desc->nbuf = nbuf;
  40. }
  41. #endif
  42. /*
  43. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  44. * called during dp rx initialization
  45. * and at the end of dp_rx_process.
  46. *
  47. * @soc: core txrx main context
  48. * @mac_id: mac_id which is one of 3 mac_ids
  49. * @dp_rxdma_srng: dp rxdma circular ring
  50. * @rx_desc_pool: Poiter to free Rx descriptor pool
  51. * @num_req_buffers: number of buffer to be replenished
  52. * @desc_list: list of descs if called from dp_rx_process
  53. * or NULL during dp rx initialization or out of buffer
  54. * interrupt.
  55. * @tail: tail of descs list
  56. * @owner: who owns the nbuf (host, NSS etc...)
  57. * Return: return success or failure
  58. */
  59. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  60. struct dp_srng *dp_rxdma_srng,
  61. struct rx_desc_pool *rx_desc_pool,
  62. uint32_t num_req_buffers,
  63. union dp_rx_desc_list_elem_t **desc_list,
  64. union dp_rx_desc_list_elem_t **tail,
  65. uint8_t owner)
  66. {
  67. uint32_t num_alloc_desc;
  68. uint16_t num_desc_to_free = 0;
  69. struct dp_pdev *dp_pdev = dp_soc->pdev_list[mac_id];
  70. uint32_t num_entries_avail;
  71. uint32_t count;
  72. int sync_hw_ptr = 1;
  73. qdf_dma_addr_t paddr;
  74. qdf_nbuf_t rx_netbuf;
  75. void *rxdma_ring_entry;
  76. union dp_rx_desc_list_elem_t *next;
  77. QDF_STATUS ret;
  78. void *rxdma_srng;
  79. rxdma_srng = dp_rxdma_srng->hal_srng;
  80. if (!rxdma_srng) {
  81. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  82. "rxdma srng not initialized");
  83. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  84. return QDF_STATUS_E_FAILURE;
  85. }
  86. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  87. "requested %d buffers for replenish", num_req_buffers);
  88. /*
  89. * if desc_list is NULL, allocate the descs from freelist
  90. */
  91. if (!(*desc_list)) {
  92. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  93. rx_desc_pool,
  94. num_req_buffers,
  95. desc_list,
  96. tail);
  97. if (!num_alloc_desc) {
  98. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  99. "no free rx_descs in freelist");
  100. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  101. num_req_buffers);
  102. return QDF_STATUS_E_NOMEM;
  103. }
  104. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  105. "%d rx desc allocated", num_alloc_desc);
  106. num_req_buffers = num_alloc_desc;
  107. }
  108. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  109. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  110. rxdma_srng,
  111. sync_hw_ptr);
  112. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  113. "no of availble entries in rxdma ring: %d",
  114. num_entries_avail);
  115. if (num_entries_avail < num_req_buffers) {
  116. num_desc_to_free = num_req_buffers - num_entries_avail;
  117. num_req_buffers = num_entries_avail;
  118. }
  119. count = 0;
  120. while (count < num_req_buffers) {
  121. rx_netbuf = qdf_nbuf_alloc(dp_pdev->osif_pdev,
  122. RX_BUFFER_SIZE,
  123. RX_BUFFER_RESERVATION,
  124. RX_BUFFER_ALIGNMENT,
  125. FALSE);
  126. if (rx_netbuf == NULL) {
  127. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  128. continue;
  129. }
  130. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  131. QDF_DMA_BIDIRECTIONAL);
  132. if (ret == QDF_STATUS_E_FAILURE) {
  133. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  134. continue;
  135. }
  136. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  137. /*
  138. * check if the physical address of nbuf->data is
  139. * less then 0x50000000 then free the nbuf and try
  140. * allocating new nbuf. We can try for 100 times.
  141. * this is a temp WAR till we fix it properly.
  142. */
  143. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  144. if (ret == QDF_STATUS_E_FAILURE) {
  145. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  146. break;
  147. }
  148. count++;
  149. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  150. rxdma_srng);
  151. next = (*desc_list)->next;
  152. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  153. (*desc_list)->rx_desc.in_use = 1;
  154. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  155. "rx_netbuf=%p, buf=%p, paddr=0x%llx, cookie=%d\n",
  156. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  157. (unsigned long long)paddr, (*desc_list)->rx_desc.cookie);
  158. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  159. (*desc_list)->rx_desc.cookie,
  160. owner);
  161. *desc_list = next;
  162. }
  163. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  164. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  165. "successfully replenished %d buffers", num_req_buffers);
  166. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  167. "%d rx desc added back to free list", num_desc_to_free);
  168. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  169. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, num_req_buffers,
  170. (RX_BUFFER_SIZE * num_req_buffers));
  171. /*
  172. * add any available free desc back to the free list
  173. */
  174. if (*desc_list)
  175. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  176. mac_id, rx_desc_pool);
  177. return QDF_STATUS_SUCCESS;
  178. }
  179. /*
  180. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  181. * pkts to RAW mode simulation to
  182. * decapsulate the pkt.
  183. *
  184. * @vdev: vdev on which RAW mode is enabled
  185. * @nbuf_list: list of RAW pkts to process
  186. * @peer: peer object from which the pkt is rx
  187. *
  188. * Return: void
  189. */
  190. void
  191. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  192. struct dp_peer *peer)
  193. {
  194. qdf_nbuf_t deliver_list_head = NULL;
  195. qdf_nbuf_t deliver_list_tail = NULL;
  196. qdf_nbuf_t nbuf;
  197. nbuf = nbuf_list;
  198. while (nbuf) {
  199. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  200. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  201. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  202. /*
  203. * reset the chfrag_start and chfrag_end bits in nbuf cb
  204. * as this is a non-amsdu pkt and RAW mode simulation expects
  205. * these bit s to be 0 for non-amsdu pkt.
  206. */
  207. if (qdf_nbuf_is_chfrag_start(nbuf) &&
  208. qdf_nbuf_is_chfrag_end(nbuf)) {
  209. qdf_nbuf_set_chfrag_start(nbuf, 0);
  210. qdf_nbuf_set_chfrag_end(nbuf, 0);
  211. }
  212. nbuf = next;
  213. }
  214. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  215. &deliver_list_tail, (struct cdp_peer*) peer);
  216. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  217. }
  218. #ifdef DP_LFR
  219. /*
  220. * In case of LFR, data of a new peer might be sent up
  221. * even before peer is added.
  222. */
  223. static inline struct dp_vdev *
  224. dp_get_vdev_from_peer(struct dp_soc *soc,
  225. uint16_t peer_id,
  226. struct dp_peer *peer,
  227. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  228. {
  229. struct dp_vdev *vdev;
  230. uint8_t vdev_id;
  231. if (unlikely(!peer)) {
  232. if (peer_id != HTT_INVALID_PEER) {
  233. vdev_id = DP_PEER_METADATA_ID_GET(
  234. mpdu_desc_info.peer_meta_data);
  235. QDF_TRACE(QDF_MODULE_ID_DP,
  236. QDF_TRACE_LEVEL_ERROR,
  237. FL("PeerID %d not found use vdevID %d"),
  238. peer_id, vdev_id);
  239. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  240. vdev_id);
  241. } else {
  242. QDF_TRACE(QDF_MODULE_ID_DP,
  243. QDF_TRACE_LEVEL_ERROR,
  244. FL("Invalid PeerID %d"),
  245. peer_id);
  246. return NULL;
  247. }
  248. } else {
  249. vdev = peer->vdev;
  250. }
  251. return vdev;
  252. }
  253. /*
  254. * In case of LFR, this is an empty inline function
  255. */
  256. static inline void dp_rx_peer_validity_check(struct dp_peer *peer)
  257. {
  258. }
  259. #else
  260. static inline struct dp_vdev *
  261. dp_get_vdev_from_peer(struct dp_soc *soc,
  262. uint16_t peer_id,
  263. struct dp_peer *peer,
  264. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  265. {
  266. if (unlikely(!peer)) {
  267. QDF_TRACE(QDF_MODULE_ID_DP,
  268. QDF_TRACE_LEVEL_ERROR,
  269. FL("Peer not found for peerID %d"),
  270. peer_id);
  271. return NULL;
  272. } else {
  273. return peer->vdev;
  274. }
  275. }
  276. /*
  277. * Assert if PEER is NULL
  278. */
  279. static inline void dp_rx_peer_validity_check(struct dp_peer *peer)
  280. {
  281. qdf_assert_always(peer);
  282. }
  283. #endif
  284. /**
  285. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  286. *
  287. * @soc: core txrx main context
  288. * @sa_peer : source peer entry
  289. * @rx_tlv_hdr : start address of rx tlvs
  290. * @nbuf : nbuf that has to be intrabss forwarded
  291. *
  292. * Return: bool: true if it is forwarded else false
  293. */
  294. static bool
  295. dp_rx_intrabss_fwd(struct dp_soc *soc,
  296. struct dp_peer *sa_peer,
  297. uint8_t *rx_tlv_hdr,
  298. qdf_nbuf_t nbuf)
  299. {
  300. uint16_t da_idx;
  301. uint16_t len;
  302. struct dp_peer *da_peer;
  303. struct dp_ast_entry *ast_entry;
  304. qdf_nbuf_t nbuf_copy;
  305. /* check if the destination peer is available in peer table
  306. * and also check if the source peer and destination peer
  307. * belong to the same vap and destination peer is not bss peer.
  308. */
  309. if ((hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  310. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  311. da_idx = hal_rx_msdu_end_da_idx_get(rx_tlv_hdr);
  312. ast_entry = soc->ast_table[da_idx];
  313. if (!ast_entry)
  314. return false;
  315. da_peer = ast_entry->peer;
  316. if (!da_peer)
  317. return false;
  318. if (da_peer->vdev == sa_peer->vdev && !da_peer->bss_peer) {
  319. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  320. len = qdf_nbuf_len(nbuf);
  321. if (!dp_tx_send(sa_peer->vdev, nbuf)) {
  322. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.pkts,
  323. 1, len);
  324. return true;
  325. } else {
  326. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.fail, 1,
  327. len);
  328. return false;
  329. }
  330. }
  331. }
  332. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  333. * source, then clone the pkt and send the cloned pkt for
  334. * intra BSS forwarding and original pkt up the network stack
  335. * Note: how do we handle multicast pkts. do we forward
  336. * all multicast pkts as is or let a higher layer module
  337. * like igmpsnoop decide whether to forward or not with
  338. * Mcast enhancement.
  339. */
  340. else if (qdf_unlikely((hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  341. !sa_peer->bss_peer))) {
  342. nbuf_copy = qdf_nbuf_copy(nbuf);
  343. if (!nbuf_copy)
  344. return false;
  345. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  346. len = qdf_nbuf_len(nbuf_copy);
  347. if (dp_tx_send(sa_peer->vdev, nbuf_copy)) {
  348. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.fail, 1, len);
  349. qdf_nbuf_free(nbuf_copy);
  350. } else
  351. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.pkts, 1, len);
  352. }
  353. /* return false as we have to still send the original pkt
  354. * up the stack
  355. */
  356. return false;
  357. }
  358. #ifdef MESH_MODE_SUPPORT
  359. /**
  360. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  361. *
  362. * @vdev: DP Virtual device handle
  363. * @nbuf: Buffer pointer
  364. * @rx_tlv_hdr: start of rx tlv header
  365. * @peer: pointer to peer
  366. *
  367. * This function allocated memory for mesh receive stats and fill the
  368. * required stats. Stores the memory address in skb cb.
  369. *
  370. * Return: void
  371. */
  372. static
  373. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  374. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  375. {
  376. struct mesh_recv_hdr_s *rx_info = NULL;
  377. uint32_t pkt_type;
  378. uint32_t nss;
  379. uint32_t rate_mcs;
  380. uint32_t bw;
  381. /* fill recv mesh stats */
  382. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  383. /* upper layers are resposible to free this memory */
  384. if (rx_info == NULL) {
  385. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  386. "Memory allocation failed for mesh rx stats");
  387. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  388. return;
  389. }
  390. rx_info->rs_flags = MESH_RXHDR_VER1;
  391. if (qdf_nbuf_is_chfrag_start(nbuf))
  392. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  393. if (qdf_nbuf_is_chfrag_end(nbuf))
  394. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  395. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  396. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  397. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  398. if (vdev->osif_get_key)
  399. vdev->osif_get_key(vdev->osif_vdev,
  400. &rx_info->rs_decryptkey[0],
  401. &peer->mac_addr.raw[0],
  402. rx_info->rs_keyix);
  403. }
  404. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  405. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  406. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  407. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  408. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  409. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  410. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  411. (bw << 24);
  412. qdf_nbuf_set_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  413. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  414. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  415. rx_info->rs_flags,
  416. rx_info->rs_rssi,
  417. rx_info->rs_channel,
  418. rx_info->rs_ratephy1,
  419. rx_info->rs_keyix);
  420. }
  421. /**
  422. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  423. *
  424. * @vdev: DP Virtual device handle
  425. * @nbuf: Buffer pointer
  426. * @rx_tlv_hdr: start of rx tlv header
  427. *
  428. * This checks if the received packet is matching any filter out
  429. * catogery and and drop the packet if it matches.
  430. *
  431. * Return: status(0 indicates drop, 1 indicate to no drop)
  432. */
  433. static inline
  434. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  435. uint8_t *rx_tlv_hdr)
  436. {
  437. union dp_align_mac_addr mac_addr;
  438. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  439. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  440. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  441. return QDF_STATUS_SUCCESS;
  442. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  443. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  444. return QDF_STATUS_SUCCESS;
  445. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  446. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  447. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  448. return QDF_STATUS_SUCCESS;
  449. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  450. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  451. &mac_addr.raw[0]))
  452. return QDF_STATUS_E_FAILURE;
  453. if (!qdf_mem_cmp(&mac_addr.raw[0],
  454. &vdev->mac_addr.raw[0],
  455. DP_MAC_ADDR_LEN))
  456. return QDF_STATUS_SUCCESS;
  457. }
  458. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  459. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  460. &mac_addr.raw[0]))
  461. return QDF_STATUS_E_FAILURE;
  462. if (!qdf_mem_cmp(&mac_addr.raw[0],
  463. &vdev->mac_addr.raw[0],
  464. DP_MAC_ADDR_LEN))
  465. return QDF_STATUS_SUCCESS;
  466. }
  467. }
  468. return QDF_STATUS_E_FAILURE;
  469. }
  470. #else
  471. static
  472. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  473. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  474. {
  475. }
  476. static inline
  477. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  478. uint8_t *rx_tlv_hdr)
  479. {
  480. return QDF_STATUS_E_FAILURE;
  481. }
  482. #endif
  483. #ifdef CONFIG_WIN
  484. /**
  485. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  486. * clients
  487. * @pdev: DP pdev handle
  488. * @rx_pkt_hdr: Rx packet Header
  489. *
  490. * return: dp_vdev*
  491. */
  492. static
  493. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  494. uint8_t *rx_pkt_hdr)
  495. {
  496. struct ieee80211_frame *wh;
  497. struct dp_neighbour_peer *peer = NULL;
  498. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  499. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  500. return NULL;
  501. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  502. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  503. neighbour_peer_list_elem) {
  504. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  505. wh->i_addr2, DP_MAC_ADDR_LEN) == 0) {
  506. QDF_TRACE(
  507. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  508. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  509. peer->neighbour_peers_macaddr.raw[0],
  510. peer->neighbour_peers_macaddr.raw[1],
  511. peer->neighbour_peers_macaddr.raw[2],
  512. peer->neighbour_peers_macaddr.raw[3],
  513. peer->neighbour_peers_macaddr.raw[4],
  514. peer->neighbour_peers_macaddr.raw[5]);
  515. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  516. return pdev->monitor_vdev;
  517. }
  518. }
  519. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  520. return NULL;
  521. }
  522. /**
  523. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  524. * @soc: DP SOC handle
  525. * @mpdu: mpdu for which peer is invalid
  526. *
  527. * return: integer type
  528. */
  529. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  530. {
  531. struct dp_invalid_peer_msg msg;
  532. struct dp_vdev *vdev = NULL;
  533. struct dp_pdev *pdev = NULL;
  534. struct ieee80211_frame *wh;
  535. uint8_t i;
  536. uint8_t *rx_pkt_hdr;
  537. rx_pkt_hdr = hal_rx_pkt_hdr_get(qdf_nbuf_data(mpdu));
  538. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  539. if (!DP_FRAME_IS_DATA(wh)) {
  540. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  541. "NAWDS valid only for data frames");
  542. return 1;
  543. }
  544. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  545. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  546. "Invalid nbuf length");
  547. return 1;
  548. }
  549. for (i = 0; i < MAX_PDEV_CNT; i++) {
  550. pdev = soc->pdev_list[i];
  551. if (!pdev) {
  552. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  553. "PDEV not found");
  554. continue;
  555. }
  556. if (pdev->filter_neighbour_peers) {
  557. /* Next Hop scenario not yet handle */
  558. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  559. if (vdev) {
  560. dp_rx_mon_deliver(soc, i,
  561. soc->invalid_peer_head_msdu,
  562. soc->invalid_peer_tail_msdu);
  563. return 0;
  564. }
  565. }
  566. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  567. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  568. DP_MAC_ADDR_LEN) == 0) {
  569. goto out;
  570. }
  571. }
  572. }
  573. if (!vdev) {
  574. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  575. "VDEV not found");
  576. return 1;
  577. }
  578. out:
  579. msg.wh = wh;
  580. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  581. msg.nbuf = mpdu;
  582. msg.vdev_id = vdev->vdev_id;
  583. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  584. return pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  585. pdev->osif_pdev, &msg);
  586. return 0;
  587. }
  588. #else
  589. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  590. {
  591. return 0;
  592. }
  593. #endif
  594. #if defined(FEATURE_LRO)
  595. static void dp_rx_print_lro_info(uint8_t *rx_tlv)
  596. {
  597. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  598. FL("----------------------RX DESC LRO----------------------\n"));
  599. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  600. FL("lro_eligible 0x%x"), HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  601. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  602. FL("pure_ack 0x%x"), HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  603. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  604. FL("chksum 0x%x"), HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  605. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  606. FL("TCP seq num 0x%x"), HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  607. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  608. FL("TCP ack num 0x%x"), HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  609. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  610. FL("TCP window 0x%x"), HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  611. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  612. FL("TCP protocol 0x%x"), HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  613. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  614. FL("TCP offset 0x%x"), HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  615. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  616. FL("toeplitz 0x%x"), HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  617. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  618. FL("---------------------------------------------------------\n"));
  619. }
  620. /**
  621. * dp_rx_lro() - LRO related processing
  622. * @rx_tlv: TLV data extracted from the rx packet
  623. * @peer: destination peer of the msdu
  624. * @msdu: network buffer
  625. * @ctx: LRO context
  626. *
  627. * This function performs the LRO related processing of the msdu
  628. *
  629. * Return: true: LRO enabled false: LRO is not enabled
  630. */
  631. static void dp_rx_lro(uint8_t *rx_tlv, struct dp_peer *peer,
  632. qdf_nbuf_t msdu, qdf_lro_ctx_t ctx)
  633. {
  634. if (!peer || !peer->vdev || !peer->vdev->lro_enable) {
  635. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  636. FL("no peer, no vdev or LRO disabled"));
  637. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = 0;
  638. return;
  639. }
  640. qdf_assert(rx_tlv);
  641. dp_rx_print_lro_info(rx_tlv);
  642. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  643. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  644. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  645. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  646. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  647. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  648. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  649. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  650. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  651. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  652. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  653. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  654. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  655. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  656. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  657. HAL_RX_TLV_GET_IPV6(rx_tlv);
  658. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  659. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  660. QDF_NBUF_CB_RX_FLOW_ID_TOEPLITZ(msdu) =
  661. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  662. QDF_NBUF_CB_RX_LRO_CTX(msdu) = (unsigned char *)ctx;
  663. }
  664. #else
  665. static void dp_rx_lro(uint8_t *rx_tlv, struct dp_peer *peer,
  666. qdf_nbuf_t msdu, qdf_lro_ctx_t ctx)
  667. {
  668. }
  669. #endif
  670. static inline void dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  671. {
  672. if (*mpdu_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN))
  673. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  674. else
  675. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  676. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  677. }
  678. /**
  679. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  680. * multiple nbufs.
  681. * @nbuf: nbuf which can may be part of frag_list.
  682. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  683. * @mpdu_len: mpdu length.
  684. * @is_first_frag: is this the first nbuf in the fragmented MSDU.
  685. * @frag_list_len: length of all the fragments combined.
  686. * @head_frag_nbuf: parent nbuf
  687. * @frag_list_head: pointer to the first nbuf in the frag_list.
  688. * @frag_list_tail: pointer to the last nbuf in the frag_list.
  689. *
  690. * This function implements the creation of RX frag_list for cases
  691. * where an MSDU is spread across multiple nbufs.
  692. *
  693. */
  694. void dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  695. uint16_t *mpdu_len, bool *is_first_frag,
  696. uint16_t *frag_list_len, qdf_nbuf_t *head_frag_nbuf,
  697. qdf_nbuf_t *frag_list_head, qdf_nbuf_t *frag_list_tail)
  698. {
  699. if (qdf_unlikely(qdf_nbuf_is_chfrag_cont(nbuf))) {
  700. if (!(*is_first_frag)) {
  701. *is_first_frag = 1;
  702. qdf_nbuf_set_chfrag_start(nbuf, 1);
  703. *mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  704. dp_rx_adjust_nbuf_len(nbuf, mpdu_len);
  705. *head_frag_nbuf = nbuf;
  706. } else {
  707. dp_rx_adjust_nbuf_len(nbuf, mpdu_len);
  708. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  709. *frag_list_len += qdf_nbuf_len(nbuf);
  710. DP_RX_LIST_APPEND(*frag_list_head,
  711. *frag_list_tail,
  712. nbuf);
  713. }
  714. } else {
  715. if (qdf_unlikely(*is_first_frag)) {
  716. qdf_nbuf_set_chfrag_start(nbuf, 0);
  717. dp_rx_adjust_nbuf_len(nbuf, mpdu_len);
  718. qdf_nbuf_pull_head(nbuf,
  719. RX_PKT_TLVS_LEN);
  720. *frag_list_len += qdf_nbuf_len(nbuf);
  721. DP_RX_LIST_APPEND(*frag_list_head,
  722. *frag_list_tail,
  723. nbuf);
  724. qdf_nbuf_append_ext_list(*head_frag_nbuf,
  725. *frag_list_head,
  726. *frag_list_len);
  727. *is_first_frag = 0;
  728. return;
  729. }
  730. *head_frag_nbuf = nbuf;
  731. }
  732. }
  733. /**
  734. * dp_rx_process() - Brain of the Rx processing functionality
  735. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  736. * @soc: core txrx main context
  737. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  738. * @quota: No. of units (packets) that can be serviced in one shot.
  739. *
  740. * This function implements the core of Rx functionality. This is
  741. * expected to handle only non-error frames.
  742. *
  743. * Return: uint32_t: No. of elements processed
  744. */
  745. uint32_t
  746. dp_rx_process(struct dp_intr *int_ctx, void *hal_ring, uint32_t quota)
  747. {
  748. void *hal_soc;
  749. void *ring_desc;
  750. struct dp_rx_desc *rx_desc = NULL;
  751. qdf_nbuf_t nbuf;
  752. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  753. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  754. uint32_t rx_bufs_used = 0, rx_buf_cookie, l2_hdr_offset;
  755. uint16_t msdu_len;
  756. uint16_t peer_id;
  757. struct dp_peer *peer = NULL;
  758. struct dp_vdev *vdev = NULL;
  759. struct dp_vdev *vdev_list[WLAN_UMAC_PSOC_MAX_VDEVS] = { NULL };
  760. uint32_t pkt_len;
  761. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  762. struct hal_rx_msdu_desc_info msdu_desc_info;
  763. enum hal_reo_error_status error;
  764. uint32_t peer_mdata;
  765. uint8_t *rx_tlv_hdr;
  766. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  767. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  768. uint64_t vdev_map = 0;
  769. uint8_t mac_id;
  770. uint16_t i, vdev_cnt = 0;
  771. uint32_t ampdu_flag, amsdu_flag;
  772. struct ether_header *eh;
  773. struct dp_pdev *pdev;
  774. struct dp_srng *dp_rxdma_srng;
  775. struct rx_desc_pool *rx_desc_pool;
  776. struct dp_soc *soc = int_ctx->soc;
  777. uint8_t ring_id;
  778. uint8_t core_id;
  779. bool is_first_frag = 0;
  780. uint16_t mpdu_len = 0;
  781. qdf_nbuf_t head_frag_nbuf = NULL;
  782. qdf_nbuf_t frag_list_head = NULL;
  783. qdf_nbuf_t frag_list_tail = NULL;
  784. uint16_t frag_list_len = 0;
  785. DP_HIST_INIT();
  786. /* Debug -- Remove later */
  787. qdf_assert(soc && hal_ring);
  788. hal_soc = soc->hal_soc;
  789. /* Debug -- Remove later */
  790. qdf_assert(hal_soc);
  791. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  792. /*
  793. * Need API to convert from hal_ring pointer to
  794. * Ring Type / Ring Id combo
  795. */
  796. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  797. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  798. FL("HAL RING Access Failed -- %p"), hal_ring);
  799. hal_srng_access_end(hal_soc, hal_ring);
  800. goto done;
  801. }
  802. /*
  803. * start reaping the buffers from reo ring and queue
  804. * them in per vdev queue.
  805. * Process the received pkts in a different per vdev loop.
  806. */
  807. while (qdf_likely((ring_desc =
  808. hal_srng_dst_get_next(hal_soc, hal_ring))
  809. && quota)) {
  810. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  811. ring_id = hal_srng_ring_id_get(hal_ring);
  812. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  813. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  814. FL("HAL RING 0x%p:error %d"), hal_ring, error);
  815. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  816. /* Don't know how to deal with this -- assert */
  817. qdf_assert(0);
  818. }
  819. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  820. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  821. qdf_assert(rx_desc);
  822. rx_bufs_reaped[rx_desc->pool_id]++;
  823. /* TODO */
  824. /*
  825. * Need a separate API for unmapping based on
  826. * phyiscal address
  827. */
  828. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  829. QDF_DMA_BIDIRECTIONAL);
  830. core_id = smp_processor_id();
  831. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  832. /* Get MPDU DESC info */
  833. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  834. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  835. mpdu_desc_info.peer_meta_data);
  836. hal_rx_mpdu_peer_meta_data_set(qdf_nbuf_data(rx_desc->nbuf),
  837. mpdu_desc_info.peer_meta_data);
  838. peer = dp_peer_find_by_id(soc, peer_id);
  839. vdev = dp_get_vdev_from_peer(soc, peer_id, peer,
  840. mpdu_desc_info);
  841. if (!vdev) {
  842. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  843. FL("vdev is NULL"));
  844. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  845. qdf_nbuf_free(rx_desc->nbuf);
  846. goto fail;
  847. }
  848. if (!((vdev_map >> vdev->vdev_id) & 1)) {
  849. vdev_map |= 1 << vdev->vdev_id;
  850. vdev_list[vdev_cnt] = vdev;
  851. vdev_cnt++;
  852. }
  853. /* Get MSDU DESC info */
  854. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  855. /*
  856. * save msdu flags first, last and continuation msdu in
  857. * nbuf->cb
  858. */
  859. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  860. qdf_nbuf_set_chfrag_start(rx_desc->nbuf, 1);
  861. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  862. qdf_nbuf_set_chfrag_cont(rx_desc->nbuf, 1);
  863. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  864. qdf_nbuf_set_chfrag_end(rx_desc->nbuf, 1);
  865. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1,
  866. qdf_nbuf_len(rx_desc->nbuf));
  867. ampdu_flag = (mpdu_desc_info.mpdu_flags &
  868. HAL_MPDU_F_AMPDU_FLAG);
  869. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, ampdu_flag);
  870. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(ampdu_flag));
  871. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  872. amsdu_flag = ((msdu_desc_info.msdu_flags &
  873. HAL_MSDU_F_FIRST_MSDU_IN_MPDU) &&
  874. (msdu_desc_info.msdu_flags &
  875. HAL_MSDU_F_LAST_MSDU_IN_MPDU));
  876. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1,
  877. amsdu_flag);
  878. DP_STATS_INCC(peer, rx.amsdu_cnt, 1,
  879. !(amsdu_flag));
  880. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  881. qdf_nbuf_queue_add(&vdev->rxq, rx_desc->nbuf);
  882. fail:
  883. /*
  884. * if continuation bit is set then we have MSDU spread
  885. * across multiple buffers, let us not decrement quota
  886. * till we reap all buffers of that MSDU.
  887. */
  888. if (qdf_likely(!qdf_nbuf_is_chfrag_cont(rx_desc->nbuf)))
  889. quota -= 1;
  890. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  891. &tail[rx_desc->pool_id],
  892. rx_desc);
  893. }
  894. done:
  895. hal_srng_access_end(hal_soc, hal_ring);
  896. /* Update histogram statistics by looping through pdev's */
  897. DP_RX_HIST_STATS_PER_PDEV();
  898. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  899. /*
  900. * continue with next mac_id if no pkts were reaped
  901. * from that pool
  902. */
  903. if (!rx_bufs_reaped[mac_id])
  904. continue;
  905. pdev = soc->pdev_list[mac_id];
  906. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  907. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  908. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  909. rx_desc_pool, rx_bufs_reaped[mac_id],
  910. &head[mac_id], &tail[mac_id],
  911. HAL_RX_BUF_RBM_SW3_BM);
  912. }
  913. for (i = 0; i < vdev_cnt; i++) {
  914. qdf_nbuf_t deliver_list_head = NULL;
  915. qdf_nbuf_t deliver_list_tail = NULL;
  916. vdev = vdev_list[i];
  917. while ((nbuf = qdf_nbuf_queue_remove(&vdev->rxq))) {
  918. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  919. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  920. /*
  921. * Check if DMA completed -- msdu_done is the last bit
  922. * to be written
  923. */
  924. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  925. QDF_TRACE(QDF_MODULE_ID_DP,
  926. QDF_TRACE_LEVEL_ERROR,
  927. FL("MSDU DONE failure"));
  928. DP_STATS_INC(vdev->pdev, dropped.msdu_not_done,
  929. 1);
  930. hal_rx_dump_pkt_tlvs(rx_tlv_hdr,
  931. QDF_TRACE_LEVEL_INFO);
  932. qdf_assert(0);
  933. }
  934. /*
  935. * The below condition happens when an MSDU is spread
  936. * across multiple buffers. This can happen in two cases
  937. * 1. The nbuf size is smaller then the received msdu.
  938. * ex: we have set the nbuf size to 2048 during
  939. * nbuf_alloc. but we received an msdu which is
  940. * 2304 bytes in size then this msdu is spread
  941. * across 2 nbufs.
  942. *
  943. * 2. AMSDUs when RAW mode is enabled.
  944. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  945. * across 1st nbuf and 2nd nbuf and last MSDU is
  946. * spread across 2nd nbuf and 3rd nbuf.
  947. *
  948. * for these scenarios let us create a skb frag_list and
  949. * append these buffers till the last MSDU of the AMSDU
  950. */
  951. if (qdf_unlikely(vdev->rx_decap_type ==
  952. htt_cmn_pkt_type_raw)) {
  953. dp_rx_sg_create(nbuf, rx_tlv_hdr, &mpdu_len,
  954. &is_first_frag, &frag_list_len,
  955. &head_frag_nbuf,
  956. &frag_list_head,
  957. &frag_list_tail);
  958. if (is_first_frag)
  959. continue;
  960. else {
  961. nbuf = head_frag_nbuf;
  962. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  963. }
  964. }
  965. peer_mdata = hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr);
  966. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  967. peer = dp_peer_find_by_id(soc, peer_id);
  968. /*
  969. * This is a redundant sanity check, Ideally peer
  970. * should never be NULL here. if for any reason it
  971. * is NULL we will assert.
  972. * Do nothing for LFR case.
  973. */
  974. dp_rx_peer_validity_check(peer);
  975. if (qdf_unlikely(peer->bss_peer)) {
  976. QDF_TRACE(QDF_MODULE_ID_DP,
  977. QDF_TRACE_LEVEL_INFO,
  978. FL("received pkt with same src MAC"));
  979. DP_STATS_INC(vdev->pdev, dropped.mec, 1);
  980. /* Drop & free packet */
  981. qdf_nbuf_free(nbuf);
  982. /* Statistics */
  983. continue;
  984. }
  985. pdev = vdev->pdev;
  986. if (qdf_likely(
  987. !hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr)
  988. &&
  989. !hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr))) {
  990. qdf_nbuf_rx_cksum_t cksum = {0};
  991. cksum.l4_result =
  992. QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  993. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  994. }
  995. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  996. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  997. tid = hal_rx_mpdu_start_tid_get(rx_tlv_hdr);
  998. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  999. "%s: %d, SGI: %d, tid: %d",
  1000. __func__, __LINE__, sgi, tid);
  1001. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1002. reception_type = hal_rx_msdu_start_reception_type_get(
  1003. rx_tlv_hdr);
  1004. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  1005. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1006. DP_STATS_INC(vdev->pdev, rx.bw[bw], 1);
  1007. DP_STATS_INC(vdev->pdev,
  1008. rx.reception_type[reception_type], 1);
  1009. DP_STATS_INCC(vdev->pdev, rx.nss[nss], 1,
  1010. ((reception_type == REPT_MU_MIMO) ||
  1011. (reception_type == REPT_MU_OFDMA_MIMO))
  1012. );
  1013. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1014. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1015. hal_rx_mpdu_end_mic_err_get(
  1016. rx_tlv_hdr));
  1017. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1018. hal_rx_mpdu_end_decrypt_err_get(
  1019. rx_tlv_hdr));
  1020. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)],
  1021. 1);
  1022. DP_STATS_INC(peer, rx.bw[bw], 1);
  1023. DP_STATS_INC(peer, rx.reception_type[reception_type],
  1024. 1);
  1025. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1026. mcs_count[MAX_MCS], 1,
  1027. ((mcs >= MAX_MCS_11A) && (pkt_type
  1028. == DOT11_A)));
  1029. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1030. mcs_count[mcs], 1,
  1031. ((mcs <= MAX_MCS_11A) && (pkt_type
  1032. == DOT11_A)));
  1033. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1034. mcs_count[MAX_MCS], 1,
  1035. ((mcs >= MAX_MCS_11B)
  1036. && (pkt_type == DOT11_B)));
  1037. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1038. mcs_count[mcs], 1,
  1039. ((mcs <= MAX_MCS_11B)
  1040. && (pkt_type == DOT11_B)));
  1041. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1042. mcs_count[MAX_MCS], 1,
  1043. ((mcs >= MAX_MCS_11A)
  1044. && (pkt_type == DOT11_N)));
  1045. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1046. mcs_count[mcs], 1,
  1047. ((mcs <= MAX_MCS_11A)
  1048. && (pkt_type == DOT11_N)));
  1049. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1050. mcs_count[MAX_MCS], 1,
  1051. ((mcs >= MAX_MCS_11AC)
  1052. && (pkt_type == DOT11_AC)));
  1053. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1054. mcs_count[mcs], 1,
  1055. ((mcs <= MAX_MCS_11AC)
  1056. && (pkt_type == DOT11_AC)));
  1057. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1058. mcs_count[MAX_MCS], 1,
  1059. ((mcs >= (MAX_MCS-1))
  1060. && (pkt_type == DOT11_AX)));
  1061. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  1062. mcs_count[mcs], 1,
  1063. ((mcs <= (MAX_MCS-1))
  1064. && (pkt_type == DOT11_AX)));
  1065. /*
  1066. * HW structures call this L3 header padding --
  1067. * even though this is actually the offset from
  1068. * the buffer beginning where the L2 header
  1069. * begins.
  1070. */
  1071. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1072. FL("rxhash: flow id toeplitz: 0x%x\n"),
  1073. hal_rx_msdu_start_toeplitz_get(rx_tlv_hdr));
  1074. l2_hdr_offset =
  1075. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1076. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  1077. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1078. if (unlikely(qdf_nbuf_get_ext_list(nbuf)))
  1079. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1080. else {
  1081. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1082. qdf_nbuf_pull_head(nbuf,
  1083. RX_PKT_TLVS_LEN +
  1084. l2_hdr_offset);
  1085. }
  1086. if (qdf_unlikely(vdev->mesh_vdev)) {
  1087. if (dp_rx_filter_mesh_packets(vdev, nbuf,
  1088. rx_tlv_hdr)
  1089. == QDF_STATUS_SUCCESS) {
  1090. QDF_TRACE(QDF_MODULE_ID_DP,
  1091. QDF_TRACE_LEVEL_INFO_MED,
  1092. FL("mesh pkt filtered"));
  1093. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1094. 1);
  1095. qdf_nbuf_free(nbuf);
  1096. continue;
  1097. }
  1098. dp_rx_fill_mesh_stats(vdev, nbuf,
  1099. rx_tlv_hdr, peer);
  1100. }
  1101. #ifdef QCA_WIFI_NAPIER_EMULATION_DBG /* Debug code, remove later */
  1102. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1103. "p_id %d msdu_len %d hdr_off %d",
  1104. peer_id, msdu_len, l2_hdr_offset);
  1105. print_hex_dump(KERN_ERR,
  1106. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  1107. qdf_nbuf_data(nbuf), 128, false);
  1108. #endif /* NAPIER_EMULATION */
  1109. if (qdf_likely(vdev->rx_decap_type ==
  1110. htt_cmn_pkt_type_ethernet) &&
  1111. (qdf_likely(!vdev->mesh_vdev))) {
  1112. /* WDS Source Port Learning */
  1113. dp_rx_wds_srcport_learn(soc,
  1114. rx_tlv_hdr,
  1115. peer,
  1116. nbuf);
  1117. /* Intrabss-fwd */
  1118. if ((vdev->opmode != wlan_op_mode_sta) &&
  1119. !vdev->nawds_enabled)
  1120. if (dp_rx_intrabss_fwd(soc,
  1121. peer,
  1122. rx_tlv_hdr,
  1123. nbuf))
  1124. continue; /* Get next desc */
  1125. }
  1126. rx_bufs_used++;
  1127. dp_rx_lro(rx_tlv_hdr, peer, nbuf, int_ctx->lro_ctx);
  1128. DP_RX_LIST_APPEND(deliver_list_head,
  1129. deliver_list_tail,
  1130. nbuf);
  1131. DP_STATS_INCC_PKT(peer, rx.multicast, 1, pkt_len,
  1132. hal_rx_msdu_end_da_is_mcbc_get(
  1133. rx_tlv_hdr));
  1134. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1135. pkt_len);
  1136. if ((pdev->enhanced_stats_en) && likely(peer) &&
  1137. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1138. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  1139. soc->cdp_soc.ol_ops->update_dp_stats(
  1140. vdev->pdev->osif_pdev,
  1141. &peer->stats,
  1142. peer_id,
  1143. UPDATE_PEER_STATS);
  1144. dp_aggregate_vdev_stats(peer->vdev);
  1145. soc->cdp_soc.ol_ops->update_dp_stats(
  1146. vdev->pdev->osif_pdev,
  1147. &peer->vdev->stats,
  1148. peer->vdev->vdev_id,
  1149. UPDATE_VDEV_STATS);
  1150. }
  1151. }
  1152. }
  1153. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1154. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi))
  1155. dp_rx_deliver_raw(vdev, deliver_list_head, peer);
  1156. else if (qdf_likely(vdev->osif_rx) && deliver_list_head)
  1157. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  1158. }
  1159. return rx_bufs_used; /* Assume no scale factor for now */
  1160. }
  1161. /**
  1162. * dp_rx_detach() - detach dp rx
  1163. * @pdev: core txrx pdev context
  1164. *
  1165. * This function will detach DP RX into main device context
  1166. * will free DP Rx resources.
  1167. *
  1168. * Return: void
  1169. */
  1170. void
  1171. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1172. {
  1173. uint8_t pdev_id = pdev->pdev_id;
  1174. struct dp_soc *soc = pdev->soc;
  1175. struct rx_desc_pool *rx_desc_pool;
  1176. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1177. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  1178. qdf_spinlock_destroy(&soc->rx_desc_mutex[pdev_id]);
  1179. return;
  1180. }
  1181. /**
  1182. * dp_rx_attach() - attach DP RX
  1183. * @pdev: core txrx pdev context
  1184. *
  1185. * This function will attach a DP RX instance into the main
  1186. * device (SOC) context. Will allocate dp rx resource and
  1187. * initialize resources.
  1188. *
  1189. * Return: QDF_STATUS_SUCCESS: success
  1190. * QDF_STATUS_E_RESOURCES: Error return
  1191. */
  1192. QDF_STATUS
  1193. dp_rx_pdev_attach(struct dp_pdev *pdev)
  1194. {
  1195. uint8_t pdev_id = pdev->pdev_id;
  1196. struct dp_soc *soc = pdev->soc;
  1197. struct dp_srng rxdma_srng;
  1198. uint32_t rxdma_entries;
  1199. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1200. union dp_rx_desc_list_elem_t *tail = NULL;
  1201. struct dp_srng *dp_rxdma_srng;
  1202. struct rx_desc_pool *rx_desc_pool;
  1203. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  1204. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1205. "nss-wifi<4> skip Rx refil %d", pdev_id);
  1206. return QDF_STATUS_SUCCESS;
  1207. }
  1208. qdf_spinlock_create(&soc->rx_desc_mutex[pdev_id]);
  1209. pdev = soc->pdev_list[pdev_id];
  1210. rxdma_srng = pdev->rx_refill_buf_ring;
  1211. rxdma_entries = rxdma_srng.alloc_size/hal_srng_get_entrysize(
  1212. soc->hal_soc, RXDMA_BUF);
  1213. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1214. dp_rx_desc_pool_alloc(soc, pdev_id, rxdma_entries*3, rx_desc_pool);
  1215. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  1216. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1217. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng, rx_desc_pool,
  1218. rxdma_entries, &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  1219. return QDF_STATUS_SUCCESS;
  1220. }