main.c 135 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #include "smcinvoke.h"
  36. #include "smcinvoke_object.h"
  37. #include "IClientEnv.h"
  38. #define HW_STATE_UID 0x108
  39. #define HW_OP_GET_STATE 1
  40. #define HW_WIFI_UID 0x508
  41. #define FEATURE_NOT_SUPPORTED 12
  42. #define PERIPHERAL_NOT_FOUND 10
  43. #endif
  44. #define CNSS_DUMP_FORMAT_VER 0x11
  45. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  46. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  47. #define CNSS_DUMP_NAME "CNSS_WLAN"
  48. #define CNSS_DUMP_DESC_SIZE 0x1000
  49. #define CNSS_DUMP_SEG_VER 0x1
  50. #define FILE_SYSTEM_READY 1
  51. #define FW_READY_TIMEOUT 20000
  52. #define FW_ASSERT_TIMEOUT 5000
  53. #define CNSS_EVENT_PENDING 2989
  54. #define POWER_RESET_MIN_DELAY_MS 100
  55. #define CNSS_QUIRKS_DEFAULT 0
  56. #ifdef CONFIG_CNSS_EMULATION
  57. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  58. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  59. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  60. #else
  61. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  62. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  63. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  64. #endif
  65. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  66. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  67. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  69. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  70. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  71. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  72. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  73. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  74. #define CNSS_TIME_SYNC_PERIOD_INVALID 0xFFFFFFFF
  75. enum cnss_cal_db_op {
  76. CNSS_CAL_DB_UPLOAD,
  77. CNSS_CAL_DB_DOWNLOAD,
  78. CNSS_CAL_DB_INVALID_OP,
  79. };
  80. enum cnss_recovery_type {
  81. CNSS_WLAN_RECOVERY = 0x1,
  82. CNSS_PCSS_RECOVERY = 0x2,
  83. };
  84. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  85. #define CNSS_MAX_DEV_NUM 2
  86. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  87. static int plat_env_count;
  88. #else
  89. static struct cnss_plat_data *plat_env;
  90. #endif
  91. static bool cnss_allow_driver_loading;
  92. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  93. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  94. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  95. };
  96. static struct cnss_fw_files FW_FILES_DEFAULT = {
  97. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  98. "utfbd.bin", "epping.bin", "evicted.bin"
  99. };
  100. struct cnss_driver_event {
  101. struct list_head list;
  102. enum cnss_driver_event_type type;
  103. bool sync;
  104. struct completion complete;
  105. int ret;
  106. void *data;
  107. };
  108. bool cnss_check_driver_loading_allowed(void)
  109. {
  110. return cnss_allow_driver_loading;
  111. }
  112. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  113. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  114. struct cnss_plat_data *plat_priv)
  115. {
  116. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  117. if (plat_priv) {
  118. plat_priv->plat_idx = plat_env_count;
  119. plat_env[plat_priv->plat_idx] = plat_priv;
  120. plat_env_count++;
  121. }
  122. }
  123. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  124. *plat_dev)
  125. {
  126. int i;
  127. if (!plat_dev)
  128. return NULL;
  129. for (i = 0; i < plat_env_count; i++) {
  130. if (plat_env[i]->plat_dev == plat_dev)
  131. return plat_env[i];
  132. }
  133. return NULL;
  134. }
  135. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  136. *plat_dev)
  137. {
  138. int i;
  139. if (!plat_dev) {
  140. for (i = 0; i < plat_env_count; i++) {
  141. if (plat_env[i])
  142. return plat_env[i];
  143. }
  144. }
  145. return NULL;
  146. }
  147. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  148. {
  149. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  150. plat_env[plat_priv->plat_idx] = NULL;
  151. plat_env_count--;
  152. }
  153. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  154. {
  155. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  156. "wlan_%d", plat_priv->plat_idx);
  157. return 0;
  158. }
  159. static int cnss_plat_env_available(void)
  160. {
  161. int ret = 0;
  162. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  163. cnss_pr_err("ERROR: No space to store plat_priv\n");
  164. ret = -ENOMEM;
  165. }
  166. return ret;
  167. }
  168. int cnss_get_plat_env_count(void)
  169. {
  170. return plat_env_count;
  171. }
  172. struct cnss_plat_data *cnss_get_plat_env(int index)
  173. {
  174. return plat_env[index];
  175. }
  176. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  177. {
  178. int i;
  179. for (i = 0; i < plat_env_count; i++) {
  180. if (plat_env[i]->rc_num == rc_num)
  181. return plat_env[i];
  182. }
  183. return NULL;
  184. }
  185. static inline int
  186. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  187. {
  188. return of_property_read_u32(plat_priv->dev_node,
  189. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  190. }
  191. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  192. {
  193. int ret = 0;
  194. ret = cnss_get_qrtr_node_id(plat_priv);
  195. if (ret) {
  196. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  197. plat_priv->qrtr_node_id = 0;
  198. plat_priv->wlfw_service_instance_id = 0;
  199. } else {
  200. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  201. QRTR_NODE_FW_ID_BASE;
  202. cnss_pr_dbg("service_instance_id=0x%x\n",
  203. plat_priv->wlfw_service_instance_id);
  204. }
  205. }
  206. static inline int
  207. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  208. {
  209. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  210. "qcom,pld_bus_ops_name",
  211. &plat_priv->pld_bus_ops_name);
  212. }
  213. #else
  214. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  215. struct cnss_plat_data *plat_priv)
  216. {
  217. plat_env = plat_priv;
  218. }
  219. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  220. {
  221. return plat_env;
  222. }
  223. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  224. {
  225. plat_env = NULL;
  226. }
  227. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  228. {
  229. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  230. "wlan");
  231. return 0;
  232. }
  233. static int cnss_plat_env_available(void)
  234. {
  235. return 0;
  236. }
  237. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  238. {
  239. return cnss_bus_dev_to_plat_priv(NULL);
  240. }
  241. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  242. {
  243. }
  244. static int
  245. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  246. {
  247. return 0;
  248. }
  249. #endif
  250. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  251. {
  252. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  253. "qcom,sleep-clk-support");
  254. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  255. plat_priv->sleep_clk);
  256. }
  257. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  258. {
  259. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  260. "qcom,no-bwscale");
  261. }
  262. static inline int
  263. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  264. {
  265. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  266. "qcom,wlan-rc-num", &plat_priv->rc_num);
  267. }
  268. bool cnss_is_dual_wlan_enabled(void)
  269. {
  270. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  271. }
  272. /**
  273. * cnss_get_mem_seg_count - Get segment count of memory
  274. * @type: memory type
  275. * @seg: segment count
  276. *
  277. * Return: 0 on success, negative value on failure
  278. */
  279. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  280. {
  281. struct cnss_plat_data *plat_priv;
  282. plat_priv = cnss_get_plat_priv(NULL);
  283. if (!plat_priv)
  284. return -ENODEV;
  285. switch (type) {
  286. case CNSS_REMOTE_MEM_TYPE_FW:
  287. *seg = plat_priv->fw_mem_seg_len;
  288. break;
  289. case CNSS_REMOTE_MEM_TYPE_QDSS:
  290. *seg = plat_priv->qdss_mem_seg_len;
  291. break;
  292. default:
  293. return -EINVAL;
  294. }
  295. return 0;
  296. }
  297. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  298. /**
  299. * cnss_get_wifi_kobject -return wifi kobject
  300. * Return: Null, to maintain driver comnpatibilty
  301. */
  302. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  303. {
  304. struct cnss_plat_data *plat_priv;
  305. plat_priv = cnss_get_plat_priv(NULL);
  306. if (!plat_priv)
  307. return NULL;
  308. return plat_priv->wifi_kobj;
  309. }
  310. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  311. /**
  312. * cnss_get_mem_segment_info - Get memory info of different type
  313. * @type: memory type
  314. * @segment: array to save the segment info
  315. * @seg: segment count
  316. *
  317. * Return: 0 on success, negative value on failure
  318. */
  319. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  320. struct cnss_mem_segment segment[],
  321. u32 segment_count)
  322. {
  323. struct cnss_plat_data *plat_priv;
  324. u32 i;
  325. plat_priv = cnss_get_plat_priv(NULL);
  326. if (!plat_priv)
  327. return -ENODEV;
  328. switch (type) {
  329. case CNSS_REMOTE_MEM_TYPE_FW:
  330. if (segment_count > plat_priv->fw_mem_seg_len)
  331. segment_count = plat_priv->fw_mem_seg_len;
  332. for (i = 0; i < segment_count; i++) {
  333. segment[i].size = plat_priv->fw_mem[i].size;
  334. segment[i].va = plat_priv->fw_mem[i].va;
  335. segment[i].pa = plat_priv->fw_mem[i].pa;
  336. }
  337. break;
  338. case CNSS_REMOTE_MEM_TYPE_QDSS:
  339. if (segment_count > plat_priv->qdss_mem_seg_len)
  340. segment_count = plat_priv->qdss_mem_seg_len;
  341. for (i = 0; i < segment_count; i++) {
  342. segment[i].size = plat_priv->qdss_mem[i].size;
  343. segment[i].va = plat_priv->qdss_mem[i].va;
  344. segment[i].pa = plat_priv->qdss_mem[i].pa;
  345. }
  346. break;
  347. default:
  348. return -EINVAL;
  349. }
  350. return 0;
  351. }
  352. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  353. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  354. {
  355. struct device_node *audio_ion_node;
  356. struct platform_device *audio_ion_pdev;
  357. audio_ion_node = of_find_compatible_node(NULL, NULL,
  358. "qcom,msm-audio-ion");
  359. if (!audio_ion_node) {
  360. cnss_pr_err("Unable to get Audio ion node");
  361. return -EINVAL;
  362. }
  363. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  364. of_node_put(audio_ion_node);
  365. if (!audio_ion_pdev) {
  366. cnss_pr_err("Unable to get Audio ion platform device");
  367. return -EINVAL;
  368. }
  369. plat_priv->audio_iommu_domain =
  370. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  371. put_device(&audio_ion_pdev->dev);
  372. if (!plat_priv->audio_iommu_domain) {
  373. cnss_pr_err("Unable to get Audio ion iommu domain");
  374. return -EINVAL;
  375. }
  376. return 0;
  377. }
  378. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  379. enum cnss_feature_v01 feature)
  380. {
  381. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  382. return -EINVAL;
  383. plat_priv->feature_list |= 1 << feature;
  384. return 0;
  385. }
  386. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  387. enum cnss_feature_v01 feature)
  388. {
  389. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  390. return -EINVAL;
  391. plat_priv->feature_list &= ~(1 << feature);
  392. return 0;
  393. }
  394. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  395. u64 *feature_list)
  396. {
  397. if (unlikely(!plat_priv))
  398. return -EINVAL;
  399. *feature_list = plat_priv->feature_list;
  400. return 0;
  401. }
  402. size_t cnss_get_platform_name(struct cnss_plat_data *plat_priv,
  403. char *buf, const size_t buf_len)
  404. {
  405. if (unlikely(!plat_priv || !buf || !buf_len))
  406. return 0;
  407. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  408. "platform-name-required")) {
  409. struct device_node *root;
  410. root = of_find_node_by_path("/");
  411. if (root) {
  412. const char *model;
  413. size_t model_len;
  414. model = of_get_property(root, "model", NULL);
  415. if (model) {
  416. model_len = strlcpy(buf, model, buf_len);
  417. cnss_pr_dbg("Platform name: %s (%zu)\n",
  418. buf, model_len);
  419. return model_len;
  420. }
  421. }
  422. }
  423. return 0;
  424. }
  425. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  426. {
  427. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  428. return;
  429. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  430. plat_priv->driver_state,
  431. atomic_read(&plat_priv->pm_count));
  432. pm_stay_awake(&plat_priv->plat_dev->dev);
  433. }
  434. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  435. {
  436. int r = atomic_dec_return(&plat_priv->pm_count);
  437. WARN_ON(r < 0);
  438. if (r != 0)
  439. return;
  440. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  441. plat_priv->driver_state,
  442. atomic_read(&plat_priv->pm_count));
  443. pm_relax(&plat_priv->plat_dev->dev);
  444. }
  445. int cnss_get_fw_files_for_target(struct device *dev,
  446. struct cnss_fw_files *pfw_files,
  447. u32 target_type, u32 target_version)
  448. {
  449. if (!pfw_files)
  450. return -ENODEV;
  451. switch (target_version) {
  452. case QCA6174_REV3_VERSION:
  453. case QCA6174_REV3_2_VERSION:
  454. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  455. break;
  456. default:
  457. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  458. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  459. target_type, target_version);
  460. break;
  461. }
  462. return 0;
  463. }
  464. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  465. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  466. {
  467. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  468. if (!plat_priv)
  469. return -ENODEV;
  470. if (!cap)
  471. return -EINVAL;
  472. *cap = plat_priv->cap;
  473. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  474. return 0;
  475. }
  476. EXPORT_SYMBOL(cnss_get_platform_cap);
  477. /**
  478. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  479. * @dev: Device
  480. * @fw_cap: FW Capability which needs to be checked
  481. *
  482. * Return: TRUE if supported, FALSE on failure or if not supported
  483. */
  484. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  485. {
  486. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  487. bool is_supported = false;
  488. if (!plat_priv)
  489. return is_supported;
  490. if (!plat_priv->fw_caps)
  491. return is_supported;
  492. switch (fw_cap) {
  493. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  494. is_supported = !!(plat_priv->fw_caps &
  495. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  496. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  497. is_supported = false;
  498. break;
  499. default:
  500. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  501. }
  502. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  503. is_supported ? "supported" : "not supported");
  504. return is_supported;
  505. }
  506. EXPORT_SYMBOL(cnss_get_fw_cap);
  507. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  508. {
  509. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  510. if (!plat_priv)
  511. return;
  512. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  513. }
  514. EXPORT_SYMBOL(cnss_request_pm_qos);
  515. void cnss_remove_pm_qos(struct device *dev)
  516. {
  517. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  518. if (!plat_priv)
  519. return;
  520. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  521. }
  522. EXPORT_SYMBOL(cnss_remove_pm_qos);
  523. int cnss_wlan_enable(struct device *dev,
  524. struct cnss_wlan_enable_cfg *config,
  525. enum cnss_driver_mode mode,
  526. const char *host_version)
  527. {
  528. int ret = 0;
  529. struct cnss_plat_data *plat_priv;
  530. if (!dev) {
  531. cnss_pr_err("Invalid dev pointer\n");
  532. return -EINVAL;
  533. }
  534. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  535. if (!plat_priv)
  536. return -ENODEV;
  537. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  538. return 0;
  539. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  540. return 0;
  541. if (!config || !host_version) {
  542. cnss_pr_err("Invalid config or host_version pointer\n");
  543. return -EINVAL;
  544. }
  545. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  546. mode, config, host_version);
  547. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  548. goto skip_cfg;
  549. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  550. config->send_msi_ce = true;
  551. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  552. if (ret)
  553. goto out;
  554. skip_cfg:
  555. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  556. out:
  557. return ret;
  558. }
  559. EXPORT_SYMBOL(cnss_wlan_enable);
  560. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  561. {
  562. int ret = 0;
  563. struct cnss_plat_data *plat_priv;
  564. if (!dev) {
  565. cnss_pr_err("Invalid dev pointer\n");
  566. return -EINVAL;
  567. }
  568. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  569. if (!plat_priv)
  570. return -ENODEV;
  571. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  572. return 0;
  573. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  574. return 0;
  575. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  576. cnss_bus_free_qdss_mem(plat_priv);
  577. return ret;
  578. }
  579. EXPORT_SYMBOL(cnss_wlan_disable);
  580. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  581. dma_addr_t iova, size_t size)
  582. {
  583. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  584. uint32_t page_offset;
  585. if (!plat_priv)
  586. return -ENODEV;
  587. if (!plat_priv->audio_iommu_domain)
  588. return -EINVAL;
  589. page_offset = iova & (PAGE_SIZE - 1);
  590. if (page_offset + size > PAGE_SIZE)
  591. size += PAGE_SIZE;
  592. iova -= page_offset;
  593. paddr -= page_offset;
  594. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  595. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  596. IOMMU_CACHE);
  597. }
  598. EXPORT_SYMBOL(cnss_audio_smmu_map);
  599. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  600. {
  601. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  602. uint32_t page_offset;
  603. if (!plat_priv)
  604. return;
  605. if (!plat_priv->audio_iommu_domain)
  606. return;
  607. page_offset = iova & (PAGE_SIZE - 1);
  608. if (page_offset + size > PAGE_SIZE)
  609. size += PAGE_SIZE;
  610. iova -= page_offset;
  611. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  612. roundup(size, PAGE_SIZE));
  613. }
  614. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  615. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  616. u32 data_len, u8 *output)
  617. {
  618. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  619. int ret = 0;
  620. if (!plat_priv) {
  621. cnss_pr_err("plat_priv is NULL!\n");
  622. return -EINVAL;
  623. }
  624. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  625. return 0;
  626. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  627. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  628. plat_priv->driver_state);
  629. ret = -EINVAL;
  630. goto out;
  631. }
  632. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  633. data_len, output);
  634. out:
  635. return ret;
  636. }
  637. EXPORT_SYMBOL(cnss_athdiag_read);
  638. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  639. u32 data_len, u8 *input)
  640. {
  641. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  642. int ret = 0;
  643. if (!plat_priv) {
  644. cnss_pr_err("plat_priv is NULL!\n");
  645. return -EINVAL;
  646. }
  647. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  648. return 0;
  649. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  650. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  651. plat_priv->driver_state);
  652. ret = -EINVAL;
  653. goto out;
  654. }
  655. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  656. data_len, input);
  657. out:
  658. return ret;
  659. }
  660. EXPORT_SYMBOL(cnss_athdiag_write);
  661. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  662. {
  663. struct cnss_plat_data *plat_priv;
  664. if (!dev) {
  665. cnss_pr_err("Invalid dev pointer\n");
  666. return -EINVAL;
  667. }
  668. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  669. if (!plat_priv)
  670. return -ENODEV;
  671. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  672. return 0;
  673. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  674. }
  675. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  676. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  677. {
  678. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  679. if (!plat_priv)
  680. return -EINVAL;
  681. if (!plat_priv->fw_pcie_gen_switch) {
  682. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  683. return -EOPNOTSUPP;
  684. }
  685. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  686. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  687. return -EINVAL;
  688. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  689. plat_priv->pcie_gen_speed = pcie_gen_speed;
  690. return 0;
  691. }
  692. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  693. static bool cnss_is_aux_support_enabled(struct cnss_plat_data *plat_priv)
  694. {
  695. switch (plat_priv->device_id) {
  696. case PEACH_DEVICE_ID:
  697. if (!plat_priv->fw_aux_uc_support) {
  698. cnss_pr_dbg("FW does not support aux uc capability\n");
  699. return false;
  700. }
  701. break;
  702. default:
  703. cnss_pr_dbg("Host does not support aux uc capability\n");
  704. return false;
  705. }
  706. return true;
  707. }
  708. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  709. {
  710. int ret = 0;
  711. if (!plat_priv)
  712. return -ENODEV;
  713. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  714. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  715. if (ret)
  716. goto out;
  717. cnss_bus_load_tme_patch(plat_priv);
  718. cnss_wlfw_tme_patch_dnld_send_sync(plat_priv,
  719. WLFW_TME_LITE_PATCH_FILE_V01);
  720. if (plat_priv->hds_enabled)
  721. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  722. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  723. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  724. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  725. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  726. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  727. plat_priv->ctrl_params.bdf_type);
  728. if (ret)
  729. goto out;
  730. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  731. return 0;
  732. ret = cnss_bus_load_m3(plat_priv);
  733. if (ret)
  734. goto out;
  735. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  736. if (ret)
  737. goto out;
  738. if (cnss_is_aux_support_enabled(plat_priv)) {
  739. ret = cnss_bus_load_aux(plat_priv);
  740. if (ret)
  741. goto out;
  742. ret = cnss_wlfw_aux_dnld_send_sync(plat_priv);
  743. if (ret)
  744. goto out;
  745. }
  746. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  747. return 0;
  748. out:
  749. return ret;
  750. }
  751. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  752. {
  753. int ret = 0;
  754. if (!plat_priv->antenna) {
  755. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  756. if (ret)
  757. goto out;
  758. }
  759. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  760. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  761. if (ret)
  762. goto out;
  763. }
  764. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  765. if (ret)
  766. goto out;
  767. return 0;
  768. out:
  769. return ret;
  770. }
  771. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  772. {
  773. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  774. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  775. }
  776. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  777. {
  778. u32 i;
  779. int ret = 0;
  780. struct cnss_plat_ipc_daemon_config *cfg;
  781. ret = cnss_qmi_get_dms_mac(plat_priv);
  782. if (ret == 0 && plat_priv->dms.mac_valid)
  783. goto qmi_send;
  784. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  785. * Thus assert on failure to get MAC from DMS even after retries
  786. */
  787. if (plat_priv->use_nv_mac) {
  788. /* Check if Daemon says platform support DMS MAC provisioning */
  789. cfg = cnss_plat_ipc_qmi_daemon_config();
  790. if (cfg) {
  791. if (!cfg->dms_mac_addr_supported) {
  792. cnss_pr_err("DMS MAC address not supported\n");
  793. CNSS_ASSERT(0);
  794. return -EINVAL;
  795. }
  796. }
  797. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  798. if (plat_priv->dms.mac_valid)
  799. break;
  800. ret = cnss_qmi_get_dms_mac(plat_priv);
  801. if (ret == 0)
  802. break;
  803. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  804. }
  805. if (!plat_priv->dms.mac_valid) {
  806. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  807. CNSS_ASSERT(0);
  808. return -EINVAL;
  809. }
  810. }
  811. qmi_send:
  812. if (plat_priv->dms.mac_valid)
  813. ret =
  814. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  815. ARRAY_SIZE(plat_priv->dms.mac));
  816. return ret;
  817. }
  818. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  819. enum cnss_cal_db_op op, u32 *size)
  820. {
  821. int ret = 0;
  822. u32 timeout = cnss_get_timeout(plat_priv,
  823. CNSS_TIMEOUT_DAEMON_CONNECTION);
  824. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  825. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  826. if (op >= CNSS_CAL_DB_INVALID_OP)
  827. return -EINVAL;
  828. if (!plat_priv->cbc_file_download) {
  829. cnss_pr_info("CAL DB file not required as per BDF\n");
  830. return 0;
  831. }
  832. if (*size == 0) {
  833. cnss_pr_err("Invalid cal file size\n");
  834. return -EINVAL;
  835. }
  836. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  837. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  838. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  839. msecs_to_jiffies(timeout));
  840. if (!ret) {
  841. cnss_pr_err("Daemon not yet connected\n");
  842. CNSS_ASSERT(0);
  843. return ret;
  844. }
  845. }
  846. if (!plat_priv->cal_mem->va) {
  847. cnss_pr_err("CAL DB Memory not setup for FW\n");
  848. return -EINVAL;
  849. }
  850. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  851. if (op == CNSS_CAL_DB_DOWNLOAD) {
  852. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  853. ret = cnss_plat_ipc_qmi_file_download(client_id,
  854. CNSS_CAL_DB_FILE_NAME,
  855. plat_priv->cal_mem->va,
  856. size);
  857. } else {
  858. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  859. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  860. CNSS_CAL_DB_FILE_NAME,
  861. plat_priv->cal_mem->va,
  862. *size);
  863. }
  864. if (ret)
  865. cnss_pr_err("Cal DB file %s %s failure\n",
  866. CNSS_CAL_DB_FILE_NAME,
  867. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  868. else
  869. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  870. CNSS_CAL_DB_FILE_NAME,
  871. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  872. *size);
  873. return ret;
  874. }
  875. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  876. {
  877. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  878. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  879. return -EINVAL;
  880. }
  881. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  882. &plat_priv->cal_file_size);
  883. }
  884. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  885. u32 *cal_file_size)
  886. {
  887. /* To download pass the total size of cal DB mem allocated.
  888. * After cal file is download to mem, its size is updated in
  889. * return pointer
  890. */
  891. *cal_file_size = plat_priv->cal_mem->size;
  892. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  893. cal_file_size);
  894. }
  895. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  896. {
  897. int ret = 0;
  898. u32 cal_file_size = 0;
  899. if (!plat_priv)
  900. return -ENODEV;
  901. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  902. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  903. return -EINVAL;
  904. }
  905. cnss_pr_dbg("Processing FW Init Done..\n");
  906. del_timer(&plat_priv->fw_boot_timer);
  907. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  908. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  909. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  910. cnss_send_subsys_restart_level_msg(plat_priv);
  911. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  912. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  913. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  914. }
  915. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  916. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  917. CNSS_WALTEST);
  918. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  919. cnss_request_antenna_sharing(plat_priv);
  920. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  921. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  922. plat_priv->cal_time = jiffies;
  923. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  924. CNSS_CALIBRATION);
  925. } else {
  926. ret = cnss_setup_dms_mac(plat_priv);
  927. ret = cnss_bus_call_driver_probe(plat_priv);
  928. }
  929. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  930. goto out;
  931. else if (ret)
  932. goto shutdown;
  933. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  934. return 0;
  935. shutdown:
  936. cnss_bus_dev_shutdown(plat_priv);
  937. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  938. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  939. out:
  940. return ret;
  941. }
  942. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  943. {
  944. switch (type) {
  945. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  946. return "SERVER_ARRIVE";
  947. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  948. return "SERVER_EXIT";
  949. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  950. return "REQUEST_MEM";
  951. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  952. return "FW_MEM_READY";
  953. case CNSS_DRIVER_EVENT_FW_READY:
  954. return "FW_READY";
  955. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  956. return "COLD_BOOT_CAL_START";
  957. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  958. return "COLD_BOOT_CAL_DONE";
  959. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  960. return "REGISTER_DRIVER";
  961. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  962. return "UNREGISTER_DRIVER";
  963. case CNSS_DRIVER_EVENT_RECOVERY:
  964. return "RECOVERY";
  965. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  966. return "FORCE_FW_ASSERT";
  967. case CNSS_DRIVER_EVENT_POWER_UP:
  968. return "POWER_UP";
  969. case CNSS_DRIVER_EVENT_POWER_DOWN:
  970. return "POWER_DOWN";
  971. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  972. return "IDLE_RESTART";
  973. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  974. return "IDLE_SHUTDOWN";
  975. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  976. return "IMS_WFC_CALL_IND";
  977. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  978. return "WLFW_TWC_CFG_IND";
  979. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  980. return "QDSS_TRACE_REQ_MEM";
  981. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  982. return "FW_MEM_FILE_SAVE";
  983. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  984. return "QDSS_TRACE_FREE";
  985. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  986. return "QDSS_TRACE_REQ_DATA";
  987. case CNSS_DRIVER_EVENT_MAX:
  988. return "EVENT_MAX";
  989. }
  990. return "UNKNOWN";
  991. };
  992. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  993. enum cnss_driver_event_type type,
  994. u32 flags, void *data)
  995. {
  996. struct cnss_driver_event *event;
  997. unsigned long irq_flags;
  998. int gfp = GFP_KERNEL;
  999. int ret = 0;
  1000. if (!plat_priv)
  1001. return -ENODEV;
  1002. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  1003. cnss_driver_event_to_str(type), type,
  1004. flags ? "-sync" : "", plat_priv->driver_state, flags);
  1005. if (type >= CNSS_DRIVER_EVENT_MAX) {
  1006. cnss_pr_err("Invalid Event type: %d, can't post", type);
  1007. return -EINVAL;
  1008. }
  1009. if (in_interrupt() || irqs_disabled())
  1010. gfp = GFP_ATOMIC;
  1011. event = kzalloc(sizeof(*event), gfp);
  1012. if (!event)
  1013. return -ENOMEM;
  1014. cnss_pm_stay_awake(plat_priv);
  1015. event->type = type;
  1016. event->data = data;
  1017. init_completion(&event->complete);
  1018. event->ret = CNSS_EVENT_PENDING;
  1019. event->sync = !!(flags & CNSS_EVENT_SYNC);
  1020. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1021. list_add_tail(&event->list, &plat_priv->event_list);
  1022. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1023. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  1024. if (!(flags & CNSS_EVENT_SYNC))
  1025. goto out;
  1026. if (flags & CNSS_EVENT_UNKILLABLE)
  1027. wait_for_completion(&event->complete);
  1028. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  1029. ret = wait_for_completion_killable(&event->complete);
  1030. else
  1031. ret = wait_for_completion_interruptible(&event->complete);
  1032. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  1033. cnss_driver_event_to_str(type), type,
  1034. plat_priv->driver_state, ret, event->ret);
  1035. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1036. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  1037. event->sync = false;
  1038. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1039. ret = -EINTR;
  1040. goto out;
  1041. }
  1042. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1043. ret = event->ret;
  1044. kfree(event);
  1045. out:
  1046. cnss_pm_relax(plat_priv);
  1047. return ret;
  1048. }
  1049. /**
  1050. * cnss_get_timeout - Get timeout for corresponding type.
  1051. * @plat_priv: Pointer to platform driver context.
  1052. * @cnss_timeout_type: Timeout type.
  1053. *
  1054. * Return: Timeout in milliseconds.
  1055. */
  1056. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1057. enum cnss_timeout_type timeout_type)
  1058. {
  1059. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1060. switch (timeout_type) {
  1061. case CNSS_TIMEOUT_QMI:
  1062. return qmi_timeout;
  1063. case CNSS_TIMEOUT_POWER_UP:
  1064. return (qmi_timeout << 2);
  1065. case CNSS_TIMEOUT_IDLE_RESTART:
  1066. /* In idle restart power up sequence, we have fw_boot_timer to
  1067. * handle FW initialization failure.
  1068. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1069. * account for FW dump collection and FW re-initialization on
  1070. * retry.
  1071. */
  1072. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1073. case CNSS_TIMEOUT_CALIBRATION:
  1074. /* Similar to mission mode, in CBC if FW init fails
  1075. * fw recovery is tried. Thus return 2x the CBC timeout.
  1076. */
  1077. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1078. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1079. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1080. case CNSS_TIMEOUT_RDDM:
  1081. return CNSS_RDDM_TIMEOUT_MS;
  1082. case CNSS_TIMEOUT_RECOVERY:
  1083. return RECOVERY_TIMEOUT;
  1084. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1085. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1086. default:
  1087. return qmi_timeout;
  1088. }
  1089. }
  1090. unsigned int cnss_get_boot_timeout(struct device *dev)
  1091. {
  1092. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1093. if (!plat_priv) {
  1094. cnss_pr_err("plat_priv is NULL\n");
  1095. return 0;
  1096. }
  1097. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1098. }
  1099. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1100. int cnss_power_up(struct device *dev)
  1101. {
  1102. int ret = 0;
  1103. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1104. unsigned int timeout;
  1105. if (!plat_priv) {
  1106. cnss_pr_err("plat_priv is NULL\n");
  1107. return -ENODEV;
  1108. }
  1109. cnss_pr_dbg("Powering up device\n");
  1110. ret = cnss_driver_event_post(plat_priv,
  1111. CNSS_DRIVER_EVENT_POWER_UP,
  1112. CNSS_EVENT_SYNC, NULL);
  1113. if (ret)
  1114. goto out;
  1115. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1116. goto out;
  1117. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1118. reinit_completion(&plat_priv->power_up_complete);
  1119. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1120. msecs_to_jiffies(timeout));
  1121. if (!ret) {
  1122. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1123. timeout);
  1124. ret = -EAGAIN;
  1125. goto out;
  1126. }
  1127. return 0;
  1128. out:
  1129. return ret;
  1130. }
  1131. EXPORT_SYMBOL(cnss_power_up);
  1132. int cnss_power_down(struct device *dev)
  1133. {
  1134. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1135. if (!plat_priv) {
  1136. cnss_pr_err("plat_priv is NULL\n");
  1137. return -ENODEV;
  1138. }
  1139. cnss_pr_dbg("Powering down device\n");
  1140. return cnss_driver_event_post(plat_priv,
  1141. CNSS_DRIVER_EVENT_POWER_DOWN,
  1142. CNSS_EVENT_SYNC, NULL);
  1143. }
  1144. EXPORT_SYMBOL(cnss_power_down);
  1145. int cnss_idle_restart(struct device *dev)
  1146. {
  1147. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1148. unsigned int timeout;
  1149. int ret = 0;
  1150. if (!plat_priv) {
  1151. cnss_pr_err("plat_priv is NULL\n");
  1152. return -ENODEV;
  1153. }
  1154. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1155. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1156. return -EBUSY;
  1157. }
  1158. cnss_pr_dbg("Doing idle restart\n");
  1159. reinit_completion(&plat_priv->power_up_complete);
  1160. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1161. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1162. ret = -EINVAL;
  1163. goto out;
  1164. }
  1165. ret = cnss_driver_event_post(plat_priv,
  1166. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1167. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1168. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1169. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1170. else if (ret)
  1171. goto out;
  1172. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1173. ret = cnss_bus_call_driver_probe(plat_priv);
  1174. goto out;
  1175. }
  1176. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1177. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1178. msecs_to_jiffies(timeout));
  1179. if (plat_priv->power_up_error) {
  1180. ret = plat_priv->power_up_error;
  1181. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1182. cnss_pr_dbg("Power up error:%d, exiting\n",
  1183. plat_priv->power_up_error);
  1184. goto out;
  1185. }
  1186. if (!ret) {
  1187. /* This exception occurs after attempting retry of FW recovery.
  1188. * Thus we can safely power off the device.
  1189. */
  1190. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1191. timeout);
  1192. ret = -ETIMEDOUT;
  1193. cnss_power_down(dev);
  1194. CNSS_ASSERT(0);
  1195. goto out;
  1196. }
  1197. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1198. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1199. del_timer(&plat_priv->fw_boot_timer);
  1200. ret = -EINVAL;
  1201. goto out;
  1202. }
  1203. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1204. * non-DRV is supported only once after device reboots and before wifi
  1205. * is turned on. We do not allow switching back to DRV.
  1206. * To bring device back into DRV, user needs to reboot device.
  1207. */
  1208. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1209. cnss_pr_dbg("DRV is disabled\n");
  1210. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1211. }
  1212. mutex_unlock(&plat_priv->driver_ops_lock);
  1213. return 0;
  1214. out:
  1215. mutex_unlock(&plat_priv->driver_ops_lock);
  1216. return ret;
  1217. }
  1218. EXPORT_SYMBOL(cnss_idle_restart);
  1219. int cnss_idle_shutdown(struct device *dev)
  1220. {
  1221. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1222. if (!plat_priv) {
  1223. cnss_pr_err("plat_priv is NULL\n");
  1224. return -ENODEV;
  1225. }
  1226. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1227. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1228. return -EAGAIN;
  1229. }
  1230. cnss_pr_dbg("Doing idle shutdown\n");
  1231. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1232. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1233. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1234. return -EBUSY;
  1235. }
  1236. return cnss_driver_event_post(plat_priv,
  1237. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1238. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1239. }
  1240. EXPORT_SYMBOL(cnss_idle_shutdown);
  1241. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1242. {
  1243. int ret = 0;
  1244. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1245. if (ret < 0) {
  1246. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1247. goto out;
  1248. }
  1249. ret = cnss_get_clk(plat_priv);
  1250. if (ret) {
  1251. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1252. goto put_vreg;
  1253. }
  1254. ret = cnss_get_pinctrl(plat_priv);
  1255. if (ret) {
  1256. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1257. goto put_clk;
  1258. }
  1259. return 0;
  1260. put_clk:
  1261. cnss_put_clk(plat_priv);
  1262. put_vreg:
  1263. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1264. out:
  1265. return ret;
  1266. }
  1267. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1268. {
  1269. cnss_put_clk(plat_priv);
  1270. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1271. }
  1272. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1273. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1274. unsigned long code,
  1275. void *ss_handle)
  1276. {
  1277. struct cnss_plat_data *plat_priv =
  1278. container_of(nb, struct cnss_plat_data, modem_nb);
  1279. struct cnss_esoc_info *esoc_info;
  1280. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1281. if (!plat_priv)
  1282. return NOTIFY_DONE;
  1283. esoc_info = &plat_priv->esoc_info;
  1284. if (code == SUBSYS_AFTER_POWERUP)
  1285. esoc_info->modem_current_status = 1;
  1286. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1287. esoc_info->modem_current_status = 0;
  1288. else
  1289. return NOTIFY_DONE;
  1290. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1291. esoc_info->modem_current_status))
  1292. return NOTIFY_DONE;
  1293. return NOTIFY_OK;
  1294. }
  1295. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1296. {
  1297. int ret = 0;
  1298. struct device *dev;
  1299. struct cnss_esoc_info *esoc_info;
  1300. struct esoc_desc *esoc_desc;
  1301. const char *client_desc;
  1302. dev = &plat_priv->plat_dev->dev;
  1303. esoc_info = &plat_priv->esoc_info;
  1304. esoc_info->notify_modem_status =
  1305. of_property_read_bool(dev->of_node,
  1306. "qcom,notify-modem-status");
  1307. if (!esoc_info->notify_modem_status)
  1308. goto out;
  1309. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1310. &client_desc);
  1311. if (ret) {
  1312. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1313. } else {
  1314. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1315. if (IS_ERR_OR_NULL(esoc_desc)) {
  1316. ret = PTR_RET(esoc_desc);
  1317. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1318. ret);
  1319. goto out;
  1320. }
  1321. esoc_info->esoc_desc = esoc_desc;
  1322. }
  1323. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1324. esoc_info->modem_current_status = 0;
  1325. esoc_info->modem_notify_handler =
  1326. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1327. esoc_info->esoc_desc->name :
  1328. "modem", &plat_priv->modem_nb);
  1329. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1330. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1331. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1332. ret);
  1333. goto unreg_esoc;
  1334. }
  1335. return 0;
  1336. unreg_esoc:
  1337. if (esoc_info->esoc_desc)
  1338. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1339. out:
  1340. return ret;
  1341. }
  1342. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1343. {
  1344. struct device *dev;
  1345. struct cnss_esoc_info *esoc_info;
  1346. dev = &plat_priv->plat_dev->dev;
  1347. esoc_info = &plat_priv->esoc_info;
  1348. if (esoc_info->notify_modem_status)
  1349. subsys_notif_unregister_notifier
  1350. (esoc_info->modem_notify_handler,
  1351. &plat_priv->modem_nb);
  1352. if (esoc_info->esoc_desc)
  1353. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1354. }
  1355. #else
  1356. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1357. {
  1358. return 0;
  1359. }
  1360. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1361. #endif
  1362. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1363. {
  1364. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1365. int ret = 0;
  1366. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1367. return 0;
  1368. enable_irq(sol_gpio->dev_sol_irq);
  1369. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1370. if (ret)
  1371. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1372. ret);
  1373. return ret;
  1374. }
  1375. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1376. {
  1377. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1378. int ret = 0;
  1379. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1380. return 0;
  1381. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1382. if (ret)
  1383. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1384. ret);
  1385. disable_irq(sol_gpio->dev_sol_irq);
  1386. return ret;
  1387. }
  1388. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1389. {
  1390. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1391. if (sol_gpio->dev_sol_gpio < 0)
  1392. return -EINVAL;
  1393. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1394. }
  1395. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1396. {
  1397. struct cnss_plat_data *plat_priv = data;
  1398. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1399. sol_gpio->dev_sol_counter++;
  1400. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1401. irq, sol_gpio->dev_sol_counter);
  1402. /* Make sure abort current suspend */
  1403. cnss_pm_stay_awake(plat_priv);
  1404. cnss_pm_relax(plat_priv);
  1405. pm_system_wakeup();
  1406. cnss_bus_handle_dev_sol_irq(plat_priv);
  1407. return IRQ_HANDLED;
  1408. }
  1409. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1410. {
  1411. struct device *dev = &plat_priv->plat_dev->dev;
  1412. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1413. int ret = 0;
  1414. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1415. "wlan-dev-sol-gpio", 0);
  1416. if (sol_gpio->dev_sol_gpio < 0)
  1417. goto out;
  1418. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1419. sol_gpio->dev_sol_gpio);
  1420. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1421. if (ret) {
  1422. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1423. ret);
  1424. goto out;
  1425. }
  1426. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1427. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1428. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1429. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1430. if (ret) {
  1431. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1432. goto free_gpio;
  1433. }
  1434. return 0;
  1435. free_gpio:
  1436. gpio_free(sol_gpio->dev_sol_gpio);
  1437. out:
  1438. return ret;
  1439. }
  1440. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1441. {
  1442. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1443. if (sol_gpio->dev_sol_gpio < 0)
  1444. return;
  1445. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1446. gpio_free(sol_gpio->dev_sol_gpio);
  1447. }
  1448. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1449. {
  1450. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1451. if (sol_gpio->host_sol_gpio < 0)
  1452. return -EINVAL;
  1453. if (value)
  1454. cnss_pr_dbg("Assert host SOL GPIO\n");
  1455. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1456. return 0;
  1457. }
  1458. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1459. {
  1460. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1461. if (sol_gpio->host_sol_gpio < 0)
  1462. return -EINVAL;
  1463. return gpio_get_value(sol_gpio->host_sol_gpio);
  1464. }
  1465. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1466. {
  1467. struct device *dev = &plat_priv->plat_dev->dev;
  1468. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1469. int ret = 0;
  1470. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1471. "wlan-host-sol-gpio", 0);
  1472. if (sol_gpio->host_sol_gpio < 0)
  1473. goto out;
  1474. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1475. sol_gpio->host_sol_gpio);
  1476. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1477. if (ret) {
  1478. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1479. ret);
  1480. goto out;
  1481. }
  1482. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1483. return 0;
  1484. out:
  1485. return ret;
  1486. }
  1487. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1488. {
  1489. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1490. if (sol_gpio->host_sol_gpio < 0)
  1491. return;
  1492. gpio_free(sol_gpio->host_sol_gpio);
  1493. }
  1494. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1495. {
  1496. int ret;
  1497. ret = cnss_init_dev_sol_gpio(plat_priv);
  1498. if (ret)
  1499. goto out;
  1500. ret = cnss_init_host_sol_gpio(plat_priv);
  1501. if (ret)
  1502. goto deinit_dev_sol;
  1503. return 0;
  1504. deinit_dev_sol:
  1505. cnss_deinit_dev_sol_gpio(plat_priv);
  1506. out:
  1507. return ret;
  1508. }
  1509. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1510. {
  1511. cnss_deinit_host_sol_gpio(plat_priv);
  1512. cnss_deinit_dev_sol_gpio(plat_priv);
  1513. }
  1514. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1515. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1516. {
  1517. struct cnss_plat_data *plat_priv;
  1518. int ret = 0;
  1519. if (!subsys_desc->dev) {
  1520. cnss_pr_err("dev from subsys_desc is NULL\n");
  1521. return -ENODEV;
  1522. }
  1523. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1524. if (!plat_priv) {
  1525. cnss_pr_err("plat_priv is NULL\n");
  1526. return -ENODEV;
  1527. }
  1528. if (!plat_priv->driver_state) {
  1529. cnss_pr_dbg("subsys powerup is ignored\n");
  1530. return 0;
  1531. }
  1532. ret = cnss_bus_dev_powerup(plat_priv);
  1533. if (ret)
  1534. __pm_relax(plat_priv->recovery_ws);
  1535. return ret;
  1536. }
  1537. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1538. bool force_stop)
  1539. {
  1540. struct cnss_plat_data *plat_priv;
  1541. if (!subsys_desc->dev) {
  1542. cnss_pr_err("dev from subsys_desc is NULL\n");
  1543. return -ENODEV;
  1544. }
  1545. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1546. if (!plat_priv) {
  1547. cnss_pr_err("plat_priv is NULL\n");
  1548. return -ENODEV;
  1549. }
  1550. if (!plat_priv->driver_state) {
  1551. cnss_pr_dbg("subsys shutdown is ignored\n");
  1552. return 0;
  1553. }
  1554. return cnss_bus_dev_shutdown(plat_priv);
  1555. }
  1556. void cnss_device_crashed(struct device *dev)
  1557. {
  1558. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1559. struct cnss_subsys_info *subsys_info;
  1560. if (!plat_priv)
  1561. return;
  1562. subsys_info = &plat_priv->subsys_info;
  1563. if (subsys_info->subsys_device) {
  1564. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1565. subsys_set_crash_status(subsys_info->subsys_device, true);
  1566. subsystem_restart_dev(subsys_info->subsys_device);
  1567. }
  1568. }
  1569. EXPORT_SYMBOL(cnss_device_crashed);
  1570. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1571. {
  1572. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1573. if (!plat_priv) {
  1574. cnss_pr_err("plat_priv is NULL\n");
  1575. return;
  1576. }
  1577. cnss_bus_dev_crash_shutdown(plat_priv);
  1578. }
  1579. static int cnss_subsys_ramdump(int enable,
  1580. const struct subsys_desc *subsys_desc)
  1581. {
  1582. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1583. if (!plat_priv) {
  1584. cnss_pr_err("plat_priv is NULL\n");
  1585. return -ENODEV;
  1586. }
  1587. if (!enable)
  1588. return 0;
  1589. return cnss_bus_dev_ramdump(plat_priv);
  1590. }
  1591. static void cnss_recovery_work_handler(struct work_struct *work)
  1592. {
  1593. }
  1594. #else
  1595. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1596. {
  1597. int ret;
  1598. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1599. if (!plat_priv->recovery_enabled)
  1600. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1601. cnss_bus_dev_shutdown(plat_priv);
  1602. cnss_bus_dev_ramdump(plat_priv);
  1603. /* If recovery is triggered before Host driver registration,
  1604. * avoid device power up because eventually device will be
  1605. * power up as part of driver registration.
  1606. */
  1607. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1608. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1609. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1610. plat_priv->driver_state);
  1611. return;
  1612. }
  1613. msleep(POWER_RESET_MIN_DELAY_MS);
  1614. ret = cnss_bus_dev_powerup(plat_priv);
  1615. if (ret)
  1616. __pm_relax(plat_priv->recovery_ws);
  1617. return;
  1618. }
  1619. static void cnss_recovery_work_handler(struct work_struct *work)
  1620. {
  1621. struct cnss_plat_data *plat_priv =
  1622. container_of(work, struct cnss_plat_data, recovery_work);
  1623. cnss_recovery_handler(plat_priv);
  1624. }
  1625. void cnss_device_crashed(struct device *dev)
  1626. {
  1627. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1628. if (!plat_priv)
  1629. return;
  1630. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1631. schedule_work(&plat_priv->recovery_work);
  1632. }
  1633. EXPORT_SYMBOL(cnss_device_crashed);
  1634. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1635. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1636. {
  1637. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1638. struct cnss_ramdump_info *ramdump_info;
  1639. if (!plat_priv)
  1640. return NULL;
  1641. ramdump_info = &plat_priv->ramdump_info;
  1642. *size = ramdump_info->ramdump_size;
  1643. return ramdump_info->ramdump_va;
  1644. }
  1645. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1646. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1647. {
  1648. switch (reason) {
  1649. case CNSS_REASON_DEFAULT:
  1650. return "DEFAULT";
  1651. case CNSS_REASON_LINK_DOWN:
  1652. return "LINK_DOWN";
  1653. case CNSS_REASON_RDDM:
  1654. return "RDDM";
  1655. case CNSS_REASON_TIMEOUT:
  1656. return "TIMEOUT";
  1657. }
  1658. return "UNKNOWN";
  1659. };
  1660. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1661. enum cnss_recovery_reason reason)
  1662. {
  1663. plat_priv->recovery_count++;
  1664. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1665. goto self_recovery;
  1666. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1667. cnss_pr_dbg("Skip device recovery\n");
  1668. return 0;
  1669. }
  1670. /* FW recovery sequence has multiple steps and firmware load requires
  1671. * linux PM in awake state. Thus hold the cnss wake source until
  1672. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1673. * time taken in this process.
  1674. */
  1675. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1676. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1677. true);
  1678. switch (reason) {
  1679. case CNSS_REASON_LINK_DOWN:
  1680. if (!cnss_bus_check_link_status(plat_priv)) {
  1681. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1682. return 0;
  1683. }
  1684. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1685. &plat_priv->ctrl_params.quirks))
  1686. goto self_recovery;
  1687. if (!cnss_bus_recover_link_down(plat_priv)) {
  1688. /* clear recovery bit here to avoid skipping
  1689. * the recovery work for RDDM later
  1690. */
  1691. clear_bit(CNSS_DRIVER_RECOVERY,
  1692. &plat_priv->driver_state);
  1693. return 0;
  1694. }
  1695. break;
  1696. case CNSS_REASON_RDDM:
  1697. cnss_bus_collect_dump_info(plat_priv, false);
  1698. break;
  1699. case CNSS_REASON_DEFAULT:
  1700. case CNSS_REASON_TIMEOUT:
  1701. break;
  1702. default:
  1703. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1704. cnss_recovery_reason_to_str(reason), reason);
  1705. break;
  1706. }
  1707. cnss_bus_device_crashed(plat_priv);
  1708. return 0;
  1709. self_recovery:
  1710. cnss_pr_dbg("Going for self recovery\n");
  1711. cnss_bus_dev_shutdown(plat_priv);
  1712. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1713. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1714. &plat_priv->ctrl_params.quirks);
  1715. /* If link down self recovery is triggered before Host driver
  1716. * registration, avoid device power up because eventually device
  1717. * will be power up as part of driver registration.
  1718. */
  1719. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1720. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1721. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1722. plat_priv->driver_state);
  1723. return 0;
  1724. }
  1725. cnss_bus_dev_powerup(plat_priv);
  1726. return 0;
  1727. }
  1728. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1729. void *data)
  1730. {
  1731. struct cnss_recovery_data *recovery_data = data;
  1732. int ret = 0;
  1733. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1734. cnss_recovery_reason_to_str(recovery_data->reason),
  1735. recovery_data->reason);
  1736. if (!plat_priv->driver_state) {
  1737. cnss_pr_err("Improper driver state, ignore recovery\n");
  1738. ret = -EINVAL;
  1739. goto out;
  1740. }
  1741. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1742. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1743. ret = -EINVAL;
  1744. goto out;
  1745. }
  1746. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1747. cnss_pr_err("Recovery is already in progress\n");
  1748. CNSS_ASSERT(0);
  1749. ret = -EINVAL;
  1750. goto out;
  1751. }
  1752. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1753. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1754. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1755. ret = -EINVAL;
  1756. goto out;
  1757. }
  1758. switch (plat_priv->device_id) {
  1759. case QCA6174_DEVICE_ID:
  1760. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1761. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1762. &plat_priv->driver_state)) {
  1763. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1764. ret = -EINVAL;
  1765. goto out;
  1766. }
  1767. break;
  1768. default:
  1769. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1770. set_bit(CNSS_FW_BOOT_RECOVERY,
  1771. &plat_priv->driver_state);
  1772. }
  1773. break;
  1774. }
  1775. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1776. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1777. out:
  1778. kfree(data);
  1779. return ret;
  1780. }
  1781. int cnss_self_recovery(struct device *dev,
  1782. enum cnss_recovery_reason reason)
  1783. {
  1784. cnss_schedule_recovery(dev, reason);
  1785. return 0;
  1786. }
  1787. EXPORT_SYMBOL(cnss_self_recovery);
  1788. void cnss_schedule_recovery(struct device *dev,
  1789. enum cnss_recovery_reason reason)
  1790. {
  1791. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1792. struct cnss_recovery_data *data;
  1793. int gfp = GFP_KERNEL;
  1794. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1795. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1796. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1797. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1798. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1799. return;
  1800. }
  1801. if (in_interrupt() || irqs_disabled())
  1802. gfp = GFP_ATOMIC;
  1803. data = kzalloc(sizeof(*data), gfp);
  1804. if (!data)
  1805. return;
  1806. data->reason = reason;
  1807. cnss_driver_event_post(plat_priv,
  1808. CNSS_DRIVER_EVENT_RECOVERY,
  1809. 0, data);
  1810. }
  1811. EXPORT_SYMBOL(cnss_schedule_recovery);
  1812. int cnss_force_fw_assert(struct device *dev)
  1813. {
  1814. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1815. if (!plat_priv) {
  1816. cnss_pr_err("plat_priv is NULL\n");
  1817. return -ENODEV;
  1818. }
  1819. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1820. cnss_pr_info("Forced FW assert is not supported\n");
  1821. return -EOPNOTSUPP;
  1822. }
  1823. if (cnss_bus_is_device_down(plat_priv)) {
  1824. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1825. return 0;
  1826. }
  1827. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1828. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1829. return 0;
  1830. }
  1831. if (in_interrupt() || irqs_disabled())
  1832. cnss_driver_event_post(plat_priv,
  1833. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1834. 0, NULL);
  1835. else
  1836. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1837. return 0;
  1838. }
  1839. EXPORT_SYMBOL(cnss_force_fw_assert);
  1840. int cnss_force_collect_rddm(struct device *dev)
  1841. {
  1842. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1843. unsigned int timeout;
  1844. int ret = 0;
  1845. if (!plat_priv) {
  1846. cnss_pr_err("plat_priv is NULL\n");
  1847. return -ENODEV;
  1848. }
  1849. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1850. cnss_pr_info("Force collect rddm is not supported\n");
  1851. return -EOPNOTSUPP;
  1852. }
  1853. if (cnss_bus_is_device_down(plat_priv)) {
  1854. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1855. goto wait_rddm;
  1856. }
  1857. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1858. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1859. goto wait_rddm;
  1860. }
  1861. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1862. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1863. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1864. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1865. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1866. return 0;
  1867. }
  1868. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1869. if (ret)
  1870. return ret;
  1871. wait_rddm:
  1872. reinit_completion(&plat_priv->rddm_complete);
  1873. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1874. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1875. msecs_to_jiffies(timeout));
  1876. if (!ret) {
  1877. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1878. timeout);
  1879. ret = -ETIMEDOUT;
  1880. } else if (ret > 0) {
  1881. ret = 0;
  1882. }
  1883. return ret;
  1884. }
  1885. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1886. int cnss_qmi_send_get(struct device *dev)
  1887. {
  1888. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1889. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1890. return 0;
  1891. return cnss_bus_qmi_send_get(plat_priv);
  1892. }
  1893. EXPORT_SYMBOL(cnss_qmi_send_get);
  1894. int cnss_qmi_send_put(struct device *dev)
  1895. {
  1896. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1897. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1898. return 0;
  1899. return cnss_bus_qmi_send_put(plat_priv);
  1900. }
  1901. EXPORT_SYMBOL(cnss_qmi_send_put);
  1902. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1903. int cmd_len, void *cb_ctx,
  1904. int (*cb)(void *ctx, void *event, int event_len))
  1905. {
  1906. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1907. int ret;
  1908. if (!plat_priv)
  1909. return -ENODEV;
  1910. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1911. return -EINVAL;
  1912. plat_priv->get_info_cb = cb;
  1913. plat_priv->get_info_cb_ctx = cb_ctx;
  1914. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1915. if (ret) {
  1916. plat_priv->get_info_cb = NULL;
  1917. plat_priv->get_info_cb_ctx = NULL;
  1918. }
  1919. return ret;
  1920. }
  1921. EXPORT_SYMBOL(cnss_qmi_send);
  1922. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1923. {
  1924. int ret = 0;
  1925. u32 retry = 0, timeout;
  1926. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1927. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1928. goto out;
  1929. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1930. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1931. goto out;
  1932. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1933. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1934. goto out;
  1935. }
  1936. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1937. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1938. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1939. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1940. CNSS_ASSERT(0);
  1941. return -EINVAL;
  1942. }
  1943. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1944. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1945. break;
  1946. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1947. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1948. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1949. CNSS_ASSERT(0);
  1950. ret = -EINVAL;
  1951. goto mark_cal_fail;
  1952. }
  1953. }
  1954. switch (plat_priv->device_id) {
  1955. case QCA6290_DEVICE_ID:
  1956. case QCA6390_DEVICE_ID:
  1957. case QCA6490_DEVICE_ID:
  1958. case KIWI_DEVICE_ID:
  1959. case MANGO_DEVICE_ID:
  1960. case PEACH_DEVICE_ID:
  1961. break;
  1962. default:
  1963. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1964. plat_priv->device_id);
  1965. ret = -EINVAL;
  1966. goto mark_cal_fail;
  1967. }
  1968. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1969. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1970. timeout = cnss_get_timeout(plat_priv,
  1971. CNSS_TIMEOUT_CALIBRATION);
  1972. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1973. timeout / 1000);
  1974. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1975. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1976. msecs_to_jiffies(timeout));
  1977. }
  1978. reinit_completion(&plat_priv->cal_complete);
  1979. ret = cnss_bus_dev_powerup(plat_priv);
  1980. mark_cal_fail:
  1981. if (ret) {
  1982. complete(&plat_priv->cal_complete);
  1983. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1984. /* Set CBC done in driver state to mark attempt and note error
  1985. * since calibration cannot be retried at boot.
  1986. */
  1987. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1988. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1989. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1990. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1991. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1992. goto out;
  1993. cnss_pr_info("Schedule WLAN driver load\n");
  1994. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1995. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1996. 0);
  1997. }
  1998. }
  1999. out:
  2000. return ret;
  2001. }
  2002. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  2003. void *data)
  2004. {
  2005. struct cnss_cal_info *cal_info = data;
  2006. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  2007. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  2008. goto out;
  2009. switch (cal_info->cal_status) {
  2010. case CNSS_CAL_DONE:
  2011. cnss_pr_dbg("Calibration completed successfully\n");
  2012. plat_priv->cal_done = true;
  2013. break;
  2014. case CNSS_CAL_TIMEOUT:
  2015. case CNSS_CAL_FAILURE:
  2016. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  2017. cal_info->cal_status);
  2018. break;
  2019. default:
  2020. cnss_pr_err("Unknown calibration status: %u\n",
  2021. cal_info->cal_status);
  2022. break;
  2023. }
  2024. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  2025. cnss_bus_free_qdss_mem(plat_priv);
  2026. cnss_release_antenna_sharing(plat_priv);
  2027. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  2028. goto skip_shutdown;
  2029. cnss_bus_dev_shutdown(plat_priv);
  2030. msleep(POWER_RESET_MIN_DELAY_MS);
  2031. skip_shutdown:
  2032. complete(&plat_priv->cal_complete);
  2033. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2034. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2035. if (cal_info->cal_status == CNSS_CAL_DONE) {
  2036. cnss_cal_mem_upload_to_file(plat_priv);
  2037. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2038. goto out;
  2039. cnss_pr_dbg("Schedule WLAN driver load\n");
  2040. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2041. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2042. 0);
  2043. }
  2044. out:
  2045. kfree(data);
  2046. return 0;
  2047. }
  2048. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  2049. {
  2050. int ret;
  2051. ret = cnss_bus_dev_powerup(plat_priv);
  2052. if (ret)
  2053. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2054. return ret;
  2055. }
  2056. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2057. {
  2058. cnss_bus_dev_shutdown(plat_priv);
  2059. return 0;
  2060. }
  2061. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2062. {
  2063. int ret = 0;
  2064. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2065. if (ret < 0)
  2066. return ret;
  2067. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2068. }
  2069. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2070. u32 mem_seg_len, u64 pa, u32 size)
  2071. {
  2072. int i = 0;
  2073. u64 offset = 0;
  2074. void *va = NULL;
  2075. u64 local_pa;
  2076. u32 local_size;
  2077. for (i = 0; i < mem_seg_len; i++) {
  2078. local_pa = (u64)fw_mem[i].pa;
  2079. local_size = (u32)fw_mem[i].size;
  2080. if (pa == local_pa && size <= local_size) {
  2081. va = fw_mem[i].va;
  2082. break;
  2083. }
  2084. if (pa > local_pa &&
  2085. pa < local_pa + local_size &&
  2086. pa + size <= local_pa + local_size) {
  2087. offset = pa - local_pa;
  2088. va = fw_mem[i].va + offset;
  2089. break;
  2090. }
  2091. }
  2092. return va;
  2093. }
  2094. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2095. void *data)
  2096. {
  2097. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2098. struct cnss_fw_mem *fw_mem_seg;
  2099. int ret = 0L;
  2100. void *va = NULL;
  2101. u32 i, fw_mem_seg_len;
  2102. switch (event_data->mem_type) {
  2103. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2104. if (!plat_priv->fw_mem_seg_len)
  2105. goto invalid_mem_save;
  2106. fw_mem_seg = plat_priv->fw_mem;
  2107. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2108. break;
  2109. case QMI_WLFW_MEM_QDSS_V01:
  2110. if (!plat_priv->qdss_mem_seg_len)
  2111. goto invalid_mem_save;
  2112. fw_mem_seg = plat_priv->qdss_mem;
  2113. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2114. break;
  2115. default:
  2116. goto invalid_mem_save;
  2117. }
  2118. for (i = 0; i < event_data->mem_seg_len; i++) {
  2119. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2120. event_data->mem_seg[i].addr,
  2121. event_data->mem_seg[i].size);
  2122. if (!va) {
  2123. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2124. &event_data->mem_seg[i].addr,
  2125. event_data->mem_type);
  2126. ret = -EINVAL;
  2127. break;
  2128. }
  2129. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2130. event_data->file_name,
  2131. event_data->mem_seg[i].size);
  2132. if (ret < 0) {
  2133. cnss_pr_err("Fail to save fw mem data: %d\n",
  2134. ret);
  2135. break;
  2136. }
  2137. }
  2138. kfree(data);
  2139. return ret;
  2140. invalid_mem_save:
  2141. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2142. event_data->mem_type);
  2143. kfree(data);
  2144. return -EINVAL;
  2145. }
  2146. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2147. {
  2148. cnss_bus_free_qdss_mem(plat_priv);
  2149. return 0;
  2150. }
  2151. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2152. void *data)
  2153. {
  2154. int ret = 0;
  2155. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2156. if (!plat_priv)
  2157. return -ENODEV;
  2158. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2159. event_data->total_size);
  2160. kfree(data);
  2161. return ret;
  2162. }
  2163. static void cnss_driver_event_work(struct work_struct *work)
  2164. {
  2165. struct cnss_plat_data *plat_priv =
  2166. container_of(work, struct cnss_plat_data, event_work);
  2167. struct cnss_driver_event *event;
  2168. unsigned long flags;
  2169. int ret = 0;
  2170. if (!plat_priv) {
  2171. cnss_pr_err("plat_priv is NULL!\n");
  2172. return;
  2173. }
  2174. cnss_pm_stay_awake(plat_priv);
  2175. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2176. while (!list_empty(&plat_priv->event_list)) {
  2177. event = list_first_entry(&plat_priv->event_list,
  2178. struct cnss_driver_event, list);
  2179. list_del(&event->list);
  2180. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2181. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2182. cnss_driver_event_to_str(event->type),
  2183. event->sync ? "-sync" : "", event->type,
  2184. plat_priv->driver_state);
  2185. switch (event->type) {
  2186. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2187. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2188. break;
  2189. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2190. ret = cnss_wlfw_server_exit(plat_priv);
  2191. break;
  2192. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2193. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2194. if (ret)
  2195. break;
  2196. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2197. break;
  2198. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2199. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2200. break;
  2201. case CNSS_DRIVER_EVENT_FW_READY:
  2202. ret = cnss_fw_ready_hdlr(plat_priv);
  2203. break;
  2204. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2205. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2206. break;
  2207. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2208. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2209. event->data);
  2210. break;
  2211. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2212. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2213. event->data);
  2214. break;
  2215. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2216. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2217. break;
  2218. case CNSS_DRIVER_EVENT_RECOVERY:
  2219. ret = cnss_driver_recovery_hdlr(plat_priv,
  2220. event->data);
  2221. break;
  2222. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2223. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2224. break;
  2225. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2226. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2227. &plat_priv->driver_state);
  2228. fallthrough;
  2229. case CNSS_DRIVER_EVENT_POWER_UP:
  2230. ret = cnss_power_up_hdlr(plat_priv);
  2231. break;
  2232. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2233. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2234. &plat_priv->driver_state);
  2235. fallthrough;
  2236. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2237. ret = cnss_power_down_hdlr(plat_priv);
  2238. break;
  2239. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2240. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2241. event->data);
  2242. break;
  2243. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2244. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2245. event->data);
  2246. break;
  2247. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2248. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2249. break;
  2250. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2251. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2252. event->data);
  2253. break;
  2254. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2255. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2256. break;
  2257. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2258. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2259. event->data);
  2260. break;
  2261. default:
  2262. cnss_pr_err("Invalid driver event type: %d",
  2263. event->type);
  2264. kfree(event);
  2265. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2266. continue;
  2267. }
  2268. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2269. if (event->sync) {
  2270. event->ret = ret;
  2271. complete(&event->complete);
  2272. continue;
  2273. }
  2274. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2275. kfree(event);
  2276. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2277. }
  2278. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2279. cnss_pm_relax(plat_priv);
  2280. }
  2281. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2282. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2283. {
  2284. int ret = 0;
  2285. struct cnss_subsys_info *subsys_info;
  2286. subsys_info = &plat_priv->subsys_info;
  2287. subsys_info->subsys_desc.name = plat_priv->device_name;
  2288. subsys_info->subsys_desc.owner = THIS_MODULE;
  2289. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2290. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2291. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2292. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2293. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2294. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2295. if (IS_ERR(subsys_info->subsys_device)) {
  2296. ret = PTR_ERR(subsys_info->subsys_device);
  2297. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2298. goto out;
  2299. }
  2300. subsys_info->subsys_handle =
  2301. subsystem_get(subsys_info->subsys_desc.name);
  2302. if (!subsys_info->subsys_handle) {
  2303. cnss_pr_err("Failed to get subsys_handle!\n");
  2304. ret = -EINVAL;
  2305. goto unregister_subsys;
  2306. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2307. ret = PTR_ERR(subsys_info->subsys_handle);
  2308. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2309. goto unregister_subsys;
  2310. }
  2311. return 0;
  2312. unregister_subsys:
  2313. subsys_unregister(subsys_info->subsys_device);
  2314. out:
  2315. return ret;
  2316. }
  2317. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2318. {
  2319. struct cnss_subsys_info *subsys_info;
  2320. subsys_info = &plat_priv->subsys_info;
  2321. subsystem_put(subsys_info->subsys_handle);
  2322. subsys_unregister(subsys_info->subsys_device);
  2323. }
  2324. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2325. {
  2326. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2327. return create_ramdump_device(subsys_info->subsys_desc.name,
  2328. subsys_info->subsys_desc.dev);
  2329. }
  2330. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2331. void *ramdump_dev)
  2332. {
  2333. destroy_ramdump_device(ramdump_dev);
  2334. }
  2335. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2336. {
  2337. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2338. struct ramdump_segment segment;
  2339. memset(&segment, 0, sizeof(segment));
  2340. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2341. segment.size = ramdump_info->ramdump_size;
  2342. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2343. }
  2344. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2345. {
  2346. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2347. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2348. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2349. struct ramdump_segment *ramdump_segs, *s;
  2350. struct cnss_dump_meta_info meta_info = {0};
  2351. int i, ret = 0;
  2352. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2353. sizeof(*ramdump_segs),
  2354. GFP_KERNEL);
  2355. if (!ramdump_segs)
  2356. return -ENOMEM;
  2357. s = ramdump_segs + 1;
  2358. for (i = 0; i < dump_data->nentries; i++) {
  2359. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2360. cnss_pr_err("Unsupported dump type: %d",
  2361. dump_seg->type);
  2362. continue;
  2363. }
  2364. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2365. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2366. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2367. }
  2368. meta_info.entry[dump_seg->type].entry_num++;
  2369. s->address = dump_seg->address;
  2370. s->v_address = (void __iomem *)dump_seg->v_address;
  2371. s->size = dump_seg->size;
  2372. s++;
  2373. dump_seg++;
  2374. }
  2375. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2376. meta_info.version = CNSS_RAMDUMP_VERSION;
  2377. meta_info.chipset = plat_priv->device_id;
  2378. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2379. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2380. ramdump_segs->size = sizeof(meta_info);
  2381. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2382. dump_data->nentries + 1);
  2383. kfree(ramdump_segs);
  2384. return ret;
  2385. }
  2386. #else
  2387. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2388. void *data)
  2389. {
  2390. struct cnss_plat_data *plat_priv =
  2391. container_of(nb, struct cnss_plat_data, panic_nb);
  2392. cnss_bus_dev_crash_shutdown(plat_priv);
  2393. return NOTIFY_DONE;
  2394. }
  2395. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2396. {
  2397. int ret;
  2398. if (!plat_priv)
  2399. return -ENODEV;
  2400. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2401. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2402. &plat_priv->panic_nb);
  2403. if (ret) {
  2404. cnss_pr_err("Failed to register panic handler\n");
  2405. return -EINVAL;
  2406. }
  2407. return 0;
  2408. }
  2409. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2410. {
  2411. int ret;
  2412. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2413. &plat_priv->panic_nb);
  2414. if (ret)
  2415. cnss_pr_err("Failed to unregister panic handler\n");
  2416. }
  2417. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2418. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2419. {
  2420. return &plat_priv->plat_dev->dev;
  2421. }
  2422. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2423. void *ramdump_dev)
  2424. {
  2425. }
  2426. #endif
  2427. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2428. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2429. {
  2430. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2431. struct qcom_dump_segment segment;
  2432. struct list_head head;
  2433. INIT_LIST_HEAD(&head);
  2434. memset(&segment, 0, sizeof(segment));
  2435. segment.va = ramdump_info->ramdump_va;
  2436. segment.size = ramdump_info->ramdump_size;
  2437. list_add(&segment.node, &head);
  2438. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2439. }
  2440. #else
  2441. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2442. {
  2443. return 0;
  2444. }
  2445. /* Using completion event inside dynamically allocated ramdump_desc
  2446. * may result a race between freeing the event after setting it to
  2447. * complete inside dev coredump free callback and the thread that is
  2448. * waiting for completion.
  2449. */
  2450. DECLARE_COMPLETION(dump_done);
  2451. #define TIMEOUT_SAVE_DUMP_MS 30000
  2452. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2453. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2454. { \
  2455. if (class == ELFCLASS32) \
  2456. return sizeof(struct elf32_##__xhdr); \
  2457. else \
  2458. return sizeof(struct elf64_##__xhdr); \
  2459. }
  2460. SIZEOF_ELF_STRUCT(phdr)
  2461. SIZEOF_ELF_STRUCT(hdr)
  2462. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2463. do { \
  2464. if (class == ELFCLASS32) \
  2465. ((struct elf32_##__xhdr *)arg)->member = value; \
  2466. else \
  2467. ((struct elf64_##__xhdr *)arg)->member = value; \
  2468. } while (0)
  2469. #define set_ehdr_property(arg, class, member, value) \
  2470. set_xhdr_property(hdr, arg, class, member, value)
  2471. #define set_phdr_property(arg, class, member, value) \
  2472. set_xhdr_property(phdr, arg, class, member, value)
  2473. /* These replace qcom_ramdump driver APIs called from common API
  2474. * cnss_do_elf_dump() by the ones defined here.
  2475. */
  2476. #define qcom_dump_segment cnss_qcom_dump_segment
  2477. #define qcom_elf_dump cnss_qcom_elf_dump
  2478. #define dump_enabled cnss_dump_enabled
  2479. struct cnss_qcom_dump_segment {
  2480. struct list_head node;
  2481. dma_addr_t da;
  2482. void *va;
  2483. size_t size;
  2484. };
  2485. struct cnss_qcom_ramdump_desc {
  2486. void *data;
  2487. struct completion dump_done;
  2488. };
  2489. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2490. void *data, size_t datalen)
  2491. {
  2492. struct cnss_qcom_ramdump_desc *desc = data;
  2493. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2494. datalen);
  2495. }
  2496. static void cnss_qcom_devcd_freev(void *data)
  2497. {
  2498. struct cnss_qcom_ramdump_desc *desc = data;
  2499. cnss_pr_dbg("Free dump data for dev coredump\n");
  2500. complete(&dump_done);
  2501. vfree(desc->data);
  2502. kfree(desc);
  2503. }
  2504. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2505. gfp_t gfp)
  2506. {
  2507. struct cnss_qcom_ramdump_desc *desc;
  2508. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2509. int ret;
  2510. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2511. if (!desc)
  2512. return -ENOMEM;
  2513. desc->data = data;
  2514. reinit_completion(&dump_done);
  2515. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2516. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2517. ret = wait_for_completion_timeout(&dump_done,
  2518. msecs_to_jiffies(timeout));
  2519. if (!ret)
  2520. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2521. timeout);
  2522. return ret ? 0 : -ETIMEDOUT;
  2523. }
  2524. /* Since the elf32 and elf64 identification is identical apart from
  2525. * the class, use elf32 by default.
  2526. */
  2527. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2528. {
  2529. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2530. ehdr->e_ident[EI_CLASS] = class;
  2531. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2532. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2533. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2534. }
  2535. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2536. unsigned char class)
  2537. {
  2538. struct cnss_qcom_dump_segment *segment;
  2539. void *phdr, *ehdr;
  2540. size_t data_size, offset;
  2541. int phnum = 0;
  2542. void *data;
  2543. void __iomem *ptr;
  2544. if (!segs || list_empty(segs))
  2545. return -EINVAL;
  2546. data_size = sizeof_elf_hdr(class);
  2547. list_for_each_entry(segment, segs, node) {
  2548. data_size += sizeof_elf_phdr(class) + segment->size;
  2549. phnum++;
  2550. }
  2551. data = vmalloc(data_size);
  2552. if (!data)
  2553. return -ENOMEM;
  2554. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2555. ehdr = data;
  2556. memset(ehdr, 0, sizeof_elf_hdr(class));
  2557. init_elf_identification(ehdr, class);
  2558. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2559. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2560. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2561. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2562. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2563. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2564. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2565. phdr = data + sizeof_elf_hdr(class);
  2566. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2567. list_for_each_entry(segment, segs, node) {
  2568. memset(phdr, 0, sizeof_elf_phdr(class));
  2569. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2570. set_phdr_property(phdr, class, p_offset, offset);
  2571. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2572. set_phdr_property(phdr, class, p_paddr, segment->da);
  2573. set_phdr_property(phdr, class, p_filesz, segment->size);
  2574. set_phdr_property(phdr, class, p_memsz, segment->size);
  2575. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2576. set_phdr_property(phdr, class, p_align, 0);
  2577. if (segment->va) {
  2578. memcpy(data + offset, segment->va, segment->size);
  2579. } else {
  2580. ptr = devm_ioremap(dev, segment->da, segment->size);
  2581. if (!ptr) {
  2582. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2583. &segment->da, segment->size);
  2584. memset(data + offset, 0xff, segment->size);
  2585. } else {
  2586. memcpy_fromio(data + offset, ptr,
  2587. segment->size);
  2588. }
  2589. }
  2590. offset += segment->size;
  2591. phdr += sizeof_elf_phdr(class);
  2592. }
  2593. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2594. }
  2595. /* Saving dump to file system is always needed in this case. */
  2596. static bool cnss_dump_enabled(void)
  2597. {
  2598. return true;
  2599. }
  2600. #endif /* CONFIG_QCOM_RAMDUMP */
  2601. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2602. {
  2603. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2604. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2605. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2606. struct qcom_dump_segment *seg;
  2607. struct cnss_dump_meta_info meta_info = {0};
  2608. struct list_head head;
  2609. int i, ret = 0;
  2610. if (!dump_enabled()) {
  2611. cnss_pr_info("Dump collection is not enabled\n");
  2612. return ret;
  2613. }
  2614. INIT_LIST_HEAD(&head);
  2615. for (i = 0; i < dump_data->nentries; i++) {
  2616. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2617. cnss_pr_err("Unsupported dump type: %d",
  2618. dump_seg->type);
  2619. continue;
  2620. }
  2621. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2622. if (!seg) {
  2623. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2624. __func__, i);
  2625. continue;
  2626. }
  2627. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2628. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2629. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2630. }
  2631. meta_info.entry[dump_seg->type].entry_num++;
  2632. seg->da = dump_seg->address;
  2633. seg->va = dump_seg->v_address;
  2634. seg->size = dump_seg->size;
  2635. list_add_tail(&seg->node, &head);
  2636. dump_seg++;
  2637. }
  2638. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2639. if (!seg) {
  2640. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2641. __func__);
  2642. goto skip_elf_dump;
  2643. }
  2644. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2645. meta_info.version = CNSS_RAMDUMP_VERSION;
  2646. meta_info.chipset = plat_priv->device_id;
  2647. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2648. seg->va = &meta_info;
  2649. seg->size = sizeof(meta_info);
  2650. list_add(&seg->node, &head);
  2651. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2652. skip_elf_dump:
  2653. while (!list_empty(&head)) {
  2654. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2655. list_del(&seg->node);
  2656. kfree(seg);
  2657. }
  2658. return ret;
  2659. }
  2660. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2661. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2662. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2663. size_t num_entries_loaded)
  2664. {
  2665. struct qcom_dump_segment *seg;
  2666. struct cnss_host_dump_meta_info meta_info = {0};
  2667. struct list_head head;
  2668. int dev_ret = 0;
  2669. struct device *new_device;
  2670. static const char * const wlan_str[] = {
  2671. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2672. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2673. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2674. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2675. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2676. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2677. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2678. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2679. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2680. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2681. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2682. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2683. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2684. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2685. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2686. [CNSS_HOST_HIF_CE_DESC_HISTORY] = "hif_ce_desc_history",
  2687. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2688. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data"
  2689. };
  2690. int i;
  2691. int ret = 0;
  2692. enum cnss_host_dump_type j;
  2693. if (!dump_enabled()) {
  2694. cnss_pr_info("Dump collection is not enabled\n");
  2695. return ret;
  2696. }
  2697. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2698. if (!new_device) {
  2699. cnss_pr_err("Failed to alloc device mem\n");
  2700. return -ENOMEM;
  2701. }
  2702. device_initialize(new_device);
  2703. dev_set_name(new_device, "wlan_driver");
  2704. dev_ret = device_add(new_device);
  2705. if (dev_ret) {
  2706. cnss_pr_err("Failed to add new device\n");
  2707. goto put_device;
  2708. }
  2709. INIT_LIST_HEAD(&head);
  2710. for (i = 0; i < num_entries_loaded; i++) {
  2711. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2712. if (!seg) {
  2713. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2714. continue;
  2715. }
  2716. seg->va = ssr_entry[i].buffer_pointer;
  2717. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2718. seg->size = ssr_entry[i].buffer_size;
  2719. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2720. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2721. strlen(wlan_str[j])) == 0) {
  2722. meta_info.entry[i].type = j;
  2723. }
  2724. }
  2725. meta_info.entry[i].entry_start = i + 1;
  2726. meta_info.entry[i].entry_num++;
  2727. list_add_tail(&seg->node, &head);
  2728. }
  2729. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2730. if (!seg) {
  2731. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2732. __func__);
  2733. goto skip_host_dump;
  2734. }
  2735. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2736. meta_info.version = CNSS_RAMDUMP_VERSION;
  2737. meta_info.chipset = plat_priv->device_id;
  2738. meta_info.total_entries = num_entries_loaded;
  2739. seg->va = &meta_info;
  2740. seg->da = (dma_addr_t)&meta_info;
  2741. seg->size = sizeof(meta_info);
  2742. list_add(&seg->node, &head);
  2743. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2744. skip_host_dump:
  2745. while (!list_empty(&head)) {
  2746. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2747. list_del(&seg->node);
  2748. kfree(seg);
  2749. }
  2750. device_del(new_device);
  2751. put_device:
  2752. put_device(new_device);
  2753. kfree(new_device);
  2754. return ret;
  2755. }
  2756. #endif
  2757. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2758. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2759. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2760. {
  2761. struct cnss_ramdump_info *ramdump_info;
  2762. struct msm_dump_entry dump_entry;
  2763. ramdump_info = &plat_priv->ramdump_info;
  2764. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2765. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2766. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2767. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2768. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2769. sizeof(ramdump_info->dump_data.name));
  2770. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2771. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2772. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2773. &dump_entry);
  2774. }
  2775. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2776. {
  2777. int ret = 0;
  2778. struct device *dev;
  2779. struct cnss_ramdump_info *ramdump_info;
  2780. u32 ramdump_size = 0;
  2781. dev = &plat_priv->plat_dev->dev;
  2782. ramdump_info = &plat_priv->ramdump_info;
  2783. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2784. /* dt type: legacy or converged */
  2785. ret = of_property_read_u32(dev->of_node,
  2786. "qcom,wlan-ramdump-dynamic",
  2787. &ramdump_size);
  2788. } else {
  2789. ret = of_property_read_u32(plat_priv->dev_node,
  2790. "qcom,wlan-ramdump-dynamic",
  2791. &ramdump_size);
  2792. }
  2793. if (ret == 0) {
  2794. ramdump_info->ramdump_va =
  2795. dma_alloc_coherent(dev, ramdump_size,
  2796. &ramdump_info->ramdump_pa,
  2797. GFP_KERNEL);
  2798. if (ramdump_info->ramdump_va)
  2799. ramdump_info->ramdump_size = ramdump_size;
  2800. }
  2801. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2802. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2803. if (ramdump_info->ramdump_size == 0) {
  2804. cnss_pr_info("Ramdump will not be collected");
  2805. goto out;
  2806. }
  2807. ret = cnss_init_dump_entry(plat_priv);
  2808. if (ret) {
  2809. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2810. goto free_ramdump;
  2811. }
  2812. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2813. if (!ramdump_info->ramdump_dev) {
  2814. cnss_pr_err("Failed to create ramdump device!");
  2815. ret = -ENOMEM;
  2816. goto free_ramdump;
  2817. }
  2818. return 0;
  2819. free_ramdump:
  2820. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2821. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2822. out:
  2823. return ret;
  2824. }
  2825. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2826. {
  2827. struct device *dev;
  2828. struct cnss_ramdump_info *ramdump_info;
  2829. dev = &plat_priv->plat_dev->dev;
  2830. ramdump_info = &plat_priv->ramdump_info;
  2831. if (ramdump_info->ramdump_dev)
  2832. cnss_destroy_ramdump_device(plat_priv,
  2833. ramdump_info->ramdump_dev);
  2834. if (ramdump_info->ramdump_va)
  2835. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2836. ramdump_info->ramdump_va,
  2837. ramdump_info->ramdump_pa);
  2838. }
  2839. /**
  2840. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2841. * @ret: Error returned by msm_dump_data_register_nominidump
  2842. *
  2843. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2844. * ignore failure.
  2845. *
  2846. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2847. */
  2848. static int cnss_ignore_dump_data_reg_fail(int ret)
  2849. {
  2850. return ret;
  2851. }
  2852. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2853. {
  2854. int ret = 0;
  2855. struct cnss_ramdump_info_v2 *info_v2;
  2856. struct cnss_dump_data *dump_data;
  2857. struct msm_dump_entry dump_entry;
  2858. struct device *dev = &plat_priv->plat_dev->dev;
  2859. u32 ramdump_size = 0;
  2860. info_v2 = &plat_priv->ramdump_info_v2;
  2861. dump_data = &info_v2->dump_data;
  2862. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2863. /* dt type: legacy or converged */
  2864. ret = of_property_read_u32(dev->of_node,
  2865. "qcom,wlan-ramdump-dynamic",
  2866. &ramdump_size);
  2867. } else {
  2868. ret = of_property_read_u32(plat_priv->dev_node,
  2869. "qcom,wlan-ramdump-dynamic",
  2870. &ramdump_size);
  2871. }
  2872. if (ret == 0)
  2873. info_v2->ramdump_size = ramdump_size;
  2874. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2875. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2876. if (!info_v2->dump_data_vaddr)
  2877. return -ENOMEM;
  2878. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2879. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2880. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2881. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2882. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2883. sizeof(dump_data->name));
  2884. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2885. dump_entry.addr = virt_to_phys(dump_data);
  2886. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2887. &dump_entry);
  2888. if (ret) {
  2889. ret = cnss_ignore_dump_data_reg_fail(ret);
  2890. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2891. ret ? "Error" : "Ignoring", ret);
  2892. goto free_ramdump;
  2893. }
  2894. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2895. if (!info_v2->ramdump_dev) {
  2896. cnss_pr_err("Failed to create ramdump device!\n");
  2897. ret = -ENOMEM;
  2898. goto free_ramdump;
  2899. }
  2900. return 0;
  2901. free_ramdump:
  2902. kfree(info_v2->dump_data_vaddr);
  2903. info_v2->dump_data_vaddr = NULL;
  2904. return ret;
  2905. }
  2906. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2907. {
  2908. struct cnss_ramdump_info_v2 *info_v2;
  2909. info_v2 = &plat_priv->ramdump_info_v2;
  2910. if (info_v2->ramdump_dev)
  2911. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2912. kfree(info_v2->dump_data_vaddr);
  2913. info_v2->dump_data_vaddr = NULL;
  2914. info_v2->dump_data_valid = false;
  2915. }
  2916. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2917. {
  2918. int ret = 0;
  2919. switch (plat_priv->device_id) {
  2920. case QCA6174_DEVICE_ID:
  2921. ret = cnss_register_ramdump_v1(plat_priv);
  2922. break;
  2923. case QCA6290_DEVICE_ID:
  2924. case QCA6390_DEVICE_ID:
  2925. case QCN7605_DEVICE_ID:
  2926. case QCA6490_DEVICE_ID:
  2927. case KIWI_DEVICE_ID:
  2928. case MANGO_DEVICE_ID:
  2929. case PEACH_DEVICE_ID:
  2930. ret = cnss_register_ramdump_v2(plat_priv);
  2931. break;
  2932. default:
  2933. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2934. ret = -ENODEV;
  2935. break;
  2936. }
  2937. return ret;
  2938. }
  2939. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2940. {
  2941. switch (plat_priv->device_id) {
  2942. case QCA6174_DEVICE_ID:
  2943. cnss_unregister_ramdump_v1(plat_priv);
  2944. break;
  2945. case QCA6290_DEVICE_ID:
  2946. case QCA6390_DEVICE_ID:
  2947. case QCN7605_DEVICE_ID:
  2948. case QCA6490_DEVICE_ID:
  2949. case KIWI_DEVICE_ID:
  2950. case MANGO_DEVICE_ID:
  2951. case PEACH_DEVICE_ID:
  2952. cnss_unregister_ramdump_v2(plat_priv);
  2953. break;
  2954. default:
  2955. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2956. break;
  2957. }
  2958. }
  2959. #else
  2960. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2961. {
  2962. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2963. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2964. struct device *dev = &plat_priv->plat_dev->dev;
  2965. u32 ramdump_size = 0;
  2966. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2967. &ramdump_size) == 0)
  2968. info_v2->ramdump_size = ramdump_size;
  2969. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2970. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2971. if (!info_v2->dump_data_vaddr)
  2972. return -ENOMEM;
  2973. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2974. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2975. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2976. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2977. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2978. sizeof(dump_data->name));
  2979. info_v2->ramdump_dev = dev;
  2980. return 0;
  2981. }
  2982. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2983. {
  2984. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2985. info_v2->ramdump_dev = NULL;
  2986. kfree(info_v2->dump_data_vaddr);
  2987. info_v2->dump_data_vaddr = NULL;
  2988. info_v2->dump_data_valid = false;
  2989. }
  2990. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2991. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2992. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2993. phys_addr_t *pa, unsigned long attrs)
  2994. {
  2995. struct sg_table sgt;
  2996. int ret;
  2997. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2998. if (ret) {
  2999. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  3000. va, &dma, size, attrs);
  3001. return -EINVAL;
  3002. }
  3003. *pa = page_to_phys(sg_page(sgt.sgl));
  3004. sg_free_table(&sgt);
  3005. return 0;
  3006. }
  3007. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3008. enum cnss_fw_dump_type type, int seg_no,
  3009. void *va, phys_addr_t pa, size_t size)
  3010. {
  3011. struct md_region md_entry;
  3012. int ret;
  3013. switch (type) {
  3014. case CNSS_FW_IMAGE:
  3015. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3016. seg_no);
  3017. break;
  3018. case CNSS_FW_RDDM:
  3019. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3020. seg_no);
  3021. break;
  3022. case CNSS_FW_REMOTE_HEAP:
  3023. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3024. seg_no);
  3025. break;
  3026. default:
  3027. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3028. return -EINVAL;
  3029. }
  3030. md_entry.phys_addr = pa;
  3031. md_entry.virt_addr = (uintptr_t)va;
  3032. md_entry.size = size;
  3033. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3034. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3035. md_entry.name, va, &pa, size);
  3036. ret = msm_minidump_add_region(&md_entry);
  3037. if (ret < 0)
  3038. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  3039. return ret;
  3040. }
  3041. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3042. enum cnss_fw_dump_type type, int seg_no,
  3043. void *va, phys_addr_t pa, size_t size)
  3044. {
  3045. struct md_region md_entry;
  3046. int ret;
  3047. switch (type) {
  3048. case CNSS_FW_IMAGE:
  3049. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3050. seg_no);
  3051. break;
  3052. case CNSS_FW_RDDM:
  3053. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3054. seg_no);
  3055. break;
  3056. case CNSS_FW_REMOTE_HEAP:
  3057. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3058. seg_no);
  3059. break;
  3060. default:
  3061. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3062. return -EINVAL;
  3063. }
  3064. md_entry.phys_addr = pa;
  3065. md_entry.virt_addr = (uintptr_t)va;
  3066. md_entry.size = size;
  3067. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3068. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3069. md_entry.name, va, &pa, size);
  3070. ret = msm_minidump_remove_region(&md_entry);
  3071. if (ret)
  3072. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3073. ret);
  3074. return ret;
  3075. }
  3076. #else
  3077. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3078. phys_addr_t *pa, unsigned long attrs)
  3079. {
  3080. return 0;
  3081. }
  3082. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3083. enum cnss_fw_dump_type type, int seg_no,
  3084. void *va, phys_addr_t pa, size_t size)
  3085. {
  3086. return 0;
  3087. }
  3088. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3089. enum cnss_fw_dump_type type, int seg_no,
  3090. void *va, phys_addr_t pa, size_t size)
  3091. {
  3092. return 0;
  3093. }
  3094. #endif /* CONFIG_QCOM_MINIDUMP */
  3095. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3096. const struct firmware **fw_entry,
  3097. const char *filename)
  3098. {
  3099. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3100. return request_firmware_direct(fw_entry, filename,
  3101. &plat_priv->plat_dev->dev);
  3102. else
  3103. return firmware_request_nowarn(fw_entry, filename,
  3104. &plat_priv->plat_dev->dev);
  3105. }
  3106. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3107. /**
  3108. * cnss_register_bus_scale() - Setup interconnect voting data
  3109. * @plat_priv: Platform data structure
  3110. *
  3111. * For different interconnect path configured in device tree setup voting data
  3112. * for list of bandwidth requirements.
  3113. *
  3114. * Result: 0 for success. -EINVAL if not configured
  3115. */
  3116. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3117. {
  3118. int ret = -EINVAL;
  3119. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3120. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3121. struct device *dev = &plat_priv->plat_dev->dev;
  3122. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3123. ret = of_property_read_u32(dev->of_node,
  3124. "qcom,icc-path-count",
  3125. &plat_priv->icc.path_count);
  3126. if (ret) {
  3127. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3128. return 0;
  3129. }
  3130. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3131. "qcom,bus-bw-cfg-count",
  3132. &plat_priv->icc.bus_bw_cfg_count);
  3133. if (ret) {
  3134. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3135. goto cleanup;
  3136. }
  3137. cfg_arr_size = plat_priv->icc.path_count *
  3138. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3139. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3140. if (!cfg_arr) {
  3141. cnss_pr_err("Failed to alloc cfg table mem\n");
  3142. ret = -ENOMEM;
  3143. goto cleanup;
  3144. }
  3145. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3146. "qcom,bus-bw-cfg", cfg_arr,
  3147. cfg_arr_size);
  3148. if (ret) {
  3149. cnss_pr_err("Invalid Bus BW Config Table\n");
  3150. goto cleanup;
  3151. }
  3152. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3153. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3154. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3155. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3156. GFP_KERNEL);
  3157. if (!bus_bw_info) {
  3158. ret = -ENOMEM;
  3159. goto out;
  3160. }
  3161. ret = of_property_read_string_index(dev->of_node,
  3162. "interconnect-names", idx,
  3163. &bus_bw_info->icc_name);
  3164. if (ret)
  3165. goto out;
  3166. bus_bw_info->icc_path =
  3167. of_icc_get(&plat_priv->plat_dev->dev,
  3168. bus_bw_info->icc_name);
  3169. if (IS_ERR(bus_bw_info->icc_path)) {
  3170. ret = PTR_ERR(bus_bw_info->icc_path);
  3171. if (ret != -EPROBE_DEFER) {
  3172. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3173. bus_bw_info->icc_name, ret);
  3174. goto out;
  3175. }
  3176. }
  3177. bus_bw_info->cfg_table =
  3178. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3179. sizeof(*bus_bw_info->cfg_table),
  3180. GFP_KERNEL);
  3181. if (!bus_bw_info->cfg_table) {
  3182. ret = -ENOMEM;
  3183. goto out;
  3184. }
  3185. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3186. bus_bw_info->icc_name);
  3187. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3188. CNSS_ICC_VOTE_MAX);
  3189. i < plat_priv->icc.bus_bw_cfg_count;
  3190. i++, j += 2) {
  3191. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3192. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3193. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3194. i, bus_bw_info->cfg_table[i].avg_bw,
  3195. bus_bw_info->cfg_table[i].peak_bw);
  3196. }
  3197. list_add_tail(&bus_bw_info->list,
  3198. &plat_priv->icc.list_head);
  3199. }
  3200. kfree(cfg_arr);
  3201. return 0;
  3202. out:
  3203. list_for_each_entry_safe(bus_bw_info, tmp,
  3204. &plat_priv->icc.list_head, list) {
  3205. list_del(&bus_bw_info->list);
  3206. }
  3207. cleanup:
  3208. kfree(cfg_arr);
  3209. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3210. return ret;
  3211. }
  3212. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3213. {
  3214. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3215. list_for_each_entry_safe(bus_bw_info, tmp,
  3216. &plat_priv->icc.list_head, list) {
  3217. list_del(&bus_bw_info->list);
  3218. if (bus_bw_info->icc_path)
  3219. icc_put(bus_bw_info->icc_path);
  3220. }
  3221. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3222. }
  3223. #else
  3224. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3225. {
  3226. return 0;
  3227. }
  3228. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3229. #endif /* CONFIG_INTERCONNECT */
  3230. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3231. {
  3232. struct cnss_plat_data *plat_priv = cb_ctx;
  3233. if (!plat_priv) {
  3234. cnss_pr_err("%s: Invalid context\n", __func__);
  3235. return;
  3236. }
  3237. if (status) {
  3238. cnss_pr_info("CNSS Daemon connected\n");
  3239. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3240. complete(&plat_priv->daemon_connected);
  3241. } else {
  3242. cnss_pr_info("CNSS Daemon disconnected\n");
  3243. reinit_completion(&plat_priv->daemon_connected);
  3244. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3245. }
  3246. }
  3247. static ssize_t enable_hds_store(struct device *dev,
  3248. struct device_attribute *attr,
  3249. const char *buf, size_t count)
  3250. {
  3251. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3252. unsigned int enable_hds = 0;
  3253. if (!plat_priv)
  3254. return -ENODEV;
  3255. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3256. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3257. return -EINVAL;
  3258. }
  3259. if (enable_hds)
  3260. plat_priv->hds_enabled = true;
  3261. else
  3262. plat_priv->hds_enabled = false;
  3263. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3264. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3265. return count;
  3266. }
  3267. static ssize_t recovery_show(struct device *dev,
  3268. struct device_attribute *attr,
  3269. char *buf)
  3270. {
  3271. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3272. u32 buf_size = PAGE_SIZE;
  3273. u32 curr_len = 0;
  3274. u32 buf_written = 0;
  3275. if (!plat_priv)
  3276. return -ENODEV;
  3277. buf_written = scnprintf(buf, buf_size,
  3278. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3279. "BIT0 -- wlan fw recovery\n"
  3280. "BIT1 -- wlan pcss recovery\n"
  3281. "---------------------------------\n");
  3282. curr_len += buf_written;
  3283. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3284. "WLAN recovery %s[%d]\n",
  3285. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3286. plat_priv->recovery_enabled);
  3287. curr_len += buf_written;
  3288. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3289. "WLAN PCSS recovery %s[%d]\n",
  3290. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3291. plat_priv->recovery_pcss_enabled);
  3292. curr_len += buf_written;
  3293. /*
  3294. * Now size of curr_len is not over page size for sure,
  3295. * later if new item or none-fixed size item added, need
  3296. * add check to make sure curr_len is not over page size.
  3297. */
  3298. return curr_len;
  3299. }
  3300. static ssize_t time_sync_period_show(struct device *dev,
  3301. struct device_attribute *attr,
  3302. char *buf)
  3303. {
  3304. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3305. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3306. plat_priv->ctrl_params.time_sync_period);
  3307. }
  3308. /**
  3309. * cnss_get_min_time_sync_period_by_vote() - Get minimum time sync period
  3310. * @plat_priv: Platform data structure
  3311. *
  3312. * Result: return minimum time sync period present in vote from wlan and sys
  3313. */
  3314. uint32_t cnss_get_min_time_sync_period_by_vote(struct cnss_plat_data *plat_priv)
  3315. {
  3316. unsigned int i, min_time_sync_period = CNSS_TIME_SYNC_PERIOD_INVALID;
  3317. unsigned int time_sync_period;
  3318. for (i = 0; i < TIME_SYNC_VOTE_MAX; i++) {
  3319. time_sync_period = plat_priv->ctrl_params.time_sync_period_vote[i];
  3320. if (min_time_sync_period > time_sync_period)
  3321. min_time_sync_period = time_sync_period;
  3322. }
  3323. return min_time_sync_period;
  3324. }
  3325. static ssize_t time_sync_period_store(struct device *dev,
  3326. struct device_attribute *attr,
  3327. const char *buf, size_t count)
  3328. {
  3329. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3330. unsigned int time_sync_period = 0;
  3331. if (!plat_priv)
  3332. return -ENODEV;
  3333. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3334. cnss_pr_err("Invalid time sync sysfs command\n");
  3335. return -EINVAL;
  3336. }
  3337. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3338. cnss_pr_err("Invalid time sync value\n");
  3339. return -EINVAL;
  3340. }
  3341. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3342. time_sync_period;
  3343. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3344. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3345. cnss_pr_err("Invalid min time sync value\n");
  3346. return -EINVAL;
  3347. }
  3348. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3349. return count;
  3350. }
  3351. /**
  3352. * cnss_update_time_sync_period() - Set time sync period given by driver
  3353. * @dev: device structure
  3354. * @time_sync_period: time sync period value
  3355. *
  3356. * Update time sync period vote of driver and set minimum of time sync period
  3357. * from stored vote through wlan and sys config
  3358. * Result: return 0 for success, error in case of invalid value and no dev
  3359. */
  3360. int cnss_update_time_sync_period(struct device *dev, uint32_t time_sync_period)
  3361. {
  3362. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3363. if (!plat_priv)
  3364. return -ENODEV;
  3365. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3366. cnss_pr_err("Invalid time sync value\n");
  3367. return -EINVAL;
  3368. }
  3369. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3370. time_sync_period;
  3371. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3372. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3373. cnss_pr_err("Invalid min time sync value\n");
  3374. return -EINVAL;
  3375. }
  3376. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3377. return 0;
  3378. }
  3379. EXPORT_SYMBOL(cnss_update_time_sync_period);
  3380. /**
  3381. * cnss_reset_time_sync_period() - Reset time sync period
  3382. * @dev: device structure
  3383. *
  3384. * Update time sync period vote of driver as invalid
  3385. * and reset minimum of time sync period from
  3386. * stored vote through wlan and sys config
  3387. * Result: return 0 for success, error in case of no dev
  3388. */
  3389. int cnss_reset_time_sync_period(struct device *dev)
  3390. {
  3391. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3392. unsigned int time_sync_period = 0;
  3393. if (!plat_priv)
  3394. return -ENODEV;
  3395. /* Driver vote is set to invalid in case of reset
  3396. * In this case, only vote valid to check is sys config
  3397. */
  3398. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3399. CNSS_TIME_SYNC_PERIOD_INVALID;
  3400. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3401. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3402. cnss_pr_err("Invalid min time sync value\n");
  3403. return -EINVAL;
  3404. }
  3405. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3406. return 0;
  3407. }
  3408. EXPORT_SYMBOL(cnss_reset_time_sync_period);
  3409. static ssize_t recovery_store(struct device *dev,
  3410. struct device_attribute *attr,
  3411. const char *buf, size_t count)
  3412. {
  3413. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3414. unsigned int recovery = 0;
  3415. if (!plat_priv)
  3416. return -ENODEV;
  3417. if (sscanf(buf, "%du", &recovery) != 1) {
  3418. cnss_pr_err("Invalid recovery sysfs command\n");
  3419. return -EINVAL;
  3420. }
  3421. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3422. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3423. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3424. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3425. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3426. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3427. cnss_send_subsys_restart_level_msg(plat_priv);
  3428. return count;
  3429. }
  3430. static ssize_t shutdown_store(struct device *dev,
  3431. struct device_attribute *attr,
  3432. const char *buf, size_t count)
  3433. {
  3434. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3435. cnss_pr_dbg("Received shutdown notification\n");
  3436. if (plat_priv) {
  3437. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3438. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3439. del_timer(&plat_priv->fw_boot_timer);
  3440. complete_all(&plat_priv->power_up_complete);
  3441. complete_all(&plat_priv->cal_complete);
  3442. cnss_pr_dbg("Shutdown notification handled\n");
  3443. }
  3444. return count;
  3445. }
  3446. static ssize_t fs_ready_store(struct device *dev,
  3447. struct device_attribute *attr,
  3448. const char *buf, size_t count)
  3449. {
  3450. int fs_ready = 0;
  3451. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3452. if (sscanf(buf, "%du", &fs_ready) != 1)
  3453. return -EINVAL;
  3454. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3455. fs_ready, count);
  3456. if (!plat_priv) {
  3457. cnss_pr_err("plat_priv is NULL\n");
  3458. return count;
  3459. }
  3460. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3461. cnss_pr_dbg("QMI is bypassed\n");
  3462. return count;
  3463. }
  3464. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3465. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3466. cnss_driver_event_post(plat_priv,
  3467. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3468. 0, NULL);
  3469. }
  3470. return count;
  3471. }
  3472. static ssize_t qdss_trace_start_store(struct device *dev,
  3473. struct device_attribute *attr,
  3474. const char *buf, size_t count)
  3475. {
  3476. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3477. wlfw_qdss_trace_start(plat_priv);
  3478. cnss_pr_dbg("Received QDSS start command\n");
  3479. return count;
  3480. }
  3481. static ssize_t qdss_trace_stop_store(struct device *dev,
  3482. struct device_attribute *attr,
  3483. const char *buf, size_t count)
  3484. {
  3485. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3486. u32 option = 0;
  3487. if (sscanf(buf, "%du", &option) != 1)
  3488. return -EINVAL;
  3489. wlfw_qdss_trace_stop(plat_priv, option);
  3490. cnss_pr_dbg("Received QDSS stop command\n");
  3491. return count;
  3492. }
  3493. static ssize_t qdss_conf_download_store(struct device *dev,
  3494. struct device_attribute *attr,
  3495. const char *buf, size_t count)
  3496. {
  3497. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3498. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3499. cnss_pr_dbg("Received QDSS download config command\n");
  3500. return count;
  3501. }
  3502. static ssize_t hw_trace_override_store(struct device *dev,
  3503. struct device_attribute *attr,
  3504. const char *buf, size_t count)
  3505. {
  3506. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3507. int tmp = 0;
  3508. if (sscanf(buf, "%du", &tmp) != 1)
  3509. return -EINVAL;
  3510. plat_priv->hw_trc_override = tmp;
  3511. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3512. return count;
  3513. }
  3514. static ssize_t charger_mode_store(struct device *dev,
  3515. struct device_attribute *attr,
  3516. const char *buf, size_t count)
  3517. {
  3518. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3519. int tmp = 0;
  3520. if (sscanf(buf, "%du", &tmp) != 1)
  3521. return -EINVAL;
  3522. plat_priv->charger_mode = tmp;
  3523. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3524. return count;
  3525. }
  3526. static DEVICE_ATTR_WO(fs_ready);
  3527. static DEVICE_ATTR_WO(shutdown);
  3528. static DEVICE_ATTR_RW(recovery);
  3529. static DEVICE_ATTR_WO(enable_hds);
  3530. static DEVICE_ATTR_WO(qdss_trace_start);
  3531. static DEVICE_ATTR_WO(qdss_trace_stop);
  3532. static DEVICE_ATTR_WO(qdss_conf_download);
  3533. static DEVICE_ATTR_WO(hw_trace_override);
  3534. static DEVICE_ATTR_WO(charger_mode);
  3535. static DEVICE_ATTR_RW(time_sync_period);
  3536. static struct attribute *cnss_attrs[] = {
  3537. &dev_attr_fs_ready.attr,
  3538. &dev_attr_shutdown.attr,
  3539. &dev_attr_recovery.attr,
  3540. &dev_attr_enable_hds.attr,
  3541. &dev_attr_qdss_trace_start.attr,
  3542. &dev_attr_qdss_trace_stop.attr,
  3543. &dev_attr_qdss_conf_download.attr,
  3544. &dev_attr_hw_trace_override.attr,
  3545. &dev_attr_charger_mode.attr,
  3546. &dev_attr_time_sync_period.attr,
  3547. NULL,
  3548. };
  3549. static struct attribute_group cnss_attr_group = {
  3550. .attrs = cnss_attrs,
  3551. };
  3552. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3553. {
  3554. struct device *dev = &plat_priv->plat_dev->dev;
  3555. int ret;
  3556. char cnss_name[CNSS_FS_NAME_SIZE];
  3557. char shutdown_name[32];
  3558. if (cnss_is_dual_wlan_enabled()) {
  3559. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3560. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3561. snprintf(shutdown_name, sizeof(shutdown_name),
  3562. "shutdown_wlan_%d", plat_priv->plat_idx);
  3563. } else {
  3564. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3565. snprintf(shutdown_name, sizeof(shutdown_name),
  3566. "shutdown_wlan");
  3567. }
  3568. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3569. if (ret) {
  3570. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3571. ret);
  3572. goto out;
  3573. }
  3574. /* This is only for backward compatibility. */
  3575. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3576. if (ret) {
  3577. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3578. ret);
  3579. goto rm_cnss_link;
  3580. }
  3581. return 0;
  3582. rm_cnss_link:
  3583. sysfs_remove_link(kernel_kobj, cnss_name);
  3584. out:
  3585. return ret;
  3586. }
  3587. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3588. {
  3589. char cnss_name[CNSS_FS_NAME_SIZE];
  3590. char shutdown_name[32];
  3591. if (cnss_is_dual_wlan_enabled()) {
  3592. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3593. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3594. snprintf(shutdown_name, sizeof(shutdown_name),
  3595. "shutdown_wlan_%d", plat_priv->plat_idx);
  3596. } else {
  3597. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3598. snprintf(shutdown_name, sizeof(shutdown_name),
  3599. "shutdown_wlan");
  3600. }
  3601. sysfs_remove_link(kernel_kobj, shutdown_name);
  3602. sysfs_remove_link(kernel_kobj, cnss_name);
  3603. }
  3604. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3605. {
  3606. int ret = 0;
  3607. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3608. &cnss_attr_group);
  3609. if (ret) {
  3610. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3611. ret);
  3612. goto out;
  3613. }
  3614. cnss_create_sysfs_link(plat_priv);
  3615. return 0;
  3616. out:
  3617. return ret;
  3618. }
  3619. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3620. {
  3621. cnss_remove_sysfs_link(plat_priv);
  3622. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3623. }
  3624. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3625. {
  3626. spin_lock_init(&plat_priv->event_lock);
  3627. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3628. WQ_UNBOUND, 1);
  3629. if (!plat_priv->event_wq) {
  3630. cnss_pr_err("Failed to create event workqueue!\n");
  3631. return -EFAULT;
  3632. }
  3633. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3634. INIT_LIST_HEAD(&plat_priv->event_list);
  3635. return 0;
  3636. }
  3637. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3638. {
  3639. destroy_workqueue(plat_priv->event_wq);
  3640. }
  3641. static int cnss_reboot_notifier(struct notifier_block *nb,
  3642. unsigned long action,
  3643. void *data)
  3644. {
  3645. struct cnss_plat_data *plat_priv =
  3646. container_of(nb, struct cnss_plat_data, reboot_nb);
  3647. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3648. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3649. del_timer(&plat_priv->fw_boot_timer);
  3650. complete_all(&plat_priv->power_up_complete);
  3651. complete_all(&plat_priv->cal_complete);
  3652. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3653. return NOTIFY_DONE;
  3654. }
  3655. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3656. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3657. {
  3658. struct Object client_env;
  3659. struct Object app_object;
  3660. u32 wifi_uid = HW_WIFI_UID;
  3661. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3662. int ret;
  3663. u8 state = 0;
  3664. /* Once this flag is set, secure peripheral feature
  3665. * will not be supported till next reboot
  3666. */
  3667. if (plat_priv->sec_peri_feature_disable)
  3668. return 0;
  3669. /* get rootObj */
  3670. ret = get_client_env_object(&client_env);
  3671. if (ret) {
  3672. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3673. goto end;
  3674. }
  3675. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3676. if (ret) {
  3677. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3678. if (ret == FEATURE_NOT_SUPPORTED) {
  3679. ret = 0; /* Do not Assert */
  3680. plat_priv->sec_peri_feature_disable = true;
  3681. cnss_pr_dbg("Secure HW feature not supported\n");
  3682. }
  3683. goto exit_release_clientenv;
  3684. }
  3685. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3686. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3687. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3688. ObjectCounts_pack(1, 1, 0, 0));
  3689. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3690. if (ret) {
  3691. if (ret == PERIPHERAL_NOT_FOUND) {
  3692. ret = 0; /* Do not Assert */
  3693. plat_priv->sec_peri_feature_disable = true;
  3694. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3695. }
  3696. goto exit_release_app_obj;
  3697. }
  3698. if (state == 1)
  3699. set_bit(CNSS_WLAN_HW_DISABLED,
  3700. &plat_priv->driver_state);
  3701. else
  3702. clear_bit(CNSS_WLAN_HW_DISABLED,
  3703. &plat_priv->driver_state);
  3704. exit_release_app_obj:
  3705. Object_release(app_object);
  3706. exit_release_clientenv:
  3707. Object_release(client_env);
  3708. end:
  3709. if (ret) {
  3710. cnss_pr_err("Unable to get HW disable status\n");
  3711. CNSS_ASSERT(0);
  3712. }
  3713. return ret;
  3714. }
  3715. #else
  3716. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3717. {
  3718. return 0;
  3719. }
  3720. #endif
  3721. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3722. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3723. {
  3724. }
  3725. #else
  3726. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3727. {
  3728. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3729. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3730. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3731. }
  3732. #endif
  3733. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3734. static void cnss_initialize_mem_pool(unsigned long device_id)
  3735. {
  3736. cnss_initialize_prealloc_pool(device_id);
  3737. }
  3738. static void cnss_deinitialize_mem_pool(void)
  3739. {
  3740. cnss_deinitialize_prealloc_pool();
  3741. }
  3742. #else
  3743. static void cnss_initialize_mem_pool(unsigned long device_id)
  3744. {
  3745. }
  3746. static void cnss_deinitialize_mem_pool(void)
  3747. {
  3748. }
  3749. #endif
  3750. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3751. {
  3752. int ret;
  3753. ret = cnss_init_sol_gpio(plat_priv);
  3754. if (ret)
  3755. return ret;
  3756. timer_setup(&plat_priv->fw_boot_timer,
  3757. cnss_bus_fw_boot_timeout_hdlr, 0);
  3758. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3759. if (ret)
  3760. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3761. ret);
  3762. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3763. init_completion(&plat_priv->power_up_complete);
  3764. init_completion(&plat_priv->cal_complete);
  3765. init_completion(&plat_priv->rddm_complete);
  3766. init_completion(&plat_priv->recovery_complete);
  3767. init_completion(&plat_priv->daemon_connected);
  3768. mutex_init(&plat_priv->dev_lock);
  3769. mutex_init(&plat_priv->driver_ops_lock);
  3770. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3771. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3772. if (ret)
  3773. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3774. ret);
  3775. plat_priv->recovery_ws =
  3776. wakeup_source_register(&plat_priv->plat_dev->dev,
  3777. "CNSS_FW_RECOVERY");
  3778. if (!plat_priv->recovery_ws)
  3779. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3780. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3781. cnss_daemon_connection_update_cb,
  3782. plat_priv);
  3783. if (ret)
  3784. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3785. ret);
  3786. cnss_sram_dump_init(plat_priv);
  3787. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3788. "qcom,rc-ep-short-channel"))
  3789. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3790. if (plat_priv->device_id == PEACH_DEVICE_ID)
  3791. cnss_set_feature_list(plat_priv, CNSS_AUX_UC_SUPPORT_V01);
  3792. return 0;
  3793. }
  3794. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3795. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3796. {
  3797. }
  3798. #else
  3799. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3800. {
  3801. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3802. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3803. kfree(plat_priv->sram_dump);
  3804. }
  3805. #endif
  3806. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3807. {
  3808. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3809. plat_priv);
  3810. complete_all(&plat_priv->recovery_complete);
  3811. complete_all(&plat_priv->rddm_complete);
  3812. complete_all(&plat_priv->cal_complete);
  3813. complete_all(&plat_priv->power_up_complete);
  3814. complete_all(&plat_priv->daemon_connected);
  3815. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3816. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3817. del_timer(&plat_priv->fw_boot_timer);
  3818. wakeup_source_unregister(plat_priv->recovery_ws);
  3819. cnss_deinit_sol_gpio(plat_priv);
  3820. cnss_sram_dump_deinit(plat_priv);
  3821. kfree(plat_priv->on_chip_pmic_board_ids);
  3822. }
  3823. static void cnss_init_time_sync_period_default(struct cnss_plat_data *plat_priv)
  3824. {
  3825. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3826. CNSS_TIME_SYNC_PERIOD_INVALID;
  3827. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3828. CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3829. }
  3830. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3831. {
  3832. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3833. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3834. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3835. "qcom,wlan-cbc-enabled");
  3836. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3837. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3838. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3839. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3840. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3841. cnss_init_time_sync_period_default(plat_priv);
  3842. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3843. * enabled by default
  3844. */
  3845. plat_priv->adsp_pc_enabled = true;
  3846. }
  3847. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3848. {
  3849. struct device *dev = &plat_priv->plat_dev->dev;
  3850. plat_priv->use_pm_domain =
  3851. of_property_read_bool(dev->of_node, "use-pm-domain");
  3852. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3853. }
  3854. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3855. {
  3856. struct device *dev = &plat_priv->plat_dev->dev;
  3857. plat_priv->set_wlaon_pwr_ctrl =
  3858. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3859. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3860. plat_priv->set_wlaon_pwr_ctrl);
  3861. }
  3862. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3863. {
  3864. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3865. "qcom,converged-dt") ||
  3866. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3867. "qcom,same-dt-multi-dev") ||
  3868. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3869. "qcom,multi-wlan-exchg"));
  3870. }
  3871. static const struct platform_device_id cnss_platform_id_table[] = {
  3872. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3873. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3874. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3875. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3876. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3877. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3878. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3879. { .name = "qcaconv", .driver_data = 0, },
  3880. { },
  3881. };
  3882. static const struct of_device_id cnss_of_match_table[] = {
  3883. {
  3884. .compatible = "qcom,cnss",
  3885. .data = (void *)&cnss_platform_id_table[0]},
  3886. {
  3887. .compatible = "qcom,cnss-qca6290",
  3888. .data = (void *)&cnss_platform_id_table[1]},
  3889. {
  3890. .compatible = "qcom,cnss-qca6390",
  3891. .data = (void *)&cnss_platform_id_table[2]},
  3892. {
  3893. .compatible = "qcom,cnss-qca6490",
  3894. .data = (void *)&cnss_platform_id_table[3]},
  3895. {
  3896. .compatible = "qcom,cnss-kiwi",
  3897. .data = (void *)&cnss_platform_id_table[4]},
  3898. {
  3899. .compatible = "qcom,cnss-mango",
  3900. .data = (void *)&cnss_platform_id_table[5]},
  3901. {
  3902. .compatible = "qcom,cnss-peach",
  3903. .data = (void *)&cnss_platform_id_table[6]},
  3904. {
  3905. .compatible = "qcom,cnss-qca-converged",
  3906. .data = (void *)&cnss_platform_id_table[7]},
  3907. { },
  3908. };
  3909. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3910. static inline bool
  3911. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3912. {
  3913. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3914. "use-nv-mac");
  3915. }
  3916. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3917. {
  3918. struct device_node *child;
  3919. u32 id, i;
  3920. int id_n, device_identifier_gpio, ret;
  3921. u8 gpio_value;
  3922. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3923. return 0;
  3924. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3925. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3926. if (ret) {
  3927. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3928. return ret;
  3929. }
  3930. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3931. gpio_value = gpio_get_value(device_identifier_gpio);
  3932. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3933. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3934. child) {
  3935. if (strcmp(child->name, "chip_cfg"))
  3936. continue;
  3937. id_n = of_property_count_u32_elems(child, "supported-ids");
  3938. if (id_n <= 0) {
  3939. cnss_pr_err("Device id is NOT set\n");
  3940. return -EINVAL;
  3941. }
  3942. for (i = 0; i < id_n; i++) {
  3943. ret = of_property_read_u32_index(child,
  3944. "supported-ids",
  3945. i, &id);
  3946. if (ret) {
  3947. cnss_pr_err("Failed to read supported ids\n");
  3948. return -EINVAL;
  3949. }
  3950. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3951. plat_priv->plat_dev->dev.of_node = child;
  3952. plat_priv->device_id = QCA6490_DEVICE_ID;
  3953. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3954. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3955. child->name, i, id);
  3956. return 0;
  3957. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3958. plat_priv->plat_dev->dev.of_node = child;
  3959. plat_priv->device_id = KIWI_DEVICE_ID;
  3960. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3961. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3962. child->name, i, id);
  3963. return 0;
  3964. }
  3965. }
  3966. }
  3967. return -EINVAL;
  3968. }
  3969. static inline u32
  3970. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3971. {
  3972. bool is_converged_dt = of_property_read_bool(
  3973. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3974. bool is_multi_wlan_xchg;
  3975. if (is_converged_dt)
  3976. return CNSS_DTT_CONVERGED;
  3977. is_multi_wlan_xchg = of_property_read_bool(
  3978. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3979. if (is_multi_wlan_xchg)
  3980. return CNSS_DTT_MULTIEXCHG;
  3981. return CNSS_DTT_LEGACY;
  3982. }
  3983. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3984. {
  3985. int ret = 0;
  3986. int retry = 0;
  3987. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3988. return 0;
  3989. retry:
  3990. ret = cnss_power_on_device(plat_priv, true);
  3991. if (ret)
  3992. goto end;
  3993. ret = cnss_bus_init(plat_priv);
  3994. if (ret) {
  3995. if ((ret != -EPROBE_DEFER) &&
  3996. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3997. cnss_power_off_device(plat_priv);
  3998. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3999. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  4000. goto retry;
  4001. }
  4002. goto power_off;
  4003. }
  4004. return 0;
  4005. power_off:
  4006. cnss_power_off_device(plat_priv);
  4007. end:
  4008. return ret;
  4009. }
  4010. int cnss_wlan_hw_enable(void)
  4011. {
  4012. struct cnss_plat_data *plat_priv;
  4013. int ret = 0;
  4014. if (cnss_is_dual_wlan_enabled())
  4015. plat_priv = cnss_get_first_plat_priv(NULL);
  4016. else
  4017. plat_priv = cnss_get_plat_priv(NULL);
  4018. if (!plat_priv)
  4019. return -ENODEV;
  4020. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  4021. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  4022. goto register_driver;
  4023. ret = cnss_wlan_device_init(plat_priv);
  4024. if (ret) {
  4025. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  4026. CNSS_ASSERT(0);
  4027. return ret;
  4028. }
  4029. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  4030. cnss_driver_event_post(plat_priv,
  4031. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  4032. 0, NULL);
  4033. register_driver:
  4034. if (plat_priv->driver_ops)
  4035. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  4036. return ret;
  4037. }
  4038. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  4039. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  4040. {
  4041. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  4042. int ret = 0;
  4043. if (!plat_priv)
  4044. return -ENODEV;
  4045. /* If IMS server is connected, return success without QMI send */
  4046. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  4047. cnss_pr_dbg("Ignore host request as IMS server is connected");
  4048. return ret;
  4049. }
  4050. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  4051. return ret;
  4052. }
  4053. EXPORT_SYMBOL(cnss_set_wfc_mode);
  4054. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  4055. unsigned long *thermal_state)
  4056. {
  4057. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4058. if (!tcdev || !tcdev->devdata) {
  4059. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4060. return -EINVAL;
  4061. }
  4062. cnss_tcdev = tcdev->devdata;
  4063. *thermal_state = cnss_tcdev->max_thermal_state;
  4064. return 0;
  4065. }
  4066. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  4067. unsigned long *thermal_state)
  4068. {
  4069. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4070. if (!tcdev || !tcdev->devdata) {
  4071. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4072. return -EINVAL;
  4073. }
  4074. cnss_tcdev = tcdev->devdata;
  4075. *thermal_state = cnss_tcdev->curr_thermal_state;
  4076. return 0;
  4077. }
  4078. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  4079. unsigned long thermal_state)
  4080. {
  4081. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4082. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  4083. int ret = 0;
  4084. if (!tcdev || !tcdev->devdata) {
  4085. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4086. return -EINVAL;
  4087. }
  4088. cnss_tcdev = tcdev->devdata;
  4089. if (thermal_state > cnss_tcdev->max_thermal_state)
  4090. return -EINVAL;
  4091. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  4092. thermal_state, cnss_tcdev->tcdev_id);
  4093. mutex_lock(&plat_priv->tcdev_lock);
  4094. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  4095. thermal_state,
  4096. cnss_tcdev->tcdev_id);
  4097. if (!ret)
  4098. cnss_tcdev->curr_thermal_state = thermal_state;
  4099. mutex_unlock(&plat_priv->tcdev_lock);
  4100. if (ret) {
  4101. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  4102. ret, cnss_tcdev->tcdev_id);
  4103. return ret;
  4104. }
  4105. return 0;
  4106. }
  4107. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  4108. .get_max_state = cnss_tcdev_get_max_state,
  4109. .get_cur_state = cnss_tcdev_get_cur_state,
  4110. .set_cur_state = cnss_tcdev_set_cur_state,
  4111. };
  4112. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  4113. int tcdev_id)
  4114. {
  4115. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4116. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4117. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  4118. struct device_node *dev_node;
  4119. int ret = 0;
  4120. if (!priv) {
  4121. cnss_pr_err("Platform driver is not initialized!\n");
  4122. return -ENODEV;
  4123. }
  4124. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  4125. if (!cnss_tcdev) {
  4126. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  4127. return -ENOMEM;
  4128. }
  4129. cnss_tcdev->tcdev_id = tcdev_id;
  4130. cnss_tcdev->max_thermal_state = max_state;
  4131. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  4132. "qcom,cnss_cdev%d", tcdev_id);
  4133. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  4134. if (!dev_node) {
  4135. cnss_pr_err("Failed to get cooling device node\n");
  4136. kfree(cnss_tcdev);
  4137. return -EINVAL;
  4138. }
  4139. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  4140. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  4141. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  4142. cdev_node_name,
  4143. cnss_tcdev,
  4144. &cnss_cooling_ops);
  4145. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4146. ret = PTR_ERR(cnss_tcdev->tcdev);
  4147. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4148. ret, cnss_tcdev->tcdev_id);
  4149. kfree(cnss_tcdev);
  4150. } else {
  4151. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4152. cnss_tcdev->tcdev_id);
  4153. mutex_lock(&priv->tcdev_lock);
  4154. list_add(&cnss_tcdev->tcdev_list,
  4155. &priv->cnss_tcdev_list);
  4156. mutex_unlock(&priv->tcdev_lock);
  4157. }
  4158. } else {
  4159. cnss_pr_dbg("Cooling device registration not supported");
  4160. kfree(cnss_tcdev);
  4161. ret = -EOPNOTSUPP;
  4162. }
  4163. return ret;
  4164. }
  4165. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4166. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4167. {
  4168. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4169. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4170. if (!priv) {
  4171. cnss_pr_err("Platform driver is not initialized!\n");
  4172. return;
  4173. }
  4174. mutex_lock(&priv->tcdev_lock);
  4175. while (!list_empty(&priv->cnss_tcdev_list)) {
  4176. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4177. struct cnss_thermal_cdev,
  4178. tcdev_list);
  4179. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4180. list_del(&cnss_tcdev->tcdev_list);
  4181. kfree(cnss_tcdev);
  4182. }
  4183. mutex_unlock(&priv->tcdev_lock);
  4184. }
  4185. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4186. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4187. unsigned long *thermal_state,
  4188. int tcdev_id)
  4189. {
  4190. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4191. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4192. if (!priv) {
  4193. cnss_pr_err("Platform driver is not initialized!\n");
  4194. return -ENODEV;
  4195. }
  4196. mutex_lock(&priv->tcdev_lock);
  4197. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4198. if (cnss_tcdev->tcdev_id != tcdev_id)
  4199. continue;
  4200. *thermal_state = cnss_tcdev->curr_thermal_state;
  4201. mutex_unlock(&priv->tcdev_lock);
  4202. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4203. cnss_tcdev->curr_thermal_state, tcdev_id);
  4204. return 0;
  4205. }
  4206. mutex_unlock(&priv->tcdev_lock);
  4207. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4208. return -EINVAL;
  4209. }
  4210. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4211. static int cnss_probe(struct platform_device *plat_dev)
  4212. {
  4213. int ret = 0;
  4214. struct cnss_plat_data *plat_priv;
  4215. const struct of_device_id *of_id;
  4216. const struct platform_device_id *device_id;
  4217. if (cnss_get_plat_priv(plat_dev)) {
  4218. cnss_pr_err("Driver is already initialized!\n");
  4219. ret = -EEXIST;
  4220. goto out;
  4221. }
  4222. ret = cnss_plat_env_available();
  4223. if (ret)
  4224. goto out;
  4225. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4226. if (!of_id || !of_id->data) {
  4227. cnss_pr_err("Failed to find of match device!\n");
  4228. ret = -ENODEV;
  4229. goto out;
  4230. }
  4231. device_id = of_id->data;
  4232. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4233. GFP_KERNEL);
  4234. if (!plat_priv) {
  4235. ret = -ENOMEM;
  4236. goto out;
  4237. }
  4238. plat_priv->plat_dev = plat_dev;
  4239. plat_priv->dev_node = NULL;
  4240. plat_priv->device_id = device_id->driver_data;
  4241. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4242. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4243. plat_priv->dt_type);
  4244. plat_priv->use_fw_path_with_prefix =
  4245. cnss_use_fw_path_with_prefix(plat_priv);
  4246. ret = cnss_get_dev_cfg_node(plat_priv);
  4247. if (ret) {
  4248. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4249. goto reset_plat_dev;
  4250. }
  4251. cnss_initialize_mem_pool(plat_priv->device_id);
  4252. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4253. if (ret)
  4254. cnss_pr_vdbg("Failed to find bus ops name, err = %d\n",
  4255. ret);
  4256. ret = cnss_get_rc_num(plat_priv);
  4257. if (ret)
  4258. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4259. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4260. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4261. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4262. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4263. cnss_set_plat_priv(plat_dev, plat_priv);
  4264. cnss_set_device_name(plat_priv);
  4265. platform_set_drvdata(plat_dev, plat_priv);
  4266. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4267. INIT_LIST_HEAD(&plat_priv->clk_list);
  4268. cnss_get_pm_domain_info(plat_priv);
  4269. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4270. cnss_power_misc_params_init(plat_priv);
  4271. cnss_get_tcs_info(plat_priv);
  4272. cnss_get_cpr_info(plat_priv);
  4273. cnss_aop_interface_init(plat_priv);
  4274. cnss_init_control_params(plat_priv);
  4275. ret = cnss_get_resources(plat_priv);
  4276. if (ret)
  4277. goto reset_ctx;
  4278. ret = cnss_register_esoc(plat_priv);
  4279. if (ret)
  4280. goto free_res;
  4281. ret = cnss_register_bus_scale(plat_priv);
  4282. if (ret)
  4283. goto unreg_esoc;
  4284. ret = cnss_create_sysfs(plat_priv);
  4285. if (ret)
  4286. goto unreg_bus_scale;
  4287. ret = cnss_event_work_init(plat_priv);
  4288. if (ret)
  4289. goto remove_sysfs;
  4290. ret = cnss_dms_init(plat_priv);
  4291. if (ret)
  4292. goto deinit_event_work;
  4293. ret = cnss_debugfs_create(plat_priv);
  4294. if (ret)
  4295. goto deinit_dms;
  4296. ret = cnss_misc_init(plat_priv);
  4297. if (ret)
  4298. goto destroy_debugfs;
  4299. ret = cnss_wlan_hw_disable_check(plat_priv);
  4300. if (ret)
  4301. goto deinit_misc;
  4302. /* Make sure all platform related init are done before
  4303. * device power on and bus init.
  4304. */
  4305. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4306. ret = cnss_wlan_device_init(plat_priv);
  4307. if (ret)
  4308. goto deinit_misc;
  4309. } else {
  4310. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4311. }
  4312. cnss_register_coex_service(plat_priv);
  4313. cnss_register_ims_service(plat_priv);
  4314. mutex_init(&plat_priv->tcdev_lock);
  4315. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4316. cnss_pr_info("Platform driver probed successfully.\n");
  4317. return 0;
  4318. deinit_misc:
  4319. cnss_misc_deinit(plat_priv);
  4320. destroy_debugfs:
  4321. cnss_debugfs_destroy(plat_priv);
  4322. deinit_dms:
  4323. cnss_dms_deinit(plat_priv);
  4324. deinit_event_work:
  4325. cnss_event_work_deinit(plat_priv);
  4326. remove_sysfs:
  4327. cnss_remove_sysfs(plat_priv);
  4328. unreg_bus_scale:
  4329. cnss_unregister_bus_scale(plat_priv);
  4330. unreg_esoc:
  4331. cnss_unregister_esoc(plat_priv);
  4332. free_res:
  4333. cnss_put_resources(plat_priv);
  4334. reset_ctx:
  4335. cnss_aop_interface_deinit(plat_priv);
  4336. platform_set_drvdata(plat_dev, NULL);
  4337. cnss_deinitialize_mem_pool();
  4338. reset_plat_dev:
  4339. cnss_clear_plat_priv(plat_priv);
  4340. out:
  4341. return ret;
  4342. }
  4343. static int cnss_remove(struct platform_device *plat_dev)
  4344. {
  4345. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4346. plat_priv->audio_iommu_domain = NULL;
  4347. cnss_genl_exit();
  4348. cnss_unregister_ims_service(plat_priv);
  4349. cnss_unregister_coex_service(plat_priv);
  4350. cnss_bus_deinit(plat_priv);
  4351. cnss_misc_deinit(plat_priv);
  4352. cnss_debugfs_destroy(plat_priv);
  4353. cnss_dms_deinit(plat_priv);
  4354. cnss_qmi_deinit(plat_priv);
  4355. cnss_event_work_deinit(plat_priv);
  4356. cnss_cancel_dms_work();
  4357. cnss_remove_sysfs(plat_priv);
  4358. cnss_unregister_bus_scale(plat_priv);
  4359. cnss_unregister_esoc(plat_priv);
  4360. cnss_put_resources(plat_priv);
  4361. cnss_aop_interface_deinit(plat_priv);
  4362. cnss_deinitialize_mem_pool();
  4363. platform_set_drvdata(plat_dev, NULL);
  4364. cnss_clear_plat_priv(plat_priv);
  4365. return 0;
  4366. }
  4367. static struct platform_driver cnss_platform_driver = {
  4368. .probe = cnss_probe,
  4369. .remove = cnss_remove,
  4370. .driver = {
  4371. .name = "cnss2",
  4372. .of_match_table = cnss_of_match_table,
  4373. #ifdef CONFIG_CNSS_ASYNC
  4374. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4375. #endif
  4376. },
  4377. };
  4378. static bool cnss_check_compatible_node(void)
  4379. {
  4380. struct device_node *dn = NULL;
  4381. for_each_matching_node(dn, cnss_of_match_table) {
  4382. if (of_device_is_available(dn)) {
  4383. cnss_allow_driver_loading = true;
  4384. return true;
  4385. }
  4386. }
  4387. return false;
  4388. }
  4389. /**
  4390. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4391. *
  4392. * Valid device tree node means a node with "compatible" property from the
  4393. * device match table and "status" property is not disabled.
  4394. *
  4395. * Return: true if valid device tree node found, false if not found
  4396. */
  4397. static bool cnss_is_valid_dt_node_found(void)
  4398. {
  4399. struct device_node *dn = NULL;
  4400. for_each_matching_node(dn, cnss_of_match_table) {
  4401. if (of_device_is_available(dn))
  4402. break;
  4403. }
  4404. if (dn)
  4405. return true;
  4406. return false;
  4407. }
  4408. static int __init cnss_initialize(void)
  4409. {
  4410. int ret = 0;
  4411. if (!cnss_is_valid_dt_node_found())
  4412. return -ENODEV;
  4413. if (!cnss_check_compatible_node())
  4414. return ret;
  4415. cnss_debug_init();
  4416. ret = platform_driver_register(&cnss_platform_driver);
  4417. if (ret)
  4418. cnss_debug_deinit();
  4419. ret = cnss_genl_init();
  4420. if (ret < 0)
  4421. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4422. return ret;
  4423. }
  4424. static void __exit cnss_exit(void)
  4425. {
  4426. cnss_genl_exit();
  4427. platform_driver_unregister(&cnss_platform_driver);
  4428. cnss_debug_deinit();
  4429. }
  4430. module_init(cnss_initialize);
  4431. module_exit(cnss_exit);
  4432. MODULE_LICENSE("GPL v2");
  4433. MODULE_DESCRIPTION("CNSS2 Platform Driver");