dp_main.c 116 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <hal_api.h>
  23. #include <hif.h>
  24. #include <htt.h>
  25. #include <wdi_event.h>
  26. #include <queue.h>
  27. #include "dp_htt.h"
  28. #include "dp_types.h"
  29. #include "dp_internal.h"
  30. #include "dp_tx.h"
  31. #include "dp_rx.h"
  32. #include <cdp_txrx_handle.h>
  33. #include <wlan_cfg.h>
  34. #include "cdp_txrx_cmn_struct.h"
  35. #include <qdf_util.h>
  36. #include "dp_peer.h"
  37. #include "dp_rx_mon.h"
  38. #include "htt_stats.h"
  39. #define DP_INTR_POLL_TIMER_MS 10
  40. #define DP_MCS_LENGTH (6*MAX_MCS)
  41. #define DP_NSS_LENGTH (6*SS_COUNT)
  42. #define DP_RXDMA_ERR_LENGTH (6*MAX_RXDMA_ERRORS)
  43. #define DP_REO_ERR_LENGTH (6*REO_ERROR_TYPE_MAX)
  44. #define DP_CURR_FW_STATS_AVAIL 19
  45. #define DP_HTT_DBG_EXT_STATS_MAX 256
  46. /**
  47. * default_dscp_tid_map - Default DSCP-TID mapping
  48. *
  49. * DSCP TID AC
  50. * 000000 0 WME_AC_BE
  51. * 001000 1 WME_AC_BK
  52. * 010000 1 WME_AC_BK
  53. * 011000 0 WME_AC_BE
  54. * 100000 5 WME_AC_VI
  55. * 101000 5 WME_AC_VI
  56. * 110000 6 WME_AC_VO
  57. * 111000 6 WME_AC_VO
  58. */
  59. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  60. 0, 0, 0, 0, 0, 0, 0, 0,
  61. 1, 1, 1, 1, 1, 1, 1, 1,
  62. 1, 1, 1, 1, 1, 1, 1, 1,
  63. 0, 0, 0, 0, 0, 0, 0, 0,
  64. 5, 5, 5, 5, 5, 5, 5, 5,
  65. 5, 5, 5, 5, 5, 5, 5, 5,
  66. 6, 6, 6, 6, 6, 6, 6, 6,
  67. 6, 6, 6, 6, 6, 6, 6, 6,
  68. };
  69. /**
  70. * @brief Select the type of statistics
  71. */
  72. enum dp_stats_type {
  73. STATS_FW = 0,
  74. STATS_HOST = 1,
  75. STATS_TYPE_MAX = 2,
  76. };
  77. /**
  78. * @brief General Firmware statistics options
  79. *
  80. */
  81. enum dp_fw_stats {
  82. TXRX_FW_STATS_INVALID = -1,
  83. };
  84. /**
  85. * @brief Firmware and Host statistics
  86. * currently supported
  87. */
  88. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  89. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  90. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  91. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  92. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  93. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  94. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  95. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  96. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  97. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  98. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  99. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  100. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  101. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  102. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  103. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  104. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  105. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  106. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  107. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  108. /* Last ENUM for HTT FW STATS */
  109. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  110. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  111. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  112. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  113. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  114. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  115. };
  116. /**
  117. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  118. */
  119. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  120. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  121. {
  122. void *hal_soc = soc->hal_soc;
  123. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  124. /* TODO: See if we should get align size from hal */
  125. uint32_t ring_base_align = 8;
  126. struct hal_srng_params ring_params;
  127. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  128. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  129. srng->hal_srng = NULL;
  130. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  131. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  132. soc->osdev, soc->osdev->dev, srng->alloc_size,
  133. &(srng->base_paddr_unaligned));
  134. if (!srng->base_vaddr_unaligned) {
  135. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  136. FL("alloc failed - ring_type: %d, ring_num %d"),
  137. ring_type, ring_num);
  138. return QDF_STATUS_E_NOMEM;
  139. }
  140. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  141. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  142. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  143. ((unsigned long)(ring_params.ring_base_vaddr) -
  144. (unsigned long)srng->base_vaddr_unaligned);
  145. ring_params.num_entries = num_entries;
  146. /* TODO: Check MSI support and get MSI settings from HIF layer */
  147. ring_params.msi_data = 0;
  148. ring_params.msi_addr = 0;
  149. /* TODO: Setup interrupt timer and batch counter thresholds for
  150. * interrupt mitigation based on ring type
  151. */
  152. ring_params.intr_timer_thres_us = 8;
  153. ring_params.intr_batch_cntr_thres_entries = 1;
  154. /* TODO: Currently hal layer takes care of endianness related settings.
  155. * See if these settings need to passed from DP layer
  156. */
  157. ring_params.flags = 0;
  158. /* Enable low threshold interrupts for rx buffer rings (regular and
  159. * monitor buffer rings.
  160. * TODO: See if this is required for any other ring
  161. */
  162. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  163. /* TODO: Setting low threshold to 1/8th of ring size
  164. * see if this needs to be configurable
  165. */
  166. ring_params.low_threshold = num_entries >> 3;
  167. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  168. }
  169. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  170. mac_id, &ring_params);
  171. return 0;
  172. }
  173. /**
  174. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  175. * Any buffers allocated and attached to ring entries are expected to be freed
  176. * before calling this function.
  177. */
  178. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  179. int ring_type, int ring_num)
  180. {
  181. if (!srng->hal_srng) {
  182. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  183. FL("Ring type: %d, num:%d not setup"),
  184. ring_type, ring_num);
  185. return;
  186. }
  187. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  188. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  189. srng->alloc_size,
  190. srng->base_vaddr_unaligned,
  191. srng->base_paddr_unaligned, 0);
  192. }
  193. /* TODO: Need this interface from HIF */
  194. void *hif_get_hal_handle(void *hif_handle);
  195. /*
  196. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  197. * @dp_ctx: DP SOC handle
  198. * @budget: Number of frames/descriptors that can be processed in one shot
  199. *
  200. * Return: remaining budget/quota for the soc device
  201. */
  202. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  203. {
  204. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  205. struct dp_soc *soc = int_ctx->soc;
  206. int ring = 0;
  207. uint32_t work_done = 0;
  208. uint32_t budget = dp_budget;
  209. uint8_t tx_mask = int_ctx->tx_ring_mask;
  210. uint8_t rx_mask = int_ctx->rx_ring_mask;
  211. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  212. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  213. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  214. /* Process Tx completion interrupts first to return back buffers */
  215. if (tx_mask) {
  216. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  217. if (tx_mask & (1 << ring)) {
  218. work_done =
  219. dp_tx_comp_handler(soc, ring, budget);
  220. budget -= work_done;
  221. if (work_done)
  222. QDF_TRACE(QDF_MODULE_ID_DP,
  223. QDF_TRACE_LEVEL_INFO,
  224. "tx mask 0x%x ring %d,"
  225. "budget %d",
  226. tx_mask, ring, budget);
  227. if (budget <= 0)
  228. goto budget_done;
  229. }
  230. }
  231. }
  232. /* Process REO Exception ring interrupt */
  233. if (rx_err_mask) {
  234. work_done = dp_rx_err_process(soc,
  235. soc->reo_exception_ring.hal_srng, budget);
  236. budget -= work_done;
  237. if (work_done)
  238. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  239. "REO Exception Ring: work_done %d budget %d",
  240. work_done, budget);
  241. if (budget <= 0) {
  242. goto budget_done;
  243. }
  244. }
  245. /* Process Rx WBM release ring interrupt */
  246. if (rx_wbm_rel_mask) {
  247. work_done = dp_rx_wbm_err_process(soc,
  248. soc->rx_rel_ring.hal_srng, budget);
  249. budget -= work_done;
  250. if (work_done)
  251. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  252. "WBM Release Ring: work_done %d budget %d",
  253. work_done, budget);
  254. if (budget <= 0) {
  255. goto budget_done;
  256. }
  257. }
  258. /* Process Rx interrupts */
  259. if (rx_mask) {
  260. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  261. if (rx_mask & (1 << ring)) {
  262. work_done =
  263. dp_rx_process(int_ctx,
  264. soc->reo_dest_ring[ring].hal_srng,
  265. budget);
  266. budget -= work_done;
  267. if (work_done)
  268. QDF_TRACE(QDF_MODULE_ID_DP,
  269. QDF_TRACE_LEVEL_INFO,
  270. "rx mask 0x%x ring %d,"
  271. "budget %d",
  272. tx_mask, ring, budget);
  273. if (budget <= 0)
  274. goto budget_done;
  275. }
  276. }
  277. }
  278. if (reo_status_mask)
  279. dp_reo_status_ring_handler(soc);
  280. /* Process Rx monitor interrupts */
  281. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  282. if (int_ctx->rx_mon_ring_mask & (1 << ring)) {
  283. work_done =
  284. dp_mon_process(soc, ring, budget);
  285. budget -= work_done;
  286. }
  287. }
  288. qdf_lro_flush(int_ctx->lro_ctx);
  289. budget_done:
  290. return dp_budget - budget;
  291. }
  292. /* dp_interrupt_timer()- timer poll for interrupts
  293. *
  294. * @arg: SoC Handle
  295. *
  296. * Return:
  297. *
  298. */
  299. #ifdef DP_INTR_POLL_BASED
  300. static void dp_interrupt_timer(void *arg)
  301. {
  302. struct dp_soc *soc = (struct dp_soc *) arg;
  303. int i;
  304. if (qdf_atomic_read(&soc->cmn_init_done)) {
  305. for (i = 0;
  306. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  307. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  308. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  309. }
  310. }
  311. /*
  312. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  313. * @txrx_soc: DP SOC handle
  314. *
  315. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  316. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  317. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  318. *
  319. * Return: 0 for success. nonzero for failure.
  320. */
  321. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  322. {
  323. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  324. int i;
  325. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  326. soc->intr_ctx[i].tx_ring_mask = 0xF;
  327. soc->intr_ctx[i].rx_ring_mask = 0xF;
  328. soc->intr_ctx[i].rx_mon_ring_mask = 0x1;
  329. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  330. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  331. soc->intr_ctx[i].reo_status_ring_mask = 0x1;
  332. soc->intr_ctx[i].soc = soc;
  333. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  334. }
  335. qdf_timer_init(soc->osdev, &soc->int_timer,
  336. dp_interrupt_timer, (void *)soc,
  337. QDF_TIMER_TYPE_WAKE_APPS);
  338. return QDF_STATUS_SUCCESS;
  339. }
  340. /*
  341. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  342. * @txrx_soc: DP SOC handle
  343. *
  344. * Return: void
  345. */
  346. static void dp_soc_interrupt_detach(void *txrx_soc)
  347. {
  348. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  349. qdf_timer_stop(&soc->int_timer);
  350. qdf_timer_free(&soc->int_timer);
  351. }
  352. #else
  353. /*
  354. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  355. * @txrx_soc: DP SOC handle
  356. *
  357. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  358. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  359. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  360. *
  361. * Return: 0 for success. nonzero for failure.
  362. */
  363. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  364. {
  365. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  366. int i = 0;
  367. int num_irq = 0;
  368. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  369. int j = 0;
  370. int ret = 0;
  371. /* Map of IRQ ids registered with one interrupt context */
  372. int irq_id_map[HIF_MAX_GRP_IRQ];
  373. int tx_mask =
  374. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  375. int rx_mask =
  376. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  377. int rx_mon_mask =
  378. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  379. /*
  380. * Mapping the exception/status rings to IRQ Group 0 (CPU 0).
  381. * Later add wlan_cfg interface for these masks
  382. */
  383. int rx_err_ring_mask = 0x1;
  384. int rx_wbm_rel_ring_mask = 0x1;
  385. int reo_status_ring_mask = 0x1;
  386. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  387. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  388. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  389. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  390. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  391. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  392. soc->intr_ctx[i].soc = soc;
  393. num_irq = 0;
  394. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  395. if (tx_mask & (1 << j)) {
  396. irq_id_map[num_irq++] =
  397. (wbm2host_tx_completions_ring1 - j);
  398. }
  399. if (rx_mask & (1 << j)) {
  400. irq_id_map[num_irq++] =
  401. (reo2host_destination_ring1 - j);
  402. }
  403. if (rx_mon_mask & (1 << j)) {
  404. irq_id_map[num_irq++] =
  405. (rxdma2host_monitor_destination_mac1
  406. - j);
  407. }
  408. if (rx_wbm_rel_ring_mask & (1 << j))
  409. irq_id_map[num_irq++] = wbm2host_rx_release;
  410. if (rx_err_ring_mask & (1 << j))
  411. irq_id_map[num_irq++] = reo2host_exception;
  412. if (reo_status_ring_mask & (1 << j))
  413. irq_id_map[num_irq++] = reo2host_status;
  414. }
  415. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  416. num_irq, irq_id_map,
  417. dp_service_srngs,
  418. &soc->intr_ctx[i]);
  419. if (ret) {
  420. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  421. FL("failed, ret = %d"), ret);
  422. return QDF_STATUS_E_FAILURE;
  423. }
  424. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  425. }
  426. hif_configure_ext_group_interrupts(soc->hif_handle);
  427. return QDF_STATUS_SUCCESS;
  428. }
  429. /*
  430. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  431. * @txrx_soc: DP SOC handle
  432. *
  433. * Return: void
  434. */
  435. static void dp_soc_interrupt_detach(void *txrx_soc)
  436. {
  437. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  438. int i;
  439. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  440. soc->intr_ctx[i].tx_ring_mask = 0;
  441. soc->intr_ctx[i].rx_ring_mask = 0;
  442. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  443. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  444. }
  445. }
  446. #endif
  447. #define AVG_MAX_MPDUS_PER_TID 128
  448. #define AVG_TIDS_PER_CLIENT 2
  449. #define AVG_FLOWS_PER_TID 2
  450. #define AVG_MSDUS_PER_FLOW 128
  451. #define AVG_MSDUS_PER_MPDU 4
  452. /*
  453. * Allocate and setup link descriptor pool that will be used by HW for
  454. * various link and queue descriptors and managed by WBM
  455. */
  456. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  457. {
  458. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  459. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  460. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  461. uint32_t num_mpdus_per_link_desc =
  462. hal_num_mpdus_per_link_desc(soc->hal_soc);
  463. uint32_t num_msdus_per_link_desc =
  464. hal_num_msdus_per_link_desc(soc->hal_soc);
  465. uint32_t num_mpdu_links_per_queue_desc =
  466. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  467. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  468. uint32_t total_link_descs, total_mem_size;
  469. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  470. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  471. uint32_t num_link_desc_banks;
  472. uint32_t last_bank_size = 0;
  473. uint32_t entry_size, num_entries;
  474. int i;
  475. /* Only Tx queue descriptors are allocated from common link descriptor
  476. * pool Rx queue descriptors are not included in this because (REO queue
  477. * extension descriptors) they are expected to be allocated contiguously
  478. * with REO queue descriptors
  479. */
  480. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  481. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  482. num_mpdu_queue_descs = num_mpdu_link_descs /
  483. num_mpdu_links_per_queue_desc;
  484. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  485. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  486. num_msdus_per_link_desc;
  487. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  488. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  489. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  490. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  491. /* Round up to power of 2 */
  492. total_link_descs = 1;
  493. while (total_link_descs < num_entries)
  494. total_link_descs <<= 1;
  495. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  496. FL("total_link_descs: %u, link_desc_size: %d"),
  497. total_link_descs, link_desc_size);
  498. total_mem_size = total_link_descs * link_desc_size;
  499. total_mem_size += link_desc_align;
  500. if (total_mem_size <= max_alloc_size) {
  501. num_link_desc_banks = 0;
  502. last_bank_size = total_mem_size;
  503. } else {
  504. num_link_desc_banks = (total_mem_size) /
  505. (max_alloc_size - link_desc_align);
  506. last_bank_size = total_mem_size %
  507. (max_alloc_size - link_desc_align);
  508. }
  509. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  510. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  511. total_mem_size, num_link_desc_banks);
  512. for (i = 0; i < num_link_desc_banks; i++) {
  513. soc->link_desc_banks[i].base_vaddr_unaligned =
  514. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  515. max_alloc_size,
  516. &(soc->link_desc_banks[i].base_paddr_unaligned));
  517. soc->link_desc_banks[i].size = max_alloc_size;
  518. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  519. soc->link_desc_banks[i].base_vaddr_unaligned) +
  520. ((unsigned long)(
  521. soc->link_desc_banks[i].base_vaddr_unaligned) %
  522. link_desc_align));
  523. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  524. soc->link_desc_banks[i].base_paddr_unaligned) +
  525. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  526. (unsigned long)(
  527. soc->link_desc_banks[i].base_vaddr_unaligned));
  528. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  529. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  530. FL("Link descriptor memory alloc failed"));
  531. goto fail;
  532. }
  533. }
  534. if (last_bank_size) {
  535. /* Allocate last bank in case total memory required is not exact
  536. * multiple of max_alloc_size
  537. */
  538. soc->link_desc_banks[i].base_vaddr_unaligned =
  539. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  540. last_bank_size,
  541. &(soc->link_desc_banks[i].base_paddr_unaligned));
  542. soc->link_desc_banks[i].size = last_bank_size;
  543. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  544. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  545. ((unsigned long)(
  546. soc->link_desc_banks[i].base_vaddr_unaligned) %
  547. link_desc_align));
  548. soc->link_desc_banks[i].base_paddr =
  549. (unsigned long)(
  550. soc->link_desc_banks[i].base_paddr_unaligned) +
  551. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  552. (unsigned long)(
  553. soc->link_desc_banks[i].base_vaddr_unaligned));
  554. }
  555. /* Allocate and setup link descriptor idle list for HW internal use */
  556. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  557. total_mem_size = entry_size * total_link_descs;
  558. if (total_mem_size <= max_alloc_size) {
  559. void *desc;
  560. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  561. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  562. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  563. FL("Link desc idle ring setup failed"));
  564. goto fail;
  565. }
  566. hal_srng_access_start_unlocked(soc->hal_soc,
  567. soc->wbm_idle_link_ring.hal_srng);
  568. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  569. soc->link_desc_banks[i].base_paddr; i++) {
  570. uint32_t num_entries = (soc->link_desc_banks[i].size -
  571. ((unsigned long)(
  572. soc->link_desc_banks[i].base_vaddr) -
  573. (unsigned long)(
  574. soc->link_desc_banks[i].base_vaddr_unaligned)))
  575. / link_desc_size;
  576. unsigned long paddr = (unsigned long)(
  577. soc->link_desc_banks[i].base_paddr);
  578. while (num_entries && (desc = hal_srng_src_get_next(
  579. soc->hal_soc,
  580. soc->wbm_idle_link_ring.hal_srng))) {
  581. hal_set_link_desc_addr(desc, i, paddr);
  582. num_entries--;
  583. paddr += link_desc_size;
  584. }
  585. }
  586. hal_srng_access_end_unlocked(soc->hal_soc,
  587. soc->wbm_idle_link_ring.hal_srng);
  588. } else {
  589. uint32_t num_scatter_bufs;
  590. uint32_t num_entries_per_buf;
  591. uint32_t rem_entries;
  592. uint8_t *scatter_buf_ptr;
  593. uint16_t scatter_buf_num;
  594. soc->wbm_idle_scatter_buf_size =
  595. hal_idle_list_scatter_buf_size(soc->hal_soc);
  596. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  597. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  598. num_scatter_bufs = (total_mem_size /
  599. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  600. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  601. for (i = 0; i < num_scatter_bufs; i++) {
  602. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  603. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  604. soc->wbm_idle_scatter_buf_size,
  605. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  606. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  607. QDF_TRACE(QDF_MODULE_ID_DP,
  608. QDF_TRACE_LEVEL_ERROR,
  609. FL("Scatter list memory alloc failed"));
  610. goto fail;
  611. }
  612. }
  613. /* Populate idle list scatter buffers with link descriptor
  614. * pointers
  615. */
  616. scatter_buf_num = 0;
  617. scatter_buf_ptr = (uint8_t *)(
  618. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  619. rem_entries = num_entries_per_buf;
  620. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  621. soc->link_desc_banks[i].base_paddr; i++) {
  622. uint32_t num_link_descs =
  623. (soc->link_desc_banks[i].size -
  624. ((unsigned long)(
  625. soc->link_desc_banks[i].base_vaddr) -
  626. (unsigned long)(
  627. soc->link_desc_banks[i].base_vaddr_unaligned)))
  628. / link_desc_size;
  629. unsigned long paddr = (unsigned long)(
  630. soc->link_desc_banks[i].base_paddr);
  631. void *desc = NULL;
  632. while (num_link_descs && (desc =
  633. hal_srng_src_get_next(soc->hal_soc,
  634. soc->wbm_idle_link_ring.hal_srng))) {
  635. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  636. i, paddr);
  637. num_link_descs--;
  638. paddr += link_desc_size;
  639. if (rem_entries) {
  640. rem_entries--;
  641. scatter_buf_ptr += link_desc_size;
  642. } else {
  643. rem_entries = num_entries_per_buf;
  644. scatter_buf_num++;
  645. scatter_buf_ptr = (uint8_t *)(
  646. soc->wbm_idle_scatter_buf_base_vaddr[
  647. scatter_buf_num]);
  648. }
  649. }
  650. }
  651. /* Setup link descriptor idle list in HW */
  652. hal_setup_link_idle_list(soc->hal_soc,
  653. soc->wbm_idle_scatter_buf_base_paddr,
  654. soc->wbm_idle_scatter_buf_base_vaddr,
  655. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  656. (uint32_t)(scatter_buf_ptr -
  657. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  658. scatter_buf_num])));
  659. }
  660. return 0;
  661. fail:
  662. if (soc->wbm_idle_link_ring.hal_srng) {
  663. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  664. WBM_IDLE_LINK, 0);
  665. }
  666. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  667. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  668. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  669. soc->wbm_idle_scatter_buf_size,
  670. soc->wbm_idle_scatter_buf_base_vaddr[i],
  671. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  672. }
  673. }
  674. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  675. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  676. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  677. soc->link_desc_banks[i].size,
  678. soc->link_desc_banks[i].base_vaddr_unaligned,
  679. soc->link_desc_banks[i].base_paddr_unaligned,
  680. 0);
  681. }
  682. }
  683. return QDF_STATUS_E_FAILURE;
  684. }
  685. #ifdef notused
  686. /*
  687. * Free link descriptor pool that was setup HW
  688. */
  689. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  690. {
  691. int i;
  692. if (soc->wbm_idle_link_ring.hal_srng) {
  693. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  694. WBM_IDLE_LINK, 0);
  695. }
  696. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  697. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  698. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  699. soc->wbm_idle_scatter_buf_size,
  700. soc->wbm_idle_scatter_buf_base_vaddr[i],
  701. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  702. }
  703. }
  704. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  705. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  706. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  707. soc->link_desc_banks[i].size,
  708. soc->link_desc_banks[i].base_vaddr_unaligned,
  709. soc->link_desc_banks[i].base_paddr_unaligned,
  710. 0);
  711. }
  712. }
  713. }
  714. #endif /* notused */
  715. /* TODO: Following should be configurable */
  716. #define WBM_RELEASE_RING_SIZE 64
  717. #define TCL_DATA_RING_SIZE 512
  718. #define TX_COMP_RING_SIZE 1024
  719. #define TCL_CMD_RING_SIZE 32
  720. #define TCL_STATUS_RING_SIZE 32
  721. #define REO_DST_RING_SIZE 2048
  722. #define REO_REINJECT_RING_SIZE 32
  723. #define RX_RELEASE_RING_SIZE 1024
  724. #define REO_EXCEPTION_RING_SIZE 128
  725. #define REO_CMD_RING_SIZE 32
  726. #define REO_STATUS_RING_SIZE 32
  727. #define RXDMA_BUF_RING_SIZE 1024
  728. #define RXDMA_REFILL_RING_SIZE 2048
  729. #define RXDMA_MONITOR_BUF_RING_SIZE 1024
  730. #define RXDMA_MONITOR_DST_RING_SIZE 1024
  731. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  732. #define RXDMA_MONITOR_DESC_RING_SIZE 1024
  733. /*
  734. * dp_soc_cmn_setup() - Common SoC level initializion
  735. * @soc: Datapath SOC handle
  736. *
  737. * This is an internal function used to setup common SOC data structures,
  738. * to be called from PDEV attach after receiving HW mode capabilities from FW
  739. */
  740. static int dp_soc_cmn_setup(struct dp_soc *soc)
  741. {
  742. int i;
  743. struct hal_reo_params reo_params;
  744. if (qdf_atomic_read(&soc->cmn_init_done))
  745. return 0;
  746. if (dp_peer_find_attach(soc))
  747. goto fail0;
  748. if (dp_hw_link_desc_pool_setup(soc))
  749. goto fail1;
  750. /* Setup SRNG rings */
  751. /* Common rings */
  752. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  753. WBM_RELEASE_RING_SIZE)) {
  754. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  755. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  756. goto fail1;
  757. }
  758. soc->num_tcl_data_rings = 0;
  759. /* Tx data rings */
  760. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  761. soc->num_tcl_data_rings =
  762. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  763. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  764. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  765. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  766. QDF_TRACE(QDF_MODULE_ID_DP,
  767. QDF_TRACE_LEVEL_ERROR,
  768. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  769. goto fail1;
  770. }
  771. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  772. WBM2SW_RELEASE, i, 0, TX_COMP_RING_SIZE)) {
  773. QDF_TRACE(QDF_MODULE_ID_DP,
  774. QDF_TRACE_LEVEL_ERROR,
  775. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  776. goto fail1;
  777. }
  778. }
  779. } else {
  780. /* This will be incremented during per pdev ring setup */
  781. soc->num_tcl_data_rings = 0;
  782. }
  783. if (dp_tx_soc_attach(soc)) {
  784. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  785. FL("dp_tx_soc_attach failed"));
  786. goto fail1;
  787. }
  788. /* TCL command and status rings */
  789. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  790. TCL_CMD_RING_SIZE)) {
  791. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  792. FL("dp_srng_setup failed for tcl_cmd_ring"));
  793. goto fail1;
  794. }
  795. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  796. TCL_STATUS_RING_SIZE)) {
  797. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  798. FL("dp_srng_setup failed for tcl_status_ring"));
  799. goto fail1;
  800. }
  801. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  802. * descriptors
  803. */
  804. /* Rx data rings */
  805. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  806. soc->num_reo_dest_rings =
  807. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  808. QDF_TRACE(QDF_MODULE_ID_DP,
  809. QDF_TRACE_LEVEL_ERROR,
  810. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  811. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  812. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  813. i, 0, REO_DST_RING_SIZE)) {
  814. QDF_TRACE(QDF_MODULE_ID_DP,
  815. QDF_TRACE_LEVEL_ERROR,
  816. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  817. goto fail1;
  818. }
  819. }
  820. } else {
  821. /* This will be incremented during per pdev ring setup */
  822. soc->num_reo_dest_rings = 0;
  823. }
  824. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  825. /* REO reinjection ring */
  826. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  827. REO_REINJECT_RING_SIZE)) {
  828. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  829. FL("dp_srng_setup failed for reo_reinject_ring"));
  830. goto fail1;
  831. }
  832. /* Rx release ring */
  833. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  834. RX_RELEASE_RING_SIZE)) {
  835. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  836. FL("dp_srng_setup failed for rx_rel_ring"));
  837. goto fail1;
  838. }
  839. /* Rx exception ring */
  840. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  841. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  842. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  843. FL("dp_srng_setup failed for reo_exception_ring"));
  844. goto fail1;
  845. }
  846. /* REO command and status rings */
  847. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  848. REO_CMD_RING_SIZE)) {
  849. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  850. FL("dp_srng_setup failed for reo_cmd_ring"));
  851. goto fail1;
  852. }
  853. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  854. TAILQ_INIT(&soc->rx.reo_cmd_list);
  855. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  856. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  857. REO_STATUS_RING_SIZE)) {
  858. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  859. FL("dp_srng_setup failed for reo_status_ring"));
  860. goto fail1;
  861. }
  862. /* Setup HW REO */
  863. qdf_mem_zero(&reo_params, sizeof(reo_params));
  864. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx))
  865. reo_params.rx_hash_enabled = true;
  866. hal_reo_setup(soc->hal_soc, &reo_params);
  867. qdf_atomic_set(&soc->cmn_init_done, 1);
  868. qdf_nbuf_queue_init(&soc->htt_stats_msg);
  869. return 0;
  870. fail1:
  871. /*
  872. * Cleanup will be done as part of soc_detach, which will
  873. * be called on pdev attach failure
  874. */
  875. fail0:
  876. return QDF_STATUS_E_FAILURE;
  877. }
  878. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  879. static void dp_lro_hash_setup(struct dp_soc *soc)
  880. {
  881. struct cdp_lro_hash_config lro_hash;
  882. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  883. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  884. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  885. FL("LRO disabled RX hash disabled"));
  886. return;
  887. }
  888. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  889. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  890. lro_hash.lro_enable = 1;
  891. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  892. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  893. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  894. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  895. }
  896. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, FL("enabled"));
  897. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  898. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  899. LRO_IPV4_SEED_ARR_SZ));
  900. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  901. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  902. LRO_IPV6_SEED_ARR_SZ));
  903. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  904. "lro_hash: lro_enable: 0x%x"
  905. "lro_hash: tcp_flag 0x%x tcp_flag_mask 0x%x",
  906. lro_hash.lro_enable, lro_hash.tcp_flag,
  907. lro_hash.tcp_flag_mask);
  908. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  909. FL("lro_hash: toeplitz_hash_ipv4:"));
  910. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  911. QDF_TRACE_LEVEL_ERROR,
  912. (void *)lro_hash.toeplitz_hash_ipv4,
  913. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  914. LRO_IPV4_SEED_ARR_SZ));
  915. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  916. FL("lro_hash: toeplitz_hash_ipv6:"));
  917. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  918. QDF_TRACE_LEVEL_ERROR,
  919. (void *)lro_hash.toeplitz_hash_ipv6,
  920. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  921. LRO_IPV6_SEED_ARR_SZ));
  922. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  923. if (soc->cdp_soc.ol_ops->lro_hash_config)
  924. (void)soc->cdp_soc.ol_ops->lro_hash_config
  925. (soc->osif_soc, &lro_hash);
  926. }
  927. /*
  928. * dp_rxdma_ring_setup() - configure the RX DMA rings
  929. * @soc: data path SoC handle
  930. * @pdev: Physical device handle
  931. *
  932. * Return: 0 - success, > 0 - failure
  933. */
  934. #ifdef QCA_HOST2FW_RXBUF_RING
  935. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  936. struct dp_pdev *pdev)
  937. {
  938. int max_mac_rings =
  939. wlan_cfg_get_num_mac_rings
  940. (pdev->wlan_cfg_ctx);
  941. int i;
  942. for (i = 0; i < max_mac_rings; i++) {
  943. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  944. "%s: pdev_id %d mac_id %d\n",
  945. __func__, pdev->pdev_id, i);
  946. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  947. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  948. QDF_TRACE(QDF_MODULE_ID_DP,
  949. QDF_TRACE_LEVEL_ERROR,
  950. FL("failed rx mac ring setup"));
  951. return QDF_STATUS_E_FAILURE;
  952. }
  953. }
  954. return QDF_STATUS_SUCCESS;
  955. }
  956. #else
  957. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  958. struct dp_pdev *pdev)
  959. {
  960. return QDF_STATUS_SUCCESS;
  961. }
  962. #endif
  963. /**
  964. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  965. * @pdev - DP_PDEV handle
  966. *
  967. * Return: void
  968. */
  969. static inline void
  970. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  971. {
  972. uint8_t map_id;
  973. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  974. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  975. sizeof(default_dscp_tid_map));
  976. }
  977. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  978. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  979. pdev->dscp_tid_map[map_id],
  980. map_id);
  981. }
  982. }
  983. /*
  984. * dp_pdev_attach_wifi3() - attach txrx pdev
  985. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  986. * @txrx_soc: Datapath SOC handle
  987. * @htc_handle: HTC handle for host-target interface
  988. * @qdf_osdev: QDF OS device
  989. * @pdev_id: PDEV ID
  990. *
  991. * Return: DP PDEV handle on success, NULL on failure
  992. */
  993. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  994. struct cdp_cfg *ctrl_pdev,
  995. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  996. {
  997. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  998. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  999. if (!pdev) {
  1000. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1001. FL("DP PDEV memory allocation failed"));
  1002. goto fail0;
  1003. }
  1004. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  1005. if (!pdev->wlan_cfg_ctx) {
  1006. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1007. FL("pdev cfg_attach failed"));
  1008. qdf_mem_free(pdev);
  1009. goto fail0;
  1010. }
  1011. /*
  1012. * set nss pdev config based on soc config
  1013. */
  1014. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  1015. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev->pdev_id)));
  1016. pdev->soc = soc;
  1017. pdev->osif_pdev = ctrl_pdev;
  1018. pdev->pdev_id = pdev_id;
  1019. soc->pdev_list[pdev_id] = pdev;
  1020. soc->pdev_count++;
  1021. TAILQ_INIT(&pdev->vdev_list);
  1022. pdev->vdev_count = 0;
  1023. qdf_spinlock_create(&pdev->tx_mutex);
  1024. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  1025. TAILQ_INIT(&pdev->neighbour_peers_list);
  1026. if (dp_soc_cmn_setup(soc)) {
  1027. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1028. FL("dp_soc_cmn_setup failed"));
  1029. goto fail1;
  1030. }
  1031. /* Setup per PDEV TCL rings if configured */
  1032. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1033. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  1034. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  1035. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1036. FL("dp_srng_setup failed for tcl_data_ring"));
  1037. goto fail1;
  1038. }
  1039. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  1040. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  1041. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1042. FL("dp_srng_setup failed for tx_comp_ring"));
  1043. goto fail1;
  1044. }
  1045. soc->num_tcl_data_rings++;
  1046. }
  1047. /* Tx specific init */
  1048. if (dp_tx_pdev_attach(pdev)) {
  1049. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1050. FL("dp_tx_pdev_attach failed"));
  1051. goto fail1;
  1052. }
  1053. /* Setup per PDEV REO rings if configured */
  1054. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1055. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  1056. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  1057. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1058. FL("dp_srng_setup failed for reo_dest_ringn"));
  1059. goto fail1;
  1060. }
  1061. soc->num_reo_dest_rings++;
  1062. }
  1063. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  1064. RXDMA_REFILL_RING_SIZE)) {
  1065. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1066. FL("dp_srng_setup failed rx refill ring"));
  1067. goto fail1;
  1068. }
  1069. if (dp_rxdma_ring_setup(soc, pdev)) {
  1070. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1071. FL("RXDMA ring config failed"));
  1072. goto fail1;
  1073. }
  1074. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  1075. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  1076. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1077. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  1078. goto fail1;
  1079. }
  1080. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  1081. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  1082. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1083. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  1084. goto fail1;
  1085. }
  1086. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  1087. RXDMA_MONITOR_STATUS, 0, pdev_id,
  1088. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  1089. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1090. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  1091. goto fail1;
  1092. }
  1093. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring,
  1094. RXDMA_MONITOR_DESC, 0, pdev_id, RXDMA_MONITOR_DESC_RING_SIZE)) {
  1095. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1096. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  1097. goto fail1;
  1098. }
  1099. /* Rx specific init */
  1100. if (dp_rx_pdev_attach(pdev)) {
  1101. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1102. FL("dp_rx_pdev_attach failed "));
  1103. goto fail0;
  1104. }
  1105. DP_STATS_INIT(pdev);
  1106. #ifndef CONFIG_WIN
  1107. /* MCL */
  1108. dp_local_peer_id_pool_init(pdev);
  1109. #endif
  1110. dp_dscp_tid_map_setup(pdev);
  1111. /* Rx monitor mode specific init */
  1112. if (dp_rx_pdev_mon_attach(pdev)) {
  1113. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1114. "dp_rx_pdev_attach failed\n");
  1115. goto fail0;
  1116. }
  1117. /* set the reo destination to 1 during initialization */
  1118. pdev->reo_dest = 1;
  1119. return (struct cdp_pdev *)pdev;
  1120. fail1:
  1121. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  1122. fail0:
  1123. return NULL;
  1124. }
  1125. /*
  1126. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  1127. * @soc: data path SoC handle
  1128. * @pdev: Physical device handle
  1129. *
  1130. * Return: void
  1131. */
  1132. #ifdef QCA_HOST2FW_RXBUF_RING
  1133. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1134. struct dp_pdev *pdev)
  1135. {
  1136. int max_mac_rings =
  1137. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  1138. int i;
  1139. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  1140. max_mac_rings : MAX_RX_MAC_RINGS;
  1141. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  1142. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  1143. RXDMA_BUF, 1);
  1144. }
  1145. #else
  1146. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1147. struct dp_pdev *pdev)
  1148. {
  1149. }
  1150. #endif
  1151. /*
  1152. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  1153. * @pdev: device object
  1154. *
  1155. * Return: void
  1156. */
  1157. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  1158. {
  1159. struct dp_neighbour_peer *peer = NULL;
  1160. struct dp_neighbour_peer *temp_peer = NULL;
  1161. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  1162. neighbour_peer_list_elem, temp_peer) {
  1163. /* delete this peer from the list */
  1164. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  1165. peer, neighbour_peer_list_elem);
  1166. qdf_mem_free(peer);
  1167. }
  1168. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  1169. }
  1170. /*
  1171. * dp_pdev_detach_wifi3() - detach txrx pdev
  1172. * @txrx_pdev: Datapath PDEV handle
  1173. * @force: Force detach
  1174. *
  1175. */
  1176. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  1177. {
  1178. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1179. struct dp_soc *soc = pdev->soc;
  1180. dp_tx_pdev_detach(pdev);
  1181. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1182. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  1183. TCL_DATA, pdev->pdev_id);
  1184. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  1185. WBM2SW_RELEASE, pdev->pdev_id);
  1186. }
  1187. dp_rx_pdev_detach(pdev);
  1188. dp_rx_pdev_mon_detach(pdev);
  1189. dp_neighbour_peers_detach(pdev);
  1190. qdf_spinlock_destroy(&pdev->tx_mutex);
  1191. /* Setup per PDEV REO rings if configured */
  1192. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1193. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  1194. REO_DST, pdev->pdev_id);
  1195. }
  1196. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  1197. dp_rxdma_ring_cleanup(soc, pdev);
  1198. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  1199. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  1200. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  1201. RXDMA_MONITOR_STATUS, 0);
  1202. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring,
  1203. RXDMA_MONITOR_DESC, 0);
  1204. soc->pdev_list[pdev->pdev_id] = NULL;
  1205. soc->pdev_count--;
  1206. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  1207. qdf_mem_free(pdev);
  1208. }
  1209. /*
  1210. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  1211. * @soc: DP SOC handle
  1212. */
  1213. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  1214. {
  1215. struct reo_desc_list_node *desc;
  1216. struct dp_rx_tid *rx_tid;
  1217. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  1218. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  1219. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1220. rx_tid = &desc->rx_tid;
  1221. qdf_mem_unmap_nbytes_single(soc->osdev,
  1222. rx_tid->hw_qdesc_paddr,
  1223. QDF_DMA_BIDIRECTIONAL,
  1224. rx_tid->hw_qdesc_alloc_size);
  1225. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  1226. qdf_mem_free(desc);
  1227. }
  1228. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  1229. qdf_list_destroy(&soc->reo_desc_freelist);
  1230. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  1231. }
  1232. /*
  1233. * dp_soc_detach_wifi3() - Detach txrx SOC
  1234. * @txrx_soc: DP SOC handle
  1235. *
  1236. */
  1237. static void dp_soc_detach_wifi3(void *txrx_soc)
  1238. {
  1239. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1240. int i;
  1241. qdf_atomic_set(&soc->cmn_init_done, 0);
  1242. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1243. if (soc->pdev_list[i])
  1244. dp_pdev_detach_wifi3(
  1245. (struct cdp_pdev *)soc->pdev_list[i], 1);
  1246. }
  1247. dp_peer_find_detach(soc);
  1248. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  1249. * SW descriptors
  1250. */
  1251. /* Free the ring memories */
  1252. /* Common rings */
  1253. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  1254. dp_tx_soc_detach(soc);
  1255. /* Tx data rings */
  1256. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1257. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1258. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  1259. TCL_DATA, i);
  1260. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  1261. WBM2SW_RELEASE, i);
  1262. }
  1263. }
  1264. /* TCL command and status rings */
  1265. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  1266. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  1267. /* Rx data rings */
  1268. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1269. soc->num_reo_dest_rings =
  1270. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1271. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1272. /* TODO: Get number of rings and ring sizes
  1273. * from wlan_cfg
  1274. */
  1275. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  1276. REO_DST, i);
  1277. }
  1278. }
  1279. /* REO reinjection ring */
  1280. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  1281. /* Rx release ring */
  1282. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  1283. /* Rx exception ring */
  1284. /* TODO: Better to store ring_type and ring_num in
  1285. * dp_srng during setup
  1286. */
  1287. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  1288. /* REO command and status rings */
  1289. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  1290. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  1291. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  1292. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  1293. htt_soc_detach(soc->htt_handle);
  1294. dp_reo_desc_freelist_destroy(soc);
  1295. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  1296. qdf_mem_free(soc);
  1297. }
  1298. /*
  1299. * dp_rxdma_ring_config() - configure the RX DMA rings
  1300. *
  1301. * This function is used to configure the MAC rings.
  1302. * On MCL host provides buffers in Host2FW ring
  1303. * FW refills (copies) buffers to the ring and updates
  1304. * ring_idx in register
  1305. *
  1306. * @soc: data path SoC handle
  1307. * @pdev: Physical device handle
  1308. *
  1309. * Return: void
  1310. */
  1311. #ifdef QCA_HOST2FW_RXBUF_RING
  1312. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1313. {
  1314. int i;
  1315. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1316. struct dp_pdev *pdev = soc->pdev_list[i];
  1317. if (pdev) {
  1318. int mac_id = 0;
  1319. int j;
  1320. bool dbs_enable = 0;
  1321. int max_mac_rings =
  1322. wlan_cfg_get_num_mac_rings
  1323. (pdev->wlan_cfg_ctx);
  1324. htt_srng_setup(soc->htt_handle, 0,
  1325. pdev->rx_refill_buf_ring.hal_srng,
  1326. RXDMA_BUF);
  1327. if (soc->cdp_soc.ol_ops->
  1328. is_hw_dbs_2x2_capable) {
  1329. dbs_enable = soc->cdp_soc.ol_ops->
  1330. is_hw_dbs_2x2_capable(soc->psoc);
  1331. }
  1332. if (dbs_enable) {
  1333. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1334. QDF_TRACE_LEVEL_ERROR,
  1335. FL("DBS enabled max_mac_rings %d\n"),
  1336. max_mac_rings);
  1337. } else {
  1338. max_mac_rings = 1;
  1339. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1340. QDF_TRACE_LEVEL_ERROR,
  1341. FL("DBS disabled, max_mac_rings %d\n"),
  1342. max_mac_rings);
  1343. }
  1344. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1345. FL("pdev_id %d max_mac_rings %d\n"),
  1346. pdev->pdev_id, max_mac_rings);
  1347. for (j = 0; j < max_mac_rings; j++) {
  1348. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1349. QDF_TRACE_LEVEL_ERROR,
  1350. FL("mac_id %d\n"), mac_id);
  1351. htt_srng_setup(soc->htt_handle, mac_id,
  1352. pdev->rx_mac_buf_ring[j]
  1353. .hal_srng,
  1354. RXDMA_BUF);
  1355. mac_id++;
  1356. }
  1357. }
  1358. }
  1359. }
  1360. #else
  1361. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1362. {
  1363. int i;
  1364. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1365. struct dp_pdev *pdev = soc->pdev_list[i];
  1366. if (pdev) {
  1367. htt_srng_setup(soc->htt_handle, i,
  1368. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  1369. htt_srng_setup(soc->htt_handle, i,
  1370. pdev->rxdma_mon_buf_ring.hal_srng,
  1371. RXDMA_MONITOR_BUF);
  1372. htt_srng_setup(soc->htt_handle, i,
  1373. pdev->rxdma_mon_dst_ring.hal_srng,
  1374. RXDMA_MONITOR_DST);
  1375. htt_srng_setup(soc->htt_handle, i,
  1376. pdev->rxdma_mon_status_ring.hal_srng,
  1377. RXDMA_MONITOR_STATUS);
  1378. htt_srng_setup(soc->htt_handle, i,
  1379. pdev->rxdma_mon_desc_ring.hal_srng,
  1380. RXDMA_MONITOR_DESC);
  1381. }
  1382. }
  1383. }
  1384. #endif
  1385. /*
  1386. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  1387. * @txrx_soc: Datapath SOC handle
  1388. */
  1389. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  1390. {
  1391. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  1392. htt_soc_attach_target(soc->htt_handle);
  1393. dp_rxdma_ring_config(soc);
  1394. DP_STATS_INIT(soc);
  1395. return 0;
  1396. }
  1397. /*
  1398. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  1399. * @txrx_soc: Datapath SOC handle
  1400. */
  1401. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  1402. {
  1403. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  1404. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  1405. }
  1406. /*
  1407. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  1408. * @txrx_soc: Datapath SOC handle
  1409. * @nss_cfg: nss config
  1410. */
  1411. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  1412. {
  1413. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  1414. wlan_cfg_set_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx, config);
  1415. if (config) {
  1416. /*
  1417. * disable dp interrupt if nss enabled
  1418. */
  1419. wlan_cfg_set_num_contexts(dsoc->wlan_cfg_ctx, 0);
  1420. }
  1421. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1422. FL("nss-wifi<0> nss config is enabled"));
  1423. }
  1424. /*
  1425. * dp_vdev_attach_wifi3() - attach txrx vdev
  1426. * @txrx_pdev: Datapath PDEV handle
  1427. * @vdev_mac_addr: MAC address of the virtual interface
  1428. * @vdev_id: VDEV Id
  1429. * @wlan_op_mode: VDEV operating mode
  1430. *
  1431. * Return: DP VDEV handle on success, NULL on failure
  1432. */
  1433. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  1434. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1435. {
  1436. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1437. struct dp_soc *soc = pdev->soc;
  1438. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1439. if (!vdev) {
  1440. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1441. FL("DP VDEV memory allocation failed"));
  1442. goto fail0;
  1443. }
  1444. vdev->pdev = pdev;
  1445. vdev->vdev_id = vdev_id;
  1446. vdev->opmode = op_mode;
  1447. vdev->osdev = soc->osdev;
  1448. vdev->osif_rx = NULL;
  1449. vdev->osif_rsim_rx_decap = NULL;
  1450. vdev->osif_rx_mon = NULL;
  1451. vdev->osif_tx_free_ext = NULL;
  1452. vdev->osif_vdev = NULL;
  1453. vdev->delete.pending = 0;
  1454. vdev->safemode = 0;
  1455. vdev->drop_unenc = 1;
  1456. #ifdef notyet
  1457. vdev->filters_num = 0;
  1458. #endif
  1459. qdf_mem_copy(
  1460. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1461. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1462. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1463. vdev->dscp_tid_map_id = 0;
  1464. vdev->mcast_enhancement_en = 0;
  1465. /* TODO: Initialize default HTT meta data that will be used in
  1466. * TCL descriptors for packets transmitted from this VDEV
  1467. */
  1468. TAILQ_INIT(&vdev->peer_list);
  1469. /* add this vdev into the pdev's list */
  1470. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1471. pdev->vdev_count++;
  1472. dp_tx_vdev_attach(vdev);
  1473. #ifdef DP_INTR_POLL_BASED
  1474. if (wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  1475. if (pdev->vdev_count == 1)
  1476. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1477. }
  1478. #endif
  1479. dp_lro_hash_setup(soc);
  1480. /* LRO */
  1481. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1482. wlan_op_mode_sta == vdev->opmode)
  1483. vdev->lro_enable = true;
  1484. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1485. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  1486. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1487. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1488. DP_STATS_INIT(vdev);
  1489. return (struct cdp_vdev *)vdev;
  1490. fail0:
  1491. return NULL;
  1492. }
  1493. /**
  1494. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1495. * @vdev: Datapath VDEV handle
  1496. * @osif_vdev: OSIF vdev handle
  1497. * @txrx_ops: Tx and Rx operations
  1498. *
  1499. * Return: DP VDEV handle on success, NULL on failure
  1500. */
  1501. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  1502. void *osif_vdev,
  1503. struct ol_txrx_ops *txrx_ops)
  1504. {
  1505. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1506. vdev->osif_vdev = osif_vdev;
  1507. vdev->osif_rx = txrx_ops->rx.rx;
  1508. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  1509. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1510. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  1511. #ifdef notyet
  1512. #if ATH_SUPPORT_WAPI
  1513. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1514. #endif
  1515. #endif
  1516. #ifdef UMAC_SUPPORT_PROXY_ARP
  1517. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1518. #endif
  1519. vdev->me_convert = txrx_ops->me_convert;
  1520. /* TODO: Enable the following once Tx code is integrated */
  1521. txrx_ops->tx.tx = dp_tx_send;
  1522. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1523. "DP Vdev Register success");
  1524. }
  1525. /*
  1526. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1527. * @txrx_vdev: Datapath VDEV handle
  1528. * @callback: Callback OL_IF on completion of detach
  1529. * @cb_context: Callback context
  1530. *
  1531. */
  1532. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  1533. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1534. {
  1535. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1536. struct dp_pdev *pdev = vdev->pdev;
  1537. struct dp_soc *soc = pdev->soc;
  1538. /* preconditions */
  1539. qdf_assert(vdev);
  1540. /* remove the vdev from its parent pdev's list */
  1541. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1542. /*
  1543. * Use peer_ref_mutex while accessing peer_list, in case
  1544. * a peer is in the process of being removed from the list.
  1545. */
  1546. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1547. /* check that the vdev has no peers allocated */
  1548. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1549. /* debug print - will be removed later */
  1550. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1551. FL("not deleting vdev object %p (%pM)"
  1552. "until deletion finishes for all its peers"),
  1553. vdev, vdev->mac_addr.raw);
  1554. /* indicate that the vdev needs to be deleted */
  1555. vdev->delete.pending = 1;
  1556. vdev->delete.callback = callback;
  1557. vdev->delete.context = cb_context;
  1558. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1559. return;
  1560. }
  1561. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1562. dp_tx_vdev_detach(vdev);
  1563. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1564. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1565. qdf_mem_free(vdev);
  1566. if (callback)
  1567. callback(cb_context);
  1568. }
  1569. /*
  1570. * dp_peer_create_wifi3() - attach txrx peer
  1571. * @txrx_vdev: Datapath VDEV handle
  1572. * @peer_mac_addr: Peer MAC address
  1573. *
  1574. * Return: DP peeer handle on success, NULL on failure
  1575. */
  1576. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  1577. uint8_t *peer_mac_addr)
  1578. {
  1579. struct dp_peer *peer;
  1580. int i;
  1581. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1582. struct dp_pdev *pdev;
  1583. struct dp_soc *soc;
  1584. /* preconditions */
  1585. qdf_assert(vdev);
  1586. qdf_assert(peer_mac_addr);
  1587. pdev = vdev->pdev;
  1588. soc = pdev->soc;
  1589. #ifdef notyet
  1590. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1591. soc->mempool_ol_ath_peer);
  1592. #else
  1593. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1594. #endif
  1595. if (!peer)
  1596. return NULL; /* failure */
  1597. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1598. TAILQ_INIT(&peer->ast_entry_list);
  1599. qdf_mem_copy(&peer->self_ast_entry.mac_addr, peer_mac_addr,
  1600. DP_MAC_ADDR_LEN);
  1601. peer->self_ast_entry.peer = peer;
  1602. TAILQ_INSERT_TAIL(&peer->ast_entry_list, &peer->self_ast_entry,
  1603. ast_entry_elem);
  1604. qdf_spinlock_create(&peer->peer_info_lock);
  1605. /* store provided params */
  1606. peer->vdev = vdev;
  1607. qdf_mem_copy(
  1608. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1609. /* TODO: See of rx_opt_proc is really required */
  1610. peer->rx_opt_proc = soc->rx_opt_proc;
  1611. /* initialize the peer_id */
  1612. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1613. peer->peer_ids[i] = HTT_INVALID_PEER;
  1614. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1615. qdf_atomic_init(&peer->ref_cnt);
  1616. /* keep one reference for attach */
  1617. qdf_atomic_inc(&peer->ref_cnt);
  1618. /* add this peer into the vdev's list */
  1619. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1620. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1621. /* TODO: See if hash based search is required */
  1622. dp_peer_find_hash_add(soc, peer);
  1623. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1624. "vdev %p created peer %p (%pM) ref_cnt: %d",
  1625. vdev, peer, peer->mac_addr.raw,
  1626. qdf_atomic_read(&peer->ref_cnt));
  1627. /*
  1628. * For every peer MAp message search and set if bss_peer
  1629. */
  1630. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1631. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1632. "vdev bss_peer!!!!");
  1633. peer->bss_peer = 1;
  1634. vdev->vap_bss_peer = peer;
  1635. }
  1636. #ifndef CONFIG_WIN
  1637. dp_local_peer_id_alloc(pdev, peer);
  1638. #endif
  1639. DP_STATS_INIT(peer);
  1640. return (void *)peer;
  1641. }
  1642. /*
  1643. * dp_peer_setup_wifi3() - initialize the peer
  1644. * @vdev_hdl: virtual device object
  1645. * @peer: Peer object
  1646. *
  1647. * Return: void
  1648. */
  1649. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  1650. {
  1651. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1652. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1653. struct dp_pdev *pdev;
  1654. struct dp_soc *soc;
  1655. bool hash_based = 0;
  1656. enum cdp_host_reo_dest_ring reo_dest;
  1657. /* preconditions */
  1658. qdf_assert(vdev);
  1659. qdf_assert(peer);
  1660. pdev = vdev->pdev;
  1661. soc = pdev->soc;
  1662. dp_peer_rx_init(pdev, peer);
  1663. peer->last_assoc_rcvd = 0;
  1664. peer->last_disassoc_rcvd = 0;
  1665. peer->last_deauth_rcvd = 0;
  1666. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  1667. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1668. FL("hash based steering %d\n"), hash_based);
  1669. if (!hash_based)
  1670. reo_dest = pdev->reo_dest;
  1671. else
  1672. reo_dest = 1;
  1673. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1674. /* TODO: Check the destination ring number to be passed to FW */
  1675. soc->cdp_soc.ol_ops->peer_set_default_routing(
  1676. pdev->osif_pdev, peer->mac_addr.raw,
  1677. peer->vdev->vdev_id, hash_based, reo_dest);
  1678. }
  1679. return;
  1680. }
  1681. /*
  1682. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  1683. * @vdev_handle: virtual device object
  1684. * @htt_pkt_type: type of pkt
  1685. *
  1686. * Return: void
  1687. */
  1688. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  1689. enum htt_cmn_pkt_type val)
  1690. {
  1691. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1692. vdev->tx_encap_type = val;
  1693. }
  1694. /*
  1695. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  1696. * @vdev_handle: virtual device object
  1697. * @htt_pkt_type: type of pkt
  1698. *
  1699. * Return: void
  1700. */
  1701. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  1702. enum htt_cmn_pkt_type val)
  1703. {
  1704. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1705. vdev->rx_decap_type = val;
  1706. }
  1707. /*
  1708. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  1709. * @pdev_handle: physical device object
  1710. * @val: reo destination ring index (1 - 4)
  1711. *
  1712. * Return: void
  1713. */
  1714. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  1715. enum cdp_host_reo_dest_ring val)
  1716. {
  1717. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1718. if (pdev)
  1719. pdev->reo_dest = val;
  1720. }
  1721. /*
  1722. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  1723. * @pdev_handle: physical device object
  1724. *
  1725. * Return: reo destination ring index
  1726. */
  1727. static enum cdp_host_reo_dest_ring
  1728. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  1729. {
  1730. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1731. if (pdev)
  1732. return pdev->reo_dest;
  1733. else
  1734. return cdp_host_reo_dest_ring_unknown;
  1735. }
  1736. #ifdef QCA_SUPPORT_SON
  1737. static void dp_son_peer_authorize(struct dp_peer *peer)
  1738. {
  1739. struct dp_soc *soc;
  1740. soc = peer->vdev->pdev->soc;
  1741. peer->peer_bs_inact_flag = 0;
  1742. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1743. return;
  1744. }
  1745. #else
  1746. static void dp_son_peer_authorize(struct dp_peer *peer)
  1747. {
  1748. return;
  1749. }
  1750. #endif
  1751. /*
  1752. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  1753. * @pdev_handle: device object
  1754. * @val: value to be set
  1755. *
  1756. * Return: void
  1757. */
  1758. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  1759. uint32_t val)
  1760. {
  1761. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1762. /* Enable/Disable smart mesh filtering. This flag will be checked
  1763. * during rx processing to check if packets are from NAC clients.
  1764. */
  1765. pdev->filter_neighbour_peers = val;
  1766. return 0;
  1767. }
  1768. /*
  1769. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  1770. * address for smart mesh filtering
  1771. * @pdev_handle: device object
  1772. * @cmd: Add/Del command
  1773. * @macaddr: nac client mac address
  1774. *
  1775. * Return: void
  1776. */
  1777. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  1778. uint32_t cmd, uint8_t *macaddr)
  1779. {
  1780. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1781. struct dp_neighbour_peer *peer = NULL;
  1782. if (!macaddr)
  1783. goto fail0;
  1784. /* Store address of NAC (neighbour peer) which will be checked
  1785. * against TA of received packets.
  1786. */
  1787. if (cmd == DP_NAC_PARAM_ADD) {
  1788. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  1789. sizeof(*peer));
  1790. if (!peer) {
  1791. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1792. FL("DP neighbour peer node memory allocation failed"));
  1793. goto fail0;
  1794. }
  1795. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  1796. macaddr, DP_MAC_ADDR_LEN);
  1797. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1798. /* add this neighbour peer into the list */
  1799. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  1800. neighbour_peer_list_elem);
  1801. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1802. return 1;
  1803. } else if (cmd == DP_NAC_PARAM_DEL) {
  1804. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1805. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1806. neighbour_peer_list_elem) {
  1807. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  1808. macaddr, DP_MAC_ADDR_LEN)) {
  1809. /* delete this peer from the list */
  1810. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  1811. peer, neighbour_peer_list_elem);
  1812. qdf_mem_free(peer);
  1813. break;
  1814. }
  1815. }
  1816. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1817. return 1;
  1818. }
  1819. fail0:
  1820. return 0;
  1821. }
  1822. /*
  1823. * dp_peer_authorize() - authorize txrx peer
  1824. * @peer_handle: Datapath peer handle
  1825. * @authorize
  1826. *
  1827. */
  1828. static void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1829. {
  1830. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1831. struct dp_soc *soc;
  1832. if (peer != NULL) {
  1833. soc = peer->vdev->pdev->soc;
  1834. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1835. dp_son_peer_authorize(peer);
  1836. peer->authorize = authorize ? 1 : 0;
  1837. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1838. }
  1839. }
  1840. /*
  1841. * dp_peer_unref_delete() - unref and delete peer
  1842. * @peer_handle: Datapath peer handle
  1843. *
  1844. */
  1845. void dp_peer_unref_delete(void *peer_handle)
  1846. {
  1847. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1848. struct dp_vdev *vdev = peer->vdev;
  1849. struct dp_pdev *pdev = vdev->pdev;
  1850. struct dp_soc *soc = pdev->soc;
  1851. struct dp_peer *tmppeer;
  1852. int found = 0;
  1853. uint16_t peer_id;
  1854. uint16_t hw_peer_id;
  1855. struct dp_ast_entry *ast_entry;
  1856. /*
  1857. * Hold the lock all the way from checking if the peer ref count
  1858. * is zero until the peer references are removed from the hash
  1859. * table and vdev list (if the peer ref count is zero).
  1860. * This protects against a new HL tx operation starting to use the
  1861. * peer object just after this function concludes it's done being used.
  1862. * Furthermore, the lock needs to be held while checking whether the
  1863. * vdev's list of peers is empty, to make sure that list is not modified
  1864. * concurrently with the empty check.
  1865. */
  1866. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1867. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1868. "%s: peer %p ref_cnt(before decrement): %d\n", __func__,
  1869. peer, qdf_atomic_read(&peer->ref_cnt));
  1870. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1871. peer_id = peer->peer_ids[0];
  1872. /*
  1873. * Make sure that the reference to the peer in
  1874. * peer object map is removed
  1875. */
  1876. if (peer_id != HTT_INVALID_PEER)
  1877. soc->peer_id_to_obj_map[peer_id] = NULL;
  1878. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1879. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  1880. /* remove the reference to the peer from the hash table */
  1881. dp_peer_find_hash_remove(soc, peer);
  1882. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1883. if (tmppeer == peer) {
  1884. found = 1;
  1885. break;
  1886. }
  1887. }
  1888. if (found) {
  1889. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1890. peer_list_elem);
  1891. } else {
  1892. /*Ignoring the remove operation as peer not found*/
  1893. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1894. "peer %p not found in vdev (%p)->peer_list:%p",
  1895. peer, vdev, &peer->vdev->peer_list);
  1896. }
  1897. /* cleanup the peer data */
  1898. dp_peer_cleanup(vdev, peer);
  1899. /* check whether the parent vdev has no peers left */
  1900. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1901. /*
  1902. * Now that there are no references to the peer, we can
  1903. * release the peer reference lock.
  1904. */
  1905. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1906. /*
  1907. * Check if the parent vdev was waiting for its peers
  1908. * to be deleted, in order for it to be deleted too.
  1909. */
  1910. if (vdev->delete.pending) {
  1911. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1912. vdev->delete.callback;
  1913. void *vdev_delete_context =
  1914. vdev->delete.context;
  1915. QDF_TRACE(QDF_MODULE_ID_DP,
  1916. QDF_TRACE_LEVEL_INFO_HIGH,
  1917. FL("deleting vdev object %p (%pM)"
  1918. " - its last peer is done"),
  1919. vdev, vdev->mac_addr.raw);
  1920. /* all peers are gone, go ahead and delete it */
  1921. qdf_mem_free(vdev);
  1922. if (vdev_delete_cb)
  1923. vdev_delete_cb(vdev_delete_context);
  1924. }
  1925. } else {
  1926. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1927. }
  1928. #ifdef notyet
  1929. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1930. #else
  1931. TAILQ_FOREACH(ast_entry, &peer->ast_entry_list,
  1932. ast_entry_elem) {
  1933. hw_peer_id = ast_entry->ast_idx;
  1934. if (peer->self_ast_entry.ast_idx != hw_peer_id)
  1935. qdf_mem_free(ast_entry);
  1936. else
  1937. peer->self_ast_entry.ast_idx =
  1938. HTT_INVALID_PEER;
  1939. soc->ast_table[hw_peer_id] = NULL;
  1940. }
  1941. qdf_mem_free(peer);
  1942. #endif
  1943. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  1944. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  1945. vdev->vdev_id, peer->mac_addr.raw);
  1946. }
  1947. } else {
  1948. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1949. }
  1950. }
  1951. /*
  1952. * dp_peer_detach_wifi3() – Detach txrx peer
  1953. * @peer_handle: Datapath peer handle
  1954. *
  1955. */
  1956. static void dp_peer_delete_wifi3(void *peer_handle)
  1957. {
  1958. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1959. /* redirect the peer's rx delivery function to point to a
  1960. * discard func
  1961. */
  1962. peer->rx_opt_proc = dp_rx_discard;
  1963. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1964. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  1965. #ifndef CONFIG_WIN
  1966. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1967. #endif
  1968. qdf_spinlock_destroy(&peer->peer_info_lock);
  1969. /*
  1970. * Remove the reference added during peer_attach.
  1971. * The peer will still be left allocated until the
  1972. * PEER_UNMAP message arrives to remove the other
  1973. * reference, added by the PEER_MAP message.
  1974. */
  1975. dp_peer_unref_delete(peer_handle);
  1976. }
  1977. /*
  1978. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1979. * @peer_handle: Datapath peer handle
  1980. *
  1981. */
  1982. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  1983. {
  1984. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1985. return vdev->mac_addr.raw;
  1986. }
  1987. /*
  1988. * dp_vdev_set_wds() - Enable per packet stats
  1989. * @vdev_handle: DP VDEV handle
  1990. * @val: value
  1991. *
  1992. * Return: none
  1993. */
  1994. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  1995. {
  1996. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1997. vdev->wds_enabled = val;
  1998. return 0;
  1999. }
  2000. /*
  2001. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  2002. * @peer_handle: Datapath peer handle
  2003. *
  2004. */
  2005. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  2006. uint8_t vdev_id)
  2007. {
  2008. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  2009. struct dp_vdev *vdev = NULL;
  2010. if (qdf_unlikely(!pdev))
  2011. return NULL;
  2012. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2013. if (vdev->vdev_id == vdev_id)
  2014. break;
  2015. }
  2016. return (struct cdp_vdev *)vdev;
  2017. }
  2018. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  2019. {
  2020. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2021. return vdev->opmode;
  2022. }
  2023. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  2024. {
  2025. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  2026. struct dp_pdev *pdev = vdev->pdev;
  2027. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  2028. }
  2029. /**
  2030. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  2031. * @vdev_handle: Datapath VDEV handle
  2032. * @smart_monitor: Flag to denote if its smart monitor mode
  2033. *
  2034. * Return: 0 on success, not 0 on failure
  2035. */
  2036. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  2037. uint8_t smart_monitor)
  2038. {
  2039. /* Many monitor VAPs can exists in a system but only one can be up at
  2040. * anytime
  2041. */
  2042. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2043. struct dp_pdev *pdev;
  2044. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  2045. struct dp_soc *soc;
  2046. uint8_t pdev_id;
  2047. qdf_assert(vdev);
  2048. pdev = vdev->pdev;
  2049. pdev_id = pdev->pdev_id;
  2050. soc = pdev->soc;
  2051. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  2052. "pdev=%p, pdev_id=%d, soc=%p vdev=%p\n",
  2053. pdev, pdev_id, soc, vdev);
  2054. /*Check if current pdev's monitor_vdev exists */
  2055. if (pdev->monitor_vdev) {
  2056. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2057. "vdev=%p\n", vdev);
  2058. qdf_assert(vdev);
  2059. }
  2060. pdev->monitor_vdev = vdev;
  2061. /* If smart monitor mode, do not configure monitor ring */
  2062. if (smart_monitor)
  2063. return QDF_STATUS_SUCCESS;
  2064. htt_tlv_filter.mpdu_start = 1;
  2065. htt_tlv_filter.msdu_start = 1;
  2066. htt_tlv_filter.packet = 1;
  2067. htt_tlv_filter.msdu_end = 1;
  2068. htt_tlv_filter.mpdu_end = 1;
  2069. htt_tlv_filter.packet_header = 1;
  2070. htt_tlv_filter.attention = 1;
  2071. htt_tlv_filter.ppdu_start = 0;
  2072. htt_tlv_filter.ppdu_end = 0;
  2073. htt_tlv_filter.ppdu_end_user_stats = 0;
  2074. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  2075. htt_tlv_filter.ppdu_end_status_done = 0;
  2076. htt_tlv_filter.enable_fp = 1;
  2077. htt_tlv_filter.enable_md = 0;
  2078. htt_tlv_filter.enable_mo = 1;
  2079. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  2080. pdev->rxdma_mon_buf_ring.hal_srng,
  2081. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  2082. htt_tlv_filter.mpdu_start = 1;
  2083. htt_tlv_filter.msdu_start = 1;
  2084. htt_tlv_filter.packet = 0;
  2085. htt_tlv_filter.msdu_end = 1;
  2086. htt_tlv_filter.mpdu_end = 1;
  2087. htt_tlv_filter.packet_header = 1;
  2088. htt_tlv_filter.attention = 1;
  2089. htt_tlv_filter.ppdu_start = 1;
  2090. htt_tlv_filter.ppdu_end = 1;
  2091. htt_tlv_filter.ppdu_end_user_stats = 1;
  2092. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  2093. htt_tlv_filter.ppdu_end_status_done = 1;
  2094. htt_tlv_filter.enable_fp = 1;
  2095. htt_tlv_filter.enable_md = 0;
  2096. htt_tlv_filter.enable_mo = 1;
  2097. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  2098. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  2099. RX_BUFFER_SIZE, &htt_tlv_filter);
  2100. return QDF_STATUS_SUCCESS;
  2101. }
  2102. #ifdef MESH_MODE_SUPPORT
  2103. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  2104. {
  2105. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2106. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2107. FL("val %d"), val);
  2108. vdev->mesh_vdev = val;
  2109. }
  2110. /*
  2111. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  2112. * @vdev_hdl: virtual device object
  2113. * @val: value to be set
  2114. *
  2115. * Return: void
  2116. */
  2117. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  2118. {
  2119. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2120. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2121. FL("val %d"), val);
  2122. vdev->mesh_rx_filter = val;
  2123. }
  2124. #endif
  2125. /**
  2126. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  2127. * @vdev: DP VDEV handle
  2128. *
  2129. * return: void
  2130. */
  2131. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  2132. {
  2133. struct dp_peer *peer = NULL;
  2134. int i;
  2135. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  2136. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  2137. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2138. if (!peer)
  2139. return;
  2140. for (i = 0; i <= MAX_MCS; i++) {
  2141. DP_STATS_AGGR(vdev, peer, tx.pkt_type[0].mcs_count[i]);
  2142. DP_STATS_AGGR(vdev, peer, tx.pkt_type[1].mcs_count[i]);
  2143. DP_STATS_AGGR(vdev, peer, tx.pkt_type[2].mcs_count[i]);
  2144. DP_STATS_AGGR(vdev, peer, tx.pkt_type[3].mcs_count[i]);
  2145. DP_STATS_AGGR(vdev, peer, tx.pkt_type[4].mcs_count[i]);
  2146. DP_STATS_AGGR(vdev, peer, rx.pkt_type[0].mcs_count[i]);
  2147. DP_STATS_AGGR(vdev, peer, rx.pkt_type[1].mcs_count[i]);
  2148. DP_STATS_AGGR(vdev, peer, rx.pkt_type[2].mcs_count[i]);
  2149. DP_STATS_AGGR(vdev, peer, rx.pkt_type[3].mcs_count[i]);
  2150. DP_STATS_AGGR(vdev, peer, rx.pkt_type[4].mcs_count[i]);
  2151. }
  2152. for (i = 0; i < SUPPORTED_BW; i++) {
  2153. DP_STATS_AGGR(vdev, peer, tx.bw[i]);
  2154. DP_STATS_AGGR(vdev, peer, rx.bw[i]);
  2155. }
  2156. for (i = 0; i < SS_COUNT; i++)
  2157. DP_STATS_AGGR(vdev, peer, rx.nss[i]);
  2158. for (i = 0; i < WME_AC_MAX; i++) {
  2159. DP_STATS_AGGR(vdev, peer, tx.wme_ac_type[i]);
  2160. DP_STATS_AGGR(vdev, peer, rx.wme_ac_type[i]);
  2161. DP_STATS_AGGR(vdev, peer, tx.excess_retries_ac[i]);
  2162. }
  2163. for (i = 0; i < MAX_MCS + 1; i++) {
  2164. DP_STATS_AGGR(vdev, peer, tx.sgi_count[i]);
  2165. DP_STATS_AGGR(vdev, peer, rx.sgi_count[i]);
  2166. }
  2167. DP_STATS_AGGR_PKT(vdev, peer, tx.comp_pkt);
  2168. DP_STATS_AGGR_PKT(vdev, peer, tx.ucast);
  2169. DP_STATS_AGGR_PKT(vdev, peer, tx.mcast);
  2170. DP_STATS_AGGR_PKT(vdev, peer, tx.tx_success);
  2171. DP_STATS_AGGR(vdev, peer, tx.tx_failed);
  2172. DP_STATS_AGGR(vdev, peer, tx.ofdma);
  2173. DP_STATS_AGGR(vdev, peer, tx.stbc);
  2174. DP_STATS_AGGR(vdev, peer, tx.ldpc);
  2175. DP_STATS_AGGR(vdev, peer, tx.retries);
  2176. DP_STATS_AGGR(vdev, peer, tx.non_amsdu_cnt);
  2177. DP_STATS_AGGR(vdev, peer, tx.amsdu_cnt);
  2178. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard);
  2179. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_retired);
  2180. DP_STATS_AGGR(vdev, peer, tx.dropped.mpdu_age_out);
  2181. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason1);
  2182. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason2);
  2183. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason3);
  2184. DP_STATS_AGGR(vdev, peer, rx.err.mic_err);
  2185. DP_STATS_AGGR(vdev, peer, rx.err.decrypt_err);
  2186. DP_STATS_AGGR(vdev, peer, rx.non_ampdu_cnt);
  2187. DP_STATS_AGGR(vdev, peer, rx.ampdu_cnt);
  2188. DP_STATS_AGGR(vdev, peer, rx.non_amsdu_cnt);
  2189. DP_STATS_AGGR(vdev, peer, rx.amsdu_cnt);
  2190. DP_STATS_AGGR_PKT(vdev, peer, rx.to_stack);
  2191. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  2192. DP_STATS_AGGR_PKT(vdev, peer, rx.rcvd_reo[i]);
  2193. peer->stats.rx.unicast.num = peer->stats.rx.to_stack.num -
  2194. peer->stats.rx.multicast.num;
  2195. peer->stats.rx.unicast.bytes = peer->stats.rx.to_stack.bytes -
  2196. peer->stats.rx.multicast.bytes;
  2197. DP_STATS_AGGR_PKT(vdev, peer, rx.unicast);
  2198. DP_STATS_AGGR_PKT(vdev, peer, rx.multicast);
  2199. DP_STATS_AGGR_PKT(vdev, peer, rx.wds);
  2200. DP_STATS_AGGR_PKT(vdev, peer, rx.raw);
  2201. DP_STATS_AGGR_PKT(vdev, peer, rx.intra_bss.pkts);
  2202. DP_STATS_AGGR_PKT(vdev, peer, rx.intra_bss.fail);
  2203. vdev->stats.tx.last_ack_rssi =
  2204. peer->stats.tx.last_ack_rssi;
  2205. }
  2206. }
  2207. /**
  2208. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  2209. * @pdev: DP PDEV handle
  2210. *
  2211. * return: void
  2212. */
  2213. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  2214. {
  2215. struct dp_vdev *vdev = NULL;
  2216. uint8_t i;
  2217. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  2218. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  2219. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  2220. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2221. if (!vdev)
  2222. return;
  2223. dp_aggregate_vdev_stats(vdev);
  2224. for (i = 0; i <= MAX_MCS; i++) {
  2225. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[0].mcs_count[i]);
  2226. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[1].mcs_count[i]);
  2227. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[2].mcs_count[i]);
  2228. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[3].mcs_count[i]);
  2229. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[4].mcs_count[i]);
  2230. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[0].mcs_count[i]);
  2231. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[1].mcs_count[i]);
  2232. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[2].mcs_count[i]);
  2233. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[3].mcs_count[i]);
  2234. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[4].mcs_count[i]);
  2235. }
  2236. for (i = 0; i < SUPPORTED_BW; i++) {
  2237. DP_STATS_AGGR(pdev, vdev, tx.bw[i]);
  2238. DP_STATS_AGGR(pdev, vdev, rx.bw[i]);
  2239. }
  2240. for (i = 0; i < SS_COUNT; i++)
  2241. DP_STATS_AGGR(pdev, vdev, rx.nss[i]);
  2242. for (i = 0; i < WME_AC_MAX; i++) {
  2243. DP_STATS_AGGR(pdev, vdev, tx.wme_ac_type[i]);
  2244. DP_STATS_AGGR(pdev, vdev, rx.wme_ac_type[i]);
  2245. DP_STATS_AGGR(pdev, vdev,
  2246. tx.excess_retries_ac[i]);
  2247. }
  2248. for (i = 0; i < MAX_MCS + 1; i++) {
  2249. DP_STATS_AGGR(pdev, vdev, tx.sgi_count[i]);
  2250. DP_STATS_AGGR(pdev, vdev, rx.sgi_count[i]);
  2251. }
  2252. DP_STATS_AGGR_PKT(pdev, vdev, tx.comp_pkt);
  2253. DP_STATS_AGGR_PKT(pdev, vdev, tx.ucast);
  2254. DP_STATS_AGGR_PKT(pdev, vdev, tx.mcast);
  2255. DP_STATS_AGGR_PKT(pdev, vdev, tx.tx_success);
  2256. DP_STATS_AGGR(pdev, vdev, tx.tx_failed);
  2257. DP_STATS_AGGR(pdev, vdev, tx.ofdma);
  2258. DP_STATS_AGGR(pdev, vdev, tx.stbc);
  2259. DP_STATS_AGGR(pdev, vdev, tx.ldpc);
  2260. DP_STATS_AGGR(pdev, vdev, tx.retries);
  2261. DP_STATS_AGGR(pdev, vdev, tx.non_amsdu_cnt);
  2262. DP_STATS_AGGR(pdev, vdev, tx.amsdu_cnt);
  2263. DP_STATS_AGGR(pdev, vdev, tx.dropped.fw_discard);
  2264. DP_STATS_AGGR(pdev, vdev,
  2265. tx.dropped.fw_discard_retired);
  2266. DP_STATS_AGGR(pdev, vdev, tx.dropped.mpdu_age_out);
  2267. DP_STATS_AGGR(pdev, vdev,
  2268. tx.dropped.fw_discard_reason1);
  2269. DP_STATS_AGGR(pdev, vdev,
  2270. tx.dropped.fw_discard_reason2);
  2271. DP_STATS_AGGR(pdev, vdev,
  2272. tx.dropped.fw_discard_reason3);
  2273. DP_STATS_AGGR(pdev, vdev, rx.err.mic_err);
  2274. DP_STATS_AGGR(pdev, vdev, rx.err.decrypt_err);
  2275. DP_STATS_AGGR(pdev, vdev, rx.non_ampdu_cnt);
  2276. DP_STATS_AGGR(pdev, vdev, rx.ampdu_cnt);
  2277. DP_STATS_AGGR(pdev, vdev, rx.non_amsdu_cnt);
  2278. DP_STATS_AGGR(pdev, vdev, rx.amsdu_cnt);
  2279. DP_STATS_AGGR_PKT(pdev, vdev, rx.to_stack);
  2280. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[0]);
  2281. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[1]);
  2282. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[2]);
  2283. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[3]);
  2284. DP_STATS_AGGR_PKT(pdev, vdev, rx.unicast);
  2285. DP_STATS_AGGR_PKT(pdev, vdev, rx.multicast);
  2286. DP_STATS_AGGR_PKT(pdev, vdev, rx.wds);
  2287. DP_STATS_AGGR_PKT(pdev, vdev, rx.intra_bss.pkts);
  2288. DP_STATS_AGGR_PKT(pdev, vdev, rx.intra_bss.fail);
  2289. DP_STATS_AGGR_PKT(pdev, vdev, rx.raw);
  2290. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  2291. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  2292. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  2293. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  2294. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  2295. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  2296. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  2297. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  2298. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  2299. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  2300. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  2301. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  2302. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  2303. DP_STATS_AGGR(pdev, vdev,
  2304. tx_i.mcast_en.dropped_map_error);
  2305. DP_STATS_AGGR(pdev, vdev,
  2306. tx_i.mcast_en.dropped_self_mac);
  2307. DP_STATS_AGGR(pdev, vdev,
  2308. tx_i.mcast_en.dropped_send_fail);
  2309. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  2310. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  2311. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  2312. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  2313. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  2314. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  2315. pdev->stats.tx_i.dropped.dropped_pkt.num =
  2316. pdev->stats.tx_i.dropped.dma_error +
  2317. pdev->stats.tx_i.dropped.ring_full +
  2318. pdev->stats.tx_i.dropped.enqueue_fail +
  2319. pdev->stats.tx_i.dropped.desc_na +
  2320. pdev->stats.tx_i.dropped.res_full;
  2321. pdev->stats.tx.last_ack_rssi =
  2322. vdev->stats.tx.last_ack_rssi;
  2323. pdev->stats.tx_i.tso.num_seg =
  2324. vdev->stats.tx_i.tso.num_seg;
  2325. }
  2326. }
  2327. /**
  2328. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  2329. * @pdev: DP_PDEV Handle
  2330. *
  2331. * Return:void
  2332. */
  2333. static inline void
  2334. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  2335. {
  2336. DP_TRACE_STATS(FATAL, "WLAN Tx Stats:\n");
  2337. DP_TRACE_STATS(FATAL, "Received From Stack:\n");
  2338. DP_TRACE_STATS(FATAL, "Packets = %d",
  2339. pdev->stats.tx_i.rcvd.num);
  2340. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2341. pdev->stats.tx_i.rcvd.bytes);
  2342. DP_TRACE_STATS(FATAL, "Processed:\n");
  2343. DP_TRACE_STATS(FATAL, "Packets = %d",
  2344. pdev->stats.tx_i.processed.num);
  2345. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2346. pdev->stats.tx_i.processed.bytes);
  2347. DP_TRACE_STATS(FATAL, "Completions:\n");
  2348. DP_TRACE_STATS(FATAL, "Packets = %d",
  2349. pdev->stats.tx.comp_pkt.num);
  2350. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2351. pdev->stats.tx.comp_pkt.bytes);
  2352. DP_TRACE_STATS(FATAL, "Dropped:\n");
  2353. DP_TRACE_STATS(FATAL, "Packets = %d",
  2354. pdev->stats.tx_i.dropped.dropped_pkt.num);
  2355. DP_TRACE_STATS(FATAL, "Dma_map_error = %d",
  2356. pdev->stats.tx_i.dropped.dma_error);
  2357. DP_TRACE_STATS(FATAL, "Ring Full = %d",
  2358. pdev->stats.tx_i.dropped.ring_full);
  2359. DP_TRACE_STATS(FATAL, "Descriptor Not available = %d",
  2360. pdev->stats.tx_i.dropped.desc_na);
  2361. DP_TRACE_STATS(FATAL, "HW enqueue failed= %d",
  2362. pdev->stats.tx_i.dropped.enqueue_fail);
  2363. DP_TRACE_STATS(FATAL, "Resources Full = %d",
  2364. pdev->stats.tx_i.dropped.res_full);
  2365. DP_TRACE_STATS(FATAL, "Fw Discard = %d",
  2366. pdev->stats.tx.dropped.fw_discard);
  2367. DP_TRACE_STATS(FATAL, "Fw Discard Retired = %d",
  2368. pdev->stats.tx.dropped.fw_discard_retired);
  2369. DP_TRACE_STATS(FATAL, "Firmware Discard Untransmitted = %d",
  2370. pdev->stats.tx.dropped.fw_discard_untransmitted);
  2371. DP_TRACE_STATS(FATAL, "Mpdu Age Out = %d",
  2372. pdev->stats.tx.dropped.mpdu_age_out);
  2373. DP_TRACE_STATS(FATAL, "Firmware Discard Reason1 = %d",
  2374. pdev->stats.tx.dropped.fw_discard_reason1);
  2375. DP_TRACE_STATS(FATAL, "Firmware Discard Reason2 = %d",
  2376. pdev->stats.tx.dropped.fw_discard_reason2);
  2377. DP_TRACE_STATS(FATAL, "Firmware Discard Reason3 = %d\n",
  2378. pdev->stats.tx.dropped.fw_discard_reason3);
  2379. DP_TRACE_STATS(FATAL, "Scatter Gather:\n");
  2380. DP_TRACE_STATS(FATAL, "Packets = %d",
  2381. pdev->stats.tx_i.sg.sg_pkt.num);
  2382. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2383. pdev->stats.tx_i.sg.sg_pkt.bytes);
  2384. DP_TRACE_STATS(FATAL, "Dropped By Host = %d",
  2385. pdev->stats.tx_i.sg.dropped_host);
  2386. DP_TRACE_STATS(FATAL, "Dropped By Target = %d\n",
  2387. pdev->stats.tx_i.sg.dropped_target);
  2388. DP_TRACE_STATS(FATAL, "Tso:\n");
  2389. DP_TRACE_STATS(FATAL, "Number of Segments = %d",
  2390. pdev->stats.tx_i.tso.num_seg);
  2391. DP_TRACE_STATS(FATAL, "Packets = %d",
  2392. pdev->stats.tx_i.tso.tso_pkt.num);
  2393. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2394. pdev->stats.tx_i.tso.tso_pkt.bytes);
  2395. DP_TRACE_STATS(FATAL, "Dropped By Host = %d\n",
  2396. pdev->stats.tx_i.tso.dropped_host);
  2397. DP_TRACE_STATS(FATAL, "Mcast Enhancement:\n");
  2398. DP_TRACE_STATS(FATAL, "Packets = %d",
  2399. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  2400. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2401. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  2402. DP_TRACE_STATS(FATAL, "Dropped: Map Errors = %d",
  2403. pdev->stats.tx_i.mcast_en.dropped_map_error);
  2404. DP_TRACE_STATS(FATAL, "Dropped: Self Mac = %d",
  2405. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  2406. DP_TRACE_STATS(FATAL, "Dropped: Send Fail = %d",
  2407. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  2408. DP_TRACE_STATS(FATAL, "Unicast sent = %d\n",
  2409. pdev->stats.tx_i.mcast_en.ucast);
  2410. DP_TRACE_STATS(FATAL, "Raw:\n");
  2411. DP_TRACE_STATS(FATAL, "Packets = %d",
  2412. pdev->stats.tx_i.raw.raw_pkt.num);
  2413. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2414. pdev->stats.tx_i.raw.raw_pkt.bytes);
  2415. DP_TRACE_STATS(FATAL, "DMA map error = %d\n",
  2416. pdev->stats.tx_i.raw.dma_map_error);
  2417. DP_TRACE_STATS(FATAL, "Reinjected:\n");
  2418. DP_TRACE_STATS(FATAL, "Packets = %d",
  2419. pdev->stats.tx_i.reinject_pkts.num);
  2420. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2421. pdev->stats.tx_i.reinject_pkts.bytes);
  2422. DP_TRACE_STATS(FATAL, "Inspected:\n");
  2423. DP_TRACE_STATS(FATAL, "Packets = %d",
  2424. pdev->stats.tx_i.inspect_pkts.num);
  2425. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2426. pdev->stats.tx_i.inspect_pkts.bytes);
  2427. }
  2428. /**
  2429. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  2430. * @pdev: DP_PDEV Handle
  2431. *
  2432. * Return: void
  2433. */
  2434. static inline void
  2435. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  2436. {
  2437. DP_TRACE_STATS(FATAL, "WLAN Rx Stats:\n");
  2438. DP_TRACE_STATS(FATAL, "Received From HW (Per Rx Ring):\n");
  2439. DP_TRACE_STATS(FATAL, "Packets = %d %d %d %d",
  2440. pdev->stats.rx.rcvd_reo[0].num,
  2441. pdev->stats.rx.rcvd_reo[1].num,
  2442. pdev->stats.rx.rcvd_reo[2].num,
  2443. pdev->stats.rx.rcvd_reo[3].num);
  2444. DP_TRACE_STATS(FATAL, "Bytes = %d %d %d %d\n",
  2445. pdev->stats.rx.rcvd_reo[0].bytes,
  2446. pdev->stats.rx.rcvd_reo[1].bytes,
  2447. pdev->stats.rx.rcvd_reo[2].bytes,
  2448. pdev->stats.rx.rcvd_reo[3].bytes);
  2449. DP_TRACE_STATS(FATAL, "Replenished:\n");
  2450. DP_TRACE_STATS(FATAL, "Packets = %d",
  2451. pdev->stats.replenish.pkts.num);
  2452. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2453. pdev->stats.replenish.pkts.bytes);
  2454. DP_TRACE_STATS(FATAL, "Buffers Added To Freelist = %d\n",
  2455. pdev->stats.buf_freelist);
  2456. DP_TRACE_STATS(FATAL, "Dropped:\n");
  2457. DP_TRACE_STATS(FATAL, "Total Packets With Msdu Not Done = %d\n",
  2458. pdev->stats.dropped.msdu_not_done);
  2459. DP_TRACE_STATS(FATAL, "Sent To Stack:\n");
  2460. DP_TRACE_STATS(FATAL, "Packets = %d",
  2461. pdev->stats.rx.to_stack.num);
  2462. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2463. pdev->stats.rx.to_stack.bytes);
  2464. DP_TRACE_STATS(FATAL, "Multicast/Broadcast:\n");
  2465. DP_TRACE_STATS(FATAL, "Packets = %d",
  2466. pdev->stats.rx.multicast.num);
  2467. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2468. pdev->stats.rx.multicast.bytes);
  2469. DP_TRACE_STATS(FATAL, "Errors:\n");
  2470. DP_TRACE_STATS(FATAL, "Rxdma Ring Un-inititalized = %d",
  2471. pdev->stats.replenish.rxdma_err);
  2472. DP_TRACE_STATS(FATAL, "Desc Alloc Failed: = %d",
  2473. pdev->stats.err.desc_alloc_fail);
  2474. }
  2475. /**
  2476. * dp_print_soc_tx_stats(): Print SOC level stats
  2477. * @soc DP_SOC Handle
  2478. *
  2479. * Return: void
  2480. */
  2481. static inline void
  2482. dp_print_soc_tx_stats(struct dp_soc *soc)
  2483. {
  2484. DP_TRACE_STATS(FATAL, "SOC Tx Stats:\n");
  2485. DP_TRACE_STATS(FATAL, "Tx Descriptors In Use = %d",
  2486. soc->stats.tx.desc_in_use);
  2487. DP_TRACE_STATS(FATAL, "Invalid peer:\n");
  2488. DP_TRACE_STATS(FATAL, "Packets = %d",
  2489. soc->stats.tx.tx_invalid_peer.num);
  2490. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2491. soc->stats.tx.tx_invalid_peer.bytes);
  2492. DP_TRACE_STATS(FATAL, "Packets dropped due to TCL ring full = %d %d %d",
  2493. soc->stats.tx.tcl_ring_full[0],
  2494. soc->stats.tx.tcl_ring_full[1],
  2495. soc->stats.tx.tcl_ring_full[2]);
  2496. }
  2497. /**
  2498. * dp_print_soc_rx_stats: Print SOC level Rx stats
  2499. * @soc: DP_SOC Handle
  2500. *
  2501. * Return:void
  2502. */
  2503. static inline void
  2504. dp_print_soc_rx_stats(struct dp_soc *soc)
  2505. {
  2506. uint32_t i;
  2507. char reo_error[DP_REO_ERR_LENGTH];
  2508. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  2509. uint8_t index = 0;
  2510. DP_TRACE_STATS(FATAL, "SOC Rx Stats:\n");
  2511. DP_TRACE_STATS(FATAL, "Errors:\n");
  2512. DP_TRACE_STATS(FATAL, "Rx Decrypt Errors = %d",
  2513. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  2514. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  2515. DP_TRACE_STATS(FATAL, "Invalid RBM = %d",
  2516. soc->stats.rx.err.invalid_rbm);
  2517. DP_TRACE_STATS(FATAL, "Invalid Vdev = %d",
  2518. soc->stats.rx.err.invalid_vdev);
  2519. DP_TRACE_STATS(FATAL, "Invalid Pdev = %d",
  2520. soc->stats.rx.err.invalid_pdev);
  2521. DP_TRACE_STATS(FATAL, "Invalid Peer = %d",
  2522. soc->stats.rx.err.rx_invalid_peer.num);
  2523. DP_TRACE_STATS(FATAL, "HAL Ring Access Fail = %d",
  2524. soc->stats.rx.err.hal_ring_access_fail);
  2525. for (i = 0; i < MAX_RXDMA_ERRORS; i++) {
  2526. index += qdf_snprint(&rxdma_error[index],
  2527. DP_RXDMA_ERR_LENGTH - index,
  2528. " %d", soc->stats.rx.err.rxdma_error[i]);
  2529. }
  2530. DP_TRACE_STATS(FATAL, "RXDMA Error (0-31):%s",
  2531. rxdma_error);
  2532. index = 0;
  2533. for (i = 0; i < REO_ERROR_TYPE_MAX; i++) {
  2534. index += qdf_snprint(&reo_error[index],
  2535. DP_REO_ERR_LENGTH - index,
  2536. " %d", soc->stats.rx.err.reo_error[i]);
  2537. }
  2538. DP_TRACE_STATS(FATAL, "REO Error(0-14):%s",
  2539. reo_error);
  2540. }
  2541. /**
  2542. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  2543. * @vdev: DP_VDEV handle
  2544. *
  2545. * Return:void
  2546. */
  2547. static inline void
  2548. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  2549. {
  2550. struct dp_peer *peer = NULL;
  2551. DP_STATS_CLR(vdev->pdev);
  2552. DP_STATS_CLR(vdev->pdev->soc);
  2553. DP_STATS_CLR(vdev);
  2554. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2555. if (!peer)
  2556. return;
  2557. DP_STATS_CLR(peer);
  2558. }
  2559. }
  2560. /**
  2561. * dp_print_rx_rates(): Print Rx rate stats
  2562. * @vdev: DP_VDEV handle
  2563. *
  2564. * Return:void
  2565. */
  2566. static inline void
  2567. dp_print_rx_rates(struct dp_vdev *vdev)
  2568. {
  2569. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2570. uint8_t i, pkt_type;
  2571. uint8_t index = 0;
  2572. char rx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2573. char nss[DP_NSS_LENGTH];
  2574. DP_TRACE_STATS(FATAL, "Rx Rate Info:\n");
  2575. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2576. index = 0;
  2577. for (i = 0; i < MAX_MCS; i++) {
  2578. index += qdf_snprint(&rx_mcs[pkt_type][index],
  2579. DP_MCS_LENGTH - index,
  2580. " %d ",
  2581. pdev->stats.rx.pkt_type[pkt_type].
  2582. mcs_count[i]);
  2583. }
  2584. }
  2585. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  2586. rx_mcs[0]);
  2587. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  2588. pdev->stats.rx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2589. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  2590. rx_mcs[1]);
  2591. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  2592. pdev->stats.rx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2593. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  2594. rx_mcs[2]);
  2595. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  2596. pdev->stats.rx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2597. DP_TRACE_STATS(FATAL, "Type 11AC MCS(0-9) = %s",
  2598. rx_mcs[3]);
  2599. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  2600. pdev->stats.rx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2601. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  2602. rx_mcs[4]);
  2603. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  2604. pdev->stats.rx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2605. index = 0;
  2606. for (i = 0; i < SS_COUNT; i++) {
  2607. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2608. " %d", pdev->stats.rx.nss[i]);
  2609. }
  2610. DP_TRACE_STATS(FATAL, "NSS(0-7) = %s",
  2611. nss);
  2612. DP_TRACE_STATS(FATAL, "SGI ="
  2613. " 0.8us %d,"
  2614. " 0.4us %d,"
  2615. " 1.6us %d,"
  2616. " 3.2us %d,",
  2617. pdev->stats.rx.sgi_count[0],
  2618. pdev->stats.rx.sgi_count[1],
  2619. pdev->stats.rx.sgi_count[2],
  2620. pdev->stats.rx.sgi_count[3]);
  2621. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2622. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  2623. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  2624. DP_TRACE_STATS(FATAL, "Reception Type ="
  2625. " SU: %d,"
  2626. " MU_MIMO:%d,"
  2627. " MU_OFDMA:%d,"
  2628. " MU_OFDMA_MIMO:%d\n",
  2629. pdev->stats.rx.reception_type[0],
  2630. pdev->stats.rx.reception_type[1],
  2631. pdev->stats.rx.reception_type[2],
  2632. pdev->stats.rx.reception_type[3]);
  2633. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  2634. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Ampdus = %d",
  2635. pdev->stats.rx.ampdu_cnt);
  2636. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Mpdu Level Aggregation : %d",
  2637. pdev->stats.rx.non_ampdu_cnt);
  2638. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu: %d",
  2639. pdev->stats.rx.amsdu_cnt);
  2640. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation: %d",
  2641. pdev->stats.rx.non_amsdu_cnt);
  2642. }
  2643. /**
  2644. * dp_print_tx_rates(): Print tx rates
  2645. * @vdev: DP_VDEV handle
  2646. *
  2647. * Return:void
  2648. */
  2649. static inline void
  2650. dp_print_tx_rates(struct dp_vdev *vdev)
  2651. {
  2652. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2653. uint8_t i, pkt_type;
  2654. char mcs[DOT11_MAX][DP_MCS_LENGTH];
  2655. uint32_t index;
  2656. DP_TRACE_STATS(FATAL, "Tx Rate Info:\n");
  2657. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2658. index = 0;
  2659. for (i = 0; i < MAX_MCS; i++) {
  2660. index += qdf_snprint(&mcs[pkt_type][index],
  2661. DP_MCS_LENGTH - index,
  2662. " %d ",
  2663. pdev->stats.tx.pkt_type[pkt_type].
  2664. mcs_count[i]);
  2665. }
  2666. }
  2667. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  2668. mcs[0]);
  2669. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  2670. pdev->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2671. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  2672. mcs[1]);
  2673. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  2674. pdev->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2675. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  2676. mcs[2]);
  2677. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  2678. pdev->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2679. DP_TRACE_STATS(FATAL, "Type 11AC MCS(0-9) = %s",
  2680. mcs[3]);
  2681. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  2682. pdev->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2683. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  2684. mcs[4]);
  2685. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  2686. pdev->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2687. DP_TRACE_STATS(FATAL, "SGI ="
  2688. " 0.8us %d"
  2689. " 0.4us %d"
  2690. " 1.6us %d"
  2691. " 3.2us %d",
  2692. pdev->stats.tx.sgi_count[0],
  2693. pdev->stats.tx.sgi_count[1],
  2694. pdev->stats.tx.sgi_count[2],
  2695. pdev->stats.tx.sgi_count[3]);
  2696. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2697. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  2698. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  2699. DP_TRACE_STATS(FATAL, "OFDMA = %d", pdev->stats.tx.ofdma);
  2700. DP_TRACE_STATS(FATAL, "STBC = %d", pdev->stats.tx.stbc);
  2701. DP_TRACE_STATS(FATAL, "LDPC = %d", pdev->stats.tx.ldpc);
  2702. DP_TRACE_STATS(FATAL, "Retries = %d", pdev->stats.tx.retries);
  2703. DP_TRACE_STATS(FATAL, "Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  2704. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  2705. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu = %d",
  2706. pdev->stats.tx.amsdu_cnt);
  2707. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation = %d",
  2708. pdev->stats.tx.non_amsdu_cnt);
  2709. }
  2710. /**
  2711. * dp_print_peer_stats():print peer stats
  2712. * @peer: DP_PEER handle
  2713. *
  2714. * return void
  2715. */
  2716. static inline void dp_print_peer_stats(struct dp_peer *peer)
  2717. {
  2718. uint8_t i, pkt_type;
  2719. char tx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2720. char rx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2721. uint32_t index;
  2722. char nss[DP_NSS_LENGTH];
  2723. DP_TRACE_STATS(FATAL, "Node Tx Stats:\n");
  2724. DP_TRACE_STATS(FATAL, "Total Packet Completions = %d",
  2725. peer->stats.tx.comp_pkt.num);
  2726. DP_TRACE_STATS(FATAL, "Total Bytes Completions = %d",
  2727. peer->stats.tx.comp_pkt.bytes);
  2728. DP_TRACE_STATS(FATAL, "Success Packets = %d",
  2729. peer->stats.tx.tx_success.num);
  2730. DP_TRACE_STATS(FATAL, "Success Bytes = %d",
  2731. peer->stats.tx.tx_success.bytes);
  2732. DP_TRACE_STATS(FATAL, "Packets Failed = %d",
  2733. peer->stats.tx.tx_failed);
  2734. DP_TRACE_STATS(FATAL, "Packets In OFDMA = %d",
  2735. peer->stats.tx.ofdma);
  2736. DP_TRACE_STATS(FATAL, "Packets In STBC = %d",
  2737. peer->stats.tx.stbc);
  2738. DP_TRACE_STATS(FATAL, "Packets In LDPC = %d",
  2739. peer->stats.tx.ldpc);
  2740. DP_TRACE_STATS(FATAL, "Packet Retries = %d",
  2741. peer->stats.tx.retries);
  2742. DP_TRACE_STATS(FATAL, "Msdu's Not Part of Ampdu = %d",
  2743. peer->stats.tx.non_amsdu_cnt);
  2744. DP_TRACE_STATS(FATAL, "Mpdu's Part of Ampdu = %d",
  2745. peer->stats.tx.amsdu_cnt);
  2746. DP_TRACE_STATS(FATAL, "Last Packet RSSI = %d",
  2747. peer->stats.tx.last_ack_rssi);
  2748. DP_TRACE_STATS(FATAL, "Dropped At FW: FW Discard = %d",
  2749. peer->stats.tx.dropped.fw_discard);
  2750. DP_TRACE_STATS(FATAL, "Dropped At FW: FW Discard Retired = %d",
  2751. peer->stats.tx.dropped.fw_discard_retired);
  2752. DP_TRACE_STATS(FATAL, "Dropped At FW: FW Discard Untransmitted = %d",
  2753. peer->stats.tx.dropped.fw_discard_untransmitted);
  2754. DP_TRACE_STATS(FATAL, "Dropped : Mpdu Age Out = %d",
  2755. peer->stats.tx.dropped.mpdu_age_out);
  2756. DP_TRACE_STATS(FATAL, "Dropped : FW Discard Reason1 = %d",
  2757. peer->stats.tx.dropped.fw_discard_reason1);
  2758. DP_TRACE_STATS(FATAL, "Dropped : FW Discard Reason2 = %d",
  2759. peer->stats.tx.dropped.fw_discard_reason2);
  2760. DP_TRACE_STATS(FATAL, "Dropped : FW Discard Reason3 = %d",
  2761. peer->stats.tx.dropped.fw_discard_reason3);
  2762. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2763. index = 0;
  2764. for (i = 0; i < MAX_MCS; i++) {
  2765. index += qdf_snprint(&tx_mcs[pkt_type][index],
  2766. DP_MCS_LENGTH - index,
  2767. " %d ",
  2768. peer->stats.tx.pkt_type[pkt_type].
  2769. mcs_count[i]);
  2770. }
  2771. }
  2772. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  2773. tx_mcs[0]);
  2774. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  2775. peer->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2776. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  2777. tx_mcs[1]);
  2778. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  2779. peer->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2780. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  2781. tx_mcs[2]);
  2782. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  2783. peer->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2784. DP_TRACE_STATS(FATAL, "11AC MCS(0-9) = %s",
  2785. tx_mcs[3]);
  2786. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  2787. peer->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2788. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  2789. tx_mcs[4]);
  2790. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  2791. peer->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2792. DP_TRACE_STATS(FATAL, "SGI = "
  2793. " 0.8us %d"
  2794. " 0.4us %d"
  2795. " 1.6us %d"
  2796. " 3.2us %d",
  2797. peer->stats.tx.sgi_count[0],
  2798. peer->stats.tx.sgi_count[1],
  2799. peer->stats.tx.sgi_count[2],
  2800. peer->stats.tx.sgi_count[3]);
  2801. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  2802. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  2803. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  2804. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  2805. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu = %d",
  2806. peer->stats.tx.amsdu_cnt);
  2807. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation = %d\n",
  2808. peer->stats.tx.non_amsdu_cnt);
  2809. DP_TRACE_STATS(FATAL, "Node Rx Stats:\n");
  2810. DP_TRACE_STATS(FATAL, "Packets Sent To Stack = %d",
  2811. peer->stats.rx.to_stack.num);
  2812. DP_TRACE_STATS(FATAL, "Bytes Sent To Stack = %d",
  2813. peer->stats.rx.to_stack.bytes);
  2814. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  2815. DP_TRACE_STATS(FATAL, "Packets Received = %d",
  2816. peer->stats.rx.rcvd_reo[i].num);
  2817. DP_TRACE_STATS(FATAL, "Bytes Received = %d",
  2818. peer->stats.rx.rcvd_reo[i].bytes);
  2819. }
  2820. DP_TRACE_STATS(FATAL, "Multicast Packets Received = %d",
  2821. peer->stats.rx.multicast.num);
  2822. DP_TRACE_STATS(FATAL, "Multicast Bytes Received = %d",
  2823. peer->stats.rx.multicast.bytes);
  2824. DP_TRACE_STATS(FATAL, "WDS Packets Received = %d",
  2825. peer->stats.rx.wds.num);
  2826. DP_TRACE_STATS(FATAL, "WDS Bytes Received = %d",
  2827. peer->stats.rx.wds.bytes);
  2828. DP_TRACE_STATS(FATAL, "Intra BSS Packets Received = %d",
  2829. peer->stats.rx.intra_bss.pkts.num);
  2830. DP_TRACE_STATS(FATAL, "Intra BSS Bytes Received = %d",
  2831. peer->stats.rx.intra_bss.pkts.bytes);
  2832. DP_TRACE_STATS(FATAL, "Raw Packets Received = %d",
  2833. peer->stats.rx.raw.num);
  2834. DP_TRACE_STATS(FATAL, "Raw Bytes Received = %d",
  2835. peer->stats.rx.raw.bytes);
  2836. DP_TRACE_STATS(FATAL, "Errors: MIC Errors = %d",
  2837. peer->stats.rx.err.mic_err);
  2838. DP_TRACE_STATS(FATAL, "Erros: Decryption Errors = %d",
  2839. peer->stats.rx.err.decrypt_err);
  2840. DP_TRACE_STATS(FATAL, "Msdu's Received As Part of Ampdu = %d",
  2841. peer->stats.rx.non_ampdu_cnt);
  2842. DP_TRACE_STATS(FATAL, "Msdu's Recived As Ampdu = %d",
  2843. peer->stats.rx.ampdu_cnt);
  2844. DP_TRACE_STATS(FATAL, "Msdu's Received Not Part of Amsdu's = %d",
  2845. peer->stats.rx.non_amsdu_cnt);
  2846. DP_TRACE_STATS(FATAL, "MSDUs Received As Part of Amsdu = %d",
  2847. peer->stats.rx.amsdu_cnt);
  2848. DP_TRACE_STATS(FATAL, "SGI ="
  2849. " 0.8us %d"
  2850. " 0.4us %d"
  2851. " 1.6us %d"
  2852. " 3.2us %d",
  2853. peer->stats.rx.sgi_count[0],
  2854. peer->stats.rx.sgi_count[1],
  2855. peer->stats.rx.sgi_count[2],
  2856. peer->stats.rx.sgi_count[3]);
  2857. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  2858. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  2859. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  2860. DP_TRACE_STATS(FATAL, "Reception Type ="
  2861. " SU %d,"
  2862. " MU_MIMO %d,"
  2863. " MU_OFDMA %d,"
  2864. " MU_OFDMA_MIMO %d",
  2865. peer->stats.rx.reception_type[0],
  2866. peer->stats.rx.reception_type[1],
  2867. peer->stats.rx.reception_type[2],
  2868. peer->stats.rx.reception_type[3]);
  2869. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2870. index = 0;
  2871. for (i = 0; i < MAX_MCS; i++) {
  2872. index += qdf_snprint(&rx_mcs[pkt_type][index],
  2873. DP_MCS_LENGTH - index,
  2874. " %d ",
  2875. peer->stats.rx.pkt_type[pkt_type].
  2876. mcs_count[i]);
  2877. }
  2878. }
  2879. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  2880. rx_mcs[0]);
  2881. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  2882. peer->stats.rx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2883. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  2884. rx_mcs[1]);
  2885. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  2886. peer->stats.rx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2887. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  2888. rx_mcs[2]);
  2889. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  2890. peer->stats.rx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2891. DP_TRACE_STATS(FATAL, "11AC MCS(0-9) = %s",
  2892. rx_mcs[3]);
  2893. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  2894. peer->stats.rx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2895. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  2896. rx_mcs[4]);
  2897. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  2898. peer->stats.rx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2899. index = 0;
  2900. for (i = 0; i < SS_COUNT; i++) {
  2901. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2902. " %d", peer->stats.rx.nss[i]);
  2903. }
  2904. DP_TRACE_STATS(FATAL, "NSS(0-7) = %s\n",
  2905. nss);
  2906. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  2907. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Ampdu = %d",
  2908. peer->stats.rx.ampdu_cnt);
  2909. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Mpdu Level Aggregation = %d",
  2910. peer->stats.rx.non_ampdu_cnt);
  2911. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu = %d",
  2912. peer->stats.rx.amsdu_cnt);
  2913. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation = %d",
  2914. peer->stats.rx.non_amsdu_cnt);
  2915. }
  2916. /**
  2917. * dp_print_host_stats()- Function to print the stats aggregated at host
  2918. * @vdev_handle: DP_VDEV handle
  2919. * @type: host stats type
  2920. *
  2921. * Available Stat types
  2922. * TXRX_CLEAR_STATS : Clear the stats
  2923. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  2924. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  2925. * TXRX_TX_HOST_STATS: Print Tx Stats
  2926. * TXRX_RX_HOST_STATS: Print Rx Stats
  2927. *
  2928. * Return: 0 on success, print error message in case of failure
  2929. */
  2930. static int
  2931. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  2932. {
  2933. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2934. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2935. dp_aggregate_pdev_stats(pdev);
  2936. switch (type) {
  2937. case TXRX_CLEAR_STATS:
  2938. dp_txrx_host_stats_clr(vdev);
  2939. break;
  2940. case TXRX_RX_RATE_STATS:
  2941. dp_print_rx_rates(vdev);
  2942. break;
  2943. case TXRX_TX_RATE_STATS:
  2944. dp_print_tx_rates(vdev);
  2945. break;
  2946. case TXRX_TX_HOST_STATS:
  2947. dp_print_pdev_tx_stats(pdev);
  2948. dp_print_soc_tx_stats(pdev->soc);
  2949. break;
  2950. case TXRX_RX_HOST_STATS:
  2951. dp_print_pdev_rx_stats(pdev);
  2952. dp_print_soc_rx_stats(pdev->soc);
  2953. break;
  2954. default:
  2955. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  2956. break;
  2957. }
  2958. return 0;
  2959. }
  2960. /*
  2961. * dp_get_host_peer_stats()- function to print peer stats
  2962. * @pdev_handle: DP_PDEV handle
  2963. * @mac_addr: mac address of the peer
  2964. *
  2965. * Return: void
  2966. */
  2967. static void
  2968. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  2969. {
  2970. struct dp_peer *peer;
  2971. uint8_t local_id;
  2972. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  2973. &local_id);
  2974. if (!peer) {
  2975. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2976. "%s: Invalid peer\n", __func__);
  2977. return;
  2978. }
  2979. dp_print_peer_stats(peer);
  2980. dp_peer_rxtid_stats(peer);
  2981. return;
  2982. }
  2983. /*
  2984. * dp_get_fw_peer_stats()- function to print peer stats
  2985. * @pdev_handle: DP_PDEV handle
  2986. * @mac_addr: mac address of the peer
  2987. * @cap: Type of htt stats requested
  2988. *
  2989. * Currently Supporting only MAC ID based requests Only
  2990. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  2991. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  2992. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  2993. *
  2994. * Return: void
  2995. */
  2996. static void
  2997. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  2998. uint32_t cap)
  2999. {
  3000. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3001. uint32_t config_param0 = 0;
  3002. uint32_t config_param1 = 0;
  3003. uint32_t config_param2 = 0;
  3004. uint32_t config_param3 = 0;
  3005. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  3006. config_param0 |= (1 << (cap + 1));
  3007. config_param1 = 0x8f;
  3008. config_param2 |= (mac_addr[0] & 0x000000ff);
  3009. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  3010. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  3011. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  3012. config_param3 |= (mac_addr[4] & 0x000000ff);
  3013. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  3014. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  3015. config_param0, config_param1, config_param2,
  3016. config_param3);
  3017. }
  3018. /*
  3019. * dp_set_vdev_param: function to set parameters in vdev
  3020. * @param: parameter type to be set
  3021. * @val: value of parameter to be set
  3022. *
  3023. * return: void
  3024. */
  3025. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  3026. enum cdp_vdev_param_type param, uint32_t val)
  3027. {
  3028. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3029. switch (param) {
  3030. case CDP_ENABLE_WDS:
  3031. vdev->wds_enabled = val;
  3032. break;
  3033. case CDP_ENABLE_NAWDS:
  3034. vdev->nawds_enabled = val;
  3035. break;
  3036. case CDP_ENABLE_MCAST_EN:
  3037. vdev->mcast_enhancement_en = val;
  3038. break;
  3039. case CDP_ENABLE_PROXYSTA:
  3040. vdev->proxysta_vdev = val;
  3041. break;
  3042. case CDP_UPDATE_TDLS_FLAGS:
  3043. vdev->tdls_link_connected = val;
  3044. break;
  3045. default:
  3046. break;
  3047. }
  3048. dp_tx_vdev_update_search_flags(vdev);
  3049. }
  3050. /**
  3051. * dp_peer_set_nawds: set nawds bit in peer
  3052. * @peer_handle: pointer to peer
  3053. * @value: enable/disable nawds
  3054. *
  3055. * return: void
  3056. */
  3057. static void dp_peer_set_nawds(void *peer_handle, uint8_t value)
  3058. {
  3059. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3060. peer->nawds_enabled = value;
  3061. }
  3062. /*
  3063. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  3064. * @vdev_handle: DP_VDEV handle
  3065. * @map_id:ID of map that needs to be updated
  3066. *
  3067. * Return: void
  3068. */
  3069. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  3070. uint8_t map_id)
  3071. {
  3072. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3073. vdev->dscp_tid_map_id = map_id;
  3074. return;
  3075. }
  3076. /**
  3077. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  3078. * @pdev: DP_PDEV handle
  3079. * @map_id: ID of map that needs to be updated
  3080. * @tos: index value in map
  3081. * @tid: tid value passed by the user
  3082. *
  3083. * Return: void
  3084. */
  3085. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  3086. uint8_t map_id, uint8_t tos, uint8_t tid)
  3087. {
  3088. uint8_t dscp;
  3089. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  3090. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  3091. pdev->dscp_tid_map[map_id][dscp] = tid;
  3092. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  3093. map_id, dscp);
  3094. return;
  3095. }
  3096. /**
  3097. * dp_fw_stats_process(): Process TxRX FW stats request
  3098. * @vdev_handle: DP VDEV handle
  3099. * @val: value passed by user
  3100. *
  3101. * return: int
  3102. */
  3103. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle, uint32_t val)
  3104. {
  3105. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3106. struct dp_pdev *pdev = NULL;
  3107. if (!vdev) {
  3108. DP_TRACE(NONE, "VDEV not found");
  3109. return 1;
  3110. }
  3111. pdev = vdev->pdev;
  3112. return dp_h2t_ext_stats_msg_send(pdev, val, 0, 0, 0, 0);
  3113. }
  3114. /*
  3115. * dp_txrx_stats() - function to map to firmware and host stats
  3116. * @vdev: virtual handle
  3117. * @stats: type of statistics requested
  3118. *
  3119. * Return: integer
  3120. */
  3121. static int dp_txrx_stats(struct cdp_vdev *vdev, enum cdp_stats stats)
  3122. {
  3123. int host_stats;
  3124. int fw_stats;
  3125. if (stats >= CDP_TXRX_MAX_STATS)
  3126. return 0;
  3127. /*
  3128. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  3129. * has to be updated if new FW HTT stats added
  3130. */
  3131. if (stats > CDP_TXRX_STATS_HTT_MAX)
  3132. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  3133. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  3134. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  3135. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3136. "stats: %u fw_stats_type: %d host_stats_type: %d",
  3137. stats, fw_stats, host_stats);
  3138. if (fw_stats != TXRX_FW_STATS_INVALID)
  3139. return dp_fw_stats_process(vdev, fw_stats);
  3140. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  3141. (host_stats <= TXRX_HOST_STATS_MAX))
  3142. return dp_print_host_stats(vdev, host_stats);
  3143. else
  3144. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3145. "Wrong Input for TxRx Stats");
  3146. return 0;
  3147. }
  3148. /*
  3149. * dp_print_per_ring_stats(): Packet count per ring
  3150. * @soc - soc handle
  3151. */
  3152. static void dp_print_per_ring_stats(struct dp_soc *soc)
  3153. {
  3154. uint8_t core, ring;
  3155. uint64_t total_packets;
  3156. DP_TRACE(FATAL, "Reo packets per ring:");
  3157. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  3158. total_packets = 0;
  3159. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  3160. for (core = 0; core < NR_CPUS; core++) {
  3161. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  3162. core, soc->stats.rx.ring_packets[core][ring]);
  3163. total_packets += soc->stats.rx.ring_packets[core][ring];
  3164. }
  3165. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  3166. ring, total_packets);
  3167. }
  3168. }
  3169. /*
  3170. * dp_txrx_path_stats() - Function to display dump stats
  3171. * @soc - soc handle
  3172. *
  3173. * return: none
  3174. */
  3175. static void dp_txrx_path_stats(struct dp_soc *soc)
  3176. {
  3177. uint8_t error_code;
  3178. uint8_t loop_pdev;
  3179. struct dp_pdev *pdev;
  3180. uint8_t i;
  3181. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  3182. pdev = soc->pdev_list[loop_pdev];
  3183. dp_aggregate_pdev_stats(pdev);
  3184. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3185. "Tx path Statistics:");
  3186. DP_TRACE(FATAL, "from stack: %u msdus (%u bytes)",
  3187. pdev->stats.tx_i.rcvd.num,
  3188. pdev->stats.tx_i.rcvd.bytes);
  3189. DP_TRACE(FATAL, "processed from host: %u msdus (%u bytes)",
  3190. pdev->stats.tx_i.processed.num,
  3191. pdev->stats.tx_i.processed.bytes);
  3192. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%u bytes)",
  3193. pdev->stats.tx.tx_success.num,
  3194. pdev->stats.tx.tx_success.bytes);
  3195. DP_TRACE(FATAL, "Dropped in host:");
  3196. DP_TRACE(FATAL, "Total packets dropped: %u,",
  3197. pdev->stats.tx_i.dropped.dropped_pkt.num);
  3198. DP_TRACE(FATAL, "Descriptor not available: %u",
  3199. pdev->stats.tx_i.dropped.desc_na);
  3200. DP_TRACE(FATAL, "Ring full: %u",
  3201. pdev->stats.tx_i.dropped.ring_full);
  3202. DP_TRACE(FATAL, "Enqueue fail: %u",
  3203. pdev->stats.tx_i.dropped.enqueue_fail);
  3204. DP_TRACE(FATAL, "DMA Error: %u",
  3205. pdev->stats.tx_i.dropped.dma_error);
  3206. DP_TRACE(FATAL, "Dropped in hardware:");
  3207. DP_TRACE(FATAL, "total packets dropped: %u",
  3208. pdev->stats.tx.tx_failed);
  3209. DP_TRACE(FATAL, "mpdu age out: %u",
  3210. pdev->stats.tx.dropped.mpdu_age_out);
  3211. DP_TRACE(FATAL, "firmware discard reason1: %u",
  3212. pdev->stats.tx.dropped.fw_discard_reason1);
  3213. DP_TRACE(FATAL, "firmware discard reason2: %u",
  3214. pdev->stats.tx.dropped.fw_discard_reason2);
  3215. DP_TRACE(FATAL, "firmware discard reason3: %u",
  3216. pdev->stats.tx.dropped.fw_discard_reason3);
  3217. DP_TRACE(FATAL, "peer_invalid: %u",
  3218. pdev->soc->stats.tx.tx_invalid_peer.num);
  3219. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  3220. DP_TRACE(FATAL, "Single Packet: %u",
  3221. pdev->stats.tx_comp_histogram.pkts_1);
  3222. DP_TRACE(FATAL, "2-20 Packets: %u",
  3223. pdev->stats.tx_comp_histogram.pkts_2_20);
  3224. DP_TRACE(FATAL, "21-40 Packets: %u",
  3225. pdev->stats.tx_comp_histogram.pkts_21_40);
  3226. DP_TRACE(FATAL, "41-60 Packets: %u",
  3227. pdev->stats.tx_comp_histogram.pkts_41_60);
  3228. DP_TRACE(FATAL, "61-80 Packets: %u",
  3229. pdev->stats.tx_comp_histogram.pkts_61_80);
  3230. DP_TRACE(FATAL, "81-100 Packets: %u",
  3231. pdev->stats.tx_comp_histogram.pkts_81_100);
  3232. DP_TRACE(FATAL, "101-200 Packets: %u",
  3233. pdev->stats.tx_comp_histogram.pkts_101_200);
  3234. DP_TRACE(FATAL, " 201+ Packets: %u",
  3235. pdev->stats.tx_comp_histogram.pkts_201_plus);
  3236. DP_TRACE(FATAL, "Rx path statistics");
  3237. DP_TRACE(FATAL, "delivered %u msdus ( %u bytes),",
  3238. pdev->stats.rx.to_stack.num,
  3239. pdev->stats.rx.to_stack.bytes);
  3240. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  3241. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %u bytes),",
  3242. i, pdev->stats.rx.rcvd_reo[i].num,
  3243. pdev->stats.rx.rcvd_reo[i].bytes);
  3244. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %u bytes),",
  3245. pdev->stats.rx.intra_bss.pkts.num,
  3246. pdev->stats.rx.intra_bss.pkts.bytes);
  3247. DP_TRACE(FATAL, "raw packets %u msdus ( %u bytes),",
  3248. pdev->stats.rx.raw.num,
  3249. pdev->stats.rx.raw.bytes);
  3250. DP_TRACE(FATAL, "dropped: error %u msdus",
  3251. pdev->stats.rx.err.mic_err);
  3252. DP_TRACE(FATAL, "peer invalid %u",
  3253. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  3254. DP_TRACE(FATAL, "Reo Statistics");
  3255. DP_TRACE(FATAL, "rbm error: %u msdus",
  3256. pdev->soc->stats.rx.err.invalid_rbm);
  3257. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  3258. pdev->soc->stats.rx.err.hal_ring_access_fail);
  3259. DP_TRACE(FATAL, "Reo errors");
  3260. for (error_code = 0; error_code < REO_ERROR_TYPE_MAX;
  3261. error_code++) {
  3262. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  3263. error_code,
  3264. pdev->soc->stats.rx.err.reo_error[error_code]);
  3265. }
  3266. for (error_code = 0; error_code < MAX_RXDMA_ERRORS;
  3267. error_code++) {
  3268. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  3269. error_code,
  3270. pdev->soc->stats.rx.err
  3271. .rxdma_error[error_code]);
  3272. }
  3273. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  3274. DP_TRACE(FATAL, "Single Packet: %u",
  3275. pdev->stats.rx_ind_histogram.pkts_1);
  3276. DP_TRACE(FATAL, "2-20 Packets: %u",
  3277. pdev->stats.rx_ind_histogram.pkts_2_20);
  3278. DP_TRACE(FATAL, "21-40 Packets: %u",
  3279. pdev->stats.rx_ind_histogram.pkts_21_40);
  3280. DP_TRACE(FATAL, "41-60 Packets: %u",
  3281. pdev->stats.rx_ind_histogram.pkts_41_60);
  3282. DP_TRACE(FATAL, "61-80 Packets: %u",
  3283. pdev->stats.rx_ind_histogram.pkts_61_80);
  3284. DP_TRACE(FATAL, "81-100 Packets: %u",
  3285. pdev->stats.rx_ind_histogram.pkts_81_100);
  3286. DP_TRACE(FATAL, "101-200 Packets: %u",
  3287. pdev->stats.rx_ind_histogram.pkts_101_200);
  3288. DP_TRACE(FATAL, " 201+ Packets: %u",
  3289. pdev->stats.rx_ind_histogram.pkts_201_plus);
  3290. }
  3291. }
  3292. /*
  3293. * dp_txrx_dump_stats() - Dump statistics
  3294. * @value - Statistics option
  3295. */
  3296. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value)
  3297. {
  3298. struct dp_soc *soc =
  3299. (struct dp_soc *)psoc;
  3300. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3301. if (!soc) {
  3302. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3303. "%s: soc is NULL", __func__);
  3304. return QDF_STATUS_E_INVAL;
  3305. }
  3306. switch (value) {
  3307. case CDP_TXRX_PATH_STATS:
  3308. dp_txrx_path_stats(soc);
  3309. break;
  3310. case CDP_RX_RING_STATS:
  3311. dp_print_per_ring_stats(soc);
  3312. break;
  3313. case CDP_TXRX_TSO_STATS:
  3314. /* TODO: NOT IMPLEMENTED */
  3315. break;
  3316. case CDP_DUMP_TX_FLOW_POOL_INFO:
  3317. /* TODO: NOT IMPLEMENTED */
  3318. break;
  3319. case CDP_TXRX_DESC_STATS:
  3320. /* TODO: NOT IMPLEMENTED */
  3321. break;
  3322. default:
  3323. status = QDF_STATUS_E_INVAL;
  3324. break;
  3325. }
  3326. return status;
  3327. }
  3328. static struct cdp_wds_ops dp_ops_wds = {
  3329. .vdev_set_wds = dp_vdev_set_wds,
  3330. };
  3331. static struct cdp_cmn_ops dp_ops_cmn = {
  3332. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  3333. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  3334. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  3335. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  3336. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  3337. .txrx_peer_create = dp_peer_create_wifi3,
  3338. .txrx_peer_setup = dp_peer_setup_wifi3,
  3339. .txrx_peer_teardown = NULL,
  3340. .txrx_peer_delete = dp_peer_delete_wifi3,
  3341. .txrx_vdev_register = dp_vdev_register_wifi3,
  3342. .txrx_soc_detach = dp_soc_detach_wifi3,
  3343. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  3344. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  3345. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  3346. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  3347. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  3348. .delba_process = dp_delba_process_wifi3,
  3349. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  3350. .flush_cache_rx_queue = NULL,
  3351. /* TODO: get API's for dscp-tid need to be added*/
  3352. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  3353. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  3354. .txrx_stats = dp_txrx_stats,
  3355. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  3356. .display_stats = dp_txrx_dump_stats,
  3357. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  3358. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  3359. .txrx_intr_attach = dp_soc_interrupt_attach,
  3360. .txrx_intr_detach = dp_soc_interrupt_detach,
  3361. .set_pn_check = dp_set_pn_check_wifi3,
  3362. /* TODO: Add other functions */
  3363. };
  3364. static struct cdp_ctrl_ops dp_ops_ctrl = {
  3365. .txrx_peer_authorize = dp_peer_authorize,
  3366. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  3367. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  3368. #ifdef MESH_MODE_SUPPORT
  3369. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  3370. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  3371. #endif
  3372. .txrx_set_vdev_param = dp_set_vdev_param,
  3373. .txrx_peer_set_nawds = dp_peer_set_nawds,
  3374. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  3375. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  3376. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  3377. .txrx_update_filter_neighbour_peers =
  3378. dp_update_filter_neighbour_peers,
  3379. /* TODO: Add other functions */
  3380. };
  3381. static struct cdp_me_ops dp_ops_me = {
  3382. #ifdef ATH_SUPPORT_IQUE
  3383. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  3384. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  3385. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  3386. #endif
  3387. };
  3388. static struct cdp_mon_ops dp_ops_mon = {
  3389. .txrx_monitor_set_filter_ucast_data = NULL,
  3390. .txrx_monitor_set_filter_mcast_data = NULL,
  3391. .txrx_monitor_set_filter_non_data = NULL,
  3392. .txrx_monitor_get_filter_ucast_data = NULL,
  3393. .txrx_monitor_get_filter_mcast_data = NULL,
  3394. .txrx_monitor_get_filter_non_data = NULL,
  3395. .txrx_reset_monitor_mode = NULL,
  3396. };
  3397. static struct cdp_host_stats_ops dp_ops_host_stats = {
  3398. .txrx_per_peer_stats = dp_get_host_peer_stats,
  3399. .get_fw_peer_stats = dp_get_fw_peer_stats,
  3400. /* TODO */
  3401. };
  3402. static struct cdp_raw_ops dp_ops_raw = {
  3403. /* TODO */
  3404. };
  3405. #ifdef CONFIG_WIN
  3406. static struct cdp_pflow_ops dp_ops_pflow = {
  3407. /* TODO */
  3408. };
  3409. #endif /* CONFIG_WIN */
  3410. #ifdef DP_INTR_POLL_BASED
  3411. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  3412. {
  3413. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  3414. struct dp_soc *soc = pdev->soc;
  3415. qdf_timer_stop(&soc->int_timer);
  3416. return QDF_STATUS_SUCCESS;
  3417. }
  3418. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  3419. {
  3420. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  3421. struct dp_soc *soc = pdev->soc;
  3422. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  3423. return QDF_STATUS_SUCCESS;
  3424. }
  3425. #else
  3426. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  3427. {
  3428. return QDF_STATUS_SUCCESS;
  3429. }
  3430. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  3431. {
  3432. return QDF_STATUS_SUCCESS;
  3433. }
  3434. #endif /* DP_INTR_POLL_BASED */
  3435. #ifndef CONFIG_WIN
  3436. static struct cdp_misc_ops dp_ops_misc = {
  3437. .get_opmode = dp_get_opmode,
  3438. #ifdef FEATURE_RUNTIME_PM
  3439. .runtime_suspend = dp_bus_suspend,
  3440. .runtime_resume = dp_bus_resume,
  3441. #endif
  3442. };
  3443. static struct cdp_flowctl_ops dp_ops_flowctl = {
  3444. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3445. };
  3446. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  3447. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3448. };
  3449. static struct cdp_ipa_ops dp_ops_ipa = {
  3450. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3451. };
  3452. static struct cdp_bus_ops dp_ops_bus = {
  3453. .bus_suspend = dp_bus_suspend,
  3454. .bus_resume = dp_bus_resume
  3455. };
  3456. static struct cdp_ocb_ops dp_ops_ocb = {
  3457. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3458. };
  3459. static struct cdp_throttle_ops dp_ops_throttle = {
  3460. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3461. };
  3462. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  3463. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3464. };
  3465. static struct cdp_cfg_ops dp_ops_cfg = {
  3466. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3467. };
  3468. static struct cdp_peer_ops dp_ops_peer = {
  3469. .register_peer = dp_register_peer,
  3470. .clear_peer = dp_clear_peer,
  3471. .find_peer_by_addr = dp_find_peer_by_addr,
  3472. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  3473. .local_peer_id = dp_local_peer_id,
  3474. .peer_find_by_local_id = dp_peer_find_by_local_id,
  3475. .peer_state_update = dp_peer_state_update,
  3476. .get_vdevid = dp_get_vdevid,
  3477. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  3478. .get_vdev_for_peer = dp_get_vdev_for_peer,
  3479. .get_peer_state = dp_get_peer_state,
  3480. .last_assoc_received = dp_get_last_assoc_received,
  3481. .last_disassoc_received = dp_get_last_disassoc_received,
  3482. .last_deauth_received = dp_get_last_deauth_received,
  3483. };
  3484. #endif
  3485. static struct cdp_ops dp_txrx_ops = {
  3486. .cmn_drv_ops = &dp_ops_cmn,
  3487. .ctrl_ops = &dp_ops_ctrl,
  3488. .me_ops = &dp_ops_me,
  3489. .mon_ops = &dp_ops_mon,
  3490. .host_stats_ops = &dp_ops_host_stats,
  3491. .wds_ops = &dp_ops_wds,
  3492. .raw_ops = &dp_ops_raw,
  3493. #ifdef CONFIG_WIN
  3494. .pflow_ops = &dp_ops_pflow,
  3495. #endif /* CONFIG_WIN */
  3496. #ifndef CONFIG_WIN
  3497. .misc_ops = &dp_ops_misc,
  3498. .cfg_ops = &dp_ops_cfg,
  3499. .flowctl_ops = &dp_ops_flowctl,
  3500. .l_flowctl_ops = &dp_ops_l_flowctl,
  3501. .ipa_ops = &dp_ops_ipa,
  3502. .bus_ops = &dp_ops_bus,
  3503. .ocb_ops = &dp_ops_ocb,
  3504. .peer_ops = &dp_ops_peer,
  3505. .throttle_ops = &dp_ops_throttle,
  3506. .mob_stats_ops = &dp_ops_mob_stats,
  3507. #endif
  3508. };
  3509. /*
  3510. * dp_soc_attach_wifi3() - Attach txrx SOC
  3511. * @osif_soc: Opaque SOC handle from OSIF/HDD
  3512. * @htc_handle: Opaque HTC handle
  3513. * @hif_handle: Opaque HIF handle
  3514. * @qdf_osdev: QDF device
  3515. *
  3516. * Return: DP SOC handle on success, NULL on failure
  3517. */
  3518. /*
  3519. * Local prototype added to temporarily address warning caused by
  3520. * -Wmissing-prototypes. A more correct solution, namely to expose
  3521. * a prototype in an appropriate header file, will come later.
  3522. */
  3523. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  3524. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  3525. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc);
  3526. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  3527. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  3528. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc)
  3529. {
  3530. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  3531. if (!soc) {
  3532. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3533. FL("DP SOC memory allocation failed"));
  3534. goto fail0;
  3535. }
  3536. soc->cdp_soc.ops = &dp_txrx_ops;
  3537. soc->cdp_soc.ol_ops = ol_ops;
  3538. soc->osif_soc = osif_soc;
  3539. soc->osdev = qdf_osdev;
  3540. soc->hif_handle = hif_handle;
  3541. soc->psoc = psoc;
  3542. soc->hal_soc = hif_get_hal_handle(hif_handle);
  3543. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  3544. soc->hal_soc, qdf_osdev);
  3545. if (!soc->htt_handle) {
  3546. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3547. FL("HTT attach failed"));
  3548. goto fail1;
  3549. }
  3550. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  3551. if (!soc->wlan_cfg_ctx) {
  3552. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3553. FL("wlan_cfg_soc_attach failed"));
  3554. goto fail2;
  3555. }
  3556. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  3557. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc,
  3558. CDP_CFG_MAX_PEER_ID);
  3559. if (ret != -EINVAL) {
  3560. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  3561. }
  3562. }
  3563. qdf_spinlock_create(&soc->peer_ref_mutex);
  3564. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  3565. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  3566. return (void *)soc;
  3567. fail2:
  3568. htt_soc_detach(soc->htt_handle);
  3569. fail1:
  3570. qdf_mem_free(soc);
  3571. fail0:
  3572. return NULL;
  3573. }