dp_main.c 202 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797579857995800580158025803580458055806580758085809581058115812581358145815581658175818581958205821582258235824582558265827582858295830583158325833583458355836583758385839584058415842584358445845584658475848584958505851585258535854585558565857585858595860586158625863586458655866586758685869587058715872587358745875587658775878587958805881588258835884588558865887588858895890589158925893589458955896589758985899590059015902590359045905590659075908590959105911591259135914591559165917591859195920592159225923592459255926592759285929593059315932593359345935593659375938593959405941594259435944594559465947594859495950595159525953595459555956595759585959596059615962596359645965596659675968596959705971597259735974597559765977597859795980598159825983598459855986598759885989599059915992599359945995599659975998599960006001600260036004600560066007600860096010601160126013601460156016601760186019602060216022602360246025602660276028602960306031603260336034603560366037603860396040604160426043604460456046604760486049605060516052605360546055605660576058605960606061606260636064606560666067606860696070607160726073607460756076607760786079608060816082608360846085608660876088608960906091609260936094609560966097609860996100610161026103610461056106610761086109611061116112611361146115611661176118611961206121612261236124612561266127612861296130613161326133613461356136613761386139614061416142614361446145614661476148614961506151615261536154615561566157615861596160616161626163616461656166616761686169617061716172617361746175617661776178617961806181618261836184618561866187618861896190619161926193619461956196619761986199620062016202620362046205620662076208620962106211621262136214621562166217621862196220622162226223622462256226622762286229623062316232623362346235623662376238623962406241624262436244624562466247624862496250625162526253625462556256625762586259626062616262626362646265626662676268626962706271627262736274627562766277627862796280628162826283628462856286628762886289629062916292629362946295629662976298629963006301630263036304630563066307630863096310631163126313631463156316631763186319632063216322632363246325632663276328632963306331633263336334633563366337633863396340634163426343634463456346634763486349635063516352635363546355635663576358635963606361636263636364636563666367636863696370637163726373637463756376637763786379638063816382638363846385638663876388638963906391639263936394639563966397639863996400640164026403640464056406640764086409641064116412641364146415641664176418641964206421642264236424642564266427642864296430643164326433643464356436643764386439644064416442644364446445644664476448644964506451645264536454645564566457645864596460646164626463646464656466646764686469647064716472647364746475647664776478647964806481648264836484648564866487648864896490649164926493649464956496649764986499650065016502650365046505650665076508650965106511651265136514651565166517651865196520652165226523652465256526652765286529653065316532653365346535653665376538653965406541654265436544654565466547654865496550655165526553655465556556655765586559656065616562656365646565656665676568656965706571657265736574657565766577657865796580658165826583658465856586658765886589659065916592659365946595659665976598659966006601660266036604660566066607660866096610661166126613661466156616661766186619662066216622662366246625662666276628662966306631663266336634663566366637663866396640664166426643664466456646664766486649665066516652665366546655665666576658665966606661666266636664666566666667666866696670667166726673667466756676667766786679668066816682668366846685668666876688668966906691669266936694669566966697669866996700670167026703670467056706670767086709671067116712671367146715671667176718671967206721672267236724672567266727672867296730673167326733673467356736673767386739674067416742674367446745674667476748674967506751675267536754675567566757675867596760676167626763676467656766676767686769677067716772677367746775677667776778677967806781678267836784678567866787678867896790679167926793679467956796679767986799680068016802680368046805680668076808680968106811681268136814681568166817681868196820682168226823682468256826682768286829683068316832683368346835683668376838683968406841684268436844684568466847684868496850685168526853685468556856685768586859686068616862686368646865686668676868686968706871687268736874687568766877687868796880688168826883688468856886688768886889689068916892689368946895689668976898689969006901690269036904690569066907690869096910691169126913691469156916691769186919692069216922692369246925692669276928692969306931693269336934693569366937693869396940694169426943694469456946694769486949695069516952695369546955695669576958695969606961696269636964696569666967696869696970697169726973697469756976697769786979698069816982698369846985698669876988698969906991699269936994699569966997699869997000700170027003700470057006700770087009701070117012701370147015701670177018701970207021702270237024702570267027702870297030703170327033703470357036703770387039704070417042704370447045704670477048704970507051705270537054705570567057705870597060706170627063706470657066706770687069707070717072707370747075707670777078707970807081708270837084708570867087708870897090709170927093709470957096709770987099710071017102710371047105710671077108710971107111711271137114711571167117711871197120712171227123712471257126712771287129713071317132713371347135713671377138713971407141714271437144714571467147714871497150715171527153715471557156715771587159716071617162716371647165716671677168716971707171717271737174717571767177717871797180718171827183718471857186718771887189719071917192719371947195719671977198719972007201720272037204720572067207720872097210721172127213721472157216721772187219722072217222722372247225722672277228722972307231723272337234723572367237723872397240724172427243724472457246724772487249725072517252725372547255725672577258725972607261726272637264726572667267726872697270727172727273727472757276727772787279728072817282728372847285728672877288728972907291729272937294729572967297729872997300730173027303730473057306730773087309731073117312731373147315731673177318731973207321732273237324732573267327732873297330733173327333733473357336733773387339734073417342734373447345734673477348734973507351735273537354735573567357735873597360736173627363736473657366736773687369737073717372737373747375737673777378737973807381738273837384738573867387738873897390739173927393739473957396739773987399740074017402740374047405740674077408740974107411741274137414741574167417741874197420742174227423742474257426742774287429743074317432
  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include "cdp_txrx_stats_struct.h"
  38. #include <qdf_util.h>
  39. #include "dp_peer.h"
  40. #include "dp_rx_mon.h"
  41. #include "htt_stats.h"
  42. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  43. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  44. #include "cdp_txrx_flow_ctrl_v2.h"
  45. #else
  46. static inline void
  47. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  48. {
  49. return;
  50. }
  51. #endif
  52. #include "dp_ipa.h"
  53. #ifdef CONFIG_MCL
  54. static void dp_service_mon_rings(void *arg);
  55. #ifndef REMOVE_PKT_LOG
  56. #include <pktlog_ac_api.h>
  57. #include <pktlog_ac.h>
  58. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  59. #endif
  60. #endif
  61. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  62. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  63. uint8_t *peer_mac_addr);
  64. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  65. #define DP_INTR_POLL_TIMER_MS 10
  66. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  67. #define DP_MCS_LENGTH (6*MAX_MCS)
  68. #define DP_NSS_LENGTH (6*SS_COUNT)
  69. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  70. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  71. #define DP_MAX_MCS_STRING_LEN 30
  72. #define DP_CURR_FW_STATS_AVAIL 19
  73. #define DP_HTT_DBG_EXT_STATS_MAX 256
  74. #define DP_MAX_SLEEP_TIME 100
  75. #ifdef IPA_OFFLOAD
  76. /* Exclude IPA rings from the interrupt context */
  77. #define TX_RING_MASK_VAL 0xb
  78. #define RX_RING_MASK_VAL 0x7
  79. #else
  80. #define TX_RING_MASK_VAL 0xF
  81. #define RX_RING_MASK_VAL 0xF
  82. #endif
  83. bool rx_hash = 1;
  84. qdf_declare_param(rx_hash, bool);
  85. #define STR_MAXLEN 64
  86. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  87. /* PPDU stats mask sent to FW to enable enhanced stats */
  88. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  89. /* PPDU stats mask sent to FW to support debug sniffer feature */
  90. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  91. /**
  92. * default_dscp_tid_map - Default DSCP-TID mapping
  93. *
  94. * DSCP TID
  95. * 000000 0
  96. * 001000 1
  97. * 010000 2
  98. * 011000 3
  99. * 100000 4
  100. * 101000 5
  101. * 110000 6
  102. * 111000 7
  103. */
  104. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  105. 0, 0, 0, 0, 0, 0, 0, 0,
  106. 1, 1, 1, 1, 1, 1, 1, 1,
  107. 2, 2, 2, 2, 2, 2, 2, 2,
  108. 3, 3, 3, 3, 3, 3, 3, 3,
  109. 4, 4, 4, 4, 4, 4, 4, 4,
  110. 5, 5, 5, 5, 5, 5, 5, 5,
  111. 6, 6, 6, 6, 6, 6, 6, 6,
  112. 7, 7, 7, 7, 7, 7, 7, 7,
  113. };
  114. /*
  115. * struct dp_rate_debug
  116. *
  117. * @mcs_type: print string for a given mcs
  118. * @valid: valid mcs rate?
  119. */
  120. struct dp_rate_debug {
  121. char mcs_type[DP_MAX_MCS_STRING_LEN];
  122. uint8_t valid;
  123. };
  124. #define MCS_VALID 1
  125. #define MCS_INVALID 0
  126. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  127. {
  128. {"OFDM 48 Mbps", MCS_VALID},
  129. {"OFDM 24 Mbps", MCS_VALID},
  130. {"OFDM 12 Mbps", MCS_VALID},
  131. {"OFDM 6 Mbps ", MCS_VALID},
  132. {"OFDM 54 Mbps", MCS_VALID},
  133. {"OFDM 36 Mbps", MCS_VALID},
  134. {"OFDM 18 Mbps", MCS_VALID},
  135. {"OFDM 9 Mbps ", MCS_VALID},
  136. {"INVALID ", MCS_INVALID},
  137. {"INVALID ", MCS_INVALID},
  138. {"INVALID ", MCS_INVALID},
  139. {"INVALID ", MCS_INVALID},
  140. {"INVALID ", MCS_VALID},
  141. },
  142. {
  143. {"CCK 11 Mbps Long ", MCS_VALID},
  144. {"CCK 5.5 Mbps Long ", MCS_VALID},
  145. {"CCK 2 Mbps Long ", MCS_VALID},
  146. {"CCK 1 Mbps Long ", MCS_VALID},
  147. {"CCK 11 Mbps Short ", MCS_VALID},
  148. {"CCK 5.5 Mbps Short", MCS_VALID},
  149. {"CCK 2 Mbps Short ", MCS_VALID},
  150. {"INVALID ", MCS_INVALID},
  151. {"INVALID ", MCS_INVALID},
  152. {"INVALID ", MCS_INVALID},
  153. {"INVALID ", MCS_INVALID},
  154. {"INVALID ", MCS_INVALID},
  155. {"INVALID ", MCS_VALID},
  156. },
  157. {
  158. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  159. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  160. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  161. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  162. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  163. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  164. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  165. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  166. {"INVALID ", MCS_INVALID},
  167. {"INVALID ", MCS_INVALID},
  168. {"INVALID ", MCS_INVALID},
  169. {"INVALID ", MCS_INVALID},
  170. {"INVALID ", MCS_VALID},
  171. },
  172. {
  173. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  174. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  175. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  176. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  177. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  178. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  179. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  180. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  181. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  182. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  183. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  184. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  185. {"INVALID ", MCS_VALID},
  186. },
  187. {
  188. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  189. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  190. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  191. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  192. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  193. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  194. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  195. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  196. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  197. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  198. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  199. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  200. {"INVALID ", MCS_VALID},
  201. }
  202. };
  203. /**
  204. * @brief Cpu ring map types
  205. */
  206. enum dp_cpu_ring_map_types {
  207. DP_DEFAULT_MAP,
  208. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  209. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  210. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  211. DP_CPU_RING_MAP_MAX
  212. };
  213. /**
  214. * @brief Cpu to tx ring map
  215. */
  216. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  217. {0x0, 0x1, 0x2, 0x0},
  218. {0x1, 0x2, 0x1, 0x2},
  219. {0x0, 0x2, 0x0, 0x2},
  220. {0x2, 0x2, 0x2, 0x2}
  221. };
  222. /**
  223. * @brief Select the type of statistics
  224. */
  225. enum dp_stats_type {
  226. STATS_FW = 0,
  227. STATS_HOST = 1,
  228. STATS_TYPE_MAX = 2,
  229. };
  230. /**
  231. * @brief General Firmware statistics options
  232. *
  233. */
  234. enum dp_fw_stats {
  235. TXRX_FW_STATS_INVALID = -1,
  236. };
  237. /**
  238. * dp_stats_mapping_table - Firmware and Host statistics
  239. * currently supported
  240. */
  241. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  242. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  243. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  244. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  245. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  246. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  247. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  248. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  249. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  250. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  252. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  253. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  254. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  260. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  261. /* Last ENUM for HTT FW STATS */
  262. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  263. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  264. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  265. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  266. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  267. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  268. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  269. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  270. };
  271. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  272. struct cdp_peer *peer_hdl,
  273. uint8_t *mac_addr,
  274. enum cdp_txrx_ast_entry_type type,
  275. uint32_t flags)
  276. {
  277. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  278. (struct dp_peer *)peer_hdl,
  279. mac_addr,
  280. type,
  281. flags);
  282. }
  283. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  284. void *ast_entry_hdl)
  285. {
  286. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  287. qdf_spin_lock_bh(&soc->ast_lock);
  288. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  289. (struct dp_ast_entry *)ast_entry_hdl);
  290. qdf_spin_unlock_bh(&soc->ast_lock);
  291. }
  292. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  293. struct cdp_peer *peer_hdl,
  294. void *ast_entry_hdl,
  295. uint32_t flags)
  296. {
  297. int status;
  298. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  299. status = dp_peer_update_ast(soc,
  300. (struct dp_peer *)peer_hdl,
  301. (struct dp_ast_entry *)ast_entry_hdl,
  302. flags);
  303. return status;
  304. }
  305. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  306. uint8_t *ast_mac_addr)
  307. {
  308. struct dp_ast_entry *ast_entry;
  309. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  310. qdf_spin_lock_bh(&soc->ast_lock);
  311. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  312. qdf_spin_unlock_bh(&soc->ast_lock);
  313. return (void *)ast_entry;
  314. }
  315. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  316. void *ast_entry_hdl)
  317. {
  318. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  319. (struct dp_ast_entry *)ast_entry_hdl);
  320. }
  321. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  322. void *ast_entry_hdl)
  323. {
  324. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  325. (struct dp_ast_entry *)ast_entry_hdl);
  326. }
  327. static void dp_peer_ast_set_type_wifi3(
  328. struct cdp_soc_t *soc_hdl,
  329. void *ast_entry_hdl,
  330. enum cdp_txrx_ast_entry_type type)
  331. {
  332. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  333. (struct dp_ast_entry *)ast_entry_hdl,
  334. type);
  335. }
  336. /**
  337. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  338. * @ring_num: ring num of the ring being queried
  339. * @grp_mask: the grp_mask array for the ring type in question.
  340. *
  341. * The grp_mask array is indexed by group number and the bit fields correspond
  342. * to ring numbers. We are finding which interrupt group a ring belongs to.
  343. *
  344. * Return: the index in the grp_mask array with the ring number.
  345. * -QDF_STATUS_E_NOENT if no entry is found
  346. */
  347. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  348. {
  349. int ext_group_num;
  350. int mask = 1 << ring_num;
  351. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  352. ext_group_num++) {
  353. if (mask & grp_mask[ext_group_num])
  354. return ext_group_num;
  355. }
  356. return -QDF_STATUS_E_NOENT;
  357. }
  358. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  359. enum hal_ring_type ring_type,
  360. int ring_num)
  361. {
  362. int *grp_mask;
  363. switch (ring_type) {
  364. case WBM2SW_RELEASE:
  365. /* dp_tx_comp_handler - soc->tx_comp_ring */
  366. if (ring_num < 3)
  367. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  368. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  369. else if (ring_num == 3) {
  370. /* sw treats this as a separate ring type */
  371. grp_mask = &soc->wlan_cfg_ctx->
  372. int_rx_wbm_rel_ring_mask[0];
  373. ring_num = 0;
  374. } else {
  375. qdf_assert(0);
  376. return -QDF_STATUS_E_NOENT;
  377. }
  378. break;
  379. case REO_EXCEPTION:
  380. /* dp_rx_err_process - &soc->reo_exception_ring */
  381. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  382. break;
  383. case REO_DST:
  384. /* dp_rx_process - soc->reo_dest_ring */
  385. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  386. break;
  387. case REO_STATUS:
  388. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  389. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  390. break;
  391. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  392. case RXDMA_MONITOR_STATUS:
  393. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  394. case RXDMA_MONITOR_DST:
  395. /* dp_mon_process */
  396. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  397. break;
  398. case RXDMA_DST:
  399. /* dp_rxdma_err_process */
  400. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  401. break;
  402. case RXDMA_BUF:
  403. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  404. break;
  405. case RXDMA_MONITOR_BUF:
  406. /* TODO: support low_thresh interrupt */
  407. return -QDF_STATUS_E_NOENT;
  408. break;
  409. case TCL_DATA:
  410. case TCL_CMD:
  411. case REO_CMD:
  412. case SW2WBM_RELEASE:
  413. case WBM_IDLE_LINK:
  414. /* normally empty SW_TO_HW rings */
  415. return -QDF_STATUS_E_NOENT;
  416. break;
  417. case TCL_STATUS:
  418. case REO_REINJECT:
  419. /* misc unused rings */
  420. return -QDF_STATUS_E_NOENT;
  421. break;
  422. case CE_SRC:
  423. case CE_DST:
  424. case CE_DST_STATUS:
  425. /* CE_rings - currently handled by hif */
  426. default:
  427. return -QDF_STATUS_E_NOENT;
  428. break;
  429. }
  430. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  431. }
  432. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  433. *ring_params, int ring_type, int ring_num)
  434. {
  435. int msi_group_number;
  436. int msi_data_count;
  437. int ret;
  438. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  439. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  440. &msi_data_count, &msi_data_start,
  441. &msi_irq_start);
  442. if (ret)
  443. return;
  444. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  445. ring_num);
  446. if (msi_group_number < 0) {
  447. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  448. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  449. ring_type, ring_num);
  450. ring_params->msi_addr = 0;
  451. ring_params->msi_data = 0;
  452. return;
  453. }
  454. if (msi_group_number > msi_data_count) {
  455. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  456. FL("2 msi_groups will share an msi; msi_group_num %d"),
  457. msi_group_number);
  458. QDF_ASSERT(0);
  459. }
  460. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  461. ring_params->msi_addr = addr_low;
  462. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  463. ring_params->msi_data = (msi_group_number % msi_data_count)
  464. + msi_data_start;
  465. ring_params->flags |= HAL_SRNG_MSI_INTR;
  466. }
  467. /**
  468. * dp_print_ast_stats() - Dump AST table contents
  469. * @soc: Datapath soc handle
  470. *
  471. * return void
  472. */
  473. #ifdef FEATURE_AST
  474. static void dp_print_ast_stats(struct dp_soc *soc)
  475. {
  476. uint8_t i;
  477. uint8_t num_entries = 0;
  478. struct dp_vdev *vdev;
  479. struct dp_pdev *pdev;
  480. struct dp_peer *peer;
  481. struct dp_ast_entry *ase, *tmp_ase;
  482. char type[5][10] = {"NONE", "STATIC", "WDS", "MEC", "HMWDS"};
  483. DP_PRINT_STATS("AST Stats:");
  484. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  485. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  486. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  487. DP_PRINT_STATS("AST Table:");
  488. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  489. pdev = soc->pdev_list[i];
  490. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  491. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  492. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  493. DP_PRINT_STATS("%6d mac_addr = %pM"
  494. " peer_mac_addr = %pM"
  495. " type = %s"
  496. " next_hop = %d"
  497. " is_active = %d"
  498. " is_bss = %d"
  499. " ast_idx = %d"
  500. " pdev_id = %d"
  501. " vdev_id = %d",
  502. ++num_entries,
  503. ase->mac_addr.raw,
  504. ase->peer->mac_addr.raw,
  505. type[ase->type],
  506. ase->next_hop,
  507. ase->is_active,
  508. ase->is_bss,
  509. ase->ast_idx,
  510. ase->pdev_id,
  511. ase->vdev_id);
  512. }
  513. }
  514. }
  515. }
  516. }
  517. #else
  518. static void dp_print_ast_stats(struct dp_soc *soc)
  519. {
  520. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  521. return;
  522. }
  523. #endif
  524. /*
  525. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  526. */
  527. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  528. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  529. {
  530. void *hal_soc = soc->hal_soc;
  531. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  532. /* TODO: See if we should get align size from hal */
  533. uint32_t ring_base_align = 8;
  534. struct hal_srng_params ring_params;
  535. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  536. /* TODO: Currently hal layer takes care of endianness related settings.
  537. * See if these settings need to passed from DP layer
  538. */
  539. ring_params.flags = 0;
  540. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  541. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  542. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  543. srng->hal_srng = NULL;
  544. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  545. srng->num_entries = num_entries;
  546. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  547. soc->osdev, soc->osdev->dev, srng->alloc_size,
  548. &(srng->base_paddr_unaligned));
  549. if (!srng->base_vaddr_unaligned) {
  550. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  551. FL("alloc failed - ring_type: %d, ring_num %d"),
  552. ring_type, ring_num);
  553. return QDF_STATUS_E_NOMEM;
  554. }
  555. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  556. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  557. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  558. ((unsigned long)(ring_params.ring_base_vaddr) -
  559. (unsigned long)srng->base_vaddr_unaligned);
  560. ring_params.num_entries = num_entries;
  561. if (soc->intr_mode == DP_INTR_MSI) {
  562. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  563. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  564. FL("Using MSI for ring_type: %d, ring_num %d"),
  565. ring_type, ring_num);
  566. } else {
  567. ring_params.msi_data = 0;
  568. ring_params.msi_addr = 0;
  569. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  570. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  571. ring_type, ring_num);
  572. }
  573. /*
  574. * Setup interrupt timer and batch counter thresholds for
  575. * interrupt mitigation based on ring type
  576. */
  577. if (ring_type == REO_DST) {
  578. ring_params.intr_timer_thres_us =
  579. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  580. ring_params.intr_batch_cntr_thres_entries =
  581. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  582. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  583. ring_params.intr_timer_thres_us =
  584. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  585. ring_params.intr_batch_cntr_thres_entries =
  586. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  587. } else {
  588. ring_params.intr_timer_thres_us =
  589. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  590. ring_params.intr_batch_cntr_thres_entries =
  591. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  592. }
  593. /* Enable low threshold interrupts for rx buffer rings (regular and
  594. * monitor buffer rings.
  595. * TODO: See if this is required for any other ring
  596. */
  597. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  598. (ring_type == RXDMA_MONITOR_STATUS)) {
  599. /* TODO: Setting low threshold to 1/8th of ring size
  600. * see if this needs to be configurable
  601. */
  602. ring_params.low_threshold = num_entries >> 3;
  603. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  604. ring_params.intr_timer_thres_us = 0x1000;
  605. }
  606. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  607. mac_id, &ring_params);
  608. if (!srng->hal_srng) {
  609. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  610. srng->alloc_size,
  611. srng->base_vaddr_unaligned,
  612. srng->base_paddr_unaligned, 0);
  613. }
  614. return 0;
  615. }
  616. /**
  617. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  618. * Any buffers allocated and attached to ring entries are expected to be freed
  619. * before calling this function.
  620. */
  621. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  622. int ring_type, int ring_num)
  623. {
  624. if (!srng->hal_srng) {
  625. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  626. FL("Ring type: %d, num:%d not setup"),
  627. ring_type, ring_num);
  628. return;
  629. }
  630. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  631. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  632. srng->alloc_size,
  633. srng->base_vaddr_unaligned,
  634. srng->base_paddr_unaligned, 0);
  635. srng->hal_srng = NULL;
  636. }
  637. /* TODO: Need this interface from HIF */
  638. void *hif_get_hal_handle(void *hif_handle);
  639. /*
  640. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  641. * @dp_ctx: DP SOC handle
  642. * @budget: Number of frames/descriptors that can be processed in one shot
  643. *
  644. * Return: remaining budget/quota for the soc device
  645. */
  646. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  647. {
  648. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  649. struct dp_soc *soc = int_ctx->soc;
  650. int ring = 0;
  651. uint32_t work_done = 0;
  652. int budget = dp_budget;
  653. uint8_t tx_mask = int_ctx->tx_ring_mask;
  654. uint8_t rx_mask = int_ctx->rx_ring_mask;
  655. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  656. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  657. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  658. uint32_t remaining_quota = dp_budget;
  659. struct dp_pdev *pdev = NULL;
  660. int mac_id;
  661. /* Process Tx completion interrupts first to return back buffers */
  662. while (tx_mask) {
  663. if (tx_mask & 0x1) {
  664. work_done = dp_tx_comp_handler(soc,
  665. soc->tx_comp_ring[ring].hal_srng,
  666. remaining_quota);
  667. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  668. "tx mask 0x%x ring %d, budget %d, work_done %d",
  669. tx_mask, ring, budget, work_done);
  670. budget -= work_done;
  671. if (budget <= 0)
  672. goto budget_done;
  673. remaining_quota = budget;
  674. }
  675. tx_mask = tx_mask >> 1;
  676. ring++;
  677. }
  678. /* Process REO Exception ring interrupt */
  679. if (rx_err_mask) {
  680. work_done = dp_rx_err_process(soc,
  681. soc->reo_exception_ring.hal_srng,
  682. remaining_quota);
  683. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  684. "REO Exception Ring: work_done %d budget %d",
  685. work_done, budget);
  686. budget -= work_done;
  687. if (budget <= 0) {
  688. goto budget_done;
  689. }
  690. remaining_quota = budget;
  691. }
  692. /* Process Rx WBM release ring interrupt */
  693. if (rx_wbm_rel_mask) {
  694. work_done = dp_rx_wbm_err_process(soc,
  695. soc->rx_rel_ring.hal_srng, remaining_quota);
  696. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  697. "WBM Release Ring: work_done %d budget %d",
  698. work_done, budget);
  699. budget -= work_done;
  700. if (budget <= 0) {
  701. goto budget_done;
  702. }
  703. remaining_quota = budget;
  704. }
  705. /* Process Rx interrupts */
  706. if (rx_mask) {
  707. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  708. if (rx_mask & (1 << ring)) {
  709. work_done = dp_rx_process(int_ctx,
  710. soc->reo_dest_ring[ring].hal_srng,
  711. remaining_quota);
  712. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  713. "rx mask 0x%x ring %d, work_done %d budget %d",
  714. rx_mask, ring, work_done, budget);
  715. budget -= work_done;
  716. if (budget <= 0)
  717. goto budget_done;
  718. remaining_quota = budget;
  719. }
  720. }
  721. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  722. work_done = dp_rxdma_err_process(soc, ring,
  723. remaining_quota);
  724. budget -= work_done;
  725. }
  726. }
  727. if (reo_status_mask)
  728. dp_reo_status_ring_handler(soc);
  729. /* Process LMAC interrupts */
  730. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  731. pdev = soc->pdev_list[ring];
  732. if (pdev == NULL)
  733. continue;
  734. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  735. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  736. pdev->pdev_id);
  737. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  738. work_done = dp_mon_process(soc, mac_for_pdev,
  739. remaining_quota);
  740. budget -= work_done;
  741. if (budget <= 0)
  742. goto budget_done;
  743. remaining_quota = budget;
  744. }
  745. if (int_ctx->rxdma2host_ring_mask &
  746. (1 << mac_for_pdev)) {
  747. work_done = dp_rxdma_err_process(soc,
  748. mac_for_pdev,
  749. remaining_quota);
  750. budget -= work_done;
  751. if (budget <= 0)
  752. goto budget_done;
  753. remaining_quota = budget;
  754. }
  755. if (int_ctx->host2rxdma_ring_mask &
  756. (1 << mac_for_pdev)) {
  757. union dp_rx_desc_list_elem_t *desc_list = NULL;
  758. union dp_rx_desc_list_elem_t *tail = NULL;
  759. struct dp_srng *rx_refill_buf_ring =
  760. &pdev->rx_refill_buf_ring;
  761. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  762. 1);
  763. dp_rx_buffers_replenish(soc, mac_for_pdev,
  764. rx_refill_buf_ring,
  765. &soc->rx_desc_buf[mac_for_pdev], 0,
  766. &desc_list, &tail,
  767. HAL_RX_BUF_RBM_SW3_BM);
  768. }
  769. }
  770. }
  771. qdf_lro_flush(int_ctx->lro_ctx);
  772. budget_done:
  773. return dp_budget - budget;
  774. }
  775. #ifdef DP_INTR_POLL_BASED
  776. /* dp_interrupt_timer()- timer poll for interrupts
  777. *
  778. * @arg: SoC Handle
  779. *
  780. * Return:
  781. *
  782. */
  783. static void dp_interrupt_timer(void *arg)
  784. {
  785. struct dp_soc *soc = (struct dp_soc *) arg;
  786. int i;
  787. if (qdf_atomic_read(&soc->cmn_init_done)) {
  788. for (i = 0;
  789. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  790. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  791. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  792. }
  793. }
  794. /*
  795. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  796. * @txrx_soc: DP SOC handle
  797. *
  798. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  799. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  800. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  801. *
  802. * Return: 0 for success. nonzero for failure.
  803. */
  804. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  805. {
  806. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  807. int i;
  808. soc->intr_mode = DP_INTR_POLL;
  809. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  810. soc->intr_ctx[i].dp_intr_id = i;
  811. soc->intr_ctx[i].tx_ring_mask =
  812. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  813. soc->intr_ctx[i].rx_ring_mask =
  814. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  815. soc->intr_ctx[i].rx_mon_ring_mask =
  816. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  817. soc->intr_ctx[i].rx_err_ring_mask =
  818. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  819. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  820. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  821. soc->intr_ctx[i].reo_status_ring_mask =
  822. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  823. soc->intr_ctx[i].rxdma2host_ring_mask =
  824. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  825. soc->intr_ctx[i].soc = soc;
  826. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  827. }
  828. qdf_timer_init(soc->osdev, &soc->int_timer,
  829. dp_interrupt_timer, (void *)soc,
  830. QDF_TIMER_TYPE_WAKE_APPS);
  831. return QDF_STATUS_SUCCESS;
  832. }
  833. #if defined(CONFIG_MCL)
  834. extern int con_mode_monitor;
  835. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  836. /*
  837. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  838. * @txrx_soc: DP SOC handle
  839. *
  840. * Call the appropriate attach function based on the mode of operation.
  841. * This is a WAR for enabling monitor mode.
  842. *
  843. * Return: 0 for success. nonzero for failure.
  844. */
  845. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  846. {
  847. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  848. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  849. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  850. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  851. "%s: Poll mode", __func__);
  852. return dp_soc_interrupt_attach_poll(txrx_soc);
  853. } else {
  854. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  855. "%s: Interrupt mode", __func__);
  856. return dp_soc_interrupt_attach(txrx_soc);
  857. }
  858. }
  859. #else
  860. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  861. {
  862. return dp_soc_interrupt_attach_poll(txrx_soc);
  863. }
  864. #endif
  865. #endif
  866. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  867. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  868. {
  869. int j;
  870. int num_irq = 0;
  871. int tx_mask =
  872. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  873. int rx_mask =
  874. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  875. int rx_mon_mask =
  876. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  877. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  878. soc->wlan_cfg_ctx, intr_ctx_num);
  879. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  880. soc->wlan_cfg_ctx, intr_ctx_num);
  881. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  882. soc->wlan_cfg_ctx, intr_ctx_num);
  883. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  884. soc->wlan_cfg_ctx, intr_ctx_num);
  885. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  886. soc->wlan_cfg_ctx, intr_ctx_num);
  887. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  888. if (tx_mask & (1 << j)) {
  889. irq_id_map[num_irq++] =
  890. (wbm2host_tx_completions_ring1 - j);
  891. }
  892. if (rx_mask & (1 << j)) {
  893. irq_id_map[num_irq++] =
  894. (reo2host_destination_ring1 - j);
  895. }
  896. if (rxdma2host_ring_mask & (1 << j)) {
  897. irq_id_map[num_irq++] =
  898. rxdma2host_destination_ring_mac1 -
  899. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  900. }
  901. if (host2rxdma_ring_mask & (1 << j)) {
  902. irq_id_map[num_irq++] =
  903. host2rxdma_host_buf_ring_mac1 -
  904. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  905. }
  906. if (rx_mon_mask & (1 << j)) {
  907. irq_id_map[num_irq++] =
  908. ppdu_end_interrupts_mac1 -
  909. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  910. irq_id_map[num_irq++] =
  911. rxdma2host_monitor_status_ring_mac1 -
  912. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  913. }
  914. if (rx_wbm_rel_ring_mask & (1 << j))
  915. irq_id_map[num_irq++] = wbm2host_rx_release;
  916. if (rx_err_ring_mask & (1 << j))
  917. irq_id_map[num_irq++] = reo2host_exception;
  918. if (reo_status_ring_mask & (1 << j))
  919. irq_id_map[num_irq++] = reo2host_status;
  920. }
  921. *num_irq_r = num_irq;
  922. }
  923. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  924. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  925. int msi_vector_count, int msi_vector_start)
  926. {
  927. int tx_mask = wlan_cfg_get_tx_ring_mask(
  928. soc->wlan_cfg_ctx, intr_ctx_num);
  929. int rx_mask = wlan_cfg_get_rx_ring_mask(
  930. soc->wlan_cfg_ctx, intr_ctx_num);
  931. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  932. soc->wlan_cfg_ctx, intr_ctx_num);
  933. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  934. soc->wlan_cfg_ctx, intr_ctx_num);
  935. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  936. soc->wlan_cfg_ctx, intr_ctx_num);
  937. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  938. soc->wlan_cfg_ctx, intr_ctx_num);
  939. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  940. soc->wlan_cfg_ctx, intr_ctx_num);
  941. unsigned int vector =
  942. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  943. int num_irq = 0;
  944. soc->intr_mode = DP_INTR_MSI;
  945. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  946. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  947. irq_id_map[num_irq++] =
  948. pld_get_msi_irq(soc->osdev->dev, vector);
  949. *num_irq_r = num_irq;
  950. }
  951. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  952. int *irq_id_map, int *num_irq)
  953. {
  954. int msi_vector_count, ret;
  955. uint32_t msi_base_data, msi_vector_start;
  956. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  957. &msi_vector_count,
  958. &msi_base_data,
  959. &msi_vector_start);
  960. if (ret)
  961. return dp_soc_interrupt_map_calculate_integrated(soc,
  962. intr_ctx_num, irq_id_map, num_irq);
  963. else
  964. dp_soc_interrupt_map_calculate_msi(soc,
  965. intr_ctx_num, irq_id_map, num_irq,
  966. msi_vector_count, msi_vector_start);
  967. }
  968. /*
  969. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  970. * @txrx_soc: DP SOC handle
  971. *
  972. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  973. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  974. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  975. *
  976. * Return: 0 for success. nonzero for failure.
  977. */
  978. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  979. {
  980. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  981. int i = 0;
  982. int num_irq = 0;
  983. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  984. int ret = 0;
  985. /* Map of IRQ ids registered with one interrupt context */
  986. int irq_id_map[HIF_MAX_GRP_IRQ];
  987. int tx_mask =
  988. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  989. int rx_mask =
  990. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  991. int rx_mon_mask =
  992. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  993. int rx_err_ring_mask =
  994. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  995. int rx_wbm_rel_ring_mask =
  996. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  997. int reo_status_ring_mask =
  998. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  999. int rxdma2host_ring_mask =
  1000. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1001. int host2rxdma_ring_mask =
  1002. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1003. soc->intr_ctx[i].dp_intr_id = i;
  1004. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1005. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1006. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1007. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1008. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1009. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1010. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1011. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1012. soc->intr_ctx[i].soc = soc;
  1013. num_irq = 0;
  1014. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1015. &num_irq);
  1016. ret = hif_register_ext_group(soc->hif_handle,
  1017. num_irq, irq_id_map, dp_service_srngs,
  1018. &soc->intr_ctx[i], "dp_intr",
  1019. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1020. if (ret) {
  1021. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1022. FL("failed, ret = %d"), ret);
  1023. return QDF_STATUS_E_FAILURE;
  1024. }
  1025. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1026. }
  1027. hif_configure_ext_group_interrupts(soc->hif_handle);
  1028. return QDF_STATUS_SUCCESS;
  1029. }
  1030. /*
  1031. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1032. * @txrx_soc: DP SOC handle
  1033. *
  1034. * Return: void
  1035. */
  1036. static void dp_soc_interrupt_detach(void *txrx_soc)
  1037. {
  1038. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1039. int i;
  1040. if (soc->intr_mode == DP_INTR_POLL) {
  1041. qdf_timer_stop(&soc->int_timer);
  1042. qdf_timer_free(&soc->int_timer);
  1043. } else {
  1044. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1045. }
  1046. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1047. soc->intr_ctx[i].tx_ring_mask = 0;
  1048. soc->intr_ctx[i].rx_ring_mask = 0;
  1049. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1050. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1051. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1052. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1053. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1054. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1055. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1056. }
  1057. }
  1058. #define AVG_MAX_MPDUS_PER_TID 128
  1059. #define AVG_TIDS_PER_CLIENT 2
  1060. #define AVG_FLOWS_PER_TID 2
  1061. #define AVG_MSDUS_PER_FLOW 128
  1062. #define AVG_MSDUS_PER_MPDU 4
  1063. /*
  1064. * Allocate and setup link descriptor pool that will be used by HW for
  1065. * various link and queue descriptors and managed by WBM
  1066. */
  1067. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1068. {
  1069. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1070. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1071. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1072. uint32_t num_mpdus_per_link_desc =
  1073. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1074. uint32_t num_msdus_per_link_desc =
  1075. hal_num_msdus_per_link_desc(soc->hal_soc);
  1076. uint32_t num_mpdu_links_per_queue_desc =
  1077. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1078. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1079. uint32_t total_link_descs, total_mem_size;
  1080. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1081. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1082. uint32_t num_link_desc_banks;
  1083. uint32_t last_bank_size = 0;
  1084. uint32_t entry_size, num_entries;
  1085. int i;
  1086. uint32_t desc_id = 0;
  1087. /* Only Tx queue descriptors are allocated from common link descriptor
  1088. * pool Rx queue descriptors are not included in this because (REO queue
  1089. * extension descriptors) they are expected to be allocated contiguously
  1090. * with REO queue descriptors
  1091. */
  1092. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1093. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1094. num_mpdu_queue_descs = num_mpdu_link_descs /
  1095. num_mpdu_links_per_queue_desc;
  1096. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1097. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1098. num_msdus_per_link_desc;
  1099. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1100. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1101. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1102. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1103. /* Round up to power of 2 */
  1104. total_link_descs = 1;
  1105. while (total_link_descs < num_entries)
  1106. total_link_descs <<= 1;
  1107. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1108. FL("total_link_descs: %u, link_desc_size: %d"),
  1109. total_link_descs, link_desc_size);
  1110. total_mem_size = total_link_descs * link_desc_size;
  1111. total_mem_size += link_desc_align;
  1112. if (total_mem_size <= max_alloc_size) {
  1113. num_link_desc_banks = 0;
  1114. last_bank_size = total_mem_size;
  1115. } else {
  1116. num_link_desc_banks = (total_mem_size) /
  1117. (max_alloc_size - link_desc_align);
  1118. last_bank_size = total_mem_size %
  1119. (max_alloc_size - link_desc_align);
  1120. }
  1121. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1122. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1123. total_mem_size, num_link_desc_banks);
  1124. for (i = 0; i < num_link_desc_banks; i++) {
  1125. soc->link_desc_banks[i].base_vaddr_unaligned =
  1126. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1127. max_alloc_size,
  1128. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1129. soc->link_desc_banks[i].size = max_alloc_size;
  1130. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1131. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1132. ((unsigned long)(
  1133. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1134. link_desc_align));
  1135. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1136. soc->link_desc_banks[i].base_paddr_unaligned) +
  1137. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1138. (unsigned long)(
  1139. soc->link_desc_banks[i].base_vaddr_unaligned));
  1140. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1141. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1142. FL("Link descriptor memory alloc failed"));
  1143. goto fail;
  1144. }
  1145. }
  1146. if (last_bank_size) {
  1147. /* Allocate last bank in case total memory required is not exact
  1148. * multiple of max_alloc_size
  1149. */
  1150. soc->link_desc_banks[i].base_vaddr_unaligned =
  1151. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1152. last_bank_size,
  1153. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1154. soc->link_desc_banks[i].size = last_bank_size;
  1155. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1156. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1157. ((unsigned long)(
  1158. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1159. link_desc_align));
  1160. soc->link_desc_banks[i].base_paddr =
  1161. (unsigned long)(
  1162. soc->link_desc_banks[i].base_paddr_unaligned) +
  1163. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1164. (unsigned long)(
  1165. soc->link_desc_banks[i].base_vaddr_unaligned));
  1166. }
  1167. /* Allocate and setup link descriptor idle list for HW internal use */
  1168. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1169. total_mem_size = entry_size * total_link_descs;
  1170. if (total_mem_size <= max_alloc_size) {
  1171. void *desc;
  1172. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1173. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1174. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1175. FL("Link desc idle ring setup failed"));
  1176. goto fail;
  1177. }
  1178. hal_srng_access_start_unlocked(soc->hal_soc,
  1179. soc->wbm_idle_link_ring.hal_srng);
  1180. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1181. soc->link_desc_banks[i].base_paddr; i++) {
  1182. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1183. ((unsigned long)(
  1184. soc->link_desc_banks[i].base_vaddr) -
  1185. (unsigned long)(
  1186. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1187. / link_desc_size;
  1188. unsigned long paddr = (unsigned long)(
  1189. soc->link_desc_banks[i].base_paddr);
  1190. while (num_entries && (desc = hal_srng_src_get_next(
  1191. soc->hal_soc,
  1192. soc->wbm_idle_link_ring.hal_srng))) {
  1193. hal_set_link_desc_addr(desc,
  1194. LINK_DESC_COOKIE(desc_id, i), paddr);
  1195. num_entries--;
  1196. desc_id++;
  1197. paddr += link_desc_size;
  1198. }
  1199. }
  1200. hal_srng_access_end_unlocked(soc->hal_soc,
  1201. soc->wbm_idle_link_ring.hal_srng);
  1202. } else {
  1203. uint32_t num_scatter_bufs;
  1204. uint32_t num_entries_per_buf;
  1205. uint32_t rem_entries;
  1206. uint8_t *scatter_buf_ptr;
  1207. uint16_t scatter_buf_num;
  1208. soc->wbm_idle_scatter_buf_size =
  1209. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1210. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1211. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1212. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1213. soc->hal_soc, total_mem_size,
  1214. soc->wbm_idle_scatter_buf_size);
  1215. for (i = 0; i < num_scatter_bufs; i++) {
  1216. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1217. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1218. soc->wbm_idle_scatter_buf_size,
  1219. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1220. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1221. QDF_TRACE(QDF_MODULE_ID_DP,
  1222. QDF_TRACE_LEVEL_ERROR,
  1223. FL("Scatter list memory alloc failed"));
  1224. goto fail;
  1225. }
  1226. }
  1227. /* Populate idle list scatter buffers with link descriptor
  1228. * pointers
  1229. */
  1230. scatter_buf_num = 0;
  1231. scatter_buf_ptr = (uint8_t *)(
  1232. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1233. rem_entries = num_entries_per_buf;
  1234. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1235. soc->link_desc_banks[i].base_paddr; i++) {
  1236. uint32_t num_link_descs =
  1237. (soc->link_desc_banks[i].size -
  1238. ((unsigned long)(
  1239. soc->link_desc_banks[i].base_vaddr) -
  1240. (unsigned long)(
  1241. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1242. / link_desc_size;
  1243. unsigned long paddr = (unsigned long)(
  1244. soc->link_desc_banks[i].base_paddr);
  1245. while (num_link_descs) {
  1246. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1247. LINK_DESC_COOKIE(desc_id, i), paddr);
  1248. num_link_descs--;
  1249. desc_id++;
  1250. paddr += link_desc_size;
  1251. rem_entries--;
  1252. if (rem_entries) {
  1253. scatter_buf_ptr += entry_size;
  1254. } else {
  1255. rem_entries = num_entries_per_buf;
  1256. scatter_buf_num++;
  1257. if (scatter_buf_num >= num_scatter_bufs)
  1258. break;
  1259. scatter_buf_ptr = (uint8_t *)(
  1260. soc->wbm_idle_scatter_buf_base_vaddr[
  1261. scatter_buf_num]);
  1262. }
  1263. }
  1264. }
  1265. /* Setup link descriptor idle list in HW */
  1266. hal_setup_link_idle_list(soc->hal_soc,
  1267. soc->wbm_idle_scatter_buf_base_paddr,
  1268. soc->wbm_idle_scatter_buf_base_vaddr,
  1269. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1270. (uint32_t)(scatter_buf_ptr -
  1271. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1272. scatter_buf_num-1])), total_link_descs);
  1273. }
  1274. return 0;
  1275. fail:
  1276. if (soc->wbm_idle_link_ring.hal_srng) {
  1277. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1278. WBM_IDLE_LINK, 0);
  1279. }
  1280. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1281. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1282. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1283. soc->wbm_idle_scatter_buf_size,
  1284. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1285. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1286. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1287. }
  1288. }
  1289. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1290. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1291. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1292. soc->link_desc_banks[i].size,
  1293. soc->link_desc_banks[i].base_vaddr_unaligned,
  1294. soc->link_desc_banks[i].base_paddr_unaligned,
  1295. 0);
  1296. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1297. }
  1298. }
  1299. return QDF_STATUS_E_FAILURE;
  1300. }
  1301. /*
  1302. * Free link descriptor pool that was setup HW
  1303. */
  1304. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1305. {
  1306. int i;
  1307. if (soc->wbm_idle_link_ring.hal_srng) {
  1308. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1309. WBM_IDLE_LINK, 0);
  1310. }
  1311. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1312. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1313. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1314. soc->wbm_idle_scatter_buf_size,
  1315. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1316. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1317. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1318. }
  1319. }
  1320. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1321. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1322. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1323. soc->link_desc_banks[i].size,
  1324. soc->link_desc_banks[i].base_vaddr_unaligned,
  1325. soc->link_desc_banks[i].base_paddr_unaligned,
  1326. 0);
  1327. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1328. }
  1329. }
  1330. }
  1331. /* TODO: Following should be configurable */
  1332. #define WBM_RELEASE_RING_SIZE 64
  1333. #define TCL_CMD_RING_SIZE 32
  1334. #define TCL_STATUS_RING_SIZE 32
  1335. #if defined(QCA_WIFI_QCA6290)
  1336. #define REO_DST_RING_SIZE 1024
  1337. #else
  1338. #define REO_DST_RING_SIZE 2048
  1339. #endif
  1340. #define REO_REINJECT_RING_SIZE 32
  1341. #define RX_RELEASE_RING_SIZE 1024
  1342. #define REO_EXCEPTION_RING_SIZE 128
  1343. #define REO_CMD_RING_SIZE 64
  1344. #define REO_STATUS_RING_SIZE 128
  1345. #define RXDMA_BUF_RING_SIZE 1024
  1346. #define RXDMA_REFILL_RING_SIZE 4096
  1347. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1348. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1349. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1350. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1351. #define RXDMA_ERR_DST_RING_SIZE 1024
  1352. /*
  1353. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1354. * @soc: Datapath SOC handle
  1355. *
  1356. * This is a timer function used to age out stale AST nodes from
  1357. * AST table
  1358. */
  1359. #ifdef FEATURE_WDS
  1360. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1361. {
  1362. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1363. struct dp_pdev *pdev;
  1364. struct dp_vdev *vdev;
  1365. struct dp_peer *peer;
  1366. struct dp_ast_entry *ase, *temp_ase;
  1367. int i;
  1368. qdf_spin_lock_bh(&soc->ast_lock);
  1369. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1370. pdev = soc->pdev_list[i];
  1371. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1372. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1373. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1374. /*
  1375. * Do not expire static ast entries
  1376. * and HM WDS entries
  1377. */
  1378. if (ase->type ==
  1379. CDP_TXRX_AST_TYPE_STATIC ||
  1380. ase->type ==
  1381. CDP_TXRX_AST_TYPE_WDS_HM)
  1382. continue;
  1383. if (ase->is_active) {
  1384. ase->is_active = FALSE;
  1385. continue;
  1386. }
  1387. DP_STATS_INC(soc, ast.aged_out, 1);
  1388. dp_peer_del_ast(soc, ase);
  1389. }
  1390. }
  1391. }
  1392. }
  1393. qdf_spin_unlock_bh(&soc->ast_lock);
  1394. if (qdf_atomic_read(&soc->cmn_init_done))
  1395. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1396. }
  1397. /*
  1398. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1399. * @soc: Datapath SOC handle
  1400. *
  1401. * Return: None
  1402. */
  1403. static void dp_soc_wds_attach(struct dp_soc *soc)
  1404. {
  1405. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1406. dp_wds_aging_timer_fn, (void *)soc,
  1407. QDF_TIMER_TYPE_WAKE_APPS);
  1408. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1409. }
  1410. /*
  1411. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1412. * @txrx_soc: DP SOC handle
  1413. *
  1414. * Return: None
  1415. */
  1416. static void dp_soc_wds_detach(struct dp_soc *soc)
  1417. {
  1418. qdf_timer_stop(&soc->wds_aging_timer);
  1419. qdf_timer_free(&soc->wds_aging_timer);
  1420. }
  1421. #else
  1422. static void dp_soc_wds_attach(struct dp_soc *soc)
  1423. {
  1424. }
  1425. static void dp_soc_wds_detach(struct dp_soc *soc)
  1426. {
  1427. }
  1428. #endif
  1429. /*
  1430. * dp_soc_reset_ring_map() - Reset cpu ring map
  1431. * @soc: Datapath soc handler
  1432. *
  1433. * This api resets the default cpu ring map
  1434. */
  1435. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1436. {
  1437. uint8_t i;
  1438. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1439. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1440. if (nss_config == 1) {
  1441. /*
  1442. * Setting Tx ring map for one nss offloaded radio
  1443. */
  1444. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1445. } else if (nss_config == 2) {
  1446. /*
  1447. * Setting Tx ring for two nss offloaded radios
  1448. */
  1449. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1450. } else {
  1451. /*
  1452. * Setting Tx ring map for all nss offloaded radios
  1453. */
  1454. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1455. }
  1456. }
  1457. }
  1458. /*
  1459. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1460. * @dp_soc - DP soc handle
  1461. * @ring_type - ring type
  1462. * @ring_num - ring_num
  1463. *
  1464. * return 0 or 1
  1465. */
  1466. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1467. {
  1468. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1469. uint8_t status = 0;
  1470. switch (ring_type) {
  1471. case WBM2SW_RELEASE:
  1472. case REO_DST:
  1473. case RXDMA_BUF:
  1474. status = ((nss_config) & (1 << ring_num));
  1475. break;
  1476. default:
  1477. break;
  1478. }
  1479. return status;
  1480. }
  1481. /*
  1482. * dp_soc_reset_intr_mask() - reset interrupt mask
  1483. * @dp_soc - DP Soc handle
  1484. *
  1485. * Return: Return void
  1486. */
  1487. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1488. {
  1489. uint8_t j;
  1490. int *grp_mask = NULL;
  1491. int group_number, mask, num_ring;
  1492. /* number of tx ring */
  1493. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1494. /*
  1495. * group mask for tx completion ring.
  1496. */
  1497. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1498. /* loop and reset the mask for only offloaded ring */
  1499. for (j = 0; j < num_ring; j++) {
  1500. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1501. continue;
  1502. }
  1503. /*
  1504. * Group number corresponding to tx offloaded ring.
  1505. */
  1506. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1507. if (group_number < 0) {
  1508. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1509. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1510. WBM2SW_RELEASE, j);
  1511. return;
  1512. }
  1513. /* reset the tx mask for offloaded ring */
  1514. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1515. mask &= (~(1 << j));
  1516. /*
  1517. * reset the interrupt mask for offloaded ring.
  1518. */
  1519. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1520. }
  1521. /* number of rx rings */
  1522. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1523. /*
  1524. * group mask for reo destination ring.
  1525. */
  1526. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1527. /* loop and reset the mask for only offloaded ring */
  1528. for (j = 0; j < num_ring; j++) {
  1529. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1530. continue;
  1531. }
  1532. /*
  1533. * Group number corresponding to rx offloaded ring.
  1534. */
  1535. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1536. if (group_number < 0) {
  1537. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1538. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1539. REO_DST, j);
  1540. return;
  1541. }
  1542. /* set the interrupt mask for offloaded ring */
  1543. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1544. mask &= (~(1 << j));
  1545. /*
  1546. * set the interrupt mask to zero for rx offloaded radio.
  1547. */
  1548. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1549. }
  1550. /*
  1551. * group mask for Rx buffer refill ring
  1552. */
  1553. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1554. /* loop and reset the mask for only offloaded ring */
  1555. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1556. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1557. continue;
  1558. }
  1559. /*
  1560. * Group number corresponding to rx offloaded ring.
  1561. */
  1562. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1563. if (group_number < 0) {
  1564. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1565. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1566. REO_DST, j);
  1567. return;
  1568. }
  1569. /* set the interrupt mask for offloaded ring */
  1570. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1571. group_number);
  1572. mask &= (~(1 << j));
  1573. /*
  1574. * set the interrupt mask to zero for rx offloaded radio.
  1575. */
  1576. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1577. group_number, mask);
  1578. }
  1579. }
  1580. #ifdef IPA_OFFLOAD
  1581. /**
  1582. * dp_reo_remap_config() - configure reo remap register value based
  1583. * nss configuration.
  1584. * based on offload_radio value below remap configuration
  1585. * get applied.
  1586. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1587. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1588. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1589. * 3 - both Radios handled by NSS (remap not required)
  1590. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1591. *
  1592. * @remap1: output parameter indicates reo remap 1 register value
  1593. * @remap2: output parameter indicates reo remap 2 register value
  1594. * Return: bool type, true if remap is configured else false.
  1595. */
  1596. static bool dp_reo_remap_config(struct dp_soc *soc,
  1597. uint32_t *remap1,
  1598. uint32_t *remap2)
  1599. {
  1600. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1601. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1602. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1603. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1604. return true;
  1605. }
  1606. #else
  1607. static bool dp_reo_remap_config(struct dp_soc *soc,
  1608. uint32_t *remap1,
  1609. uint32_t *remap2)
  1610. {
  1611. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1612. switch (offload_radio) {
  1613. case 0:
  1614. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1615. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1616. (0x3 << 18) | (0x4 << 21)) << 8;
  1617. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1618. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1619. (0x3 << 18) | (0x4 << 21)) << 8;
  1620. break;
  1621. case 1:
  1622. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1623. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1624. (0x2 << 18) | (0x3 << 21)) << 8;
  1625. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1626. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1627. (0x4 << 18) | (0x2 << 21)) << 8;
  1628. break;
  1629. case 2:
  1630. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1631. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1632. (0x1 << 18) | (0x3 << 21)) << 8;
  1633. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1634. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1635. (0x4 << 18) | (0x1 << 21)) << 8;
  1636. break;
  1637. case 3:
  1638. /* return false if both radios are offloaded to NSS */
  1639. return false;
  1640. }
  1641. return true;
  1642. }
  1643. #endif
  1644. /*
  1645. * dp_reo_frag_dst_set() - configure reo register to set the
  1646. * fragment destination ring
  1647. * @soc : Datapath soc
  1648. * @frag_dst_ring : output parameter to set fragment destination ring
  1649. *
  1650. * Based on offload_radio below fragment destination rings is selected
  1651. * 0 - TCL
  1652. * 1 - SW1
  1653. * 2 - SW2
  1654. * 3 - SW3
  1655. * 4 - SW4
  1656. * 5 - Release
  1657. * 6 - FW
  1658. * 7 - alternate select
  1659. *
  1660. * return: void
  1661. */
  1662. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1663. {
  1664. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1665. switch (offload_radio) {
  1666. case 0:
  1667. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1668. break;
  1669. case 3:
  1670. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1671. break;
  1672. default:
  1673. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1674. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1675. break;
  1676. }
  1677. }
  1678. /*
  1679. * dp_soc_cmn_setup() - Common SoC level initializion
  1680. * @soc: Datapath SOC handle
  1681. *
  1682. * This is an internal function used to setup common SOC data structures,
  1683. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1684. */
  1685. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1686. {
  1687. int i;
  1688. struct hal_reo_params reo_params;
  1689. int tx_ring_size;
  1690. int tx_comp_ring_size;
  1691. if (qdf_atomic_read(&soc->cmn_init_done))
  1692. return 0;
  1693. if (dp_peer_find_attach(soc))
  1694. goto fail0;
  1695. if (dp_hw_link_desc_pool_setup(soc))
  1696. goto fail1;
  1697. /* Setup SRNG rings */
  1698. /* Common rings */
  1699. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1700. WBM_RELEASE_RING_SIZE)) {
  1701. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1702. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1703. goto fail1;
  1704. }
  1705. soc->num_tcl_data_rings = 0;
  1706. /* Tx data rings */
  1707. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1708. soc->num_tcl_data_rings =
  1709. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1710. tx_comp_ring_size =
  1711. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1712. tx_ring_size =
  1713. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1714. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1715. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1716. TCL_DATA, i, 0, tx_ring_size)) {
  1717. QDF_TRACE(QDF_MODULE_ID_DP,
  1718. QDF_TRACE_LEVEL_ERROR,
  1719. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1720. goto fail1;
  1721. }
  1722. /*
  1723. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1724. * count
  1725. */
  1726. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1727. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1728. QDF_TRACE(QDF_MODULE_ID_DP,
  1729. QDF_TRACE_LEVEL_ERROR,
  1730. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1731. goto fail1;
  1732. }
  1733. }
  1734. } else {
  1735. /* This will be incremented during per pdev ring setup */
  1736. soc->num_tcl_data_rings = 0;
  1737. }
  1738. if (dp_tx_soc_attach(soc)) {
  1739. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1740. FL("dp_tx_soc_attach failed"));
  1741. goto fail1;
  1742. }
  1743. /* TCL command and status rings */
  1744. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1745. TCL_CMD_RING_SIZE)) {
  1746. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1747. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1748. goto fail1;
  1749. }
  1750. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1751. TCL_STATUS_RING_SIZE)) {
  1752. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1753. FL("dp_srng_setup failed for tcl_status_ring"));
  1754. goto fail1;
  1755. }
  1756. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1757. * descriptors
  1758. */
  1759. /* Rx data rings */
  1760. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1761. soc->num_reo_dest_rings =
  1762. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1763. QDF_TRACE(QDF_MODULE_ID_DP,
  1764. QDF_TRACE_LEVEL_ERROR,
  1765. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1766. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1767. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1768. i, 0, REO_DST_RING_SIZE)) {
  1769. QDF_TRACE(QDF_MODULE_ID_DP,
  1770. QDF_TRACE_LEVEL_ERROR,
  1771. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1772. goto fail1;
  1773. }
  1774. }
  1775. } else {
  1776. /* This will be incremented during per pdev ring setup */
  1777. soc->num_reo_dest_rings = 0;
  1778. }
  1779. /* LMAC RxDMA to SW Rings configuration */
  1780. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1781. /* Only valid for MCL */
  1782. struct dp_pdev *pdev = soc->pdev_list[0];
  1783. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1784. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1785. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1786. QDF_TRACE(QDF_MODULE_ID_DP,
  1787. QDF_TRACE_LEVEL_ERROR,
  1788. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1789. goto fail1;
  1790. }
  1791. }
  1792. }
  1793. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1794. /* REO reinjection ring */
  1795. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1796. REO_REINJECT_RING_SIZE)) {
  1797. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1798. FL("dp_srng_setup failed for reo_reinject_ring"));
  1799. goto fail1;
  1800. }
  1801. /* Rx release ring */
  1802. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1803. RX_RELEASE_RING_SIZE)) {
  1804. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1805. FL("dp_srng_setup failed for rx_rel_ring"));
  1806. goto fail1;
  1807. }
  1808. /* Rx exception ring */
  1809. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1810. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1811. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1812. FL("dp_srng_setup failed for reo_exception_ring"));
  1813. goto fail1;
  1814. }
  1815. /* REO command and status rings */
  1816. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1817. REO_CMD_RING_SIZE)) {
  1818. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1819. FL("dp_srng_setup failed for reo_cmd_ring"));
  1820. goto fail1;
  1821. }
  1822. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1823. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1824. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1825. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1826. REO_STATUS_RING_SIZE)) {
  1827. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1828. FL("dp_srng_setup failed for reo_status_ring"));
  1829. goto fail1;
  1830. }
  1831. qdf_spinlock_create(&soc->ast_lock);
  1832. dp_soc_wds_attach(soc);
  1833. /* Reset the cpu ring map if radio is NSS offloaded */
  1834. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1835. dp_soc_reset_cpu_ring_map(soc);
  1836. dp_soc_reset_intr_mask(soc);
  1837. }
  1838. /* Setup HW REO */
  1839. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1840. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1841. /*
  1842. * Reo ring remap is not required if both radios
  1843. * are offloaded to NSS
  1844. */
  1845. if (!dp_reo_remap_config(soc,
  1846. &reo_params.remap1,
  1847. &reo_params.remap2))
  1848. goto out;
  1849. reo_params.rx_hash_enabled = true;
  1850. }
  1851. /* setup the global rx defrag waitlist */
  1852. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1853. soc->rx.defrag.timeout_ms =
  1854. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1855. soc->rx.flags.defrag_timeout_check =
  1856. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1857. out:
  1858. /*
  1859. * set the fragment destination ring
  1860. */
  1861. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  1862. hal_reo_setup(soc->hal_soc, &reo_params);
  1863. qdf_atomic_set(&soc->cmn_init_done, 1);
  1864. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1865. return 0;
  1866. fail1:
  1867. /*
  1868. * Cleanup will be done as part of soc_detach, which will
  1869. * be called on pdev attach failure
  1870. */
  1871. fail0:
  1872. return QDF_STATUS_E_FAILURE;
  1873. }
  1874. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  1875. static void dp_lro_hash_setup(struct dp_soc *soc)
  1876. {
  1877. struct cdp_lro_hash_config lro_hash;
  1878. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1879. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1880. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1881. FL("LRO disabled RX hash disabled"));
  1882. return;
  1883. }
  1884. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  1885. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  1886. lro_hash.lro_enable = 1;
  1887. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  1888. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  1889. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  1890. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  1891. }
  1892. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  1893. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  1894. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1895. LRO_IPV4_SEED_ARR_SZ));
  1896. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  1897. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1898. LRO_IPV6_SEED_ARR_SZ));
  1899. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  1900. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  1901. lro_hash.lro_enable, lro_hash.tcp_flag,
  1902. lro_hash.tcp_flag_mask);
  1903. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1904. QDF_TRACE_LEVEL_ERROR,
  1905. (void *)lro_hash.toeplitz_hash_ipv4,
  1906. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1907. LRO_IPV4_SEED_ARR_SZ));
  1908. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1909. QDF_TRACE_LEVEL_ERROR,
  1910. (void *)lro_hash.toeplitz_hash_ipv6,
  1911. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1912. LRO_IPV6_SEED_ARR_SZ));
  1913. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  1914. if (soc->cdp_soc.ol_ops->lro_hash_config)
  1915. (void)soc->cdp_soc.ol_ops->lro_hash_config
  1916. (soc->ctrl_psoc, &lro_hash);
  1917. }
  1918. /*
  1919. * dp_rxdma_ring_setup() - configure the RX DMA rings
  1920. * @soc: data path SoC handle
  1921. * @pdev: Physical device handle
  1922. *
  1923. * Return: 0 - success, > 0 - failure
  1924. */
  1925. #ifdef QCA_HOST2FW_RXBUF_RING
  1926. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1927. struct dp_pdev *pdev)
  1928. {
  1929. int max_mac_rings =
  1930. wlan_cfg_get_num_mac_rings
  1931. (pdev->wlan_cfg_ctx);
  1932. int i;
  1933. for (i = 0; i < max_mac_rings; i++) {
  1934. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1935. "%s: pdev_id %d mac_id %d\n",
  1936. __func__, pdev->pdev_id, i);
  1937. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  1938. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  1939. QDF_TRACE(QDF_MODULE_ID_DP,
  1940. QDF_TRACE_LEVEL_ERROR,
  1941. FL("failed rx mac ring setup"));
  1942. return QDF_STATUS_E_FAILURE;
  1943. }
  1944. }
  1945. return QDF_STATUS_SUCCESS;
  1946. }
  1947. #else
  1948. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1949. struct dp_pdev *pdev)
  1950. {
  1951. return QDF_STATUS_SUCCESS;
  1952. }
  1953. #endif
  1954. /**
  1955. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  1956. * @pdev - DP_PDEV handle
  1957. *
  1958. * Return: void
  1959. */
  1960. static inline void
  1961. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1962. {
  1963. uint8_t map_id;
  1964. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1965. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  1966. sizeof(default_dscp_tid_map));
  1967. }
  1968. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  1969. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  1970. pdev->dscp_tid_map[map_id],
  1971. map_id);
  1972. }
  1973. }
  1974. #ifdef QCA_SUPPORT_SON
  1975. /**
  1976. * dp_mark_peer_inact(): Update peer inactivity status
  1977. * @peer_handle - datapath peer handle
  1978. *
  1979. * Return: void
  1980. */
  1981. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  1982. {
  1983. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1984. struct dp_pdev *pdev;
  1985. struct dp_soc *soc;
  1986. bool inactive_old;
  1987. if (!peer)
  1988. return;
  1989. pdev = peer->vdev->pdev;
  1990. soc = pdev->soc;
  1991. inactive_old = peer->peer_bs_inact_flag == 1;
  1992. if (!inactive)
  1993. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1994. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  1995. if (inactive_old != inactive) {
  1996. /**
  1997. * Note: a node lookup can happen in RX datapath context
  1998. * when a node changes from inactive to active (at most once
  1999. * per inactivity timeout threshold)
  2000. */
  2001. if (soc->cdp_soc.ol_ops->record_act_change) {
  2002. soc->cdp_soc.ol_ops->record_act_change(pdev->osif_pdev,
  2003. peer->mac_addr.raw, !inactive);
  2004. }
  2005. }
  2006. }
  2007. /**
  2008. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2009. *
  2010. * Periodically checks the inactivity status
  2011. */
  2012. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2013. {
  2014. struct dp_pdev *pdev;
  2015. struct dp_vdev *vdev;
  2016. struct dp_peer *peer;
  2017. struct dp_soc *soc;
  2018. int i;
  2019. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2020. qdf_spin_lock(&soc->peer_ref_mutex);
  2021. for (i = 0; i < soc->pdev_count; i++) {
  2022. pdev = soc->pdev_list[i];
  2023. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2024. if (vdev->opmode != wlan_op_mode_ap)
  2025. continue;
  2026. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2027. if (!peer->authorize) {
  2028. /**
  2029. * Inactivity check only interested in
  2030. * connected node
  2031. */
  2032. continue;
  2033. }
  2034. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2035. /**
  2036. * This check ensures we do not wait extra long
  2037. * due to the potential race condition
  2038. */
  2039. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2040. }
  2041. if (peer->peer_bs_inact > 0) {
  2042. /* Do not let it wrap around */
  2043. peer->peer_bs_inact--;
  2044. }
  2045. if (peer->peer_bs_inact == 0)
  2046. dp_mark_peer_inact(peer, true);
  2047. }
  2048. }
  2049. }
  2050. qdf_spin_unlock(&soc->peer_ref_mutex);
  2051. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2052. soc->pdev_bs_inact_interval * 1000);
  2053. }
  2054. /**
  2055. * dp_free_inact_timer(): free inact timer
  2056. * @timer - inact timer handle
  2057. *
  2058. * Return: bool
  2059. */
  2060. void dp_free_inact_timer(struct dp_soc *soc)
  2061. {
  2062. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2063. }
  2064. #else
  2065. void dp_mark_peer_inact(void *peer, bool inactive)
  2066. {
  2067. return;
  2068. }
  2069. void dp_free_inact_timer(struct dp_soc *soc)
  2070. {
  2071. return;
  2072. }
  2073. #endif
  2074. #ifdef IPA_OFFLOAD
  2075. /**
  2076. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2077. * @soc: data path instance
  2078. * @pdev: core txrx pdev context
  2079. *
  2080. * Return: QDF_STATUS_SUCCESS: success
  2081. * QDF_STATUS_E_RESOURCES: Error return
  2082. */
  2083. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2084. struct dp_pdev *pdev)
  2085. {
  2086. /* Setup second Rx refill buffer ring */
  2087. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2088. IPA_RX_REFILL_BUF_RING_IDX,
  2089. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2090. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2091. FL("dp_srng_setup failed second rx refill ring"));
  2092. return QDF_STATUS_E_FAILURE;
  2093. }
  2094. return QDF_STATUS_SUCCESS;
  2095. }
  2096. /**
  2097. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2098. * @soc: data path instance
  2099. * @pdev: core txrx pdev context
  2100. *
  2101. * Return: void
  2102. */
  2103. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2104. struct dp_pdev *pdev)
  2105. {
  2106. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2107. IPA_RX_REFILL_BUF_RING_IDX);
  2108. }
  2109. #else
  2110. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2111. struct dp_pdev *pdev)
  2112. {
  2113. return QDF_STATUS_SUCCESS;
  2114. }
  2115. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2116. struct dp_pdev *pdev)
  2117. {
  2118. }
  2119. #endif
  2120. /*
  2121. * dp_pdev_attach_wifi3() - attach txrx pdev
  2122. * @ctrl_pdev: Opaque PDEV object
  2123. * @txrx_soc: Datapath SOC handle
  2124. * @htc_handle: HTC handle for host-target interface
  2125. * @qdf_osdev: QDF OS device
  2126. * @pdev_id: PDEV ID
  2127. *
  2128. * Return: DP PDEV handle on success, NULL on failure
  2129. */
  2130. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2131. struct cdp_cfg *ctrl_pdev,
  2132. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2133. {
  2134. int tx_ring_size;
  2135. int tx_comp_ring_size;
  2136. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2137. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2138. int mac_id;
  2139. if (!pdev) {
  2140. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2141. FL("DP PDEV memory allocation failed"));
  2142. goto fail0;
  2143. }
  2144. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  2145. if (!pdev->wlan_cfg_ctx) {
  2146. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2147. FL("pdev cfg_attach failed"));
  2148. qdf_mem_free(pdev);
  2149. goto fail0;
  2150. }
  2151. /*
  2152. * set nss pdev config based on soc config
  2153. */
  2154. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2155. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2156. pdev->soc = soc;
  2157. pdev->osif_pdev = ctrl_pdev;
  2158. pdev->pdev_id = pdev_id;
  2159. soc->pdev_list[pdev_id] = pdev;
  2160. soc->pdev_count++;
  2161. TAILQ_INIT(&pdev->vdev_list);
  2162. pdev->vdev_count = 0;
  2163. qdf_spinlock_create(&pdev->tx_mutex);
  2164. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2165. TAILQ_INIT(&pdev->neighbour_peers_list);
  2166. if (dp_soc_cmn_setup(soc)) {
  2167. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2168. FL("dp_soc_cmn_setup failed"));
  2169. goto fail1;
  2170. }
  2171. /* Setup per PDEV TCL rings if configured */
  2172. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2173. tx_ring_size =
  2174. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2175. tx_comp_ring_size =
  2176. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2177. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2178. pdev_id, pdev_id, tx_ring_size)) {
  2179. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2180. FL("dp_srng_setup failed for tcl_data_ring"));
  2181. goto fail1;
  2182. }
  2183. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2184. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2185. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2186. FL("dp_srng_setup failed for tx_comp_ring"));
  2187. goto fail1;
  2188. }
  2189. soc->num_tcl_data_rings++;
  2190. }
  2191. /* Tx specific init */
  2192. if (dp_tx_pdev_attach(pdev)) {
  2193. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2194. FL("dp_tx_pdev_attach failed"));
  2195. goto fail1;
  2196. }
  2197. /* Setup per PDEV REO rings if configured */
  2198. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2199. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2200. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  2201. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2202. FL("dp_srng_setup failed for reo_dest_ringn"));
  2203. goto fail1;
  2204. }
  2205. soc->num_reo_dest_rings++;
  2206. }
  2207. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2208. RXDMA_REFILL_RING_SIZE)) {
  2209. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2210. FL("dp_srng_setup failed rx refill ring"));
  2211. goto fail1;
  2212. }
  2213. if (dp_rxdma_ring_setup(soc, pdev)) {
  2214. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2215. FL("RXDMA ring config failed"));
  2216. goto fail1;
  2217. }
  2218. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2219. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2220. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2221. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2222. RXDMA_MONITOR_BUF_RING_SIZE)) {
  2223. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2224. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2225. goto fail1;
  2226. }
  2227. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2228. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2229. RXDMA_MONITOR_DST_RING_SIZE)) {
  2230. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2231. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2232. goto fail1;
  2233. }
  2234. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2235. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2236. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2237. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2238. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2239. goto fail1;
  2240. }
  2241. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2242. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2243. RXDMA_MONITOR_DESC_RING_SIZE)) {
  2244. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2245. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2246. goto fail1;
  2247. }
  2248. }
  2249. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2250. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2251. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2252. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2253. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2254. goto fail1;
  2255. }
  2256. }
  2257. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2258. goto fail1;
  2259. if (dp_ipa_ring_resource_setup(soc, pdev))
  2260. goto fail1;
  2261. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2262. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2263. FL("dp_ipa_uc_attach failed"));
  2264. goto fail1;
  2265. }
  2266. /* Rx specific init */
  2267. if (dp_rx_pdev_attach(pdev)) {
  2268. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2269. FL("dp_rx_pdev_attach failed"));
  2270. goto fail0;
  2271. }
  2272. DP_STATS_INIT(pdev);
  2273. /* Monitor filter init */
  2274. pdev->mon_filter_mode = MON_FILTER_ALL;
  2275. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2276. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2277. pdev->fp_data_filter = FILTER_DATA_ALL;
  2278. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2279. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2280. pdev->mo_data_filter = FILTER_DATA_ALL;
  2281. #ifndef CONFIG_WIN
  2282. /* MCL */
  2283. dp_local_peer_id_pool_init(pdev);
  2284. #endif
  2285. dp_dscp_tid_map_setup(pdev);
  2286. /* Rx monitor mode specific init */
  2287. if (dp_rx_pdev_mon_attach(pdev)) {
  2288. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2289. "dp_rx_pdev_attach failed\n");
  2290. goto fail1;
  2291. }
  2292. if (dp_wdi_event_attach(pdev)) {
  2293. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2294. "dp_wdi_evet_attach failed\n");
  2295. goto fail1;
  2296. }
  2297. /* set the reo destination during initialization */
  2298. pdev->reo_dest = pdev->pdev_id + 1;
  2299. /*
  2300. * initialize ppdu tlv list
  2301. */
  2302. TAILQ_INIT(&pdev->ppdu_info_list);
  2303. pdev->tlv_count = 0;
  2304. pdev->list_depth = 0;
  2305. return (struct cdp_pdev *)pdev;
  2306. fail1:
  2307. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2308. fail0:
  2309. return NULL;
  2310. }
  2311. /*
  2312. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2313. * @soc: data path SoC handle
  2314. * @pdev: Physical device handle
  2315. *
  2316. * Return: void
  2317. */
  2318. #ifdef QCA_HOST2FW_RXBUF_RING
  2319. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2320. struct dp_pdev *pdev)
  2321. {
  2322. int max_mac_rings =
  2323. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2324. int i;
  2325. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2326. max_mac_rings : MAX_RX_MAC_RINGS;
  2327. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2328. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2329. RXDMA_BUF, 1);
  2330. qdf_timer_free(&soc->mon_reap_timer);
  2331. }
  2332. #else
  2333. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2334. struct dp_pdev *pdev)
  2335. {
  2336. }
  2337. #endif
  2338. /*
  2339. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2340. * @pdev: device object
  2341. *
  2342. * Return: void
  2343. */
  2344. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2345. {
  2346. struct dp_neighbour_peer *peer = NULL;
  2347. struct dp_neighbour_peer *temp_peer = NULL;
  2348. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2349. neighbour_peer_list_elem, temp_peer) {
  2350. /* delete this peer from the list */
  2351. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2352. peer, neighbour_peer_list_elem);
  2353. qdf_mem_free(peer);
  2354. }
  2355. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2356. }
  2357. /*
  2358. * dp_pdev_detach_wifi3() - detach txrx pdev
  2359. * @txrx_pdev: Datapath PDEV handle
  2360. * @force: Force detach
  2361. *
  2362. */
  2363. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2364. {
  2365. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2366. struct dp_soc *soc = pdev->soc;
  2367. qdf_nbuf_t curr_nbuf, next_nbuf;
  2368. int mac_id;
  2369. dp_wdi_event_detach(pdev);
  2370. dp_tx_pdev_detach(pdev);
  2371. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2372. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2373. TCL_DATA, pdev->pdev_id);
  2374. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2375. WBM2SW_RELEASE, pdev->pdev_id);
  2376. }
  2377. dp_pktlogmod_exit(pdev);
  2378. dp_rx_pdev_detach(pdev);
  2379. dp_rx_pdev_mon_detach(pdev);
  2380. dp_neighbour_peers_detach(pdev);
  2381. qdf_spinlock_destroy(&pdev->tx_mutex);
  2382. dp_ipa_uc_detach(soc, pdev);
  2383. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  2384. /* Cleanup per PDEV REO rings if configured */
  2385. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2386. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2387. REO_DST, pdev->pdev_id);
  2388. }
  2389. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2390. dp_rxdma_ring_cleanup(soc, pdev);
  2391. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2392. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2393. RXDMA_MONITOR_BUF, 0);
  2394. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2395. RXDMA_MONITOR_DST, 0);
  2396. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2397. RXDMA_MONITOR_STATUS, 0);
  2398. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2399. RXDMA_MONITOR_DESC, 0);
  2400. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2401. RXDMA_DST, 0);
  2402. }
  2403. curr_nbuf = pdev->invalid_peer_head_msdu;
  2404. while (curr_nbuf) {
  2405. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2406. qdf_nbuf_free(curr_nbuf);
  2407. curr_nbuf = next_nbuf;
  2408. }
  2409. soc->pdev_list[pdev->pdev_id] = NULL;
  2410. soc->pdev_count--;
  2411. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2412. qdf_mem_free(pdev->dp_txrx_handle);
  2413. qdf_mem_free(pdev);
  2414. }
  2415. /*
  2416. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2417. * @soc: DP SOC handle
  2418. */
  2419. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2420. {
  2421. struct reo_desc_list_node *desc;
  2422. struct dp_rx_tid *rx_tid;
  2423. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2424. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2425. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2426. rx_tid = &desc->rx_tid;
  2427. qdf_mem_unmap_nbytes_single(soc->osdev,
  2428. rx_tid->hw_qdesc_paddr,
  2429. QDF_DMA_BIDIRECTIONAL,
  2430. rx_tid->hw_qdesc_alloc_size);
  2431. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2432. qdf_mem_free(desc);
  2433. }
  2434. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2435. qdf_list_destroy(&soc->reo_desc_freelist);
  2436. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2437. }
  2438. /*
  2439. * dp_soc_detach_wifi3() - Detach txrx SOC
  2440. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2441. */
  2442. static void dp_soc_detach_wifi3(void *txrx_soc)
  2443. {
  2444. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2445. int i;
  2446. qdf_atomic_set(&soc->cmn_init_done, 0);
  2447. qdf_flush_work(&soc->htt_stats.work);
  2448. qdf_disable_work(&soc->htt_stats.work);
  2449. /* Free pending htt stats messages */
  2450. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2451. dp_free_inact_timer(soc);
  2452. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2453. if (soc->pdev_list[i])
  2454. dp_pdev_detach_wifi3(
  2455. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2456. }
  2457. dp_peer_find_detach(soc);
  2458. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2459. * SW descriptors
  2460. */
  2461. /* Free the ring memories */
  2462. /* Common rings */
  2463. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2464. dp_tx_soc_detach(soc);
  2465. /* Tx data rings */
  2466. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2467. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2468. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2469. TCL_DATA, i);
  2470. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2471. WBM2SW_RELEASE, i);
  2472. }
  2473. }
  2474. /* TCL command and status rings */
  2475. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2476. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2477. /* Rx data rings */
  2478. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2479. soc->num_reo_dest_rings =
  2480. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2481. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2482. /* TODO: Get number of rings and ring sizes
  2483. * from wlan_cfg
  2484. */
  2485. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2486. REO_DST, i);
  2487. }
  2488. }
  2489. /* REO reinjection ring */
  2490. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2491. /* Rx release ring */
  2492. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2493. /* Rx exception ring */
  2494. /* TODO: Better to store ring_type and ring_num in
  2495. * dp_srng during setup
  2496. */
  2497. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2498. /* REO command and status rings */
  2499. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2500. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2501. dp_hw_link_desc_pool_cleanup(soc);
  2502. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2503. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2504. htt_soc_detach(soc->htt_handle);
  2505. dp_reo_cmdlist_destroy(soc);
  2506. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2507. dp_reo_desc_freelist_destroy(soc);
  2508. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2509. dp_soc_wds_detach(soc);
  2510. qdf_spinlock_destroy(&soc->ast_lock);
  2511. qdf_mem_free(soc);
  2512. }
  2513. /*
  2514. * dp_rxdma_ring_config() - configure the RX DMA rings
  2515. *
  2516. * This function is used to configure the MAC rings.
  2517. * On MCL host provides buffers in Host2FW ring
  2518. * FW refills (copies) buffers to the ring and updates
  2519. * ring_idx in register
  2520. *
  2521. * @soc: data path SoC handle
  2522. *
  2523. * Return: void
  2524. */
  2525. #ifdef QCA_HOST2FW_RXBUF_RING
  2526. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2527. {
  2528. int i;
  2529. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2530. struct dp_pdev *pdev = soc->pdev_list[i];
  2531. if (pdev) {
  2532. int mac_id;
  2533. bool dbs_enable = 0;
  2534. int max_mac_rings =
  2535. wlan_cfg_get_num_mac_rings
  2536. (pdev->wlan_cfg_ctx);
  2537. htt_srng_setup(soc->htt_handle, 0,
  2538. pdev->rx_refill_buf_ring.hal_srng,
  2539. RXDMA_BUF);
  2540. if (pdev->rx_refill_buf_ring2.hal_srng)
  2541. htt_srng_setup(soc->htt_handle, 0,
  2542. pdev->rx_refill_buf_ring2.hal_srng,
  2543. RXDMA_BUF);
  2544. if (soc->cdp_soc.ol_ops->
  2545. is_hw_dbs_2x2_capable) {
  2546. dbs_enable = soc->cdp_soc.ol_ops->
  2547. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2548. }
  2549. if (dbs_enable) {
  2550. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2551. QDF_TRACE_LEVEL_ERROR,
  2552. FL("DBS enabled max_mac_rings %d\n"),
  2553. max_mac_rings);
  2554. } else {
  2555. max_mac_rings = 1;
  2556. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2557. QDF_TRACE_LEVEL_ERROR,
  2558. FL("DBS disabled, max_mac_rings %d\n"),
  2559. max_mac_rings);
  2560. }
  2561. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2562. FL("pdev_id %d max_mac_rings %d\n"),
  2563. pdev->pdev_id, max_mac_rings);
  2564. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  2565. int mac_for_pdev = dp_get_mac_id_for_pdev(
  2566. mac_id, pdev->pdev_id);
  2567. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2568. QDF_TRACE_LEVEL_ERROR,
  2569. FL("mac_id %d\n"), mac_for_pdev);
  2570. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2571. pdev->rx_mac_buf_ring[mac_id]
  2572. .hal_srng,
  2573. RXDMA_BUF);
  2574. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2575. pdev->rxdma_err_dst_ring[mac_id]
  2576. .hal_srng,
  2577. RXDMA_DST);
  2578. /* Configure monitor mode rings */
  2579. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2580. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2581. RXDMA_MONITOR_BUF);
  2582. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2583. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2584. RXDMA_MONITOR_DST);
  2585. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2586. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2587. RXDMA_MONITOR_STATUS);
  2588. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2589. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2590. RXDMA_MONITOR_DESC);
  2591. }
  2592. }
  2593. }
  2594. /*
  2595. * Timer to reap rxdma status rings.
  2596. * Needed until we enable ppdu end interrupts
  2597. */
  2598. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2599. dp_service_mon_rings, (void *)soc,
  2600. QDF_TIMER_TYPE_WAKE_APPS);
  2601. soc->reap_timer_init = 1;
  2602. }
  2603. #else
  2604. /* This is only for WIN */
  2605. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2606. {
  2607. int i;
  2608. int mac_id;
  2609. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2610. struct dp_pdev *pdev = soc->pdev_list[i];
  2611. if (pdev == NULL)
  2612. continue;
  2613. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2614. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  2615. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2616. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2617. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2618. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2619. RXDMA_MONITOR_BUF);
  2620. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2621. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2622. RXDMA_MONITOR_DST);
  2623. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2624. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2625. RXDMA_MONITOR_STATUS);
  2626. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2627. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2628. RXDMA_MONITOR_DESC);
  2629. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2630. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  2631. RXDMA_DST);
  2632. }
  2633. }
  2634. }
  2635. #endif
  2636. /*
  2637. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2638. * @txrx_soc: Datapath SOC handle
  2639. */
  2640. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2641. {
  2642. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2643. htt_soc_attach_target(soc->htt_handle);
  2644. dp_rxdma_ring_config(soc);
  2645. DP_STATS_INIT(soc);
  2646. /* initialize work queue for stats processing */
  2647. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2648. return 0;
  2649. }
  2650. /*
  2651. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2652. * @txrx_soc: Datapath SOC handle
  2653. */
  2654. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2655. {
  2656. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2657. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2658. }
  2659. /*
  2660. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2661. * @txrx_soc: Datapath SOC handle
  2662. * @nss_cfg: nss config
  2663. */
  2664. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2665. {
  2666. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2667. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  2668. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  2669. /*
  2670. * TODO: masked out based on the per offloaded radio
  2671. */
  2672. if (config == dp_nss_cfg_dbdc) {
  2673. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  2674. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  2675. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  2676. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  2677. }
  2678. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2679. FL("nss-wifi<0> nss config is enabled"));
  2680. }
  2681. /*
  2682. * dp_vdev_attach_wifi3() - attach txrx vdev
  2683. * @txrx_pdev: Datapath PDEV handle
  2684. * @vdev_mac_addr: MAC address of the virtual interface
  2685. * @vdev_id: VDEV Id
  2686. * @wlan_op_mode: VDEV operating mode
  2687. *
  2688. * Return: DP VDEV handle on success, NULL on failure
  2689. */
  2690. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2691. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2692. {
  2693. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2694. struct dp_soc *soc = pdev->soc;
  2695. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2696. int tx_ring_size;
  2697. if (!vdev) {
  2698. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2699. FL("DP VDEV memory allocation failed"));
  2700. goto fail0;
  2701. }
  2702. vdev->pdev = pdev;
  2703. vdev->vdev_id = vdev_id;
  2704. vdev->opmode = op_mode;
  2705. vdev->osdev = soc->osdev;
  2706. vdev->osif_rx = NULL;
  2707. vdev->osif_rsim_rx_decap = NULL;
  2708. vdev->osif_get_key = NULL;
  2709. vdev->osif_rx_mon = NULL;
  2710. vdev->osif_tx_free_ext = NULL;
  2711. vdev->osif_vdev = NULL;
  2712. vdev->delete.pending = 0;
  2713. vdev->safemode = 0;
  2714. vdev->drop_unenc = 1;
  2715. vdev->sec_type = cdp_sec_type_none;
  2716. #ifdef notyet
  2717. vdev->filters_num = 0;
  2718. #endif
  2719. qdf_mem_copy(
  2720. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2721. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2722. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2723. vdev->dscp_tid_map_id = 0;
  2724. vdev->mcast_enhancement_en = 0;
  2725. tx_ring_size = wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2726. /* TODO: Initialize default HTT meta data that will be used in
  2727. * TCL descriptors for packets transmitted from this VDEV
  2728. */
  2729. TAILQ_INIT(&vdev->peer_list);
  2730. /* add this vdev into the pdev's list */
  2731. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2732. pdev->vdev_count++;
  2733. dp_tx_vdev_attach(vdev);
  2734. if (QDF_STATUS_SUCCESS != dp_tx_flow_pool_map_handler(pdev, vdev_id,
  2735. FLOW_TYPE_VDEV, vdev_id, tx_ring_size))
  2736. goto fail1;
  2737. if ((soc->intr_mode == DP_INTR_POLL) &&
  2738. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2739. if (pdev->vdev_count == 1)
  2740. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2741. }
  2742. dp_lro_hash_setup(soc);
  2743. /* LRO */
  2744. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2745. wlan_op_mode_sta == vdev->opmode)
  2746. vdev->lro_enable = true;
  2747. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2748. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2749. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2750. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2751. DP_STATS_INIT(vdev);
  2752. if (wlan_op_mode_sta == vdev->opmode)
  2753. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  2754. vdev->mac_addr.raw);
  2755. return (struct cdp_vdev *)vdev;
  2756. fail1:
  2757. dp_tx_vdev_detach(vdev);
  2758. qdf_mem_free(vdev);
  2759. fail0:
  2760. return NULL;
  2761. }
  2762. /**
  2763. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2764. * @vdev: Datapath VDEV handle
  2765. * @osif_vdev: OSIF vdev handle
  2766. * @txrx_ops: Tx and Rx operations
  2767. *
  2768. * Return: DP VDEV handle on success, NULL on failure
  2769. */
  2770. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2771. void *osif_vdev,
  2772. struct ol_txrx_ops *txrx_ops)
  2773. {
  2774. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2775. vdev->osif_vdev = osif_vdev;
  2776. vdev->osif_rx = txrx_ops->rx.rx;
  2777. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2778. vdev->osif_get_key = txrx_ops->get_key;
  2779. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2780. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2781. #ifdef notyet
  2782. #if ATH_SUPPORT_WAPI
  2783. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2784. #endif
  2785. #endif
  2786. #ifdef UMAC_SUPPORT_PROXY_ARP
  2787. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2788. #endif
  2789. vdev->me_convert = txrx_ops->me_convert;
  2790. /* TODO: Enable the following once Tx code is integrated */
  2791. if (vdev->mesh_vdev)
  2792. txrx_ops->tx.tx = dp_tx_send_mesh;
  2793. else
  2794. txrx_ops->tx.tx = dp_tx_send;
  2795. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  2796. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2797. "DP Vdev Register success");
  2798. }
  2799. /**
  2800. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  2801. * @vdev: Datapath VDEV handle
  2802. *
  2803. * Return: void
  2804. */
  2805. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  2806. {
  2807. struct dp_pdev *pdev = vdev->pdev;
  2808. struct dp_soc *soc = pdev->soc;
  2809. struct dp_peer *peer;
  2810. uint16_t *peer_ids;
  2811. uint8_t i = 0, j = 0;
  2812. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  2813. if (!peer_ids) {
  2814. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2815. "DP alloc failure - unable to flush peers");
  2816. return;
  2817. }
  2818. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2819. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2820. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2821. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  2822. if (j < soc->max_peers)
  2823. peer_ids[j++] = peer->peer_ids[i];
  2824. }
  2825. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2826. for (i = 0; i < j ; i++)
  2827. dp_rx_peer_unmap_handler(soc, peer_ids[i]);
  2828. qdf_mem_free(peer_ids);
  2829. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2830. FL("Flushed peers for vdev object %pK "), vdev);
  2831. }
  2832. /*
  2833. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2834. * @txrx_vdev: Datapath VDEV handle
  2835. * @callback: Callback OL_IF on completion of detach
  2836. * @cb_context: Callback context
  2837. *
  2838. */
  2839. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2840. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2841. {
  2842. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2843. struct dp_pdev *pdev = vdev->pdev;
  2844. struct dp_soc *soc = pdev->soc;
  2845. /* preconditions */
  2846. qdf_assert(vdev);
  2847. /* remove the vdev from its parent pdev's list */
  2848. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2849. if (wlan_op_mode_sta == vdev->opmode)
  2850. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  2851. /*
  2852. * If Target is hung, flush all peers before detaching vdev
  2853. * this will free all references held due to missing
  2854. * unmap commands from Target
  2855. */
  2856. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  2857. dp_vdev_flush_peers(vdev);
  2858. /*
  2859. * Use peer_ref_mutex while accessing peer_list, in case
  2860. * a peer is in the process of being removed from the list.
  2861. */
  2862. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2863. /* check that the vdev has no peers allocated */
  2864. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  2865. /* debug print - will be removed later */
  2866. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  2867. FL("not deleting vdev object %pK (%pM)"
  2868. "until deletion finishes for all its peers"),
  2869. vdev, vdev->mac_addr.raw);
  2870. /* indicate that the vdev needs to be deleted */
  2871. vdev->delete.pending = 1;
  2872. vdev->delete.callback = callback;
  2873. vdev->delete.context = cb_context;
  2874. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2875. return;
  2876. }
  2877. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2878. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id, FLOW_TYPE_VDEV,
  2879. vdev->vdev_id);
  2880. dp_tx_vdev_detach(vdev);
  2881. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2882. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  2883. qdf_mem_free(vdev);
  2884. if (callback)
  2885. callback(cb_context);
  2886. }
  2887. /*
  2888. * dp_peer_create_wifi3() - attach txrx peer
  2889. * @txrx_vdev: Datapath VDEV handle
  2890. * @peer_mac_addr: Peer MAC address
  2891. *
  2892. * Return: DP peeer handle on success, NULL on failure
  2893. */
  2894. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  2895. uint8_t *peer_mac_addr)
  2896. {
  2897. struct dp_peer *peer;
  2898. int i;
  2899. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2900. struct dp_pdev *pdev;
  2901. struct dp_soc *soc;
  2902. /* preconditions */
  2903. qdf_assert(vdev);
  2904. qdf_assert(peer_mac_addr);
  2905. pdev = vdev->pdev;
  2906. soc = pdev->soc;
  2907. #ifdef notyet
  2908. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  2909. soc->mempool_ol_ath_peer);
  2910. #else
  2911. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  2912. #endif
  2913. if (!peer)
  2914. return NULL; /* failure */
  2915. qdf_mem_zero(peer, sizeof(struct dp_peer));
  2916. TAILQ_INIT(&peer->ast_entry_list);
  2917. /* store provided params */
  2918. peer->vdev = vdev;
  2919. dp_peer_add_ast(soc, peer, peer_mac_addr, CDP_TXRX_AST_TYPE_STATIC, 0);
  2920. qdf_spinlock_create(&peer->peer_info_lock);
  2921. qdf_mem_copy(
  2922. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2923. /* TODO: See of rx_opt_proc is really required */
  2924. peer->rx_opt_proc = soc->rx_opt_proc;
  2925. /* initialize the peer_id */
  2926. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2927. peer->peer_ids[i] = HTT_INVALID_PEER;
  2928. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2929. qdf_atomic_init(&peer->ref_cnt);
  2930. /* keep one reference for attach */
  2931. qdf_atomic_inc(&peer->ref_cnt);
  2932. /* add this peer into the vdev's list */
  2933. if (wlan_op_mode_sta == vdev->opmode)
  2934. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  2935. else
  2936. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  2937. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2938. /* TODO: See if hash based search is required */
  2939. dp_peer_find_hash_add(soc, peer);
  2940. /* Initialize the peer state */
  2941. peer->state = OL_TXRX_PEER_STATE_DISC;
  2942. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2943. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  2944. vdev, peer, peer->mac_addr.raw,
  2945. qdf_atomic_read(&peer->ref_cnt));
  2946. /*
  2947. * For every peer MAp message search and set if bss_peer
  2948. */
  2949. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  2950. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2951. "vdev bss_peer!!!!");
  2952. peer->bss_peer = 1;
  2953. vdev->vap_bss_peer = peer;
  2954. }
  2955. #ifndef CONFIG_WIN
  2956. dp_local_peer_id_alloc(pdev, peer);
  2957. #endif
  2958. DP_STATS_INIT(peer);
  2959. return (void *)peer;
  2960. }
  2961. /*
  2962. * dp_peer_setup_wifi3() - initialize the peer
  2963. * @vdev_hdl: virtual device object
  2964. * @peer: Peer object
  2965. *
  2966. * Return: void
  2967. */
  2968. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  2969. {
  2970. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  2971. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2972. struct dp_pdev *pdev;
  2973. struct dp_soc *soc;
  2974. bool hash_based = 0;
  2975. enum cdp_host_reo_dest_ring reo_dest;
  2976. /* preconditions */
  2977. qdf_assert(vdev);
  2978. qdf_assert(peer);
  2979. pdev = vdev->pdev;
  2980. soc = pdev->soc;
  2981. peer->last_assoc_rcvd = 0;
  2982. peer->last_disassoc_rcvd = 0;
  2983. peer->last_deauth_rcvd = 0;
  2984. /*
  2985. * hash based steering is disabled for Radios which are offloaded
  2986. * to NSS
  2987. */
  2988. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  2989. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2990. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2991. FL("hash based steering for pdev: %d is %d\n"),
  2992. pdev->pdev_id, hash_based);
  2993. /*
  2994. * Below line of code will ensure the proper reo_dest ring is choosen
  2995. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  2996. */
  2997. reo_dest = pdev->reo_dest;
  2998. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  2999. /* TODO: Check the destination ring number to be passed to FW */
  3000. soc->cdp_soc.ol_ops->peer_set_default_routing(
  3001. pdev->osif_pdev, peer->mac_addr.raw,
  3002. peer->vdev->vdev_id, hash_based, reo_dest);
  3003. }
  3004. dp_peer_rx_init(pdev, peer);
  3005. return;
  3006. }
  3007. /*
  3008. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  3009. * @vdev_handle: virtual device object
  3010. * @htt_pkt_type: type of pkt
  3011. *
  3012. * Return: void
  3013. */
  3014. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  3015. enum htt_cmn_pkt_type val)
  3016. {
  3017. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3018. vdev->tx_encap_type = val;
  3019. }
  3020. /*
  3021. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  3022. * @vdev_handle: virtual device object
  3023. * @htt_pkt_type: type of pkt
  3024. *
  3025. * Return: void
  3026. */
  3027. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  3028. enum htt_cmn_pkt_type val)
  3029. {
  3030. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3031. vdev->rx_decap_type = val;
  3032. }
  3033. /*
  3034. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3035. * @pdev_handle: physical device object
  3036. * @val: reo destination ring index (1 - 4)
  3037. *
  3038. * Return: void
  3039. */
  3040. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  3041. enum cdp_host_reo_dest_ring val)
  3042. {
  3043. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3044. if (pdev)
  3045. pdev->reo_dest = val;
  3046. }
  3047. /*
  3048. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3049. * @pdev_handle: physical device object
  3050. *
  3051. * Return: reo destination ring index
  3052. */
  3053. static enum cdp_host_reo_dest_ring
  3054. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  3055. {
  3056. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3057. if (pdev)
  3058. return pdev->reo_dest;
  3059. else
  3060. return cdp_host_reo_dest_ring_unknown;
  3061. }
  3062. #ifdef QCA_SUPPORT_SON
  3063. static void dp_son_peer_authorize(struct dp_peer *peer)
  3064. {
  3065. struct dp_soc *soc;
  3066. soc = peer->vdev->pdev->soc;
  3067. peer->peer_bs_inact_flag = 0;
  3068. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3069. return;
  3070. }
  3071. #else
  3072. static void dp_son_peer_authorize(struct dp_peer *peer)
  3073. {
  3074. return;
  3075. }
  3076. #endif
  3077. /*
  3078. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  3079. * @pdev_handle: device object
  3080. * @val: value to be set
  3081. *
  3082. * Return: void
  3083. */
  3084. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3085. uint32_t val)
  3086. {
  3087. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3088. /* Enable/Disable smart mesh filtering. This flag will be checked
  3089. * during rx processing to check if packets are from NAC clients.
  3090. */
  3091. pdev->filter_neighbour_peers = val;
  3092. return 0;
  3093. }
  3094. /*
  3095. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  3096. * address for smart mesh filtering
  3097. * @pdev_handle: device object
  3098. * @cmd: Add/Del command
  3099. * @macaddr: nac client mac address
  3100. *
  3101. * Return: void
  3102. */
  3103. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3104. uint32_t cmd, uint8_t *macaddr)
  3105. {
  3106. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3107. struct dp_neighbour_peer *peer = NULL;
  3108. if (!macaddr)
  3109. goto fail0;
  3110. /* Store address of NAC (neighbour peer) which will be checked
  3111. * against TA of received packets.
  3112. */
  3113. if (cmd == DP_NAC_PARAM_ADD) {
  3114. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3115. sizeof(*peer));
  3116. if (!peer) {
  3117. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3118. FL("DP neighbour peer node memory allocation failed"));
  3119. goto fail0;
  3120. }
  3121. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3122. macaddr, DP_MAC_ADDR_LEN);
  3123. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3124. /* add this neighbour peer into the list */
  3125. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3126. neighbour_peer_list_elem);
  3127. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3128. return 1;
  3129. } else if (cmd == DP_NAC_PARAM_DEL) {
  3130. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3131. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3132. neighbour_peer_list_elem) {
  3133. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3134. macaddr, DP_MAC_ADDR_LEN)) {
  3135. /* delete this peer from the list */
  3136. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3137. peer, neighbour_peer_list_elem);
  3138. qdf_mem_free(peer);
  3139. break;
  3140. }
  3141. }
  3142. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3143. return 1;
  3144. }
  3145. fail0:
  3146. return 0;
  3147. }
  3148. /*
  3149. * dp_get_sec_type() - Get the security type
  3150. * @peer: Datapath peer handle
  3151. * @sec_idx: Security id (mcast, ucast)
  3152. *
  3153. * return sec_type: Security type
  3154. */
  3155. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3156. {
  3157. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3158. return dpeer->security[sec_idx].sec_type;
  3159. }
  3160. /*
  3161. * dp_peer_authorize() - authorize txrx peer
  3162. * @peer_handle: Datapath peer handle
  3163. * @authorize
  3164. *
  3165. */
  3166. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3167. {
  3168. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3169. struct dp_soc *soc;
  3170. if (peer != NULL) {
  3171. soc = peer->vdev->pdev->soc;
  3172. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3173. dp_son_peer_authorize(peer);
  3174. peer->authorize = authorize ? 1 : 0;
  3175. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3176. }
  3177. }
  3178. #ifdef QCA_SUPPORT_SON
  3179. /*
  3180. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3181. * @pdev_handle: Device handle
  3182. * @new_threshold : updated threshold value
  3183. *
  3184. */
  3185. static void
  3186. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3187. u_int16_t new_threshold)
  3188. {
  3189. struct dp_vdev *vdev;
  3190. struct dp_peer *peer;
  3191. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3192. struct dp_soc *soc = pdev->soc;
  3193. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3194. if (old_threshold == new_threshold)
  3195. return;
  3196. soc->pdev_bs_inact_reload = new_threshold;
  3197. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3198. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3199. if (vdev->opmode != wlan_op_mode_ap)
  3200. continue;
  3201. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3202. if (!peer->authorize)
  3203. continue;
  3204. if (old_threshold - peer->peer_bs_inact >=
  3205. new_threshold) {
  3206. dp_mark_peer_inact((void *)peer, true);
  3207. peer->peer_bs_inact = 0;
  3208. } else {
  3209. peer->peer_bs_inact = new_threshold -
  3210. (old_threshold - peer->peer_bs_inact);
  3211. }
  3212. }
  3213. }
  3214. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3215. }
  3216. /**
  3217. * dp_txrx_reset_inact_count(): Reset inact count
  3218. * @pdev_handle - device handle
  3219. *
  3220. * Return: void
  3221. */
  3222. static void
  3223. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3224. {
  3225. struct dp_vdev *vdev = NULL;
  3226. struct dp_peer *peer = NULL;
  3227. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3228. struct dp_soc *soc = pdev->soc;
  3229. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3230. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3231. if (vdev->opmode != wlan_op_mode_ap)
  3232. continue;
  3233. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3234. if (!peer->authorize)
  3235. continue;
  3236. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3237. }
  3238. }
  3239. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3240. }
  3241. /**
  3242. * dp_set_inact_params(): set inactivity params
  3243. * @pdev_handle - device handle
  3244. * @inact_check_interval - inactivity interval
  3245. * @inact_normal - Inactivity normal
  3246. * @inact_overload - Inactivity overload
  3247. *
  3248. * Return: bool
  3249. */
  3250. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3251. u_int16_t inact_check_interval,
  3252. u_int16_t inact_normal, u_int16_t inact_overload)
  3253. {
  3254. struct dp_soc *soc;
  3255. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3256. if (!pdev)
  3257. return false;
  3258. soc = pdev->soc;
  3259. if (!soc)
  3260. return false;
  3261. soc->pdev_bs_inact_interval = inact_check_interval;
  3262. soc->pdev_bs_inact_normal = inact_normal;
  3263. soc->pdev_bs_inact_overload = inact_overload;
  3264. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3265. soc->pdev_bs_inact_normal);
  3266. return true;
  3267. }
  3268. /**
  3269. * dp_start_inact_timer(): Inactivity timer start
  3270. * @pdev_handle - device handle
  3271. * @enable - Inactivity timer start/stop
  3272. *
  3273. * Return: bool
  3274. */
  3275. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3276. {
  3277. struct dp_soc *soc;
  3278. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3279. if (!pdev)
  3280. return false;
  3281. soc = pdev->soc;
  3282. if (!soc)
  3283. return false;
  3284. if (enable) {
  3285. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3286. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3287. soc->pdev_bs_inact_interval * 1000);
  3288. } else {
  3289. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3290. }
  3291. return true;
  3292. }
  3293. /**
  3294. * dp_set_overload(): Set inactivity overload
  3295. * @pdev_handle - device handle
  3296. * @overload - overload status
  3297. *
  3298. * Return: void
  3299. */
  3300. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3301. {
  3302. struct dp_soc *soc;
  3303. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3304. if (!pdev)
  3305. return;
  3306. soc = pdev->soc;
  3307. if (!soc)
  3308. return;
  3309. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3310. overload ? soc->pdev_bs_inact_overload :
  3311. soc->pdev_bs_inact_normal);
  3312. }
  3313. /**
  3314. * dp_peer_is_inact(): check whether peer is inactive
  3315. * @peer_handle - datapath peer handle
  3316. *
  3317. * Return: bool
  3318. */
  3319. bool dp_peer_is_inact(void *peer_handle)
  3320. {
  3321. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3322. if (!peer)
  3323. return false;
  3324. return peer->peer_bs_inact_flag == 1;
  3325. }
  3326. /**
  3327. * dp_init_inact_timer: initialize the inact timer
  3328. * @soc - SOC handle
  3329. *
  3330. * Return: void
  3331. */
  3332. void dp_init_inact_timer(struct dp_soc *soc)
  3333. {
  3334. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3335. dp_txrx_peer_find_inact_timeout_handler,
  3336. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3337. }
  3338. #else
  3339. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3340. u_int16_t inact_normal, u_int16_t inact_overload)
  3341. {
  3342. return false;
  3343. }
  3344. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3345. {
  3346. return false;
  3347. }
  3348. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3349. {
  3350. return;
  3351. }
  3352. void dp_init_inact_timer(struct dp_soc *soc)
  3353. {
  3354. return;
  3355. }
  3356. bool dp_peer_is_inact(void *peer)
  3357. {
  3358. return false;
  3359. }
  3360. #endif
  3361. /*
  3362. * dp_peer_unref_delete() - unref and delete peer
  3363. * @peer_handle: Datapath peer handle
  3364. *
  3365. */
  3366. void dp_peer_unref_delete(void *peer_handle)
  3367. {
  3368. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3369. struct dp_peer *bss_peer = NULL;
  3370. struct dp_vdev *vdev = peer->vdev;
  3371. struct dp_pdev *pdev = vdev->pdev;
  3372. struct dp_soc *soc = pdev->soc;
  3373. struct dp_peer *tmppeer;
  3374. int found = 0;
  3375. uint16_t peer_id;
  3376. uint16_t vdev_id;
  3377. /*
  3378. * Hold the lock all the way from checking if the peer ref count
  3379. * is zero until the peer references are removed from the hash
  3380. * table and vdev list (if the peer ref count is zero).
  3381. * This protects against a new HL tx operation starting to use the
  3382. * peer object just after this function concludes it's done being used.
  3383. * Furthermore, the lock needs to be held while checking whether the
  3384. * vdev's list of peers is empty, to make sure that list is not modified
  3385. * concurrently with the empty check.
  3386. */
  3387. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3388. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3389. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3390. peer, qdf_atomic_read(&peer->ref_cnt));
  3391. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3392. peer_id = peer->peer_ids[0];
  3393. vdev_id = vdev->vdev_id;
  3394. /*
  3395. * Make sure that the reference to the peer in
  3396. * peer object map is removed
  3397. */
  3398. if (peer_id != HTT_INVALID_PEER)
  3399. soc->peer_id_to_obj_map[peer_id] = NULL;
  3400. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3401. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3402. /* remove the reference to the peer from the hash table */
  3403. dp_peer_find_hash_remove(soc, peer);
  3404. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3405. if (tmppeer == peer) {
  3406. found = 1;
  3407. break;
  3408. }
  3409. }
  3410. if (found) {
  3411. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3412. peer_list_elem);
  3413. } else {
  3414. /*Ignoring the remove operation as peer not found*/
  3415. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3416. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3417. peer, vdev, &peer->vdev->peer_list);
  3418. }
  3419. /* cleanup the peer data */
  3420. dp_peer_cleanup(vdev, peer);
  3421. /* check whether the parent vdev has no peers left */
  3422. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3423. /*
  3424. * Now that there are no references to the peer, we can
  3425. * release the peer reference lock.
  3426. */
  3427. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3428. /*
  3429. * Check if the parent vdev was waiting for its peers
  3430. * to be deleted, in order for it to be deleted too.
  3431. */
  3432. if (vdev->delete.pending) {
  3433. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3434. vdev->delete.callback;
  3435. void *vdev_delete_context =
  3436. vdev->delete.context;
  3437. QDF_TRACE(QDF_MODULE_ID_DP,
  3438. QDF_TRACE_LEVEL_INFO_HIGH,
  3439. FL("deleting vdev object %pK (%pM)"
  3440. " - its last peer is done"),
  3441. vdev, vdev->mac_addr.raw);
  3442. /* all peers are gone, go ahead and delete it */
  3443. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  3444. FLOW_TYPE_VDEV,
  3445. vdev_id);
  3446. dp_tx_vdev_detach(vdev);
  3447. QDF_TRACE(QDF_MODULE_ID_DP,
  3448. QDF_TRACE_LEVEL_INFO_HIGH,
  3449. FL("deleting vdev object %pK (%pM)"),
  3450. vdev, vdev->mac_addr.raw);
  3451. qdf_mem_free(vdev);
  3452. vdev = NULL;
  3453. if (vdev_delete_cb)
  3454. vdev_delete_cb(vdev_delete_context);
  3455. }
  3456. } else {
  3457. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3458. }
  3459. if (vdev) {
  3460. if (vdev->vap_bss_peer == peer) {
  3461. vdev->vap_bss_peer = NULL;
  3462. }
  3463. }
  3464. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3465. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3466. vdev_id, peer->mac_addr.raw);
  3467. }
  3468. if (!vdev || !vdev->vap_bss_peer) {
  3469. goto free_peer;
  3470. }
  3471. #ifdef notyet
  3472. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3473. #else
  3474. bss_peer = vdev->vap_bss_peer;
  3475. DP_UPDATE_STATS(bss_peer, peer);
  3476. free_peer:
  3477. qdf_mem_free(peer);
  3478. #endif
  3479. } else {
  3480. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3481. }
  3482. }
  3483. /*
  3484. * dp_peer_detach_wifi3() – Detach txrx peer
  3485. * @peer_handle: Datapath peer handle
  3486. * @bitmap: bitmap indicating special handling of request.
  3487. *
  3488. */
  3489. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3490. {
  3491. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3492. /* redirect the peer's rx delivery function to point to a
  3493. * discard func
  3494. */
  3495. peer->rx_opt_proc = dp_rx_discard;
  3496. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3497. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3498. #ifndef CONFIG_WIN
  3499. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3500. #endif
  3501. qdf_spinlock_destroy(&peer->peer_info_lock);
  3502. /*
  3503. * Remove the reference added during peer_attach.
  3504. * The peer will still be left allocated until the
  3505. * PEER_UNMAP message arrives to remove the other
  3506. * reference, added by the PEER_MAP message.
  3507. */
  3508. dp_peer_unref_delete(peer_handle);
  3509. }
  3510. /*
  3511. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3512. * @peer_handle: Datapath peer handle
  3513. *
  3514. */
  3515. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3516. {
  3517. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3518. return vdev->mac_addr.raw;
  3519. }
  3520. /*
  3521. * dp_vdev_set_wds() - Enable per packet stats
  3522. * @vdev_handle: DP VDEV handle
  3523. * @val: value
  3524. *
  3525. * Return: none
  3526. */
  3527. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3528. {
  3529. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3530. vdev->wds_enabled = val;
  3531. return 0;
  3532. }
  3533. /*
  3534. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3535. * @peer_handle: Datapath peer handle
  3536. *
  3537. */
  3538. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3539. uint8_t vdev_id)
  3540. {
  3541. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3542. struct dp_vdev *vdev = NULL;
  3543. if (qdf_unlikely(!pdev))
  3544. return NULL;
  3545. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3546. if (vdev->vdev_id == vdev_id)
  3547. break;
  3548. }
  3549. return (struct cdp_vdev *)vdev;
  3550. }
  3551. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3552. {
  3553. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3554. return vdev->opmode;
  3555. }
  3556. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3557. {
  3558. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3559. struct dp_pdev *pdev = vdev->pdev;
  3560. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3561. }
  3562. /**
  3563. * dp_reset_monitor_mode() - Disable monitor mode
  3564. * @pdev_handle: Datapath PDEV handle
  3565. *
  3566. * Return: 0 on success, not 0 on failure
  3567. */
  3568. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3569. {
  3570. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3571. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3572. struct dp_soc *soc = pdev->soc;
  3573. uint8_t pdev_id;
  3574. int mac_id;
  3575. pdev_id = pdev->pdev_id;
  3576. soc = pdev->soc;
  3577. pdev->monitor_vdev = NULL;
  3578. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3579. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3580. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3581. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3582. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3583. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3584. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3585. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3586. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3587. }
  3588. return 0;
  3589. }
  3590. /**
  3591. * dp_set_nac() - set peer_nac
  3592. * @peer_handle: Datapath PEER handle
  3593. *
  3594. * Return: void
  3595. */
  3596. static void dp_set_nac(struct cdp_peer *peer_handle)
  3597. {
  3598. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3599. peer->nac = 1;
  3600. }
  3601. /**
  3602. * dp_get_tx_pending() - read pending tx
  3603. * @pdev_handle: Datapath PDEV handle
  3604. *
  3605. * Return: outstanding tx
  3606. */
  3607. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  3608. {
  3609. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3610. return qdf_atomic_read(&pdev->num_tx_outstanding);
  3611. }
  3612. /**
  3613. * dp_get_peer_mac_from_peer_id() - get peer mac
  3614. * @pdev_handle: Datapath PDEV handle
  3615. * @peer_id: Peer ID
  3616. * @peer_mac: MAC addr of PEER
  3617. *
  3618. * Return: void
  3619. */
  3620. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  3621. uint32_t peer_id, uint8_t *peer_mac)
  3622. {
  3623. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3624. struct dp_peer *peer;
  3625. if (pdev && peer_mac) {
  3626. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  3627. if (peer && peer->mac_addr.raw) {
  3628. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  3629. DP_MAC_ADDR_LEN);
  3630. }
  3631. }
  3632. }
  3633. /**
  3634. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3635. * @vdev_handle: Datapath VDEV handle
  3636. * @smart_monitor: Flag to denote if its smart monitor mode
  3637. *
  3638. * Return: 0 on success, not 0 on failure
  3639. */
  3640. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3641. uint8_t smart_monitor)
  3642. {
  3643. /* Many monitor VAPs can exists in a system but only one can be up at
  3644. * anytime
  3645. */
  3646. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3647. struct dp_pdev *pdev;
  3648. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3649. struct dp_soc *soc;
  3650. uint8_t pdev_id;
  3651. int mac_id;
  3652. qdf_assert(vdev);
  3653. pdev = vdev->pdev;
  3654. pdev_id = pdev->pdev_id;
  3655. soc = pdev->soc;
  3656. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3657. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3658. pdev, pdev_id, soc, vdev);
  3659. /*Check if current pdev's monitor_vdev exists */
  3660. if (pdev->monitor_vdev) {
  3661. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3662. "vdev=%pK\n", vdev);
  3663. qdf_assert(vdev);
  3664. }
  3665. pdev->monitor_vdev = vdev;
  3666. /* If smart monitor mode, do not configure monitor ring */
  3667. if (smart_monitor)
  3668. return QDF_STATUS_SUCCESS;
  3669. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3670. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3671. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3672. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3673. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3674. pdev->mo_data_filter);
  3675. htt_tlv_filter.mpdu_start = 1;
  3676. htt_tlv_filter.msdu_start = 1;
  3677. htt_tlv_filter.packet = 1;
  3678. htt_tlv_filter.msdu_end = 1;
  3679. htt_tlv_filter.mpdu_end = 1;
  3680. htt_tlv_filter.packet_header = 1;
  3681. htt_tlv_filter.attention = 1;
  3682. htt_tlv_filter.ppdu_start = 0;
  3683. htt_tlv_filter.ppdu_end = 0;
  3684. htt_tlv_filter.ppdu_end_user_stats = 0;
  3685. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3686. htt_tlv_filter.ppdu_end_status_done = 0;
  3687. htt_tlv_filter.header_per_msdu = 1;
  3688. htt_tlv_filter.enable_fp =
  3689. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3690. htt_tlv_filter.enable_md = 0;
  3691. htt_tlv_filter.enable_mo =
  3692. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3693. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3694. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3695. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3696. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3697. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3698. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3699. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3700. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3701. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3702. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3703. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3704. }
  3705. htt_tlv_filter.mpdu_start = 1;
  3706. htt_tlv_filter.msdu_start = 1;
  3707. htt_tlv_filter.packet = 0;
  3708. htt_tlv_filter.msdu_end = 1;
  3709. htt_tlv_filter.mpdu_end = 1;
  3710. htt_tlv_filter.packet_header = 1;
  3711. htt_tlv_filter.attention = 1;
  3712. htt_tlv_filter.ppdu_start = 1;
  3713. htt_tlv_filter.ppdu_end = 1;
  3714. htt_tlv_filter.ppdu_end_user_stats = 1;
  3715. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3716. htt_tlv_filter.ppdu_end_status_done = 1;
  3717. htt_tlv_filter.header_per_msdu = 0;
  3718. htt_tlv_filter.enable_fp =
  3719. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3720. htt_tlv_filter.enable_md = 0;
  3721. htt_tlv_filter.enable_mo =
  3722. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3723. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3724. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3725. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3726. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3727. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3728. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3729. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3730. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3731. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3732. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3733. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3734. }
  3735. return QDF_STATUS_SUCCESS;
  3736. }
  3737. /**
  3738. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3739. * @pdev_handle: Datapath PDEV handle
  3740. * @filter_val: Flag to select Filter for monitor mode
  3741. * Return: 0 on success, not 0 on failure
  3742. */
  3743. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3744. struct cdp_monitor_filter *filter_val)
  3745. {
  3746. /* Many monitor VAPs can exists in a system but only one can be up at
  3747. * anytime
  3748. */
  3749. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3750. struct dp_vdev *vdev = pdev->monitor_vdev;
  3751. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3752. struct dp_soc *soc;
  3753. uint8_t pdev_id;
  3754. int mac_id;
  3755. pdev_id = pdev->pdev_id;
  3756. soc = pdev->soc;
  3757. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3758. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3759. pdev, pdev_id, soc, vdev);
  3760. /*Check if current pdev's monitor_vdev exists */
  3761. if (!pdev->monitor_vdev) {
  3762. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3763. "vdev=%pK\n", vdev);
  3764. qdf_assert(vdev);
  3765. }
  3766. /* update filter mode, type in pdev structure */
  3767. pdev->mon_filter_mode = filter_val->mode;
  3768. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3769. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3770. pdev->fp_data_filter = filter_val->fp_data;
  3771. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3772. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3773. pdev->mo_data_filter = filter_val->mo_data;
  3774. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3775. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3776. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3777. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3778. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3779. pdev->mo_data_filter);
  3780. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3781. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3782. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3783. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3784. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3785. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3786. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3787. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3788. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3789. }
  3790. htt_tlv_filter.mpdu_start = 1;
  3791. htt_tlv_filter.msdu_start = 1;
  3792. htt_tlv_filter.packet = 1;
  3793. htt_tlv_filter.msdu_end = 1;
  3794. htt_tlv_filter.mpdu_end = 1;
  3795. htt_tlv_filter.packet_header = 1;
  3796. htt_tlv_filter.attention = 1;
  3797. htt_tlv_filter.ppdu_start = 0;
  3798. htt_tlv_filter.ppdu_end = 0;
  3799. htt_tlv_filter.ppdu_end_user_stats = 0;
  3800. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3801. htt_tlv_filter.ppdu_end_status_done = 0;
  3802. htt_tlv_filter.header_per_msdu = 1;
  3803. htt_tlv_filter.enable_fp =
  3804. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3805. htt_tlv_filter.enable_md = 0;
  3806. htt_tlv_filter.enable_mo =
  3807. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3808. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3809. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3810. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3811. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3812. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3813. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3814. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3815. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3816. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3817. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3818. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3819. }
  3820. htt_tlv_filter.mpdu_start = 1;
  3821. htt_tlv_filter.msdu_start = 1;
  3822. htt_tlv_filter.packet = 0;
  3823. htt_tlv_filter.msdu_end = 1;
  3824. htt_tlv_filter.mpdu_end = 1;
  3825. htt_tlv_filter.packet_header = 1;
  3826. htt_tlv_filter.attention = 1;
  3827. htt_tlv_filter.ppdu_start = 1;
  3828. htt_tlv_filter.ppdu_end = 1;
  3829. htt_tlv_filter.ppdu_end_user_stats = 1;
  3830. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3831. htt_tlv_filter.ppdu_end_status_done = 1;
  3832. htt_tlv_filter.header_per_msdu = 0;
  3833. htt_tlv_filter.enable_fp =
  3834. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3835. htt_tlv_filter.enable_md = 0;
  3836. htt_tlv_filter.enable_mo =
  3837. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3838. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3839. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3840. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3841. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3842. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3843. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3844. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3845. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3846. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3847. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3848. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3849. }
  3850. return QDF_STATUS_SUCCESS;
  3851. }
  3852. /**
  3853. * dp_get_pdev_id_frm_pdev() - get pdev_id
  3854. * @pdev_handle: Datapath PDEV handle
  3855. *
  3856. * Return: pdev_id
  3857. */
  3858. static
  3859. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  3860. {
  3861. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3862. return pdev->pdev_id;
  3863. }
  3864. /**
  3865. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  3866. * @vdev_handle: Datapath VDEV handle
  3867. * Return: true on ucast filter flag set
  3868. */
  3869. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  3870. {
  3871. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3872. struct dp_pdev *pdev;
  3873. pdev = vdev->pdev;
  3874. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  3875. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  3876. return true;
  3877. return false;
  3878. }
  3879. /**
  3880. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  3881. * @vdev_handle: Datapath VDEV handle
  3882. * Return: true on mcast filter flag set
  3883. */
  3884. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  3885. {
  3886. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3887. struct dp_pdev *pdev;
  3888. pdev = vdev->pdev;
  3889. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  3890. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  3891. return true;
  3892. return false;
  3893. }
  3894. /**
  3895. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  3896. * @vdev_handle: Datapath VDEV handle
  3897. * Return: true on non data filter flag set
  3898. */
  3899. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  3900. {
  3901. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3902. struct dp_pdev *pdev;
  3903. pdev = vdev->pdev;
  3904. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  3905. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  3906. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  3907. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  3908. return true;
  3909. }
  3910. }
  3911. return false;
  3912. }
  3913. #ifdef MESH_MODE_SUPPORT
  3914. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  3915. {
  3916. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3917. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3918. FL("val %d"), val);
  3919. vdev->mesh_vdev = val;
  3920. }
  3921. /*
  3922. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  3923. * @vdev_hdl: virtual device object
  3924. * @val: value to be set
  3925. *
  3926. * Return: void
  3927. */
  3928. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  3929. {
  3930. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3931. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3932. FL("val %d"), val);
  3933. vdev->mesh_rx_filter = val;
  3934. }
  3935. #endif
  3936. /*
  3937. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  3938. * Current scope is bar recieved count
  3939. *
  3940. * @pdev_handle: DP_PDEV handle
  3941. *
  3942. * Return: void
  3943. */
  3944. #define STATS_PROC_TIMEOUT (HZ/1000)
  3945. static void
  3946. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  3947. {
  3948. struct dp_vdev *vdev;
  3949. struct dp_peer *peer;
  3950. uint32_t waitcnt;
  3951. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3952. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3953. if (!peer) {
  3954. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3955. FL("DP Invalid Peer refernce"));
  3956. return;
  3957. }
  3958. if (peer->delete_in_progress) {
  3959. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3960. FL("DP Peer deletion in progress"));
  3961. continue;
  3962. }
  3963. qdf_atomic_inc(&peer->ref_cnt);
  3964. waitcnt = 0;
  3965. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  3966. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  3967. && waitcnt < 10) {
  3968. schedule_timeout_interruptible(
  3969. STATS_PROC_TIMEOUT);
  3970. waitcnt++;
  3971. }
  3972. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  3973. dp_peer_unref_delete(peer);
  3974. }
  3975. }
  3976. }
  3977. /**
  3978. * dp_rx_bar_stats_cb(): BAR received stats callback
  3979. * @soc: SOC handle
  3980. * @cb_ctxt: Call back context
  3981. * @reo_status: Reo status
  3982. *
  3983. * return: void
  3984. */
  3985. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  3986. union hal_reo_status *reo_status)
  3987. {
  3988. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  3989. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  3990. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  3991. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  3992. queue_status->header.status);
  3993. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  3994. return;
  3995. }
  3996. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  3997. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  3998. }
  3999. /**
  4000. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  4001. * @vdev: DP VDEV handle
  4002. *
  4003. * return: void
  4004. */
  4005. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  4006. {
  4007. struct dp_peer *peer = NULL;
  4008. struct dp_soc *soc = vdev->pdev->soc;
  4009. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  4010. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  4011. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  4012. DP_UPDATE_STATS(vdev, peer);
  4013. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4014. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4015. &vdev->stats, (uint16_t) vdev->vdev_id,
  4016. UPDATE_VDEV_STATS);
  4017. }
  4018. /**
  4019. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  4020. * @pdev: DP PDEV handle
  4021. *
  4022. * return: void
  4023. */
  4024. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  4025. {
  4026. struct dp_vdev *vdev = NULL;
  4027. struct dp_soc *soc = pdev->soc;
  4028. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  4029. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  4030. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  4031. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4032. dp_aggregate_vdev_stats(vdev);
  4033. DP_UPDATE_STATS(pdev, vdev);
  4034. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  4035. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  4036. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  4037. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  4038. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  4039. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  4040. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  4041. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  4042. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  4043. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  4044. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  4045. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  4046. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  4047. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  4048. DP_STATS_AGGR(pdev, vdev,
  4049. tx_i.mcast_en.dropped_map_error);
  4050. DP_STATS_AGGR(pdev, vdev,
  4051. tx_i.mcast_en.dropped_self_mac);
  4052. DP_STATS_AGGR(pdev, vdev,
  4053. tx_i.mcast_en.dropped_send_fail);
  4054. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  4055. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  4056. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  4057. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  4058. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  4059. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  4060. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  4061. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  4062. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  4063. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  4064. pdev->stats.tx_i.dropped.dropped_pkt.num =
  4065. pdev->stats.tx_i.dropped.dma_error +
  4066. pdev->stats.tx_i.dropped.ring_full +
  4067. pdev->stats.tx_i.dropped.enqueue_fail +
  4068. pdev->stats.tx_i.dropped.desc_na +
  4069. pdev->stats.tx_i.dropped.res_full;
  4070. pdev->stats.tx.last_ack_rssi =
  4071. vdev->stats.tx.last_ack_rssi;
  4072. pdev->stats.tx_i.tso.num_seg =
  4073. vdev->stats.tx_i.tso.num_seg;
  4074. }
  4075. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4076. soc->cdp_soc.ol_ops->update_dp_stats(pdev->osif_pdev,
  4077. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  4078. }
  4079. /**
  4080. * dp_pdev_getstats() - get pdev packet level stats
  4081. * @pdev_handle: Datapath PDEV handle
  4082. * @stats: cdp network device stats structure
  4083. *
  4084. * Return: void
  4085. */
  4086. static void dp_pdev_getstats(struct cdp_pdev *pdev_handle,
  4087. struct cdp_dev_stats *stats)
  4088. {
  4089. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4090. dp_aggregate_pdev_stats(pdev);
  4091. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  4092. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  4093. stats->tx_errors = pdev->stats.tx.tx_failed +
  4094. pdev->stats.tx_i.dropped.dropped_pkt.num;
  4095. stats->tx_dropped = stats->tx_errors;
  4096. stats->rx_packets = pdev->stats.rx.unicast.num +
  4097. pdev->stats.rx.multicast.num;
  4098. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  4099. pdev->stats.rx.multicast.bytes;
  4100. }
  4101. /**
  4102. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  4103. * @pdev: DP_PDEV Handle
  4104. *
  4105. * Return:void
  4106. */
  4107. static inline void
  4108. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  4109. {
  4110. uint8_t index = 0;
  4111. DP_PRINT_STATS("PDEV Tx Stats:\n");
  4112. DP_PRINT_STATS("Received From Stack:");
  4113. DP_PRINT_STATS(" Packets = %d",
  4114. pdev->stats.tx_i.rcvd.num);
  4115. DP_PRINT_STATS(" Bytes = %llu",
  4116. pdev->stats.tx_i.rcvd.bytes);
  4117. DP_PRINT_STATS("Processed:");
  4118. DP_PRINT_STATS(" Packets = %d",
  4119. pdev->stats.tx_i.processed.num);
  4120. DP_PRINT_STATS(" Bytes = %llu",
  4121. pdev->stats.tx_i.processed.bytes);
  4122. DP_PRINT_STATS("Total Completions:");
  4123. DP_PRINT_STATS(" Packets = %u",
  4124. pdev->stats.tx.comp_pkt.num);
  4125. DP_PRINT_STATS(" Bytes = %llu",
  4126. pdev->stats.tx.comp_pkt.bytes);
  4127. DP_PRINT_STATS("Successful Completions:");
  4128. DP_PRINT_STATS(" Packets = %u",
  4129. pdev->stats.tx.tx_success.num);
  4130. DP_PRINT_STATS(" Bytes = %llu",
  4131. pdev->stats.tx.tx_success.bytes);
  4132. DP_PRINT_STATS("Dropped:");
  4133. DP_PRINT_STATS(" Total = %d",
  4134. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4135. DP_PRINT_STATS(" Dma_map_error = %d",
  4136. pdev->stats.tx_i.dropped.dma_error);
  4137. DP_PRINT_STATS(" Ring Full = %d",
  4138. pdev->stats.tx_i.dropped.ring_full);
  4139. DP_PRINT_STATS(" Descriptor Not available = %d",
  4140. pdev->stats.tx_i.dropped.desc_na);
  4141. DP_PRINT_STATS(" HW enqueue failed= %d",
  4142. pdev->stats.tx_i.dropped.enqueue_fail);
  4143. DP_PRINT_STATS(" Resources Full = %d",
  4144. pdev->stats.tx_i.dropped.res_full);
  4145. DP_PRINT_STATS(" FW removed = %d",
  4146. pdev->stats.tx.dropped.fw_rem);
  4147. DP_PRINT_STATS(" FW removed transmitted = %d",
  4148. pdev->stats.tx.dropped.fw_rem_tx);
  4149. DP_PRINT_STATS(" FW removed untransmitted = %d",
  4150. pdev->stats.tx.dropped.fw_rem_notx);
  4151. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  4152. pdev->stats.tx.dropped.fw_reason1);
  4153. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  4154. pdev->stats.tx.dropped.fw_reason2);
  4155. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  4156. pdev->stats.tx.dropped.fw_reason3);
  4157. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  4158. pdev->stats.tx.dropped.age_out);
  4159. DP_PRINT_STATS("Scatter Gather:");
  4160. DP_PRINT_STATS(" Packets = %d",
  4161. pdev->stats.tx_i.sg.sg_pkt.num);
  4162. DP_PRINT_STATS(" Bytes = %llu",
  4163. pdev->stats.tx_i.sg.sg_pkt.bytes);
  4164. DP_PRINT_STATS(" Dropped By Host = %d",
  4165. pdev->stats.tx_i.sg.dropped_host);
  4166. DP_PRINT_STATS(" Dropped By Target = %d",
  4167. pdev->stats.tx_i.sg.dropped_target);
  4168. DP_PRINT_STATS("TSO:");
  4169. DP_PRINT_STATS(" Number of Segments = %d",
  4170. pdev->stats.tx_i.tso.num_seg);
  4171. DP_PRINT_STATS(" Packets = %d",
  4172. pdev->stats.tx_i.tso.tso_pkt.num);
  4173. DP_PRINT_STATS(" Bytes = %llu",
  4174. pdev->stats.tx_i.tso.tso_pkt.bytes);
  4175. DP_PRINT_STATS(" Dropped By Host = %d",
  4176. pdev->stats.tx_i.tso.dropped_host);
  4177. DP_PRINT_STATS("Mcast Enhancement:");
  4178. DP_PRINT_STATS(" Packets = %d",
  4179. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  4180. DP_PRINT_STATS(" Bytes = %llu",
  4181. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  4182. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  4183. pdev->stats.tx_i.mcast_en.dropped_map_error);
  4184. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  4185. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  4186. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  4187. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  4188. DP_PRINT_STATS(" Unicast sent = %d",
  4189. pdev->stats.tx_i.mcast_en.ucast);
  4190. DP_PRINT_STATS("Raw:");
  4191. DP_PRINT_STATS(" Packets = %d",
  4192. pdev->stats.tx_i.raw.raw_pkt.num);
  4193. DP_PRINT_STATS(" Bytes = %llu",
  4194. pdev->stats.tx_i.raw.raw_pkt.bytes);
  4195. DP_PRINT_STATS(" DMA map error = %d",
  4196. pdev->stats.tx_i.raw.dma_map_error);
  4197. DP_PRINT_STATS("Reinjected:");
  4198. DP_PRINT_STATS(" Packets = %d",
  4199. pdev->stats.tx_i.reinject_pkts.num);
  4200. DP_PRINT_STATS("Bytes = %llu\n",
  4201. pdev->stats.tx_i.reinject_pkts.bytes);
  4202. DP_PRINT_STATS("Inspected:");
  4203. DP_PRINT_STATS(" Packets = %d",
  4204. pdev->stats.tx_i.inspect_pkts.num);
  4205. DP_PRINT_STATS(" Bytes = %llu",
  4206. pdev->stats.tx_i.inspect_pkts.bytes);
  4207. DP_PRINT_STATS("Nawds Multicast:");
  4208. DP_PRINT_STATS(" Packets = %d",
  4209. pdev->stats.tx_i.nawds_mcast.num);
  4210. DP_PRINT_STATS(" Bytes = %llu",
  4211. pdev->stats.tx_i.nawds_mcast.bytes);
  4212. DP_PRINT_STATS("CCE Classified:");
  4213. DP_PRINT_STATS(" CCE Classified Packets: %u",
  4214. pdev->stats.tx_i.cce_classified);
  4215. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  4216. pdev->stats.tx_i.cce_classified_raw);
  4217. DP_PRINT_STATS("Mesh stats:");
  4218. DP_PRINT_STATS(" frames to firmware: %u",
  4219. pdev->stats.tx_i.mesh.exception_fw);
  4220. DP_PRINT_STATS(" completions from fw: %u",
  4221. pdev->stats.tx_i.mesh.completion_fw);
  4222. DP_PRINT_STATS("PPDU stats counter");
  4223. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  4224. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  4225. pdev->stats.ppdu_stats_counter[index]);
  4226. }
  4227. }
  4228. /**
  4229. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4230. * @pdev: DP_PDEV Handle
  4231. *
  4232. * Return: void
  4233. */
  4234. static inline void
  4235. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4236. {
  4237. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4238. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4239. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4240. pdev->stats.rx.rcvd_reo[0].num,
  4241. pdev->stats.rx.rcvd_reo[1].num,
  4242. pdev->stats.rx.rcvd_reo[2].num,
  4243. pdev->stats.rx.rcvd_reo[3].num);
  4244. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4245. pdev->stats.rx.rcvd_reo[0].bytes,
  4246. pdev->stats.rx.rcvd_reo[1].bytes,
  4247. pdev->stats.rx.rcvd_reo[2].bytes,
  4248. pdev->stats.rx.rcvd_reo[3].bytes);
  4249. DP_PRINT_STATS("Replenished:");
  4250. DP_PRINT_STATS(" Packets = %d",
  4251. pdev->stats.replenish.pkts.num);
  4252. DP_PRINT_STATS(" Bytes = %llu",
  4253. pdev->stats.replenish.pkts.bytes);
  4254. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  4255. pdev->stats.buf_freelist);
  4256. DP_PRINT_STATS(" Low threshold intr = %d",
  4257. pdev->stats.replenish.low_thresh_intrs);
  4258. DP_PRINT_STATS("Dropped:");
  4259. DP_PRINT_STATS(" msdu_not_done = %d",
  4260. pdev->stats.dropped.msdu_not_done);
  4261. DP_PRINT_STATS(" mon_rx_drop = %d",
  4262. pdev->stats.dropped.mon_rx_drop);
  4263. DP_PRINT_STATS("Sent To Stack:");
  4264. DP_PRINT_STATS(" Packets = %d",
  4265. pdev->stats.rx.to_stack.num);
  4266. DP_PRINT_STATS(" Bytes = %llu",
  4267. pdev->stats.rx.to_stack.bytes);
  4268. DP_PRINT_STATS("Multicast/Broadcast:");
  4269. DP_PRINT_STATS(" Packets = %d",
  4270. pdev->stats.rx.multicast.num);
  4271. DP_PRINT_STATS(" Bytes = %llu",
  4272. pdev->stats.rx.multicast.bytes);
  4273. DP_PRINT_STATS("Errors:");
  4274. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  4275. pdev->stats.replenish.rxdma_err);
  4276. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  4277. pdev->stats.err.desc_alloc_fail);
  4278. /* Get bar_recv_cnt */
  4279. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  4280. DP_PRINT_STATS("BAR Received Count: = %d",
  4281. pdev->stats.rx.bar_recv_cnt);
  4282. }
  4283. /**
  4284. * dp_print_soc_tx_stats(): Print SOC level stats
  4285. * @soc DP_SOC Handle
  4286. *
  4287. * Return: void
  4288. */
  4289. static inline void
  4290. dp_print_soc_tx_stats(struct dp_soc *soc)
  4291. {
  4292. DP_PRINT_STATS("SOC Tx Stats:\n");
  4293. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  4294. soc->stats.tx.desc_in_use);
  4295. DP_PRINT_STATS("Invalid peer:");
  4296. DP_PRINT_STATS(" Packets = %d",
  4297. soc->stats.tx.tx_invalid_peer.num);
  4298. DP_PRINT_STATS(" Bytes = %llu",
  4299. soc->stats.tx.tx_invalid_peer.bytes);
  4300. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  4301. soc->stats.tx.tcl_ring_full[0],
  4302. soc->stats.tx.tcl_ring_full[1],
  4303. soc->stats.tx.tcl_ring_full[2]);
  4304. }
  4305. /**
  4306. * dp_print_soc_rx_stats: Print SOC level Rx stats
  4307. * @soc: DP_SOC Handle
  4308. *
  4309. * Return:void
  4310. */
  4311. static inline void
  4312. dp_print_soc_rx_stats(struct dp_soc *soc)
  4313. {
  4314. uint32_t i;
  4315. char reo_error[DP_REO_ERR_LENGTH];
  4316. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  4317. uint8_t index = 0;
  4318. DP_PRINT_STATS("SOC Rx Stats:\n");
  4319. DP_PRINT_STATS("Errors:\n");
  4320. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  4321. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  4322. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  4323. DP_PRINT_STATS("Invalid RBM = %d",
  4324. soc->stats.rx.err.invalid_rbm);
  4325. DP_PRINT_STATS("Invalid Vdev = %d",
  4326. soc->stats.rx.err.invalid_vdev);
  4327. DP_PRINT_STATS("Invalid Pdev = %d",
  4328. soc->stats.rx.err.invalid_pdev);
  4329. DP_PRINT_STATS("Invalid Peer = %d",
  4330. soc->stats.rx.err.rx_invalid_peer.num);
  4331. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  4332. soc->stats.rx.err.hal_ring_access_fail);
  4333. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  4334. index += qdf_snprint(&rxdma_error[index],
  4335. DP_RXDMA_ERR_LENGTH - index,
  4336. " %d", soc->stats.rx.err.rxdma_error[i]);
  4337. }
  4338. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  4339. rxdma_error);
  4340. index = 0;
  4341. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  4342. index += qdf_snprint(&reo_error[index],
  4343. DP_REO_ERR_LENGTH - index,
  4344. " %d", soc->stats.rx.err.reo_error[i]);
  4345. }
  4346. DP_PRINT_STATS("REO Error(0-14):%s",
  4347. reo_error);
  4348. }
  4349. /**
  4350. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  4351. * @soc: DP_SOC handle
  4352. * @srng: DP_SRNG handle
  4353. * @ring_name: SRNG name
  4354. *
  4355. * Return: void
  4356. */
  4357. static inline void
  4358. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  4359. char *ring_name)
  4360. {
  4361. uint32_t tailp;
  4362. uint32_t headp;
  4363. if (srng->hal_srng != NULL) {
  4364. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4365. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4366. ring_name, headp, tailp);
  4367. }
  4368. }
  4369. /**
  4370. * dp_print_ring_stats(): Print tail and head pointer
  4371. * @pdev: DP_PDEV handle
  4372. *
  4373. * Return:void
  4374. */
  4375. static inline void
  4376. dp_print_ring_stats(struct dp_pdev *pdev)
  4377. {
  4378. uint32_t i;
  4379. char ring_name[STR_MAXLEN + 1];
  4380. int mac_id;
  4381. dp_print_ring_stat_from_hal(pdev->soc,
  4382. &pdev->soc->reo_exception_ring,
  4383. "Reo Exception Ring");
  4384. dp_print_ring_stat_from_hal(pdev->soc,
  4385. &pdev->soc->reo_reinject_ring,
  4386. "Reo Inject Ring");
  4387. dp_print_ring_stat_from_hal(pdev->soc,
  4388. &pdev->soc->reo_cmd_ring,
  4389. "Reo Command Ring");
  4390. dp_print_ring_stat_from_hal(pdev->soc,
  4391. &pdev->soc->reo_status_ring,
  4392. "Reo Status Ring");
  4393. dp_print_ring_stat_from_hal(pdev->soc,
  4394. &pdev->soc->rx_rel_ring,
  4395. "Rx Release ring");
  4396. dp_print_ring_stat_from_hal(pdev->soc,
  4397. &pdev->soc->tcl_cmd_ring,
  4398. "Tcl command Ring");
  4399. dp_print_ring_stat_from_hal(pdev->soc,
  4400. &pdev->soc->tcl_status_ring,
  4401. "Tcl Status Ring");
  4402. dp_print_ring_stat_from_hal(pdev->soc,
  4403. &pdev->soc->wbm_desc_rel_ring,
  4404. "Wbm Desc Rel Ring");
  4405. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4406. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4407. dp_print_ring_stat_from_hal(pdev->soc,
  4408. &pdev->soc->reo_dest_ring[i],
  4409. ring_name);
  4410. }
  4411. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4412. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4413. dp_print_ring_stat_from_hal(pdev->soc,
  4414. &pdev->soc->tcl_data_ring[i],
  4415. ring_name);
  4416. }
  4417. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4418. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4419. dp_print_ring_stat_from_hal(pdev->soc,
  4420. &pdev->soc->tx_comp_ring[i],
  4421. ring_name);
  4422. }
  4423. dp_print_ring_stat_from_hal(pdev->soc,
  4424. &pdev->rx_refill_buf_ring,
  4425. "Rx Refill Buf Ring");
  4426. dp_print_ring_stat_from_hal(pdev->soc,
  4427. &pdev->rx_refill_buf_ring2,
  4428. "Second Rx Refill Buf Ring");
  4429. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4430. dp_print_ring_stat_from_hal(pdev->soc,
  4431. &pdev->rxdma_mon_buf_ring[mac_id],
  4432. "Rxdma Mon Buf Ring");
  4433. dp_print_ring_stat_from_hal(pdev->soc,
  4434. &pdev->rxdma_mon_dst_ring[mac_id],
  4435. "Rxdma Mon Dst Ring");
  4436. dp_print_ring_stat_from_hal(pdev->soc,
  4437. &pdev->rxdma_mon_status_ring[mac_id],
  4438. "Rxdma Mon Status Ring");
  4439. dp_print_ring_stat_from_hal(pdev->soc,
  4440. &pdev->rxdma_mon_desc_ring[mac_id],
  4441. "Rxdma mon desc Ring");
  4442. }
  4443. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4444. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4445. dp_print_ring_stat_from_hal(pdev->soc,
  4446. &pdev->rxdma_err_dst_ring[i],
  4447. ring_name);
  4448. }
  4449. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4450. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4451. dp_print_ring_stat_from_hal(pdev->soc,
  4452. &pdev->rx_mac_buf_ring[i],
  4453. ring_name);
  4454. }
  4455. }
  4456. /**
  4457. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4458. * @vdev: DP_VDEV handle
  4459. *
  4460. * Return:void
  4461. */
  4462. static inline void
  4463. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4464. {
  4465. struct dp_peer *peer = NULL;
  4466. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4467. DP_STATS_CLR(vdev->pdev);
  4468. DP_STATS_CLR(vdev->pdev->soc);
  4469. DP_STATS_CLR(vdev);
  4470. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4471. if (!peer)
  4472. return;
  4473. DP_STATS_CLR(peer);
  4474. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4475. soc->cdp_soc.ol_ops->update_dp_stats(
  4476. vdev->pdev->osif_pdev,
  4477. &peer->stats,
  4478. peer->peer_ids[0],
  4479. UPDATE_PEER_STATS);
  4480. }
  4481. }
  4482. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4483. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4484. &vdev->stats, (uint16_t)vdev->vdev_id,
  4485. UPDATE_VDEV_STATS);
  4486. }
  4487. /**
  4488. * dp_print_rx_rates(): Print Rx rate stats
  4489. * @vdev: DP_VDEV handle
  4490. *
  4491. * Return:void
  4492. */
  4493. static inline void
  4494. dp_print_rx_rates(struct dp_vdev *vdev)
  4495. {
  4496. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4497. uint8_t i, mcs, pkt_type;
  4498. uint8_t index = 0;
  4499. char nss[DP_NSS_LENGTH];
  4500. DP_PRINT_STATS("Rx Rate Info:\n");
  4501. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4502. index = 0;
  4503. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4504. if (!dp_rate_string[pkt_type][mcs].valid)
  4505. continue;
  4506. DP_PRINT_STATS(" %s = %d",
  4507. dp_rate_string[pkt_type][mcs].mcs_type,
  4508. pdev->stats.rx.pkt_type[pkt_type].
  4509. mcs_count[mcs]);
  4510. }
  4511. DP_PRINT_STATS("\n");
  4512. }
  4513. index = 0;
  4514. for (i = 0; i < SS_COUNT; i++) {
  4515. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4516. " %d", pdev->stats.rx.nss[i]);
  4517. }
  4518. DP_PRINT_STATS("NSS(1-8) = %s",
  4519. nss);
  4520. DP_PRINT_STATS("SGI ="
  4521. " 0.8us %d,"
  4522. " 0.4us %d,"
  4523. " 1.6us %d,"
  4524. " 3.2us %d,",
  4525. pdev->stats.rx.sgi_count[0],
  4526. pdev->stats.rx.sgi_count[1],
  4527. pdev->stats.rx.sgi_count[2],
  4528. pdev->stats.rx.sgi_count[3]);
  4529. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4530. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4531. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4532. DP_PRINT_STATS("Reception Type ="
  4533. " SU: %d,"
  4534. " MU_MIMO:%d,"
  4535. " MU_OFDMA:%d,"
  4536. " MU_OFDMA_MIMO:%d\n",
  4537. pdev->stats.rx.reception_type[0],
  4538. pdev->stats.rx.reception_type[1],
  4539. pdev->stats.rx.reception_type[2],
  4540. pdev->stats.rx.reception_type[3]);
  4541. DP_PRINT_STATS("Aggregation:\n");
  4542. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4543. pdev->stats.rx.ampdu_cnt);
  4544. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4545. pdev->stats.rx.non_ampdu_cnt);
  4546. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4547. pdev->stats.rx.amsdu_cnt);
  4548. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4549. pdev->stats.rx.non_amsdu_cnt);
  4550. }
  4551. /**
  4552. * dp_print_tx_rates(): Print tx rates
  4553. * @vdev: DP_VDEV handle
  4554. *
  4555. * Return:void
  4556. */
  4557. static inline void
  4558. dp_print_tx_rates(struct dp_vdev *vdev)
  4559. {
  4560. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4561. uint8_t mcs, pkt_type;
  4562. uint32_t index;
  4563. DP_PRINT_STATS("Tx Rate Info:\n");
  4564. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4565. index = 0;
  4566. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4567. if (!dp_rate_string[pkt_type][mcs].valid)
  4568. continue;
  4569. DP_PRINT_STATS(" %s = %d",
  4570. dp_rate_string[pkt_type][mcs].mcs_type,
  4571. pdev->stats.tx.pkt_type[pkt_type].
  4572. mcs_count[mcs]);
  4573. }
  4574. DP_PRINT_STATS("\n");
  4575. }
  4576. DP_PRINT_STATS("SGI ="
  4577. " 0.8us %d"
  4578. " 0.4us %d"
  4579. " 1.6us %d"
  4580. " 3.2us %d",
  4581. pdev->stats.tx.sgi_count[0],
  4582. pdev->stats.tx.sgi_count[1],
  4583. pdev->stats.tx.sgi_count[2],
  4584. pdev->stats.tx.sgi_count[3]);
  4585. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4586. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3],
  4587. pdev->stats.tx.bw[4], pdev->stats.tx.bw[5]);
  4588. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4589. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4590. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4591. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4592. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4593. DP_PRINT_STATS("Aggregation:\n");
  4594. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4595. pdev->stats.tx.amsdu_cnt);
  4596. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4597. pdev->stats.tx.non_amsdu_cnt);
  4598. }
  4599. /**
  4600. * dp_print_peer_stats():print peer stats
  4601. * @peer: DP_PEER handle
  4602. *
  4603. * return void
  4604. */
  4605. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4606. {
  4607. uint8_t i, mcs, pkt_type;
  4608. uint32_t index;
  4609. char nss[DP_NSS_LENGTH];
  4610. DP_PRINT_STATS("Node Tx Stats:\n");
  4611. DP_PRINT_STATS("Total Packet Completions = %d",
  4612. peer->stats.tx.comp_pkt.num);
  4613. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4614. peer->stats.tx.comp_pkt.bytes);
  4615. DP_PRINT_STATS("Success Packets = %d",
  4616. peer->stats.tx.tx_success.num);
  4617. DP_PRINT_STATS("Success Bytes = %llu",
  4618. peer->stats.tx.tx_success.bytes);
  4619. DP_PRINT_STATS("Unicast Success Packets = %d",
  4620. peer->stats.tx.ucast.num);
  4621. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4622. peer->stats.tx.ucast.bytes);
  4623. DP_PRINT_STATS("Multicast Success Packets = %d",
  4624. peer->stats.tx.mcast.num);
  4625. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4626. peer->stats.tx.mcast.bytes);
  4627. DP_PRINT_STATS("Broadcast Success Packets = %d",
  4628. peer->stats.tx.bcast.num);
  4629. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  4630. peer->stats.tx.bcast.bytes);
  4631. DP_PRINT_STATS("Packets Failed = %d",
  4632. peer->stats.tx.tx_failed);
  4633. DP_PRINT_STATS("Packets In OFDMA = %d",
  4634. peer->stats.tx.ofdma);
  4635. DP_PRINT_STATS("Packets In STBC = %d",
  4636. peer->stats.tx.stbc);
  4637. DP_PRINT_STATS("Packets In LDPC = %d",
  4638. peer->stats.tx.ldpc);
  4639. DP_PRINT_STATS("Packet Retries = %d",
  4640. peer->stats.tx.retries);
  4641. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4642. peer->stats.tx.amsdu_cnt);
  4643. DP_PRINT_STATS("Last Packet RSSI = %d",
  4644. peer->stats.tx.last_ack_rssi);
  4645. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4646. peer->stats.tx.dropped.fw_rem);
  4647. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4648. peer->stats.tx.dropped.fw_rem_tx);
  4649. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4650. peer->stats.tx.dropped.fw_rem_notx);
  4651. DP_PRINT_STATS("Dropped : Age Out = %d",
  4652. peer->stats.tx.dropped.age_out);
  4653. DP_PRINT_STATS("NAWDS : ");
  4654. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4655. peer->stats.tx.nawds_mcast_drop);
  4656. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4657. peer->stats.tx.nawds_mcast.num);
  4658. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4659. peer->stats.tx.nawds_mcast.bytes);
  4660. DP_PRINT_STATS("Rate Info:");
  4661. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4662. index = 0;
  4663. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4664. if (!dp_rate_string[pkt_type][mcs].valid)
  4665. continue;
  4666. DP_PRINT_STATS(" %s = %d",
  4667. dp_rate_string[pkt_type][mcs].mcs_type,
  4668. peer->stats.tx.pkt_type[pkt_type].
  4669. mcs_count[mcs]);
  4670. }
  4671. DP_PRINT_STATS("\n");
  4672. }
  4673. DP_PRINT_STATS("SGI = "
  4674. " 0.8us %d"
  4675. " 0.4us %d"
  4676. " 1.6us %d"
  4677. " 3.2us %d",
  4678. peer->stats.tx.sgi_count[0],
  4679. peer->stats.tx.sgi_count[1],
  4680. peer->stats.tx.sgi_count[2],
  4681. peer->stats.tx.sgi_count[3]);
  4682. DP_PRINT_STATS("Excess Retries per AC ");
  4683. DP_PRINT_STATS(" Best effort = %d",
  4684. peer->stats.tx.excess_retries_per_ac[0]);
  4685. DP_PRINT_STATS(" Background= %d",
  4686. peer->stats.tx.excess_retries_per_ac[1]);
  4687. DP_PRINT_STATS(" Video = %d",
  4688. peer->stats.tx.excess_retries_per_ac[2]);
  4689. DP_PRINT_STATS(" Voice = %d",
  4690. peer->stats.tx.excess_retries_per_ac[3]);
  4691. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4692. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4693. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4694. index = 0;
  4695. for (i = 0; i < SS_COUNT; i++) {
  4696. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4697. " %d", peer->stats.tx.nss[i]);
  4698. }
  4699. DP_PRINT_STATS("NSS(1-8) = %s",
  4700. nss);
  4701. DP_PRINT_STATS("Aggregation:");
  4702. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4703. peer->stats.tx.amsdu_cnt);
  4704. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4705. peer->stats.tx.non_amsdu_cnt);
  4706. DP_PRINT_STATS("Node Rx Stats:");
  4707. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4708. peer->stats.rx.to_stack.num);
  4709. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4710. peer->stats.rx.to_stack.bytes);
  4711. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4712. DP_PRINT_STATS("Ring Id = %d", i);
  4713. DP_PRINT_STATS(" Packets Received = %d",
  4714. peer->stats.rx.rcvd_reo[i].num);
  4715. DP_PRINT_STATS(" Bytes Received = %llu",
  4716. peer->stats.rx.rcvd_reo[i].bytes);
  4717. }
  4718. DP_PRINT_STATS("Multicast Packets Received = %d",
  4719. peer->stats.rx.multicast.num);
  4720. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  4721. peer->stats.rx.multicast.bytes);
  4722. DP_PRINT_STATS("Broadcast Packets Received = %d",
  4723. peer->stats.rx.bcast.num);
  4724. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  4725. peer->stats.rx.bcast.bytes);
  4726. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  4727. peer->stats.rx.intra_bss.pkts.num);
  4728. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  4729. peer->stats.rx.intra_bss.pkts.bytes);
  4730. DP_PRINT_STATS("Raw Packets Received = %d",
  4731. peer->stats.rx.raw.num);
  4732. DP_PRINT_STATS("Raw Bytes Received = %llu",
  4733. peer->stats.rx.raw.bytes);
  4734. DP_PRINT_STATS("Errors: MIC Errors = %d",
  4735. peer->stats.rx.err.mic_err);
  4736. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  4737. peer->stats.rx.err.decrypt_err);
  4738. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  4739. peer->stats.rx.non_ampdu_cnt);
  4740. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  4741. peer->stats.rx.ampdu_cnt);
  4742. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  4743. peer->stats.rx.non_amsdu_cnt);
  4744. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  4745. peer->stats.rx.amsdu_cnt);
  4746. DP_PRINT_STATS("NAWDS : ");
  4747. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  4748. peer->stats.rx.nawds_mcast_drop.num);
  4749. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet Bytes = %llu",
  4750. peer->stats.rx.nawds_mcast_drop.bytes);
  4751. DP_PRINT_STATS("SGI ="
  4752. " 0.8us %d"
  4753. " 0.4us %d"
  4754. " 1.6us %d"
  4755. " 3.2us %d",
  4756. peer->stats.rx.sgi_count[0],
  4757. peer->stats.rx.sgi_count[1],
  4758. peer->stats.rx.sgi_count[2],
  4759. peer->stats.rx.sgi_count[3]);
  4760. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  4761. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  4762. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  4763. DP_PRINT_STATS("Reception Type ="
  4764. " SU %d,"
  4765. " MU_MIMO %d,"
  4766. " MU_OFDMA %d,"
  4767. " MU_OFDMA_MIMO %d",
  4768. peer->stats.rx.reception_type[0],
  4769. peer->stats.rx.reception_type[1],
  4770. peer->stats.rx.reception_type[2],
  4771. peer->stats.rx.reception_type[3]);
  4772. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4773. index = 0;
  4774. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4775. if (!dp_rate_string[pkt_type][mcs].valid)
  4776. continue;
  4777. DP_PRINT_STATS(" %s = %d",
  4778. dp_rate_string[pkt_type][mcs].mcs_type,
  4779. peer->stats.rx.pkt_type[pkt_type].
  4780. mcs_count[mcs]);
  4781. }
  4782. DP_PRINT_STATS("\n");
  4783. }
  4784. index = 0;
  4785. for (i = 0; i < SS_COUNT; i++) {
  4786. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4787. " %d", peer->stats.rx.nss[i]);
  4788. }
  4789. DP_PRINT_STATS("NSS(1-8) = %s",
  4790. nss);
  4791. DP_PRINT_STATS("Aggregation:");
  4792. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  4793. peer->stats.rx.ampdu_cnt);
  4794. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  4795. peer->stats.rx.non_ampdu_cnt);
  4796. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  4797. peer->stats.rx.amsdu_cnt);
  4798. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  4799. peer->stats.rx.non_amsdu_cnt);
  4800. }
  4801. /**
  4802. * dp_print_host_stats()- Function to print the stats aggregated at host
  4803. * @vdev_handle: DP_VDEV handle
  4804. * @type: host stats type
  4805. *
  4806. * Available Stat types
  4807. * TXRX_CLEAR_STATS : Clear the stats
  4808. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  4809. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  4810. * TXRX_TX_HOST_STATS: Print Tx Stats
  4811. * TXRX_RX_HOST_STATS: Print Rx Stats
  4812. * TXRX_AST_STATS: Print AST Stats
  4813. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  4814. *
  4815. * Return: 0 on success, print error message in case of failure
  4816. */
  4817. static int
  4818. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  4819. {
  4820. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4821. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4822. dp_aggregate_pdev_stats(pdev);
  4823. switch (type) {
  4824. case TXRX_CLEAR_STATS:
  4825. dp_txrx_host_stats_clr(vdev);
  4826. break;
  4827. case TXRX_RX_RATE_STATS:
  4828. dp_print_rx_rates(vdev);
  4829. break;
  4830. case TXRX_TX_RATE_STATS:
  4831. dp_print_tx_rates(vdev);
  4832. break;
  4833. case TXRX_TX_HOST_STATS:
  4834. dp_print_pdev_tx_stats(pdev);
  4835. dp_print_soc_tx_stats(pdev->soc);
  4836. break;
  4837. case TXRX_RX_HOST_STATS:
  4838. dp_print_pdev_rx_stats(pdev);
  4839. dp_print_soc_rx_stats(pdev->soc);
  4840. break;
  4841. case TXRX_AST_STATS:
  4842. dp_print_ast_stats(pdev->soc);
  4843. break;
  4844. case TXRX_SRNG_PTR_STATS:
  4845. dp_print_ring_stats(pdev);
  4846. break;
  4847. default:
  4848. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  4849. break;
  4850. }
  4851. return 0;
  4852. }
  4853. /*
  4854. * dp_get_host_peer_stats()- function to print peer stats
  4855. * @pdev_handle: DP_PDEV handle
  4856. * @mac_addr: mac address of the peer
  4857. *
  4858. * Return: void
  4859. */
  4860. static void
  4861. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  4862. {
  4863. struct dp_peer *peer;
  4864. uint8_t local_id;
  4865. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  4866. &local_id);
  4867. if (!peer) {
  4868. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4869. "%s: Invalid peer\n", __func__);
  4870. return;
  4871. }
  4872. dp_print_peer_stats(peer);
  4873. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  4874. return;
  4875. }
  4876. /*
  4877. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  4878. * @pdev: DP_PDEV handle
  4879. *
  4880. * Return: void
  4881. */
  4882. static void
  4883. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  4884. {
  4885. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4886. int mac_id;
  4887. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4888. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4889. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4890. pdev->pdev_id);
  4891. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  4892. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4893. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4894. }
  4895. }
  4896. /*
  4897. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  4898. * @pdev: DP_PDEV handle
  4899. *
  4900. * Return: void
  4901. */
  4902. static void
  4903. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  4904. {
  4905. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  4906. int mac_id;
  4907. htt_tlv_filter.mpdu_start = 0;
  4908. htt_tlv_filter.msdu_start = 0;
  4909. htt_tlv_filter.packet = 0;
  4910. htt_tlv_filter.msdu_end = 0;
  4911. htt_tlv_filter.mpdu_end = 0;
  4912. htt_tlv_filter.packet_header = 1;
  4913. htt_tlv_filter.attention = 1;
  4914. htt_tlv_filter.ppdu_start = 1;
  4915. htt_tlv_filter.ppdu_end = 1;
  4916. htt_tlv_filter.ppdu_end_user_stats = 1;
  4917. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4918. htt_tlv_filter.ppdu_end_status_done = 1;
  4919. htt_tlv_filter.enable_fp = 1;
  4920. htt_tlv_filter.enable_md = 0;
  4921. if (pdev->mcopy_mode)
  4922. htt_tlv_filter.enable_mo = 1;
  4923. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4924. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4925. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4926. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4927. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4928. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4929. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4930. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4931. pdev->pdev_id);
  4932. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  4933. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4934. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4935. }
  4936. }
  4937. /*
  4938. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  4939. * @pdev_handle: DP_PDEV handle
  4940. * @val: user provided value
  4941. *
  4942. * Return: void
  4943. */
  4944. static void
  4945. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  4946. {
  4947. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4948. switch (val) {
  4949. case 0:
  4950. pdev->tx_sniffer_enable = 0;
  4951. pdev->mcopy_mode = 0;
  4952. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en) {
  4953. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4954. dp_ppdu_ring_reset(pdev);
  4955. } else if (pdev->enhanced_stats_en) {
  4956. dp_h2t_cfg_stats_msg_send(pdev,
  4957. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  4958. }
  4959. break;
  4960. case 1:
  4961. pdev->tx_sniffer_enable = 1;
  4962. pdev->mcopy_mode = 0;
  4963. if (!pdev->pktlog_ppdu_stats)
  4964. dp_h2t_cfg_stats_msg_send(pdev,
  4965. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  4966. break;
  4967. case 2:
  4968. pdev->mcopy_mode = 1;
  4969. pdev->tx_sniffer_enable = 0;
  4970. if (!pdev->enhanced_stats_en)
  4971. dp_ppdu_ring_cfg(pdev);
  4972. if (!pdev->pktlog_ppdu_stats)
  4973. dp_h2t_cfg_stats_msg_send(pdev,
  4974. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  4975. break;
  4976. default:
  4977. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4978. "Invalid value\n");
  4979. break;
  4980. }
  4981. }
  4982. /*
  4983. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  4984. * @pdev_handle: DP_PDEV handle
  4985. *
  4986. * Return: void
  4987. */
  4988. static void
  4989. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4990. {
  4991. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4992. pdev->enhanced_stats_en = 1;
  4993. if (!pdev->mcopy_mode)
  4994. dp_ppdu_ring_cfg(pdev);
  4995. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4996. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  4997. }
  4998. /*
  4999. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  5000. * @pdev_handle: DP_PDEV handle
  5001. *
  5002. * Return: void
  5003. */
  5004. static void
  5005. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5006. {
  5007. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5008. pdev->enhanced_stats_en = 0;
  5009. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5010. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5011. if (!pdev->mcopy_mode)
  5012. dp_ppdu_ring_reset(pdev);
  5013. }
  5014. /*
  5015. * dp_get_fw_peer_stats()- function to print peer stats
  5016. * @pdev_handle: DP_PDEV handle
  5017. * @mac_addr: mac address of the peer
  5018. * @cap: Type of htt stats requested
  5019. *
  5020. * Currently Supporting only MAC ID based requests Only
  5021. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  5022. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  5023. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  5024. *
  5025. * Return: void
  5026. */
  5027. static void
  5028. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  5029. uint32_t cap)
  5030. {
  5031. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5032. int i;
  5033. uint32_t config_param0 = 0;
  5034. uint32_t config_param1 = 0;
  5035. uint32_t config_param2 = 0;
  5036. uint32_t config_param3 = 0;
  5037. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  5038. config_param0 |= (1 << (cap + 1));
  5039. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  5040. config_param1 |= (1 << i);
  5041. }
  5042. config_param2 |= (mac_addr[0] & 0x000000ff);
  5043. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  5044. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  5045. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  5046. config_param3 |= (mac_addr[4] & 0x000000ff);
  5047. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  5048. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  5049. config_param0, config_param1, config_param2,
  5050. config_param3, 0, 0, 0);
  5051. }
  5052. /* This struct definition will be removed from here
  5053. * once it get added in FW headers*/
  5054. struct httstats_cmd_req {
  5055. uint32_t config_param0;
  5056. uint32_t config_param1;
  5057. uint32_t config_param2;
  5058. uint32_t config_param3;
  5059. int cookie;
  5060. u_int8_t stats_id;
  5061. };
  5062. /*
  5063. * dp_get_htt_stats: function to process the httstas request
  5064. * @pdev_handle: DP pdev handle
  5065. * @data: pointer to request data
  5066. * @data_len: length for request data
  5067. *
  5068. * return: void
  5069. */
  5070. static void
  5071. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  5072. {
  5073. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5074. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  5075. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  5076. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  5077. req->config_param0, req->config_param1,
  5078. req->config_param2, req->config_param3,
  5079. req->cookie, 0, 0);
  5080. }
  5081. /*
  5082. * dp_set_pdev_param: function to set parameters in pdev
  5083. * @pdev_handle: DP pdev handle
  5084. * @param: parameter type to be set
  5085. * @val: value of parameter to be set
  5086. *
  5087. * return: void
  5088. */
  5089. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  5090. enum cdp_pdev_param_type param, uint8_t val)
  5091. {
  5092. switch (param) {
  5093. case CDP_CONFIG_DEBUG_SNIFFER:
  5094. dp_config_debug_sniffer(pdev_handle, val);
  5095. break;
  5096. default:
  5097. break;
  5098. }
  5099. }
  5100. /*
  5101. * dp_set_vdev_param: function to set parameters in vdev
  5102. * @param: parameter type to be set
  5103. * @val: value of parameter to be set
  5104. *
  5105. * return: void
  5106. */
  5107. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  5108. enum cdp_vdev_param_type param, uint32_t val)
  5109. {
  5110. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5111. switch (param) {
  5112. case CDP_ENABLE_WDS:
  5113. vdev->wds_enabled = val;
  5114. break;
  5115. case CDP_ENABLE_NAWDS:
  5116. vdev->nawds_enabled = val;
  5117. break;
  5118. case CDP_ENABLE_MCAST_EN:
  5119. vdev->mcast_enhancement_en = val;
  5120. break;
  5121. case CDP_ENABLE_PROXYSTA:
  5122. vdev->proxysta_vdev = val;
  5123. break;
  5124. case CDP_UPDATE_TDLS_FLAGS:
  5125. vdev->tdls_link_connected = val;
  5126. break;
  5127. case CDP_CFG_WDS_AGING_TIMER:
  5128. if (val == 0)
  5129. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  5130. else if (val != vdev->wds_aging_timer_val)
  5131. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  5132. vdev->wds_aging_timer_val = val;
  5133. break;
  5134. case CDP_ENABLE_AP_BRIDGE:
  5135. if (wlan_op_mode_sta != vdev->opmode)
  5136. vdev->ap_bridge_enabled = val;
  5137. else
  5138. vdev->ap_bridge_enabled = false;
  5139. break;
  5140. case CDP_ENABLE_CIPHER:
  5141. vdev->sec_type = val;
  5142. break;
  5143. case CDP_ENABLE_QWRAP_ISOLATION:
  5144. vdev->isolation_vdev = val;
  5145. break;
  5146. default:
  5147. break;
  5148. }
  5149. dp_tx_vdev_update_search_flags(vdev);
  5150. }
  5151. /**
  5152. * dp_peer_set_nawds: set nawds bit in peer
  5153. * @peer_handle: pointer to peer
  5154. * @value: enable/disable nawds
  5155. *
  5156. * return: void
  5157. */
  5158. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  5159. {
  5160. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5161. peer->nawds_enabled = value;
  5162. }
  5163. /*
  5164. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  5165. * @vdev_handle: DP_VDEV handle
  5166. * @map_id:ID of map that needs to be updated
  5167. *
  5168. * Return: void
  5169. */
  5170. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  5171. uint8_t map_id)
  5172. {
  5173. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5174. vdev->dscp_tid_map_id = map_id;
  5175. return;
  5176. }
  5177. /*
  5178. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  5179. * @pdev_handle: DP_PDEV handle
  5180. * @buf: to hold pdev_stats
  5181. *
  5182. * Return: int
  5183. */
  5184. static int
  5185. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  5186. {
  5187. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5188. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  5189. struct cdp_txrx_stats_req req = {0,};
  5190. dp_aggregate_pdev_stats(pdev);
  5191. req.stats = HTT_DBG_EXT_STATS_PDEV_TX;
  5192. req.cookie_val = 1;
  5193. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5194. req.param1, req.param2, req.param3, 0,
  5195. req.cookie_val, 0);
  5196. msleep(DP_MAX_SLEEP_TIME);
  5197. req.stats = HTT_DBG_EXT_STATS_PDEV_RX;
  5198. req.cookie_val = 1;
  5199. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5200. req.param1, req.param2, req.param3, 0,
  5201. req.cookie_val, 0);
  5202. msleep(DP_MAX_SLEEP_TIME);
  5203. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  5204. return TXRX_STATS_LEVEL;
  5205. }
  5206. /**
  5207. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  5208. * @pdev: DP_PDEV handle
  5209. * @map_id: ID of map that needs to be updated
  5210. * @tos: index value in map
  5211. * @tid: tid value passed by the user
  5212. *
  5213. * Return: void
  5214. */
  5215. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  5216. uint8_t map_id, uint8_t tos, uint8_t tid)
  5217. {
  5218. uint8_t dscp;
  5219. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  5220. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  5221. pdev->dscp_tid_map[map_id][dscp] = tid;
  5222. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  5223. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  5224. map_id, dscp);
  5225. return;
  5226. }
  5227. /**
  5228. * dp_fw_stats_process(): Process TxRX FW stats request
  5229. * @vdev_handle: DP VDEV handle
  5230. * @req: stats request
  5231. *
  5232. * return: int
  5233. */
  5234. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  5235. struct cdp_txrx_stats_req *req)
  5236. {
  5237. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5238. struct dp_pdev *pdev = NULL;
  5239. uint32_t stats = req->stats;
  5240. uint8_t channel = req->channel;
  5241. if (!vdev) {
  5242. DP_TRACE(NONE, "VDEV not found");
  5243. return 1;
  5244. }
  5245. pdev = vdev->pdev;
  5246. /*
  5247. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  5248. * from param0 to param3 according to below rule:
  5249. *
  5250. * PARAM:
  5251. * - config_param0 : start_offset (stats type)
  5252. * - config_param1 : stats bmask from start offset
  5253. * - config_param2 : stats bmask from start offset + 32
  5254. * - config_param3 : stats bmask from start offset + 64
  5255. */
  5256. if (req->stats == CDP_TXRX_STATS_0) {
  5257. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  5258. req->param1 = 0xFFFFFFFF;
  5259. req->param2 = 0xFFFFFFFF;
  5260. req->param3 = 0xFFFFFFFF;
  5261. }
  5262. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  5263. req->param1, req->param2, req->param3,
  5264. 0, 0, channel);
  5265. }
  5266. /**
  5267. * dp_txrx_stats_request - function to map to firmware and host stats
  5268. * @vdev: virtual handle
  5269. * @req: stats request
  5270. *
  5271. * Return: integer
  5272. */
  5273. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  5274. struct cdp_txrx_stats_req *req)
  5275. {
  5276. int host_stats;
  5277. int fw_stats;
  5278. enum cdp_stats stats;
  5279. if (!vdev || !req) {
  5280. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5281. "Invalid vdev/req instance");
  5282. return 0;
  5283. }
  5284. stats = req->stats;
  5285. if (stats >= CDP_TXRX_MAX_STATS)
  5286. return 0;
  5287. /*
  5288. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  5289. * has to be updated if new FW HTT stats added
  5290. */
  5291. if (stats > CDP_TXRX_STATS_HTT_MAX)
  5292. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  5293. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  5294. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  5295. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5296. "stats: %u fw_stats_type: %d host_stats_type: %d",
  5297. stats, fw_stats, host_stats);
  5298. if (fw_stats != TXRX_FW_STATS_INVALID) {
  5299. /* update request with FW stats type */
  5300. req->stats = fw_stats;
  5301. return dp_fw_stats_process(vdev, req);
  5302. }
  5303. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  5304. (host_stats <= TXRX_HOST_STATS_MAX))
  5305. return dp_print_host_stats(vdev, host_stats);
  5306. else
  5307. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5308. "Wrong Input for TxRx Stats");
  5309. return 0;
  5310. }
  5311. /*
  5312. * dp_print_napi_stats(): NAPI stats
  5313. * @soc - soc handle
  5314. */
  5315. static void dp_print_napi_stats(struct dp_soc *soc)
  5316. {
  5317. hif_print_napi_stats(soc->hif_handle);
  5318. }
  5319. /*
  5320. * dp_print_per_ring_stats(): Packet count per ring
  5321. * @soc - soc handle
  5322. */
  5323. static void dp_print_per_ring_stats(struct dp_soc *soc)
  5324. {
  5325. uint8_t ring;
  5326. uint16_t core;
  5327. uint64_t total_packets;
  5328. DP_TRACE(FATAL, "Reo packets per ring:");
  5329. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  5330. total_packets = 0;
  5331. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  5332. for (core = 0; core < NR_CPUS; core++) {
  5333. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  5334. core, soc->stats.rx.ring_packets[core][ring]);
  5335. total_packets += soc->stats.rx.ring_packets[core][ring];
  5336. }
  5337. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  5338. ring, total_packets);
  5339. }
  5340. }
  5341. /*
  5342. * dp_txrx_path_stats() - Function to display dump stats
  5343. * @soc - soc handle
  5344. *
  5345. * return: none
  5346. */
  5347. static void dp_txrx_path_stats(struct dp_soc *soc)
  5348. {
  5349. uint8_t error_code;
  5350. uint8_t loop_pdev;
  5351. struct dp_pdev *pdev;
  5352. uint8_t i;
  5353. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  5354. pdev = soc->pdev_list[loop_pdev];
  5355. dp_aggregate_pdev_stats(pdev);
  5356. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5357. "Tx path Statistics:");
  5358. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  5359. pdev->stats.tx_i.rcvd.num,
  5360. pdev->stats.tx_i.rcvd.bytes);
  5361. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  5362. pdev->stats.tx_i.processed.num,
  5363. pdev->stats.tx_i.processed.bytes);
  5364. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  5365. pdev->stats.tx.tx_success.num,
  5366. pdev->stats.tx.tx_success.bytes);
  5367. DP_TRACE(FATAL, "Dropped in host:");
  5368. DP_TRACE(FATAL, "Total packets dropped: %u,",
  5369. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5370. DP_TRACE(FATAL, "Descriptor not available: %u",
  5371. pdev->stats.tx_i.dropped.desc_na);
  5372. DP_TRACE(FATAL, "Ring full: %u",
  5373. pdev->stats.tx_i.dropped.ring_full);
  5374. DP_TRACE(FATAL, "Enqueue fail: %u",
  5375. pdev->stats.tx_i.dropped.enqueue_fail);
  5376. DP_TRACE(FATAL, "DMA Error: %u",
  5377. pdev->stats.tx_i.dropped.dma_error);
  5378. DP_TRACE(FATAL, "Dropped in hardware:");
  5379. DP_TRACE(FATAL, "total packets dropped: %u",
  5380. pdev->stats.tx.tx_failed);
  5381. DP_TRACE(FATAL, "mpdu age out: %u",
  5382. pdev->stats.tx.dropped.age_out);
  5383. DP_TRACE(FATAL, "firmware removed: %u",
  5384. pdev->stats.tx.dropped.fw_rem);
  5385. DP_TRACE(FATAL, "firmware removed tx: %u",
  5386. pdev->stats.tx.dropped.fw_rem_tx);
  5387. DP_TRACE(FATAL, "firmware removed notx %u",
  5388. pdev->stats.tx.dropped.fw_rem_notx);
  5389. DP_TRACE(FATAL, "peer_invalid: %u",
  5390. pdev->soc->stats.tx.tx_invalid_peer.num);
  5391. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  5392. DP_TRACE(FATAL, "Single Packet: %u",
  5393. pdev->stats.tx_comp_histogram.pkts_1);
  5394. DP_TRACE(FATAL, "2-20 Packets: %u",
  5395. pdev->stats.tx_comp_histogram.pkts_2_20);
  5396. DP_TRACE(FATAL, "21-40 Packets: %u",
  5397. pdev->stats.tx_comp_histogram.pkts_21_40);
  5398. DP_TRACE(FATAL, "41-60 Packets: %u",
  5399. pdev->stats.tx_comp_histogram.pkts_41_60);
  5400. DP_TRACE(FATAL, "61-80 Packets: %u",
  5401. pdev->stats.tx_comp_histogram.pkts_61_80);
  5402. DP_TRACE(FATAL, "81-100 Packets: %u",
  5403. pdev->stats.tx_comp_histogram.pkts_81_100);
  5404. DP_TRACE(FATAL, "101-200 Packets: %u",
  5405. pdev->stats.tx_comp_histogram.pkts_101_200);
  5406. DP_TRACE(FATAL, " 201+ Packets: %u",
  5407. pdev->stats.tx_comp_histogram.pkts_201_plus);
  5408. DP_TRACE(FATAL, "Rx path statistics");
  5409. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5410. pdev->stats.rx.to_stack.num,
  5411. pdev->stats.rx.to_stack.bytes);
  5412. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5413. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5414. i, pdev->stats.rx.rcvd_reo[i].num,
  5415. pdev->stats.rx.rcvd_reo[i].bytes);
  5416. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5417. pdev->stats.rx.intra_bss.pkts.num,
  5418. pdev->stats.rx.intra_bss.pkts.bytes);
  5419. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5420. pdev->stats.rx.intra_bss.fail.num,
  5421. pdev->stats.rx.intra_bss.fail.bytes);
  5422. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5423. pdev->stats.rx.raw.num,
  5424. pdev->stats.rx.raw.bytes);
  5425. DP_TRACE(FATAL, "dropped: error %u msdus",
  5426. pdev->stats.rx.err.mic_err);
  5427. DP_TRACE(FATAL, "peer invalid %u",
  5428. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5429. DP_TRACE(FATAL, "Reo Statistics");
  5430. DP_TRACE(FATAL, "rbm error: %u msdus",
  5431. pdev->soc->stats.rx.err.invalid_rbm);
  5432. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5433. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5434. DP_TRACE(FATAL, "Reo errors");
  5435. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5436. error_code++) {
  5437. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5438. error_code,
  5439. pdev->soc->stats.rx.err.reo_error[error_code]);
  5440. }
  5441. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5442. error_code++) {
  5443. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5444. error_code,
  5445. pdev->soc->stats.rx.err
  5446. .rxdma_error[error_code]);
  5447. }
  5448. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5449. DP_TRACE(FATAL, "Single Packet: %u",
  5450. pdev->stats.rx_ind_histogram.pkts_1);
  5451. DP_TRACE(FATAL, "2-20 Packets: %u",
  5452. pdev->stats.rx_ind_histogram.pkts_2_20);
  5453. DP_TRACE(FATAL, "21-40 Packets: %u",
  5454. pdev->stats.rx_ind_histogram.pkts_21_40);
  5455. DP_TRACE(FATAL, "41-60 Packets: %u",
  5456. pdev->stats.rx_ind_histogram.pkts_41_60);
  5457. DP_TRACE(FATAL, "61-80 Packets: %u",
  5458. pdev->stats.rx_ind_histogram.pkts_61_80);
  5459. DP_TRACE(FATAL, "81-100 Packets: %u",
  5460. pdev->stats.rx_ind_histogram.pkts_81_100);
  5461. DP_TRACE(FATAL, "101-200 Packets: %u",
  5462. pdev->stats.rx_ind_histogram.pkts_101_200);
  5463. DP_TRACE(FATAL, " 201+ Packets: %u",
  5464. pdev->stats.rx_ind_histogram.pkts_201_plus);
  5465. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  5466. __func__,
  5467. pdev->soc->wlan_cfg_ctx->tso_enabled,
  5468. pdev->soc->wlan_cfg_ctx->lro_enabled,
  5469. pdev->soc->wlan_cfg_ctx->rx_hash,
  5470. pdev->soc->wlan_cfg_ctx->napi_enabled);
  5471. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5472. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  5473. __func__,
  5474. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  5475. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  5476. #endif
  5477. }
  5478. }
  5479. /*
  5480. * dp_txrx_dump_stats() - Dump statistics
  5481. * @value - Statistics option
  5482. */
  5483. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  5484. enum qdf_stats_verbosity_level level)
  5485. {
  5486. struct dp_soc *soc =
  5487. (struct dp_soc *)psoc;
  5488. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5489. if (!soc) {
  5490. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5491. "%s: soc is NULL", __func__);
  5492. return QDF_STATUS_E_INVAL;
  5493. }
  5494. switch (value) {
  5495. case CDP_TXRX_PATH_STATS:
  5496. dp_txrx_path_stats(soc);
  5497. break;
  5498. case CDP_RX_RING_STATS:
  5499. dp_print_per_ring_stats(soc);
  5500. break;
  5501. case CDP_TXRX_TSO_STATS:
  5502. /* TODO: NOT IMPLEMENTED */
  5503. break;
  5504. case CDP_DUMP_TX_FLOW_POOL_INFO:
  5505. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  5506. break;
  5507. case CDP_DP_NAPI_STATS:
  5508. dp_print_napi_stats(soc);
  5509. break;
  5510. case CDP_TXRX_DESC_STATS:
  5511. /* TODO: NOT IMPLEMENTED */
  5512. break;
  5513. default:
  5514. status = QDF_STATUS_E_INVAL;
  5515. break;
  5516. }
  5517. return status;
  5518. }
  5519. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5520. /**
  5521. * dp_update_flow_control_parameters() - API to store datapath
  5522. * config parameters
  5523. * @soc: soc handle
  5524. * @cfg: ini parameter handle
  5525. *
  5526. * Return: void
  5527. */
  5528. static inline
  5529. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5530. struct cdp_config_params *params)
  5531. {
  5532. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  5533. params->tx_flow_stop_queue_threshold;
  5534. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  5535. params->tx_flow_start_queue_offset;
  5536. }
  5537. #else
  5538. static inline
  5539. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5540. struct cdp_config_params *params)
  5541. {
  5542. }
  5543. #endif
  5544. /**
  5545. * dp_update_config_parameters() - API to store datapath
  5546. * config parameters
  5547. * @soc: soc handle
  5548. * @cfg: ini parameter handle
  5549. *
  5550. * Return: status
  5551. */
  5552. static
  5553. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5554. struct cdp_config_params *params)
  5555. {
  5556. struct dp_soc *soc = (struct dp_soc *)psoc;
  5557. if (!(soc)) {
  5558. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5559. "%s: Invalid handle", __func__);
  5560. return QDF_STATUS_E_INVAL;
  5561. }
  5562. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5563. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5564. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5565. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5566. params->tcp_udp_checksumoffload;
  5567. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5568. dp_update_flow_control_parameters(soc, params);
  5569. return QDF_STATUS_SUCCESS;
  5570. }
  5571. /**
  5572. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5573. * config parameters
  5574. * @vdev_handle - datapath vdev handle
  5575. * @cfg: ini parameter handle
  5576. *
  5577. * Return: status
  5578. */
  5579. #ifdef WDS_VENDOR_EXTENSION
  5580. void
  5581. dp_txrx_set_wds_rx_policy(
  5582. struct cdp_vdev *vdev_handle,
  5583. u_int32_t val)
  5584. {
  5585. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5586. struct dp_peer *peer;
  5587. if (vdev->opmode == wlan_op_mode_ap) {
  5588. /* for ap, set it on bss_peer */
  5589. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5590. if (peer->bss_peer) {
  5591. peer->wds_ecm.wds_rx_filter = 1;
  5592. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5593. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5594. break;
  5595. }
  5596. }
  5597. } else if (vdev->opmode == wlan_op_mode_sta) {
  5598. peer = TAILQ_FIRST(&vdev->peer_list);
  5599. peer->wds_ecm.wds_rx_filter = 1;
  5600. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5601. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5602. }
  5603. }
  5604. /**
  5605. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5606. *
  5607. * @peer_handle - datapath peer handle
  5608. * @wds_tx_ucast: policy for unicast transmission
  5609. * @wds_tx_mcast: policy for multicast transmission
  5610. *
  5611. * Return: void
  5612. */
  5613. void
  5614. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5615. int wds_tx_ucast, int wds_tx_mcast)
  5616. {
  5617. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5618. if (wds_tx_ucast || wds_tx_mcast) {
  5619. peer->wds_enabled = 1;
  5620. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5621. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5622. } else {
  5623. peer->wds_enabled = 0;
  5624. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5625. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5626. }
  5627. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5628. FL("Policy Update set to :\
  5629. peer->wds_enabled %d\
  5630. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5631. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5632. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5633. peer->wds_ecm.wds_tx_mcast_4addr);
  5634. return;
  5635. }
  5636. #endif
  5637. static struct cdp_wds_ops dp_ops_wds = {
  5638. .vdev_set_wds = dp_vdev_set_wds,
  5639. #ifdef WDS_VENDOR_EXTENSION
  5640. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5641. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5642. #endif
  5643. };
  5644. /*
  5645. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  5646. * @soc - datapath soc handle
  5647. * @peer - datapath peer handle
  5648. *
  5649. * Delete the AST entries belonging to a peer
  5650. */
  5651. #ifdef FEATURE_AST
  5652. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5653. struct dp_peer *peer)
  5654. {
  5655. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  5656. qdf_spin_lock_bh(&soc->ast_lock);
  5657. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  5658. dp_peer_del_ast(soc, ast_entry);
  5659. qdf_spin_unlock_bh(&soc->ast_lock);
  5660. }
  5661. #else
  5662. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5663. struct dp_peer *peer)
  5664. {
  5665. }
  5666. #endif
  5667. /*
  5668. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5669. * @vdev_handle - datapath vdev handle
  5670. * @callback - callback function
  5671. * @ctxt: callback context
  5672. *
  5673. */
  5674. static void
  5675. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5676. ol_txrx_data_tx_cb callback, void *ctxt)
  5677. {
  5678. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5679. vdev->tx_non_std_data_callback.func = callback;
  5680. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5681. }
  5682. /**
  5683. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5684. * @pdev_hdl: datapath pdev handle
  5685. *
  5686. * Return: opaque pointer to dp txrx handle
  5687. */
  5688. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  5689. {
  5690. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5691. return pdev->dp_txrx_handle;
  5692. }
  5693. /**
  5694. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  5695. * @pdev_hdl: datapath pdev handle
  5696. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  5697. *
  5698. * Return: void
  5699. */
  5700. static void
  5701. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  5702. {
  5703. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5704. pdev->dp_txrx_handle = dp_txrx_hdl;
  5705. }
  5706. /**
  5707. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  5708. * @soc_handle: datapath soc handle
  5709. *
  5710. * Return: opaque pointer to external dp (non-core DP)
  5711. */
  5712. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  5713. {
  5714. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5715. return soc->external_txrx_handle;
  5716. }
  5717. /**
  5718. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  5719. * @soc_handle: datapath soc handle
  5720. * @txrx_handle: opaque pointer to external dp (non-core DP)
  5721. *
  5722. * Return: void
  5723. */
  5724. static void
  5725. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  5726. {
  5727. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5728. soc->external_txrx_handle = txrx_handle;
  5729. }
  5730. #ifdef FEATURE_AST
  5731. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  5732. {
  5733. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  5734. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  5735. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5736. peer->delete_in_progress = true;
  5737. dp_peer_delete_ast_entries(soc, peer);
  5738. }
  5739. #endif
  5740. #ifdef ATH_SUPPORT_NAC_RSSI
  5741. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  5742. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  5743. uint8_t chan_num)
  5744. {
  5745. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5746. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5747. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5748. pdev->nac_rssi_filtering = 1;
  5749. /* Store address of NAC (neighbour peer) which will be checked
  5750. * against TA of received packets.
  5751. */
  5752. if (cmd == CDP_NAC_PARAM_ADD) {
  5753. qdf_mem_copy(vdev->cdp_nac_rssi.client_mac,
  5754. client_macaddr, DP_MAC_ADDR_LEN);
  5755. vdev->cdp_nac_rssi_enabled = 1;
  5756. } else if (cmd == CDP_NAC_PARAM_DEL) {
  5757. if (!qdf_mem_cmp(vdev->cdp_nac_rssi.client_mac,
  5758. client_macaddr, DP_MAC_ADDR_LEN)) {
  5759. /* delete this peer from the list */
  5760. qdf_mem_zero(vdev->cdp_nac_rssi.client_mac,
  5761. DP_MAC_ADDR_LEN);
  5762. }
  5763. vdev->cdp_nac_rssi_enabled = 0;
  5764. }
  5765. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  5766. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  5767. (vdev->pdev->osif_pdev, vdev->vdev_id, cmd, bssid);
  5768. return QDF_STATUS_SUCCESS;
  5769. }
  5770. #endif
  5771. static struct cdp_cmn_ops dp_ops_cmn = {
  5772. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  5773. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  5774. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  5775. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  5776. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  5777. .txrx_peer_create = dp_peer_create_wifi3,
  5778. .txrx_peer_setup = dp_peer_setup_wifi3,
  5779. #ifdef FEATURE_AST
  5780. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  5781. #else
  5782. .txrx_peer_teardown = NULL,
  5783. #endif
  5784. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  5785. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  5786. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  5787. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  5788. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  5789. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  5790. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  5791. .txrx_peer_delete = dp_peer_delete_wifi3,
  5792. .txrx_vdev_register = dp_vdev_register_wifi3,
  5793. .txrx_soc_detach = dp_soc_detach_wifi3,
  5794. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  5795. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  5796. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  5797. .txrx_ath_getstats = dp_pdev_getstats,
  5798. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  5799. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  5800. .delba_process = dp_delba_process_wifi3,
  5801. .set_addba_response = dp_set_addba_response,
  5802. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  5803. .flush_cache_rx_queue = NULL,
  5804. /* TODO: get API's for dscp-tid need to be added*/
  5805. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  5806. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  5807. .txrx_stats_request = dp_txrx_stats_request,
  5808. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  5809. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  5810. .txrx_set_nac = dp_set_nac,
  5811. .txrx_get_tx_pending = dp_get_tx_pending,
  5812. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  5813. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  5814. .display_stats = dp_txrx_dump_stats,
  5815. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  5816. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  5817. #ifdef DP_INTR_POLL_BASED
  5818. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  5819. #else
  5820. .txrx_intr_attach = dp_soc_interrupt_attach,
  5821. #endif
  5822. .txrx_intr_detach = dp_soc_interrupt_detach,
  5823. .set_pn_check = dp_set_pn_check_wifi3,
  5824. .update_config_parameters = dp_update_config_parameters,
  5825. /* TODO: Add other functions */
  5826. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  5827. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  5828. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  5829. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  5830. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  5831. .tx_send = dp_tx_send,
  5832. };
  5833. static struct cdp_ctrl_ops dp_ops_ctrl = {
  5834. .txrx_peer_authorize = dp_peer_authorize,
  5835. #ifdef QCA_SUPPORT_SON
  5836. .txrx_set_inact_params = dp_set_inact_params,
  5837. .txrx_start_inact_timer = dp_start_inact_timer,
  5838. .txrx_set_overload = dp_set_overload,
  5839. .txrx_peer_is_inact = dp_peer_is_inact,
  5840. .txrx_mark_peer_inact = dp_mark_peer_inact,
  5841. #endif
  5842. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  5843. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  5844. #ifdef MESH_MODE_SUPPORT
  5845. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  5846. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  5847. #endif
  5848. .txrx_set_vdev_param = dp_set_vdev_param,
  5849. .txrx_peer_set_nawds = dp_peer_set_nawds,
  5850. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  5851. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  5852. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  5853. .txrx_update_filter_neighbour_peers =
  5854. dp_update_filter_neighbour_peers,
  5855. .txrx_get_sec_type = dp_get_sec_type,
  5856. /* TODO: Add other functions */
  5857. .txrx_wdi_event_sub = dp_wdi_event_sub,
  5858. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  5859. #ifdef WDI_EVENT_ENABLE
  5860. .txrx_get_pldev = dp_get_pldev,
  5861. #endif
  5862. .txrx_set_pdev_param = dp_set_pdev_param,
  5863. #ifdef ATH_SUPPORT_NAC_RSSI
  5864. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  5865. #endif
  5866. };
  5867. static struct cdp_me_ops dp_ops_me = {
  5868. #ifdef ATH_SUPPORT_IQUE
  5869. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  5870. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  5871. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  5872. #endif
  5873. };
  5874. static struct cdp_mon_ops dp_ops_mon = {
  5875. .txrx_monitor_set_filter_ucast_data = NULL,
  5876. .txrx_monitor_set_filter_mcast_data = NULL,
  5877. .txrx_monitor_set_filter_non_data = NULL,
  5878. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  5879. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  5880. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  5881. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  5882. /* Added support for HK advance filter */
  5883. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  5884. };
  5885. static struct cdp_host_stats_ops dp_ops_host_stats = {
  5886. .txrx_per_peer_stats = dp_get_host_peer_stats,
  5887. .get_fw_peer_stats = dp_get_fw_peer_stats,
  5888. .get_htt_stats = dp_get_htt_stats,
  5889. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  5890. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  5891. .txrx_stats_publish = dp_txrx_stats_publish,
  5892. /* TODO */
  5893. };
  5894. static struct cdp_raw_ops dp_ops_raw = {
  5895. /* TODO */
  5896. };
  5897. #ifdef CONFIG_WIN
  5898. static struct cdp_pflow_ops dp_ops_pflow = {
  5899. /* TODO */
  5900. };
  5901. #endif /* CONFIG_WIN */
  5902. #ifdef FEATURE_RUNTIME_PM
  5903. /**
  5904. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  5905. * @opaque_pdev: DP pdev context
  5906. *
  5907. * DP is ready to runtime suspend if there are no pending TX packets.
  5908. *
  5909. * Return: QDF_STATUS
  5910. */
  5911. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  5912. {
  5913. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5914. struct dp_soc *soc = pdev->soc;
  5915. /* Call DP TX flow control API to check if there is any
  5916. pending packets */
  5917. if (soc->intr_mode == DP_INTR_POLL)
  5918. qdf_timer_stop(&soc->int_timer);
  5919. return QDF_STATUS_SUCCESS;
  5920. }
  5921. /**
  5922. * dp_runtime_resume() - ensure DP is ready to runtime resume
  5923. * @opaque_pdev: DP pdev context
  5924. *
  5925. * Resume DP for runtime PM.
  5926. *
  5927. * Return: QDF_STATUS
  5928. */
  5929. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  5930. {
  5931. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5932. struct dp_soc *soc = pdev->soc;
  5933. void *hal_srng;
  5934. int i;
  5935. if (soc->intr_mode == DP_INTR_POLL)
  5936. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5937. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  5938. hal_srng = soc->tcl_data_ring[i].hal_srng;
  5939. if (hal_srng) {
  5940. /* We actually only need to acquire the lock */
  5941. hal_srng_access_start(soc->hal_soc, hal_srng);
  5942. /* Update SRC ring head pointer for HW to send
  5943. all pending packets */
  5944. hal_srng_access_end(soc->hal_soc, hal_srng);
  5945. }
  5946. }
  5947. return QDF_STATUS_SUCCESS;
  5948. }
  5949. #endif /* FEATURE_RUNTIME_PM */
  5950. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  5951. {
  5952. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5953. struct dp_soc *soc = pdev->soc;
  5954. if (soc->intr_mode == DP_INTR_POLL)
  5955. qdf_timer_stop(&soc->int_timer);
  5956. return QDF_STATUS_SUCCESS;
  5957. }
  5958. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  5959. {
  5960. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5961. struct dp_soc *soc = pdev->soc;
  5962. if (soc->intr_mode == DP_INTR_POLL)
  5963. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5964. return QDF_STATUS_SUCCESS;
  5965. }
  5966. #ifndef CONFIG_WIN
  5967. static struct cdp_misc_ops dp_ops_misc = {
  5968. .tx_non_std = dp_tx_non_std,
  5969. .get_opmode = dp_get_opmode,
  5970. #ifdef FEATURE_RUNTIME_PM
  5971. .runtime_suspend = dp_runtime_suspend,
  5972. .runtime_resume = dp_runtime_resume,
  5973. #endif /* FEATURE_RUNTIME_PM */
  5974. .pkt_log_init = dp_pkt_log_init,
  5975. .pkt_log_con_service = dp_pkt_log_con_service,
  5976. };
  5977. static struct cdp_flowctl_ops dp_ops_flowctl = {
  5978. /* WIFI 3.0 DP implement as required. */
  5979. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5980. .register_pause_cb = dp_txrx_register_pause_cb,
  5981. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  5982. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  5983. };
  5984. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  5985. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5986. };
  5987. #ifdef IPA_OFFLOAD
  5988. static struct cdp_ipa_ops dp_ops_ipa = {
  5989. .ipa_get_resource = dp_ipa_get_resource,
  5990. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  5991. .ipa_op_response = dp_ipa_op_response,
  5992. .ipa_register_op_cb = dp_ipa_register_op_cb,
  5993. .ipa_get_stat = dp_ipa_get_stat,
  5994. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  5995. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  5996. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  5997. .ipa_setup = dp_ipa_setup,
  5998. .ipa_cleanup = dp_ipa_cleanup,
  5999. .ipa_setup_iface = dp_ipa_setup_iface,
  6000. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  6001. .ipa_enable_pipes = dp_ipa_enable_pipes,
  6002. .ipa_disable_pipes = dp_ipa_disable_pipes,
  6003. .ipa_set_perf_level = dp_ipa_set_perf_level
  6004. };
  6005. #endif
  6006. static struct cdp_bus_ops dp_ops_bus = {
  6007. .bus_suspend = dp_bus_suspend,
  6008. .bus_resume = dp_bus_resume
  6009. };
  6010. static struct cdp_ocb_ops dp_ops_ocb = {
  6011. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6012. };
  6013. static struct cdp_throttle_ops dp_ops_throttle = {
  6014. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6015. };
  6016. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  6017. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6018. };
  6019. static struct cdp_cfg_ops dp_ops_cfg = {
  6020. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6021. };
  6022. /*
  6023. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  6024. * @dev: physical device instance
  6025. * @peer_mac_addr: peer mac address
  6026. * @local_id: local id for the peer
  6027. * @debug_id: to track enum peer access
  6028. * Return: peer instance pointer
  6029. */
  6030. static inline void *
  6031. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  6032. u8 *local_id,
  6033. enum peer_debug_id_type debug_id)
  6034. {
  6035. /*
  6036. * Currently this function does not implement the "get ref"
  6037. * functionality and is mapped to dp_find_peer_by_addr which does not
  6038. * increment the peer ref count. So the peer state is uncertain after
  6039. * calling this API. The functionality needs to be implemented.
  6040. * Accordingly the corresponding release_ref function is NULL.
  6041. */
  6042. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  6043. }
  6044. static struct cdp_peer_ops dp_ops_peer = {
  6045. .register_peer = dp_register_peer,
  6046. .clear_peer = dp_clear_peer,
  6047. .find_peer_by_addr = dp_find_peer_by_addr,
  6048. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  6049. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  6050. .peer_release_ref = NULL,
  6051. .local_peer_id = dp_local_peer_id,
  6052. .peer_find_by_local_id = dp_peer_find_by_local_id,
  6053. .peer_state_update = dp_peer_state_update,
  6054. .get_vdevid = dp_get_vdevid,
  6055. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  6056. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  6057. .get_vdev_for_peer = dp_get_vdev_for_peer,
  6058. .get_peer_state = dp_get_peer_state,
  6059. .last_assoc_received = dp_get_last_assoc_received,
  6060. .last_disassoc_received = dp_get_last_disassoc_received,
  6061. .last_deauth_received = dp_get_last_deauth_received,
  6062. };
  6063. #endif
  6064. static struct cdp_ops dp_txrx_ops = {
  6065. .cmn_drv_ops = &dp_ops_cmn,
  6066. .ctrl_ops = &dp_ops_ctrl,
  6067. .me_ops = &dp_ops_me,
  6068. .mon_ops = &dp_ops_mon,
  6069. .host_stats_ops = &dp_ops_host_stats,
  6070. .wds_ops = &dp_ops_wds,
  6071. .raw_ops = &dp_ops_raw,
  6072. #ifdef CONFIG_WIN
  6073. .pflow_ops = &dp_ops_pflow,
  6074. #endif /* CONFIG_WIN */
  6075. #ifndef CONFIG_WIN
  6076. .misc_ops = &dp_ops_misc,
  6077. .cfg_ops = &dp_ops_cfg,
  6078. .flowctl_ops = &dp_ops_flowctl,
  6079. .l_flowctl_ops = &dp_ops_l_flowctl,
  6080. #ifdef IPA_OFFLOAD
  6081. .ipa_ops = &dp_ops_ipa,
  6082. #endif
  6083. .bus_ops = &dp_ops_bus,
  6084. .ocb_ops = &dp_ops_ocb,
  6085. .peer_ops = &dp_ops_peer,
  6086. .throttle_ops = &dp_ops_throttle,
  6087. .mob_stats_ops = &dp_ops_mob_stats,
  6088. #endif
  6089. };
  6090. /*
  6091. * dp_soc_set_txrx_ring_map()
  6092. * @dp_soc: DP handler for soc
  6093. *
  6094. * Return: Void
  6095. */
  6096. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  6097. {
  6098. uint32_t i;
  6099. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  6100. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  6101. }
  6102. }
  6103. /*
  6104. * dp_soc_attach_wifi3() - Attach txrx SOC
  6105. * @ctrl_psoc: Opaque SOC handle from control plane
  6106. * @htc_handle: Opaque HTC handle
  6107. * @hif_handle: Opaque HIF handle
  6108. * @qdf_osdev: QDF device
  6109. *
  6110. * Return: DP SOC handle on success, NULL on failure
  6111. */
  6112. /*
  6113. * Local prototype added to temporarily address warning caused by
  6114. * -Wmissing-prototypes. A more correct solution, namely to expose
  6115. * a prototype in an appropriate header file, will come later.
  6116. */
  6117. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6118. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6119. struct ol_if_ops *ol_ops);
  6120. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6121. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6122. struct ol_if_ops *ol_ops)
  6123. {
  6124. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  6125. if (!soc) {
  6126. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6127. FL("DP SOC memory allocation failed"));
  6128. goto fail0;
  6129. }
  6130. soc->cdp_soc.ops = &dp_txrx_ops;
  6131. soc->cdp_soc.ol_ops = ol_ops;
  6132. soc->ctrl_psoc = ctrl_psoc;
  6133. soc->osdev = qdf_osdev;
  6134. soc->hif_handle = hif_handle;
  6135. soc->hal_soc = hif_get_hal_handle(hif_handle);
  6136. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  6137. soc->hal_soc, qdf_osdev);
  6138. if (!soc->htt_handle) {
  6139. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6140. FL("HTT attach failed"));
  6141. goto fail1;
  6142. }
  6143. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  6144. if (!soc->wlan_cfg_ctx) {
  6145. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6146. FL("wlan_cfg_soc_attach failed"));
  6147. goto fail2;
  6148. }
  6149. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  6150. soc->cce_disable = false;
  6151. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  6152. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6153. CDP_CFG_MAX_PEER_ID);
  6154. if (ret != -EINVAL) {
  6155. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  6156. }
  6157. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6158. CDP_CFG_CCE_DISABLE);
  6159. if (ret == 1)
  6160. soc->cce_disable = true;
  6161. }
  6162. qdf_spinlock_create(&soc->peer_ref_mutex);
  6163. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  6164. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  6165. /* fill the tx/rx cpu ring map*/
  6166. dp_soc_set_txrx_ring_map(soc);
  6167. qdf_spinlock_create(&soc->htt_stats.lock);
  6168. /* initialize work queue for stats processing */
  6169. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  6170. /*Initialize inactivity timer for wifison */
  6171. dp_init_inact_timer(soc);
  6172. return (void *)soc;
  6173. fail2:
  6174. htt_soc_detach(soc->htt_handle);
  6175. fail1:
  6176. qdf_mem_free(soc);
  6177. fail0:
  6178. return NULL;
  6179. }
  6180. /*
  6181. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  6182. *
  6183. * @soc: handle to DP soc
  6184. * @mac_id: MAC id
  6185. *
  6186. * Return: Return pdev corresponding to MAC
  6187. */
  6188. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  6189. {
  6190. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  6191. return soc->pdev_list[mac_id];
  6192. /* Typically for MCL as there only 1 PDEV*/
  6193. return soc->pdev_list[0];
  6194. }
  6195. /*
  6196. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  6197. * @soc: DP SoC context
  6198. * @max_mac_rings: No of MAC rings
  6199. *
  6200. * Return: None
  6201. */
  6202. static
  6203. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  6204. int *max_mac_rings)
  6205. {
  6206. bool dbs_enable = false;
  6207. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  6208. dbs_enable = soc->cdp_soc.ol_ops->
  6209. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  6210. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  6211. }
  6212. /*
  6213. * dp_set_pktlog_wifi3() - attach txrx vdev
  6214. * @pdev: Datapath PDEV handle
  6215. * @event: which event's notifications are being subscribed to
  6216. * @enable: WDI event subscribe or not. (True or False)
  6217. *
  6218. * Return: Success, NULL on failure
  6219. */
  6220. #ifdef WDI_EVENT_ENABLE
  6221. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  6222. bool enable)
  6223. {
  6224. struct dp_soc *soc = pdev->soc;
  6225. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6226. int max_mac_rings = wlan_cfg_get_num_mac_rings
  6227. (pdev->wlan_cfg_ctx);
  6228. uint8_t mac_id = 0;
  6229. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  6230. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  6231. FL("Max_mac_rings %d \n"),
  6232. max_mac_rings);
  6233. if (enable) {
  6234. switch (event) {
  6235. case WDI_EVENT_RX_DESC:
  6236. if (pdev->monitor_vdev) {
  6237. /* Nothing needs to be done if monitor mode is
  6238. * enabled
  6239. */
  6240. return 0;
  6241. }
  6242. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  6243. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  6244. htt_tlv_filter.mpdu_start = 1;
  6245. htt_tlv_filter.msdu_start = 1;
  6246. htt_tlv_filter.msdu_end = 1;
  6247. htt_tlv_filter.mpdu_end = 1;
  6248. htt_tlv_filter.packet_header = 1;
  6249. htt_tlv_filter.attention = 1;
  6250. htt_tlv_filter.ppdu_start = 1;
  6251. htt_tlv_filter.ppdu_end = 1;
  6252. htt_tlv_filter.ppdu_end_user_stats = 1;
  6253. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6254. htt_tlv_filter.ppdu_end_status_done = 1;
  6255. htt_tlv_filter.enable_fp = 1;
  6256. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6257. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6258. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6259. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6260. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6261. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6262. for (mac_id = 0; mac_id < max_mac_rings;
  6263. mac_id++) {
  6264. int mac_for_pdev =
  6265. dp_get_mac_id_for_pdev(mac_id,
  6266. pdev->pdev_id);
  6267. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6268. mac_for_pdev,
  6269. pdev->rxdma_mon_status_ring[mac_id]
  6270. .hal_srng,
  6271. RXDMA_MONITOR_STATUS,
  6272. RX_BUFFER_SIZE,
  6273. &htt_tlv_filter);
  6274. }
  6275. if (soc->reap_timer_init)
  6276. qdf_timer_mod(&soc->mon_reap_timer,
  6277. DP_INTR_POLL_TIMER_MS);
  6278. }
  6279. break;
  6280. case WDI_EVENT_LITE_RX:
  6281. if (pdev->monitor_vdev) {
  6282. /* Nothing needs to be done if monitor mode is
  6283. * enabled
  6284. */
  6285. return 0;
  6286. }
  6287. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  6288. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  6289. htt_tlv_filter.ppdu_start = 1;
  6290. htt_tlv_filter.ppdu_end = 1;
  6291. htt_tlv_filter.ppdu_end_user_stats = 1;
  6292. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6293. htt_tlv_filter.ppdu_end_status_done = 1;
  6294. htt_tlv_filter.mpdu_start = 1;
  6295. htt_tlv_filter.enable_fp = 1;
  6296. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6297. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6298. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6299. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6300. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6301. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6302. for (mac_id = 0; mac_id < max_mac_rings;
  6303. mac_id++) {
  6304. int mac_for_pdev =
  6305. dp_get_mac_id_for_pdev(mac_id,
  6306. pdev->pdev_id);
  6307. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6308. mac_for_pdev,
  6309. pdev->rxdma_mon_status_ring[mac_id]
  6310. .hal_srng,
  6311. RXDMA_MONITOR_STATUS,
  6312. RX_BUFFER_SIZE_PKTLOG_LITE,
  6313. &htt_tlv_filter);
  6314. }
  6315. if (soc->reap_timer_init)
  6316. qdf_timer_mod(&soc->mon_reap_timer,
  6317. DP_INTR_POLL_TIMER_MS);
  6318. }
  6319. break;
  6320. case WDI_EVENT_LITE_T2H:
  6321. if (pdev->monitor_vdev) {
  6322. /* Nothing needs to be done if monitor mode is
  6323. * enabled
  6324. */
  6325. return 0;
  6326. }
  6327. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6328. int mac_for_pdev = dp_get_mac_id_for_pdev(
  6329. mac_id, pdev->pdev_id);
  6330. pdev->pktlog_ppdu_stats = true;
  6331. dp_h2t_cfg_stats_msg_send(pdev,
  6332. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  6333. mac_for_pdev);
  6334. }
  6335. break;
  6336. default:
  6337. /* Nothing needs to be done for other pktlog types */
  6338. break;
  6339. }
  6340. } else {
  6341. switch (event) {
  6342. case WDI_EVENT_RX_DESC:
  6343. case WDI_EVENT_LITE_RX:
  6344. if (pdev->monitor_vdev) {
  6345. /* Nothing needs to be done if monitor mode is
  6346. * enabled
  6347. */
  6348. return 0;
  6349. }
  6350. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  6351. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  6352. for (mac_id = 0; mac_id < max_mac_rings;
  6353. mac_id++) {
  6354. int mac_for_pdev =
  6355. dp_get_mac_id_for_pdev(mac_id,
  6356. pdev->pdev_id);
  6357. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6358. mac_for_pdev,
  6359. pdev->rxdma_mon_status_ring[mac_id]
  6360. .hal_srng,
  6361. RXDMA_MONITOR_STATUS,
  6362. RX_BUFFER_SIZE,
  6363. &htt_tlv_filter);
  6364. }
  6365. if (soc->reap_timer_init)
  6366. qdf_timer_stop(&soc->mon_reap_timer);
  6367. }
  6368. break;
  6369. case WDI_EVENT_LITE_T2H:
  6370. if (pdev->monitor_vdev) {
  6371. /* Nothing needs to be done if monitor mode is
  6372. * enabled
  6373. */
  6374. return 0;
  6375. }
  6376. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6377. * passing value 0. Once these macros will define in htt
  6378. * header file will use proper macros
  6379. */
  6380. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6381. int mac_for_pdev =
  6382. dp_get_mac_id_for_pdev(mac_id,
  6383. pdev->pdev_id);
  6384. pdev->pktlog_ppdu_stats = false;
  6385. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6386. dp_h2t_cfg_stats_msg_send(pdev, 0,
  6387. mac_for_pdev);
  6388. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  6389. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  6390. mac_for_pdev);
  6391. } else if (pdev->enhanced_stats_en) {
  6392. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  6393. mac_for_pdev);
  6394. }
  6395. }
  6396. break;
  6397. default:
  6398. /* Nothing needs to be done for other pktlog types */
  6399. break;
  6400. }
  6401. }
  6402. return 0;
  6403. }
  6404. #endif
  6405. #ifdef CONFIG_MCL
  6406. /*
  6407. * dp_service_mon_rings()- timer to reap monitor rings
  6408. * reqd as we are not getting ppdu end interrupts
  6409. * @arg: SoC Handle
  6410. *
  6411. * Return:
  6412. *
  6413. */
  6414. static void dp_service_mon_rings(void *arg)
  6415. {
  6416. struct dp_soc *soc = (struct dp_soc *) arg;
  6417. int ring = 0, work_done, mac_id;
  6418. struct dp_pdev *pdev = NULL;
  6419. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  6420. pdev = soc->pdev_list[ring];
  6421. if (pdev == NULL)
  6422. continue;
  6423. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6424. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6425. pdev->pdev_id);
  6426. work_done = dp_mon_process(soc, mac_for_pdev,
  6427. QCA_NAPI_BUDGET);
  6428. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  6429. FL("Reaped %d descs from Monitor rings"),
  6430. work_done);
  6431. }
  6432. }
  6433. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  6434. }
  6435. #ifndef REMOVE_PKT_LOG
  6436. /**
  6437. * dp_pkt_log_init() - API to initialize packet log
  6438. * @ppdev: physical device handle
  6439. * @scn: HIF context
  6440. *
  6441. * Return: none
  6442. */
  6443. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  6444. {
  6445. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  6446. if (handle->pkt_log_init) {
  6447. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6448. "%s: Packet log not initialized", __func__);
  6449. return;
  6450. }
  6451. pktlog_sethandle(&handle->pl_dev, scn);
  6452. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  6453. if (pktlogmod_init(scn)) {
  6454. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6455. "%s: pktlogmod_init failed", __func__);
  6456. handle->pkt_log_init = false;
  6457. } else {
  6458. handle->pkt_log_init = true;
  6459. }
  6460. }
  6461. /**
  6462. * dp_pkt_log_con_service() - connect packet log service
  6463. * @ppdev: physical device handle
  6464. * @scn: device context
  6465. *
  6466. * Return: none
  6467. */
  6468. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  6469. {
  6470. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  6471. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  6472. pktlog_htc_attach();
  6473. }
  6474. /**
  6475. * dp_pktlogmod_exit() - API to cleanup pktlog info
  6476. * @handle: Pdev handle
  6477. *
  6478. * Return: none
  6479. */
  6480. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  6481. {
  6482. void *scn = (void *)handle->soc->hif_handle;
  6483. if (!scn) {
  6484. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6485. "%s: Invalid hif(scn) handle", __func__);
  6486. return;
  6487. }
  6488. pktlogmod_exit(scn);
  6489. handle->pkt_log_init = false;
  6490. }
  6491. #endif
  6492. #else
  6493. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  6494. #endif