main.c 117 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include <linux/soc/qcom/slatecom_interface.h>
  47. #include "main.h"
  48. #include "qmi.h"
  49. #include "debug.h"
  50. #include "power.h"
  51. #include "genl.h"
  52. #define MAX_PROP_SIZE 32
  53. #define NUM_LOG_PAGES 10
  54. #define NUM_LOG_LONG_PAGES 4
  55. #define ICNSS_MAGIC 0x5abc5abc
  56. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  57. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  58. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  59. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  60. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  61. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  62. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  63. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  64. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  65. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  66. #define ICNSS_MAX_PROBE_CNT 2
  67. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  68. #define PROBE_TIMEOUT 15000
  69. #define SMP2P_SOC_WAKE_TIMEOUT 500
  70. #ifdef CONFIG_ICNSS2_DEBUG
  71. static unsigned long qmi_timeout = 3000;
  72. module_param(qmi_timeout, ulong, 0600);
  73. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  74. #else
  75. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  76. #endif
  77. static struct icnss_priv *penv;
  78. static struct work_struct wpss_loader;
  79. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  80. #define ICNSS_EVENT_PENDING 2989
  81. #define ICNSS_EVENT_SYNC BIT(0)
  82. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  83. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  84. ICNSS_EVENT_SYNC)
  85. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  86. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  87. #define SMP2P_GET_MAX_RETRY 4
  88. #define SMP2P_GET_RETRY_DELAY_MS 500
  89. #define RAMDUMP_NUM_DEVICES 256
  90. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  91. #define WLAN_EN_TEMP_THRESHOLD 5000
  92. #define WLAN_EN_DELAY 500
  93. #define ICNSS_RPROC_LEN 10
  94. static DEFINE_IDA(rd_minor_id);
  95. enum icnss_pdr_cause_index {
  96. ICNSS_FW_CRASH,
  97. ICNSS_ROOT_PD_CRASH,
  98. ICNSS_ROOT_PD_SHUTDOWN,
  99. ICNSS_HOST_ERROR,
  100. };
  101. static const char * const icnss_pdr_cause[] = {
  102. [ICNSS_FW_CRASH] = "FW crash",
  103. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  104. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  105. [ICNSS_HOST_ERROR] = "Host error",
  106. };
  107. static void icnss_set_plat_priv(struct icnss_priv *priv)
  108. {
  109. penv = priv;
  110. }
  111. static struct icnss_priv *icnss_get_plat_priv(void)
  112. {
  113. return penv;
  114. }
  115. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  116. {
  117. if (priv && priv->rproc) {
  118. rproc_shutdown(priv->rproc);
  119. rproc_put(priv->rproc);
  120. priv->rproc = NULL;
  121. }
  122. }
  123. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  124. struct kobj_attribute *attr,
  125. const char *buf, size_t count)
  126. {
  127. struct icnss_priv *priv = icnss_get_plat_priv();
  128. icnss_pr_dbg("Received shutdown indication");
  129. atomic_set(&priv->is_shutdown, true);
  130. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  131. icnss_wpss_unload(priv);
  132. return count;
  133. }
  134. static struct kobj_attribute icnss_sysfs_attribute =
  135. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  136. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  137. {
  138. if (atomic_inc_return(&priv->pm_count) != 1)
  139. return;
  140. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  141. atomic_read(&priv->pm_count));
  142. pm_stay_awake(&priv->pdev->dev);
  143. priv->stats.pm_stay_awake++;
  144. }
  145. static void icnss_pm_relax(struct icnss_priv *priv)
  146. {
  147. int r = atomic_dec_return(&priv->pm_count);
  148. WARN_ON(r < 0);
  149. if (r != 0)
  150. return;
  151. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  152. atomic_read(&priv->pm_count));
  153. pm_relax(&priv->pdev->dev);
  154. priv->stats.pm_relax++;
  155. }
  156. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  157. {
  158. switch (type) {
  159. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  160. return "SERVER_ARRIVE";
  161. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  162. return "SERVER_EXIT";
  163. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  164. return "FW_READY";
  165. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  166. return "REGISTER_DRIVER";
  167. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  168. return "UNREGISTER_DRIVER";
  169. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  170. return "PD_SERVICE_DOWN";
  171. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  172. return "FW_EARLY_CRASH_IND";
  173. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  174. return "IDLE_SHUTDOWN";
  175. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  176. return "IDLE_RESTART";
  177. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  178. return "FW_INIT_DONE";
  179. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  180. return "QDSS_TRACE_REQ_MEM";
  181. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  182. return "QDSS_TRACE_SAVE";
  183. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  184. return "QDSS_TRACE_FREE";
  185. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  186. return "M3_DUMP_UPLOAD";
  187. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  188. return "QDSS_TRACE_REQ_DATA";
  189. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  190. return "SUBSYS_RESTART_LEVEL";
  191. case ICNSS_DRIVER_EVENT_MAX:
  192. return "EVENT_MAX";
  193. }
  194. return "UNKNOWN";
  195. };
  196. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  197. {
  198. switch (type) {
  199. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  200. return "SOC_WAKE_REQUEST";
  201. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  202. return "SOC_WAKE_RELEASE";
  203. case ICNSS_SOC_WAKE_EVENT_MAX:
  204. return "SOC_EVENT_MAX";
  205. }
  206. return "UNKNOWN";
  207. };
  208. int icnss_driver_event_post(struct icnss_priv *priv,
  209. enum icnss_driver_event_type type,
  210. u32 flags, void *data)
  211. {
  212. struct icnss_driver_event *event;
  213. unsigned long irq_flags;
  214. int gfp = GFP_KERNEL;
  215. int ret = 0;
  216. if (!priv)
  217. return -ENODEV;
  218. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  219. icnss_driver_event_to_str(type), type, current->comm,
  220. flags, priv->state);
  221. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  222. icnss_pr_err("Invalid Event type: %d, can't post", type);
  223. return -EINVAL;
  224. }
  225. if (in_interrupt() || irqs_disabled())
  226. gfp = GFP_ATOMIC;
  227. event = kzalloc(sizeof(*event), gfp);
  228. if (event == NULL)
  229. return -ENOMEM;
  230. icnss_pm_stay_awake(priv);
  231. event->type = type;
  232. event->data = data;
  233. init_completion(&event->complete);
  234. event->ret = ICNSS_EVENT_PENDING;
  235. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  236. spin_lock_irqsave(&priv->event_lock, irq_flags);
  237. list_add_tail(&event->list, &priv->event_list);
  238. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  239. priv->stats.events[type].posted++;
  240. queue_work(priv->event_wq, &priv->event_work);
  241. if (!(flags & ICNSS_EVENT_SYNC))
  242. goto out;
  243. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  244. wait_for_completion(&event->complete);
  245. else
  246. ret = wait_for_completion_interruptible(&event->complete);
  247. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  248. icnss_driver_event_to_str(type), type, priv->state, ret,
  249. event->ret);
  250. spin_lock_irqsave(&priv->event_lock, irq_flags);
  251. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  252. event->sync = false;
  253. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  254. ret = -EINTR;
  255. goto out;
  256. }
  257. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  258. ret = event->ret;
  259. kfree(event);
  260. out:
  261. icnss_pm_relax(priv);
  262. return ret;
  263. }
  264. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  265. enum icnss_soc_wake_event_type type,
  266. u32 flags, void *data)
  267. {
  268. struct icnss_soc_wake_event *event;
  269. unsigned long irq_flags;
  270. int gfp = GFP_KERNEL;
  271. int ret = 0;
  272. if (!priv)
  273. return -ENODEV;
  274. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  275. icnss_soc_wake_event_to_str(type),
  276. type, current->comm, flags, priv->state);
  277. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  278. icnss_pr_err("Invalid Event type: %d, can't post", type);
  279. return -EINVAL;
  280. }
  281. if (in_interrupt() || irqs_disabled())
  282. gfp = GFP_ATOMIC;
  283. event = kzalloc(sizeof(*event), gfp);
  284. if (!event)
  285. return -ENOMEM;
  286. icnss_pm_stay_awake(priv);
  287. event->type = type;
  288. event->data = data;
  289. init_completion(&event->complete);
  290. event->ret = ICNSS_EVENT_PENDING;
  291. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  292. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  293. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  294. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  295. priv->stats.soc_wake_events[type].posted++;
  296. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  297. if (!(flags & ICNSS_EVENT_SYNC))
  298. goto out;
  299. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  300. wait_for_completion(&event->complete);
  301. else
  302. ret = wait_for_completion_interruptible(&event->complete);
  303. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  304. icnss_soc_wake_event_to_str(type),
  305. type, priv->state, ret, event->ret);
  306. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  307. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  308. event->sync = false;
  309. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  310. ret = -EINTR;
  311. goto out;
  312. }
  313. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  314. ret = event->ret;
  315. kfree(event);
  316. out:
  317. icnss_pm_relax(priv);
  318. return ret;
  319. }
  320. bool icnss_is_fw_ready(void)
  321. {
  322. if (!penv)
  323. return false;
  324. else
  325. return test_bit(ICNSS_FW_READY, &penv->state);
  326. }
  327. EXPORT_SYMBOL(icnss_is_fw_ready);
  328. void icnss_block_shutdown(bool status)
  329. {
  330. if (!penv)
  331. return;
  332. if (status) {
  333. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  334. reinit_completion(&penv->unblock_shutdown);
  335. } else {
  336. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  337. complete(&penv->unblock_shutdown);
  338. }
  339. }
  340. EXPORT_SYMBOL(icnss_block_shutdown);
  341. bool icnss_is_fw_down(void)
  342. {
  343. struct icnss_priv *priv = icnss_get_plat_priv();
  344. if (!priv)
  345. return false;
  346. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  347. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  348. test_bit(ICNSS_REJUVENATE, &priv->state);
  349. }
  350. EXPORT_SYMBOL(icnss_is_fw_down);
  351. unsigned long icnss_get_device_config(void)
  352. {
  353. struct icnss_priv *priv = icnss_get_plat_priv();
  354. if (!priv)
  355. return 0;
  356. return priv->device_config;
  357. }
  358. EXPORT_SYMBOL(icnss_get_device_config);
  359. bool icnss_is_rejuvenate(void)
  360. {
  361. if (!penv)
  362. return false;
  363. else
  364. return test_bit(ICNSS_REJUVENATE, &penv->state);
  365. }
  366. EXPORT_SYMBOL(icnss_is_rejuvenate);
  367. bool icnss_is_pdr(void)
  368. {
  369. if (!penv)
  370. return false;
  371. else
  372. return test_bit(ICNSS_PDR, &penv->state);
  373. }
  374. EXPORT_SYMBOL(icnss_is_pdr);
  375. static int icnss_send_smp2p(struct icnss_priv *priv,
  376. enum icnss_smp2p_msg_id msg_id,
  377. enum smp2p_out_entry smp2p_entry)
  378. {
  379. unsigned int value = 0;
  380. int ret;
  381. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  382. return -EINVAL;
  383. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  384. if (msg_id == ICNSS_RESET_MSG) {
  385. priv->smp2p_info[smp2p_entry].seq = 0;
  386. ret = qcom_smem_state_update_bits(
  387. priv->smp2p_info[smp2p_entry].smem_state,
  388. ICNSS_SMEM_VALUE_MASK,
  389. 0);
  390. if (ret)
  391. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  392. ret, icnss_smp2p_str[smp2p_entry]);
  393. return ret;
  394. }
  395. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  396. return -ENODEV;
  397. value |= priv->smp2p_info[smp2p_entry].seq++;
  398. value <<= ICNSS_SMEM_SEQ_NO_POS;
  399. value |= msg_id;
  400. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  401. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  402. reinit_completion(&penv->smp2p_soc_wake_wait);
  403. ret = qcom_smem_state_update_bits(
  404. priv->smp2p_info[smp2p_entry].smem_state,
  405. ICNSS_SMEM_VALUE_MASK,
  406. value);
  407. if (ret) {
  408. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  409. icnss_smp2p_str[smp2p_entry]);
  410. } else {
  411. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  412. msg_id == ICNSS_SOC_WAKE_REL) {
  413. if (!wait_for_completion_timeout(
  414. &priv->smp2p_soc_wake_wait,
  415. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  416. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  417. icnss_smp2p_str[smp2p_entry]);
  418. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  419. ICNSS_ASSERT(0);
  420. }
  421. }
  422. }
  423. return ret;
  424. }
  425. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  426. {
  427. struct icnss_priv *priv = ctx;
  428. if (priv)
  429. priv->force_err_fatal = true;
  430. icnss_pr_err("Received force error fatal request from FW\n");
  431. return IRQ_HANDLED;
  432. }
  433. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  434. {
  435. struct icnss_priv *priv = ctx;
  436. struct icnss_uevent_fw_down_data fw_down_data = {0};
  437. icnss_pr_err("Received early crash indication from FW\n");
  438. if (priv) {
  439. set_bit(ICNSS_FW_DOWN, &priv->state);
  440. icnss_ignore_fw_timeout(true);
  441. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  442. clear_bit(ICNSS_FW_READY, &priv->state);
  443. fw_down_data.crashed = true;
  444. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  445. &fw_down_data);
  446. }
  447. }
  448. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  449. 0, NULL);
  450. return IRQ_HANDLED;
  451. }
  452. static void register_fw_error_notifications(struct device *dev)
  453. {
  454. struct icnss_priv *priv = dev_get_drvdata(dev);
  455. struct device_node *dev_node;
  456. int irq = 0, ret = 0;
  457. if (!priv)
  458. return;
  459. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  460. if (!dev_node) {
  461. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  462. return;
  463. }
  464. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  465. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  466. ret = irq = of_irq_get_byname(dev_node,
  467. "qcom,smp2p-force-fatal-error");
  468. if (ret < 0) {
  469. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  470. irq);
  471. return;
  472. }
  473. }
  474. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  475. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  476. "wlanfw-err", priv);
  477. if (ret < 0) {
  478. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  479. irq, ret);
  480. return;
  481. }
  482. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  483. priv->fw_error_fatal_irq = irq;
  484. }
  485. static void register_early_crash_notifications(struct device *dev)
  486. {
  487. struct icnss_priv *priv = dev_get_drvdata(dev);
  488. struct device_node *dev_node;
  489. int irq = 0, ret = 0;
  490. if (!priv)
  491. return;
  492. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  493. if (!dev_node) {
  494. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  495. return;
  496. }
  497. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  498. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  499. ret = irq = of_irq_get_byname(dev_node,
  500. "qcom,smp2p-early-crash-ind");
  501. if (ret < 0) {
  502. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  503. irq);
  504. return;
  505. }
  506. }
  507. ret = devm_request_threaded_irq(dev, irq, NULL,
  508. fw_crash_indication_handler,
  509. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  510. "wlanfw-early-crash-ind", priv);
  511. if (ret < 0) {
  512. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  513. irq, ret);
  514. return;
  515. }
  516. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  517. priv->fw_early_crash_irq = irq;
  518. }
  519. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  520. {
  521. struct thermal_zone_device *thermal_dev;
  522. const char *tsens;
  523. int ret;
  524. ret = of_property_read_string(priv->pdev->dev.of_node,
  525. "tsens",
  526. &tsens);
  527. if (ret)
  528. return ret;
  529. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  530. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  531. if (IS_ERR(thermal_dev)) {
  532. icnss_pr_err("Fail to get thermal zone. ret: %d",
  533. PTR_ERR(thermal_dev));
  534. return PTR_ERR(thermal_dev);
  535. }
  536. ret = thermal_zone_get_temp(thermal_dev, temp);
  537. if (ret)
  538. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  539. return ret;
  540. }
  541. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  542. {
  543. struct icnss_priv *priv = ctx;
  544. if (priv)
  545. complete(&priv->smp2p_soc_wake_wait);
  546. return IRQ_HANDLED;
  547. }
  548. static void register_soc_wake_notif(struct device *dev)
  549. {
  550. struct icnss_priv *priv = dev_get_drvdata(dev);
  551. struct device_node *dev_node;
  552. int irq = 0, ret = 0;
  553. if (!priv)
  554. return;
  555. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  556. if (!dev_node) {
  557. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  558. return;
  559. }
  560. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  561. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  562. ret = irq = of_irq_get_byname(dev_node,
  563. "qcom,smp2p-soc-wake-ack");
  564. if (ret < 0) {
  565. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  566. irq);
  567. return;
  568. }
  569. }
  570. ret = devm_request_threaded_irq(dev, irq, NULL,
  571. fw_soc_wake_ack_handler,
  572. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  573. IRQF_TRIGGER_FALLING,
  574. "wlanfw-soc-wake-ack", priv);
  575. if (ret < 0) {
  576. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  577. irq, ret);
  578. return;
  579. }
  580. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  581. priv->fw_soc_wake_ack_irq = irq;
  582. }
  583. int icnss_call_driver_uevent(struct icnss_priv *priv,
  584. enum icnss_uevent uevent, void *data)
  585. {
  586. struct icnss_uevent_data uevent_data;
  587. if (!priv->ops || !priv->ops->uevent)
  588. return 0;
  589. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  590. priv->state, uevent);
  591. uevent_data.uevent = uevent;
  592. uevent_data.data = data;
  593. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  594. }
  595. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  596. {
  597. int i;
  598. int ret = 0;
  599. ret = icnss_qmi_get_dms_mac(priv);
  600. if (ret == 0 && priv->dms.mac_valid)
  601. goto qmi_send;
  602. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  603. * Thus assert on failure to get MAC from DMS even after retries
  604. */
  605. if (priv->use_nv_mac) {
  606. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  607. if (priv->dms.mac_valid)
  608. break;
  609. ret = icnss_qmi_get_dms_mac(priv);
  610. if (ret != -EAGAIN)
  611. break;
  612. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  613. }
  614. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  615. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  616. ICNSS_ASSERT(0);
  617. return -EINVAL;
  618. }
  619. }
  620. qmi_send:
  621. if (priv->dms.mac_valid)
  622. ret =
  623. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  624. ARRAY_SIZE(priv->dms.mac));
  625. return ret;
  626. }
  627. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  628. enum smp2p_out_entry smp2p_entry)
  629. {
  630. int retry = 0;
  631. int error;
  632. if (priv->smp2p_info[smp2p_entry].smem_state)
  633. return;
  634. retry:
  635. priv->smp2p_info[smp2p_entry].smem_state =
  636. qcom_smem_state_get(&priv->pdev->dev,
  637. icnss_smp2p_str[smp2p_entry],
  638. &priv->smp2p_info[smp2p_entry].smem_bit);
  639. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  640. if (retry++ < SMP2P_GET_MAX_RETRY) {
  641. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  642. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  643. error, icnss_smp2p_str[smp2p_entry]);
  644. msleep(SMP2P_GET_RETRY_DELAY_MS);
  645. goto retry;
  646. }
  647. ICNSS_ASSERT(0);
  648. return;
  649. }
  650. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  651. }
  652. static inline
  653. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  654. {
  655. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  656. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  657. } else {
  658. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  659. }
  660. }
  661. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  662. {
  663. switch (val) {
  664. case WLAN_RF_SLATE:
  665. return WLFW_WLAN_RF_SLATE_V01;
  666. case WLAN_RF_APACHE:
  667. return WLFW_WLAN_RF_APACHE_V01;
  668. default:
  669. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  670. }
  671. }
  672. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  673. void *data)
  674. {
  675. int ret = 0;
  676. int temp = 0;
  677. bool ignore_assert = false;
  678. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  679. if (!priv)
  680. return -ENODEV;
  681. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  682. clear_bit(ICNSS_FW_DOWN, &priv->state);
  683. clear_bit(ICNSS_FW_READY, &priv->state);
  684. icnss_ignore_fw_timeout(false);
  685. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  686. icnss_pr_err("QMI Server already in Connected State\n");
  687. ICNSS_ASSERT(0);
  688. }
  689. ret = icnss_connect_to_fw_server(priv, data);
  690. if (ret)
  691. goto fail;
  692. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  693. if (priv->is_slate_rfa) {
  694. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  695. reinit_completion(&priv->slate_boot_complete);
  696. icnss_pr_dbg("Waiting for slate boot up notification, 0x%lx\n",
  697. priv->state);
  698. wait_for_completion(&priv->slate_boot_complete);
  699. }
  700. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  701. icnss_pr_info("sent wlan boot init command\n");
  702. }
  703. ret = wlfw_ind_register_send_sync_msg(priv);
  704. if (ret < 0) {
  705. if (ret == -EALREADY) {
  706. ret = 0;
  707. goto qmi_registered;
  708. }
  709. ignore_assert = true;
  710. goto fail;
  711. }
  712. if (priv->is_rf_subtype_valid) {
  713. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  714. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  715. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  716. if (ret < 0)
  717. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  718. ret);
  719. } else {
  720. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  721. priv->rf_subtype);
  722. }
  723. }
  724. if (priv->device_id == WCN6750_DEVICE_ID) {
  725. if (!icnss_get_temperature(priv, &temp)) {
  726. icnss_pr_dbg("Temperature: %d\n", temp);
  727. if (temp < WLAN_EN_TEMP_THRESHOLD)
  728. icnss_set_wlan_en_delay(priv);
  729. }
  730. ret = wlfw_host_cap_send_sync(priv);
  731. if (ret < 0)
  732. goto fail;
  733. }
  734. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  735. if (!priv->msa_va) {
  736. icnss_pr_err("Invalid MSA address\n");
  737. ret = -EINVAL;
  738. goto fail;
  739. }
  740. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  741. if (ret < 0) {
  742. ignore_assert = true;
  743. goto fail;
  744. }
  745. ret = wlfw_msa_ready_send_sync_msg(priv);
  746. if (ret < 0) {
  747. ignore_assert = true;
  748. goto fail;
  749. }
  750. }
  751. ret = wlfw_cap_send_sync_msg(priv);
  752. if (ret < 0) {
  753. ignore_assert = true;
  754. goto fail;
  755. }
  756. ret = icnss_hw_power_on(priv);
  757. if (ret)
  758. goto fail;
  759. if (priv->device_id == WCN6750_DEVICE_ID) {
  760. ret = wlfw_device_info_send_msg(priv);
  761. if (ret < 0) {
  762. ignore_assert = true;
  763. goto device_info_failure;
  764. }
  765. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  766. priv->mem_base_pa,
  767. priv->mem_base_size);
  768. if (!priv->mem_base_va) {
  769. icnss_pr_err("Ioremap failed for bar address\n");
  770. goto device_info_failure;
  771. }
  772. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  773. &priv->mem_base_pa,
  774. priv->mem_base_va);
  775. if (priv->mhi_state_info_pa)
  776. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  777. priv->mhi_state_info_pa,
  778. PAGE_SIZE);
  779. if (!priv->mhi_state_info_va)
  780. icnss_pr_err("Ioremap failed for MHI info address\n");
  781. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  782. &priv->mhi_state_info_pa,
  783. priv->mhi_state_info_va);
  784. }
  785. if (priv->bdf_download_support) {
  786. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  787. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  788. priv->ctrl_params.bdf_type);
  789. if (ret < 0)
  790. goto device_info_failure;
  791. }
  792. if (priv->device_id == WCN6750_DEVICE_ID) {
  793. if (!priv->fw_soc_wake_ack_irq)
  794. register_soc_wake_notif(&priv->pdev->dev);
  795. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  796. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  797. }
  798. if (priv->wpss_supported)
  799. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  800. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  801. if (priv->bdf_download_support) {
  802. ret = wlfw_cal_report_req(priv);
  803. if (ret < 0)
  804. goto device_info_failure;
  805. }
  806. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  807. dynamic_feature_mask);
  808. }
  809. if (!priv->fw_error_fatal_irq)
  810. register_fw_error_notifications(&priv->pdev->dev);
  811. if (!priv->fw_early_crash_irq)
  812. register_early_crash_notifications(&priv->pdev->dev);
  813. if (priv->psf_supported)
  814. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  815. return ret;
  816. device_info_failure:
  817. icnss_hw_power_off(priv);
  818. fail:
  819. ICNSS_ASSERT(ignore_assert);
  820. qmi_registered:
  821. return ret;
  822. }
  823. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  824. {
  825. if (!priv)
  826. return -ENODEV;
  827. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  828. icnss_clear_server(priv);
  829. if (priv->psf_supported)
  830. priv->last_updated_voltage = 0;
  831. return 0;
  832. }
  833. static int icnss_call_driver_probe(struct icnss_priv *priv)
  834. {
  835. int ret = 0;
  836. int probe_cnt = 0;
  837. if (!priv->ops || !priv->ops->probe)
  838. return 0;
  839. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  840. return -EINVAL;
  841. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  842. icnss_hw_power_on(priv);
  843. icnss_block_shutdown(true);
  844. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  845. ret = priv->ops->probe(&priv->pdev->dev);
  846. probe_cnt++;
  847. if (ret != -EPROBE_DEFER)
  848. break;
  849. }
  850. if (ret < 0) {
  851. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  852. ret, priv->state, probe_cnt);
  853. icnss_block_shutdown(false);
  854. goto out;
  855. }
  856. icnss_block_shutdown(false);
  857. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  858. return 0;
  859. out:
  860. icnss_hw_power_off(priv);
  861. return ret;
  862. }
  863. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  864. {
  865. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  866. goto out;
  867. if (!priv->ops || !priv->ops->shutdown)
  868. goto out;
  869. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  870. goto out;
  871. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  872. priv->ops->shutdown(&priv->pdev->dev);
  873. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  874. out:
  875. return 0;
  876. }
  877. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  878. {
  879. int ret = 0;
  880. icnss_pm_relax(priv);
  881. icnss_call_driver_shutdown(priv);
  882. clear_bit(ICNSS_PDR, &priv->state);
  883. clear_bit(ICNSS_REJUVENATE, &priv->state);
  884. clear_bit(ICNSS_PD_RESTART, &priv->state);
  885. priv->early_crash_ind = false;
  886. priv->is_ssr = false;
  887. if (!priv->ops || !priv->ops->reinit)
  888. goto out;
  889. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  890. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  891. priv->state);
  892. goto out;
  893. }
  894. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  895. goto call_probe;
  896. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  897. icnss_hw_power_on(priv);
  898. icnss_block_shutdown(true);
  899. ret = priv->ops->reinit(&priv->pdev->dev);
  900. if (ret < 0) {
  901. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  902. ret, priv->state);
  903. if (!priv->allow_recursive_recovery)
  904. ICNSS_ASSERT(false);
  905. icnss_block_shutdown(false);
  906. goto out_power_off;
  907. }
  908. icnss_block_shutdown(false);
  909. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  910. return 0;
  911. call_probe:
  912. return icnss_call_driver_probe(priv);
  913. out_power_off:
  914. icnss_hw_power_off(priv);
  915. out:
  916. return ret;
  917. }
  918. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  919. {
  920. int ret = 0;
  921. if (!priv)
  922. return -ENODEV;
  923. set_bit(ICNSS_FW_READY, &priv->state);
  924. clear_bit(ICNSS_MODE_ON, &priv->state);
  925. atomic_set(&priv->soc_wake_ref_count, 0);
  926. if (priv->device_id == WCN6750_DEVICE_ID)
  927. icnss_free_qdss_mem(priv);
  928. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  929. icnss_hw_power_off(priv);
  930. if (!priv->pdev) {
  931. icnss_pr_err("Device is not ready\n");
  932. ret = -ENODEV;
  933. goto out;
  934. }
  935. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state)) {
  936. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  937. icnss_pr_info("sent wlan boot complete command\n");
  938. }
  939. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  940. ret = icnss_pd_restart_complete(priv);
  941. } else {
  942. if (priv->wpss_supported)
  943. icnss_setup_dms_mac(priv);
  944. ret = icnss_call_driver_probe(priv);
  945. }
  946. icnss_vreg_unvote(priv);
  947. out:
  948. return ret;
  949. }
  950. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  951. {
  952. int ret = 0;
  953. if (!priv)
  954. return -ENODEV;
  955. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  956. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  957. icnss_pr_info("Failed to download qdss configuration file");
  958. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state))
  959. ret = wlfw_wlan_mode_send_sync_msg(priv,
  960. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  961. else
  962. icnss_driver_event_fw_ready_ind(priv, NULL);
  963. return ret;
  964. }
  965. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  966. {
  967. struct platform_device *pdev = priv->pdev;
  968. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  969. int i, j;
  970. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  971. if (!qdss_mem[i].va && qdss_mem[i].size) {
  972. qdss_mem[i].va =
  973. dma_alloc_coherent(&pdev->dev,
  974. qdss_mem[i].size,
  975. &qdss_mem[i].pa,
  976. GFP_KERNEL);
  977. if (!qdss_mem[i].va) {
  978. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  979. qdss_mem[i].size,
  980. qdss_mem[i].type, i);
  981. break;
  982. }
  983. }
  984. }
  985. /* Best-effort allocation for QDSS trace */
  986. if (i < priv->qdss_mem_seg_len) {
  987. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  988. qdss_mem[j].type = 0;
  989. qdss_mem[j].size = 0;
  990. }
  991. priv->qdss_mem_seg_len = i;
  992. }
  993. return 0;
  994. }
  995. void icnss_free_qdss_mem(struct icnss_priv *priv)
  996. {
  997. struct platform_device *pdev = priv->pdev;
  998. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  999. int i;
  1000. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1001. if (qdss_mem[i].va && qdss_mem[i].size) {
  1002. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1003. &qdss_mem[i].pa, qdss_mem[i].size,
  1004. qdss_mem[i].type);
  1005. dma_free_coherent(&pdev->dev,
  1006. qdss_mem[i].size, qdss_mem[i].va,
  1007. qdss_mem[i].pa);
  1008. qdss_mem[i].va = NULL;
  1009. qdss_mem[i].pa = 0;
  1010. qdss_mem[i].size = 0;
  1011. qdss_mem[i].type = 0;
  1012. }
  1013. }
  1014. priv->qdss_mem_seg_len = 0;
  1015. }
  1016. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1017. {
  1018. int ret = 0;
  1019. ret = icnss_alloc_qdss_mem(priv);
  1020. if (ret < 0)
  1021. return ret;
  1022. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1023. }
  1024. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1025. u64 pa, u32 size, int *seg_id)
  1026. {
  1027. int i = 0;
  1028. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1029. u64 offset = 0;
  1030. void *va = NULL;
  1031. u64 local_pa;
  1032. u32 local_size;
  1033. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1034. local_pa = (u64)qdss_mem[i].pa;
  1035. local_size = (u32)qdss_mem[i].size;
  1036. if (pa == local_pa && size <= local_size) {
  1037. va = qdss_mem[i].va;
  1038. break;
  1039. }
  1040. if (pa > local_pa &&
  1041. pa < local_pa + local_size &&
  1042. pa + size <= local_pa + local_size) {
  1043. offset = pa - local_pa;
  1044. va = qdss_mem[i].va + offset;
  1045. break;
  1046. }
  1047. }
  1048. *seg_id = i;
  1049. return va;
  1050. }
  1051. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1052. void *data)
  1053. {
  1054. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1055. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1056. int ret = 0;
  1057. int i;
  1058. void *va = NULL;
  1059. u64 pa;
  1060. u32 size;
  1061. int seg_id = 0;
  1062. if (!priv->qdss_mem_seg_len) {
  1063. icnss_pr_err("Memory for QDSS trace is not available\n");
  1064. return -ENOMEM;
  1065. }
  1066. if (event_data->mem_seg_len == 0) {
  1067. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1068. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1069. ICNSS_GENL_MSG_TYPE_QDSS,
  1070. event_data->file_name,
  1071. qdss_mem[i].size);
  1072. if (ret < 0) {
  1073. icnss_pr_err("Fail to save QDSS data: %d\n",
  1074. ret);
  1075. break;
  1076. }
  1077. }
  1078. } else {
  1079. for (i = 0; i < event_data->mem_seg_len; i++) {
  1080. pa = event_data->mem_seg[i].addr;
  1081. size = event_data->mem_seg[i].size;
  1082. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1083. size, &seg_id);
  1084. if (!va) {
  1085. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1086. &pa);
  1087. ret = -EINVAL;
  1088. break;
  1089. }
  1090. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1091. event_data->file_name, size);
  1092. if (ret < 0) {
  1093. icnss_pr_err("Fail to save QDSS data: %d\n",
  1094. ret);
  1095. break;
  1096. }
  1097. }
  1098. }
  1099. kfree(data);
  1100. return ret;
  1101. }
  1102. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1103. {
  1104. int dec, c = atomic_read(v);
  1105. do {
  1106. dec = c - 1;
  1107. if (unlikely(dec < 1))
  1108. break;
  1109. } while (!atomic_try_cmpxchg(v, &c, dec));
  1110. return dec;
  1111. }
  1112. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1113. void *data)
  1114. {
  1115. int ret = 0;
  1116. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1117. if (!priv)
  1118. return -ENODEV;
  1119. if (!data)
  1120. return -EINVAL;
  1121. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1122. event_data->total_size);
  1123. kfree(data);
  1124. return ret;
  1125. }
  1126. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1127. {
  1128. int ret = 0;
  1129. if (!priv)
  1130. return -ENODEV;
  1131. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1132. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1133. atomic_read(&priv->soc_wake_ref_count));
  1134. return 0;
  1135. }
  1136. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1137. ICNSS_SMP2P_OUT_SOC_WAKE);
  1138. if (!ret)
  1139. atomic_inc(&priv->soc_wake_ref_count);
  1140. return ret;
  1141. }
  1142. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1143. {
  1144. int ret = 0;
  1145. if (!priv)
  1146. return -ENODEV;
  1147. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1148. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1149. priv->soc_wake_ref_count);
  1150. return 0;
  1151. }
  1152. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1153. ICNSS_SMP2P_OUT_SOC_WAKE);
  1154. return ret;
  1155. }
  1156. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1157. void *data)
  1158. {
  1159. int ret = 0;
  1160. int probe_cnt = 0;
  1161. if (priv->ops)
  1162. return -EEXIST;
  1163. priv->ops = data;
  1164. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1165. set_bit(ICNSS_FW_READY, &priv->state);
  1166. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1167. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1168. priv->state);
  1169. return -ENODEV;
  1170. }
  1171. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1172. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1173. priv->state);
  1174. goto out;
  1175. }
  1176. ret = icnss_hw_power_on(priv);
  1177. if (ret)
  1178. goto out;
  1179. icnss_block_shutdown(true);
  1180. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1181. ret = priv->ops->probe(&priv->pdev->dev);
  1182. probe_cnt++;
  1183. if (ret != -EPROBE_DEFER)
  1184. break;
  1185. }
  1186. if (ret) {
  1187. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1188. ret, priv->state, probe_cnt);
  1189. icnss_block_shutdown(false);
  1190. goto power_off;
  1191. }
  1192. icnss_block_shutdown(false);
  1193. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1194. return 0;
  1195. power_off:
  1196. icnss_hw_power_off(priv);
  1197. out:
  1198. return ret;
  1199. }
  1200. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1201. void *data)
  1202. {
  1203. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1204. priv->ops = NULL;
  1205. goto out;
  1206. }
  1207. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1208. icnss_block_shutdown(true);
  1209. if (priv->ops)
  1210. priv->ops->remove(&priv->pdev->dev);
  1211. icnss_block_shutdown(false);
  1212. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1213. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1214. priv->ops = NULL;
  1215. icnss_hw_power_off(priv);
  1216. out:
  1217. return 0;
  1218. }
  1219. static int icnss_fw_crashed(struct icnss_priv *priv,
  1220. struct icnss_event_pd_service_down_data *event_data)
  1221. {
  1222. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1223. set_bit(ICNSS_PD_RESTART, &priv->state);
  1224. clear_bit(ICNSS_FW_READY, &priv->state);
  1225. icnss_pm_stay_awake(priv);
  1226. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1227. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1228. if (event_data && event_data->fw_rejuvenate)
  1229. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1230. return 0;
  1231. }
  1232. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1233. struct icnss_uevent_hang_data *hang_data)
  1234. {
  1235. if (!priv->hang_event_data_va)
  1236. return -EINVAL;
  1237. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1238. priv->hang_event_data_len,
  1239. GFP_ATOMIC);
  1240. if (!priv->hang_event_data)
  1241. return -ENOMEM;
  1242. // Update the hang event params
  1243. hang_data->hang_event_data = priv->hang_event_data;
  1244. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1245. return 0;
  1246. }
  1247. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1248. {
  1249. struct icnss_uevent_hang_data hang_data = {0};
  1250. int ret = 0xFF;
  1251. if (priv->early_crash_ind) {
  1252. ret = icnss_update_hang_event_data(priv, &hang_data);
  1253. if (ret)
  1254. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1255. }
  1256. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1257. &hang_data);
  1258. if (!ret) {
  1259. kfree(priv->hang_event_data);
  1260. priv->hang_event_data = NULL;
  1261. }
  1262. return 0;
  1263. }
  1264. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1265. void *data)
  1266. {
  1267. struct icnss_event_pd_service_down_data *event_data = data;
  1268. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1269. icnss_ignore_fw_timeout(false);
  1270. goto out;
  1271. }
  1272. if (priv->force_err_fatal)
  1273. ICNSS_ASSERT(0);
  1274. if (priv->device_id == WCN6750_DEVICE_ID) {
  1275. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1276. ICNSS_SMP2P_OUT_SOC_WAKE);
  1277. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1278. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1279. }
  1280. if (priv->wpss_supported)
  1281. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1282. ICNSS_SMP2P_OUT_POWER_SAVE);
  1283. icnss_send_hang_event_data(priv);
  1284. if (priv->early_crash_ind) {
  1285. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1286. event_data->crashed, priv->state);
  1287. goto out;
  1288. }
  1289. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1290. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1291. event_data->crashed, priv->state);
  1292. if (!priv->allow_recursive_recovery)
  1293. ICNSS_ASSERT(0);
  1294. goto out;
  1295. }
  1296. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1297. icnss_fw_crashed(priv, event_data);
  1298. out:
  1299. kfree(data);
  1300. return 0;
  1301. }
  1302. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1303. void *data)
  1304. {
  1305. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1306. icnss_ignore_fw_timeout(false);
  1307. goto out;
  1308. }
  1309. priv->early_crash_ind = true;
  1310. icnss_fw_crashed(priv, NULL);
  1311. out:
  1312. kfree(data);
  1313. return 0;
  1314. }
  1315. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1316. void *data)
  1317. {
  1318. int ret = 0;
  1319. if (!priv->ops || !priv->ops->idle_shutdown)
  1320. return 0;
  1321. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1322. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1323. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1324. ret = -EBUSY;
  1325. } else {
  1326. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1327. priv->state);
  1328. icnss_block_shutdown(true);
  1329. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1330. icnss_block_shutdown(false);
  1331. }
  1332. return ret;
  1333. }
  1334. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1335. void *data)
  1336. {
  1337. int ret = 0;
  1338. if (!priv->ops || !priv->ops->idle_restart)
  1339. return 0;
  1340. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1341. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1342. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1343. ret = -EBUSY;
  1344. } else {
  1345. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1346. priv->state);
  1347. icnss_block_shutdown(true);
  1348. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1349. icnss_block_shutdown(false);
  1350. }
  1351. return ret;
  1352. }
  1353. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1354. {
  1355. icnss_free_qdss_mem(priv);
  1356. return 0;
  1357. }
  1358. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1359. void *data)
  1360. {
  1361. struct icnss_m3_upload_segments_req_data *event_data = data;
  1362. struct qcom_dump_segment segment;
  1363. int i, status = 0, ret = 0;
  1364. struct list_head head;
  1365. if (!dump_enabled()) {
  1366. icnss_pr_info("Dump collection is not enabled\n");
  1367. return ret;
  1368. }
  1369. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1370. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1371. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1372. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1373. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1374. return ret;
  1375. INIT_LIST_HEAD(&head);
  1376. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1377. memset(&segment, 0, sizeof(segment));
  1378. segment.va = devm_ioremap(&priv->pdev->dev,
  1379. event_data->m3_segment[i].addr,
  1380. event_data->m3_segment[i].size);
  1381. if (!segment.va) {
  1382. icnss_pr_err("Failed to ioremap M3 Dump region");
  1383. ret = -ENOMEM;
  1384. goto send_resp;
  1385. }
  1386. segment.size = event_data->m3_segment[i].size;
  1387. list_add(&segment.node, &head);
  1388. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1389. event_data->m3_segment[i].name);
  1390. switch (event_data->m3_segment[i].type) {
  1391. case QMI_M3_SEGMENT_PHYAREG_V01:
  1392. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1393. break;
  1394. case QMI_M3_SEGMENT_PHYDBG_V01:
  1395. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1396. break;
  1397. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1398. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1399. break;
  1400. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1401. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1402. break;
  1403. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1404. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1405. break;
  1406. default:
  1407. icnss_pr_err("Invalid Segment type: %d",
  1408. event_data->m3_segment[i].type);
  1409. }
  1410. if (ret) {
  1411. status = ret;
  1412. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1413. event_data->m3_segment[i].name, ret);
  1414. }
  1415. list_del(&segment.node);
  1416. }
  1417. send_resp:
  1418. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1419. status);
  1420. return ret;
  1421. }
  1422. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1423. {
  1424. int ret = 0;
  1425. struct icnss_subsys_restart_level_data *event_data = data;
  1426. if (!priv)
  1427. return -ENODEV;
  1428. if (!data)
  1429. return -EINVAL;
  1430. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1431. kfree(data);
  1432. return ret;
  1433. }
  1434. static void icnss_driver_event_work(struct work_struct *work)
  1435. {
  1436. struct icnss_priv *priv =
  1437. container_of(work, struct icnss_priv, event_work);
  1438. struct icnss_driver_event *event;
  1439. unsigned long flags;
  1440. int ret;
  1441. icnss_pm_stay_awake(priv);
  1442. spin_lock_irqsave(&priv->event_lock, flags);
  1443. while (!list_empty(&priv->event_list)) {
  1444. event = list_first_entry(&priv->event_list,
  1445. struct icnss_driver_event, list);
  1446. list_del(&event->list);
  1447. spin_unlock_irqrestore(&priv->event_lock, flags);
  1448. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1449. icnss_driver_event_to_str(event->type),
  1450. event->sync ? "-sync" : "", event->type,
  1451. priv->state);
  1452. switch (event->type) {
  1453. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1454. ret = icnss_driver_event_server_arrive(priv,
  1455. event->data);
  1456. break;
  1457. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1458. ret = icnss_driver_event_server_exit(priv);
  1459. break;
  1460. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1461. ret = icnss_driver_event_fw_ready_ind(priv,
  1462. event->data);
  1463. break;
  1464. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1465. ret = icnss_driver_event_register_driver(priv,
  1466. event->data);
  1467. break;
  1468. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1469. ret = icnss_driver_event_unregister_driver(priv,
  1470. event->data);
  1471. break;
  1472. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1473. ret = icnss_driver_event_pd_service_down(priv,
  1474. event->data);
  1475. break;
  1476. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1477. ret = icnss_driver_event_early_crash_ind(priv,
  1478. event->data);
  1479. break;
  1480. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1481. ret = icnss_driver_event_idle_shutdown(priv,
  1482. event->data);
  1483. break;
  1484. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1485. ret = icnss_driver_event_idle_restart(priv,
  1486. event->data);
  1487. break;
  1488. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1489. ret = icnss_driver_event_fw_init_done(priv,
  1490. event->data);
  1491. break;
  1492. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1493. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1494. break;
  1495. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1496. ret = icnss_qdss_trace_save_hdlr(priv,
  1497. event->data);
  1498. break;
  1499. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1500. ret = icnss_qdss_trace_free_hdlr(priv);
  1501. break;
  1502. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1503. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1504. break;
  1505. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1506. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1507. event->data);
  1508. break;
  1509. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1510. ret = icnss_subsys_restart_level(priv, event->data);
  1511. break;
  1512. default:
  1513. icnss_pr_err("Invalid Event type: %d", event->type);
  1514. kfree(event);
  1515. continue;
  1516. }
  1517. priv->stats.events[event->type].processed++;
  1518. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1519. icnss_driver_event_to_str(event->type),
  1520. event->sync ? "-sync" : "", event->type, ret,
  1521. priv->state);
  1522. spin_lock_irqsave(&priv->event_lock, flags);
  1523. if (event->sync) {
  1524. event->ret = ret;
  1525. complete(&event->complete);
  1526. continue;
  1527. }
  1528. spin_unlock_irqrestore(&priv->event_lock, flags);
  1529. kfree(event);
  1530. spin_lock_irqsave(&priv->event_lock, flags);
  1531. }
  1532. spin_unlock_irqrestore(&priv->event_lock, flags);
  1533. icnss_pm_relax(priv);
  1534. }
  1535. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1536. {
  1537. struct icnss_priv *priv =
  1538. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1539. struct icnss_soc_wake_event *event;
  1540. unsigned long flags;
  1541. int ret;
  1542. icnss_pm_stay_awake(priv);
  1543. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1544. while (!list_empty(&priv->soc_wake_msg_list)) {
  1545. event = list_first_entry(&priv->soc_wake_msg_list,
  1546. struct icnss_soc_wake_event, list);
  1547. list_del(&event->list);
  1548. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1549. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1550. icnss_soc_wake_event_to_str(event->type),
  1551. event->sync ? "-sync" : "", event->type,
  1552. priv->state);
  1553. switch (event->type) {
  1554. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1555. ret = icnss_event_soc_wake_request(priv,
  1556. event->data);
  1557. break;
  1558. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1559. ret = icnss_event_soc_wake_release(priv,
  1560. event->data);
  1561. break;
  1562. default:
  1563. icnss_pr_err("Invalid Event type: %d", event->type);
  1564. kfree(event);
  1565. continue;
  1566. }
  1567. priv->stats.soc_wake_events[event->type].processed++;
  1568. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1569. icnss_soc_wake_event_to_str(event->type),
  1570. event->sync ? "-sync" : "", event->type, ret,
  1571. priv->state);
  1572. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1573. if (event->sync) {
  1574. event->ret = ret;
  1575. complete(&event->complete);
  1576. continue;
  1577. }
  1578. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1579. kfree(event);
  1580. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1581. }
  1582. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1583. icnss_pm_relax(priv);
  1584. }
  1585. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1586. {
  1587. int ret = 0;
  1588. struct qcom_dump_segment segment;
  1589. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1590. struct list_head head;
  1591. if (!dump_enabled()) {
  1592. icnss_pr_info("Dump collection is not enabled\n");
  1593. return ret;
  1594. }
  1595. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1596. return ret;
  1597. INIT_LIST_HEAD(&head);
  1598. memset(&segment, 0, sizeof(segment));
  1599. segment.va = priv->msa_va;
  1600. segment.size = priv->msa_mem_size;
  1601. list_add(&segment.node, &head);
  1602. if (!msa0_dump_dev->dev) {
  1603. icnss_pr_err("Created Dump Device not found\n");
  1604. return 0;
  1605. }
  1606. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1607. if (ret) {
  1608. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1609. return ret;
  1610. }
  1611. list_del(&segment.node);
  1612. return ret;
  1613. }
  1614. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1615. void *data)
  1616. {
  1617. struct qcom_ssr_notify_data *notif = data;
  1618. int ret = 0;
  1619. if (!notif->crashed) {
  1620. if (atomic_read(&priv->is_shutdown)) {
  1621. atomic_set(&priv->is_shutdown, false);
  1622. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1623. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1624. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1625. clear_bit(ICNSS_FW_READY, &priv->state);
  1626. icnss_driver_event_post(priv,
  1627. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1628. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1629. NULL);
  1630. }
  1631. }
  1632. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1633. if (!wait_for_completion_timeout(
  1634. &priv->unblock_shutdown,
  1635. msecs_to_jiffies(PROBE_TIMEOUT)))
  1636. icnss_pr_err("modem block shutdown timeout\n");
  1637. }
  1638. ret = wlfw_send_modem_shutdown_msg(priv);
  1639. if (ret < 0)
  1640. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1641. ret);
  1642. }
  1643. }
  1644. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1645. {
  1646. switch (code) {
  1647. case QCOM_SSR_BEFORE_POWERUP:
  1648. return "BEFORE_POWERUP";
  1649. case QCOM_SSR_AFTER_POWERUP:
  1650. return "AFTER_POWERUP";
  1651. case QCOM_SSR_BEFORE_SHUTDOWN:
  1652. return "BEFORE_SHUTDOWN";
  1653. case QCOM_SSR_AFTER_SHUTDOWN:
  1654. return "AFTER_SHUTDOWN";
  1655. default:
  1656. return "UNKNOWN";
  1657. }
  1658. };
  1659. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1660. unsigned long code,
  1661. void *data)
  1662. {
  1663. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1664. wpss_early_ssr_nb);
  1665. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1666. icnss_qcom_ssr_notify_state_to_str(code), code);
  1667. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1668. set_bit(ICNSS_FW_DOWN, &priv->state);
  1669. icnss_ignore_fw_timeout(true);
  1670. }
  1671. return NOTIFY_DONE;
  1672. }
  1673. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1674. unsigned long code,
  1675. void *data)
  1676. {
  1677. struct icnss_event_pd_service_down_data *event_data;
  1678. struct qcom_ssr_notify_data *notif = data;
  1679. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1680. wpss_ssr_nb);
  1681. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1682. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1683. icnss_qcom_ssr_notify_state_to_str(code), code);
  1684. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1685. icnss_pr_info("Collecting msa0 segment dump\n");
  1686. icnss_msa0_ramdump(priv);
  1687. goto out;
  1688. }
  1689. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1690. goto out;
  1691. priv->is_ssr = true;
  1692. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1693. priv->state, notif->crashed);
  1694. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1695. icnss_update_state_send_modem_shutdown(priv, data);
  1696. set_bit(ICNSS_FW_DOWN, &priv->state);
  1697. icnss_ignore_fw_timeout(true);
  1698. if (notif->crashed)
  1699. priv->stats.recovery.root_pd_crash++;
  1700. else
  1701. priv->stats.recovery.root_pd_shutdown++;
  1702. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1703. if (event_data == NULL)
  1704. return notifier_from_errno(-ENOMEM);
  1705. event_data->crashed = notif->crashed;
  1706. fw_down_data.crashed = !!notif->crashed;
  1707. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1708. clear_bit(ICNSS_FW_READY, &priv->state);
  1709. fw_down_data.crashed = !!notif->crashed;
  1710. icnss_call_driver_uevent(priv,
  1711. ICNSS_UEVENT_FW_DOWN,
  1712. &fw_down_data);
  1713. }
  1714. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1715. ICNSS_EVENT_SYNC, event_data);
  1716. out:
  1717. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1718. return NOTIFY_OK;
  1719. }
  1720. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1721. unsigned long code,
  1722. void *data)
  1723. {
  1724. struct icnss_event_pd_service_down_data *event_data;
  1725. struct qcom_ssr_notify_data *notif = data;
  1726. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1727. modem_ssr_nb);
  1728. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1729. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1730. icnss_qcom_ssr_notify_state_to_str(code), code);
  1731. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1732. icnss_pr_info("Collecting msa0 segment dump\n");
  1733. icnss_msa0_ramdump(priv);
  1734. goto out;
  1735. }
  1736. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1737. goto out;
  1738. priv->is_ssr = true;
  1739. if (notif->crashed) {
  1740. priv->stats.recovery.root_pd_crash++;
  1741. priv->root_pd_shutdown = false;
  1742. } else {
  1743. priv->stats.recovery.root_pd_shutdown++;
  1744. priv->root_pd_shutdown = true;
  1745. }
  1746. icnss_update_state_send_modem_shutdown(priv, data);
  1747. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1748. set_bit(ICNSS_FW_DOWN, &priv->state);
  1749. icnss_ignore_fw_timeout(true);
  1750. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1751. clear_bit(ICNSS_FW_READY, &priv->state);
  1752. fw_down_data.crashed = !!notif->crashed;
  1753. icnss_call_driver_uevent(priv,
  1754. ICNSS_UEVENT_FW_DOWN,
  1755. &fw_down_data);
  1756. }
  1757. goto out;
  1758. }
  1759. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1760. priv->state, notif->crashed);
  1761. set_bit(ICNSS_FW_DOWN, &priv->state);
  1762. icnss_ignore_fw_timeout(true);
  1763. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1764. if (event_data == NULL)
  1765. return notifier_from_errno(-ENOMEM);
  1766. event_data->crashed = notif->crashed;
  1767. fw_down_data.crashed = !!notif->crashed;
  1768. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1769. clear_bit(ICNSS_FW_READY, &priv->state);
  1770. fw_down_data.crashed = !!notif->crashed;
  1771. icnss_call_driver_uevent(priv,
  1772. ICNSS_UEVENT_FW_DOWN,
  1773. &fw_down_data);
  1774. }
  1775. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1776. ICNSS_EVENT_SYNC, event_data);
  1777. out:
  1778. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1779. return NOTIFY_OK;
  1780. }
  1781. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1782. {
  1783. int ret = 0;
  1784. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1785. priv->wpss_early_notify_handler =
  1786. qcom_register_early_ssr_notifier("wpss",
  1787. &priv->wpss_early_ssr_nb);
  1788. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1789. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1790. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1791. }
  1792. return ret;
  1793. }
  1794. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1795. {
  1796. int ret = 0;
  1797. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1798. /*
  1799. * Assign priority of icnss wpss notifier callback over IPA
  1800. * modem notifier callback which is 0
  1801. */
  1802. priv->wpss_ssr_nb.priority = 1;
  1803. priv->wpss_notify_handler =
  1804. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1805. if (IS_ERR(priv->wpss_notify_handler)) {
  1806. ret = PTR_ERR(priv->wpss_notify_handler);
  1807. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1808. }
  1809. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1810. return ret;
  1811. }
  1812. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1813. unsigned long code,
  1814. void *data)
  1815. {
  1816. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1817. slate_ssr_nb);
  1818. int ret = 0;
  1819. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1820. if (code == QCOM_SSR_AFTER_POWERUP) {
  1821. set_bit(ICNSS_SLATE_UP, &priv->state);
  1822. complete(&priv->slate_boot_complete);
  1823. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1824. priv->state);
  1825. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1826. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1827. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1828. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1829. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1830. priv->state);
  1831. goto skip_pdr;
  1832. }
  1833. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1834. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1835. if (ret < 0) {
  1836. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1837. ret, priv->state);
  1838. goto skip_pdr;
  1839. }
  1840. }
  1841. skip_pdr:
  1842. return NOTIFY_OK;
  1843. }
  1844. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1845. {
  1846. int ret = 0;
  1847. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1848. priv->slate_notify_handler =
  1849. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1850. if (IS_ERR(priv->slate_notify_handler)) {
  1851. ret = PTR_ERR(priv->slate_notify_handler);
  1852. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1853. }
  1854. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1855. return ret;
  1856. }
  1857. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1858. {
  1859. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1860. return 0;
  1861. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1862. &priv->slate_ssr_nb);
  1863. priv->slate_notify_handler = NULL;
  1864. return 0;
  1865. }
  1866. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1867. {
  1868. int ret = 0;
  1869. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1870. /*
  1871. * Assign priority of icnss modem notifier callback over IPA
  1872. * modem notifier callback which is 0
  1873. */
  1874. priv->modem_ssr_nb.priority = 1;
  1875. priv->modem_notify_handler =
  1876. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1877. if (IS_ERR(priv->modem_notify_handler)) {
  1878. ret = PTR_ERR(priv->modem_notify_handler);
  1879. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1880. }
  1881. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1882. return ret;
  1883. }
  1884. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1885. {
  1886. if (IS_ERR(priv->wpss_early_notify_handler))
  1887. return;
  1888. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1889. &priv->wpss_early_ssr_nb);
  1890. priv->wpss_early_notify_handler = NULL;
  1891. }
  1892. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1893. {
  1894. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1895. return 0;
  1896. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1897. &priv->wpss_ssr_nb);
  1898. priv->wpss_notify_handler = NULL;
  1899. return 0;
  1900. }
  1901. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1902. {
  1903. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1904. return 0;
  1905. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1906. &priv->modem_ssr_nb);
  1907. priv->modem_notify_handler = NULL;
  1908. return 0;
  1909. }
  1910. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1911. {
  1912. struct icnss_priv *priv = priv_cb;
  1913. struct icnss_event_pd_service_down_data *event_data;
  1914. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1915. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1916. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1917. state, priv->state);
  1918. switch (state) {
  1919. case SERVREG_SERVICE_STATE_DOWN:
  1920. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1921. if (!event_data)
  1922. return;
  1923. event_data->crashed = true;
  1924. if (!priv->is_ssr) {
  1925. set_bit(ICNSS_PDR, &penv->state);
  1926. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1927. cause = ICNSS_HOST_ERROR;
  1928. priv->stats.recovery.pdr_host_error++;
  1929. } else {
  1930. cause = ICNSS_FW_CRASH;
  1931. priv->stats.recovery.pdr_fw_crash++;
  1932. }
  1933. } else if (priv->root_pd_shutdown) {
  1934. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1935. event_data->crashed = false;
  1936. }
  1937. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1938. priv->state, icnss_pdr_cause[cause]);
  1939. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1940. set_bit(ICNSS_FW_DOWN, &priv->state);
  1941. icnss_ignore_fw_timeout(true);
  1942. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1943. clear_bit(ICNSS_FW_READY, &priv->state);
  1944. fw_down_data.crashed = event_data->crashed;
  1945. icnss_call_driver_uevent(priv,
  1946. ICNSS_UEVENT_FW_DOWN,
  1947. &fw_down_data);
  1948. }
  1949. }
  1950. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1951. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1952. ICNSS_EVENT_SYNC, event_data);
  1953. break;
  1954. case SERVREG_SERVICE_STATE_UP:
  1955. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1956. break;
  1957. default:
  1958. break;
  1959. }
  1960. return;
  1961. }
  1962. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1963. {
  1964. struct pdr_handle *handle = NULL;
  1965. struct pdr_service *service = NULL;
  1966. int err = 0;
  1967. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1968. if (IS_ERR_OR_NULL(handle)) {
  1969. err = PTR_ERR(handle);
  1970. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1971. goto out;
  1972. }
  1973. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1974. if (IS_ERR_OR_NULL(service)) {
  1975. err = PTR_ERR(service);
  1976. icnss_pr_err("Failed to add lookup, err %d", err);
  1977. goto out;
  1978. }
  1979. priv->pdr_handle = handle;
  1980. priv->pdr_service = service;
  1981. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1982. icnss_pr_info("PDR registration happened");
  1983. out:
  1984. return err;
  1985. }
  1986. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  1987. {
  1988. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  1989. return;
  1990. pdr_handle_release(priv->pdr_handle);
  1991. }
  1992. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  1993. {
  1994. int ret = 0;
  1995. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  1996. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  1997. ret = PTR_ERR(priv->icnss_ramdump_class);
  1998. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  1999. return ret;
  2000. }
  2001. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2002. ICNSS_RAMDUMP_NAME);
  2003. if (ret < 0) {
  2004. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2005. goto fail_alloc_major;
  2006. }
  2007. return 0;
  2008. fail_alloc_major:
  2009. class_destroy(priv->icnss_ramdump_class);
  2010. return ret;
  2011. }
  2012. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2013. {
  2014. int ret = 0;
  2015. struct icnss_ramdump_info *ramdump_info;
  2016. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2017. if (!ramdump_info)
  2018. return ERR_PTR(-ENOMEM);
  2019. if (!dev_name) {
  2020. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2021. return NULL;
  2022. }
  2023. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2024. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2025. if (ramdump_info->minor < 0) {
  2026. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2027. ramdump_info->minor);
  2028. ret = -ENODEV;
  2029. goto fail_out_of_minors;
  2030. }
  2031. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2032. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2033. ramdump_info->minor),
  2034. ramdump_info, ramdump_info->name);
  2035. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2036. ret = PTR_ERR(ramdump_info->dev);
  2037. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2038. ramdump_info->name, ret);
  2039. goto fail_device_create;
  2040. }
  2041. return (void *)ramdump_info;
  2042. fail_device_create:
  2043. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2044. fail_out_of_minors:
  2045. kfree(ramdump_info);
  2046. return ERR_PTR(ret);
  2047. }
  2048. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2049. {
  2050. int ret = 0;
  2051. if (!priv || !priv->pdev) {
  2052. icnss_pr_err("Platform priv or pdev is NULL\n");
  2053. return -EINVAL;
  2054. }
  2055. ret = icnss_ramdump_devnode_init(priv);
  2056. if (ret)
  2057. return ret;
  2058. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2059. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2060. icnss_pr_err("Failed to create msa0 dump device!");
  2061. return -ENOMEM;
  2062. }
  2063. if (priv->device_id == WCN6750_DEVICE_ID) {
  2064. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2065. ICNSS_M3_SEGMENT(
  2066. ICNSS_M3_SEGMENT_PHYAREG));
  2067. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2068. !priv->m3_dump_phyareg->dev) {
  2069. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2070. return -ENOMEM;
  2071. }
  2072. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2073. ICNSS_M3_SEGMENT(
  2074. ICNSS_M3_SEGMENT_PHYA));
  2075. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2076. !priv->m3_dump_phydbg->dev) {
  2077. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2078. return -ENOMEM;
  2079. }
  2080. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2081. ICNSS_M3_SEGMENT(
  2082. ICNSS_M3_SEGMENT_WMACREG));
  2083. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2084. !priv->m3_dump_wmac0reg->dev) {
  2085. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2086. return -ENOMEM;
  2087. }
  2088. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2089. ICNSS_M3_SEGMENT(
  2090. ICNSS_M3_SEGMENT_WCSSDBG));
  2091. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2092. !priv->m3_dump_wcssdbg->dev) {
  2093. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2094. return -ENOMEM;
  2095. }
  2096. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2097. ICNSS_M3_SEGMENT(
  2098. ICNSS_M3_SEGMENT_PHYAM3));
  2099. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2100. !priv->m3_dump_phyapdmem->dev) {
  2101. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2102. return -ENOMEM;
  2103. }
  2104. }
  2105. return 0;
  2106. }
  2107. static int icnss_enable_recovery(struct icnss_priv *priv)
  2108. {
  2109. int ret;
  2110. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2111. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2112. return 0;
  2113. }
  2114. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2115. icnss_pr_dbg("SSR disabled through module parameter\n");
  2116. goto enable_pdr;
  2117. }
  2118. ret = icnss_register_ramdump_devices(priv);
  2119. if (ret)
  2120. return ret;
  2121. if (priv->wpss_supported) {
  2122. icnss_wpss_early_ssr_register_notifier(priv);
  2123. icnss_wpss_ssr_register_notifier(priv);
  2124. return 0;
  2125. }
  2126. icnss_modem_ssr_register_notifier(priv);
  2127. if (priv->is_slate_rfa)
  2128. icnss_slate_ssr_register_notifier(priv);
  2129. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2130. icnss_pr_dbg("PDR disabled through module parameter\n");
  2131. return 0;
  2132. }
  2133. enable_pdr:
  2134. ret = icnss_pd_restart_enable(priv);
  2135. if (ret)
  2136. return ret;
  2137. return 0;
  2138. }
  2139. static int icnss_dev_id_match(struct icnss_priv *priv,
  2140. struct device_info *dev_info)
  2141. {
  2142. while (dev_info->device_id) {
  2143. if (priv->device_id == dev_info->device_id)
  2144. return 1;
  2145. dev_info++;
  2146. }
  2147. return 0;
  2148. }
  2149. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2150. unsigned long *thermal_state)
  2151. {
  2152. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2153. *thermal_state = icnss_tcdev->max_thermal_state;
  2154. return 0;
  2155. }
  2156. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2157. unsigned long *thermal_state)
  2158. {
  2159. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2160. *thermal_state = icnss_tcdev->curr_thermal_state;
  2161. return 0;
  2162. }
  2163. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2164. unsigned long thermal_state)
  2165. {
  2166. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2167. struct device *dev = &penv->pdev->dev;
  2168. int ret = 0;
  2169. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2170. return 0;
  2171. if (thermal_state > icnss_tcdev->max_thermal_state)
  2172. return -EINVAL;
  2173. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2174. thermal_state, icnss_tcdev->tcdev_id);
  2175. mutex_lock(&penv->tcdev_lock);
  2176. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2177. icnss_tcdev->tcdev_id);
  2178. if (!ret)
  2179. icnss_tcdev->curr_thermal_state = thermal_state;
  2180. mutex_unlock(&penv->tcdev_lock);
  2181. if (ret) {
  2182. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2183. ret, icnss_tcdev->tcdev_id);
  2184. return ret;
  2185. }
  2186. return 0;
  2187. }
  2188. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2189. .get_max_state = icnss_tcdev_get_max_state,
  2190. .get_cur_state = icnss_tcdev_get_cur_state,
  2191. .set_cur_state = icnss_tcdev_set_cur_state,
  2192. };
  2193. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2194. int tcdev_id)
  2195. {
  2196. struct icnss_priv *priv = dev_get_drvdata(dev);
  2197. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2198. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2199. struct device_node *dev_node;
  2200. int ret = 0;
  2201. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2202. if (!icnss_tcdev)
  2203. return -ENOMEM;
  2204. icnss_tcdev->tcdev_id = tcdev_id;
  2205. icnss_tcdev->max_thermal_state = max_state;
  2206. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2207. "qcom,icnss_cdev%d", tcdev_id);
  2208. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2209. if (!dev_node) {
  2210. icnss_pr_err("Failed to get cooling device node\n");
  2211. return -EINVAL;
  2212. }
  2213. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2214. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2215. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2216. dev_node,
  2217. cdev_node_name, icnss_tcdev,
  2218. &icnss_cooling_ops);
  2219. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2220. ret = PTR_ERR(icnss_tcdev->tcdev);
  2221. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2222. ret, icnss_tcdev->tcdev_id);
  2223. } else {
  2224. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2225. icnss_tcdev->tcdev_id);
  2226. list_add(&icnss_tcdev->tcdev_list,
  2227. &priv->icnss_tcdev_list);
  2228. }
  2229. } else {
  2230. icnss_pr_dbg("Cooling device registration not supported");
  2231. ret = -EOPNOTSUPP;
  2232. }
  2233. return ret;
  2234. }
  2235. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2236. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2237. {
  2238. struct icnss_priv *priv = dev_get_drvdata(dev);
  2239. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2240. while (!list_empty(&priv->icnss_tcdev_list)) {
  2241. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2242. struct icnss_thermal_cdev,
  2243. tcdev_list);
  2244. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2245. list_del(&icnss_tcdev->tcdev_list);
  2246. kfree(icnss_tcdev);
  2247. }
  2248. }
  2249. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2250. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2251. unsigned long *thermal_state,
  2252. int tcdev_id)
  2253. {
  2254. struct icnss_priv *priv = dev_get_drvdata(dev);
  2255. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2256. mutex_lock(&priv->tcdev_lock);
  2257. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2258. if (icnss_tcdev->tcdev_id != tcdev_id)
  2259. continue;
  2260. *thermal_state = icnss_tcdev->curr_thermal_state;
  2261. mutex_unlock(&priv->tcdev_lock);
  2262. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2263. icnss_tcdev->curr_thermal_state, tcdev_id);
  2264. return 0;
  2265. }
  2266. mutex_unlock(&priv->tcdev_lock);
  2267. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2268. return -EINVAL;
  2269. }
  2270. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2271. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2272. int cmd_len, void *cb_ctx,
  2273. int (*cb)(void *ctx, void *event, int event_len))
  2274. {
  2275. struct icnss_priv *priv = icnss_get_plat_priv();
  2276. int ret;
  2277. if (!priv)
  2278. return -ENODEV;
  2279. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2280. return -EINVAL;
  2281. priv->get_info_cb = cb;
  2282. priv->get_info_cb_ctx = cb_ctx;
  2283. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2284. if (ret) {
  2285. priv->get_info_cb = NULL;
  2286. priv->get_info_cb_ctx = NULL;
  2287. }
  2288. return ret;
  2289. }
  2290. EXPORT_SYMBOL(icnss_qmi_send);
  2291. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2292. struct module *owner, const char *mod_name)
  2293. {
  2294. int ret = 0;
  2295. struct icnss_priv *priv = icnss_get_plat_priv();
  2296. if (!priv || !priv->pdev) {
  2297. ret = -ENODEV;
  2298. goto out;
  2299. }
  2300. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2301. if (priv->ops) {
  2302. icnss_pr_err("Driver already registered\n");
  2303. ret = -EEXIST;
  2304. goto out;
  2305. }
  2306. if (!ops->dev_info) {
  2307. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2308. return -EINVAL;
  2309. }
  2310. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2311. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2312. ops->dev_info->name);
  2313. return -ENODEV;
  2314. }
  2315. if (!ops->probe || !ops->remove) {
  2316. ret = -EINVAL;
  2317. goto out;
  2318. }
  2319. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2320. 0, ops);
  2321. if (ret == -EINTR)
  2322. ret = 0;
  2323. out:
  2324. return ret;
  2325. }
  2326. EXPORT_SYMBOL(__icnss_register_driver);
  2327. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2328. {
  2329. int ret;
  2330. struct icnss_priv *priv = icnss_get_plat_priv();
  2331. if (!priv || !priv->pdev) {
  2332. ret = -ENODEV;
  2333. goto out;
  2334. }
  2335. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2336. if (!priv->ops) {
  2337. icnss_pr_err("Driver not registered\n");
  2338. ret = -ENOENT;
  2339. goto out;
  2340. }
  2341. ret = icnss_driver_event_post(priv,
  2342. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2343. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2344. out:
  2345. return ret;
  2346. }
  2347. EXPORT_SYMBOL(icnss_unregister_driver);
  2348. static struct icnss_msi_config msi_config = {
  2349. .total_vectors = 28,
  2350. .total_users = 2,
  2351. .users = (struct icnss_msi_user[]) {
  2352. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2353. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2354. },
  2355. };
  2356. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2357. {
  2358. priv->msi_config = &msi_config;
  2359. return 0;
  2360. }
  2361. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2362. int *num_vectors, u32 *user_base_data,
  2363. u32 *base_vector)
  2364. {
  2365. struct icnss_priv *priv = dev_get_drvdata(dev);
  2366. struct icnss_msi_config *msi_config;
  2367. int idx;
  2368. if (!priv)
  2369. return -ENODEV;
  2370. msi_config = priv->msi_config;
  2371. if (!msi_config) {
  2372. icnss_pr_err("MSI is not supported.\n");
  2373. return -EINVAL;
  2374. }
  2375. for (idx = 0; idx < msi_config->total_users; idx++) {
  2376. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2377. *num_vectors = msi_config->users[idx].num_vectors;
  2378. *user_base_data = msi_config->users[idx].base_vector
  2379. + priv->msi_base_data;
  2380. *base_vector = msi_config->users[idx].base_vector;
  2381. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2382. user_name, *num_vectors, *user_base_data,
  2383. *base_vector);
  2384. return 0;
  2385. }
  2386. }
  2387. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2388. return -EINVAL;
  2389. }
  2390. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2391. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2392. {
  2393. struct icnss_priv *priv = dev_get_drvdata(dev);
  2394. int irq_num;
  2395. irq_num = priv->srng_irqs[vector];
  2396. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2397. irq_num, vector);
  2398. return irq_num;
  2399. }
  2400. EXPORT_SYMBOL(icnss_get_msi_irq);
  2401. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2402. u32 *msi_addr_high)
  2403. {
  2404. struct icnss_priv *priv = dev_get_drvdata(dev);
  2405. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2406. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2407. }
  2408. EXPORT_SYMBOL(icnss_get_msi_address);
  2409. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2410. irqreturn_t (*handler)(int, void *),
  2411. unsigned long flags, const char *name, void *ctx)
  2412. {
  2413. int ret = 0;
  2414. unsigned int irq;
  2415. struct ce_irq_list *irq_entry;
  2416. struct icnss_priv *priv = dev_get_drvdata(dev);
  2417. if (!priv || !priv->pdev) {
  2418. ret = -ENODEV;
  2419. goto out;
  2420. }
  2421. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2422. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2423. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2424. ret = -EINVAL;
  2425. goto out;
  2426. }
  2427. irq = priv->ce_irqs[ce_id];
  2428. irq_entry = &priv->ce_irq_list[ce_id];
  2429. if (irq_entry->handler || irq_entry->irq) {
  2430. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2431. irq, ce_id);
  2432. ret = -EEXIST;
  2433. goto out;
  2434. }
  2435. ret = request_irq(irq, handler, flags, name, ctx);
  2436. if (ret) {
  2437. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2438. irq, ce_id, ret);
  2439. goto out;
  2440. }
  2441. irq_entry->irq = irq;
  2442. irq_entry->handler = handler;
  2443. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2444. penv->stats.ce_irqs[ce_id].request++;
  2445. out:
  2446. return ret;
  2447. }
  2448. EXPORT_SYMBOL(icnss_ce_request_irq);
  2449. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2450. {
  2451. int ret = 0;
  2452. unsigned int irq;
  2453. struct ce_irq_list *irq_entry;
  2454. if (!penv || !penv->pdev || !dev) {
  2455. ret = -ENODEV;
  2456. goto out;
  2457. }
  2458. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2459. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2460. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2461. ret = -EINVAL;
  2462. goto out;
  2463. }
  2464. irq = penv->ce_irqs[ce_id];
  2465. irq_entry = &penv->ce_irq_list[ce_id];
  2466. if (!irq_entry->handler || !irq_entry->irq) {
  2467. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2468. ret = -EEXIST;
  2469. goto out;
  2470. }
  2471. free_irq(irq, ctx);
  2472. irq_entry->irq = 0;
  2473. irq_entry->handler = NULL;
  2474. penv->stats.ce_irqs[ce_id].free++;
  2475. out:
  2476. return ret;
  2477. }
  2478. EXPORT_SYMBOL(icnss_ce_free_irq);
  2479. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2480. {
  2481. unsigned int irq;
  2482. if (!penv || !penv->pdev || !dev) {
  2483. icnss_pr_err("Platform driver not initialized\n");
  2484. return;
  2485. }
  2486. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2487. penv->state);
  2488. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2489. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2490. return;
  2491. }
  2492. penv->stats.ce_irqs[ce_id].enable++;
  2493. irq = penv->ce_irqs[ce_id];
  2494. enable_irq(irq);
  2495. }
  2496. EXPORT_SYMBOL(icnss_enable_irq);
  2497. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2498. {
  2499. unsigned int irq;
  2500. if (!penv || !penv->pdev || !dev) {
  2501. icnss_pr_err("Platform driver not initialized\n");
  2502. return;
  2503. }
  2504. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2505. penv->state);
  2506. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2507. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2508. ce_id);
  2509. return;
  2510. }
  2511. irq = penv->ce_irqs[ce_id];
  2512. disable_irq(irq);
  2513. penv->stats.ce_irqs[ce_id].disable++;
  2514. }
  2515. EXPORT_SYMBOL(icnss_disable_irq);
  2516. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2517. {
  2518. char *fw_build_timestamp = NULL;
  2519. struct icnss_priv *priv = dev_get_drvdata(dev);
  2520. if (!priv) {
  2521. icnss_pr_err("Platform driver not initialized\n");
  2522. return -EINVAL;
  2523. }
  2524. info->v_addr = priv->mem_base_va;
  2525. info->p_addr = priv->mem_base_pa;
  2526. info->chip_id = priv->chip_info.chip_id;
  2527. info->chip_family = priv->chip_info.chip_family;
  2528. info->board_id = priv->board_id;
  2529. info->soc_id = priv->soc_id;
  2530. info->fw_version = priv->fw_version_info.fw_version;
  2531. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2532. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2533. strlcpy(info->fw_build_timestamp,
  2534. priv->fw_version_info.fw_build_timestamp,
  2535. WLFW_MAX_TIMESTAMP_LEN + 1);
  2536. strlcpy(info->fw_build_id, priv->fw_build_id,
  2537. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2538. return 0;
  2539. }
  2540. EXPORT_SYMBOL(icnss_get_soc_info);
  2541. int icnss_get_mhi_state(struct device *dev)
  2542. {
  2543. struct icnss_priv *priv = dev_get_drvdata(dev);
  2544. if (!priv) {
  2545. icnss_pr_err("Platform driver not initialized\n");
  2546. return -EINVAL;
  2547. }
  2548. if (!priv->mhi_state_info_va)
  2549. return -ENOMEM;
  2550. return ioread32(priv->mhi_state_info_va);
  2551. }
  2552. EXPORT_SYMBOL(icnss_get_mhi_state);
  2553. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2554. {
  2555. int ret;
  2556. struct icnss_priv *priv;
  2557. if (!dev)
  2558. return -ENODEV;
  2559. priv = dev_get_drvdata(dev);
  2560. if (!priv) {
  2561. icnss_pr_err("Platform driver not initialized\n");
  2562. return -EINVAL;
  2563. }
  2564. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2565. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2566. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2567. priv->state);
  2568. return -EINVAL;
  2569. }
  2570. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2571. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2572. if (ret)
  2573. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2574. ret, fw_log_mode);
  2575. return ret;
  2576. }
  2577. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2578. int icnss_force_wake_request(struct device *dev)
  2579. {
  2580. struct icnss_priv *priv;
  2581. if (!dev)
  2582. return -ENODEV;
  2583. priv = dev_get_drvdata(dev);
  2584. if (!priv) {
  2585. icnss_pr_err("Platform driver not initialized\n");
  2586. return -EINVAL;
  2587. }
  2588. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2589. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2590. atomic_read(&priv->soc_wake_ref_count));
  2591. return 0;
  2592. }
  2593. icnss_pr_soc_wake("Calling SOC Wake request");
  2594. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2595. 0, NULL);
  2596. return 0;
  2597. }
  2598. EXPORT_SYMBOL(icnss_force_wake_request);
  2599. int icnss_force_wake_release(struct device *dev)
  2600. {
  2601. struct icnss_priv *priv;
  2602. if (!dev)
  2603. return -ENODEV;
  2604. priv = dev_get_drvdata(dev);
  2605. if (!priv) {
  2606. icnss_pr_err("Platform driver not initialized\n");
  2607. return -EINVAL;
  2608. }
  2609. icnss_pr_soc_wake("Calling SOC Wake response");
  2610. if (atomic_read(&priv->soc_wake_ref_count) &&
  2611. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2612. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2613. atomic_read(&priv->soc_wake_ref_count));
  2614. return 0;
  2615. }
  2616. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2617. 0, NULL);
  2618. return 0;
  2619. }
  2620. EXPORT_SYMBOL(icnss_force_wake_release);
  2621. int icnss_is_device_awake(struct device *dev)
  2622. {
  2623. struct icnss_priv *priv = dev_get_drvdata(dev);
  2624. if (!priv) {
  2625. icnss_pr_err("Platform driver not initialized\n");
  2626. return -EINVAL;
  2627. }
  2628. return atomic_read(&priv->soc_wake_ref_count);
  2629. }
  2630. EXPORT_SYMBOL(icnss_is_device_awake);
  2631. int icnss_is_pci_ep_awake(struct device *dev)
  2632. {
  2633. struct icnss_priv *priv = dev_get_drvdata(dev);
  2634. if (!priv) {
  2635. icnss_pr_err("Platform driver not initialized\n");
  2636. return -EINVAL;
  2637. }
  2638. if (!priv->mhi_state_info_va)
  2639. return -ENOMEM;
  2640. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2641. }
  2642. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2643. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2644. uint32_t mem_type, uint32_t data_len,
  2645. uint8_t *output)
  2646. {
  2647. int ret = 0;
  2648. struct icnss_priv *priv = dev_get_drvdata(dev);
  2649. if (priv->magic != ICNSS_MAGIC) {
  2650. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2651. dev, priv, priv->magic);
  2652. return -EINVAL;
  2653. }
  2654. if (!output || data_len == 0
  2655. || data_len > WLFW_MAX_DATA_SIZE) {
  2656. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2657. output, data_len);
  2658. ret = -EINVAL;
  2659. goto out;
  2660. }
  2661. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2662. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2663. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2664. priv->state);
  2665. ret = -EINVAL;
  2666. goto out;
  2667. }
  2668. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2669. data_len, output);
  2670. out:
  2671. return ret;
  2672. }
  2673. EXPORT_SYMBOL(icnss_athdiag_read);
  2674. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2675. uint32_t mem_type, uint32_t data_len,
  2676. uint8_t *input)
  2677. {
  2678. int ret = 0;
  2679. struct icnss_priv *priv = dev_get_drvdata(dev);
  2680. if (priv->magic != ICNSS_MAGIC) {
  2681. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2682. dev, priv, priv->magic);
  2683. return -EINVAL;
  2684. }
  2685. if (!input || data_len == 0
  2686. || data_len > WLFW_MAX_DATA_SIZE) {
  2687. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2688. input, data_len);
  2689. ret = -EINVAL;
  2690. goto out;
  2691. }
  2692. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2693. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2694. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2695. priv->state);
  2696. ret = -EINVAL;
  2697. goto out;
  2698. }
  2699. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2700. data_len, input);
  2701. out:
  2702. return ret;
  2703. }
  2704. EXPORT_SYMBOL(icnss_athdiag_write);
  2705. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2706. enum icnss_driver_mode mode,
  2707. const char *host_version)
  2708. {
  2709. struct icnss_priv *priv = dev_get_drvdata(dev);
  2710. int temp = 0;
  2711. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2712. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2713. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2714. priv->state);
  2715. return -EINVAL;
  2716. }
  2717. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2718. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2719. priv->state);
  2720. return -EINVAL;
  2721. }
  2722. if (priv->wpss_supported &&
  2723. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2724. icnss_setup_dms_mac(priv);
  2725. if (priv->device_id == WCN6750_DEVICE_ID) {
  2726. if (!icnss_get_temperature(priv, &temp)) {
  2727. icnss_pr_dbg("Temperature: %d\n", temp);
  2728. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2729. icnss_set_wlan_en_delay(priv);
  2730. }
  2731. }
  2732. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2733. }
  2734. EXPORT_SYMBOL(icnss_wlan_enable);
  2735. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2736. {
  2737. struct icnss_priv *priv = dev_get_drvdata(dev);
  2738. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2739. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2740. priv->state);
  2741. return 0;
  2742. }
  2743. return icnss_send_wlan_disable_to_fw(priv);
  2744. }
  2745. EXPORT_SYMBOL(icnss_wlan_disable);
  2746. bool icnss_is_qmi_disable(struct device *dev)
  2747. {
  2748. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2749. }
  2750. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2751. int icnss_get_ce_id(struct device *dev, int irq)
  2752. {
  2753. int i;
  2754. if (!penv || !penv->pdev || !dev)
  2755. return -ENODEV;
  2756. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2757. if (penv->ce_irqs[i] == irq)
  2758. return i;
  2759. }
  2760. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2761. return -EINVAL;
  2762. }
  2763. EXPORT_SYMBOL(icnss_get_ce_id);
  2764. int icnss_get_irq(struct device *dev, int ce_id)
  2765. {
  2766. int irq;
  2767. if (!penv || !penv->pdev || !dev)
  2768. return -ENODEV;
  2769. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2770. return -EINVAL;
  2771. irq = penv->ce_irqs[ce_id];
  2772. return irq;
  2773. }
  2774. EXPORT_SYMBOL(icnss_get_irq);
  2775. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2776. {
  2777. struct icnss_priv *priv = dev_get_drvdata(dev);
  2778. if (!priv) {
  2779. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2780. return NULL;
  2781. }
  2782. return priv->iommu_domain;
  2783. }
  2784. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2785. int icnss_smmu_map(struct device *dev,
  2786. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2787. {
  2788. struct icnss_priv *priv = dev_get_drvdata(dev);
  2789. int flag = IOMMU_READ | IOMMU_WRITE;
  2790. bool dma_coherent = false;
  2791. unsigned long iova;
  2792. int prop_len = 0;
  2793. size_t len;
  2794. int ret = 0;
  2795. if (!priv) {
  2796. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2797. dev, priv);
  2798. return -EINVAL;
  2799. }
  2800. if (!iova_addr) {
  2801. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2802. &paddr, size);
  2803. return -EINVAL;
  2804. }
  2805. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2806. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2807. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2808. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2809. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2810. iova,
  2811. &priv->smmu_iova_ipa_start,
  2812. priv->smmu_iova_ipa_len);
  2813. return -ENOMEM;
  2814. }
  2815. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2816. icnss_pr_dbg("dma-coherent is %s\n",
  2817. dma_coherent ? "enabled" : "disabled");
  2818. if (dma_coherent)
  2819. flag |= IOMMU_CACHE;
  2820. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2821. ret = iommu_map(priv->iommu_domain, iova,
  2822. rounddown(paddr, PAGE_SIZE), len,
  2823. flag);
  2824. if (ret) {
  2825. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2826. return ret;
  2827. }
  2828. priv->smmu_iova_ipa_current = iova + len;
  2829. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2830. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2831. return 0;
  2832. }
  2833. EXPORT_SYMBOL(icnss_smmu_map);
  2834. int icnss_smmu_unmap(struct device *dev,
  2835. uint32_t iova_addr, size_t size)
  2836. {
  2837. struct icnss_priv *priv = dev_get_drvdata(dev);
  2838. unsigned long iova;
  2839. size_t len, unmapped_len;
  2840. if (!priv) {
  2841. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2842. dev, priv);
  2843. return -EINVAL;
  2844. }
  2845. if (!iova_addr) {
  2846. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2847. size);
  2848. return -EINVAL;
  2849. }
  2850. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2851. PAGE_SIZE);
  2852. iova = rounddown(iova_addr, PAGE_SIZE);
  2853. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2854. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2855. iova,
  2856. &priv->smmu_iova_ipa_start,
  2857. priv->smmu_iova_ipa_len);
  2858. return -ENOMEM;
  2859. }
  2860. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2861. iova, len);
  2862. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2863. if (unmapped_len != len) {
  2864. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2865. return -EINVAL;
  2866. }
  2867. priv->smmu_iova_ipa_current = iova;
  2868. return 0;
  2869. }
  2870. EXPORT_SYMBOL(icnss_smmu_unmap);
  2871. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2872. {
  2873. return socinfo_get_serial_number();
  2874. }
  2875. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2876. int icnss_trigger_recovery(struct device *dev)
  2877. {
  2878. int ret = 0;
  2879. struct icnss_priv *priv = dev_get_drvdata(dev);
  2880. if (priv->magic != ICNSS_MAGIC) {
  2881. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2882. ret = -EINVAL;
  2883. goto out;
  2884. }
  2885. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2886. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2887. priv->state);
  2888. ret = -EPERM;
  2889. goto out;
  2890. }
  2891. if (priv->wpss_supported) {
  2892. icnss_pr_vdbg("Initiate Root PD restart");
  2893. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2894. ICNSS_SMP2P_OUT_POWER_SAVE);
  2895. if (!ret)
  2896. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2897. return ret;
  2898. }
  2899. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2900. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2901. priv->state);
  2902. ret = -EOPNOTSUPP;
  2903. goto out;
  2904. }
  2905. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2906. priv->state);
  2907. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2908. if (!ret)
  2909. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2910. out:
  2911. return ret;
  2912. }
  2913. EXPORT_SYMBOL(icnss_trigger_recovery);
  2914. int icnss_idle_shutdown(struct device *dev)
  2915. {
  2916. struct icnss_priv *priv = dev_get_drvdata(dev);
  2917. if (!priv) {
  2918. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2919. return -EINVAL;
  2920. }
  2921. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2922. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2923. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2924. return -EBUSY;
  2925. }
  2926. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2927. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2928. }
  2929. EXPORT_SYMBOL(icnss_idle_shutdown);
  2930. int icnss_idle_restart(struct device *dev)
  2931. {
  2932. struct icnss_priv *priv = dev_get_drvdata(dev);
  2933. if (!priv) {
  2934. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2935. return -EINVAL;
  2936. }
  2937. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2938. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2939. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2940. return -EBUSY;
  2941. }
  2942. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2943. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2944. }
  2945. EXPORT_SYMBOL(icnss_idle_restart);
  2946. int icnss_exit_power_save(struct device *dev)
  2947. {
  2948. struct icnss_priv *priv = dev_get_drvdata(dev);
  2949. icnss_pr_vdbg("Calling Exit Power Save\n");
  2950. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2951. !test_bit(ICNSS_MODE_ON, &priv->state))
  2952. return 0;
  2953. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2954. ICNSS_SMP2P_OUT_POWER_SAVE);
  2955. }
  2956. EXPORT_SYMBOL(icnss_exit_power_save);
  2957. int icnss_prevent_l1(struct device *dev)
  2958. {
  2959. struct icnss_priv *priv = dev_get_drvdata(dev);
  2960. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2961. !test_bit(ICNSS_MODE_ON, &priv->state))
  2962. return 0;
  2963. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2964. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2965. }
  2966. EXPORT_SYMBOL(icnss_prevent_l1);
  2967. void icnss_allow_l1(struct device *dev)
  2968. {
  2969. struct icnss_priv *priv = dev_get_drvdata(dev);
  2970. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2971. !test_bit(ICNSS_MODE_ON, &priv->state))
  2972. return;
  2973. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2974. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2975. }
  2976. EXPORT_SYMBOL(icnss_allow_l1);
  2977. void icnss_allow_recursive_recovery(struct device *dev)
  2978. {
  2979. struct icnss_priv *priv = dev_get_drvdata(dev);
  2980. priv->allow_recursive_recovery = true;
  2981. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2982. }
  2983. void icnss_disallow_recursive_recovery(struct device *dev)
  2984. {
  2985. struct icnss_priv *priv = dev_get_drvdata(dev);
  2986. priv->allow_recursive_recovery = false;
  2987. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  2988. }
  2989. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  2990. {
  2991. struct kobject *icnss_kobject;
  2992. int ret = 0;
  2993. atomic_set(&priv->is_shutdown, false);
  2994. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  2995. if (!icnss_kobject) {
  2996. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  2997. return -EINVAL;
  2998. }
  2999. priv->icnss_kobject = icnss_kobject;
  3000. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3001. if (ret) {
  3002. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3003. return ret;
  3004. }
  3005. return ret;
  3006. }
  3007. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3008. {
  3009. struct kobject *icnss_kobject;
  3010. icnss_kobject = priv->icnss_kobject;
  3011. if (icnss_kobject)
  3012. kobject_put(icnss_kobject);
  3013. }
  3014. static ssize_t qdss_tr_start_store(struct device *dev,
  3015. struct device_attribute *attr,
  3016. const char *buf, size_t count)
  3017. {
  3018. struct icnss_priv *priv = dev_get_drvdata(dev);
  3019. wlfw_qdss_trace_start(priv);
  3020. icnss_pr_dbg("Received QDSS start command\n");
  3021. return count;
  3022. }
  3023. static ssize_t qdss_tr_stop_store(struct device *dev,
  3024. struct device_attribute *attr,
  3025. const char *user_buf, size_t count)
  3026. {
  3027. struct icnss_priv *priv = dev_get_drvdata(dev);
  3028. u32 option = 0;
  3029. if (sscanf(user_buf, "%du", &option) != 1)
  3030. return -EINVAL;
  3031. wlfw_qdss_trace_stop(priv, option);
  3032. icnss_pr_dbg("Received QDSS stop command\n");
  3033. return count;
  3034. }
  3035. static ssize_t qdss_conf_download_store(struct device *dev,
  3036. struct device_attribute *attr,
  3037. const char *buf, size_t count)
  3038. {
  3039. struct icnss_priv *priv = dev_get_drvdata(dev);
  3040. icnss_wlfw_qdss_dnld_send_sync(priv);
  3041. icnss_pr_dbg("Received QDSS download config command\n");
  3042. return count;
  3043. }
  3044. static ssize_t hw_trc_override_store(struct device *dev,
  3045. struct device_attribute *attr,
  3046. const char *buf, size_t count)
  3047. {
  3048. struct icnss_priv *priv = dev_get_drvdata(dev);
  3049. int tmp = 0;
  3050. if (sscanf(buf, "%du", &tmp) != 1)
  3051. return -EINVAL;
  3052. priv->hw_trc_override = tmp;
  3053. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3054. return count;
  3055. }
  3056. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3057. {
  3058. struct icnss_priv *priv = icnss_get_plat_priv();
  3059. phandle rproc_phandle;
  3060. int ret;
  3061. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3062. &rproc_phandle)) {
  3063. icnss_pr_err("error reading rproc phandle\n");
  3064. return;
  3065. }
  3066. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3067. if (IS_ERR_OR_NULL(priv->rproc)) {
  3068. icnss_pr_err("rproc not found");
  3069. return;
  3070. }
  3071. ret = rproc_boot(priv->rproc);
  3072. if (ret) {
  3073. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3074. rproc_put(priv->rproc);
  3075. }
  3076. }
  3077. static ssize_t wpss_boot_store(struct device *dev,
  3078. struct device_attribute *attr,
  3079. const char *buf, size_t count)
  3080. {
  3081. struct icnss_priv *priv = dev_get_drvdata(dev);
  3082. int wpss_rproc = 0;
  3083. if (!priv->wpss_supported)
  3084. return count;
  3085. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3086. icnss_pr_err("Failed to read wpss rproc info");
  3087. return -EINVAL;
  3088. }
  3089. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3090. if (wpss_rproc == 1)
  3091. schedule_work(&wpss_loader);
  3092. else if (wpss_rproc == 0)
  3093. icnss_wpss_unload(priv);
  3094. return count;
  3095. }
  3096. static ssize_t wlan_en_delay_store(struct device *dev,
  3097. struct device_attribute *attr,
  3098. const char *buf, size_t count)
  3099. {
  3100. struct icnss_priv *priv = dev_get_drvdata(dev);
  3101. uint32_t wlan_en_delay = 0;
  3102. if (priv->device_id != WCN6750_DEVICE_ID)
  3103. return count;
  3104. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3105. icnss_pr_err("Failed to read wlan_en_delay");
  3106. return -EINVAL;
  3107. }
  3108. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3109. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3110. return count;
  3111. }
  3112. static DEVICE_ATTR_WO(qdss_tr_start);
  3113. static DEVICE_ATTR_WO(qdss_tr_stop);
  3114. static DEVICE_ATTR_WO(qdss_conf_download);
  3115. static DEVICE_ATTR_WO(hw_trc_override);
  3116. static DEVICE_ATTR_WO(wpss_boot);
  3117. static DEVICE_ATTR_WO(wlan_en_delay);
  3118. static struct attribute *icnss_attrs[] = {
  3119. &dev_attr_qdss_tr_start.attr,
  3120. &dev_attr_qdss_tr_stop.attr,
  3121. &dev_attr_qdss_conf_download.attr,
  3122. &dev_attr_hw_trc_override.attr,
  3123. &dev_attr_wpss_boot.attr,
  3124. &dev_attr_wlan_en_delay.attr,
  3125. NULL,
  3126. };
  3127. static struct attribute_group icnss_attr_group = {
  3128. .attrs = icnss_attrs,
  3129. };
  3130. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3131. {
  3132. struct device *dev = &priv->pdev->dev;
  3133. int ret;
  3134. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3135. if (ret) {
  3136. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3137. ret);
  3138. goto out;
  3139. }
  3140. return 0;
  3141. out:
  3142. return ret;
  3143. }
  3144. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3145. {
  3146. sysfs_remove_link(kernel_kobj, "icnss");
  3147. }
  3148. static int icnss_sysfs_create(struct icnss_priv *priv)
  3149. {
  3150. int ret = 0;
  3151. ret = devm_device_add_group(&priv->pdev->dev,
  3152. &icnss_attr_group);
  3153. if (ret) {
  3154. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3155. ret);
  3156. goto out;
  3157. }
  3158. icnss_create_sysfs_link(priv);
  3159. ret = icnss_create_shutdown_sysfs(priv);
  3160. if (ret)
  3161. goto remove_icnss_group;
  3162. return 0;
  3163. remove_icnss_group:
  3164. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3165. out:
  3166. return ret;
  3167. }
  3168. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3169. {
  3170. icnss_destroy_shutdown_sysfs(priv);
  3171. icnss_remove_sysfs_link(priv);
  3172. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3173. }
  3174. static int icnss_resource_parse(struct icnss_priv *priv)
  3175. {
  3176. int ret = 0, i = 0;
  3177. struct platform_device *pdev = priv->pdev;
  3178. struct device *dev = &pdev->dev;
  3179. struct resource *res;
  3180. u32 int_prop;
  3181. ret = icnss_get_vreg(priv);
  3182. if (ret) {
  3183. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3184. goto out;
  3185. }
  3186. ret = icnss_get_clk(priv);
  3187. if (ret) {
  3188. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3189. goto put_vreg;
  3190. }
  3191. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3192. ret = icnss_get_psf_info(priv);
  3193. if (ret < 0)
  3194. goto out;
  3195. priv->psf_supported = true;
  3196. }
  3197. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3198. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3199. "membase");
  3200. if (!res) {
  3201. icnss_pr_err("Memory base not found in DT\n");
  3202. ret = -EINVAL;
  3203. goto put_clk;
  3204. }
  3205. priv->mem_base_pa = res->start;
  3206. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3207. resource_size(res));
  3208. if (!priv->mem_base_va) {
  3209. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3210. &priv->mem_base_pa);
  3211. ret = -EINVAL;
  3212. goto put_clk;
  3213. }
  3214. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3215. &priv->mem_base_pa,
  3216. priv->mem_base_va);
  3217. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3218. res = platform_get_resource(priv->pdev,
  3219. IORESOURCE_IRQ, i);
  3220. if (!res) {
  3221. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3222. ret = -ENODEV;
  3223. goto put_clk;
  3224. } else {
  3225. priv->ce_irqs[i] = res->start;
  3226. }
  3227. }
  3228. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3229. &priv->rf_subtype) == 0) {
  3230. priv->is_rf_subtype_valid = true;
  3231. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3232. }
  3233. if (of_property_read_bool(pdev->dev.of_node,
  3234. "qcom,is_slate_rfa")) {
  3235. priv->is_slate_rfa = true;
  3236. icnss_pr_err("SLATE rfa is enabled\n");
  3237. }
  3238. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3239. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3240. "msi_addr");
  3241. if (!res) {
  3242. icnss_pr_err("MSI address not found in DT\n");
  3243. ret = -EINVAL;
  3244. goto put_clk;
  3245. }
  3246. priv->msi_addr_pa = res->start;
  3247. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3248. PAGE_SIZE,
  3249. DMA_FROM_DEVICE, 0);
  3250. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3251. icnss_pr_err("MSI: failed to map msi address\n");
  3252. priv->msi_addr_iova = 0;
  3253. ret = -ENOMEM;
  3254. goto put_clk;
  3255. }
  3256. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3257. &priv->msi_addr_pa,
  3258. priv->msi_addr_iova);
  3259. ret = of_property_read_u32_index(dev->of_node,
  3260. "interrupts",
  3261. 1,
  3262. &int_prop);
  3263. if (ret) {
  3264. icnss_pr_dbg("Read interrupt prop failed");
  3265. goto put_clk;
  3266. }
  3267. priv->msi_base_data = int_prop + 32;
  3268. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3269. priv->msi_base_data, int_prop);
  3270. icnss_get_msi_assignment(priv);
  3271. for (i = 0; i < msi_config.total_vectors; i++) {
  3272. res = platform_get_resource(priv->pdev,
  3273. IORESOURCE_IRQ, i);
  3274. if (!res) {
  3275. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3276. ret = -ENODEV;
  3277. goto put_clk;
  3278. } else {
  3279. priv->srng_irqs[i] = res->start;
  3280. }
  3281. }
  3282. }
  3283. return 0;
  3284. put_clk:
  3285. icnss_put_clk(priv);
  3286. put_vreg:
  3287. icnss_put_vreg(priv);
  3288. out:
  3289. return ret;
  3290. }
  3291. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3292. {
  3293. int ret = 0;
  3294. struct platform_device *pdev = priv->pdev;
  3295. struct device *dev = &pdev->dev;
  3296. struct device_node *np = NULL;
  3297. u64 prop_size = 0;
  3298. const __be32 *addrp = NULL;
  3299. np = of_parse_phandle(dev->of_node,
  3300. "qcom,wlan-msa-fixed-region", 0);
  3301. if (np) {
  3302. addrp = of_get_address(np, 0, &prop_size, NULL);
  3303. if (!addrp) {
  3304. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3305. ret = -EINVAL;
  3306. of_node_put(np);
  3307. goto out;
  3308. }
  3309. priv->msa_pa = of_translate_address(np, addrp);
  3310. if (priv->msa_pa == OF_BAD_ADDR) {
  3311. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3312. ret = -EINVAL;
  3313. of_node_put(np);
  3314. goto out;
  3315. }
  3316. of_node_put(np);
  3317. priv->msa_va = memremap(priv->msa_pa,
  3318. (unsigned long)prop_size, MEMREMAP_WT);
  3319. if (!priv->msa_va) {
  3320. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3321. &priv->msa_pa);
  3322. ret = -EINVAL;
  3323. goto out;
  3324. }
  3325. priv->msa_mem_size = prop_size;
  3326. } else {
  3327. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3328. &priv->msa_mem_size);
  3329. if (ret || priv->msa_mem_size == 0) {
  3330. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3331. priv->msa_mem_size, ret);
  3332. goto out;
  3333. }
  3334. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3335. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3336. if (!priv->msa_va) {
  3337. icnss_pr_err("DMA alloc failed for MSA\n");
  3338. ret = -ENOMEM;
  3339. goto out;
  3340. }
  3341. }
  3342. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3343. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3344. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3345. "qcom,fw-prefix");
  3346. return 0;
  3347. out:
  3348. return ret;
  3349. }
  3350. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3351. struct device *dev, unsigned long iova,
  3352. int flags, void *handler_token)
  3353. {
  3354. struct icnss_priv *priv = handler_token;
  3355. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3356. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3357. if (!priv) {
  3358. icnss_pr_err("priv is NULL\n");
  3359. return -ENODEV;
  3360. }
  3361. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3362. fw_down_data.crashed = true;
  3363. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3364. &fw_down_data);
  3365. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3366. &fw_down_data);
  3367. }
  3368. icnss_trigger_recovery(&priv->pdev->dev);
  3369. /* IOMMU driver requires non-zero return value to print debug info. */
  3370. return -EINVAL;
  3371. }
  3372. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3373. {
  3374. int ret = 0;
  3375. struct platform_device *pdev = priv->pdev;
  3376. struct device *dev = &pdev->dev;
  3377. const char *iommu_dma_type;
  3378. struct resource *res;
  3379. u32 addr_win[2];
  3380. ret = of_property_read_u32_array(dev->of_node,
  3381. "qcom,iommu-dma-addr-pool",
  3382. addr_win,
  3383. ARRAY_SIZE(addr_win));
  3384. if (ret) {
  3385. icnss_pr_err("SMMU IOVA base not found\n");
  3386. } else {
  3387. priv->smmu_iova_start = addr_win[0];
  3388. priv->smmu_iova_len = addr_win[1];
  3389. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3390. &priv->smmu_iova_start,
  3391. priv->smmu_iova_len);
  3392. priv->iommu_domain =
  3393. iommu_get_domain_for_dev(&pdev->dev);
  3394. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3395. &iommu_dma_type);
  3396. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3397. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3398. priv->smmu_s1_enable = true;
  3399. if (priv->device_id == WCN6750_DEVICE_ID)
  3400. iommu_set_fault_handler(priv->iommu_domain,
  3401. icnss_smmu_fault_handler,
  3402. priv);
  3403. }
  3404. res = platform_get_resource_byname(pdev,
  3405. IORESOURCE_MEM,
  3406. "smmu_iova_ipa");
  3407. if (!res) {
  3408. icnss_pr_err("SMMU IOVA IPA not found\n");
  3409. } else {
  3410. priv->smmu_iova_ipa_start = res->start;
  3411. priv->smmu_iova_ipa_current = res->start;
  3412. priv->smmu_iova_ipa_len = resource_size(res);
  3413. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3414. &priv->smmu_iova_ipa_start,
  3415. priv->smmu_iova_ipa_len);
  3416. }
  3417. }
  3418. return 0;
  3419. }
  3420. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3421. {
  3422. if (!priv)
  3423. return -ENODEV;
  3424. if (!priv->smmu_iova_len)
  3425. return -EINVAL;
  3426. *addr = priv->smmu_iova_start;
  3427. *size = priv->smmu_iova_len;
  3428. return 0;
  3429. }
  3430. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3431. {
  3432. if (!priv)
  3433. return -ENODEV;
  3434. if (!priv->smmu_iova_ipa_len)
  3435. return -EINVAL;
  3436. *addr = priv->smmu_iova_ipa_start;
  3437. *size = priv->smmu_iova_ipa_len;
  3438. return 0;
  3439. }
  3440. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3441. char *name)
  3442. {
  3443. if (!priv)
  3444. return;
  3445. if (!priv->use_prefix_path) {
  3446. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3447. return;
  3448. }
  3449. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3450. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3451. ADRASTEA_PATH_PREFIX "%s", name);
  3452. else
  3453. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3454. QCA6750_PATH_PREFIX "%s", name);
  3455. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3456. }
  3457. static const struct platform_device_id icnss_platform_id_table[] = {
  3458. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3459. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3460. { },
  3461. };
  3462. static const struct of_device_id icnss_dt_match[] = {
  3463. {
  3464. .compatible = "qcom,wcn6750",
  3465. .data = (void *)&icnss_platform_id_table[0]},
  3466. {
  3467. .compatible = "qcom,icnss",
  3468. .data = (void *)&icnss_platform_id_table[1]},
  3469. { },
  3470. };
  3471. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3472. static void icnss_init_control_params(struct icnss_priv *priv)
  3473. {
  3474. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3475. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3476. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3477. if (priv->device_id == WCN6750_DEVICE_ID ||
  3478. of_property_read_bool(priv->pdev->dev.of_node,
  3479. "wpss-support-enable"))
  3480. priv->wpss_supported = true;
  3481. if (of_property_read_bool(priv->pdev->dev.of_node,
  3482. "bdf-download-support"))
  3483. priv->bdf_download_support = true;
  3484. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3485. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3486. }
  3487. static void icnss_read_device_configs(struct icnss_priv *priv)
  3488. {
  3489. if (of_property_read_bool(priv->pdev->dev.of_node,
  3490. "wlan-ipa-disabled")) {
  3491. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3492. }
  3493. }
  3494. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3495. {
  3496. pm_runtime_get_sync(&priv->pdev->dev);
  3497. pm_runtime_forbid(&priv->pdev->dev);
  3498. pm_runtime_set_active(&priv->pdev->dev);
  3499. pm_runtime_enable(&priv->pdev->dev);
  3500. }
  3501. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3502. {
  3503. pm_runtime_disable(&priv->pdev->dev);
  3504. pm_runtime_allow(&priv->pdev->dev);
  3505. pm_runtime_put_sync(&priv->pdev->dev);
  3506. }
  3507. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3508. {
  3509. return of_property_read_bool(priv->pdev->dev.of_node,
  3510. "use-nv-mac");
  3511. }
  3512. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3513. {
  3514. struct icnss_subsys_restart_level_data *restart_level_data;
  3515. icnss_pr_info("rproc name: %s recovery disable: %d",
  3516. rproc->name, rproc->recovery_disabled);
  3517. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3518. if (!restart_level_data)
  3519. return;
  3520. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3521. if (rproc->recovery_disabled)
  3522. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3523. else
  3524. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3525. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3526. 0, restart_level_data);
  3527. }
  3528. }
  3529. static int icnss_probe(struct platform_device *pdev)
  3530. {
  3531. int ret = 0;
  3532. struct device *dev = &pdev->dev;
  3533. struct icnss_priv *priv;
  3534. const struct of_device_id *of_id;
  3535. const struct platform_device_id *device_id;
  3536. if (dev_get_drvdata(dev)) {
  3537. icnss_pr_err("Driver is already initialized\n");
  3538. return -EEXIST;
  3539. }
  3540. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3541. if (!of_id || !of_id->data) {
  3542. icnss_pr_err("Failed to find of match device!\n");
  3543. ret = -ENODEV;
  3544. goto out_reset_drvdata;
  3545. }
  3546. device_id = of_id->data;
  3547. icnss_pr_dbg("Platform driver probe\n");
  3548. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3549. if (!priv)
  3550. return -ENOMEM;
  3551. priv->magic = ICNSS_MAGIC;
  3552. dev_set_drvdata(dev, priv);
  3553. priv->pdev = pdev;
  3554. priv->device_id = device_id->driver_data;
  3555. priv->is_chain1_supported = true;
  3556. INIT_LIST_HEAD(&priv->vreg_list);
  3557. INIT_LIST_HEAD(&priv->clk_list);
  3558. icnss_allow_recursive_recovery(dev);
  3559. icnss_init_control_params(priv);
  3560. icnss_read_device_configs(priv);
  3561. ret = icnss_resource_parse(priv);
  3562. if (ret)
  3563. goto out_reset_drvdata;
  3564. ret = icnss_msa_dt_parse(priv);
  3565. if (ret)
  3566. goto out_free_resources;
  3567. ret = icnss_smmu_dt_parse(priv);
  3568. if (ret)
  3569. goto out_free_resources;
  3570. spin_lock_init(&priv->event_lock);
  3571. spin_lock_init(&priv->on_off_lock);
  3572. spin_lock_init(&priv->soc_wake_msg_lock);
  3573. mutex_init(&priv->dev_lock);
  3574. mutex_init(&priv->tcdev_lock);
  3575. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3576. if (!priv->event_wq) {
  3577. icnss_pr_err("Workqueue creation failed\n");
  3578. ret = -EFAULT;
  3579. goto smmu_cleanup;
  3580. }
  3581. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3582. INIT_LIST_HEAD(&priv->event_list);
  3583. ret = icnss_register_fw_service(priv);
  3584. if (ret < 0) {
  3585. icnss_pr_err("fw service registration failed: %d\n", ret);
  3586. goto out_destroy_wq;
  3587. }
  3588. icnss_enable_recovery(priv);
  3589. icnss_debugfs_create(priv);
  3590. icnss_sysfs_create(priv);
  3591. ret = device_init_wakeup(&priv->pdev->dev, true);
  3592. if (ret)
  3593. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3594. ret);
  3595. icnss_set_plat_priv(priv);
  3596. init_completion(&priv->unblock_shutdown);
  3597. if (priv->is_slate_rfa)
  3598. init_completion(&priv->slate_boot_complete);
  3599. if (priv->device_id == WCN6750_DEVICE_ID) {
  3600. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3601. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3602. if (!priv->soc_wake_wq) {
  3603. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3604. ret = -EFAULT;
  3605. goto out_unregister_fw_service;
  3606. }
  3607. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3608. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3609. ret = icnss_genl_init();
  3610. if (ret < 0)
  3611. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3612. init_completion(&priv->smp2p_soc_wake_wait);
  3613. icnss_runtime_pm_init(priv);
  3614. icnss_aop_mbox_init(priv);
  3615. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3616. priv->bdf_download_support = true;
  3617. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3618. }
  3619. if (priv->wpss_supported) {
  3620. ret = icnss_dms_init(priv);
  3621. if (ret)
  3622. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3623. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3624. icnss_pr_dbg("NV MAC feature is %s\n",
  3625. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3626. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3627. }
  3628. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3629. icnss_pr_info("Platform driver probed successfully\n");
  3630. return 0;
  3631. out_unregister_fw_service:
  3632. icnss_unregister_fw_service(priv);
  3633. out_destroy_wq:
  3634. destroy_workqueue(priv->event_wq);
  3635. smmu_cleanup:
  3636. priv->iommu_domain = NULL;
  3637. out_free_resources:
  3638. icnss_put_resources(priv);
  3639. out_reset_drvdata:
  3640. dev_set_drvdata(dev, NULL);
  3641. return ret;
  3642. }
  3643. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3644. {
  3645. if (IS_ERR_OR_NULL(ramdump_info))
  3646. return;
  3647. device_unregister(ramdump_info->dev);
  3648. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3649. kfree(ramdump_info);
  3650. }
  3651. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3652. {
  3653. if (priv->batt_psy)
  3654. power_supply_put(penv->batt_psy);
  3655. if (priv->psf_supported) {
  3656. flush_workqueue(priv->soc_update_wq);
  3657. destroy_workqueue(priv->soc_update_wq);
  3658. power_supply_unreg_notifier(&priv->psf_nb);
  3659. }
  3660. }
  3661. static int icnss_remove(struct platform_device *pdev)
  3662. {
  3663. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3664. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3665. device_init_wakeup(&priv->pdev->dev, false);
  3666. icnss_debugfs_destroy(priv);
  3667. icnss_unregister_power_supply_notifier(penv);
  3668. icnss_sysfs_destroy(priv);
  3669. complete_all(&priv->unblock_shutdown);
  3670. if (priv->is_slate_rfa)
  3671. icnss_slate_ssr_unregister_notifier(priv);
  3672. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3673. if (priv->wpss_supported) {
  3674. icnss_dms_deinit(priv);
  3675. icnss_wpss_early_ssr_unregister_notifier(priv);
  3676. icnss_wpss_ssr_unregister_notifier(priv);
  3677. } else {
  3678. icnss_modem_ssr_unregister_notifier(priv);
  3679. icnss_pdr_unregister_notifier(priv);
  3680. }
  3681. if (priv->device_id == WCN6750_DEVICE_ID) {
  3682. icnss_genl_exit();
  3683. icnss_runtime_pm_deinit(priv);
  3684. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3685. mbox_free_channel(priv->mbox_chan);
  3686. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3687. complete_all(&priv->smp2p_soc_wake_wait);
  3688. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3689. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3690. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3691. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3692. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3693. if (priv->soc_wake_wq)
  3694. destroy_workqueue(priv->soc_wake_wq);
  3695. }
  3696. class_destroy(priv->icnss_ramdump_class);
  3697. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3698. icnss_unregister_fw_service(priv);
  3699. if (priv->event_wq)
  3700. destroy_workqueue(priv->event_wq);
  3701. priv->iommu_domain = NULL;
  3702. icnss_hw_power_off(priv);
  3703. icnss_put_resources(priv);
  3704. dev_set_drvdata(&pdev->dev, NULL);
  3705. return 0;
  3706. }
  3707. #ifdef CONFIG_PM_SLEEP
  3708. static int icnss_pm_suspend(struct device *dev)
  3709. {
  3710. struct icnss_priv *priv = dev_get_drvdata(dev);
  3711. int ret = 0;
  3712. if (priv->magic != ICNSS_MAGIC) {
  3713. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3714. dev, priv, priv->magic);
  3715. return -EINVAL;
  3716. }
  3717. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3718. if (!priv->ops || !priv->ops->pm_suspend ||
  3719. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3720. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3721. return 0;
  3722. ret = priv->ops->pm_suspend(dev);
  3723. if (ret == 0) {
  3724. if (priv->device_id == WCN6750_DEVICE_ID) {
  3725. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3726. !test_bit(ICNSS_MODE_ON, &priv->state))
  3727. return 0;
  3728. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3729. ICNSS_SMP2P_OUT_POWER_SAVE);
  3730. }
  3731. priv->stats.pm_suspend++;
  3732. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3733. } else {
  3734. priv->stats.pm_suspend_err++;
  3735. }
  3736. return ret;
  3737. }
  3738. static int icnss_pm_resume(struct device *dev)
  3739. {
  3740. struct icnss_priv *priv = dev_get_drvdata(dev);
  3741. int ret = 0;
  3742. if (priv->magic != ICNSS_MAGIC) {
  3743. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3744. dev, priv, priv->magic);
  3745. return -EINVAL;
  3746. }
  3747. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3748. if (!priv->ops || !priv->ops->pm_resume ||
  3749. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3750. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3751. goto out;
  3752. ret = priv->ops->pm_resume(dev);
  3753. out:
  3754. if (ret == 0) {
  3755. priv->stats.pm_resume++;
  3756. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3757. } else {
  3758. priv->stats.pm_resume_err++;
  3759. }
  3760. return ret;
  3761. }
  3762. static int icnss_pm_suspend_noirq(struct device *dev)
  3763. {
  3764. struct icnss_priv *priv = dev_get_drvdata(dev);
  3765. int ret = 0;
  3766. if (priv->magic != ICNSS_MAGIC) {
  3767. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3768. dev, priv, priv->magic);
  3769. return -EINVAL;
  3770. }
  3771. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3772. if (!priv->ops || !priv->ops->suspend_noirq ||
  3773. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3774. goto out;
  3775. ret = priv->ops->suspend_noirq(dev);
  3776. out:
  3777. if (ret == 0) {
  3778. priv->stats.pm_suspend_noirq++;
  3779. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3780. } else {
  3781. priv->stats.pm_suspend_noirq_err++;
  3782. }
  3783. return ret;
  3784. }
  3785. static int icnss_pm_resume_noirq(struct device *dev)
  3786. {
  3787. struct icnss_priv *priv = dev_get_drvdata(dev);
  3788. int ret = 0;
  3789. if (priv->magic != ICNSS_MAGIC) {
  3790. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3791. dev, priv, priv->magic);
  3792. return -EINVAL;
  3793. }
  3794. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3795. if (!priv->ops || !priv->ops->resume_noirq ||
  3796. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3797. goto out;
  3798. ret = priv->ops->resume_noirq(dev);
  3799. out:
  3800. if (ret == 0) {
  3801. priv->stats.pm_resume_noirq++;
  3802. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3803. } else {
  3804. priv->stats.pm_resume_noirq_err++;
  3805. }
  3806. return ret;
  3807. }
  3808. static int icnss_pm_runtime_suspend(struct device *dev)
  3809. {
  3810. struct icnss_priv *priv = dev_get_drvdata(dev);
  3811. int ret = 0;
  3812. if (priv->device_id != WCN6750_DEVICE_ID) {
  3813. icnss_pr_err("Ignore runtime suspend:\n");
  3814. goto out;
  3815. }
  3816. if (priv->magic != ICNSS_MAGIC) {
  3817. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3818. dev, priv, priv->magic);
  3819. return -EINVAL;
  3820. }
  3821. if (!priv->ops || !priv->ops->runtime_suspend ||
  3822. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3823. goto out;
  3824. icnss_pr_vdbg("Runtime suspend\n");
  3825. ret = priv->ops->runtime_suspend(dev);
  3826. if (!ret) {
  3827. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3828. !test_bit(ICNSS_MODE_ON, &priv->state))
  3829. return 0;
  3830. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3831. ICNSS_SMP2P_OUT_POWER_SAVE);
  3832. }
  3833. out:
  3834. return ret;
  3835. }
  3836. static int icnss_pm_runtime_resume(struct device *dev)
  3837. {
  3838. struct icnss_priv *priv = dev_get_drvdata(dev);
  3839. int ret = 0;
  3840. if (priv->device_id != WCN6750_DEVICE_ID) {
  3841. icnss_pr_err("Ignore runtime resume:\n");
  3842. goto out;
  3843. }
  3844. if (priv->magic != ICNSS_MAGIC) {
  3845. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3846. dev, priv, priv->magic);
  3847. return -EINVAL;
  3848. }
  3849. if (!priv->ops || !priv->ops->runtime_resume ||
  3850. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3851. goto out;
  3852. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3853. ret = priv->ops->runtime_resume(dev);
  3854. out:
  3855. return ret;
  3856. }
  3857. static int icnss_pm_runtime_idle(struct device *dev)
  3858. {
  3859. struct icnss_priv *priv = dev_get_drvdata(dev);
  3860. if (priv->device_id != WCN6750_DEVICE_ID) {
  3861. icnss_pr_err("Ignore runtime idle:\n");
  3862. goto out;
  3863. }
  3864. icnss_pr_vdbg("Runtime idle\n");
  3865. pm_request_autosuspend(dev);
  3866. out:
  3867. return -EBUSY;
  3868. }
  3869. #endif
  3870. static const struct dev_pm_ops icnss_pm_ops = {
  3871. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3872. icnss_pm_resume)
  3873. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3874. icnss_pm_resume_noirq)
  3875. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3876. icnss_pm_runtime_idle)
  3877. };
  3878. static struct platform_driver icnss_driver = {
  3879. .probe = icnss_probe,
  3880. .remove = icnss_remove,
  3881. .driver = {
  3882. .name = "icnss2",
  3883. .pm = &icnss_pm_ops,
  3884. .of_match_table = icnss_dt_match,
  3885. },
  3886. };
  3887. static int __init icnss_initialize(void)
  3888. {
  3889. icnss_debug_init();
  3890. return platform_driver_register(&icnss_driver);
  3891. }
  3892. static void __exit icnss_exit(void)
  3893. {
  3894. platform_driver_unregister(&icnss_driver);
  3895. icnss_debug_deinit();
  3896. }
  3897. module_init(icnss_initialize);
  3898. module_exit(icnss_exit);
  3899. MODULE_LICENSE("GPL v2");
  3900. MODULE_DESCRIPTION("iWCN CORE platform driver");