main.c 128 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <linux/version.h>
  46. #include <trace/hooks/remoteproc.h>
  47. #ifdef CONFIG_SLATE_MODULE_ENABLED
  48. #include <linux/soc/qcom/slatecom_interface.h>
  49. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  50. #include <uapi/linux/slatecom_interface.h>
  51. #endif
  52. #include "main.h"
  53. #include "qmi.h"
  54. #include "debug.h"
  55. #include "power.h"
  56. #include "genl.h"
  57. #define MAX_PROP_SIZE 32
  58. #define NUM_LOG_PAGES 10
  59. #define NUM_LOG_LONG_PAGES 4
  60. #define ICNSS_MAGIC 0x5abc5abc
  61. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  62. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  63. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  64. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  65. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  66. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  67. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  68. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  69. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  70. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  71. #define ICNSS_MAX_PROBE_CNT 2
  72. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  73. #define PROBE_TIMEOUT 15000
  74. #define SMP2P_SOC_WAKE_TIMEOUT 500
  75. #ifdef CONFIG_ICNSS2_DEBUG
  76. static unsigned long qmi_timeout = 3000;
  77. module_param(qmi_timeout, ulong, 0600);
  78. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  79. #else
  80. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  81. #endif
  82. #define ICNSS_RECOVERY_TIMEOUT 60000
  83. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  84. #define ICNSS_CAL_TIMEOUT 40000
  85. static struct icnss_priv *penv;
  86. static struct work_struct wpss_loader;
  87. static struct work_struct wpss_ssr_work;
  88. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  89. #define ICNSS_EVENT_PENDING 2989
  90. #define ICNSS_EVENT_SYNC BIT(0)
  91. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  92. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  93. ICNSS_EVENT_SYNC)
  94. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  95. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  96. #define SMP2P_GET_MAX_RETRY 4
  97. #define SMP2P_GET_RETRY_DELAY_MS 500
  98. #define RAMDUMP_NUM_DEVICES 256
  99. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  100. #define WLAN_EN_TEMP_THRESHOLD 5000
  101. #define WLAN_EN_DELAY 500
  102. #define ICNSS_RPROC_LEN 100
  103. static DEFINE_IDA(rd_minor_id);
  104. enum icnss_pdr_cause_index {
  105. ICNSS_FW_CRASH,
  106. ICNSS_ROOT_PD_CRASH,
  107. ICNSS_ROOT_PD_SHUTDOWN,
  108. ICNSS_HOST_ERROR,
  109. };
  110. static const char * const icnss_pdr_cause[] = {
  111. [ICNSS_FW_CRASH] = "FW crash",
  112. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  113. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  114. [ICNSS_HOST_ERROR] = "Host error",
  115. };
  116. static void icnss_set_plat_priv(struct icnss_priv *priv)
  117. {
  118. penv = priv;
  119. }
  120. static struct icnss_priv *icnss_get_plat_priv(void)
  121. {
  122. return penv;
  123. }
  124. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  125. {
  126. if (priv && priv->rproc) {
  127. rproc_shutdown(priv->rproc);
  128. rproc_put(priv->rproc);
  129. priv->rproc = NULL;
  130. }
  131. }
  132. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  133. struct kobj_attribute *attr,
  134. const char *buf, size_t count)
  135. {
  136. struct icnss_priv *priv = icnss_get_plat_priv();
  137. if (!priv)
  138. return count;
  139. icnss_pr_dbg("Received shutdown indication");
  140. atomic_set(&priv->is_shutdown, true);
  141. if ((priv->wpss_supported || priv->rproc_fw_download) &&
  142. priv->device_id == ADRASTEA_DEVICE_ID)
  143. icnss_wpss_unload(priv);
  144. return count;
  145. }
  146. static struct kobj_attribute icnss_sysfs_attribute =
  147. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  148. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  149. {
  150. if (atomic_inc_return(&priv->pm_count) != 1)
  151. return;
  152. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  153. atomic_read(&priv->pm_count));
  154. pm_stay_awake(&priv->pdev->dev);
  155. priv->stats.pm_stay_awake++;
  156. }
  157. static void icnss_pm_relax(struct icnss_priv *priv)
  158. {
  159. int r = atomic_dec_return(&priv->pm_count);
  160. WARN_ON(r < 0);
  161. if (r != 0)
  162. return;
  163. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  164. atomic_read(&priv->pm_count));
  165. pm_relax(&priv->pdev->dev);
  166. priv->stats.pm_relax++;
  167. }
  168. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  169. {
  170. switch (type) {
  171. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  172. return "SERVER_ARRIVE";
  173. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  174. return "SERVER_EXIT";
  175. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  176. return "FW_READY";
  177. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  178. return "REGISTER_DRIVER";
  179. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  180. return "UNREGISTER_DRIVER";
  181. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  182. return "PD_SERVICE_DOWN";
  183. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  184. return "FW_EARLY_CRASH_IND";
  185. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  186. return "IDLE_SHUTDOWN";
  187. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  188. return "IDLE_RESTART";
  189. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  190. return "FW_INIT_DONE";
  191. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  192. return "QDSS_TRACE_REQ_MEM";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  194. return "QDSS_TRACE_SAVE";
  195. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  196. return "QDSS_TRACE_FREE";
  197. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  198. return "M3_DUMP_UPLOAD";
  199. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  200. return "IMS_WFC_CALL_IND";
  201. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  202. return "WLFW_TWC_CFG_IND";
  203. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  204. return "QDSS_TRACE_REQ_DATA";
  205. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  206. return "SUBSYS_RESTART_LEVEL";
  207. case ICNSS_DRIVER_EVENT_MAX:
  208. return "EVENT_MAX";
  209. }
  210. return "UNKNOWN";
  211. };
  212. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  213. {
  214. switch (type) {
  215. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  216. return "SOC_WAKE_REQUEST";
  217. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  218. return "SOC_WAKE_RELEASE";
  219. case ICNSS_SOC_WAKE_EVENT_MAX:
  220. return "SOC_EVENT_MAX";
  221. }
  222. return "UNKNOWN";
  223. };
  224. int icnss_driver_event_post(struct icnss_priv *priv,
  225. enum icnss_driver_event_type type,
  226. u32 flags, void *data)
  227. {
  228. struct icnss_driver_event *event;
  229. unsigned long irq_flags;
  230. int gfp = GFP_KERNEL;
  231. int ret = 0;
  232. if (!priv)
  233. return -ENODEV;
  234. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  235. icnss_driver_event_to_str(type), type, current->comm,
  236. flags, priv->state);
  237. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  238. icnss_pr_err("Invalid Event type: %d, can't post", type);
  239. return -EINVAL;
  240. }
  241. if (in_interrupt() || !preemptible() || rcu_preempt_depth())
  242. gfp = GFP_ATOMIC;
  243. event = kzalloc(sizeof(*event), gfp);
  244. if (event == NULL)
  245. return -ENOMEM;
  246. icnss_pm_stay_awake(priv);
  247. event->type = type;
  248. event->data = data;
  249. init_completion(&event->complete);
  250. event->ret = ICNSS_EVENT_PENDING;
  251. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  252. spin_lock_irqsave(&priv->event_lock, irq_flags);
  253. list_add_tail(&event->list, &priv->event_list);
  254. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  255. priv->stats.events[type].posted++;
  256. queue_work(priv->event_wq, &priv->event_work);
  257. if (!(flags & ICNSS_EVENT_SYNC))
  258. goto out;
  259. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  260. wait_for_completion(&event->complete);
  261. else
  262. ret = wait_for_completion_interruptible(&event->complete);
  263. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  264. icnss_driver_event_to_str(type), type, priv->state, ret,
  265. event->ret);
  266. spin_lock_irqsave(&priv->event_lock, irq_flags);
  267. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  268. event->sync = false;
  269. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  270. ret = -EINTR;
  271. goto out;
  272. }
  273. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  274. ret = event->ret;
  275. kfree(event);
  276. out:
  277. icnss_pm_relax(priv);
  278. return ret;
  279. }
  280. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  281. enum icnss_soc_wake_event_type type,
  282. u32 flags, void *data)
  283. {
  284. struct icnss_soc_wake_event *event;
  285. unsigned long irq_flags;
  286. int gfp = GFP_KERNEL;
  287. int ret = 0;
  288. if (!priv)
  289. return -ENODEV;
  290. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  291. icnss_soc_wake_event_to_str(type),
  292. type, current->comm, flags, priv->state);
  293. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  294. icnss_pr_err("Invalid Event type: %d, can't post", type);
  295. return -EINVAL;
  296. }
  297. if (in_interrupt() || irqs_disabled())
  298. gfp = GFP_ATOMIC;
  299. event = kzalloc(sizeof(*event), gfp);
  300. if (!event)
  301. return -ENOMEM;
  302. icnss_pm_stay_awake(priv);
  303. event->type = type;
  304. event->data = data;
  305. init_completion(&event->complete);
  306. event->ret = ICNSS_EVENT_PENDING;
  307. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  308. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  309. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  310. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  311. priv->stats.soc_wake_events[type].posted++;
  312. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  313. if (!(flags & ICNSS_EVENT_SYNC))
  314. goto out;
  315. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  316. wait_for_completion(&event->complete);
  317. else
  318. ret = wait_for_completion_interruptible(&event->complete);
  319. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  320. icnss_soc_wake_event_to_str(type),
  321. type, priv->state, ret, event->ret);
  322. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  323. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  324. event->sync = false;
  325. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  326. ret = -EINTR;
  327. goto out;
  328. }
  329. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  330. ret = event->ret;
  331. kfree(event);
  332. out:
  333. icnss_pm_relax(priv);
  334. return ret;
  335. }
  336. bool icnss_is_fw_ready(void)
  337. {
  338. if (!penv)
  339. return false;
  340. else
  341. return test_bit(ICNSS_FW_READY, &penv->state);
  342. }
  343. EXPORT_SYMBOL(icnss_is_fw_ready);
  344. void icnss_block_shutdown(bool status)
  345. {
  346. if (!penv)
  347. return;
  348. if (status) {
  349. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  350. reinit_completion(&penv->unblock_shutdown);
  351. } else {
  352. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  353. complete(&penv->unblock_shutdown);
  354. }
  355. }
  356. EXPORT_SYMBOL(icnss_block_shutdown);
  357. bool icnss_is_fw_down(void)
  358. {
  359. struct icnss_priv *priv = icnss_get_plat_priv();
  360. if (!priv)
  361. return false;
  362. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  363. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  364. test_bit(ICNSS_REJUVENATE, &priv->state);
  365. }
  366. EXPORT_SYMBOL(icnss_is_fw_down);
  367. unsigned long icnss_get_device_config(void)
  368. {
  369. struct icnss_priv *priv = icnss_get_plat_priv();
  370. if (!priv)
  371. return 0;
  372. return priv->device_config;
  373. }
  374. EXPORT_SYMBOL(icnss_get_device_config);
  375. bool icnss_is_rejuvenate(void)
  376. {
  377. if (!penv)
  378. return false;
  379. else
  380. return test_bit(ICNSS_REJUVENATE, &penv->state);
  381. }
  382. EXPORT_SYMBOL(icnss_is_rejuvenate);
  383. bool icnss_is_pdr(void)
  384. {
  385. if (!penv)
  386. return false;
  387. else
  388. return test_bit(ICNSS_PDR, &penv->state);
  389. }
  390. EXPORT_SYMBOL(icnss_is_pdr);
  391. static bool icnss_is_smp2p_valid(struct icnss_priv *priv,
  392. enum smp2p_out_entry smp2p_entry)
  393. {
  394. if (priv->device_id == WCN6750_DEVICE_ID ||
  395. priv->device_id == WCN6450_DEVICE_ID ||
  396. priv->wpss_supported)
  397. return IS_ERR_OR_NULL(priv->smp2p_info[smp2p_entry].smem_state);
  398. else
  399. return 0;
  400. }
  401. static int icnss_send_smp2p(struct icnss_priv *priv,
  402. enum icnss_smp2p_msg_id msg_id,
  403. enum smp2p_out_entry smp2p_entry)
  404. {
  405. unsigned int value = 0;
  406. int ret;
  407. if (!priv || icnss_is_smp2p_valid(priv, smp2p_entry))
  408. return -EINVAL;
  409. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  410. if (msg_id == ICNSS_RESET_MSG) {
  411. priv->smp2p_info[smp2p_entry].seq = 0;
  412. ret = qcom_smem_state_update_bits(
  413. priv->smp2p_info[smp2p_entry].smem_state,
  414. ICNSS_SMEM_VALUE_MASK,
  415. 0);
  416. if (ret)
  417. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  418. ret, icnss_smp2p_str[smp2p_entry]);
  419. return ret;
  420. }
  421. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  422. !test_bit(ICNSS_FW_READY, &priv->state)) {
  423. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  424. priv->state);
  425. return -EINVAL;
  426. }
  427. value |= priv->smp2p_info[smp2p_entry].seq++;
  428. value <<= ICNSS_SMEM_SEQ_NO_POS;
  429. value |= msg_id;
  430. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  431. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  432. reinit_completion(&penv->smp2p_soc_wake_wait);
  433. ret = qcom_smem_state_update_bits(
  434. priv->smp2p_info[smp2p_entry].smem_state,
  435. ICNSS_SMEM_VALUE_MASK,
  436. value);
  437. if (ret) {
  438. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  439. icnss_smp2p_str[smp2p_entry]);
  440. } else {
  441. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  442. msg_id == ICNSS_SOC_WAKE_REL) {
  443. if (!wait_for_completion_timeout(
  444. &priv->smp2p_soc_wake_wait,
  445. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  446. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  447. icnss_smp2p_str[smp2p_entry]);
  448. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  449. ICNSS_ASSERT(0);
  450. }
  451. }
  452. }
  453. return ret;
  454. }
  455. bool icnss_is_low_power(void)
  456. {
  457. if (!penv)
  458. return false;
  459. else
  460. return test_bit(ICNSS_LOW_POWER, &penv->state);
  461. }
  462. EXPORT_SYMBOL(icnss_is_low_power);
  463. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  464. {
  465. struct icnss_priv *priv = ctx;
  466. if (priv)
  467. priv->force_err_fatal = true;
  468. icnss_pr_err("Received force error fatal request from FW\n");
  469. return IRQ_HANDLED;
  470. }
  471. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  472. {
  473. struct icnss_priv *priv = ctx;
  474. struct icnss_uevent_fw_down_data fw_down_data = {0};
  475. icnss_pr_err("Received early crash indication from FW\n");
  476. if (priv) {
  477. if (priv->wpss_self_recovery_enabled)
  478. mod_timer(&priv->wpss_ssr_timer,
  479. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  480. set_bit(ICNSS_FW_DOWN, &priv->state);
  481. icnss_ignore_fw_timeout(true);
  482. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  483. clear_bit(ICNSS_FW_READY, &priv->state);
  484. fw_down_data.crashed = true;
  485. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  486. &fw_down_data);
  487. }
  488. }
  489. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  490. 0, NULL);
  491. return IRQ_HANDLED;
  492. }
  493. static void register_fw_error_notifications(struct device *dev)
  494. {
  495. struct icnss_priv *priv = dev_get_drvdata(dev);
  496. struct device_node *dev_node;
  497. int irq = 0, ret = 0;
  498. if (!priv)
  499. return;
  500. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  501. if (!dev_node) {
  502. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  503. return;
  504. }
  505. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  506. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  507. ret = irq = of_irq_get_byname(dev_node,
  508. "qcom,smp2p-force-fatal-error");
  509. if (ret < 0) {
  510. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  511. irq);
  512. return;
  513. }
  514. }
  515. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  516. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  517. "wlanfw-err", priv);
  518. if (ret < 0) {
  519. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  520. irq, ret);
  521. return;
  522. }
  523. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  524. priv->fw_error_fatal_irq = irq;
  525. }
  526. static void register_early_crash_notifications(struct device *dev)
  527. {
  528. struct icnss_priv *priv = dev_get_drvdata(dev);
  529. struct device_node *dev_node;
  530. int irq = 0, ret = 0;
  531. if (!priv)
  532. return;
  533. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  534. if (!dev_node) {
  535. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  536. return;
  537. }
  538. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  539. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  540. ret = irq = of_irq_get_byname(dev_node,
  541. "qcom,smp2p-early-crash-ind");
  542. if (ret < 0) {
  543. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  544. irq);
  545. return;
  546. }
  547. }
  548. ret = devm_request_threaded_irq(dev, irq, NULL,
  549. fw_crash_indication_handler,
  550. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  551. "wlanfw-early-crash-ind", priv);
  552. if (ret < 0) {
  553. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  554. irq, ret);
  555. return;
  556. }
  557. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  558. priv->fw_early_crash_irq = irq;
  559. }
  560. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  561. {
  562. struct thermal_zone_device *thermal_dev;
  563. const char *tsens;
  564. int ret;
  565. ret = of_property_read_string(priv->pdev->dev.of_node,
  566. "tsens",
  567. &tsens);
  568. if (ret)
  569. return ret;
  570. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  571. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  572. if (IS_ERR_OR_NULL(thermal_dev)) {
  573. icnss_pr_err("Fail to get thermal zone. ret: %d",
  574. PTR_ERR(thermal_dev));
  575. return PTR_ERR(thermal_dev);
  576. }
  577. ret = thermal_zone_get_temp(thermal_dev, temp);
  578. if (ret)
  579. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  580. return ret;
  581. }
  582. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  583. {
  584. struct icnss_priv *priv = ctx;
  585. if (priv)
  586. complete(&priv->smp2p_soc_wake_wait);
  587. return IRQ_HANDLED;
  588. }
  589. static void register_soc_wake_notif(struct device *dev)
  590. {
  591. struct icnss_priv *priv = dev_get_drvdata(dev);
  592. struct device_node *dev_node;
  593. int irq = 0, ret = 0;
  594. if (!priv)
  595. return;
  596. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  597. if (!dev_node) {
  598. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  599. return;
  600. }
  601. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  602. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  603. ret = irq = of_irq_get_byname(dev_node,
  604. "qcom,smp2p-soc-wake-ack");
  605. if (ret < 0) {
  606. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  607. irq);
  608. return;
  609. }
  610. }
  611. ret = devm_request_threaded_irq(dev, irq, NULL,
  612. fw_soc_wake_ack_handler,
  613. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  614. IRQF_TRIGGER_FALLING,
  615. "wlanfw-soc-wake-ack", priv);
  616. if (ret < 0) {
  617. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  618. irq, ret);
  619. return;
  620. }
  621. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  622. priv->fw_soc_wake_ack_irq = irq;
  623. }
  624. int icnss_call_driver_uevent(struct icnss_priv *priv,
  625. enum icnss_uevent uevent, void *data)
  626. {
  627. struct icnss_uevent_data uevent_data;
  628. if (!priv->ops || !priv->ops->uevent)
  629. return 0;
  630. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  631. priv->state, uevent);
  632. uevent_data.uevent = uevent;
  633. uevent_data.data = data;
  634. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  635. }
  636. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  637. {
  638. int i;
  639. int ret = 0;
  640. ret = icnss_qmi_get_dms_mac(priv);
  641. if (ret == 0 && priv->dms.mac_valid)
  642. goto qmi_send;
  643. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  644. * Thus assert on failure to get MAC from DMS even after retries
  645. */
  646. if (priv->use_nv_mac) {
  647. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  648. if (priv->dms.mac_valid)
  649. break;
  650. ret = icnss_qmi_get_dms_mac(priv);
  651. if (ret != -EAGAIN)
  652. break;
  653. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  654. }
  655. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  656. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  657. ICNSS_ASSERT(0);
  658. return -EINVAL;
  659. }
  660. }
  661. qmi_send:
  662. if (priv->dms.mac_valid)
  663. ret =
  664. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  665. ARRAY_SIZE(priv->dms.mac));
  666. return ret;
  667. }
  668. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  669. enum smp2p_out_entry smp2p_entry)
  670. {
  671. int retry = 0;
  672. int error;
  673. if (priv->smp2p_info[smp2p_entry].smem_state)
  674. return;
  675. retry:
  676. priv->smp2p_info[smp2p_entry].smem_state =
  677. qcom_smem_state_get(&priv->pdev->dev,
  678. icnss_smp2p_str[smp2p_entry],
  679. &priv->smp2p_info[smp2p_entry].smem_bit);
  680. if (icnss_is_smp2p_valid(priv, smp2p_entry)) {
  681. if (retry++ < SMP2P_GET_MAX_RETRY) {
  682. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  683. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  684. error, icnss_smp2p_str[smp2p_entry]);
  685. msleep(SMP2P_GET_RETRY_DELAY_MS);
  686. goto retry;
  687. }
  688. ICNSS_ASSERT(0);
  689. return;
  690. }
  691. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  692. }
  693. static inline
  694. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  695. {
  696. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  697. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  698. } else {
  699. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  700. }
  701. }
  702. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  703. {
  704. switch (val) {
  705. case WLAN_RF_SLATE:
  706. return WLFW_WLAN_RF_SLATE_V01;
  707. case WLAN_RF_APACHE:
  708. return WLFW_WLAN_RF_APACHE_V01;
  709. default:
  710. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  711. }
  712. }
  713. #ifdef CONFIG_SLATE_MODULE_ENABLED
  714. static void icnss_send_wlan_boot_init(void)
  715. {
  716. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  717. icnss_pr_info("sent wlan boot init command\n");
  718. }
  719. static void icnss_send_wlan_boot_complete(void)
  720. {
  721. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  722. icnss_pr_info("sent wlan boot complete command\n");
  723. }
  724. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  725. {
  726. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  727. reinit_completion(&priv->slate_boot_complete);
  728. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  729. priv->state);
  730. wait_for_completion(&priv->slate_boot_complete);
  731. }
  732. if (!test_bit(ICNSS_SLATE_UP, &priv->state))
  733. return -EINVAL;
  734. icnss_send_wlan_boot_init();
  735. return 0;
  736. }
  737. #else
  738. static void icnss_send_wlan_boot_complete(void)
  739. {
  740. }
  741. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  742. {
  743. return 0;
  744. }
  745. #endif
  746. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  747. void *data)
  748. {
  749. int ret = 0;
  750. int temp = 0;
  751. bool ignore_assert = false;
  752. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  753. if (!priv)
  754. return -ENODEV;
  755. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  756. clear_bit(ICNSS_FW_DOWN, &priv->state);
  757. clear_bit(ICNSS_FW_READY, &priv->state);
  758. if (priv->is_slate_rfa) {
  759. ret = icnss_wait_for_slate_complete(priv);
  760. if (ret == -EINVAL) {
  761. icnss_pr_err("Slate complete failed\n");
  762. return ret;
  763. }
  764. }
  765. icnss_ignore_fw_timeout(false);
  766. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  767. icnss_pr_err("QMI Server already in Connected State\n");
  768. ICNSS_ASSERT(0);
  769. }
  770. ret = icnss_connect_to_fw_server(priv, data);
  771. if (ret)
  772. goto fail;
  773. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  774. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  775. ret = icnss_hw_power_on(priv);
  776. if (ret)
  777. goto fail;
  778. }
  779. ret = wlfw_ind_register_send_sync_msg(priv);
  780. if (ret < 0) {
  781. if (ret == -EALREADY) {
  782. ret = 0;
  783. goto qmi_registered;
  784. }
  785. ignore_assert = true;
  786. goto fail;
  787. }
  788. if (priv->is_rf_subtype_valid) {
  789. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  790. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  791. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  792. if (ret < 0)
  793. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  794. ret);
  795. } else {
  796. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  797. priv->rf_subtype);
  798. }
  799. }
  800. if (priv->device_id == WCN6750_DEVICE_ID ||
  801. priv->device_id == WCN6450_DEVICE_ID) {
  802. if (!icnss_get_temperature(priv, &temp)) {
  803. icnss_pr_dbg("Temperature: %d\n", temp);
  804. if (temp < WLAN_EN_TEMP_THRESHOLD)
  805. icnss_set_wlan_en_delay(priv);
  806. }
  807. ret = wlfw_host_cap_send_sync(priv);
  808. if (ret < 0)
  809. goto fail;
  810. }
  811. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  812. if (!priv->msa_va) {
  813. icnss_pr_err("Invalid MSA address\n");
  814. ret = -EINVAL;
  815. goto fail;
  816. }
  817. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  818. if (ret < 0) {
  819. ignore_assert = true;
  820. goto fail;
  821. }
  822. ret = wlfw_msa_ready_send_sync_msg(priv);
  823. if (ret < 0) {
  824. ignore_assert = true;
  825. goto fail;
  826. }
  827. }
  828. if (priv->device_id == WCN6450_DEVICE_ID)
  829. icnss_hw_power_off(priv);
  830. ret = wlfw_cap_send_sync_msg(priv);
  831. if (ret < 0) {
  832. ignore_assert = true;
  833. goto fail;
  834. }
  835. if (priv->device_id == ADRASTEA_DEVICE_ID && priv->is_chain1_supported) {
  836. ret = icnss_power_on_chain1_reg(priv);
  837. if (ret) {
  838. ignore_assert = true;
  839. goto fail;
  840. }
  841. }
  842. if (priv->device_id == WCN6750_DEVICE_ID ||
  843. priv->device_id == WCN6450_DEVICE_ID) {
  844. ret = icnss_hw_power_on(priv);
  845. if (ret)
  846. goto fail;
  847. ret = wlfw_device_info_send_msg(priv);
  848. if (ret < 0) {
  849. ignore_assert = true;
  850. goto device_info_failure;
  851. }
  852. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  853. priv->mem_base_pa,
  854. priv->mem_base_size);
  855. if (!priv->mem_base_va) {
  856. icnss_pr_err("Ioremap failed for bar address\n");
  857. goto device_info_failure;
  858. }
  859. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  860. &priv->mem_base_pa,
  861. priv->mem_base_va);
  862. if (priv->mhi_state_info_pa)
  863. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  864. priv->mhi_state_info_pa,
  865. PAGE_SIZE);
  866. if (!priv->mhi_state_info_va)
  867. icnss_pr_err("Ioremap failed for MHI info address\n");
  868. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  869. &priv->mhi_state_info_pa,
  870. priv->mhi_state_info_va);
  871. }
  872. if (priv->bdf_download_support) {
  873. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  874. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  875. priv->ctrl_params.bdf_type);
  876. if (ret < 0)
  877. goto device_info_failure;
  878. }
  879. if (priv->device_id == WCN6450_DEVICE_ID) {
  880. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  881. if (ret < 0)
  882. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  883. ret);
  884. }
  885. if (priv->device_id == WCN6750_DEVICE_ID ||
  886. priv->device_id == WCN6450_DEVICE_ID) {
  887. if (!priv->fw_soc_wake_ack_irq)
  888. register_soc_wake_notif(&priv->pdev->dev);
  889. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  890. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  891. }
  892. if (priv->wpss_supported)
  893. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  894. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  895. if (priv->bdf_download_support) {
  896. ret = wlfw_cal_report_req(priv);
  897. if (ret < 0)
  898. goto device_info_failure;
  899. }
  900. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  901. dynamic_feature_mask);
  902. }
  903. if (!priv->fw_error_fatal_irq)
  904. register_fw_error_notifications(&priv->pdev->dev);
  905. if (!priv->fw_early_crash_irq)
  906. register_early_crash_notifications(&priv->pdev->dev);
  907. if (priv->psf_supported)
  908. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  909. return ret;
  910. device_info_failure:
  911. icnss_hw_power_off(priv);
  912. fail:
  913. ICNSS_ASSERT(ignore_assert);
  914. qmi_registered:
  915. return ret;
  916. }
  917. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  918. {
  919. if (!priv)
  920. return -ENODEV;
  921. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  922. icnss_clear_server(priv);
  923. if (priv->psf_supported)
  924. priv->last_updated_voltage = 0;
  925. return 0;
  926. }
  927. static int icnss_call_driver_probe(struct icnss_priv *priv)
  928. {
  929. int ret = 0;
  930. int probe_cnt = 0;
  931. if (!priv->ops || !priv->ops->probe)
  932. return 0;
  933. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  934. return -EINVAL;
  935. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  936. icnss_hw_power_on(priv);
  937. icnss_block_shutdown(true);
  938. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  939. ret = priv->ops->probe(&priv->pdev->dev);
  940. probe_cnt++;
  941. if (ret != -EPROBE_DEFER)
  942. break;
  943. }
  944. if (ret < 0) {
  945. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  946. ret, priv->state, probe_cnt);
  947. icnss_block_shutdown(false);
  948. goto out;
  949. }
  950. icnss_block_shutdown(false);
  951. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  952. return 0;
  953. out:
  954. icnss_hw_power_off(priv);
  955. return ret;
  956. }
  957. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  958. {
  959. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  960. goto out;
  961. if (!priv->ops || !priv->ops->shutdown)
  962. goto out;
  963. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  964. goto out;
  965. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  966. priv->ops->shutdown(&priv->pdev->dev);
  967. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  968. out:
  969. return 0;
  970. }
  971. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  972. {
  973. int ret = 0;
  974. icnss_pm_relax(priv);
  975. icnss_call_driver_shutdown(priv);
  976. clear_bit(ICNSS_PDR, &priv->state);
  977. clear_bit(ICNSS_REJUVENATE, &priv->state);
  978. clear_bit(ICNSS_PD_RESTART, &priv->state);
  979. clear_bit(ICNSS_LOW_POWER, &priv->state);
  980. priv->early_crash_ind = false;
  981. priv->is_ssr = false;
  982. if (!priv->ops || !priv->ops->reinit)
  983. goto out;
  984. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  985. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  986. priv->state);
  987. goto out;
  988. }
  989. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  990. goto call_probe;
  991. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  992. icnss_hw_power_on(priv);
  993. icnss_block_shutdown(true);
  994. ret = priv->ops->reinit(&priv->pdev->dev);
  995. if (ret < 0) {
  996. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  997. ret, priv->state);
  998. if (!priv->allow_recursive_recovery)
  999. ICNSS_ASSERT(false);
  1000. icnss_block_shutdown(false);
  1001. goto out_power_off;
  1002. }
  1003. icnss_block_shutdown(false);
  1004. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  1005. return 0;
  1006. call_probe:
  1007. return icnss_call_driver_probe(priv);
  1008. out_power_off:
  1009. icnss_hw_power_off(priv);
  1010. out:
  1011. return ret;
  1012. }
  1013. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  1014. {
  1015. int ret = 0;
  1016. if (!priv)
  1017. return -ENODEV;
  1018. del_timer(&priv->recovery_timer);
  1019. set_bit(ICNSS_FW_READY, &priv->state);
  1020. clear_bit(ICNSS_MODE_ON, &priv->state);
  1021. atomic_set(&priv->soc_wake_ref_count, 0);
  1022. if (priv->device_id == WCN6750_DEVICE_ID ||
  1023. priv->device_id == WCN6450_DEVICE_ID)
  1024. icnss_free_qdss_mem(priv);
  1025. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  1026. icnss_hw_power_off(priv);
  1027. if (!priv->pdev) {
  1028. icnss_pr_err("Device is not ready\n");
  1029. ret = -ENODEV;
  1030. goto out;
  1031. }
  1032. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  1033. icnss_send_wlan_boot_complete();
  1034. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1035. ret = icnss_pd_restart_complete(priv);
  1036. } else {
  1037. if (priv->wpss_supported)
  1038. icnss_setup_dms_mac(priv);
  1039. ret = icnss_call_driver_probe(priv);
  1040. }
  1041. icnss_vreg_unvote(priv);
  1042. out:
  1043. return ret;
  1044. }
  1045. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1046. {
  1047. int ret = 0;
  1048. if (!priv)
  1049. return -ENODEV;
  1050. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1051. if (priv->device_id == WCN6750_DEVICE_ID) {
  1052. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1053. if (ret < 0)
  1054. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1055. ret);
  1056. }
  1057. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1058. mod_timer(&priv->recovery_timer,
  1059. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1060. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1061. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1062. } else {
  1063. icnss_driver_event_fw_ready_ind(priv, NULL);
  1064. }
  1065. return ret;
  1066. }
  1067. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1068. {
  1069. struct platform_device *pdev = priv->pdev;
  1070. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1071. int i, j;
  1072. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1073. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1074. qdss_mem[i].va =
  1075. dma_alloc_coherent(&pdev->dev,
  1076. qdss_mem[i].size,
  1077. &qdss_mem[i].pa,
  1078. GFP_KERNEL);
  1079. if (!qdss_mem[i].va) {
  1080. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1081. qdss_mem[i].size,
  1082. qdss_mem[i].type, i);
  1083. break;
  1084. }
  1085. }
  1086. }
  1087. /* Best-effort allocation for QDSS trace */
  1088. if (i < priv->qdss_mem_seg_len) {
  1089. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1090. qdss_mem[j].type = 0;
  1091. qdss_mem[j].size = 0;
  1092. }
  1093. priv->qdss_mem_seg_len = i;
  1094. }
  1095. return 0;
  1096. }
  1097. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1098. {
  1099. struct platform_device *pdev = priv->pdev;
  1100. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1101. int i;
  1102. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1103. if (qdss_mem[i].va && qdss_mem[i].size) {
  1104. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1105. &qdss_mem[i].pa, qdss_mem[i].size,
  1106. qdss_mem[i].type);
  1107. dma_free_coherent(&pdev->dev,
  1108. qdss_mem[i].size, qdss_mem[i].va,
  1109. qdss_mem[i].pa);
  1110. qdss_mem[i].va = NULL;
  1111. qdss_mem[i].pa = 0;
  1112. qdss_mem[i].size = 0;
  1113. qdss_mem[i].type = 0;
  1114. }
  1115. }
  1116. priv->qdss_mem_seg_len = 0;
  1117. }
  1118. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1119. {
  1120. int ret = 0;
  1121. ret = icnss_alloc_qdss_mem(priv);
  1122. if (ret < 0)
  1123. return ret;
  1124. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1125. }
  1126. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1127. u64 pa, u32 size, int *seg_id)
  1128. {
  1129. int i = 0;
  1130. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1131. u64 offset = 0;
  1132. void *va = NULL;
  1133. u64 local_pa;
  1134. u32 local_size;
  1135. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1136. local_pa = (u64)qdss_mem[i].pa;
  1137. local_size = (u32)qdss_mem[i].size;
  1138. if (pa == local_pa && size <= local_size) {
  1139. va = qdss_mem[i].va;
  1140. break;
  1141. }
  1142. if (pa > local_pa &&
  1143. pa < local_pa + local_size &&
  1144. pa + size <= local_pa + local_size) {
  1145. offset = pa - local_pa;
  1146. va = qdss_mem[i].va + offset;
  1147. break;
  1148. }
  1149. }
  1150. *seg_id = i;
  1151. return va;
  1152. }
  1153. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1154. void *data)
  1155. {
  1156. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1157. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1158. int ret = 0;
  1159. int i;
  1160. void *va = NULL;
  1161. u64 pa;
  1162. u32 size;
  1163. int seg_id = 0;
  1164. if (!priv->qdss_mem_seg_len) {
  1165. icnss_pr_err("Memory for QDSS trace is not available\n");
  1166. return -ENOMEM;
  1167. }
  1168. if (event_data->mem_seg_len == 0) {
  1169. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1170. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1171. ICNSS_GENL_MSG_TYPE_QDSS,
  1172. event_data->file_name,
  1173. qdss_mem[i].size);
  1174. if (ret < 0) {
  1175. icnss_pr_err("Fail to save QDSS data: %d\n",
  1176. ret);
  1177. break;
  1178. }
  1179. }
  1180. } else {
  1181. for (i = 0; i < event_data->mem_seg_len; i++) {
  1182. pa = event_data->mem_seg[i].addr;
  1183. size = event_data->mem_seg[i].size;
  1184. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1185. size, &seg_id);
  1186. if (!va) {
  1187. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1188. &pa);
  1189. ret = -EINVAL;
  1190. break;
  1191. }
  1192. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1193. event_data->file_name, size);
  1194. if (ret < 0) {
  1195. icnss_pr_err("Fail to save QDSS data: %d\n",
  1196. ret);
  1197. break;
  1198. }
  1199. }
  1200. }
  1201. kfree(data);
  1202. return ret;
  1203. }
  1204. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1205. {
  1206. int dec, c = atomic_read(v);
  1207. do {
  1208. dec = c - 1;
  1209. if (unlikely(dec < 1))
  1210. break;
  1211. } while (!atomic_try_cmpxchg(v, &c, dec));
  1212. return dec;
  1213. }
  1214. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1215. void *data)
  1216. {
  1217. int ret = 0;
  1218. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1219. if (!priv)
  1220. return -ENODEV;
  1221. if (!data)
  1222. return -EINVAL;
  1223. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1224. event_data->total_size);
  1225. kfree(data);
  1226. return ret;
  1227. }
  1228. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1229. {
  1230. int ret = 0;
  1231. if (!priv)
  1232. return -ENODEV;
  1233. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1234. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1235. atomic_read(&priv->soc_wake_ref_count));
  1236. return 0;
  1237. }
  1238. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1239. ICNSS_SMP2P_OUT_SOC_WAKE);
  1240. if (!ret)
  1241. atomic_inc(&priv->soc_wake_ref_count);
  1242. return ret;
  1243. }
  1244. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1245. {
  1246. int ret = 0;
  1247. if (!priv)
  1248. return -ENODEV;
  1249. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1250. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1251. priv->soc_wake_ref_count);
  1252. return 0;
  1253. }
  1254. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1255. ICNSS_SMP2P_OUT_SOC_WAKE);
  1256. return ret;
  1257. }
  1258. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1259. void *data)
  1260. {
  1261. int ret = 0;
  1262. int probe_cnt = 0;
  1263. if (priv->ops)
  1264. return -EEXIST;
  1265. priv->ops = data;
  1266. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1267. set_bit(ICNSS_FW_READY, &priv->state);
  1268. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1269. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1270. priv->state);
  1271. return -ENODEV;
  1272. }
  1273. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1274. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1275. priv->state);
  1276. goto out;
  1277. }
  1278. ret = icnss_hw_power_on(priv);
  1279. if (ret)
  1280. goto out;
  1281. icnss_block_shutdown(true);
  1282. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1283. ret = priv->ops->probe(&priv->pdev->dev);
  1284. probe_cnt++;
  1285. if (ret != -EPROBE_DEFER)
  1286. break;
  1287. }
  1288. if (ret) {
  1289. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1290. ret, priv->state, probe_cnt);
  1291. icnss_block_shutdown(false);
  1292. goto power_off;
  1293. }
  1294. icnss_block_shutdown(false);
  1295. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1296. return 0;
  1297. power_off:
  1298. icnss_hw_power_off(priv);
  1299. out:
  1300. return ret;
  1301. }
  1302. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1303. void *data)
  1304. {
  1305. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1306. priv->ops = NULL;
  1307. goto out;
  1308. }
  1309. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1310. icnss_block_shutdown(true);
  1311. if (priv->ops)
  1312. priv->ops->remove(&priv->pdev->dev);
  1313. icnss_block_shutdown(false);
  1314. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1315. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1316. priv->ops = NULL;
  1317. icnss_hw_power_off(priv);
  1318. out:
  1319. return 0;
  1320. }
  1321. static int icnss_fw_crashed(struct icnss_priv *priv,
  1322. struct icnss_event_pd_service_down_data *event_data)
  1323. {
  1324. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1325. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1326. set_bit(ICNSS_PD_RESTART, &priv->state);
  1327. icnss_pm_stay_awake(priv);
  1328. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state) &&
  1329. test_bit(ICNSS_FW_READY, &priv->state)) {
  1330. clear_bit(ICNSS_FW_READY, &priv->state);
  1331. fw_down_data.crashed = true;
  1332. icnss_call_driver_uevent(priv,
  1333. ICNSS_UEVENT_FW_DOWN,
  1334. &fw_down_data);
  1335. }
  1336. if (event_data && event_data->fw_rejuvenate)
  1337. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1338. return 0;
  1339. }
  1340. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1341. struct icnss_uevent_hang_data *hang_data)
  1342. {
  1343. if (!priv->hang_event_data_va)
  1344. return -EINVAL;
  1345. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1346. priv->hang_event_data_len,
  1347. GFP_ATOMIC);
  1348. if (!priv->hang_event_data)
  1349. return -ENOMEM;
  1350. // Update the hang event params
  1351. hang_data->hang_event_data = priv->hang_event_data;
  1352. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1353. return 0;
  1354. }
  1355. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1356. {
  1357. struct icnss_uevent_hang_data hang_data = {0};
  1358. int ret = 0xFF;
  1359. if (priv->early_crash_ind) {
  1360. ret = icnss_update_hang_event_data(priv, &hang_data);
  1361. if (ret)
  1362. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1363. }
  1364. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1365. &hang_data);
  1366. if (!ret) {
  1367. kfree(priv->hang_event_data);
  1368. priv->hang_event_data = NULL;
  1369. }
  1370. return 0;
  1371. }
  1372. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1373. void *data)
  1374. {
  1375. struct icnss_event_pd_service_down_data *event_data = data;
  1376. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1377. icnss_ignore_fw_timeout(false);
  1378. goto out;
  1379. }
  1380. if (priv->force_err_fatal)
  1381. ICNSS_ASSERT(0);
  1382. if (priv->device_id == WCN6750_DEVICE_ID ||
  1383. priv->device_id == WCN6450_DEVICE_ID) {
  1384. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1385. ICNSS_SMP2P_OUT_SOC_WAKE);
  1386. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1387. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1388. }
  1389. if (priv->wpss_supported)
  1390. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1391. ICNSS_SMP2P_OUT_POWER_SAVE);
  1392. icnss_send_hang_event_data(priv);
  1393. if (priv->early_crash_ind) {
  1394. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1395. event_data->crashed, priv->state);
  1396. goto out;
  1397. }
  1398. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1399. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1400. event_data->crashed, priv->state);
  1401. if (!priv->allow_recursive_recovery)
  1402. ICNSS_ASSERT(0);
  1403. goto out;
  1404. }
  1405. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1406. icnss_fw_crashed(priv, event_data);
  1407. out:
  1408. kfree(data);
  1409. return 0;
  1410. }
  1411. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1412. void *data)
  1413. {
  1414. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1415. icnss_ignore_fw_timeout(false);
  1416. goto out;
  1417. }
  1418. priv->early_crash_ind = true;
  1419. icnss_fw_crashed(priv, NULL);
  1420. out:
  1421. kfree(data);
  1422. return 0;
  1423. }
  1424. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1425. void *data)
  1426. {
  1427. int ret = 0;
  1428. if (!priv->ops || !priv->ops->idle_shutdown)
  1429. return 0;
  1430. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1431. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1432. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1433. ret = -EBUSY;
  1434. } else {
  1435. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1436. priv->state);
  1437. icnss_block_shutdown(true);
  1438. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1439. icnss_block_shutdown(false);
  1440. }
  1441. return ret;
  1442. }
  1443. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1444. void *data)
  1445. {
  1446. int ret = 0;
  1447. if (!priv->ops || !priv->ops->idle_restart)
  1448. return 0;
  1449. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1450. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1451. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1452. ret = -EBUSY;
  1453. } else {
  1454. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1455. priv->state);
  1456. icnss_block_shutdown(true);
  1457. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1458. icnss_block_shutdown(false);
  1459. }
  1460. return ret;
  1461. }
  1462. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1463. {
  1464. icnss_free_qdss_mem(priv);
  1465. return 0;
  1466. }
  1467. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1468. void *data)
  1469. {
  1470. struct icnss_m3_upload_segments_req_data *event_data = data;
  1471. struct qcom_dump_segment segment;
  1472. int i, status = 0, ret = 0;
  1473. struct list_head head;
  1474. if (!dump_enabled()) {
  1475. icnss_pr_info("Dump collection is not enabled\n");
  1476. return ret;
  1477. }
  1478. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1479. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1480. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1481. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1482. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1483. return ret;
  1484. INIT_LIST_HEAD(&head);
  1485. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1486. memset(&segment, 0, sizeof(segment));
  1487. segment.va = devm_ioremap(&priv->pdev->dev,
  1488. event_data->m3_segment[i].addr,
  1489. event_data->m3_segment[i].size);
  1490. if (!segment.va) {
  1491. icnss_pr_err("Failed to ioremap M3 Dump region");
  1492. ret = -ENOMEM;
  1493. goto send_resp;
  1494. }
  1495. segment.size = event_data->m3_segment[i].size;
  1496. list_add(&segment.node, &head);
  1497. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1498. event_data->m3_segment[i].name);
  1499. switch (event_data->m3_segment[i].type) {
  1500. case QMI_M3_SEGMENT_PHYAREG_V01:
  1501. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1502. break;
  1503. case QMI_M3_SEGMENT_PHYDBG_V01:
  1504. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1505. break;
  1506. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1507. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1508. break;
  1509. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1510. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1511. break;
  1512. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1513. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1514. break;
  1515. default:
  1516. icnss_pr_err("Invalid Segment type: %d",
  1517. event_data->m3_segment[i].type);
  1518. }
  1519. if (ret) {
  1520. status = ret;
  1521. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1522. event_data->m3_segment[i].name, ret);
  1523. }
  1524. list_del(&segment.node);
  1525. }
  1526. send_resp:
  1527. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1528. status);
  1529. return ret;
  1530. }
  1531. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1532. {
  1533. int ret = 0;
  1534. struct icnss_subsys_restart_level_data *event_data = data;
  1535. if (!priv)
  1536. return -ENODEV;
  1537. if (!data)
  1538. return -EINVAL;
  1539. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1540. kfree(data);
  1541. return ret;
  1542. }
  1543. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1544. {
  1545. int ret;
  1546. struct icnss_priv *priv = icnss_get_plat_priv();
  1547. rproc_shutdown(priv->rproc);
  1548. ret = rproc_boot(priv->rproc);
  1549. if (ret) {
  1550. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1551. rproc_put(priv->rproc);
  1552. }
  1553. }
  1554. static void icnss_driver_event_work(struct work_struct *work)
  1555. {
  1556. struct icnss_priv *priv =
  1557. container_of(work, struct icnss_priv, event_work);
  1558. struct icnss_driver_event *event;
  1559. unsigned long flags;
  1560. int ret;
  1561. icnss_pm_stay_awake(priv);
  1562. spin_lock_irqsave(&priv->event_lock, flags);
  1563. while (!list_empty(&priv->event_list)) {
  1564. event = list_first_entry(&priv->event_list,
  1565. struct icnss_driver_event, list);
  1566. list_del(&event->list);
  1567. spin_unlock_irqrestore(&priv->event_lock, flags);
  1568. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1569. icnss_driver_event_to_str(event->type),
  1570. event->sync ? "-sync" : "", event->type,
  1571. priv->state);
  1572. switch (event->type) {
  1573. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1574. ret = icnss_driver_event_server_arrive(priv,
  1575. event->data);
  1576. break;
  1577. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1578. ret = icnss_driver_event_server_exit(priv);
  1579. break;
  1580. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1581. ret = icnss_driver_event_fw_ready_ind(priv,
  1582. event->data);
  1583. break;
  1584. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1585. ret = icnss_driver_event_register_driver(priv,
  1586. event->data);
  1587. break;
  1588. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1589. ret = icnss_driver_event_unregister_driver(priv,
  1590. event->data);
  1591. break;
  1592. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1593. ret = icnss_driver_event_pd_service_down(priv,
  1594. event->data);
  1595. break;
  1596. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1597. ret = icnss_driver_event_early_crash_ind(priv,
  1598. event->data);
  1599. break;
  1600. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1601. ret = icnss_driver_event_idle_shutdown(priv,
  1602. event->data);
  1603. break;
  1604. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1605. ret = icnss_driver_event_idle_restart(priv,
  1606. event->data);
  1607. break;
  1608. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1609. ret = icnss_driver_event_fw_init_done(priv,
  1610. event->data);
  1611. break;
  1612. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1613. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1614. break;
  1615. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1616. ret = icnss_qdss_trace_save_hdlr(priv,
  1617. event->data);
  1618. break;
  1619. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1620. ret = icnss_qdss_trace_free_hdlr(priv);
  1621. break;
  1622. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1623. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1624. break;
  1625. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1626. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1627. event->data);
  1628. break;
  1629. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1630. ret = icnss_subsys_restart_level(priv, event->data);
  1631. break;
  1632. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1633. ret = icnss_process_wfc_call_ind_event(priv,
  1634. event->data);
  1635. break;
  1636. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1637. ret = icnss_process_twt_cfg_ind_event(priv,
  1638. event->data);
  1639. break;
  1640. default:
  1641. icnss_pr_err("Invalid Event type: %d", event->type);
  1642. kfree(event);
  1643. continue;
  1644. }
  1645. priv->stats.events[event->type].processed++;
  1646. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1647. icnss_driver_event_to_str(event->type),
  1648. event->sync ? "-sync" : "", event->type, ret,
  1649. priv->state);
  1650. spin_lock_irqsave(&priv->event_lock, flags);
  1651. if (event->sync) {
  1652. event->ret = ret;
  1653. complete(&event->complete);
  1654. continue;
  1655. }
  1656. spin_unlock_irqrestore(&priv->event_lock, flags);
  1657. kfree(event);
  1658. spin_lock_irqsave(&priv->event_lock, flags);
  1659. }
  1660. spin_unlock_irqrestore(&priv->event_lock, flags);
  1661. icnss_pm_relax(priv);
  1662. }
  1663. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1664. {
  1665. struct icnss_priv *priv =
  1666. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1667. struct icnss_soc_wake_event *event;
  1668. unsigned long flags;
  1669. int ret;
  1670. icnss_pm_stay_awake(priv);
  1671. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1672. while (!list_empty(&priv->soc_wake_msg_list)) {
  1673. event = list_first_entry(&priv->soc_wake_msg_list,
  1674. struct icnss_soc_wake_event, list);
  1675. list_del(&event->list);
  1676. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1677. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1678. icnss_soc_wake_event_to_str(event->type),
  1679. event->sync ? "-sync" : "", event->type,
  1680. priv->state);
  1681. switch (event->type) {
  1682. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1683. ret = icnss_event_soc_wake_request(priv,
  1684. event->data);
  1685. break;
  1686. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1687. ret = icnss_event_soc_wake_release(priv,
  1688. event->data);
  1689. break;
  1690. default:
  1691. icnss_pr_err("Invalid Event type: %d", event->type);
  1692. kfree(event);
  1693. continue;
  1694. }
  1695. priv->stats.soc_wake_events[event->type].processed++;
  1696. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1697. icnss_soc_wake_event_to_str(event->type),
  1698. event->sync ? "-sync" : "", event->type, ret,
  1699. priv->state);
  1700. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1701. if (event->sync) {
  1702. event->ret = ret;
  1703. complete(&event->complete);
  1704. continue;
  1705. }
  1706. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1707. kfree(event);
  1708. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1709. }
  1710. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1711. icnss_pm_relax(priv);
  1712. }
  1713. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1714. {
  1715. int ret = 0;
  1716. struct qcom_dump_segment segment;
  1717. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1718. struct list_head head;
  1719. if (!dump_enabled()) {
  1720. icnss_pr_info("Dump collection is not enabled\n");
  1721. return ret;
  1722. }
  1723. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1724. return ret;
  1725. INIT_LIST_HEAD(&head);
  1726. memset(&segment, 0, sizeof(segment));
  1727. segment.va = priv->msa_va;
  1728. segment.size = priv->msa_mem_size;
  1729. list_add(&segment.node, &head);
  1730. if (!msa0_dump_dev->dev) {
  1731. icnss_pr_err("Created Dump Device not found\n");
  1732. return 0;
  1733. }
  1734. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1735. if (ret) {
  1736. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1737. return ret;
  1738. }
  1739. list_del(&segment.node);
  1740. return ret;
  1741. }
  1742. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1743. void *data)
  1744. {
  1745. struct qcom_ssr_notify_data *notif = data;
  1746. int ret = 0;
  1747. if (!notif->crashed) {
  1748. if (atomic_read(&priv->is_shutdown)) {
  1749. atomic_set(&priv->is_shutdown, false);
  1750. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1751. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1752. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1753. clear_bit(ICNSS_FW_READY, &priv->state);
  1754. icnss_driver_event_post(priv,
  1755. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1756. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1757. NULL);
  1758. }
  1759. }
  1760. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1761. if (!wait_for_completion_timeout(
  1762. &priv->unblock_shutdown,
  1763. msecs_to_jiffies(PROBE_TIMEOUT)))
  1764. icnss_pr_err("modem block shutdown timeout\n");
  1765. }
  1766. ret = wlfw_send_modem_shutdown_msg(priv);
  1767. if (ret < 0)
  1768. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1769. ret);
  1770. }
  1771. }
  1772. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1773. {
  1774. switch (code) {
  1775. case QCOM_SSR_BEFORE_POWERUP:
  1776. return "BEFORE_POWERUP";
  1777. case QCOM_SSR_AFTER_POWERUP:
  1778. return "AFTER_POWERUP";
  1779. case QCOM_SSR_BEFORE_SHUTDOWN:
  1780. return "BEFORE_SHUTDOWN";
  1781. case QCOM_SSR_AFTER_SHUTDOWN:
  1782. return "AFTER_SHUTDOWN";
  1783. default:
  1784. return "UNKNOWN";
  1785. }
  1786. };
  1787. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1788. unsigned long code,
  1789. void *data)
  1790. {
  1791. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1792. wpss_early_ssr_nb);
  1793. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1794. icnss_qcom_ssr_notify_state_to_str(code), code);
  1795. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1796. set_bit(ICNSS_FW_DOWN, &priv->state);
  1797. icnss_ignore_fw_timeout(true);
  1798. }
  1799. return NOTIFY_DONE;
  1800. }
  1801. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1802. unsigned long code,
  1803. void *data)
  1804. {
  1805. struct icnss_event_pd_service_down_data *event_data;
  1806. struct qcom_ssr_notify_data *notif = data;
  1807. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1808. wpss_ssr_nb);
  1809. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1810. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1811. icnss_qcom_ssr_notify_state_to_str(code), code);
  1812. switch (code) {
  1813. case QCOM_SSR_BEFORE_SHUTDOWN:
  1814. break;
  1815. case QCOM_SSR_AFTER_SHUTDOWN:
  1816. /* Collect ramdump only when there was a crash. */
  1817. if (notif->crashed) {
  1818. icnss_pr_info("Collecting msa0 segment dump\n");
  1819. icnss_msa0_ramdump(priv);
  1820. }
  1821. goto out;
  1822. default:
  1823. goto out;
  1824. }
  1825. if (priv->wpss_self_recovery_enabled)
  1826. del_timer(&priv->wpss_ssr_timer);
  1827. priv->is_ssr = true;
  1828. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1829. priv->state, notif->crashed);
  1830. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1831. icnss_update_state_send_modem_shutdown(priv, data);
  1832. set_bit(ICNSS_FW_DOWN, &priv->state);
  1833. icnss_ignore_fw_timeout(true);
  1834. if (notif->crashed)
  1835. priv->stats.recovery.root_pd_crash++;
  1836. else
  1837. priv->stats.recovery.root_pd_shutdown++;
  1838. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1839. if (event_data == NULL)
  1840. return notifier_from_errno(-ENOMEM);
  1841. event_data->crashed = notif->crashed;
  1842. fw_down_data.crashed = !!notif->crashed;
  1843. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1844. clear_bit(ICNSS_FW_READY, &priv->state);
  1845. fw_down_data.crashed = !!notif->crashed;
  1846. icnss_call_driver_uevent(priv,
  1847. ICNSS_UEVENT_FW_DOWN,
  1848. &fw_down_data);
  1849. }
  1850. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1851. ICNSS_EVENT_SYNC, event_data);
  1852. if (notif->crashed)
  1853. mod_timer(&priv->recovery_timer,
  1854. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1855. out:
  1856. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1857. return NOTIFY_OK;
  1858. }
  1859. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1860. unsigned long code,
  1861. void *data)
  1862. {
  1863. struct icnss_event_pd_service_down_data *event_data;
  1864. struct qcom_ssr_notify_data *notif = data;
  1865. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1866. modem_ssr_nb);
  1867. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1868. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1869. icnss_qcom_ssr_notify_state_to_str(code), code);
  1870. switch (code) {
  1871. case QCOM_SSR_BEFORE_SHUTDOWN:
  1872. if (priv->is_slate_rfa)
  1873. complete(&priv->slate_boot_complete);
  1874. if (!notif->crashed &&
  1875. priv->low_power_support) { /* Hibernate */
  1876. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1877. icnss_driver_event_post(
  1878. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1879. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1880. set_bit(ICNSS_LOW_POWER, &priv->state);
  1881. }
  1882. break;
  1883. case QCOM_SSR_AFTER_SHUTDOWN:
  1884. /* Collect ramdump only when there was a crash. */
  1885. if (notif->crashed) {
  1886. icnss_pr_info("Collecting msa0 segment dump\n");
  1887. icnss_msa0_ramdump(priv);
  1888. }
  1889. goto out;
  1890. default:
  1891. goto out;
  1892. }
  1893. priv->is_ssr = true;
  1894. if (notif->crashed) {
  1895. priv->stats.recovery.root_pd_crash++;
  1896. priv->root_pd_shutdown = false;
  1897. } else {
  1898. priv->stats.recovery.root_pd_shutdown++;
  1899. priv->root_pd_shutdown = true;
  1900. }
  1901. icnss_update_state_send_modem_shutdown(priv, data);
  1902. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1903. set_bit(ICNSS_FW_DOWN, &priv->state);
  1904. icnss_ignore_fw_timeout(true);
  1905. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1906. clear_bit(ICNSS_FW_READY, &priv->state);
  1907. fw_down_data.crashed = !!notif->crashed;
  1908. icnss_call_driver_uevent(priv,
  1909. ICNSS_UEVENT_FW_DOWN,
  1910. &fw_down_data);
  1911. }
  1912. goto out;
  1913. }
  1914. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1915. priv->state, notif->crashed);
  1916. set_bit(ICNSS_FW_DOWN, &priv->state);
  1917. icnss_ignore_fw_timeout(true);
  1918. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1919. if (event_data == NULL)
  1920. return notifier_from_errno(-ENOMEM);
  1921. event_data->crashed = notif->crashed;
  1922. fw_down_data.crashed = !!notif->crashed;
  1923. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1924. clear_bit(ICNSS_FW_READY, &priv->state);
  1925. fw_down_data.crashed = !!notif->crashed;
  1926. icnss_call_driver_uevent(priv,
  1927. ICNSS_UEVENT_FW_DOWN,
  1928. &fw_down_data);
  1929. }
  1930. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1931. ICNSS_EVENT_SYNC, event_data);
  1932. if (notif->crashed)
  1933. mod_timer(&priv->recovery_timer,
  1934. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1935. out:
  1936. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1937. return NOTIFY_OK;
  1938. }
  1939. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1940. {
  1941. int ret = 0;
  1942. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1943. priv->wpss_early_notify_handler =
  1944. qcom_register_early_ssr_notifier("wpss",
  1945. &priv->wpss_early_ssr_nb);
  1946. if (IS_ERR_OR_NULL(priv->wpss_early_notify_handler)) {
  1947. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1948. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1949. }
  1950. return ret;
  1951. }
  1952. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1953. {
  1954. int ret = 0;
  1955. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1956. /*
  1957. * Assign priority of icnss wpss notifier callback over IPA
  1958. * modem notifier callback which is 0
  1959. */
  1960. priv->wpss_ssr_nb.priority = 1;
  1961. priv->wpss_notify_handler =
  1962. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1963. if (IS_ERR_OR_NULL(priv->wpss_notify_handler)) {
  1964. ret = PTR_ERR(priv->wpss_notify_handler);
  1965. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1966. }
  1967. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1968. return ret;
  1969. }
  1970. #ifdef CONFIG_SLATE_MODULE_ENABLED
  1971. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  1972. unsigned long event, void *data)
  1973. {
  1974. icnss_pr_info("Received slate event 0x%x\n", event);
  1975. if (event == SLATE_STATUS) {
  1976. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1977. seb_nb);
  1978. enum boot_status status = *(enum boot_status *)data;
  1979. if (status == SLATE_READY) {
  1980. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  1981. priv->state);
  1982. set_bit(ICNSS_SLATE_READY, &priv->state);
  1983. set_bit(ICNSS_SLATE_UP, &priv->state);
  1984. complete(&priv->slate_boot_complete);
  1985. }
  1986. }
  1987. return NOTIFY_OK;
  1988. }
  1989. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1990. {
  1991. int ret = 0;
  1992. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  1993. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  1994. &priv->seb_nb);
  1995. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  1996. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  1997. icnss_pr_err("SLATE event register notifier failed: %d\n",
  1998. ret);
  1999. }
  2000. return ret;
  2001. }
  2002. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2003. {
  2004. int ret = 0;
  2005. ret = seb_unregister_for_slate_event(priv->seb_handle, &priv->seb_nb);
  2006. if (ret < 0)
  2007. icnss_pr_err("Slate event unregister failed: %d\n", ret);
  2008. return ret;
  2009. }
  2010. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  2011. unsigned long code,
  2012. void *data)
  2013. {
  2014. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  2015. slate_ssr_nb);
  2016. int ret = 0;
  2017. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  2018. if (code == QCOM_SSR_AFTER_POWERUP &&
  2019. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  2020. set_bit(ICNSS_SLATE_UP, &priv->state);
  2021. complete(&priv->slate_boot_complete);
  2022. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  2023. priv->state);
  2024. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  2025. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  2026. clear_bit(ICNSS_SLATE_UP, &priv->state);
  2027. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2028. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  2029. priv->state);
  2030. goto skip_pdr;
  2031. }
  2032. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  2033. ret = icnss_trigger_recovery(&priv->pdev->dev);
  2034. if (ret < 0) {
  2035. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  2036. ret, priv->state);
  2037. goto skip_pdr;
  2038. }
  2039. }
  2040. skip_pdr:
  2041. return NOTIFY_OK;
  2042. }
  2043. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2044. {
  2045. int ret = 0;
  2046. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  2047. priv->slate_notify_handler =
  2048. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  2049. if (IS_ERR_OR_NULL(priv->slate_notify_handler)) {
  2050. ret = PTR_ERR(priv->slate_notify_handler);
  2051. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  2052. }
  2053. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  2054. return ret;
  2055. }
  2056. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2057. {
  2058. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  2059. return 0;
  2060. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  2061. &priv->slate_ssr_nb);
  2062. priv->slate_notify_handler = NULL;
  2063. return 0;
  2064. }
  2065. #else
  2066. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2067. {
  2068. return 0;
  2069. }
  2070. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2071. {
  2072. return 0;
  2073. }
  2074. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2075. {
  2076. return 0;
  2077. }
  2078. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2079. {
  2080. return 0;
  2081. }
  2082. #endif
  2083. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2084. {
  2085. int ret = 0;
  2086. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2087. /*
  2088. * Assign priority of icnss modem notifier callback over IPA
  2089. * modem notifier callback which is 0
  2090. */
  2091. priv->modem_ssr_nb.priority = 1;
  2092. priv->modem_notify_handler =
  2093. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2094. if (IS_ERR_OR_NULL(priv->modem_notify_handler)) {
  2095. ret = PTR_ERR(priv->modem_notify_handler);
  2096. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2097. }
  2098. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2099. return ret;
  2100. }
  2101. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2102. {
  2103. if (IS_ERR_OR_NULL(priv->wpss_early_notify_handler))
  2104. return;
  2105. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2106. &priv->wpss_early_ssr_nb);
  2107. priv->wpss_early_notify_handler = NULL;
  2108. }
  2109. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2110. {
  2111. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2112. return 0;
  2113. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2114. &priv->wpss_ssr_nb);
  2115. priv->wpss_notify_handler = NULL;
  2116. return 0;
  2117. }
  2118. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2119. {
  2120. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2121. return 0;
  2122. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2123. &priv->modem_ssr_nb);
  2124. priv->modem_notify_handler = NULL;
  2125. return 0;
  2126. }
  2127. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2128. {
  2129. struct icnss_priv *priv = priv_cb;
  2130. struct icnss_event_pd_service_down_data *event_data;
  2131. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2132. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2133. if (!priv)
  2134. return;
  2135. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2136. state, priv->state);
  2137. switch (state) {
  2138. case SERVREG_SERVICE_STATE_DOWN:
  2139. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2140. if (!event_data)
  2141. return;
  2142. event_data->crashed = true;
  2143. if (!priv->is_ssr) {
  2144. set_bit(ICNSS_PDR, &penv->state);
  2145. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2146. cause = ICNSS_HOST_ERROR;
  2147. priv->stats.recovery.pdr_host_error++;
  2148. } else {
  2149. cause = ICNSS_FW_CRASH;
  2150. priv->stats.recovery.pdr_fw_crash++;
  2151. }
  2152. } else if (priv->root_pd_shutdown) {
  2153. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2154. event_data->crashed = false;
  2155. }
  2156. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2157. priv->state, icnss_pdr_cause[cause]);
  2158. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2159. set_bit(ICNSS_FW_DOWN, &priv->state);
  2160. icnss_ignore_fw_timeout(true);
  2161. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2162. clear_bit(ICNSS_FW_READY, &priv->state);
  2163. fw_down_data.crashed = event_data->crashed;
  2164. icnss_call_driver_uevent(priv,
  2165. ICNSS_UEVENT_FW_DOWN,
  2166. &fw_down_data);
  2167. }
  2168. }
  2169. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2170. if (event_data->crashed)
  2171. mod_timer(&priv->recovery_timer,
  2172. jiffies +
  2173. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2174. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2175. ICNSS_EVENT_SYNC, event_data);
  2176. break;
  2177. case SERVREG_SERVICE_STATE_UP:
  2178. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2179. break;
  2180. default:
  2181. break;
  2182. }
  2183. return;
  2184. }
  2185. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2186. {
  2187. struct pdr_handle *handle = NULL;
  2188. struct pdr_service *service = NULL;
  2189. int err = 0;
  2190. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2191. if (IS_ERR_OR_NULL(handle)) {
  2192. err = PTR_ERR(handle);
  2193. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2194. goto out;
  2195. }
  2196. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2197. if (IS_ERR_OR_NULL(service)) {
  2198. err = PTR_ERR(service);
  2199. icnss_pr_err("Failed to add lookup, err %d", err);
  2200. goto out;
  2201. }
  2202. priv->pdr_handle = handle;
  2203. priv->pdr_service = service;
  2204. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2205. icnss_pr_info("PDR registration happened");
  2206. out:
  2207. return err;
  2208. }
  2209. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2210. {
  2211. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2212. return;
  2213. pdr_handle_release(priv->pdr_handle);
  2214. }
  2215. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2216. {
  2217. int ret = 0;
  2218. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  2219. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2220. #else
  2221. priv->icnss_ramdump_class = class_create(ICNSS_RAMDUMP_NAME);
  2222. #endif
  2223. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2224. ret = PTR_ERR(priv->icnss_ramdump_class);
  2225. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2226. return ret;
  2227. }
  2228. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2229. ICNSS_RAMDUMP_NAME);
  2230. if (ret < 0) {
  2231. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2232. goto fail_alloc_major;
  2233. }
  2234. return 0;
  2235. fail_alloc_major:
  2236. class_destroy(priv->icnss_ramdump_class);
  2237. return ret;
  2238. }
  2239. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2240. {
  2241. int ret = 0;
  2242. struct icnss_ramdump_info *ramdump_info;
  2243. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2244. if (!ramdump_info)
  2245. return ERR_PTR(-ENOMEM);
  2246. if (!dev_name) {
  2247. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2248. return NULL;
  2249. }
  2250. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2251. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2252. if (ramdump_info->minor < 0) {
  2253. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2254. ramdump_info->minor);
  2255. ret = -ENODEV;
  2256. goto fail_out_of_minors;
  2257. }
  2258. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2259. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2260. ramdump_info->minor),
  2261. ramdump_info, ramdump_info->name);
  2262. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2263. ret = PTR_ERR(ramdump_info->dev);
  2264. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2265. ramdump_info->name, ret);
  2266. goto fail_device_create;
  2267. }
  2268. return (void *)ramdump_info;
  2269. fail_device_create:
  2270. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2271. fail_out_of_minors:
  2272. kfree(ramdump_info);
  2273. return ERR_PTR(ret);
  2274. }
  2275. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2276. {
  2277. int ret = 0;
  2278. if (!priv || !priv->pdev) {
  2279. icnss_pr_err("Platform priv or pdev is NULL\n");
  2280. return -EINVAL;
  2281. }
  2282. ret = icnss_ramdump_devnode_init(priv);
  2283. if (ret)
  2284. return ret;
  2285. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2286. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2287. icnss_pr_err("Failed to create msa0 dump device!");
  2288. return -ENOMEM;
  2289. }
  2290. if (priv->device_id == WCN6750_DEVICE_ID ||
  2291. priv->device_id == WCN6450_DEVICE_ID) {
  2292. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2293. ICNSS_M3_SEGMENT(
  2294. ICNSS_M3_SEGMENT_PHYAREG));
  2295. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2296. !priv->m3_dump_phyareg->dev) {
  2297. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2298. return -ENOMEM;
  2299. }
  2300. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2301. ICNSS_M3_SEGMENT(
  2302. ICNSS_M3_SEGMENT_PHYA));
  2303. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2304. !priv->m3_dump_phydbg->dev) {
  2305. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2306. return -ENOMEM;
  2307. }
  2308. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2309. ICNSS_M3_SEGMENT(
  2310. ICNSS_M3_SEGMENT_WMACREG));
  2311. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2312. !priv->m3_dump_wmac0reg->dev) {
  2313. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2314. return -ENOMEM;
  2315. }
  2316. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2317. ICNSS_M3_SEGMENT(
  2318. ICNSS_M3_SEGMENT_WCSSDBG));
  2319. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2320. !priv->m3_dump_wcssdbg->dev) {
  2321. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2322. return -ENOMEM;
  2323. }
  2324. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2325. ICNSS_M3_SEGMENT(
  2326. ICNSS_M3_SEGMENT_PHYAM3));
  2327. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2328. !priv->m3_dump_phyapdmem->dev) {
  2329. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2330. return -ENOMEM;
  2331. }
  2332. }
  2333. return 0;
  2334. }
  2335. static int icnss_enable_recovery(struct icnss_priv *priv)
  2336. {
  2337. int ret;
  2338. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2339. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2340. return 0;
  2341. }
  2342. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2343. icnss_pr_dbg("SSR disabled through module parameter\n");
  2344. goto enable_pdr;
  2345. }
  2346. ret = icnss_register_ramdump_devices(priv);
  2347. if (ret)
  2348. return ret;
  2349. if (priv->wpss_supported) {
  2350. icnss_wpss_early_ssr_register_notifier(priv);
  2351. icnss_wpss_ssr_register_notifier(priv);
  2352. return 0;
  2353. }
  2354. if (!(priv->rproc_fw_download))
  2355. icnss_modem_ssr_register_notifier(priv);
  2356. if (priv->is_slate_rfa) {
  2357. icnss_slate_ssr_register_notifier(priv);
  2358. icnss_register_slate_event_notifier(priv);
  2359. }
  2360. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2361. icnss_pr_dbg("PDR disabled through module parameter\n");
  2362. return 0;
  2363. }
  2364. enable_pdr:
  2365. ret = icnss_pd_restart_enable(priv);
  2366. if (ret)
  2367. return ret;
  2368. return 0;
  2369. }
  2370. static int icnss_dev_id_match(struct icnss_priv *priv,
  2371. struct device_info *dev_info)
  2372. {
  2373. while (dev_info->device_id) {
  2374. if (priv->device_id == dev_info->device_id)
  2375. return 1;
  2376. dev_info++;
  2377. }
  2378. return 0;
  2379. }
  2380. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2381. unsigned long *thermal_state)
  2382. {
  2383. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2384. *thermal_state = icnss_tcdev->max_thermal_state;
  2385. return 0;
  2386. }
  2387. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2388. unsigned long *thermal_state)
  2389. {
  2390. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2391. *thermal_state = icnss_tcdev->curr_thermal_state;
  2392. return 0;
  2393. }
  2394. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2395. unsigned long thermal_state)
  2396. {
  2397. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2398. struct device *dev = &penv->pdev->dev;
  2399. int ret = 0;
  2400. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2401. return 0;
  2402. if (thermal_state > icnss_tcdev->max_thermal_state)
  2403. return -EINVAL;
  2404. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2405. thermal_state, icnss_tcdev->tcdev_id);
  2406. mutex_lock(&penv->tcdev_lock);
  2407. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2408. icnss_tcdev->tcdev_id);
  2409. if (!ret)
  2410. icnss_tcdev->curr_thermal_state = thermal_state;
  2411. mutex_unlock(&penv->tcdev_lock);
  2412. if (ret) {
  2413. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2414. ret, icnss_tcdev->tcdev_id);
  2415. return ret;
  2416. }
  2417. return 0;
  2418. }
  2419. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2420. .get_max_state = icnss_tcdev_get_max_state,
  2421. .get_cur_state = icnss_tcdev_get_cur_state,
  2422. .set_cur_state = icnss_tcdev_set_cur_state,
  2423. };
  2424. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2425. int tcdev_id)
  2426. {
  2427. struct icnss_priv *priv = dev_get_drvdata(dev);
  2428. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2429. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2430. struct device_node *dev_node;
  2431. int ret = 0;
  2432. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2433. if (!icnss_tcdev)
  2434. return -ENOMEM;
  2435. icnss_tcdev->tcdev_id = tcdev_id;
  2436. icnss_tcdev->max_thermal_state = max_state;
  2437. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2438. "qcom,icnss_cdev%d", tcdev_id);
  2439. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2440. if (!dev_node) {
  2441. icnss_pr_err("Failed to get cooling device node\n");
  2442. return -EINVAL;
  2443. }
  2444. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2445. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2446. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2447. dev_node,
  2448. cdev_node_name, icnss_tcdev,
  2449. &icnss_cooling_ops);
  2450. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2451. ret = PTR_ERR(icnss_tcdev->tcdev);
  2452. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2453. ret, icnss_tcdev->tcdev_id);
  2454. } else {
  2455. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2456. icnss_tcdev->tcdev_id);
  2457. list_add(&icnss_tcdev->tcdev_list,
  2458. &priv->icnss_tcdev_list);
  2459. }
  2460. } else {
  2461. icnss_pr_dbg("Cooling device registration not supported");
  2462. ret = -EOPNOTSUPP;
  2463. }
  2464. return ret;
  2465. }
  2466. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2467. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2468. {
  2469. struct icnss_priv *priv = dev_get_drvdata(dev);
  2470. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2471. while (!list_empty(&priv->icnss_tcdev_list)) {
  2472. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2473. struct icnss_thermal_cdev,
  2474. tcdev_list);
  2475. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2476. list_del(&icnss_tcdev->tcdev_list);
  2477. kfree(icnss_tcdev);
  2478. }
  2479. }
  2480. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2481. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2482. unsigned long *thermal_state,
  2483. int tcdev_id)
  2484. {
  2485. struct icnss_priv *priv = dev_get_drvdata(dev);
  2486. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2487. mutex_lock(&priv->tcdev_lock);
  2488. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2489. if (icnss_tcdev->tcdev_id != tcdev_id)
  2490. continue;
  2491. *thermal_state = icnss_tcdev->curr_thermal_state;
  2492. mutex_unlock(&priv->tcdev_lock);
  2493. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2494. icnss_tcdev->curr_thermal_state, tcdev_id);
  2495. return 0;
  2496. }
  2497. mutex_unlock(&priv->tcdev_lock);
  2498. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2499. return -EINVAL;
  2500. }
  2501. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2502. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2503. int cmd_len, void *cb_ctx,
  2504. int (*cb)(void *ctx, void *event, int event_len))
  2505. {
  2506. struct icnss_priv *priv = icnss_get_plat_priv();
  2507. int ret;
  2508. if (!priv)
  2509. return -ENODEV;
  2510. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2511. return -EINVAL;
  2512. priv->get_info_cb = cb;
  2513. priv->get_info_cb_ctx = cb_ctx;
  2514. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2515. if (ret) {
  2516. priv->get_info_cb = NULL;
  2517. priv->get_info_cb_ctx = NULL;
  2518. }
  2519. return ret;
  2520. }
  2521. EXPORT_SYMBOL(icnss_qmi_send);
  2522. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2523. struct module *owner, const char *mod_name)
  2524. {
  2525. int ret = 0;
  2526. struct icnss_priv *priv = icnss_get_plat_priv();
  2527. if (!priv || !priv->pdev) {
  2528. ret = -ENODEV;
  2529. goto out;
  2530. }
  2531. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2532. if (priv->ops) {
  2533. icnss_pr_err("Driver already registered\n");
  2534. ret = -EEXIST;
  2535. goto out;
  2536. }
  2537. if (!ops->dev_info) {
  2538. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2539. return -EINVAL;
  2540. }
  2541. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2542. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2543. ops->dev_info->name);
  2544. return -ENODEV;
  2545. }
  2546. if (!ops->probe || !ops->remove) {
  2547. ret = -EINVAL;
  2548. goto out;
  2549. }
  2550. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2551. 0, ops);
  2552. if (ret == -EINTR)
  2553. ret = 0;
  2554. out:
  2555. return ret;
  2556. }
  2557. EXPORT_SYMBOL(__icnss_register_driver);
  2558. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2559. {
  2560. int ret;
  2561. struct icnss_priv *priv = icnss_get_plat_priv();
  2562. if (!priv || !priv->pdev) {
  2563. ret = -ENODEV;
  2564. goto out;
  2565. }
  2566. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2567. if (!priv->ops) {
  2568. icnss_pr_err("Driver not registered\n");
  2569. ret = -ENOENT;
  2570. goto out;
  2571. }
  2572. ret = icnss_driver_event_post(priv,
  2573. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2574. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2575. out:
  2576. return ret;
  2577. }
  2578. EXPORT_SYMBOL(icnss_unregister_driver);
  2579. static struct icnss_msi_config msi_config_wcn6750 = {
  2580. .total_vectors = 28,
  2581. .total_users = 2,
  2582. .users = (struct icnss_msi_user[]) {
  2583. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2584. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2585. },
  2586. };
  2587. static struct icnss_msi_config msi_config_wcn6450 = {
  2588. .total_vectors = 14,
  2589. .total_users = 2,
  2590. .users = (struct icnss_msi_user[]) {
  2591. { .name = "CE", .num_vectors = 12, .base_vector = 0 },
  2592. { .name = "DP", .num_vectors = 2, .base_vector = 12 },
  2593. },
  2594. };
  2595. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2596. {
  2597. if (priv->device_id == WCN6750_DEVICE_ID)
  2598. priv->msi_config = &msi_config_wcn6750;
  2599. else
  2600. priv->msi_config = &msi_config_wcn6450;
  2601. return 0;
  2602. }
  2603. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2604. int *num_vectors, u32 *user_base_data,
  2605. u32 *base_vector)
  2606. {
  2607. struct icnss_priv *priv = dev_get_drvdata(dev);
  2608. struct icnss_msi_config *msi_config;
  2609. int idx;
  2610. if (!priv)
  2611. return -ENODEV;
  2612. msi_config = priv->msi_config;
  2613. if (!msi_config) {
  2614. icnss_pr_err("MSI is not supported.\n");
  2615. return -EINVAL;
  2616. }
  2617. for (idx = 0; idx < msi_config->total_users; idx++) {
  2618. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2619. *num_vectors = msi_config->users[idx].num_vectors;
  2620. *user_base_data = msi_config->users[idx].base_vector
  2621. + priv->msi_base_data;
  2622. *base_vector = msi_config->users[idx].base_vector;
  2623. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2624. user_name, *num_vectors, *user_base_data,
  2625. *base_vector);
  2626. return 0;
  2627. }
  2628. }
  2629. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2630. return -EINVAL;
  2631. }
  2632. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2633. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2634. {
  2635. struct icnss_priv *priv = dev_get_drvdata(dev);
  2636. int irq_num;
  2637. irq_num = priv->srng_irqs[vector];
  2638. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2639. irq_num, vector);
  2640. return irq_num;
  2641. }
  2642. EXPORT_SYMBOL(icnss_get_msi_irq);
  2643. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2644. u32 *msi_addr_high)
  2645. {
  2646. struct icnss_priv *priv = dev_get_drvdata(dev);
  2647. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2648. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2649. }
  2650. EXPORT_SYMBOL(icnss_get_msi_address);
  2651. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2652. irqreturn_t (*handler)(int, void *),
  2653. unsigned long flags, const char *name, void *ctx)
  2654. {
  2655. int ret = 0;
  2656. unsigned int irq;
  2657. struct ce_irq_list *irq_entry;
  2658. struct icnss_priv *priv = dev_get_drvdata(dev);
  2659. if (!priv || !priv->pdev) {
  2660. ret = -ENODEV;
  2661. goto out;
  2662. }
  2663. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2664. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2665. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2666. ret = -EINVAL;
  2667. goto out;
  2668. }
  2669. irq = priv->ce_irqs[ce_id];
  2670. irq_entry = &priv->ce_irq_list[ce_id];
  2671. if (irq_entry->handler || irq_entry->irq) {
  2672. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2673. irq, ce_id);
  2674. ret = -EEXIST;
  2675. goto out;
  2676. }
  2677. ret = request_irq(irq, handler, flags, name, ctx);
  2678. if (ret) {
  2679. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2680. irq, ce_id, ret);
  2681. goto out;
  2682. }
  2683. irq_entry->irq = irq;
  2684. irq_entry->handler = handler;
  2685. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2686. penv->stats.ce_irqs[ce_id].request++;
  2687. out:
  2688. return ret;
  2689. }
  2690. EXPORT_SYMBOL(icnss_ce_request_irq);
  2691. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2692. {
  2693. int ret = 0;
  2694. unsigned int irq;
  2695. struct ce_irq_list *irq_entry;
  2696. if (!penv || !penv->pdev || !dev) {
  2697. ret = -ENODEV;
  2698. goto out;
  2699. }
  2700. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2701. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2702. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2703. ret = -EINVAL;
  2704. goto out;
  2705. }
  2706. irq = penv->ce_irqs[ce_id];
  2707. irq_entry = &penv->ce_irq_list[ce_id];
  2708. if (!irq_entry->handler || !irq_entry->irq) {
  2709. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2710. ret = -EEXIST;
  2711. goto out;
  2712. }
  2713. free_irq(irq, ctx);
  2714. irq_entry->irq = 0;
  2715. irq_entry->handler = NULL;
  2716. penv->stats.ce_irqs[ce_id].free++;
  2717. out:
  2718. return ret;
  2719. }
  2720. EXPORT_SYMBOL(icnss_ce_free_irq);
  2721. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2722. {
  2723. unsigned int irq;
  2724. if (!penv || !penv->pdev || !dev) {
  2725. icnss_pr_err("Platform driver not initialized\n");
  2726. return;
  2727. }
  2728. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2729. penv->state);
  2730. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2731. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2732. return;
  2733. }
  2734. penv->stats.ce_irqs[ce_id].enable++;
  2735. irq = penv->ce_irqs[ce_id];
  2736. enable_irq(irq);
  2737. }
  2738. EXPORT_SYMBOL(icnss_enable_irq);
  2739. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2740. {
  2741. unsigned int irq;
  2742. if (!penv || !penv->pdev || !dev) {
  2743. icnss_pr_err("Platform driver not initialized\n");
  2744. return;
  2745. }
  2746. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2747. penv->state);
  2748. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2749. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2750. ce_id);
  2751. return;
  2752. }
  2753. irq = penv->ce_irqs[ce_id];
  2754. disable_irq(irq);
  2755. penv->stats.ce_irqs[ce_id].disable++;
  2756. }
  2757. EXPORT_SYMBOL(icnss_disable_irq);
  2758. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2759. {
  2760. char *fw_build_timestamp = NULL;
  2761. struct icnss_priv *priv = dev_get_drvdata(dev);
  2762. if (!priv) {
  2763. icnss_pr_err("Platform driver not initialized\n");
  2764. return -EINVAL;
  2765. }
  2766. info->v_addr = priv->mem_base_va;
  2767. info->p_addr = priv->mem_base_pa;
  2768. info->chip_id = priv->chip_info.chip_id;
  2769. info->chip_family = priv->chip_info.chip_family;
  2770. info->board_id = priv->board_id;
  2771. info->soc_id = priv->soc_id;
  2772. info->fw_version = priv->fw_version_info.fw_version;
  2773. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2774. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2775. strlcpy(info->fw_build_timestamp,
  2776. priv->fw_version_info.fw_build_timestamp,
  2777. WLFW_MAX_TIMESTAMP_LEN + 1);
  2778. strlcpy(info->fw_build_id, priv->fw_build_id,
  2779. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2780. info->rd_card_chain_cap = priv->rd_card_chain_cap;
  2781. info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
  2782. info->phy_qam_cap = priv->phy_qam_cap;
  2783. memcpy(&info->dev_mem_info, &priv->dev_mem_info,
  2784. sizeof(info->dev_mem_info));
  2785. return 0;
  2786. }
  2787. EXPORT_SYMBOL(icnss_get_soc_info);
  2788. int icnss_get_mhi_state(struct device *dev)
  2789. {
  2790. struct icnss_priv *priv = dev_get_drvdata(dev);
  2791. if (!priv) {
  2792. icnss_pr_err("Platform driver not initialized\n");
  2793. return -EINVAL;
  2794. }
  2795. if (!priv->mhi_state_info_va)
  2796. return -ENOMEM;
  2797. return ioread32(priv->mhi_state_info_va);
  2798. }
  2799. EXPORT_SYMBOL(icnss_get_mhi_state);
  2800. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2801. {
  2802. int ret;
  2803. struct icnss_priv *priv;
  2804. if (!dev)
  2805. return -ENODEV;
  2806. priv = dev_get_drvdata(dev);
  2807. if (!priv) {
  2808. icnss_pr_err("Platform driver not initialized\n");
  2809. return -EINVAL;
  2810. }
  2811. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2812. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2813. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2814. priv->state);
  2815. return -EINVAL;
  2816. }
  2817. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2818. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2819. if (ret)
  2820. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2821. ret, fw_log_mode);
  2822. return ret;
  2823. }
  2824. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2825. int icnss_force_wake_request(struct device *dev)
  2826. {
  2827. struct icnss_priv *priv;
  2828. if (!dev)
  2829. return -ENODEV;
  2830. priv = dev_get_drvdata(dev);
  2831. if (!priv) {
  2832. icnss_pr_err("Platform driver not initialized\n");
  2833. return -EINVAL;
  2834. }
  2835. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2836. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2837. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2838. priv->state);
  2839. return -EINVAL;
  2840. }
  2841. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2842. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2843. atomic_read(&priv->soc_wake_ref_count));
  2844. return 0;
  2845. }
  2846. icnss_pr_soc_wake("Calling SOC Wake request");
  2847. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2848. 0, NULL);
  2849. return 0;
  2850. }
  2851. EXPORT_SYMBOL(icnss_force_wake_request);
  2852. int icnss_force_wake_release(struct device *dev)
  2853. {
  2854. struct icnss_priv *priv;
  2855. if (!dev)
  2856. return -ENODEV;
  2857. priv = dev_get_drvdata(dev);
  2858. if (!priv) {
  2859. icnss_pr_err("Platform driver not initialized\n");
  2860. return -EINVAL;
  2861. }
  2862. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2863. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2864. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2865. priv->state);
  2866. return -EINVAL;
  2867. }
  2868. icnss_pr_soc_wake("Calling SOC Wake response");
  2869. if (atomic_read(&priv->soc_wake_ref_count) &&
  2870. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2871. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2872. atomic_read(&priv->soc_wake_ref_count));
  2873. return 0;
  2874. }
  2875. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2876. 0, NULL);
  2877. return 0;
  2878. }
  2879. EXPORT_SYMBOL(icnss_force_wake_release);
  2880. int icnss_is_device_awake(struct device *dev)
  2881. {
  2882. struct icnss_priv *priv = dev_get_drvdata(dev);
  2883. if (!priv) {
  2884. icnss_pr_err("Platform driver not initialized\n");
  2885. return -EINVAL;
  2886. }
  2887. return atomic_read(&priv->soc_wake_ref_count);
  2888. }
  2889. EXPORT_SYMBOL(icnss_is_device_awake);
  2890. int icnss_is_pci_ep_awake(struct device *dev)
  2891. {
  2892. struct icnss_priv *priv = dev_get_drvdata(dev);
  2893. if (!priv) {
  2894. icnss_pr_err("Platform driver not initialized\n");
  2895. return -EINVAL;
  2896. }
  2897. if (!priv->mhi_state_info_va)
  2898. return -ENOMEM;
  2899. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2900. }
  2901. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2902. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2903. uint32_t mem_type, uint32_t data_len,
  2904. uint8_t *output)
  2905. {
  2906. int ret = 0;
  2907. struct icnss_priv *priv = dev_get_drvdata(dev);
  2908. if (priv->magic != ICNSS_MAGIC) {
  2909. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2910. dev, priv, priv->magic);
  2911. return -EINVAL;
  2912. }
  2913. if (!output || data_len == 0
  2914. || data_len > WLFW_MAX_DATA_SIZE) {
  2915. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2916. output, data_len);
  2917. ret = -EINVAL;
  2918. goto out;
  2919. }
  2920. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2921. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2922. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2923. priv->state);
  2924. ret = -EINVAL;
  2925. goto out;
  2926. }
  2927. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2928. data_len, output);
  2929. out:
  2930. return ret;
  2931. }
  2932. EXPORT_SYMBOL(icnss_athdiag_read);
  2933. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2934. uint32_t mem_type, uint32_t data_len,
  2935. uint8_t *input)
  2936. {
  2937. int ret = 0;
  2938. struct icnss_priv *priv = dev_get_drvdata(dev);
  2939. if (priv->magic != ICNSS_MAGIC) {
  2940. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2941. dev, priv, priv->magic);
  2942. return -EINVAL;
  2943. }
  2944. if (!input || data_len == 0
  2945. || data_len > WLFW_MAX_DATA_SIZE) {
  2946. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2947. input, data_len);
  2948. ret = -EINVAL;
  2949. goto out;
  2950. }
  2951. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2952. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2953. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2954. priv->state);
  2955. ret = -EINVAL;
  2956. goto out;
  2957. }
  2958. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2959. data_len, input);
  2960. out:
  2961. return ret;
  2962. }
  2963. EXPORT_SYMBOL(icnss_athdiag_write);
  2964. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2965. enum icnss_driver_mode mode,
  2966. const char *host_version)
  2967. {
  2968. struct icnss_priv *priv = dev_get_drvdata(dev);
  2969. int temp = 0, ret = 0;
  2970. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2971. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2972. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2973. priv->state);
  2974. return -EINVAL;
  2975. }
  2976. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2977. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2978. priv->state);
  2979. return -EINVAL;
  2980. }
  2981. if (priv->wpss_supported &&
  2982. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2983. icnss_setup_dms_mac(priv);
  2984. if (priv->device_id == WCN6750_DEVICE_ID) {
  2985. if (!icnss_get_temperature(priv, &temp)) {
  2986. icnss_pr_dbg("Temperature: %d\n", temp);
  2987. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2988. icnss_set_wlan_en_delay(priv);
  2989. }
  2990. }
  2991. if (priv->device_id == WCN6450_DEVICE_ID)
  2992. icnss_hw_power_off(priv);
  2993. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2994. if (priv->device_id == WCN6450_DEVICE_ID)
  2995. icnss_hw_power_on(priv);
  2996. return ret;
  2997. }
  2998. EXPORT_SYMBOL(icnss_wlan_enable);
  2999. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  3000. {
  3001. struct icnss_priv *priv = dev_get_drvdata(dev);
  3002. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  3003. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  3004. priv->state);
  3005. return 0;
  3006. }
  3007. return icnss_send_wlan_disable_to_fw(priv);
  3008. }
  3009. EXPORT_SYMBOL(icnss_wlan_disable);
  3010. bool icnss_is_qmi_disable(struct device *dev)
  3011. {
  3012. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  3013. }
  3014. EXPORT_SYMBOL(icnss_is_qmi_disable);
  3015. int icnss_get_ce_id(struct device *dev, int irq)
  3016. {
  3017. int i;
  3018. if (!penv || !penv->pdev || !dev)
  3019. return -ENODEV;
  3020. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3021. if (penv->ce_irqs[i] == irq)
  3022. return i;
  3023. }
  3024. icnss_pr_err("No matching CE id for irq %d\n", irq);
  3025. return -EINVAL;
  3026. }
  3027. EXPORT_SYMBOL(icnss_get_ce_id);
  3028. int icnss_get_irq(struct device *dev, int ce_id)
  3029. {
  3030. int irq;
  3031. if (!penv || !penv->pdev || !dev)
  3032. return -ENODEV;
  3033. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  3034. return -EINVAL;
  3035. irq = penv->ce_irqs[ce_id];
  3036. return irq;
  3037. }
  3038. EXPORT_SYMBOL(icnss_get_irq);
  3039. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  3040. {
  3041. struct icnss_priv *priv = dev_get_drvdata(dev);
  3042. if (!priv) {
  3043. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  3044. return NULL;
  3045. }
  3046. return priv->iommu_domain;
  3047. }
  3048. EXPORT_SYMBOL(icnss_smmu_get_domain);
  3049. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3050. int icnss_iommu_map(struct iommu_domain *domain,
  3051. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3052. {
  3053. return iommu_map(domain, iova, paddr, size, prot);
  3054. }
  3055. #else
  3056. int icnss_iommu_map(struct iommu_domain *domain,
  3057. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3058. {
  3059. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  3060. }
  3061. #endif
  3062. int icnss_smmu_map(struct device *dev,
  3063. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  3064. {
  3065. struct icnss_priv *priv = dev_get_drvdata(dev);
  3066. int flag = IOMMU_READ | IOMMU_WRITE;
  3067. bool dma_coherent = false;
  3068. unsigned long iova;
  3069. int prop_len = 0;
  3070. size_t len;
  3071. int ret = 0;
  3072. if (!priv) {
  3073. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3074. dev, priv);
  3075. return -EINVAL;
  3076. }
  3077. if (!iova_addr) {
  3078. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  3079. &paddr, size);
  3080. return -EINVAL;
  3081. }
  3082. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  3083. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  3084. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  3085. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3086. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3087. iova,
  3088. &priv->smmu_iova_ipa_start,
  3089. priv->smmu_iova_ipa_len);
  3090. return -ENOMEM;
  3091. }
  3092. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  3093. icnss_pr_dbg("dma-coherent is %s\n",
  3094. dma_coherent ? "enabled" : "disabled");
  3095. if (dma_coherent)
  3096. flag |= IOMMU_CACHE;
  3097. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3098. ret = icnss_iommu_map(priv->iommu_domain, iova,
  3099. rounddown(paddr, PAGE_SIZE), len,
  3100. flag);
  3101. if (ret) {
  3102. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3103. return ret;
  3104. }
  3105. priv->smmu_iova_ipa_current = iova + len;
  3106. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3107. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3108. return 0;
  3109. }
  3110. EXPORT_SYMBOL(icnss_smmu_map);
  3111. int icnss_smmu_unmap(struct device *dev,
  3112. uint32_t iova_addr, size_t size)
  3113. {
  3114. struct icnss_priv *priv = dev_get_drvdata(dev);
  3115. unsigned long iova;
  3116. size_t len, unmapped_len;
  3117. if (!priv) {
  3118. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3119. dev, priv);
  3120. return -EINVAL;
  3121. }
  3122. if (!iova_addr) {
  3123. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3124. size);
  3125. return -EINVAL;
  3126. }
  3127. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3128. PAGE_SIZE);
  3129. iova = rounddown(iova_addr, PAGE_SIZE);
  3130. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3131. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3132. iova,
  3133. &priv->smmu_iova_ipa_start,
  3134. priv->smmu_iova_ipa_len);
  3135. return -ENOMEM;
  3136. }
  3137. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3138. iova, len);
  3139. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3140. if (unmapped_len != len) {
  3141. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3142. return -EINVAL;
  3143. }
  3144. priv->smmu_iova_ipa_current = iova;
  3145. return 0;
  3146. }
  3147. EXPORT_SYMBOL(icnss_smmu_unmap);
  3148. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3149. {
  3150. return socinfo_get_serial_number();
  3151. }
  3152. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3153. int icnss_trigger_recovery(struct device *dev)
  3154. {
  3155. int ret = 0;
  3156. struct icnss_priv *priv = dev_get_drvdata(dev);
  3157. if (priv->magic != ICNSS_MAGIC) {
  3158. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3159. ret = -EINVAL;
  3160. goto out;
  3161. }
  3162. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3163. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3164. priv->state);
  3165. ret = -EPERM;
  3166. goto out;
  3167. }
  3168. if (priv->wpss_supported) {
  3169. icnss_pr_vdbg("Initiate Root PD restart");
  3170. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3171. ICNSS_SMP2P_OUT_POWER_SAVE);
  3172. if (!ret)
  3173. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3174. return ret;
  3175. }
  3176. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3177. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3178. priv->state);
  3179. ret = -EOPNOTSUPP;
  3180. goto out;
  3181. }
  3182. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3183. priv->state);
  3184. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3185. if (!ret)
  3186. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3187. out:
  3188. return ret;
  3189. }
  3190. EXPORT_SYMBOL(icnss_trigger_recovery);
  3191. int icnss_idle_shutdown(struct device *dev)
  3192. {
  3193. struct icnss_priv *priv = dev_get_drvdata(dev);
  3194. if (!priv) {
  3195. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3196. return -EINVAL;
  3197. }
  3198. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3199. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3200. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3201. return -EBUSY;
  3202. }
  3203. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3204. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3205. }
  3206. EXPORT_SYMBOL(icnss_idle_shutdown);
  3207. int icnss_idle_restart(struct device *dev)
  3208. {
  3209. struct icnss_priv *priv = dev_get_drvdata(dev);
  3210. if (!priv) {
  3211. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3212. return -EINVAL;
  3213. }
  3214. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3215. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3216. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3217. return -EBUSY;
  3218. }
  3219. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3220. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3221. }
  3222. EXPORT_SYMBOL(icnss_idle_restart);
  3223. int icnss_exit_power_save(struct device *dev)
  3224. {
  3225. struct icnss_priv *priv = dev_get_drvdata(dev);
  3226. icnss_pr_vdbg("Calling Exit Power Save\n");
  3227. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3228. !test_bit(ICNSS_MODE_ON, &priv->state))
  3229. return 0;
  3230. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3231. ICNSS_SMP2P_OUT_POWER_SAVE);
  3232. }
  3233. EXPORT_SYMBOL(icnss_exit_power_save);
  3234. int icnss_prevent_l1(struct device *dev)
  3235. {
  3236. struct icnss_priv *priv = dev_get_drvdata(dev);
  3237. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3238. !test_bit(ICNSS_MODE_ON, &priv->state))
  3239. return 0;
  3240. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3241. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3242. }
  3243. EXPORT_SYMBOL(icnss_prevent_l1);
  3244. void icnss_allow_l1(struct device *dev)
  3245. {
  3246. struct icnss_priv *priv = dev_get_drvdata(dev);
  3247. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3248. !test_bit(ICNSS_MODE_ON, &priv->state))
  3249. return;
  3250. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3251. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3252. }
  3253. EXPORT_SYMBOL(icnss_allow_l1);
  3254. void icnss_allow_recursive_recovery(struct device *dev)
  3255. {
  3256. struct icnss_priv *priv = dev_get_drvdata(dev);
  3257. priv->allow_recursive_recovery = true;
  3258. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3259. }
  3260. void icnss_disallow_recursive_recovery(struct device *dev)
  3261. {
  3262. struct icnss_priv *priv = dev_get_drvdata(dev);
  3263. priv->allow_recursive_recovery = false;
  3264. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3265. }
  3266. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3267. {
  3268. struct kobject *icnss_kobject;
  3269. int ret = 0;
  3270. atomic_set(&priv->is_shutdown, false);
  3271. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3272. if (!icnss_kobject) {
  3273. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3274. return -EINVAL;
  3275. }
  3276. priv->icnss_kobject = icnss_kobject;
  3277. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3278. if (ret) {
  3279. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3280. return ret;
  3281. }
  3282. return ret;
  3283. }
  3284. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3285. {
  3286. struct kobject *icnss_kobject;
  3287. icnss_kobject = priv->icnss_kobject;
  3288. if (icnss_kobject)
  3289. kobject_put(icnss_kobject);
  3290. }
  3291. static ssize_t qdss_tr_start_store(struct device *dev,
  3292. struct device_attribute *attr,
  3293. const char *buf, size_t count)
  3294. {
  3295. struct icnss_priv *priv = dev_get_drvdata(dev);
  3296. wlfw_qdss_trace_start(priv);
  3297. icnss_pr_dbg("Received QDSS start command\n");
  3298. return count;
  3299. }
  3300. static ssize_t qdss_tr_stop_store(struct device *dev,
  3301. struct device_attribute *attr,
  3302. const char *user_buf, size_t count)
  3303. {
  3304. struct icnss_priv *priv = dev_get_drvdata(dev);
  3305. u32 option = 0;
  3306. if (sscanf(user_buf, "%du", &option) != 1)
  3307. return -EINVAL;
  3308. wlfw_qdss_trace_stop(priv, option);
  3309. icnss_pr_dbg("Received QDSS stop command\n");
  3310. return count;
  3311. }
  3312. static ssize_t qdss_conf_download_store(struct device *dev,
  3313. struct device_attribute *attr,
  3314. const char *buf, size_t count)
  3315. {
  3316. struct icnss_priv *priv = dev_get_drvdata(dev);
  3317. icnss_wlfw_qdss_dnld_send_sync(priv);
  3318. icnss_pr_dbg("Received QDSS download config command\n");
  3319. return count;
  3320. }
  3321. static ssize_t hw_trc_override_store(struct device *dev,
  3322. struct device_attribute *attr,
  3323. const char *buf, size_t count)
  3324. {
  3325. struct icnss_priv *priv = dev_get_drvdata(dev);
  3326. int tmp = 0;
  3327. if (sscanf(buf, "%du", &tmp) != 1)
  3328. return -EINVAL;
  3329. priv->hw_trc_override = tmp;
  3330. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3331. return count;
  3332. }
  3333. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3334. {
  3335. struct icnss_priv *priv = icnss_get_plat_priv();
  3336. phandle rproc_phandle;
  3337. int ret;
  3338. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3339. &rproc_phandle)) {
  3340. icnss_pr_err("error reading rproc phandle\n");
  3341. return;
  3342. }
  3343. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3344. if (IS_ERR_OR_NULL(priv->rproc)) {
  3345. icnss_pr_err("rproc not found");
  3346. return;
  3347. }
  3348. ret = rproc_boot(priv->rproc);
  3349. if (ret) {
  3350. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3351. rproc_put(priv->rproc);
  3352. }
  3353. }
  3354. static ssize_t wpss_boot_store(struct device *dev,
  3355. struct device_attribute *attr,
  3356. const char *buf, size_t count)
  3357. {
  3358. struct icnss_priv *priv = dev_get_drvdata(dev);
  3359. int wpss_rproc = 0;
  3360. if (!priv->wpss_supported && !priv->rproc_fw_download)
  3361. return count;
  3362. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3363. icnss_pr_err("Failed to read wpss rproc info");
  3364. return -EINVAL;
  3365. }
  3366. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3367. if (wpss_rproc == 1)
  3368. schedule_work(&wpss_loader);
  3369. else if (wpss_rproc == 0)
  3370. icnss_wpss_unload(priv);
  3371. return count;
  3372. }
  3373. static ssize_t wlan_en_delay_store(struct device *dev,
  3374. struct device_attribute *attr,
  3375. const char *buf, size_t count)
  3376. {
  3377. struct icnss_priv *priv = dev_get_drvdata(dev);
  3378. uint32_t wlan_en_delay = 0;
  3379. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3380. return count;
  3381. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3382. icnss_pr_err("Failed to read wlan_en_delay");
  3383. return -EINVAL;
  3384. }
  3385. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3386. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3387. return count;
  3388. }
  3389. static DEVICE_ATTR_WO(qdss_tr_start);
  3390. static DEVICE_ATTR_WO(qdss_tr_stop);
  3391. static DEVICE_ATTR_WO(qdss_conf_download);
  3392. static DEVICE_ATTR_WO(hw_trc_override);
  3393. static DEVICE_ATTR_WO(wpss_boot);
  3394. static DEVICE_ATTR_WO(wlan_en_delay);
  3395. static struct attribute *icnss_attrs[] = {
  3396. &dev_attr_qdss_tr_start.attr,
  3397. &dev_attr_qdss_tr_stop.attr,
  3398. &dev_attr_qdss_conf_download.attr,
  3399. &dev_attr_hw_trc_override.attr,
  3400. &dev_attr_wpss_boot.attr,
  3401. &dev_attr_wlan_en_delay.attr,
  3402. NULL,
  3403. };
  3404. static struct attribute_group icnss_attr_group = {
  3405. .attrs = icnss_attrs,
  3406. };
  3407. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3408. {
  3409. struct device *dev = &priv->pdev->dev;
  3410. int ret;
  3411. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3412. if (ret) {
  3413. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3414. ret);
  3415. goto out;
  3416. }
  3417. return 0;
  3418. out:
  3419. return ret;
  3420. }
  3421. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3422. {
  3423. sysfs_remove_link(kernel_kobj, "icnss");
  3424. }
  3425. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3426. union icnss_device_group_devres {
  3427. const struct attribute_group *group;
  3428. };
  3429. static void devm_icnss_group_remove(struct device *dev, void *res)
  3430. {
  3431. union icnss_device_group_devres *devres = res;
  3432. const struct attribute_group *group = devres->group;
  3433. icnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3434. sysfs_remove_group(&dev->kobj, group);
  3435. }
  3436. static int devm_icnss_group_match(struct device *dev, void *res, void *data)
  3437. {
  3438. return ((union icnss_device_group_devres *)res) == data;
  3439. }
  3440. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3441. {
  3442. WARN_ON(devres_release(&priv->pdev->dev,
  3443. devm_icnss_group_remove, devm_icnss_group_match,
  3444. (void *)&icnss_attr_group));
  3445. }
  3446. #else
  3447. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3448. {
  3449. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3450. }
  3451. #endif
  3452. static int icnss_sysfs_create(struct icnss_priv *priv)
  3453. {
  3454. int ret = 0;
  3455. ret = devm_device_add_group(&priv->pdev->dev,
  3456. &icnss_attr_group);
  3457. if (ret) {
  3458. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3459. ret);
  3460. goto out;
  3461. }
  3462. icnss_create_sysfs_link(priv);
  3463. ret = icnss_create_shutdown_sysfs(priv);
  3464. if (ret)
  3465. goto remove_icnss_group;
  3466. return 0;
  3467. remove_icnss_group:
  3468. icnss_devm_device_remove_group(priv);
  3469. out:
  3470. return ret;
  3471. }
  3472. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3473. {
  3474. icnss_destroy_shutdown_sysfs(priv);
  3475. icnss_remove_sysfs_link(priv);
  3476. icnss_devm_device_remove_group(priv);
  3477. }
  3478. static int icnss_resource_parse(struct icnss_priv *priv)
  3479. {
  3480. int ret = 0, i = 0, irq = 0;
  3481. struct platform_device *pdev = priv->pdev;
  3482. struct device *dev = &pdev->dev;
  3483. struct resource *res;
  3484. u32 int_prop;
  3485. ret = icnss_get_vreg(priv);
  3486. if (ret) {
  3487. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3488. goto out;
  3489. }
  3490. ret = icnss_get_clk(priv);
  3491. if (ret) {
  3492. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3493. goto put_vreg;
  3494. }
  3495. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3496. ret = icnss_get_psf_info(priv);
  3497. if (ret < 0)
  3498. goto out;
  3499. priv->psf_supported = true;
  3500. }
  3501. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3502. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3503. "membase");
  3504. if (!res) {
  3505. icnss_pr_err("Memory base not found in DT\n");
  3506. ret = -EINVAL;
  3507. goto put_clk;
  3508. }
  3509. priv->mem_base_pa = res->start;
  3510. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3511. resource_size(res));
  3512. if (!priv->mem_base_va) {
  3513. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3514. &priv->mem_base_pa);
  3515. ret = -EINVAL;
  3516. goto put_clk;
  3517. }
  3518. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3519. &priv->mem_base_pa,
  3520. priv->mem_base_va);
  3521. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3522. irq = platform_get_irq(pdev, i);
  3523. if (irq < 0) {
  3524. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3525. ret = -ENODEV;
  3526. goto put_clk;
  3527. } else {
  3528. priv->ce_irqs[i] = irq;
  3529. }
  3530. }
  3531. if (of_property_read_bool(pdev->dev.of_node,
  3532. "qcom,is_low_power")) {
  3533. priv->low_power_support = true;
  3534. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3535. }
  3536. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3537. &priv->rf_subtype) == 0) {
  3538. priv->is_rf_subtype_valid = true;
  3539. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3540. }
  3541. if (of_property_read_bool(pdev->dev.of_node,
  3542. "qcom,is_slate_rfa")) {
  3543. priv->is_slate_rfa = true;
  3544. icnss_pr_err("SLATE rfa is enabled\n");
  3545. }
  3546. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3547. priv->device_id == WCN6450_DEVICE_ID) {
  3548. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3549. "msi_addr");
  3550. if (!res) {
  3551. icnss_pr_err("MSI address not found in DT\n");
  3552. ret = -EINVAL;
  3553. goto put_clk;
  3554. }
  3555. priv->msi_addr_pa = res->start;
  3556. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3557. PAGE_SIZE,
  3558. DMA_FROM_DEVICE, 0);
  3559. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3560. icnss_pr_err("MSI: failed to map msi address\n");
  3561. priv->msi_addr_iova = 0;
  3562. ret = -ENOMEM;
  3563. goto put_clk;
  3564. }
  3565. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3566. &priv->msi_addr_pa,
  3567. priv->msi_addr_iova);
  3568. ret = of_property_read_u32_index(dev->of_node,
  3569. "interrupts",
  3570. 1,
  3571. &int_prop);
  3572. if (ret) {
  3573. icnss_pr_dbg("Read interrupt prop failed");
  3574. goto put_clk;
  3575. }
  3576. priv->msi_base_data = int_prop + 32;
  3577. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3578. priv->msi_base_data, int_prop);
  3579. icnss_get_msi_assignment(priv);
  3580. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3581. irq = platform_get_irq(priv->pdev, i);
  3582. if (irq < 0) {
  3583. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3584. ret = -ENODEV;
  3585. goto put_clk;
  3586. } else {
  3587. priv->srng_irqs[i] = irq;
  3588. }
  3589. }
  3590. }
  3591. return 0;
  3592. put_clk:
  3593. icnss_put_clk(priv);
  3594. put_vreg:
  3595. icnss_put_vreg(priv);
  3596. out:
  3597. return ret;
  3598. }
  3599. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3600. {
  3601. int ret = 0;
  3602. struct platform_device *pdev = priv->pdev;
  3603. struct device *dev = &pdev->dev;
  3604. struct device_node *np = NULL;
  3605. u64 prop_size = 0;
  3606. const __be32 *addrp = NULL;
  3607. np = of_parse_phandle(dev->of_node,
  3608. "qcom,wlan-msa-fixed-region", 0);
  3609. if (np) {
  3610. addrp = of_get_address(np, 0, &prop_size, NULL);
  3611. if (!addrp) {
  3612. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3613. ret = -EINVAL;
  3614. of_node_put(np);
  3615. goto out;
  3616. }
  3617. priv->msa_pa = of_translate_address(np, addrp);
  3618. if (priv->msa_pa == OF_BAD_ADDR) {
  3619. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3620. ret = -EINVAL;
  3621. of_node_put(np);
  3622. goto out;
  3623. }
  3624. of_node_put(np);
  3625. priv->msa_va = memremap(priv->msa_pa,
  3626. (unsigned long)prop_size, MEMREMAP_WT);
  3627. if (!priv->msa_va) {
  3628. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3629. &priv->msa_pa);
  3630. ret = -EINVAL;
  3631. goto out;
  3632. }
  3633. priv->msa_mem_size = prop_size;
  3634. } else {
  3635. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3636. &priv->msa_mem_size);
  3637. if (ret || priv->msa_mem_size == 0) {
  3638. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3639. priv->msa_mem_size, ret);
  3640. goto out;
  3641. }
  3642. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3643. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3644. if (!priv->msa_va) {
  3645. icnss_pr_err("DMA alloc failed for MSA\n");
  3646. ret = -ENOMEM;
  3647. goto out;
  3648. }
  3649. }
  3650. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3651. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3652. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3653. "qcom,fw-prefix");
  3654. return 0;
  3655. out:
  3656. return ret;
  3657. }
  3658. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3659. struct device *dev, unsigned long iova,
  3660. int flags, void *handler_token)
  3661. {
  3662. struct icnss_priv *priv = handler_token;
  3663. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3664. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3665. if (!priv) {
  3666. icnss_pr_err("priv is NULL\n");
  3667. return -ENODEV;
  3668. }
  3669. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3670. fw_down_data.crashed = true;
  3671. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3672. &fw_down_data);
  3673. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3674. &fw_down_data);
  3675. }
  3676. icnss_trigger_recovery(&priv->pdev->dev);
  3677. /* IOMMU driver requires -ENOSYS return value to print debug info. */
  3678. return -ENOSYS;
  3679. }
  3680. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3681. {
  3682. int ret = 0;
  3683. struct platform_device *pdev = priv->pdev;
  3684. struct device *dev = &pdev->dev;
  3685. const char *iommu_dma_type;
  3686. struct resource *res;
  3687. u32 addr_win[2];
  3688. ret = of_property_read_u32_array(dev->of_node,
  3689. "qcom,iommu-dma-addr-pool",
  3690. addr_win,
  3691. ARRAY_SIZE(addr_win));
  3692. if (ret) {
  3693. icnss_pr_err("SMMU IOVA base not found\n");
  3694. } else {
  3695. priv->smmu_iova_start = addr_win[0];
  3696. priv->smmu_iova_len = addr_win[1];
  3697. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3698. &priv->smmu_iova_start,
  3699. priv->smmu_iova_len);
  3700. priv->iommu_domain =
  3701. iommu_get_domain_for_dev(&pdev->dev);
  3702. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3703. &iommu_dma_type);
  3704. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3705. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3706. priv->smmu_s1_enable = true;
  3707. if (priv->device_id == WCN6750_DEVICE_ID ||
  3708. priv->device_id == WCN6450_DEVICE_ID)
  3709. iommu_set_fault_handler(priv->iommu_domain,
  3710. icnss_smmu_fault_handler,
  3711. priv);
  3712. }
  3713. res = platform_get_resource_byname(pdev,
  3714. IORESOURCE_MEM,
  3715. "smmu_iova_ipa");
  3716. if (!res) {
  3717. icnss_pr_err("SMMU IOVA IPA not found\n");
  3718. } else {
  3719. priv->smmu_iova_ipa_start = res->start;
  3720. priv->smmu_iova_ipa_current = res->start;
  3721. priv->smmu_iova_ipa_len = resource_size(res);
  3722. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3723. &priv->smmu_iova_ipa_start,
  3724. priv->smmu_iova_ipa_len);
  3725. }
  3726. }
  3727. return 0;
  3728. }
  3729. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3730. {
  3731. if (!priv)
  3732. return -ENODEV;
  3733. if (!priv->smmu_iova_len)
  3734. return -EINVAL;
  3735. *addr = priv->smmu_iova_start;
  3736. *size = priv->smmu_iova_len;
  3737. return 0;
  3738. }
  3739. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3740. {
  3741. if (!priv)
  3742. return -ENODEV;
  3743. if (!priv->smmu_iova_ipa_len)
  3744. return -EINVAL;
  3745. *addr = priv->smmu_iova_ipa_start;
  3746. *size = priv->smmu_iova_ipa_len;
  3747. return 0;
  3748. }
  3749. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3750. char *name)
  3751. {
  3752. if (!priv)
  3753. return;
  3754. if (!priv->use_prefix_path) {
  3755. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3756. return;
  3757. }
  3758. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3759. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3760. ADRASTEA_PATH_PREFIX "%s", name);
  3761. else if (priv->device_id == WCN6750_DEVICE_ID)
  3762. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3763. QCA6750_PATH_PREFIX "%s", name);
  3764. else if (priv->device_id == WCN6450_DEVICE_ID)
  3765. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3766. WCN6450_PATH_PREFIX "%s", name);
  3767. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3768. }
  3769. static const struct platform_device_id icnss_platform_id_table[] = {
  3770. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3771. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3772. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3773. { },
  3774. };
  3775. static const struct of_device_id icnss_dt_match[] = {
  3776. {
  3777. .compatible = "qcom,wcn6750",
  3778. .data = (void *)&icnss_platform_id_table[0]},
  3779. {
  3780. .compatible = "qcom,icnss",
  3781. .data = (void *)&icnss_platform_id_table[1]},
  3782. {
  3783. .compatible = "qcom,wcn6450",
  3784. .data = (void *)&icnss_platform_id_table[2]},
  3785. { },
  3786. };
  3787. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3788. static void icnss_init_control_params(struct icnss_priv *priv)
  3789. {
  3790. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3791. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3792. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3793. if (priv->device_id == WCN6750_DEVICE_ID ||
  3794. priv->device_id == WCN6450_DEVICE_ID ||
  3795. of_property_read_bool(priv->pdev->dev.of_node,
  3796. "wpss-support-enable"))
  3797. priv->wpss_supported = true;
  3798. if (of_property_read_bool(priv->pdev->dev.of_node,
  3799. "bdf-download-support"))
  3800. priv->bdf_download_support = true;
  3801. if (of_property_read_bool(priv->pdev->dev.of_node,
  3802. "rproc-fw-download"))
  3803. priv->rproc_fw_download = true;
  3804. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3805. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3806. }
  3807. static void icnss_read_device_configs(struct icnss_priv *priv)
  3808. {
  3809. if (of_property_read_bool(priv->pdev->dev.of_node,
  3810. "wlan-ipa-disabled")) {
  3811. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3812. }
  3813. if (of_property_read_bool(priv->pdev->dev.of_node,
  3814. "qcom,wpss-self-recovery"))
  3815. priv->wpss_self_recovery_enabled = true;
  3816. }
  3817. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3818. {
  3819. pm_runtime_get_sync(&priv->pdev->dev);
  3820. pm_runtime_forbid(&priv->pdev->dev);
  3821. pm_runtime_set_active(&priv->pdev->dev);
  3822. pm_runtime_enable(&priv->pdev->dev);
  3823. }
  3824. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3825. {
  3826. pm_runtime_disable(&priv->pdev->dev);
  3827. pm_runtime_allow(&priv->pdev->dev);
  3828. pm_runtime_put_sync(&priv->pdev->dev);
  3829. }
  3830. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3831. {
  3832. return of_property_read_bool(priv->pdev->dev.of_node,
  3833. "use-nv-mac");
  3834. }
  3835. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3836. {
  3837. struct icnss_subsys_restart_level_data *restart_level_data;
  3838. icnss_pr_info("rproc name: %s recovery disable: %d",
  3839. rproc->name, rproc->recovery_disabled);
  3840. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3841. if (!restart_level_data)
  3842. return;
  3843. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3844. if (rproc->recovery_disabled)
  3845. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3846. else
  3847. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3848. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3849. 0, restart_level_data);
  3850. }
  3851. }
  3852. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3853. static void icnss_initialize_mem_pool(unsigned long device_id)
  3854. {
  3855. cnss_initialize_prealloc_pool(device_id);
  3856. }
  3857. static void icnss_deinitialize_mem_pool(void)
  3858. {
  3859. cnss_deinitialize_prealloc_pool();
  3860. }
  3861. #else
  3862. static void icnss_initialize_mem_pool(unsigned long device_id)
  3863. {
  3864. }
  3865. static void icnss_deinitialize_mem_pool(void)
  3866. {
  3867. }
  3868. #endif
  3869. static void register_rproc_restart_level_notifier(void)
  3870. {
  3871. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3872. }
  3873. static void unregister_rproc_restart_level_notifier(void)
  3874. {
  3875. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3876. }
  3877. static int icnss_probe(struct platform_device *pdev)
  3878. {
  3879. int ret = 0;
  3880. struct device *dev = &pdev->dev;
  3881. struct icnss_priv *priv;
  3882. const struct of_device_id *of_id;
  3883. const struct platform_device_id *device_id;
  3884. if (dev_get_drvdata(dev)) {
  3885. icnss_pr_err("Driver is already initialized\n");
  3886. return -EEXIST;
  3887. }
  3888. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3889. if (!of_id || !of_id->data) {
  3890. icnss_pr_err("Failed to find of match device!\n");
  3891. ret = -ENODEV;
  3892. goto out_reset_drvdata;
  3893. }
  3894. device_id = of_id->data;
  3895. icnss_pr_dbg("Platform driver probe\n");
  3896. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3897. if (!priv)
  3898. return -ENOMEM;
  3899. priv->magic = ICNSS_MAGIC;
  3900. dev_set_drvdata(dev, priv);
  3901. priv->pdev = pdev;
  3902. priv->device_id = device_id->driver_data;
  3903. priv->is_chain1_supported = true;
  3904. INIT_LIST_HEAD(&priv->vreg_list);
  3905. INIT_LIST_HEAD(&priv->clk_list);
  3906. icnss_allow_recursive_recovery(dev);
  3907. icnss_initialize_mem_pool(priv->device_id);
  3908. icnss_init_control_params(priv);
  3909. icnss_read_device_configs(priv);
  3910. ret = icnss_resource_parse(priv);
  3911. if (ret)
  3912. goto out_reset_drvdata;
  3913. ret = icnss_msa_dt_parse(priv);
  3914. if (ret)
  3915. goto out_free_resources;
  3916. ret = icnss_smmu_dt_parse(priv);
  3917. if (ret)
  3918. goto out_free_resources;
  3919. spin_lock_init(&priv->event_lock);
  3920. spin_lock_init(&priv->on_off_lock);
  3921. spin_lock_init(&priv->soc_wake_msg_lock);
  3922. mutex_init(&priv->dev_lock);
  3923. mutex_init(&priv->tcdev_lock);
  3924. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3925. if (!priv->event_wq) {
  3926. icnss_pr_err("Workqueue creation failed\n");
  3927. ret = -EFAULT;
  3928. goto smmu_cleanup;
  3929. }
  3930. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3931. INIT_LIST_HEAD(&priv->event_list);
  3932. if (priv->is_slate_rfa)
  3933. init_completion(&priv->slate_boot_complete);
  3934. ret = icnss_register_fw_service(priv);
  3935. if (ret < 0) {
  3936. icnss_pr_err("fw service registration failed: %d\n", ret);
  3937. goto out_destroy_wq;
  3938. }
  3939. icnss_power_misc_params_init(priv);
  3940. icnss_enable_recovery(priv);
  3941. icnss_debugfs_create(priv);
  3942. icnss_sysfs_create(priv);
  3943. ret = device_init_wakeup(&priv->pdev->dev, true);
  3944. if (ret)
  3945. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3946. ret);
  3947. icnss_set_plat_priv(priv);
  3948. init_completion(&priv->unblock_shutdown);
  3949. if (priv->device_id == WCN6750_DEVICE_ID ||
  3950. priv->device_id == WCN6450_DEVICE_ID) {
  3951. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3952. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3953. if (!priv->soc_wake_wq) {
  3954. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3955. ret = -EFAULT;
  3956. goto out_unregister_fw_service;
  3957. }
  3958. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3959. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3960. ret = icnss_genl_init();
  3961. if (ret < 0)
  3962. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3963. init_completion(&priv->smp2p_soc_wake_wait);
  3964. icnss_runtime_pm_init(priv);
  3965. icnss_aop_interface_init(priv);
  3966. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3967. priv->bdf_download_support = true;
  3968. register_rproc_restart_level_notifier();
  3969. }
  3970. if (priv->wpss_supported) {
  3971. ret = icnss_dms_init(priv);
  3972. if (ret)
  3973. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3974. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3975. icnss_pr_dbg("NV MAC feature is %s\n",
  3976. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3977. }
  3978. if (priv->wpss_supported || priv->rproc_fw_download)
  3979. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3980. timer_setup(&priv->recovery_timer,
  3981. icnss_recovery_timeout_hdlr, 0);
  3982. if (priv->wpss_self_recovery_enabled) {
  3983. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3984. timer_setup(&priv->wpss_ssr_timer,
  3985. icnss_wpss_ssr_timeout_hdlr, 0);
  3986. }
  3987. icnss_register_ims_service(priv);
  3988. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3989. icnss_pr_info("Platform driver probed successfully\n");
  3990. return 0;
  3991. out_unregister_fw_service:
  3992. icnss_unregister_fw_service(priv);
  3993. out_destroy_wq:
  3994. destroy_workqueue(priv->event_wq);
  3995. smmu_cleanup:
  3996. priv->iommu_domain = NULL;
  3997. out_free_resources:
  3998. icnss_put_resources(priv);
  3999. out_reset_drvdata:
  4000. icnss_deinitialize_mem_pool();
  4001. dev_set_drvdata(dev, NULL);
  4002. return ret;
  4003. }
  4004. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  4005. {
  4006. if (IS_ERR_OR_NULL(ramdump_info))
  4007. return;
  4008. device_unregister(ramdump_info->dev);
  4009. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  4010. kfree(ramdump_info);
  4011. }
  4012. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  4013. {
  4014. if (priv->batt_psy)
  4015. power_supply_put(penv->batt_psy);
  4016. if (priv->psf_supported) {
  4017. flush_workqueue(priv->soc_update_wq);
  4018. destroy_workqueue(priv->soc_update_wq);
  4019. power_supply_unreg_notifier(&priv->psf_nb);
  4020. }
  4021. }
  4022. static int icnss_remove(struct platform_device *pdev)
  4023. {
  4024. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  4025. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  4026. del_timer(&priv->recovery_timer);
  4027. if (priv->wpss_self_recovery_enabled)
  4028. del_timer(&priv->wpss_ssr_timer);
  4029. device_init_wakeup(&priv->pdev->dev, false);
  4030. icnss_unregister_ims_service(priv);
  4031. icnss_debugfs_destroy(priv);
  4032. icnss_unregister_power_supply_notifier(penv);
  4033. icnss_sysfs_destroy(priv);
  4034. complete_all(&priv->unblock_shutdown);
  4035. if (priv->is_slate_rfa) {
  4036. complete(&priv->slate_boot_complete);
  4037. icnss_slate_ssr_unregister_notifier(priv);
  4038. icnss_unregister_slate_event_notifier(priv);
  4039. }
  4040. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  4041. if (priv->wpss_supported) {
  4042. icnss_dms_deinit(priv);
  4043. icnss_wpss_early_ssr_unregister_notifier(priv);
  4044. icnss_wpss_ssr_unregister_notifier(priv);
  4045. } else {
  4046. icnss_modem_ssr_unregister_notifier(priv);
  4047. icnss_pdr_unregister_notifier(priv);
  4048. }
  4049. if (priv->device_id == WCN6750_DEVICE_ID ||
  4050. priv->device_id == WCN6450_DEVICE_ID) {
  4051. icnss_genl_exit();
  4052. icnss_runtime_pm_deinit(priv);
  4053. unregister_rproc_restart_level_notifier();
  4054. complete_all(&priv->smp2p_soc_wake_wait);
  4055. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  4056. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  4057. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  4058. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  4059. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  4060. if (priv->soc_wake_wq)
  4061. destroy_workqueue(priv->soc_wake_wq);
  4062. icnss_aop_interface_deinit(priv);
  4063. }
  4064. class_destroy(priv->icnss_ramdump_class);
  4065. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  4066. icnss_unregister_fw_service(priv);
  4067. if (priv->event_wq)
  4068. destroy_workqueue(priv->event_wq);
  4069. priv->iommu_domain = NULL;
  4070. icnss_hw_power_off(priv);
  4071. icnss_put_resources(priv);
  4072. icnss_deinitialize_mem_pool();
  4073. dev_set_drvdata(&pdev->dev, NULL);
  4074. return 0;
  4075. }
  4076. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  4077. {
  4078. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  4079. /* This is to handle if slate is not up and modem SSR is triggered */
  4080. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state))
  4081. return;
  4082. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  4083. ICNSS_ASSERT(0);
  4084. }
  4085. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  4086. {
  4087. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  4088. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  4089. priv->state);
  4090. schedule_work(&wpss_ssr_work);
  4091. }
  4092. #ifdef CONFIG_PM_SLEEP
  4093. static int icnss_pm_suspend(struct device *dev)
  4094. {
  4095. struct icnss_priv *priv = dev_get_drvdata(dev);
  4096. int ret = 0;
  4097. if (priv->magic != ICNSS_MAGIC) {
  4098. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  4099. dev, priv, priv->magic);
  4100. return -EINVAL;
  4101. }
  4102. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  4103. if (!priv->ops || !priv->ops->pm_suspend ||
  4104. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE) ||
  4105. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4106. return 0;
  4107. ret = priv->ops->pm_suspend(dev);
  4108. if (ret == 0) {
  4109. if (priv->device_id == WCN6750_DEVICE_ID ||
  4110. priv->device_id == WCN6450_DEVICE_ID) {
  4111. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4112. !test_bit(ICNSS_MODE_ON, &priv->state))
  4113. return 0;
  4114. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4115. ICNSS_SMP2P_OUT_POWER_SAVE);
  4116. }
  4117. priv->stats.pm_suspend++;
  4118. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  4119. } else {
  4120. priv->stats.pm_suspend_err++;
  4121. }
  4122. return ret;
  4123. }
  4124. static int icnss_pm_resume(struct device *dev)
  4125. {
  4126. struct icnss_priv *priv = dev_get_drvdata(dev);
  4127. int ret = 0;
  4128. if (priv->magic != ICNSS_MAGIC) {
  4129. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  4130. dev, priv, priv->magic);
  4131. return -EINVAL;
  4132. }
  4133. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  4134. if (!priv->ops || !priv->ops->pm_resume ||
  4135. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE) ||
  4136. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4137. goto out;
  4138. ret = priv->ops->pm_resume(dev);
  4139. out:
  4140. if (ret == 0) {
  4141. priv->stats.pm_resume++;
  4142. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4143. } else {
  4144. priv->stats.pm_resume_err++;
  4145. }
  4146. return ret;
  4147. }
  4148. static int icnss_pm_suspend_noirq(struct device *dev)
  4149. {
  4150. struct icnss_priv *priv = dev_get_drvdata(dev);
  4151. int ret = 0;
  4152. if (priv->magic != ICNSS_MAGIC) {
  4153. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4154. dev, priv, priv->magic);
  4155. return -EINVAL;
  4156. }
  4157. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4158. if (!priv->ops || !priv->ops->suspend_noirq ||
  4159. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4160. goto out;
  4161. ret = priv->ops->suspend_noirq(dev);
  4162. out:
  4163. if (ret == 0) {
  4164. priv->stats.pm_suspend_noirq++;
  4165. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4166. } else {
  4167. priv->stats.pm_suspend_noirq_err++;
  4168. }
  4169. return ret;
  4170. }
  4171. static int icnss_pm_resume_noirq(struct device *dev)
  4172. {
  4173. struct icnss_priv *priv = dev_get_drvdata(dev);
  4174. int ret = 0;
  4175. if (priv->magic != ICNSS_MAGIC) {
  4176. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4177. dev, priv, priv->magic);
  4178. return -EINVAL;
  4179. }
  4180. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4181. if (!priv->ops || !priv->ops->resume_noirq ||
  4182. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4183. goto out;
  4184. ret = priv->ops->resume_noirq(dev);
  4185. out:
  4186. if (ret == 0) {
  4187. priv->stats.pm_resume_noirq++;
  4188. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4189. } else {
  4190. priv->stats.pm_resume_noirq_err++;
  4191. }
  4192. return ret;
  4193. }
  4194. static int icnss_pm_runtime_suspend(struct device *dev)
  4195. {
  4196. struct icnss_priv *priv = dev_get_drvdata(dev);
  4197. int ret = 0;
  4198. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4199. icnss_pr_err("Ignore runtime suspend:\n");
  4200. goto out;
  4201. }
  4202. if (priv->magic != ICNSS_MAGIC) {
  4203. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4204. dev, priv, priv->magic);
  4205. return -EINVAL;
  4206. }
  4207. if (!priv->ops || !priv->ops->runtime_suspend ||
  4208. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE))
  4209. goto out;
  4210. icnss_pr_vdbg("Runtime suspend\n");
  4211. ret = priv->ops->runtime_suspend(dev);
  4212. if (!ret) {
  4213. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4214. !test_bit(ICNSS_MODE_ON, &priv->state))
  4215. return 0;
  4216. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4217. ICNSS_SMP2P_OUT_POWER_SAVE);
  4218. }
  4219. out:
  4220. return ret;
  4221. }
  4222. static int icnss_pm_runtime_resume(struct device *dev)
  4223. {
  4224. struct icnss_priv *priv = dev_get_drvdata(dev);
  4225. int ret = 0;
  4226. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4227. icnss_pr_err("Ignore runtime resume\n");
  4228. goto out;
  4229. }
  4230. if (priv->magic != ICNSS_MAGIC) {
  4231. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4232. dev, priv, priv->magic);
  4233. return -EINVAL;
  4234. }
  4235. if (!priv->ops || !priv->ops->runtime_resume ||
  4236. icnss_is_smp2p_valid(priv, ICNSS_SMP2P_OUT_POWER_SAVE))
  4237. goto out;
  4238. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4239. ret = priv->ops->runtime_resume(dev);
  4240. out:
  4241. return ret;
  4242. }
  4243. static int icnss_pm_runtime_idle(struct device *dev)
  4244. {
  4245. struct icnss_priv *priv = dev_get_drvdata(dev);
  4246. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4247. icnss_pr_err("Ignore runtime idle\n");
  4248. goto out;
  4249. }
  4250. icnss_pr_vdbg("Runtime idle\n");
  4251. pm_request_autosuspend(dev);
  4252. out:
  4253. return -EBUSY;
  4254. }
  4255. #endif
  4256. static const struct dev_pm_ops icnss_pm_ops = {
  4257. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4258. icnss_pm_resume)
  4259. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4260. icnss_pm_resume_noirq)
  4261. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4262. icnss_pm_runtime_idle)
  4263. };
  4264. static struct platform_driver icnss_driver = {
  4265. .probe = icnss_probe,
  4266. .remove = icnss_remove,
  4267. .driver = {
  4268. .name = "icnss2",
  4269. .pm = &icnss_pm_ops,
  4270. .of_match_table = icnss_dt_match,
  4271. },
  4272. };
  4273. static int __init icnss_initialize(void)
  4274. {
  4275. icnss_debug_init();
  4276. return platform_driver_register(&icnss_driver);
  4277. }
  4278. static void __exit icnss_exit(void)
  4279. {
  4280. platform_driver_unregister(&icnss_driver);
  4281. icnss_debug_deinit();
  4282. }
  4283. module_init(icnss_initialize);
  4284. module_exit(icnss_exit);
  4285. MODULE_LICENSE("GPL v2");
  4286. MODULE_DESCRIPTION("iWCN CORE platform driver");