dp_rx_mon_status.c 35 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236
  1. /*
  2. * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #ifdef FEATURE_PERPKT_INFO
  31. #include "dp_ratetable.h"
  32. #endif
  33. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  34. #include "dp_rx_mon_feature.h"
  35. #else
  36. static QDF_STATUS
  37. dp_rx_handle_enh_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  38. struct hal_rx_ppdu_info *ppdu_info)
  39. {
  40. return QDF_STATUS_SUCCESS;
  41. }
  42. static void
  43. dp_rx_mon_enh_capture_process(struct dp_pdev *pdev, uint32_t tlv_status,
  44. qdf_nbuf_t status_nbuf,
  45. struct hal_rx_ppdu_info *ppdu_info,
  46. bool *nbuf_used)
  47. {
  48. }
  49. #endif
  50. #ifdef FEATURE_PERPKT_INFO
  51. static inline void
  52. dp_rx_populate_rx_rssi_chain(struct hal_rx_ppdu_info *ppdu_info,
  53. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  54. {
  55. uint8_t chain, bw;
  56. int8_t rssi;
  57. for (chain = 0; chain < SS_COUNT; chain++) {
  58. for (bw = 0; bw < MAX_BW; bw++) {
  59. rssi = ppdu_info->rx_status.rssi_chain[chain][bw];
  60. if (rssi != DP_RSSI_INVAL)
  61. cdp_rx_ppdu->rssi_chain[chain][bw] = rssi;
  62. else
  63. cdp_rx_ppdu->rssi_chain[chain][bw] = 0;
  64. }
  65. }
  66. }
  67. /**
  68. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  69. * @pdev: pdev ctx
  70. * @ppdu_info: ppdu info structure from ppdu ring
  71. * @ppdu_nbuf: qdf nbuf abstraction for linux skb
  72. *
  73. * Return: none
  74. */
  75. static inline void
  76. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  77. struct hal_rx_ppdu_info *ppdu_info,
  78. qdf_nbuf_t ppdu_nbuf)
  79. {
  80. struct dp_peer *peer;
  81. struct dp_soc *soc = pdev->soc;
  82. struct dp_ast_entry *ast_entry;
  83. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  84. uint32_t ast_index;
  85. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  86. cdp_rx_ppdu->first_data_seq_ctrl =
  87. ppdu_info->rx_status.first_data_seq_ctrl;
  88. cdp_rx_ppdu->frame_ctrl =
  89. ppdu_info->rx_status.frame_control;
  90. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  91. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  92. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  93. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  94. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  95. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  96. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  97. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  98. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  99. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  100. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  101. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  102. else
  103. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  104. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  105. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  106. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  107. cdp_rx_ppdu->u.ltf_size = (ppdu_info->rx_status.he_data5 >>
  108. QDF_MON_STATUS_HE_LTF_SIZE_SHIFT) & 0x3;
  109. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  110. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  111. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  112. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  113. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  114. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  115. cdp_rx_ppdu->udp_msdu_count +
  116. cdp_rx_ppdu->other_msdu_count);
  117. cdp_rx_ppdu->num_bytes = ppdu_info->rx_status.ppdu_len;
  118. cdp_rx_ppdu->retries = CDP_FC_IS_RETRY_SET(cdp_rx_ppdu->frame_ctrl) ?
  119. ppdu_info->com_info.mpdu_cnt_fcs_ok : 0;
  120. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  121. cdp_rx_ppdu->is_ampdu = 1;
  122. else
  123. cdp_rx_ppdu->is_ampdu = 0;
  124. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  125. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  126. ast_index = ppdu_info->rx_status.ast_index;
  127. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  128. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  129. return;
  130. }
  131. ast_entry = soc->ast_table[ast_index];
  132. if (!ast_entry) {
  133. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  134. return;
  135. }
  136. peer = ast_entry->peer;
  137. if (!peer || peer->peer_ids[0] == HTT_INVALID_PEER) {
  138. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  139. return;
  140. }
  141. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  142. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  143. cdp_rx_ppdu->peer_id = peer->peer_ids[0];
  144. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  145. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  146. dp_rx_populate_rx_rssi_chain(ppdu_info, cdp_rx_ppdu);
  147. }
  148. #else
  149. static inline void
  150. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  151. struct hal_rx_ppdu_info *ppdu_info,
  152. qdf_nbuf_t ppdu_nbuf)
  153. {
  154. }
  155. #endif
  156. /**
  157. * dp_rx_stats_update() - Update per-peer statistics
  158. * @soc: Datapath SOC handle
  159. * @peer: Datapath peer handle
  160. * @ppdu: PPDU Descriptor
  161. *
  162. * Return: None
  163. */
  164. #ifdef FEATURE_PERPKT_INFO
  165. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  166. struct cdp_rx_indication_ppdu *ppdu)
  167. {
  168. uint32_t ratekbps = 0;
  169. uint32_t ppdu_rx_rate = 0;
  170. uint32_t nss = 0;
  171. uint32_t rix;
  172. if (!peer || !ppdu)
  173. return;
  174. if (ppdu->u.nss == 0)
  175. nss = 0;
  176. else
  177. nss = ppdu->u.nss - 1;
  178. ratekbps = dp_getrateindex(ppdu->u.gi,
  179. ppdu->u.mcs,
  180. nss,
  181. ppdu->u.preamble,
  182. ppdu->u.bw,
  183. &rix);
  184. if (!ratekbps)
  185. return;
  186. ppdu->rix = rix;
  187. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  188. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  189. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  190. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  191. ppdu->rx_ratekbps = ratekbps;
  192. if (peer->vdev)
  193. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  194. }
  195. static void dp_rx_stats_update(struct dp_pdev *pdev, struct dp_peer *peer,
  196. struct cdp_rx_indication_ppdu *ppdu)
  197. {
  198. struct dp_soc *soc = NULL;
  199. uint8_t mcs, preamble, ac = 0;
  200. uint16_t num_msdu;
  201. bool is_invalid_peer = false;
  202. mcs = ppdu->u.mcs;
  203. preamble = ppdu->u.preamble;
  204. num_msdu = ppdu->num_msdu;
  205. if (pdev)
  206. soc = pdev->soc;
  207. else
  208. return;
  209. if (!peer) {
  210. is_invalid_peer = true;
  211. peer = pdev->invalid_peer;
  212. }
  213. if (!soc || soc->process_rx_status)
  214. return;
  215. DP_STATS_UPD(peer, rx.rssi, ppdu->rssi);
  216. if (peer->stats.rx.avg_rssi == INVALID_RSSI)
  217. peer->stats.rx.avg_rssi = ppdu->rssi;
  218. else
  219. peer->stats.rx.avg_rssi =
  220. DP_GET_AVG_RSSI(peer->stats.rx.avg_rssi, ppdu->rssi);
  221. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  222. ppdu->u.nss = 1;
  223. if (ppdu->u.nss)
  224. DP_STATS_INC(peer, rx.nss[ppdu->u.nss - 1], num_msdu);
  225. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  226. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  227. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type], num_msdu);
  228. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu, ppdu->is_ampdu);
  229. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu, !(ppdu->is_ampdu));
  230. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  231. DP_STATS_INCC(peer,
  232. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  233. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  234. DP_STATS_INCC(peer,
  235. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  236. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  237. DP_STATS_INCC(peer,
  238. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  239. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  240. DP_STATS_INCC(peer,
  241. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  242. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  243. DP_STATS_INCC(peer,
  244. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  245. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  246. DP_STATS_INCC(peer,
  247. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  248. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  249. DP_STATS_INCC(peer,
  250. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  251. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  252. DP_STATS_INCC(peer,
  253. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  254. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  255. DP_STATS_INCC(peer,
  256. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  257. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  258. DP_STATS_INCC(peer,
  259. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  260. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  261. /*
  262. * If invalid TID, it could be a non-qos frame, hence do not update
  263. * any AC counters
  264. */
  265. ac = TID_TO_WME_AC(ppdu->tid);
  266. if (ppdu->tid != HAL_TID_INVALID)
  267. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  268. dp_peer_stats_notify(peer);
  269. DP_STATS_UPD(peer, rx.last_rssi, ppdu->rssi);
  270. if (is_invalid_peer)
  271. return;
  272. if (dp_is_subtype_data(ppdu->frame_ctrl))
  273. dp_rx_rate_stats_update(peer, ppdu);
  274. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  275. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  276. &peer->stats, ppdu->peer_id,
  277. UPDATE_PEER_STATS, pdev->pdev_id);
  278. #endif
  279. }
  280. #endif
  281. /*
  282. * dp_rx_get_fcs_ok_msdu() - get ppdu status buffer containing fcs_ok msdu
  283. * @pdev: pdev object
  284. * @ppdu_info: ppdu info object
  285. *
  286. * Return: nbuf
  287. */
  288. static inline qdf_nbuf_t
  289. dp_rx_get_fcs_ok_msdu(struct dp_pdev *pdev,
  290. struct hal_rx_ppdu_info *ppdu_info)
  291. {
  292. uint16_t mpdu_fcs_ok;
  293. qdf_nbuf_t status_nbuf = NULL;
  294. unsigned long int fcs_ok_bitmap;
  295. /* If fcs_ok_bitmap is zero, no need to procees further */
  296. if (qdf_unlikely(!ppdu_info->com_info.mpdu_fcs_ok_bitmap))
  297. return NULL;
  298. /* Obtain fcs_ok passed index from bitmap
  299. * this index is used to get fcs passed first msdu payload
  300. */
  301. fcs_ok_bitmap = ppdu_info->com_info.mpdu_fcs_ok_bitmap;
  302. mpdu_fcs_ok = qdf_find_first_bit(&fcs_ok_bitmap, HAL_RX_MAX_MPDU);
  303. /* Get status buffer by indexing mpdu_fcs_ok index
  304. * containing first msdu payload with fcs passed
  305. * and clone the buffer
  306. */
  307. status_nbuf = ppdu_info->ppdu_msdu_info[mpdu_fcs_ok].nbuf;
  308. /* Take ref of status nbuf as this nbuf is to be
  309. * freeed by upper layer.
  310. */
  311. qdf_nbuf_ref(status_nbuf);
  312. /* Free the ppdu status buffer queue */
  313. qdf_nbuf_queue_free(&pdev->rx_ppdu_buf_q);
  314. return status_nbuf;
  315. }
  316. static inline void
  317. dp_rx_handle_ppdu_status_buf(struct dp_pdev *pdev,
  318. struct hal_rx_ppdu_info *ppdu_info,
  319. qdf_nbuf_t status_nbuf)
  320. {
  321. qdf_nbuf_queue_add(&pdev->rx_ppdu_buf_q, status_nbuf);
  322. }
  323. /**
  324. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  325. * @soc: core txrx main context
  326. * @pdev: pdev strcuture
  327. * @ppdu_info: structure for rx ppdu ring
  328. *
  329. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  330. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  331. */
  332. #ifdef FEATURE_PERPKT_INFO
  333. static inline QDF_STATUS
  334. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  335. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  336. {
  337. uint8_t size = 0;
  338. struct ieee80211_frame *wh;
  339. uint32_t *nbuf_data;
  340. if (!ppdu_info->fcs_ok_msdu_info.first_msdu_payload)
  341. return QDF_STATUS_SUCCESS;
  342. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  343. return QDF_STATUS_SUCCESS;
  344. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  345. wh = (struct ieee80211_frame *)
  346. (ppdu_info->fcs_ok_msdu_info.first_msdu_payload + 4);
  347. size = (ppdu_info->fcs_ok_msdu_info.first_msdu_payload -
  348. qdf_nbuf_data(nbuf));
  349. ppdu_info->fcs_ok_msdu_info.first_msdu_payload = NULL;
  350. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  351. return QDF_STATUS_SUCCESS;
  352. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  353. IEEE80211_FC0_TYPE_MGT) ||
  354. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  355. IEEE80211_FC0_TYPE_CTL)) {
  356. return QDF_STATUS_SUCCESS;
  357. }
  358. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  359. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  360. /* only retain RX MSDU payload in the skb */
  361. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  362. ppdu_info->fcs_ok_msdu_info.payload_len);
  363. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  364. nbuf, HTT_INVALID_PEER, WDI_NO_VAL, pdev->pdev_id);
  365. return QDF_STATUS_E_ALREADY;
  366. }
  367. #else
  368. static inline QDF_STATUS
  369. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  370. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf)
  371. {
  372. return QDF_STATUS_SUCCESS;
  373. }
  374. #endif
  375. #ifdef FEATURE_PERPKT_INFO
  376. static inline void
  377. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  378. struct hal_rx_ppdu_info *ppdu_info,
  379. uint32_t tlv_status,
  380. qdf_nbuf_t status_nbuf)
  381. {
  382. QDF_STATUS mcopy_status;
  383. if (qdf_unlikely(!ppdu_info->com_info.mpdu_cnt)) {
  384. qdf_nbuf_free(status_nbuf);
  385. return;
  386. }
  387. /* Add buffers to queue until we receive
  388. * HAL_TLV_STATUS_PPDU_DONE
  389. */
  390. dp_rx_handle_ppdu_status_buf(pdev, ppdu_info, status_nbuf);
  391. /* If tlv_status is PPDU_DONE, process rx_ppdu_buf_q
  392. * and devliver fcs_ok msdu buffer
  393. */
  394. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  395. /* Get rx ppdu status buffer having fcs ok msdu */
  396. status_nbuf = dp_rx_get_fcs_ok_msdu(pdev, ppdu_info);
  397. if (status_nbuf) {
  398. mcopy_status = dp_rx_handle_mcopy_mode(soc, pdev,
  399. ppdu_info,
  400. status_nbuf);
  401. if (mcopy_status == QDF_STATUS_SUCCESS)
  402. qdf_nbuf_free(status_nbuf);
  403. }
  404. }
  405. }
  406. #else
  407. static inline void
  408. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  409. struct hal_rx_ppdu_info *ppdu_info,
  410. uint32_t tlv_status,
  411. qdf_nbuf_t status_nbuf)
  412. {
  413. }
  414. #endif
  415. /**
  416. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  417. * @soc: Datapath SOC handle
  418. * @pdev: Datapath PDEV handle
  419. * @ppdu_info: Structure for rx ppdu info
  420. * @nbuf: Qdf nbuf abstraction for linux skb
  421. *
  422. * Return: 0 on success, 1 on failure
  423. */
  424. static inline int
  425. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  426. struct hal_rx_ppdu_info *ppdu_info,
  427. qdf_nbuf_t nbuf)
  428. {
  429. uint8_t size = 0;
  430. if (!pdev->monitor_vdev) {
  431. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  432. "[%s]:[%d] Monitor vdev is NULL !!",
  433. __func__, __LINE__);
  434. return 1;
  435. }
  436. if (!ppdu_info->msdu_info.first_msdu_payload) {
  437. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  438. "[%s]:[%d] First msdu payload not present",
  439. __func__, __LINE__);
  440. return 1;
  441. }
  442. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  443. size = (ppdu_info->msdu_info.first_msdu_payload -
  444. qdf_nbuf_data(nbuf)) + 4;
  445. ppdu_info->msdu_info.first_msdu_payload = NULL;
  446. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  447. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  448. "[%s]:[%d] No header present",
  449. __func__, __LINE__);
  450. return 1;
  451. }
  452. /* Only retain RX MSDU payload in the skb */
  453. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  454. ppdu_info->msdu_info.payload_len);
  455. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  456. nbuf, sizeof(struct rx_pkt_tlvs));
  457. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  458. nbuf, NULL);
  459. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  460. return 0;
  461. }
  462. /**
  463. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  464. * @soc: core txrx main context
  465. * @pdev: pdev strcuture
  466. * @ppdu_info: structure for rx ppdu ring
  467. *
  468. * Return: none
  469. */
  470. #ifdef FEATURE_PERPKT_INFO
  471. static inline void
  472. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  473. struct hal_rx_ppdu_info *ppdu_info)
  474. {
  475. qdf_nbuf_t ppdu_nbuf;
  476. struct dp_peer *peer;
  477. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  478. /*
  479. * Do not allocate if fcs error,
  480. * ast idx invalid / fctl invalid
  481. */
  482. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  483. return;
  484. if (ppdu_info->nac_info.fc_valid &&
  485. ppdu_info->nac_info.to_ds_flag &&
  486. ppdu_info->nac_info.mac_addr2_valid) {
  487. struct dp_neighbour_peer *peer = NULL;
  488. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  489. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  490. if (pdev->neighbour_peers_added) {
  491. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  492. neighbour_peer_list_elem) {
  493. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  494. &ppdu_info->nac_info.mac_addr2,
  495. QDF_MAC_ADDR_SIZE)) {
  496. peer->rssi = rssi;
  497. break;
  498. }
  499. }
  500. }
  501. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  502. }
  503. /* need not generate wdi event when mcopy and
  504. * enhanced stats are not enabled
  505. */
  506. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en)
  507. return;
  508. if (!pdev->mcopy_mode) {
  509. if (!ppdu_info->rx_status.frame_control_info_valid)
  510. return;
  511. if (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)
  512. return;
  513. }
  514. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  515. sizeof(struct cdp_rx_indication_ppdu), 0, 0, FALSE);
  516. if (ppdu_nbuf) {
  517. dp_rx_populate_cdp_indication_ppdu(pdev, ppdu_info, ppdu_nbuf);
  518. qdf_nbuf_put_tail(ppdu_nbuf,
  519. sizeof(struct cdp_rx_indication_ppdu));
  520. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  521. peer = dp_peer_find_by_id(soc, cdp_rx_ppdu->peer_id);
  522. if (peer) {
  523. cdp_rx_ppdu->cookie = (void *)peer->wlanstats_ctx;
  524. dp_rx_stats_update(pdev, peer, cdp_rx_ppdu);
  525. dp_peer_unref_del_find_by_id(peer);
  526. }
  527. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  528. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  529. soc, ppdu_nbuf,
  530. cdp_rx_ppdu->peer_id,
  531. WDI_NO_VAL, pdev->pdev_id);
  532. } else if (pdev->mcopy_mode) {
  533. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  534. ppdu_nbuf, HTT_INVALID_PEER,
  535. WDI_NO_VAL, pdev->pdev_id);
  536. } else {
  537. qdf_nbuf_free(ppdu_nbuf);
  538. }
  539. }
  540. }
  541. #else
  542. static inline void
  543. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  544. struct hal_rx_ppdu_info *ppdu_info)
  545. {
  546. }
  547. #endif
  548. /**
  549. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  550. * filtering enabled
  551. * @soc: core txrx main context
  552. * @ppdu_info: Structure for rx ppdu info
  553. * @status_nbuf: Qdf nbuf abstraction for linux skb
  554. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  555. *
  556. * Return: none
  557. */
  558. static inline void
  559. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  560. struct hal_rx_ppdu_info *ppdu_info,
  561. qdf_nbuf_t status_nbuf, uint32_t mac_id)
  562. {
  563. struct dp_peer *peer;
  564. struct dp_ast_entry *ast_entry;
  565. uint32_t ast_index;
  566. ast_index = ppdu_info->rx_status.ast_index;
  567. if (ast_index < (WLAN_UMAC_PSOC_MAX_PEERS * 2)) {
  568. ast_entry = soc->ast_table[ast_index];
  569. if (ast_entry) {
  570. peer = ast_entry->peer;
  571. if (peer && (peer->peer_ids[0] != HTT_INVALID_PEER)) {
  572. if (peer->peer_based_pktlog_filter) {
  573. dp_wdi_event_handler(
  574. WDI_EVENT_RX_DESC, soc,
  575. status_nbuf,
  576. peer->peer_ids[0],
  577. WDI_NO_VAL, mac_id);
  578. }
  579. }
  580. }
  581. }
  582. }
  583. /**
  584. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  585. * buffer on Rx status Queue posted by status SRNG processing.
  586. * @soc: core txrx main context
  587. * @mac_id: mac_id which is one of 3 mac_ids _ring
  588. *
  589. * Return: none
  590. */
  591. static inline void
  592. dp_rx_mon_status_process_tlv(struct dp_soc *soc, uint32_t mac_id,
  593. uint32_t quota)
  594. {
  595. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  596. struct hal_rx_ppdu_info *ppdu_info;
  597. qdf_nbuf_t status_nbuf;
  598. uint8_t *rx_tlv;
  599. uint8_t *rx_tlv_start;
  600. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  601. QDF_STATUS enh_log_status = QDF_STATUS_SUCCESS;
  602. struct cdp_pdev_mon_stats *rx_mon_stats;
  603. int smart_mesh_status;
  604. enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
  605. bool nbuf_used;
  606. uint32_t rx_enh_capture_mode;
  607. ppdu_info = &pdev->ppdu_info;
  608. rx_mon_stats = &pdev->rx_mon_stats;
  609. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  610. return;
  611. rx_enh_capture_mode = pdev->rx_enh_capture_mode;
  612. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  613. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  614. rx_tlv = qdf_nbuf_data(status_nbuf);
  615. rx_tlv_start = rx_tlv;
  616. nbuf_used = false;
  617. if ((pdev->monitor_vdev) || (pdev->enhanced_stats_en) ||
  618. pdev->mcopy_mode ||
  619. (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  620. do {
  621. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  622. ppdu_info, pdev->soc->hal_soc,
  623. status_nbuf);
  624. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  625. rx_mon_stats);
  626. dp_rx_mon_enh_capture_process(pdev, tlv_status,
  627. status_nbuf, ppdu_info,
  628. &nbuf_used);
  629. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  630. if ((rx_tlv - rx_tlv_start) >= RX_BUFFER_SIZE)
  631. break;
  632. } while ((tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE) ||
  633. (tlv_status == HAL_TLV_STATUS_HEADER) ||
  634. (tlv_status == HAL_TLV_STATUS_MPDU_END) ||
  635. (tlv_status == HAL_TLV_STATUS_MSDU_END));
  636. }
  637. if (pdev->dp_peer_based_pktlog) {
  638. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  639. status_nbuf, mac_id);
  640. } else {
  641. if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_FULL)
  642. pktlog_mode = WDI_EVENT_RX_DESC;
  643. else if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_LITE)
  644. pktlog_mode = WDI_EVENT_LITE_RX;
  645. if (pktlog_mode != WDI_NO_VAL)
  646. dp_wdi_event_handler(pktlog_mode, soc,
  647. status_nbuf,
  648. HTT_INVALID_PEER,
  649. WDI_NO_VAL, mac_id);
  650. }
  651. /* smart monitor vap and m_copy cannot co-exist */
  652. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  653. && pdev->monitor_vdev) {
  654. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  655. pdev, ppdu_info, status_nbuf);
  656. if (smart_mesh_status)
  657. qdf_nbuf_free(status_nbuf);
  658. } else if (qdf_unlikely(pdev->mcopy_mode)) {
  659. dp_rx_process_mcopy_mode(soc, pdev,
  660. ppdu_info, tlv_status,
  661. status_nbuf);
  662. } else if (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED) {
  663. if (!nbuf_used)
  664. qdf_nbuf_free(status_nbuf);
  665. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE)
  666. enh_log_status =
  667. dp_rx_handle_enh_capture(soc,
  668. pdev, ppdu_info);
  669. } else {
  670. qdf_nbuf_free(status_nbuf);
  671. }
  672. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  673. dp_rx_mon_deliver_non_std(soc, mac_id);
  674. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  675. rx_mon_stats->status_ppdu_done++;
  676. if (pdev->enhanced_stats_en ||
  677. pdev->mcopy_mode || pdev->neighbour_peers_added)
  678. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  679. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  680. dp_rx_mon_dest_process(soc, mac_id, quota);
  681. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  682. }
  683. }
  684. return;
  685. }
  686. /*
  687. * dp_rx_mon_status_srng_process() - Process monitor status ring
  688. * post the status ring buffer to Rx status Queue for later
  689. * processing when status ring is filled with status TLV.
  690. * Allocate a new buffer to status ring if the filled buffer
  691. * is posted.
  692. *
  693. * @soc: core txrx main context
  694. * @mac_id: mac_id which is one of 3 mac_ids
  695. * @quota: No. of ring entry that can be serviced in one shot.
  696. * Return: uint32_t: No. of ring entry that is processed.
  697. */
  698. static inline uint32_t
  699. dp_rx_mon_status_srng_process(struct dp_soc *soc, uint32_t mac_id,
  700. uint32_t quota)
  701. {
  702. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  703. void *hal_soc;
  704. void *mon_status_srng;
  705. void *rxdma_mon_status_ring_entry;
  706. QDF_STATUS status;
  707. uint32_t work_done = 0;
  708. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  709. mon_status_srng = pdev->rxdma_mon_status_ring[mac_for_pdev].hal_srng;
  710. qdf_assert(mon_status_srng);
  711. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  712. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  713. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  714. __func__, __LINE__, mon_status_srng);
  715. return work_done;
  716. }
  717. hal_soc = soc->hal_soc;
  718. qdf_assert(hal_soc);
  719. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_status_srng)))
  720. goto done;
  721. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  722. * BUFFER_ADDR_INFO STRUCT
  723. */
  724. while (qdf_likely((rxdma_mon_status_ring_entry =
  725. hal_srng_src_peek(hal_soc, mon_status_srng))
  726. && quota--)) {
  727. uint32_t rx_buf_cookie;
  728. qdf_nbuf_t status_nbuf;
  729. struct dp_rx_desc *rx_desc;
  730. uint8_t *status_buf;
  731. qdf_dma_addr_t paddr;
  732. uint64_t buf_addr;
  733. buf_addr =
  734. (HAL_RX_BUFFER_ADDR_31_0_GET(
  735. rxdma_mon_status_ring_entry) |
  736. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  737. rxdma_mon_status_ring_entry)) << 32));
  738. if (qdf_likely(buf_addr)) {
  739. rx_buf_cookie =
  740. HAL_RX_BUF_COOKIE_GET(
  741. rxdma_mon_status_ring_entry);
  742. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  743. rx_buf_cookie);
  744. qdf_assert(rx_desc);
  745. status_nbuf = rx_desc->nbuf;
  746. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  747. QDF_DMA_FROM_DEVICE);
  748. status_buf = qdf_nbuf_data(status_nbuf);
  749. status = hal_get_rx_status_done(status_buf);
  750. if (status != QDF_STATUS_SUCCESS) {
  751. uint32_t hp, tp;
  752. hal_get_sw_hptp(hal_soc, mon_status_srng,
  753. &tp, &hp);
  754. QDF_TRACE(QDF_MODULE_ID_DP,
  755. QDF_TRACE_LEVEL_ERROR,
  756. "[%s][%d] status not done - hp:%u, tp:%u",
  757. __func__, __LINE__, hp, tp);
  758. /* WAR for missing status: Skip status entry */
  759. hal_srng_src_get_next(hal_soc, mon_status_srng);
  760. continue;
  761. }
  762. qdf_nbuf_set_pktlen(status_nbuf, RX_BUFFER_SIZE);
  763. qdf_nbuf_unmap_single(soc->osdev, status_nbuf,
  764. QDF_DMA_FROM_DEVICE);
  765. /* Put the status_nbuf to queue */
  766. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  767. } else {
  768. union dp_rx_desc_list_elem_t *desc_list = NULL;
  769. union dp_rx_desc_list_elem_t *tail = NULL;
  770. struct rx_desc_pool *rx_desc_pool;
  771. uint32_t num_alloc_desc;
  772. rx_desc_pool = &soc->rx_desc_status[mac_id];
  773. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  774. rx_desc_pool,
  775. 1,
  776. &desc_list,
  777. &tail);
  778. /*
  779. * No free descriptors available
  780. */
  781. if (qdf_unlikely(num_alloc_desc == 0)) {
  782. work_done++;
  783. break;
  784. }
  785. rx_desc = &desc_list->rx_desc;
  786. }
  787. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  788. /*
  789. * qdf_nbuf alloc or map failed,
  790. * free the dp rx desc to free list,
  791. * fill in NULL dma address at current HP entry,
  792. * keep HP in mon_status_ring unchanged,
  793. * wait next time dp_rx_mon_status_srng_process
  794. * to fill in buffer at current HP.
  795. */
  796. if (qdf_unlikely(!status_nbuf)) {
  797. union dp_rx_desc_list_elem_t *desc_list = NULL;
  798. union dp_rx_desc_list_elem_t *tail = NULL;
  799. struct rx_desc_pool *rx_desc_pool;
  800. rx_desc_pool = &soc->rx_desc_status[mac_id];
  801. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  802. "%s: fail to allocate or map qdf_nbuf",
  803. __func__);
  804. dp_rx_add_to_free_desc_list(&desc_list,
  805. &tail, rx_desc);
  806. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  807. &tail, mac_id, rx_desc_pool);
  808. hal_rxdma_buff_addr_info_set(
  809. rxdma_mon_status_ring_entry,
  810. 0, 0, HAL_RX_BUF_RBM_SW3_BM);
  811. work_done++;
  812. break;
  813. }
  814. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  815. rx_desc->nbuf = status_nbuf;
  816. rx_desc->in_use = 1;
  817. hal_rxdma_buff_addr_info_set(rxdma_mon_status_ring_entry,
  818. paddr, rx_desc->cookie, HAL_RX_BUF_RBM_SW3_BM);
  819. hal_srng_src_get_next(hal_soc, mon_status_srng);
  820. work_done++;
  821. }
  822. done:
  823. hal_srng_access_end(hal_soc, mon_status_srng);
  824. return work_done;
  825. }
  826. /*
  827. * dp_rx_mon_status_process() - Process monitor status ring and
  828. * TLV in status ring.
  829. *
  830. * @soc: core txrx main context
  831. * @mac_id: mac_id which is one of 3 mac_ids
  832. * @quota: No. of ring entry that can be serviced in one shot.
  833. * Return: uint32_t: No. of ring entry that is processed.
  834. */
  835. static inline uint32_t
  836. dp_rx_mon_status_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  837. uint32_t work_done;
  838. work_done = dp_rx_mon_status_srng_process(soc, mac_id, quota);
  839. quota -= work_done;
  840. dp_rx_mon_status_process_tlv(soc, mac_id, quota);
  841. return work_done;
  842. }
  843. /**
  844. * dp_mon_process() - Main monitor mode processing roution.
  845. * This call monitor status ring process then monitor
  846. * destination ring process.
  847. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  848. * @soc: core txrx main context
  849. * @mac_id: mac_id which is one of 3 mac_ids
  850. * @quota: No. of status ring entry that can be serviced in one shot.
  851. * Return: uint32_t: No. of ring entry that is processed.
  852. */
  853. uint32_t
  854. dp_mon_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota) {
  855. return dp_rx_mon_status_process(soc, mac_id, quota);
  856. }
  857. /**
  858. * dp_rx_pdev_mon_status_detach() - detach dp rx for status ring
  859. * @pdev: core txrx pdev context
  860. * @mac_id: mac_id/pdev_id correspondinggly for MCL and WIN
  861. *
  862. * This function will detach DP RX status ring from
  863. * main device context. will free DP Rx resources for
  864. * status ring
  865. *
  866. * Return: QDF_STATUS_SUCCESS: success
  867. * QDF_STATUS_E_RESOURCES: Error return
  868. */
  869. QDF_STATUS
  870. dp_rx_pdev_mon_status_detach(struct dp_pdev *pdev, int mac_id)
  871. {
  872. struct dp_soc *soc = pdev->soc;
  873. struct rx_desc_pool *rx_desc_pool;
  874. rx_desc_pool = &soc->rx_desc_status[mac_id];
  875. if (rx_desc_pool->pool_size != 0) {
  876. if (!dp_is_soc_reinit(soc))
  877. dp_rx_desc_nbuf_and_pool_free(soc, mac_id,
  878. rx_desc_pool);
  879. else
  880. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  881. }
  882. return QDF_STATUS_SUCCESS;
  883. }
  884. /*
  885. * dp_rx_buffers_replenish() - replenish monitor status ring with
  886. * rx nbufs called during dp rx
  887. * monitor status ring initialization
  888. *
  889. * @soc: core txrx main context
  890. * @mac_id: mac_id which is one of 3 mac_ids
  891. * @dp_rxdma_srng: dp monitor status circular ring
  892. * @rx_desc_pool; Pointer to Rx descriptor pool
  893. * @num_req_buffers: number of buffer to be replenished
  894. * @desc_list: list of descs if called from dp rx monitor status
  895. * process or NULL during dp rx initialization or
  896. * out of buffer interrupt
  897. * @tail: tail of descs list
  898. * @owner: who owns the nbuf (host, NSS etc...)
  899. * Return: return success or failure
  900. */
  901. static inline
  902. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  903. uint32_t mac_id,
  904. struct dp_srng *dp_rxdma_srng,
  905. struct rx_desc_pool *rx_desc_pool,
  906. uint32_t num_req_buffers,
  907. union dp_rx_desc_list_elem_t **desc_list,
  908. union dp_rx_desc_list_elem_t **tail,
  909. uint8_t owner)
  910. {
  911. uint32_t num_alloc_desc;
  912. uint16_t num_desc_to_free = 0;
  913. uint32_t num_entries_avail;
  914. uint32_t count = 0;
  915. int sync_hw_ptr = 1;
  916. qdf_dma_addr_t paddr;
  917. qdf_nbuf_t rx_netbuf;
  918. void *rxdma_ring_entry;
  919. union dp_rx_desc_list_elem_t *next;
  920. void *rxdma_srng;
  921. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  922. rxdma_srng = dp_rxdma_srng->hal_srng;
  923. qdf_assert(rxdma_srng);
  924. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  925. "[%s][%d] requested %d buffers for replenish",
  926. __func__, __LINE__, num_req_buffers);
  927. /*
  928. * if desc_list is NULL, allocate the descs from freelist
  929. */
  930. if (!(*desc_list)) {
  931. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  932. rx_desc_pool,
  933. num_req_buffers,
  934. desc_list,
  935. tail);
  936. if (!num_alloc_desc) {
  937. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  938. "[%s][%d] no free rx_descs in freelist",
  939. __func__, __LINE__);
  940. return QDF_STATUS_E_NOMEM;
  941. }
  942. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  943. "[%s][%d] %d rx desc allocated", __func__, __LINE__,
  944. num_alloc_desc);
  945. num_req_buffers = num_alloc_desc;
  946. }
  947. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  948. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  949. rxdma_srng, sync_hw_ptr);
  950. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  951. "[%s][%d] no of available entries in rxdma ring: %d",
  952. __func__, __LINE__, num_entries_avail);
  953. if (num_entries_avail < num_req_buffers) {
  954. num_desc_to_free = num_req_buffers - num_entries_avail;
  955. num_req_buffers = num_entries_avail;
  956. }
  957. while (count < num_req_buffers) {
  958. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  959. /*
  960. * qdf_nbuf alloc or map failed,
  961. * keep HP in mon_status_ring unchanged,
  962. * wait dp_rx_mon_status_srng_process
  963. * to fill in buffer at current HP.
  964. */
  965. if (qdf_unlikely(!rx_netbuf)) {
  966. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  967. "%s: qdf_nbuf allocate or map fail, count %d",
  968. __func__, count);
  969. break;
  970. }
  971. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  972. next = (*desc_list)->next;
  973. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  974. rxdma_srng);
  975. if (qdf_unlikely(!rxdma_ring_entry)) {
  976. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  977. "[%s][%d] rxdma_ring_entry is NULL, count - %d",
  978. __func__, __LINE__, count);
  979. qdf_nbuf_unmap_single(dp_soc->osdev, rx_netbuf,
  980. QDF_DMA_FROM_DEVICE);
  981. qdf_nbuf_free(rx_netbuf);
  982. break;
  983. }
  984. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  985. (*desc_list)->rx_desc.in_use = 1;
  986. count++;
  987. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  988. (*desc_list)->rx_desc.cookie, owner);
  989. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  990. "[%s][%d] rx_desc=%pK, cookie=%d, nbuf=%pK, \
  991. paddr=%pK",
  992. __func__, __LINE__, &(*desc_list)->rx_desc,
  993. (*desc_list)->rx_desc.cookie, rx_netbuf,
  994. (void *)paddr);
  995. *desc_list = next;
  996. }
  997. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  998. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  999. "successfully replenished %d buffers", num_req_buffers);
  1000. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1001. "%d rx desc added back to free list", num_desc_to_free);
  1002. /*
  1003. * add any available free desc back to the free list
  1004. */
  1005. if (*desc_list) {
  1006. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  1007. mac_id, rx_desc_pool);
  1008. }
  1009. return QDF_STATUS_SUCCESS;
  1010. }
  1011. /**
  1012. * dp_rx_pdev_mon_status_attach() - attach DP RX monitor status ring
  1013. * @pdev: core txrx pdev context
  1014. * @ring_id: ring number
  1015. * This function will attach a DP RX monitor status ring into pDEV
  1016. * and replenish monitor status ring with buffer.
  1017. *
  1018. * Return: QDF_STATUS_SUCCESS: success
  1019. * QDF_STATUS_E_RESOURCES: Error return
  1020. */
  1021. QDF_STATUS
  1022. dp_rx_pdev_mon_status_attach(struct dp_pdev *pdev, int ring_id) {
  1023. struct dp_soc *soc = pdev->soc;
  1024. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1025. union dp_rx_desc_list_elem_t *tail = NULL;
  1026. struct dp_srng *mon_status_ring;
  1027. uint32_t num_entries;
  1028. uint32_t i;
  1029. struct rx_desc_pool *rx_desc_pool;
  1030. QDF_STATUS status;
  1031. int mac_for_pdev = dp_get_mac_id_for_mac(soc, ring_id);
  1032. mon_status_ring = &pdev->rxdma_mon_status_ring[mac_for_pdev];
  1033. num_entries = mon_status_ring->num_entries;
  1034. rx_desc_pool = &soc->rx_desc_status[ring_id];
  1035. dp_info("Mon RX Status Pool[%d] entries=%d",
  1036. ring_id, num_entries);
  1037. status = dp_rx_desc_pool_alloc(soc, ring_id, num_entries + 1,
  1038. rx_desc_pool);
  1039. if (!QDF_IS_STATUS_SUCCESS(status))
  1040. return status;
  1041. dp_debug("Mon RX Status Buffers Replenish ring_id=%d", ring_id);
  1042. status = dp_rx_mon_status_buffers_replenish(soc, ring_id,
  1043. mon_status_ring,
  1044. rx_desc_pool,
  1045. num_entries,
  1046. &desc_list, &tail,
  1047. HAL_RX_BUF_RBM_SW3_BM);
  1048. if (!QDF_IS_STATUS_SUCCESS(status))
  1049. return status;
  1050. qdf_nbuf_queue_init(&pdev->rx_status_q);
  1051. qdf_nbuf_queue_init(&pdev->rx_ppdu_buf_q);
  1052. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1053. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  1054. sizeof(pdev->ppdu_info.rx_status));
  1055. qdf_mem_zero(&pdev->rx_mon_stats,
  1056. sizeof(pdev->rx_mon_stats));
  1057. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  1058. &pdev->rx_mon_stats);
  1059. for (i = 0; i < MAX_MU_USERS; i++) {
  1060. qdf_nbuf_queue_init(&pdev->mpdu_q[i]);
  1061. pdev->is_mpdu_hdr[i] = true;
  1062. }
  1063. qdf_mem_zero(pdev->msdu_list, sizeof(pdev->msdu_list[MAX_MU_USERS]));
  1064. pdev->rx_enh_capture_mode = CDP_RX_ENH_CAPTURE_DISABLED;
  1065. return QDF_STATUS_SUCCESS;
  1066. }