dsi_panel.c 100 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "msm-dsi-panel:[%s:%d] " fmt, __func__, __LINE__
  6. #include <linux/delay.h>
  7. #include <linux/slab.h>
  8. #include <linux/gpio.h>
  9. #include <linux/of_gpio.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. /**
  15. * topology is currently defined by a set of following 3 values:
  16. * 1. num of layer mixers
  17. * 2. num of compression encoders
  18. * 3. num of interfaces
  19. */
  20. #define TOPOLOGY_SET_LEN 3
  21. #define MAX_TOPOLOGY 5
  22. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  23. #define DEFAULT_MDP_TRANSFER_TIME 14000
  24. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  25. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  26. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  27. #define MAX_PANEL_JITTER 10
  28. #define DEFAULT_PANEL_PREFILL_LINES 25
  29. enum dsi_dsc_ratio_type {
  30. DSC_8BPC_8BPP,
  31. DSC_10BPC_8BPP,
  32. DSC_12BPC_8BPP,
  33. DSC_10BPC_10BPP,
  34. DSC_RATIO_TYPE_MAX
  35. };
  36. static u32 dsi_dsc_rc_buf_thresh[] = {0x0e, 0x1c, 0x2a, 0x38, 0x46, 0x54,
  37. 0x62, 0x69, 0x70, 0x77, 0x79, 0x7b, 0x7d, 0x7e};
  38. /*
  39. * DSC 1.1
  40. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  41. */
  42. static char dsi_dsc_rc_range_min_qp_1_1[][15] = {
  43. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 7, 12},
  44. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 17},
  45. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 15, 21},
  46. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  47. };
  48. /*
  49. * DSC 1.1 SCR
  50. * Rate control - Min QP values for each ratio type in dsi_dsc_ratio_type
  51. */
  52. static char dsi_dsc_rc_range_min_qp_1_1_scr1[][15] = {
  53. {0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 9, 12},
  54. {0, 4, 5, 5, 7, 7, 7, 7, 7, 7, 9, 9, 9, 13, 16},
  55. {0, 4, 9, 9, 11, 11, 11, 11, 11, 11, 13, 13, 13, 17, 20},
  56. {0, 4, 5, 6, 7, 7, 7, 7, 7, 7, 9, 9, 9, 11, 15},
  57. };
  58. /*
  59. * DSC 1.1
  60. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  61. */
  62. static char dsi_dsc_rc_range_max_qp_1_1[][15] = {
  63. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 11, 12, 13, 13, 15},
  64. {4, 8, 9, 10, 11, 11, 11, 12, 13, 14, 15, 16, 17, 17, 19},
  65. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 19, 20, 21, 21, 23},
  66. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  67. };
  68. /*
  69. * DSC 1.1 SCR
  70. * Rate control - Max QP values for each ratio type in dsi_dsc_ratio_type
  71. */
  72. static char dsi_dsc_rc_range_max_qp_1_1_scr1[][15] = {
  73. {4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 10, 11, 11, 12, 13},
  74. {8, 8, 9, 10, 11, 11, 11, 12, 13, 14, 14, 15, 15, 16, 17},
  75. {12, 12, 13, 14, 15, 15, 15, 16, 17, 18, 18, 19, 19, 20, 23},
  76. {7, 8, 9, 10, 11, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16},
  77. };
  78. /*
  79. * DSC 1.1 and DSC 1.1 SCR
  80. * Rate control - bpg offset values
  81. */
  82. static char dsi_dsc_rc_range_bpg_offset[] = {2, 0, 0, -2, -4, -6, -8, -8,
  83. -8, -10, -10, -12, -12, -12, -12};
  84. int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc, char *buf,
  85. int pps_id)
  86. {
  87. char *bp;
  88. char data;
  89. int i, bpp;
  90. char *dbgbp;
  91. dbgbp = buf;
  92. bp = buf;
  93. /* First 7 bytes are cmd header */
  94. *bp++ = 0x0A;
  95. *bp++ = 1;
  96. *bp++ = 0;
  97. *bp++ = 0;
  98. *bp++ = 10;
  99. *bp++ = 0;
  100. *bp++ = 128;
  101. *bp++ = (dsc->version & 0xff); /* pps0 */
  102. *bp++ = (pps_id & 0xff); /* pps1 */
  103. bp++; /* pps2, reserved */
  104. data = dsc->line_buf_depth & 0x0f;
  105. data |= ((dsc->bpc & 0xf) << 4);
  106. *bp++ = data; /* pps3 */
  107. bpp = dsc->bpp;
  108. bpp <<= 4; /* 4 fraction bits */
  109. data = (bpp >> 8);
  110. data &= 0x03; /* upper two bits */
  111. data |= ((dsc->block_pred_enable & 0x1) << 5);
  112. data |= ((dsc->convert_rgb & 0x1) << 4);
  113. data |= ((dsc->enable_422 & 0x1) << 3);
  114. data |= ((dsc->vbr_enable & 0x1) << 2);
  115. *bp++ = data; /* pps4 */
  116. *bp++ = (bpp & 0xff); /* pps5 */
  117. *bp++ = ((dsc->pic_height >> 8) & 0xff); /* pps6 */
  118. *bp++ = (dsc->pic_height & 0x0ff); /* pps7 */
  119. *bp++ = ((dsc->pic_width >> 8) & 0xff); /* pps8 */
  120. *bp++ = (dsc->pic_width & 0x0ff); /* pps9 */
  121. *bp++ = ((dsc->slice_height >> 8) & 0xff);/* pps10 */
  122. *bp++ = (dsc->slice_height & 0x0ff); /* pps11 */
  123. *bp++ = ((dsc->slice_width >> 8) & 0xff); /* pps12 */
  124. *bp++ = (dsc->slice_width & 0x0ff); /* pps13 */
  125. *bp++ = ((dsc->chunk_size >> 8) & 0xff);/* pps14 */
  126. *bp++ = (dsc->chunk_size & 0x0ff); /* pps15 */
  127. *bp++ = (dsc->initial_xmit_delay >> 8) & 0x3; /* pps16, bit 0, 1 */
  128. *bp++ = (dsc->initial_xmit_delay & 0xff);/* pps17 */
  129. *bp++ = ((dsc->initial_dec_delay >> 8) & 0xff); /* pps18 */
  130. *bp++ = (dsc->initial_dec_delay & 0xff);/* pps19 */
  131. bp++; /* pps20, reserved */
  132. *bp++ = (dsc->initial_scale_value & 0x3f); /* pps21 */
  133. *bp++ = ((dsc->scale_increment_interval >> 8) & 0xff); /* pps22 */
  134. *bp++ = (dsc->scale_increment_interval & 0xff); /* pps23 */
  135. *bp++ = ((dsc->scale_decrement_interval >> 8) & 0xf); /* pps24 */
  136. *bp++ = (dsc->scale_decrement_interval & 0x0ff);/* pps25 */
  137. bp++; /* pps26, reserved */
  138. *bp++ = (dsc->first_line_bpg_offset & 0x1f);/* pps27 */
  139. *bp++ = ((dsc->nfl_bpg_offset >> 8) & 0xff);/* pps28 */
  140. *bp++ = (dsc->nfl_bpg_offset & 0x0ff); /* pps29 */
  141. *bp++ = ((dsc->slice_bpg_offset >> 8) & 0xff);/* pps30 */
  142. *bp++ = (dsc->slice_bpg_offset & 0x0ff);/* pps31 */
  143. *bp++ = ((dsc->initial_offset >> 8) & 0xff);/* pps32 */
  144. *bp++ = (dsc->initial_offset & 0x0ff); /* pps33 */
  145. *bp++ = ((dsc->final_offset >> 8) & 0xff);/* pps34 */
  146. *bp++ = (dsc->final_offset & 0x0ff); /* pps35 */
  147. *bp++ = (dsc->min_qp_flatness & 0x1f); /* pps36 */
  148. *bp++ = (dsc->max_qp_flatness & 0x1f); /* pps37 */
  149. *bp++ = ((dsc->rc_model_size >> 8) & 0xff);/* pps38 */
  150. *bp++ = (dsc->rc_model_size & 0x0ff); /* pps39 */
  151. *bp++ = (dsc->edge_factor & 0x0f); /* pps40 */
  152. *bp++ = (dsc->quant_incr_limit0 & 0x1f); /* pps41 */
  153. *bp++ = (dsc->quant_incr_limit1 & 0x1f); /* pps42 */
  154. data = ((dsc->tgt_offset_hi & 0xf) << 4);
  155. data |= (dsc->tgt_offset_lo & 0x0f);
  156. *bp++ = data; /* pps43 */
  157. for (i = 0; i < 14; i++)
  158. *bp++ = (dsc->buf_thresh[i] & 0xff); /* pps44 - pps57 */
  159. for (i = 0; i < 15; i++) { /* pps58 - pps87 */
  160. data = (dsc->range_min_qp[i] & 0x1f);
  161. data <<= 3;
  162. data |= ((dsc->range_max_qp[i] >> 2) & 0x07);
  163. *bp++ = data;
  164. data = (dsc->range_max_qp[i] & 0x03);
  165. data <<= 6;
  166. data |= (dsc->range_bpg_offset[i] & 0x3f);
  167. *bp++ = data;
  168. }
  169. return 128;
  170. }
  171. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  172. {
  173. int rc = 0;
  174. int i;
  175. struct regulator *vreg = NULL;
  176. for (i = 0; i < panel->power_info.count; i++) {
  177. vreg = devm_regulator_get(panel->parent,
  178. panel->power_info.vregs[i].vreg_name);
  179. rc = PTR_RET(vreg);
  180. if (rc) {
  181. pr_err("failed to get %s regulator\n",
  182. panel->power_info.vregs[i].vreg_name);
  183. goto error_put;
  184. }
  185. panel->power_info.vregs[i].vreg = vreg;
  186. }
  187. return rc;
  188. error_put:
  189. for (i = i - 1; i >= 0; i--) {
  190. devm_regulator_put(panel->power_info.vregs[i].vreg);
  191. panel->power_info.vregs[i].vreg = NULL;
  192. }
  193. return rc;
  194. }
  195. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  196. {
  197. int rc = 0;
  198. int i;
  199. for (i = panel->power_info.count - 1; i >= 0; i--)
  200. devm_regulator_put(panel->power_info.vregs[i].vreg);
  201. return rc;
  202. }
  203. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  204. {
  205. int rc = 0;
  206. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  207. if (gpio_is_valid(r_config->reset_gpio)) {
  208. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  209. if (rc) {
  210. pr_err("request for reset_gpio failed, rc=%d\n", rc);
  211. goto error;
  212. }
  213. }
  214. if (gpio_is_valid(r_config->disp_en_gpio)) {
  215. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  216. if (rc) {
  217. pr_err("request for disp_en_gpio failed, rc=%d\n", rc);
  218. goto error_release_reset;
  219. }
  220. }
  221. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  222. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  223. if (rc) {
  224. pr_err("request for bklt_en_gpio failed, rc=%d\n", rc);
  225. goto error_release_disp_en;
  226. }
  227. }
  228. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  229. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  230. if (rc) {
  231. pr_err("request for mode_gpio failed, rc=%d\n", rc);
  232. goto error_release_mode_sel;
  233. }
  234. }
  235. goto error;
  236. error_release_mode_sel:
  237. if (gpio_is_valid(panel->bl_config.en_gpio))
  238. gpio_free(panel->bl_config.en_gpio);
  239. error_release_disp_en:
  240. if (gpio_is_valid(r_config->disp_en_gpio))
  241. gpio_free(r_config->disp_en_gpio);
  242. error_release_reset:
  243. if (gpio_is_valid(r_config->reset_gpio))
  244. gpio_free(r_config->reset_gpio);
  245. error:
  246. return rc;
  247. }
  248. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  249. {
  250. int rc = 0;
  251. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  252. if (gpio_is_valid(r_config->reset_gpio))
  253. gpio_free(r_config->reset_gpio);
  254. if (gpio_is_valid(r_config->disp_en_gpio))
  255. gpio_free(r_config->disp_en_gpio);
  256. if (gpio_is_valid(panel->bl_config.en_gpio))
  257. gpio_free(panel->bl_config.en_gpio);
  258. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  259. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  260. return rc;
  261. }
  262. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  263. {
  264. struct dsi_panel_reset_config *r_config;
  265. if (!panel) {
  266. pr_err("Invalid panel param\n");
  267. return -EINVAL;
  268. }
  269. r_config = &panel->reset_config;
  270. if (!r_config) {
  271. pr_err("Invalid panel reset configuration\n");
  272. return -EINVAL;
  273. }
  274. if (gpio_is_valid(r_config->reset_gpio)) {
  275. gpio_set_value(r_config->reset_gpio, 0);
  276. pr_info("GPIO pulled low to simulate ESD\n");
  277. return 0;
  278. }
  279. pr_err("failed to pull down gpio\n");
  280. return -EINVAL;
  281. }
  282. static int dsi_panel_reset(struct dsi_panel *panel)
  283. {
  284. int rc = 0;
  285. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  286. int i;
  287. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  288. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  289. if (rc) {
  290. pr_err("unable to set dir for disp gpio rc=%d\n", rc);
  291. goto exit;
  292. }
  293. }
  294. if (r_config->count) {
  295. rc = gpio_direction_output(r_config->reset_gpio,
  296. r_config->sequence[0].level);
  297. if (rc) {
  298. pr_err("unable to set dir for rst gpio rc=%d\n", rc);
  299. goto exit;
  300. }
  301. }
  302. for (i = 0; i < r_config->count; i++) {
  303. gpio_set_value(r_config->reset_gpio,
  304. r_config->sequence[i].level);
  305. if (r_config->sequence[i].sleep_ms)
  306. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  307. (r_config->sequence[i].sleep_ms * 1000) + 100);
  308. }
  309. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  310. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  311. if (rc)
  312. pr_err("unable to set dir for bklt gpio rc=%d\n", rc);
  313. }
  314. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  315. bool out = true;
  316. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  317. || (panel->reset_config.mode_sel_state
  318. == MODE_GPIO_LOW))
  319. out = false;
  320. else if ((panel->reset_config.mode_sel_state
  321. == MODE_SEL_SINGLE_PORT) ||
  322. (panel->reset_config.mode_sel_state
  323. == MODE_GPIO_HIGH))
  324. out = true;
  325. rc = gpio_direction_output(
  326. panel->reset_config.lcd_mode_sel_gpio, out);
  327. if (rc)
  328. pr_err("unable to set dir for mode gpio rc=%d\n", rc);
  329. }
  330. exit:
  331. return rc;
  332. }
  333. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  334. {
  335. int rc = 0;
  336. struct pinctrl_state *state;
  337. if (panel->host_config.ext_bridge_mode)
  338. return 0;
  339. if (enable)
  340. state = panel->pinctrl.active;
  341. else
  342. state = panel->pinctrl.suspend;
  343. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  344. if (rc)
  345. pr_err("[%s] failed to set pin state, rc=%d\n", panel->name,
  346. rc);
  347. return rc;
  348. }
  349. static int dsi_panel_power_on(struct dsi_panel *panel)
  350. {
  351. int rc = 0;
  352. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  353. if (rc) {
  354. pr_err("[%s] failed to enable vregs, rc=%d\n", panel->name, rc);
  355. goto exit;
  356. }
  357. rc = dsi_panel_set_pinctrl_state(panel, true);
  358. if (rc) {
  359. pr_err("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  360. goto error_disable_vregs;
  361. }
  362. rc = dsi_panel_reset(panel);
  363. if (rc) {
  364. pr_err("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  365. goto error_disable_gpio;
  366. }
  367. goto exit;
  368. error_disable_gpio:
  369. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  370. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  371. if (gpio_is_valid(panel->bl_config.en_gpio))
  372. gpio_set_value(panel->bl_config.en_gpio, 0);
  373. (void)dsi_panel_set_pinctrl_state(panel, false);
  374. error_disable_vregs:
  375. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  376. exit:
  377. return rc;
  378. }
  379. static int dsi_panel_power_off(struct dsi_panel *panel)
  380. {
  381. int rc = 0;
  382. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  383. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  384. if (gpio_is_valid(panel->reset_config.reset_gpio))
  385. gpio_set_value(panel->reset_config.reset_gpio, 0);
  386. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  387. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  388. rc = dsi_panel_set_pinctrl_state(panel, false);
  389. if (rc) {
  390. pr_err("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  391. rc);
  392. }
  393. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  394. if (rc)
  395. pr_err("[%s] failed to enable vregs, rc=%d\n", panel->name, rc);
  396. return rc;
  397. }
  398. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  399. enum dsi_cmd_set_type type)
  400. {
  401. int rc = 0, i = 0;
  402. ssize_t len;
  403. struct dsi_cmd_desc *cmds;
  404. u32 count;
  405. enum dsi_cmd_set_state state;
  406. struct dsi_display_mode *mode;
  407. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  408. if (!panel || !panel->cur_mode)
  409. return -EINVAL;
  410. mode = panel->cur_mode;
  411. cmds = mode->priv_info->cmd_sets[type].cmds;
  412. count = mode->priv_info->cmd_sets[type].count;
  413. state = mode->priv_info->cmd_sets[type].state;
  414. if (count == 0) {
  415. pr_debug("[%s] No commands to be sent for state(%d)\n",
  416. panel->name, type);
  417. goto error;
  418. }
  419. for (i = 0; i < count; i++) {
  420. if (state == DSI_CMD_SET_STATE_LP)
  421. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  422. if (cmds->last_command)
  423. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  424. len = ops->transfer(panel->host, &cmds->msg);
  425. if (len < 0) {
  426. rc = len;
  427. pr_err("failed to set cmds(%d), rc=%d\n", type, rc);
  428. goto error;
  429. }
  430. if (cmds->post_wait_ms)
  431. usleep_range(cmds->post_wait_ms*1000,
  432. ((cmds->post_wait_ms*1000)+10));
  433. cmds++;
  434. }
  435. error:
  436. return rc;
  437. }
  438. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  439. {
  440. int rc = 0;
  441. if (panel->host_config.ext_bridge_mode)
  442. return 0;
  443. devm_pinctrl_put(panel->pinctrl.pinctrl);
  444. return rc;
  445. }
  446. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  447. {
  448. int rc = 0;
  449. if (panel->host_config.ext_bridge_mode)
  450. return 0;
  451. /* TODO: pinctrl is defined in dsi dt node */
  452. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  453. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  454. rc = PTR_ERR(panel->pinctrl.pinctrl);
  455. pr_err("failed to get pinctrl, rc=%d\n", rc);
  456. goto error;
  457. }
  458. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  459. "panel_active");
  460. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  461. rc = PTR_ERR(panel->pinctrl.active);
  462. pr_err("failed to get pinctrl active state, rc=%d\n", rc);
  463. goto error;
  464. }
  465. panel->pinctrl.suspend =
  466. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  467. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  468. rc = PTR_ERR(panel->pinctrl.suspend);
  469. pr_err("failed to get pinctrl suspend state, rc=%d\n", rc);
  470. goto error;
  471. }
  472. error:
  473. return rc;
  474. }
  475. static int dsi_panel_wled_register(struct dsi_panel *panel,
  476. struct dsi_backlight_config *bl)
  477. {
  478. int rc = 0;
  479. struct backlight_device *bd;
  480. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  481. if (!bd) {
  482. pr_err("[%s] fail raw backlight register\n", panel->name);
  483. rc = -EINVAL;
  484. }
  485. bl->raw_bd = bd;
  486. return rc;
  487. }
  488. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  489. u32 bl_lvl)
  490. {
  491. int rc = 0;
  492. struct mipi_dsi_device *dsi;
  493. if (!panel || (bl_lvl > 0xffff)) {
  494. pr_err("invalid params\n");
  495. return -EINVAL;
  496. }
  497. dsi = &panel->mipi_device;
  498. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  499. if (rc < 0)
  500. pr_err("failed to update dcs backlight:%d\n", bl_lvl);
  501. return rc;
  502. }
  503. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  504. {
  505. int rc = 0;
  506. struct dsi_backlight_config *bl = &panel->bl_config;
  507. if (panel->host_config.ext_bridge_mode)
  508. return 0;
  509. pr_debug("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  510. switch (bl->type) {
  511. case DSI_BACKLIGHT_WLED:
  512. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  513. break;
  514. case DSI_BACKLIGHT_DCS:
  515. rc = dsi_panel_update_backlight(panel, bl_lvl);
  516. break;
  517. case DSI_BACKLIGHT_EXTERNAL:
  518. break;
  519. default:
  520. pr_err("Backlight type(%d) not supported\n", bl->type);
  521. rc = -ENOTSUPP;
  522. }
  523. return rc;
  524. }
  525. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  526. {
  527. u32 cur_bl_level;
  528. struct backlight_device *bd = bl->raw_bd;
  529. /* default the brightness level to 50% */
  530. cur_bl_level = bl->bl_max_level >> 1;
  531. switch (bl->type) {
  532. case DSI_BACKLIGHT_WLED:
  533. /* Try to query the backlight level from the backlight device */
  534. if (bd->ops && bd->ops->get_brightness)
  535. cur_bl_level = bd->ops->get_brightness(bd);
  536. break;
  537. case DSI_BACKLIGHT_DCS:
  538. case DSI_BACKLIGHT_EXTERNAL:
  539. default:
  540. /*
  541. * Ideally, we should read the backlight level from the
  542. * panel. For now, just set it default value.
  543. */
  544. break;
  545. }
  546. pr_debug("cur_bl_level=%d\n", cur_bl_level);
  547. return cur_bl_level;
  548. }
  549. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  550. {
  551. struct dsi_backlight_config *bl = &panel->bl_config;
  552. bl->bl_level = dsi_panel_get_brightness(bl);
  553. }
  554. static int dsi_panel_bl_register(struct dsi_panel *panel)
  555. {
  556. int rc = 0;
  557. struct dsi_backlight_config *bl = &panel->bl_config;
  558. if (panel->host_config.ext_bridge_mode)
  559. return 0;
  560. switch (bl->type) {
  561. case DSI_BACKLIGHT_WLED:
  562. rc = dsi_panel_wled_register(panel, bl);
  563. break;
  564. case DSI_BACKLIGHT_DCS:
  565. break;
  566. case DSI_BACKLIGHT_EXTERNAL:
  567. break;
  568. default:
  569. pr_err("Backlight type(%d) not supported\n", bl->type);
  570. rc = -ENOTSUPP;
  571. goto error;
  572. }
  573. error:
  574. return rc;
  575. }
  576. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  577. {
  578. int rc = 0;
  579. struct dsi_backlight_config *bl = &panel->bl_config;
  580. if (panel->host_config.ext_bridge_mode)
  581. return 0;
  582. switch (bl->type) {
  583. case DSI_BACKLIGHT_WLED:
  584. break;
  585. case DSI_BACKLIGHT_DCS:
  586. break;
  587. case DSI_BACKLIGHT_EXTERNAL:
  588. break;
  589. default:
  590. pr_err("Backlight type(%d) not supported\n", bl->type);
  591. rc = -ENOTSUPP;
  592. goto error;
  593. }
  594. error:
  595. return rc;
  596. }
  597. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  598. struct dsi_parser_utils *utils)
  599. {
  600. int rc = 0;
  601. u64 tmp64 = 0;
  602. struct dsi_display_mode *display_mode;
  603. struct dsi_display_mode_priv_info *priv_info;
  604. display_mode = container_of(mode, struct dsi_display_mode, timing);
  605. priv_info = display_mode->priv_info;
  606. rc = utils->read_u64(utils->data,
  607. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  608. if (rc == -EOVERFLOW) {
  609. tmp64 = 0;
  610. rc = utils->read_u32(utils->data,
  611. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  612. }
  613. mode->clk_rate_hz = !rc ? tmp64 : 0;
  614. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  615. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  616. &mode->mdp_transfer_time_us);
  617. if (!rc)
  618. display_mode->priv_info->mdp_transfer_time_us =
  619. mode->mdp_transfer_time_us;
  620. else
  621. display_mode->priv_info->mdp_transfer_time_us =
  622. DEFAULT_MDP_TRANSFER_TIME;
  623. rc = utils->read_u32(utils->data,
  624. "qcom,mdss-dsi-panel-framerate",
  625. &mode->refresh_rate);
  626. if (rc) {
  627. pr_err("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  628. rc);
  629. goto error;
  630. }
  631. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  632. &mode->h_active);
  633. if (rc) {
  634. pr_err("failed to read qcom,mdss-dsi-panel-width, rc=%d\n", rc);
  635. goto error;
  636. }
  637. rc = utils->read_u32(utils->data,
  638. "qcom,mdss-dsi-h-front-porch",
  639. &mode->h_front_porch);
  640. if (rc) {
  641. pr_err("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  642. rc);
  643. goto error;
  644. }
  645. rc = utils->read_u32(utils->data,
  646. "qcom,mdss-dsi-h-back-porch",
  647. &mode->h_back_porch);
  648. if (rc) {
  649. pr_err("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  650. rc);
  651. goto error;
  652. }
  653. rc = utils->read_u32(utils->data,
  654. "qcom,mdss-dsi-h-pulse-width",
  655. &mode->h_sync_width);
  656. if (rc) {
  657. pr_err("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  658. rc);
  659. goto error;
  660. }
  661. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  662. &mode->h_skew);
  663. if (rc)
  664. pr_err("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n", rc);
  665. pr_debug("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  666. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  667. mode->h_sync_width);
  668. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  669. &mode->v_active);
  670. if (rc) {
  671. pr_err("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  672. rc);
  673. goto error;
  674. }
  675. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  676. &mode->v_back_porch);
  677. if (rc) {
  678. pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  679. rc);
  680. goto error;
  681. }
  682. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  683. &mode->v_front_porch);
  684. if (rc) {
  685. pr_err("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  686. rc);
  687. goto error;
  688. }
  689. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  690. &mode->v_sync_width);
  691. if (rc) {
  692. pr_err("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  693. rc);
  694. goto error;
  695. }
  696. pr_debug("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  697. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  698. mode->v_sync_width);
  699. error:
  700. return rc;
  701. }
  702. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  703. struct dsi_parser_utils *utils,
  704. const char *name)
  705. {
  706. int rc = 0;
  707. u32 bpp = 0;
  708. enum dsi_pixel_format fmt;
  709. const char *packing;
  710. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  711. if (rc) {
  712. pr_err("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  713. name, rc);
  714. return rc;
  715. }
  716. host->bpp = bpp;
  717. switch (bpp) {
  718. case 3:
  719. fmt = DSI_PIXEL_FORMAT_RGB111;
  720. break;
  721. case 8:
  722. fmt = DSI_PIXEL_FORMAT_RGB332;
  723. break;
  724. case 12:
  725. fmt = DSI_PIXEL_FORMAT_RGB444;
  726. break;
  727. case 16:
  728. fmt = DSI_PIXEL_FORMAT_RGB565;
  729. break;
  730. case 18:
  731. fmt = DSI_PIXEL_FORMAT_RGB666;
  732. break;
  733. case 24:
  734. default:
  735. fmt = DSI_PIXEL_FORMAT_RGB888;
  736. break;
  737. }
  738. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  739. packing = utils->get_property(utils->data,
  740. "qcom,mdss-dsi-pixel-packing",
  741. NULL);
  742. if (packing && !strcmp(packing, "loose"))
  743. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  744. }
  745. host->dst_format = fmt;
  746. return rc;
  747. }
  748. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  749. struct dsi_parser_utils *utils,
  750. const char *name)
  751. {
  752. int rc = 0;
  753. bool lane_enabled;
  754. u32 num_of_lanes = 0;
  755. lane_enabled = utils->read_bool(utils->data,
  756. "qcom,mdss-dsi-lane-0-state");
  757. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  758. lane_enabled = utils->read_bool(utils->data,
  759. "qcom,mdss-dsi-lane-1-state");
  760. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  761. lane_enabled = utils->read_bool(utils->data,
  762. "qcom,mdss-dsi-lane-2-state");
  763. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  764. lane_enabled = utils->read_bool(utils->data,
  765. "qcom,mdss-dsi-lane-3-state");
  766. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  767. if (host->data_lanes & DSI_DATA_LANE_0)
  768. num_of_lanes++;
  769. if (host->data_lanes & DSI_DATA_LANE_1)
  770. num_of_lanes++;
  771. if (host->data_lanes & DSI_DATA_LANE_2)
  772. num_of_lanes++;
  773. if (host->data_lanes & DSI_DATA_LANE_3)
  774. num_of_lanes++;
  775. host->num_data_lanes = num_of_lanes;
  776. if (host->data_lanes == 0) {
  777. pr_err("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  778. rc = -EINVAL;
  779. }
  780. return rc;
  781. }
  782. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  783. struct dsi_parser_utils *utils,
  784. const char *name)
  785. {
  786. int rc = 0;
  787. const char *swap_mode;
  788. swap_mode = utils->get_property(utils->data,
  789. "qcom,mdss-dsi-color-order", NULL);
  790. if (swap_mode) {
  791. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  792. host->swap_mode = DSI_COLOR_SWAP_RGB;
  793. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  794. host->swap_mode = DSI_COLOR_SWAP_RBG;
  795. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  796. host->swap_mode = DSI_COLOR_SWAP_BRG;
  797. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  798. host->swap_mode = DSI_COLOR_SWAP_GRB;
  799. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  800. host->swap_mode = DSI_COLOR_SWAP_GBR;
  801. } else {
  802. pr_err("[%s] Unrecognized color order-%s\n",
  803. name, swap_mode);
  804. rc = -EINVAL;
  805. }
  806. } else {
  807. pr_debug("[%s] Falling back to default color order\n", name);
  808. host->swap_mode = DSI_COLOR_SWAP_RGB;
  809. }
  810. /* bit swap on color channel is not defined in dt */
  811. host->bit_swap_red = false;
  812. host->bit_swap_green = false;
  813. host->bit_swap_blue = false;
  814. return rc;
  815. }
  816. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  817. struct dsi_parser_utils *utils,
  818. const char *name)
  819. {
  820. const char *trig;
  821. int rc = 0;
  822. trig = utils->get_property(utils->data,
  823. "qcom,mdss-dsi-mdp-trigger", NULL);
  824. if (trig) {
  825. if (!strcmp(trig, "none")) {
  826. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  827. } else if (!strcmp(trig, "trigger_te")) {
  828. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  829. } else if (!strcmp(trig, "trigger_sw")) {
  830. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  831. } else if (!strcmp(trig, "trigger_sw_te")) {
  832. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  833. } else {
  834. pr_err("[%s] Unrecognized mdp trigger type (%s)\n",
  835. name, trig);
  836. rc = -EINVAL;
  837. }
  838. } else {
  839. pr_debug("[%s] Falling back to default MDP trigger\n",
  840. name);
  841. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  842. }
  843. trig = utils->get_property(utils->data,
  844. "qcom,mdss-dsi-dma-trigger", NULL);
  845. if (trig) {
  846. if (!strcmp(trig, "none")) {
  847. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  848. } else if (!strcmp(trig, "trigger_te")) {
  849. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  850. } else if (!strcmp(trig, "trigger_sw")) {
  851. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  852. } else if (!strcmp(trig, "trigger_sw_seof")) {
  853. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  854. } else if (!strcmp(trig, "trigger_sw_te")) {
  855. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  856. } else {
  857. pr_err("[%s] Unrecognized mdp trigger type (%s)\n",
  858. name, trig);
  859. rc = -EINVAL;
  860. }
  861. } else {
  862. pr_debug("[%s] Falling back to default MDP trigger\n", name);
  863. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  864. }
  865. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  866. &host->te_mode);
  867. if (rc) {
  868. pr_warn("[%s] fallback to default te-pin-select\n", name);
  869. host->te_mode = 1;
  870. rc = 0;
  871. }
  872. return rc;
  873. }
  874. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  875. struct dsi_parser_utils *utils,
  876. const char *name)
  877. {
  878. u32 val = 0;
  879. int rc = 0;
  880. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  881. if (!rc) {
  882. host->t_clk_post = val;
  883. pr_debug("[%s] t_clk_post = %d\n", name, val);
  884. }
  885. val = 0;
  886. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  887. if (!rc) {
  888. host->t_clk_pre = val;
  889. pr_debug("[%s] t_clk_pre = %d\n", name, val);
  890. }
  891. host->ignore_rx_eot = utils->read_bool(utils->data,
  892. "qcom,mdss-dsi-rx-eot-ignore");
  893. host->append_tx_eot = utils->read_bool(utils->data,
  894. "qcom,mdss-dsi-tx-eot-append");
  895. host->ext_bridge_mode = utils->read_bool(utils->data,
  896. "qcom,mdss-dsi-ext-bridge-mode");
  897. host->force_hs_clk_lane = utils->read_bool(utils->data,
  898. "qcom,mdss-dsi-force-clock-lane-hs");
  899. return 0;
  900. }
  901. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  902. {
  903. int rc = 0;
  904. struct dsi_parser_utils *utils = &panel->utils;
  905. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  906. panel->name);
  907. if (rc) {
  908. pr_err("[%s] failed to get pixel format, rc=%d\n",
  909. panel->name, rc);
  910. goto error;
  911. }
  912. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  913. panel->name);
  914. if (rc) {
  915. pr_err("[%s] failed to parse lane states, rc=%d\n",
  916. panel->name, rc);
  917. goto error;
  918. }
  919. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  920. panel->name);
  921. if (rc) {
  922. pr_err("[%s] failed to parse color swap config, rc=%d\n",
  923. panel->name, rc);
  924. goto error;
  925. }
  926. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  927. panel->name);
  928. if (rc) {
  929. pr_err("[%s] failed to parse triggers, rc=%d\n",
  930. panel->name, rc);
  931. goto error;
  932. }
  933. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  934. panel->name);
  935. if (rc) {
  936. pr_err("[%s] failed to parse misc host config, rc=%d\n",
  937. panel->name, rc);
  938. goto error;
  939. }
  940. error:
  941. return rc;
  942. }
  943. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  944. struct device_node *of_node)
  945. {
  946. int rc = 0;
  947. u32 val = 0;
  948. rc = of_property_read_u32(of_node,
  949. "qcom,mdss-dsi-qsync-min-refresh-rate",
  950. &val);
  951. if (rc)
  952. pr_err("[%s] qsync min fps not defined rc:%d\n",
  953. panel->name, rc);
  954. panel->qsync_min_fps = val;
  955. return rc;
  956. }
  957. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  958. {
  959. int rc = 0;
  960. bool supported = false;
  961. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  962. struct dsi_parser_utils *utils = &panel->utils;
  963. const char *name = panel->name;
  964. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  965. if (!supported) {
  966. dyn_clk_caps->dyn_clk_support = false;
  967. return rc;
  968. }
  969. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  970. "qcom,dsi-dyn-clk-list");
  971. if (dyn_clk_caps->bit_clk_list_len < 1) {
  972. pr_err("[%s] failed to get supported bit clk list\n", name);
  973. return -EINVAL;
  974. }
  975. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  976. sizeof(u32), GFP_KERNEL);
  977. if (!dyn_clk_caps->bit_clk_list)
  978. return -ENOMEM;
  979. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  980. dyn_clk_caps->bit_clk_list,
  981. dyn_clk_caps->bit_clk_list_len);
  982. if (rc) {
  983. pr_err("[%s] failed to parse supported bit clk list\n", name);
  984. return -EINVAL;
  985. }
  986. dyn_clk_caps->dyn_clk_support = true;
  987. return 0;
  988. }
  989. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  990. {
  991. int rc = 0;
  992. bool supported = false;
  993. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  994. struct dsi_parser_utils *utils = &panel->utils;
  995. const char *name = panel->name;
  996. const char *type;
  997. u32 i;
  998. supported = utils->read_bool(utils->data,
  999. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1000. if (!supported) {
  1001. pr_debug("[%s] DFPS is not supported\n", name);
  1002. dfps_caps->dfps_support = false;
  1003. return rc;
  1004. }
  1005. type = utils->get_property(utils->data,
  1006. "qcom,mdss-dsi-pan-fps-update", NULL);
  1007. if (!type) {
  1008. pr_err("[%s] dfps type not defined\n", name);
  1009. rc = -EINVAL;
  1010. goto error;
  1011. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1012. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1013. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1014. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1015. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1016. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1017. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1018. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1019. } else {
  1020. pr_err("[%s] dfps type is not recognized\n", name);
  1021. rc = -EINVAL;
  1022. goto error;
  1023. }
  1024. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1025. "qcom,dsi-supported-dfps-list");
  1026. if (dfps_caps->dfps_list_len < 1) {
  1027. pr_err("[%s] dfps refresh list not present\n", name);
  1028. rc = -EINVAL;
  1029. goto error;
  1030. }
  1031. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1032. GFP_KERNEL);
  1033. if (!dfps_caps->dfps_list) {
  1034. rc = -ENOMEM;
  1035. goto error;
  1036. }
  1037. rc = utils->read_u32_array(utils->data,
  1038. "qcom,dsi-supported-dfps-list",
  1039. dfps_caps->dfps_list,
  1040. dfps_caps->dfps_list_len);
  1041. if (rc) {
  1042. pr_err("[%s] dfps refresh rate list parse failed\n", name);
  1043. rc = -EINVAL;
  1044. goto error;
  1045. }
  1046. dfps_caps->dfps_support = true;
  1047. /* calculate max and min fps */
  1048. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1049. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1050. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1051. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1052. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1053. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1054. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1055. }
  1056. error:
  1057. return rc;
  1058. }
  1059. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1060. struct dsi_parser_utils *utils,
  1061. const char *name)
  1062. {
  1063. int rc = 0;
  1064. const char *traffic_mode;
  1065. u32 vc_id = 0;
  1066. u32 val = 0;
  1067. u32 line_no = 0;
  1068. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1069. if (rc) {
  1070. pr_debug("[%s] fallback to default h-sync-pulse\n", name);
  1071. cfg->pulse_mode_hsa_he = false;
  1072. } else if (val == 1) {
  1073. cfg->pulse_mode_hsa_he = true;
  1074. } else if (val == 0) {
  1075. cfg->pulse_mode_hsa_he = false;
  1076. } else {
  1077. pr_err("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1078. name);
  1079. rc = -EINVAL;
  1080. goto error;
  1081. }
  1082. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1083. "qcom,mdss-dsi-hfp-power-mode");
  1084. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1085. "qcom,mdss-dsi-hbp-power-mode");
  1086. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1087. "qcom,mdss-dsi-hsa-power-mode");
  1088. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1089. "qcom,mdss-dsi-last-line-interleave");
  1090. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1091. "qcom,mdss-dsi-bllp-eof-power-mode");
  1092. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1093. "qcom,mdss-dsi-bllp-power-mode");
  1094. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1095. "qcom,mdss-dsi-force-clock-lane-hs");
  1096. traffic_mode = utils->get_property(utils->data,
  1097. "qcom,mdss-dsi-traffic-mode",
  1098. NULL);
  1099. if (!traffic_mode) {
  1100. pr_debug("[%s] Falling back to default traffic mode\n", name);
  1101. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1102. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1103. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1104. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1105. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1106. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1107. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1108. } else {
  1109. pr_err("[%s] Unrecognized traffic mode-%s\n", name,
  1110. traffic_mode);
  1111. rc = -EINVAL;
  1112. goto error;
  1113. }
  1114. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1115. &vc_id);
  1116. if (rc) {
  1117. pr_debug("[%s] Fallback to default vc id\n", name);
  1118. cfg->vc_id = 0;
  1119. } else {
  1120. cfg->vc_id = vc_id;
  1121. }
  1122. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1123. &line_no);
  1124. if (rc) {
  1125. pr_debug("[%s] set default dma scheduling line no\n", name);
  1126. cfg->dma_sched_line = 0x1;
  1127. /* do not fail since we have default value */
  1128. rc = 0;
  1129. } else {
  1130. cfg->dma_sched_line = line_no;
  1131. }
  1132. error:
  1133. return rc;
  1134. }
  1135. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1136. struct dsi_parser_utils *utils,
  1137. const char *name)
  1138. {
  1139. u32 val = 0;
  1140. int rc = 0;
  1141. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1142. if (rc) {
  1143. pr_debug("[%s] Fallback to default wr-mem-start\n", name);
  1144. cfg->wr_mem_start = 0x2C;
  1145. } else {
  1146. cfg->wr_mem_start = val;
  1147. }
  1148. val = 0;
  1149. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1150. &val);
  1151. if (rc) {
  1152. pr_debug("[%s] Fallback to default wr-mem-continue\n", name);
  1153. cfg->wr_mem_continue = 0x3C;
  1154. } else {
  1155. cfg->wr_mem_continue = val;
  1156. }
  1157. /* TODO: fix following */
  1158. cfg->max_cmd_packets_interleave = 0;
  1159. val = 0;
  1160. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1161. &val);
  1162. if (rc) {
  1163. pr_debug("[%s] fallback to default te-dcs-cmd\n", name);
  1164. cfg->insert_dcs_command = true;
  1165. } else if (val == 1) {
  1166. cfg->insert_dcs_command = true;
  1167. } else if (val == 0) {
  1168. cfg->insert_dcs_command = false;
  1169. } else {
  1170. pr_err("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1171. name);
  1172. rc = -EINVAL;
  1173. goto error;
  1174. }
  1175. error:
  1176. return rc;
  1177. }
  1178. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1179. {
  1180. int rc = 0;
  1181. struct dsi_parser_utils *utils = &panel->utils;
  1182. bool panel_mode_switch_enabled;
  1183. enum dsi_op_mode panel_mode;
  1184. const char *mode;
  1185. mode = utils->get_property(utils->data,
  1186. "qcom,mdss-dsi-panel-type", NULL);
  1187. if (!mode) {
  1188. pr_debug("[%s] Fallback to default panel mode\n", panel->name);
  1189. panel_mode = DSI_OP_VIDEO_MODE;
  1190. } else if (!strcmp(mode, "dsi_video_mode")) {
  1191. panel_mode = DSI_OP_VIDEO_MODE;
  1192. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1193. panel_mode = DSI_OP_CMD_MODE;
  1194. } else {
  1195. pr_err("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1196. rc = -EINVAL;
  1197. goto error;
  1198. }
  1199. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1200. "qcom,mdss-dsi-panel-mode-switch");
  1201. pr_info("%s: panel operating mode switch feature %s\n", __func__,
  1202. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1203. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1204. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1205. utils,
  1206. panel->name);
  1207. if (rc) {
  1208. pr_err("[%s] Failed to parse video host cfg, rc=%d\n",
  1209. panel->name, rc);
  1210. goto error;
  1211. }
  1212. }
  1213. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1214. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1215. utils,
  1216. panel->name);
  1217. if (rc) {
  1218. pr_err("[%s] Failed to parse cmd host config, rc=%d\n",
  1219. panel->name, rc);
  1220. goto error;
  1221. }
  1222. }
  1223. panel->panel_mode = panel_mode;
  1224. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1225. error:
  1226. return rc;
  1227. }
  1228. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1229. {
  1230. int rc = 0;
  1231. u32 val = 0;
  1232. const char *str;
  1233. struct dsi_panel_phy_props *props = &panel->phy_props;
  1234. struct dsi_parser_utils *utils = &panel->utils;
  1235. const char *name = panel->name;
  1236. rc = utils->read_u32(utils->data,
  1237. "qcom,mdss-pan-physical-width-dimension", &val);
  1238. if (rc) {
  1239. pr_debug("[%s] Physical panel width is not defined\n", name);
  1240. props->panel_width_mm = 0;
  1241. rc = 0;
  1242. } else {
  1243. props->panel_width_mm = val;
  1244. }
  1245. rc = utils->read_u32(utils->data,
  1246. "qcom,mdss-pan-physical-height-dimension",
  1247. &val);
  1248. if (rc) {
  1249. pr_debug("[%s] Physical panel height is not defined\n", name);
  1250. props->panel_height_mm = 0;
  1251. rc = 0;
  1252. } else {
  1253. props->panel_height_mm = val;
  1254. }
  1255. str = utils->get_property(utils->data,
  1256. "qcom,mdss-dsi-panel-orientation", NULL);
  1257. if (!str) {
  1258. props->rotation = DSI_PANEL_ROTATE_NONE;
  1259. } else if (!strcmp(str, "180")) {
  1260. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1261. } else if (!strcmp(str, "hflip")) {
  1262. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1263. } else if (!strcmp(str, "vflip")) {
  1264. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1265. } else {
  1266. pr_err("[%s] Unrecognized panel rotation-%s\n", name, str);
  1267. rc = -EINVAL;
  1268. goto error;
  1269. }
  1270. error:
  1271. return rc;
  1272. }
  1273. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1274. "qcom,mdss-dsi-pre-on-command",
  1275. "qcom,mdss-dsi-on-command",
  1276. "qcom,mdss-dsi-post-panel-on-command",
  1277. "qcom,mdss-dsi-pre-off-command",
  1278. "qcom,mdss-dsi-off-command",
  1279. "qcom,mdss-dsi-post-off-command",
  1280. "qcom,mdss-dsi-pre-res-switch",
  1281. "qcom,mdss-dsi-res-switch",
  1282. "qcom,mdss-dsi-post-res-switch",
  1283. "qcom,cmd-to-video-mode-switch-commands",
  1284. "qcom,cmd-to-video-mode-post-switch-commands",
  1285. "qcom,video-to-cmd-mode-switch-commands",
  1286. "qcom,video-to-cmd-mode-post-switch-commands",
  1287. "qcom,mdss-dsi-panel-status-command",
  1288. "qcom,mdss-dsi-lp1-command",
  1289. "qcom,mdss-dsi-lp2-command",
  1290. "qcom,mdss-dsi-nolp-command",
  1291. "PPS not parsed from DTSI, generated dynamically",
  1292. "ROI not parsed from DTSI, generated dynamically",
  1293. "qcom,mdss-dsi-timing-switch-command",
  1294. "qcom,mdss-dsi-post-mode-switch-on-command",
  1295. "qcom,mdss-dsi-qsync-on-commands",
  1296. "qcom,mdss-dsi-qsync-off-commands",
  1297. };
  1298. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1299. "qcom,mdss-dsi-pre-on-command-state",
  1300. "qcom,mdss-dsi-on-command-state",
  1301. "qcom,mdss-dsi-post-on-command-state",
  1302. "qcom,mdss-dsi-pre-off-command-state",
  1303. "qcom,mdss-dsi-off-command-state",
  1304. "qcom,mdss-dsi-post-off-command-state",
  1305. "qcom,mdss-dsi-pre-res-switch-state",
  1306. "qcom,mdss-dsi-res-switch-state",
  1307. "qcom,mdss-dsi-post-res-switch-state",
  1308. "qcom,cmd-to-video-mode-switch-commands-state",
  1309. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1310. "qcom,video-to-cmd-mode-switch-commands-state",
  1311. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1312. "qcom,mdss-dsi-panel-status-command-state",
  1313. "qcom,mdss-dsi-lp1-command-state",
  1314. "qcom,mdss-dsi-lp2-command-state",
  1315. "qcom,mdss-dsi-nolp-command-state",
  1316. "PPS not parsed from DTSI, generated dynamically",
  1317. "ROI not parsed from DTSI, generated dynamically",
  1318. "qcom,mdss-dsi-timing-switch-command-state",
  1319. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1320. "qcom,mdss-dsi-qsync-on-commands-state",
  1321. "qcom,mdss-dsi-qsync-off-commands-state",
  1322. };
  1323. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1324. {
  1325. const u32 cmd_set_min_size = 7;
  1326. u32 count = 0;
  1327. u32 packet_length;
  1328. u32 tmp;
  1329. while (length >= cmd_set_min_size) {
  1330. packet_length = cmd_set_min_size;
  1331. tmp = ((data[5] << 8) | (data[6]));
  1332. packet_length += tmp;
  1333. if (packet_length > length) {
  1334. pr_err("format error\n");
  1335. return -EINVAL;
  1336. }
  1337. length -= packet_length;
  1338. data += packet_length;
  1339. count++;
  1340. }
  1341. *cnt = count;
  1342. return 0;
  1343. }
  1344. static int dsi_panel_create_cmd_packets(const char *data,
  1345. u32 length,
  1346. u32 count,
  1347. struct dsi_cmd_desc *cmd)
  1348. {
  1349. int rc = 0;
  1350. int i, j;
  1351. u8 *payload;
  1352. for (i = 0; i < count; i++) {
  1353. u32 size;
  1354. cmd[i].msg.type = data[0];
  1355. cmd[i].last_command = (data[1] == 1);
  1356. cmd[i].msg.channel = data[2];
  1357. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1358. cmd[i].msg.ctrl = 0;
  1359. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1360. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1361. size = cmd[i].msg.tx_len * sizeof(u8);
  1362. payload = kzalloc(size, GFP_KERNEL);
  1363. if (!payload) {
  1364. rc = -ENOMEM;
  1365. goto error_free_payloads;
  1366. }
  1367. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1368. payload[j] = data[7 + j];
  1369. cmd[i].msg.tx_buf = payload;
  1370. data += (7 + cmd[i].msg.tx_len);
  1371. }
  1372. return rc;
  1373. error_free_payloads:
  1374. for (i = i - 1; i >= 0; i--) {
  1375. cmd--;
  1376. kfree(cmd->msg.tx_buf);
  1377. }
  1378. return rc;
  1379. }
  1380. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1381. {
  1382. u32 i = 0;
  1383. struct dsi_cmd_desc *cmd;
  1384. for (i = 0; i < set->count; i++) {
  1385. cmd = &set->cmds[i];
  1386. kfree(cmd->msg.tx_buf);
  1387. }
  1388. }
  1389. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1390. {
  1391. kfree(set->cmds);
  1392. }
  1393. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1394. u32 packet_count)
  1395. {
  1396. u32 size;
  1397. size = packet_count * sizeof(*cmd->cmds);
  1398. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1399. if (!cmd->cmds)
  1400. return -ENOMEM;
  1401. cmd->count = packet_count;
  1402. return 0;
  1403. }
  1404. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1405. enum dsi_cmd_set_type type,
  1406. struct dsi_parser_utils *utils)
  1407. {
  1408. int rc = 0;
  1409. u32 length = 0;
  1410. const char *data;
  1411. const char *state;
  1412. u32 packet_count = 0;
  1413. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1414. &length);
  1415. if (!data) {
  1416. pr_debug("%s commands not defined\n", cmd_set_prop_map[type]);
  1417. rc = -ENOTSUPP;
  1418. goto error;
  1419. }
  1420. pr_debug("type=%d, name=%s, length=%d\n", type,
  1421. cmd_set_prop_map[type], length);
  1422. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1423. 8, 1, data, length, false);
  1424. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1425. if (rc) {
  1426. pr_err("commands failed, rc=%d\n", rc);
  1427. goto error;
  1428. }
  1429. pr_debug("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1430. packet_count, length);
  1431. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1432. if (rc) {
  1433. pr_err("failed to allocate cmd packets, rc=%d\n", rc);
  1434. goto error;
  1435. }
  1436. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1437. cmd->cmds);
  1438. if (rc) {
  1439. pr_err("failed to create cmd packets, rc=%d\n", rc);
  1440. goto error_free_mem;
  1441. }
  1442. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1443. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1444. cmd->state = DSI_CMD_SET_STATE_LP;
  1445. } else if (!strcmp(state, "dsi_hs_mode")) {
  1446. cmd->state = DSI_CMD_SET_STATE_HS;
  1447. } else {
  1448. pr_err("[%s] command state unrecognized-%s\n",
  1449. cmd_set_state_map[type], state);
  1450. goto error_free_mem;
  1451. }
  1452. return rc;
  1453. error_free_mem:
  1454. kfree(cmd->cmds);
  1455. cmd->cmds = NULL;
  1456. error:
  1457. return rc;
  1458. }
  1459. static int dsi_panel_parse_cmd_sets(
  1460. struct dsi_display_mode_priv_info *priv_info,
  1461. struct dsi_parser_utils *utils)
  1462. {
  1463. int rc = 0;
  1464. struct dsi_panel_cmd_set *set;
  1465. u32 i;
  1466. if (!priv_info) {
  1467. pr_err("invalid mode priv info\n");
  1468. return -EINVAL;
  1469. }
  1470. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1471. set = &priv_info->cmd_sets[i];
  1472. set->type = i;
  1473. set->count = 0;
  1474. if (i == DSI_CMD_SET_PPS) {
  1475. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1476. if (rc)
  1477. pr_err("failed to allocate cmd set %d, rc = %d\n",
  1478. i, rc);
  1479. set->state = DSI_CMD_SET_STATE_LP;
  1480. } else {
  1481. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1482. if (rc)
  1483. pr_debug("failed to parse set %d\n", i);
  1484. }
  1485. }
  1486. rc = 0;
  1487. return rc;
  1488. }
  1489. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1490. {
  1491. int rc = 0;
  1492. int i;
  1493. u32 length = 0;
  1494. u32 count = 0;
  1495. u32 size = 0;
  1496. u32 *arr_32 = NULL;
  1497. const u32 *arr;
  1498. struct dsi_parser_utils *utils = &panel->utils;
  1499. struct dsi_reset_seq *seq;
  1500. if (panel->host_config.ext_bridge_mode)
  1501. return 0;
  1502. arr = utils->get_property(utils->data,
  1503. "qcom,mdss-dsi-reset-sequence", &length);
  1504. if (!arr) {
  1505. pr_err("[%s] dsi-reset-sequence not found\n", panel->name);
  1506. rc = -EINVAL;
  1507. goto error;
  1508. }
  1509. if (length & 0x1) {
  1510. pr_err("[%s] syntax error for dsi-reset-sequence\n",
  1511. panel->name);
  1512. rc = -EINVAL;
  1513. goto error;
  1514. }
  1515. pr_err("RESET SEQ LENGTH = %d\n", length);
  1516. length = length / sizeof(u32);
  1517. size = length * sizeof(u32);
  1518. arr_32 = kzalloc(size, GFP_KERNEL);
  1519. if (!arr_32) {
  1520. rc = -ENOMEM;
  1521. goto error;
  1522. }
  1523. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1524. arr_32, length);
  1525. if (rc) {
  1526. pr_err("[%s] cannot read dso-reset-seqience\n", panel->name);
  1527. goto error_free_arr_32;
  1528. }
  1529. count = length / 2;
  1530. size = count * sizeof(*seq);
  1531. seq = kzalloc(size, GFP_KERNEL);
  1532. if (!seq) {
  1533. rc = -ENOMEM;
  1534. goto error_free_arr_32;
  1535. }
  1536. panel->reset_config.sequence = seq;
  1537. panel->reset_config.count = count;
  1538. for (i = 0; i < length; i += 2) {
  1539. seq->level = arr_32[i];
  1540. seq->sleep_ms = arr_32[i + 1];
  1541. seq++;
  1542. }
  1543. error_free_arr_32:
  1544. kfree(arr_32);
  1545. error:
  1546. return rc;
  1547. }
  1548. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1549. {
  1550. struct dsi_parser_utils *utils = &panel->utils;
  1551. panel->ulps_feature_enabled =
  1552. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1553. pr_info("%s: ulps feature %s\n", __func__,
  1554. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1555. panel->ulps_suspend_enabled =
  1556. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1557. pr_info("%s: ulps during suspend feature %s\n", __func__,
  1558. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1559. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1560. "qcom,mdss-dsi-te-using-wd");
  1561. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1562. "qcom,cmd-sync-wait-broadcast");
  1563. panel->lp11_init = utils->read_bool(utils->data,
  1564. "qcom,mdss-dsi-lp11-init");
  1565. return 0;
  1566. }
  1567. static int dsi_panel_parse_jitter_config(
  1568. struct dsi_display_mode *mode,
  1569. struct dsi_parser_utils *utils)
  1570. {
  1571. int rc;
  1572. struct dsi_display_mode_priv_info *priv_info;
  1573. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1574. u64 jitter_val = 0;
  1575. priv_info = mode->priv_info;
  1576. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1577. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1578. if (rc) {
  1579. pr_debug("panel jitter not defined rc=%d\n", rc);
  1580. } else {
  1581. jitter_val = jitter[0];
  1582. jitter_val = div_u64(jitter_val, jitter[1]);
  1583. }
  1584. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1585. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1586. priv_info->panel_jitter_denom =
  1587. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1588. } else {
  1589. priv_info->panel_jitter_numer = jitter[0];
  1590. priv_info->panel_jitter_denom = jitter[1];
  1591. }
  1592. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1593. &priv_info->panel_prefill_lines);
  1594. if (rc) {
  1595. pr_debug("panel prefill lines are not defined rc=%d\n", rc);
  1596. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1597. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1598. } else if (priv_info->panel_prefill_lines >=
  1599. DSI_V_TOTAL(&mode->timing)) {
  1600. pr_debug("invalid prefill lines config=%d setting to:%d\n",
  1601. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1602. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1603. }
  1604. return 0;
  1605. }
  1606. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1607. {
  1608. int rc = 0;
  1609. char *supply_name;
  1610. if (panel->host_config.ext_bridge_mode)
  1611. return 0;
  1612. if (!strcmp(panel->type, "primary"))
  1613. supply_name = "qcom,panel-supply-entries";
  1614. else
  1615. supply_name = "qcom,panel-sec-supply-entries";
  1616. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1617. &panel->power_info, supply_name);
  1618. if (rc) {
  1619. pr_err("[%s] failed to parse vregs\n", panel->name);
  1620. goto error;
  1621. }
  1622. error:
  1623. return rc;
  1624. }
  1625. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1626. {
  1627. int rc = 0;
  1628. const char *data;
  1629. struct dsi_parser_utils *utils = &panel->utils;
  1630. char *reset_gpio_name, *mode_set_gpio_name;
  1631. if (!strcmp(panel->type, "primary")) {
  1632. reset_gpio_name = "qcom,platform-reset-gpio";
  1633. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1634. } else {
  1635. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1636. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1637. }
  1638. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1639. reset_gpio_name, 0);
  1640. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1641. !panel->host_config.ext_bridge_mode) {
  1642. rc = panel->reset_config.reset_gpio;
  1643. pr_err("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1644. goto error;
  1645. }
  1646. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1647. "qcom,5v-boost-gpio",
  1648. 0);
  1649. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1650. pr_debug("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1651. panel->name, rc);
  1652. panel->reset_config.disp_en_gpio =
  1653. utils->get_named_gpio(utils->data,
  1654. "qcom,platform-en-gpio", 0);
  1655. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1656. pr_debug("[%s] platform-en-gpio is not set, rc=%d\n",
  1657. panel->name, rc);
  1658. }
  1659. }
  1660. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1661. utils->data, mode_set_gpio_name, 0);
  1662. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1663. pr_debug("%s:%d mode gpio not specified\n", __func__, __LINE__);
  1664. pr_debug("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1665. data = utils->get_property(utils->data,
  1666. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1667. if (data) {
  1668. if (!strcmp(data, "single_port"))
  1669. panel->reset_config.mode_sel_state =
  1670. MODE_SEL_SINGLE_PORT;
  1671. else if (!strcmp(data, "dual_port"))
  1672. panel->reset_config.mode_sel_state =
  1673. MODE_SEL_DUAL_PORT;
  1674. else if (!strcmp(data, "high"))
  1675. panel->reset_config.mode_sel_state =
  1676. MODE_GPIO_HIGH;
  1677. else if (!strcmp(data, "low"))
  1678. panel->reset_config.mode_sel_state =
  1679. MODE_GPIO_LOW;
  1680. } else {
  1681. /* Set default mode as SPLIT mode */
  1682. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1683. }
  1684. /* TODO: release memory */
  1685. rc = dsi_panel_parse_reset_sequence(panel);
  1686. if (rc) {
  1687. pr_err("[%s] failed to parse reset sequence, rc=%d\n",
  1688. panel->name, rc);
  1689. goto error;
  1690. }
  1691. error:
  1692. return rc;
  1693. }
  1694. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1695. {
  1696. int rc = 0;
  1697. u32 val;
  1698. struct dsi_backlight_config *config = &panel->bl_config;
  1699. struct dsi_parser_utils *utils = &panel->utils;
  1700. rc = utils->read_u32(utils->data, "qcom,dsi-bl-pmic-bank-select",
  1701. &val);
  1702. if (rc) {
  1703. pr_err("bl-pmic-bank-select is not defined, rc=%d\n", rc);
  1704. goto error;
  1705. }
  1706. config->pwm_pmic_bank = val;
  1707. rc = utils->read_u32(utils->data, "qcom,dsi-bl-pmic-pwm-frequency",
  1708. &val);
  1709. if (rc) {
  1710. pr_err("bl-pmic-bank-select is not defined, rc=%d\n", rc);
  1711. goto error;
  1712. }
  1713. config->pwm_period_usecs = val;
  1714. config->pwm_pmi_control = utils->read_bool(utils->data,
  1715. "qcom,mdss-dsi-bl-pwm-pmi");
  1716. config->pwm_gpio = utils->get_named_gpio(utils->data,
  1717. "qcom,mdss-dsi-pwm-gpio",
  1718. 0);
  1719. if (!gpio_is_valid(config->pwm_gpio)) {
  1720. pr_err("pwm gpio is invalid\n");
  1721. rc = -EINVAL;
  1722. goto error;
  1723. }
  1724. error:
  1725. return rc;
  1726. }
  1727. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1728. {
  1729. int rc = 0;
  1730. u32 val = 0;
  1731. const char *bl_type;
  1732. const char *data;
  1733. struct dsi_parser_utils *utils = &panel->utils;
  1734. char *bl_name;
  1735. if (!strcmp(panel->type, "primary"))
  1736. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1737. else
  1738. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1739. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1740. if (!bl_type) {
  1741. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1742. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1743. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1744. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1745. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1746. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1747. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1748. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1749. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1750. } else {
  1751. pr_debug("[%s] bl-pmic-control-type unknown-%s\n",
  1752. panel->name, bl_type);
  1753. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1754. }
  1755. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1756. if (!data) {
  1757. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1758. } else if (!strcmp(data, "delay_until_first_frame")) {
  1759. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1760. } else {
  1761. pr_debug("[%s] No valid bl-update-flag: %s\n",
  1762. panel->name, data);
  1763. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1764. }
  1765. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1766. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1767. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1768. if (rc) {
  1769. pr_debug("[%s] bl-min-level unspecified, defaulting to zero\n",
  1770. panel->name);
  1771. panel->bl_config.bl_min_level = 0;
  1772. } else {
  1773. panel->bl_config.bl_min_level = val;
  1774. }
  1775. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1776. if (rc) {
  1777. pr_debug("[%s] bl-max-level unspecified, defaulting to max level\n",
  1778. panel->name);
  1779. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1780. } else {
  1781. panel->bl_config.bl_max_level = val;
  1782. }
  1783. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1784. &val);
  1785. if (rc) {
  1786. pr_debug("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1787. panel->name);
  1788. panel->bl_config.brightness_max_level = 255;
  1789. } else {
  1790. panel->bl_config.brightness_max_level = val;
  1791. }
  1792. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1793. rc = dsi_panel_parse_bl_pwm_config(panel);
  1794. if (rc) {
  1795. pr_err("[%s] failed to parse pwm config, rc=%d\n",
  1796. panel->name, rc);
  1797. goto error;
  1798. }
  1799. }
  1800. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1801. "qcom,platform-bklight-en-gpio",
  1802. 0);
  1803. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1804. pr_debug("[%s] failed get bklt gpio, rc=%d\n", panel->name, rc);
  1805. rc = 0;
  1806. goto error;
  1807. }
  1808. error:
  1809. return rc;
  1810. }
  1811. void dsi_dsc_pclk_param_calc(struct msm_display_dsc_info *dsc, int intf_width)
  1812. {
  1813. int slice_per_pkt, slice_per_intf;
  1814. int bytes_in_slice, total_bytes_per_intf;
  1815. if (!dsc || !dsc->slice_width || !dsc->slice_per_pkt ||
  1816. (intf_width < dsc->slice_width)) {
  1817. pr_err("invalid input, intf_width=%d slice_width=%d\n",
  1818. intf_width, dsc ? dsc->slice_width : -1);
  1819. return;
  1820. }
  1821. slice_per_pkt = dsc->slice_per_pkt;
  1822. slice_per_intf = DIV_ROUND_UP(intf_width, dsc->slice_width);
  1823. /*
  1824. * If slice_per_pkt is greater than slice_per_intf then default to 1.
  1825. * This can happen during partial update.
  1826. */
  1827. if (slice_per_pkt > slice_per_intf)
  1828. slice_per_pkt = 1;
  1829. bytes_in_slice = DIV_ROUND_UP(dsc->slice_width * dsc->bpp, 8);
  1830. total_bytes_per_intf = bytes_in_slice * slice_per_intf;
  1831. dsc->eol_byte_num = total_bytes_per_intf % 3;
  1832. dsc->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf, 3);
  1833. dsc->bytes_in_slice = bytes_in_slice;
  1834. dsc->bytes_per_pkt = bytes_in_slice * slice_per_pkt;
  1835. dsc->pkt_per_line = slice_per_intf / slice_per_pkt;
  1836. }
  1837. int dsi_dsc_populate_static_param(struct msm_display_dsc_info *dsc)
  1838. {
  1839. int bpp, bpc;
  1840. int mux_words_size;
  1841. int groups_per_line, groups_total;
  1842. int min_rate_buffer_size;
  1843. int hrd_delay;
  1844. int pre_num_extra_mux_bits, num_extra_mux_bits;
  1845. int slice_bits;
  1846. int data;
  1847. int final_value, final_scale;
  1848. int ratio_index, mod_offset;
  1849. dsc->rc_model_size = 8192;
  1850. if (dsc->version == 0x11 && dsc->scr_rev == 0x1)
  1851. dsc->first_line_bpg_offset = 15;
  1852. else
  1853. dsc->first_line_bpg_offset = 12;
  1854. dsc->edge_factor = 6;
  1855. dsc->tgt_offset_hi = 3;
  1856. dsc->tgt_offset_lo = 3;
  1857. dsc->enable_422 = 0;
  1858. dsc->convert_rgb = 1;
  1859. dsc->vbr_enable = 0;
  1860. dsc->buf_thresh = dsi_dsc_rc_buf_thresh;
  1861. bpp = dsc->bpp;
  1862. bpc = dsc->bpc;
  1863. if ((bpc == 12) && (bpp == 8))
  1864. ratio_index = DSC_12BPC_8BPP;
  1865. else if ((bpc == 10) && (bpp == 8))
  1866. ratio_index = DSC_10BPC_8BPP;
  1867. else if ((bpc == 10) && (bpp == 10))
  1868. ratio_index = DSC_10BPC_10BPP;
  1869. else
  1870. ratio_index = DSC_8BPC_8BPP;
  1871. if (dsc->version == 0x11 && dsc->scr_rev == 0x1) {
  1872. dsc->range_min_qp =
  1873. dsi_dsc_rc_range_min_qp_1_1_scr1[ratio_index];
  1874. dsc->range_max_qp =
  1875. dsi_dsc_rc_range_max_qp_1_1_scr1[ratio_index];
  1876. } else {
  1877. dsc->range_min_qp = dsi_dsc_rc_range_min_qp_1_1[ratio_index];
  1878. dsc->range_max_qp = dsi_dsc_rc_range_max_qp_1_1[ratio_index];
  1879. }
  1880. dsc->range_bpg_offset = dsi_dsc_rc_range_bpg_offset;
  1881. if (bpp == 8) {
  1882. dsc->initial_offset = 6144;
  1883. dsc->initial_xmit_delay = 512;
  1884. } else if (bpp == 10) {
  1885. dsc->initial_offset = 5632;
  1886. dsc->initial_xmit_delay = 410;
  1887. } else {
  1888. dsc->initial_offset = 2048;
  1889. dsc->initial_xmit_delay = 341;
  1890. }
  1891. dsc->line_buf_depth = bpc + 1;
  1892. if (bpc == 8) {
  1893. dsc->input_10_bits = 0;
  1894. dsc->min_qp_flatness = 3;
  1895. dsc->max_qp_flatness = 12;
  1896. dsc->quant_incr_limit0 = 11;
  1897. dsc->quant_incr_limit1 = 11;
  1898. mux_words_size = 48;
  1899. } else if (bpc == 10) { /* 10bpc */
  1900. dsc->input_10_bits = 1;
  1901. dsc->min_qp_flatness = 7;
  1902. dsc->max_qp_flatness = 16;
  1903. dsc->quant_incr_limit0 = 15;
  1904. dsc->quant_incr_limit1 = 15;
  1905. mux_words_size = 48;
  1906. } else { /* 12 bpc */
  1907. dsc->input_10_bits = 0;
  1908. dsc->min_qp_flatness = 11;
  1909. dsc->max_qp_flatness = 20;
  1910. dsc->quant_incr_limit0 = 19;
  1911. dsc->quant_incr_limit1 = 19;
  1912. mux_words_size = 64;
  1913. }
  1914. mod_offset = dsc->slice_width % 3;
  1915. switch (mod_offset) {
  1916. case 0:
  1917. dsc->slice_last_group_size = 2;
  1918. break;
  1919. case 1:
  1920. dsc->slice_last_group_size = 0;
  1921. break;
  1922. case 2:
  1923. dsc->slice_last_group_size = 1;
  1924. break;
  1925. default:
  1926. break;
  1927. }
  1928. dsc->det_thresh_flatness = 2 << (bpc - 8);
  1929. groups_per_line = DIV_ROUND_UP(dsc->slice_width, 3);
  1930. dsc->chunk_size = dsc->slice_width * bpp / 8;
  1931. if ((dsc->slice_width * bpp) % 8)
  1932. dsc->chunk_size++;
  1933. /* rbs-min */
  1934. min_rate_buffer_size = dsc->rc_model_size - dsc->initial_offset +
  1935. dsc->initial_xmit_delay * bpp +
  1936. groups_per_line * dsc->first_line_bpg_offset;
  1937. hrd_delay = DIV_ROUND_UP(min_rate_buffer_size, bpp);
  1938. dsc->initial_dec_delay = hrd_delay - dsc->initial_xmit_delay;
  1939. dsc->initial_scale_value = 8 * dsc->rc_model_size /
  1940. (dsc->rc_model_size - dsc->initial_offset);
  1941. slice_bits = 8 * dsc->chunk_size * dsc->slice_height;
  1942. groups_total = groups_per_line * dsc->slice_height;
  1943. data = dsc->first_line_bpg_offset * 2048;
  1944. dsc->nfl_bpg_offset = DIV_ROUND_UP(data, (dsc->slice_height - 1));
  1945. pre_num_extra_mux_bits = 3 * (mux_words_size + (4 * bpc + 4) - 2);
  1946. num_extra_mux_bits = pre_num_extra_mux_bits - (mux_words_size -
  1947. ((slice_bits - pre_num_extra_mux_bits) % mux_words_size));
  1948. data = 2048 * (dsc->rc_model_size - dsc->initial_offset
  1949. + num_extra_mux_bits);
  1950. dsc->slice_bpg_offset = DIV_ROUND_UP(data, groups_total);
  1951. data = dsc->initial_xmit_delay * bpp;
  1952. final_value = dsc->rc_model_size - data + num_extra_mux_bits;
  1953. final_scale = 8 * dsc->rc_model_size /
  1954. (dsc->rc_model_size - final_value);
  1955. dsc->final_offset = final_value;
  1956. data = (final_scale - 9) * (dsc->nfl_bpg_offset +
  1957. dsc->slice_bpg_offset);
  1958. dsc->scale_increment_interval = (2048 * dsc->final_offset) / data;
  1959. dsc->scale_decrement_interval = groups_per_line /
  1960. (dsc->initial_scale_value - 8);
  1961. return 0;
  1962. }
  1963. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1964. struct dsi_parser_utils *utils)
  1965. {
  1966. const char *data;
  1967. u32 len, i;
  1968. int rc = 0;
  1969. struct dsi_display_mode_priv_info *priv_info;
  1970. priv_info = mode->priv_info;
  1971. data = utils->get_property(utils->data,
  1972. "qcom,mdss-dsi-panel-phy-timings", &len);
  1973. if (!data) {
  1974. pr_debug("Unable to read Phy timing settings\n");
  1975. } else {
  1976. priv_info->phy_timing_val =
  1977. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1978. if (!priv_info->phy_timing_val)
  1979. return -EINVAL;
  1980. for (i = 0; i < len; i++)
  1981. priv_info->phy_timing_val[i] = data[i];
  1982. priv_info->phy_timing_len = len;
  1983. }
  1984. mode->pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) *
  1985. DSI_V_TOTAL(&mode->timing) *
  1986. mode->timing.refresh_rate) / 1000;
  1987. return rc;
  1988. }
  1989. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1990. struct dsi_parser_utils *utils)
  1991. {
  1992. u32 data;
  1993. int rc = -EINVAL;
  1994. int intf_width;
  1995. const char *compression;
  1996. struct dsi_display_mode_priv_info *priv_info;
  1997. if (!mode || !mode->priv_info)
  1998. return -EINVAL;
  1999. priv_info = mode->priv_info;
  2000. priv_info->dsc_enabled = false;
  2001. compression = utils->get_property(utils->data,
  2002. "qcom,compression-mode", NULL);
  2003. if (compression && !strcmp(compression, "dsc"))
  2004. priv_info->dsc_enabled = true;
  2005. if (!priv_info->dsc_enabled) {
  2006. pr_debug("dsc compression is not enabled for the mode\n");
  2007. return 0;
  2008. }
  2009. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2010. if (rc) {
  2011. priv_info->dsc.version = 0x11;
  2012. rc = 0;
  2013. } else {
  2014. priv_info->dsc.version = data & 0xff;
  2015. /* only support DSC 1.1 rev */
  2016. if (priv_info->dsc.version != 0x11) {
  2017. pr_err("%s: DSC version:%d not supported\n", __func__,
  2018. priv_info->dsc.version);
  2019. rc = -EINVAL;
  2020. goto error;
  2021. }
  2022. }
  2023. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2024. if (rc) {
  2025. priv_info->dsc.scr_rev = 0x0;
  2026. rc = 0;
  2027. } else {
  2028. priv_info->dsc.scr_rev = data & 0xff;
  2029. /* only one scr rev supported */
  2030. if (priv_info->dsc.scr_rev > 0x1) {
  2031. pr_err("%s: DSC scr version:%d not supported\n",
  2032. __func__, priv_info->dsc.scr_rev);
  2033. rc = -EINVAL;
  2034. goto error;
  2035. }
  2036. }
  2037. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2038. if (rc) {
  2039. pr_err("failed to parse qcom,mdss-dsc-slice-height\n");
  2040. goto error;
  2041. }
  2042. priv_info->dsc.slice_height = data;
  2043. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2044. if (rc) {
  2045. pr_err("failed to parse qcom,mdss-dsc-slice-width\n");
  2046. goto error;
  2047. }
  2048. priv_info->dsc.slice_width = data;
  2049. intf_width = mode->timing.h_active;
  2050. if (intf_width % priv_info->dsc.slice_width) {
  2051. pr_err("invalid slice width for the intf width:%d slice width:%d\n",
  2052. intf_width, priv_info->dsc.slice_width);
  2053. rc = -EINVAL;
  2054. goto error;
  2055. }
  2056. priv_info->dsc.pic_width = mode->timing.h_active;
  2057. priv_info->dsc.pic_height = mode->timing.v_active;
  2058. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2059. if (rc) {
  2060. pr_err("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2061. goto error;
  2062. } else if (!data || (data > 2)) {
  2063. pr_err("invalid dsc slice-per-pkt:%d\n", data);
  2064. goto error;
  2065. }
  2066. priv_info->dsc.slice_per_pkt = data;
  2067. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2068. &data);
  2069. if (rc) {
  2070. pr_err("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2071. goto error;
  2072. }
  2073. priv_info->dsc.bpc = data;
  2074. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2075. &data);
  2076. if (rc) {
  2077. pr_err("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2078. goto error;
  2079. }
  2080. priv_info->dsc.bpp = data;
  2081. priv_info->dsc.block_pred_enable = utils->read_bool(utils->data,
  2082. "qcom,mdss-dsc-block-prediction-enable");
  2083. priv_info->dsc.full_frame_slices = DIV_ROUND_UP(intf_width,
  2084. priv_info->dsc.slice_width);
  2085. dsi_dsc_populate_static_param(&priv_info->dsc);
  2086. dsi_dsc_pclk_param_calc(&priv_info->dsc, intf_width);
  2087. mode->timing.dsc_enabled = true;
  2088. mode->timing.dsc = &priv_info->dsc;
  2089. error:
  2090. return rc;
  2091. }
  2092. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2093. {
  2094. int rc = 0;
  2095. struct drm_panel_hdr_properties *hdr_prop;
  2096. struct dsi_parser_utils *utils = &panel->utils;
  2097. hdr_prop = &panel->hdr_props;
  2098. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2099. "qcom,mdss-dsi-panel-hdr-enabled");
  2100. if (hdr_prop->hdr_enabled) {
  2101. rc = utils->read_u32_array(utils->data,
  2102. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2103. hdr_prop->display_primaries,
  2104. DISPLAY_PRIMARIES_MAX);
  2105. if (rc) {
  2106. pr_err("%s:%d, Unable to read color primaries,rc:%u\n",
  2107. __func__, __LINE__, rc);
  2108. hdr_prop->hdr_enabled = false;
  2109. return rc;
  2110. }
  2111. rc = utils->read_u32(utils->data,
  2112. "qcom,mdss-dsi-panel-peak-brightness",
  2113. &(hdr_prop->peak_brightness));
  2114. if (rc) {
  2115. pr_err("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2116. __func__, __LINE__, rc);
  2117. hdr_prop->hdr_enabled = false;
  2118. return rc;
  2119. }
  2120. rc = utils->read_u32(utils->data,
  2121. "qcom,mdss-dsi-panel-blackness-level",
  2122. &(hdr_prop->blackness_level));
  2123. if (rc) {
  2124. pr_err("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2125. __func__, __LINE__, rc);
  2126. hdr_prop->hdr_enabled = false;
  2127. return rc;
  2128. }
  2129. }
  2130. return 0;
  2131. }
  2132. static int dsi_panel_parse_topology(
  2133. struct dsi_display_mode_priv_info *priv_info,
  2134. struct dsi_parser_utils *utils,
  2135. int topology_override)
  2136. {
  2137. struct msm_display_topology *topology;
  2138. u32 top_count, top_sel, *array = NULL;
  2139. int i, len = 0;
  2140. int rc = -EINVAL;
  2141. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2142. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2143. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2144. pr_err("invalid topology list for the panel, rc = %d\n", rc);
  2145. return rc;
  2146. }
  2147. top_count = len / TOPOLOGY_SET_LEN;
  2148. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2149. if (!array)
  2150. return -ENOMEM;
  2151. rc = utils->read_u32_array(utils->data,
  2152. "qcom,display-topology", array, len);
  2153. if (rc) {
  2154. pr_err("unable to read the display topologies, rc = %d\n", rc);
  2155. goto read_fail;
  2156. }
  2157. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2158. if (!topology) {
  2159. rc = -ENOMEM;
  2160. goto read_fail;
  2161. }
  2162. for (i = 0; i < top_count; i++) {
  2163. struct msm_display_topology *top = &topology[i];
  2164. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2165. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2166. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2167. }
  2168. if (topology_override >= 0 && topology_override < top_count) {
  2169. pr_info("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2170. topology_override,
  2171. topology[topology_override].num_lm,
  2172. topology[topology_override].num_enc,
  2173. topology[topology_override].num_intf);
  2174. top_sel = topology_override;
  2175. goto parse_done;
  2176. }
  2177. rc = utils->read_u32(utils->data,
  2178. "qcom,default-topology-index", &top_sel);
  2179. if (rc) {
  2180. pr_err("no default topology selected, rc = %d\n", rc);
  2181. goto parse_fail;
  2182. }
  2183. if (top_sel >= top_count) {
  2184. rc = -EINVAL;
  2185. pr_err("default topology is specified is not valid, rc = %d\n",
  2186. rc);
  2187. goto parse_fail;
  2188. }
  2189. pr_info("default topology: lm: %d comp_enc:%d intf: %d\n",
  2190. topology[top_sel].num_lm,
  2191. topology[top_sel].num_enc,
  2192. topology[top_sel].num_intf);
  2193. parse_done:
  2194. memcpy(&priv_info->topology, &topology[top_sel],
  2195. sizeof(struct msm_display_topology));
  2196. parse_fail:
  2197. kfree(topology);
  2198. read_fail:
  2199. kfree(array);
  2200. return rc;
  2201. }
  2202. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2203. struct msm_roi_alignment *align)
  2204. {
  2205. int len = 0, rc = 0;
  2206. u32 value[6];
  2207. struct property *data;
  2208. if (!align)
  2209. return -EINVAL;
  2210. memset(align, 0, sizeof(*align));
  2211. data = utils->find_property(utils->data,
  2212. "qcom,panel-roi-alignment", &len);
  2213. len /= sizeof(u32);
  2214. if (!data) {
  2215. pr_err("panel roi alignment not found\n");
  2216. rc = -EINVAL;
  2217. } else if (len != 6) {
  2218. pr_err("incorrect roi alignment len %d\n", len);
  2219. rc = -EINVAL;
  2220. } else {
  2221. rc = utils->read_u32_array(utils->data,
  2222. "qcom,panel-roi-alignment", value, len);
  2223. if (rc)
  2224. pr_debug("error reading panel roi alignment values\n");
  2225. else {
  2226. align->xstart_pix_align = value[0];
  2227. align->ystart_pix_align = value[1];
  2228. align->width_pix_align = value[2];
  2229. align->height_pix_align = value[3];
  2230. align->min_width = value[4];
  2231. align->min_height = value[5];
  2232. }
  2233. pr_info("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2234. align->xstart_pix_align,
  2235. align->width_pix_align,
  2236. align->ystart_pix_align,
  2237. align->height_pix_align,
  2238. align->min_width,
  2239. align->min_height);
  2240. }
  2241. return rc;
  2242. }
  2243. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2244. struct dsi_parser_utils *utils)
  2245. {
  2246. struct msm_roi_caps *roi_caps = NULL;
  2247. const char *data;
  2248. int rc = 0;
  2249. if (!mode || !mode->priv_info) {
  2250. pr_err("invalid arguments\n");
  2251. return -EINVAL;
  2252. }
  2253. roi_caps = &mode->priv_info->roi_caps;
  2254. memset(roi_caps, 0, sizeof(*roi_caps));
  2255. data = utils->get_property(utils->data,
  2256. "qcom,partial-update-enabled", NULL);
  2257. if (data) {
  2258. if (!strcmp(data, "dual_roi"))
  2259. roi_caps->num_roi = 2;
  2260. else if (!strcmp(data, "single_roi"))
  2261. roi_caps->num_roi = 1;
  2262. else {
  2263. pr_info(
  2264. "invalid value for qcom,partial-update-enabled: %s\n",
  2265. data);
  2266. return 0;
  2267. }
  2268. } else {
  2269. pr_info("partial update disabled as the property is not set\n");
  2270. return 0;
  2271. }
  2272. roi_caps->merge_rois = utils->read_bool(utils->data,
  2273. "qcom,partial-update-roi-merge");
  2274. roi_caps->enabled = roi_caps->num_roi > 0;
  2275. pr_info("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2276. roi_caps->enabled);
  2277. if (roi_caps->enabled)
  2278. rc = dsi_panel_parse_roi_alignment(utils,
  2279. &roi_caps->align);
  2280. if (rc)
  2281. memset(roi_caps, 0, sizeof(*roi_caps));
  2282. return rc;
  2283. }
  2284. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2285. struct dsi_parser_utils *utils)
  2286. {
  2287. bool vid_mode_support, cmd_mode_support;
  2288. if (!mode || !mode->priv_info) {
  2289. pr_err("invalid arguments\n");
  2290. return -EINVAL;
  2291. }
  2292. vid_mode_support = utils->read_bool(utils->data,
  2293. "qcom,mdss-dsi-video-mode");
  2294. cmd_mode_support = utils->read_bool(utils->data,
  2295. "qcom,mdss-dsi-cmd-mode");
  2296. if (cmd_mode_support)
  2297. mode->panel_mode = DSI_OP_CMD_MODE;
  2298. else if (vid_mode_support)
  2299. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2300. else
  2301. return -EINVAL;
  2302. return 0;
  2303. };
  2304. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2305. {
  2306. int dms_enabled;
  2307. const char *data;
  2308. struct dsi_parser_utils *utils = &panel->utils;
  2309. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2310. dms_enabled = utils->read_bool(utils->data,
  2311. "qcom,dynamic-mode-switch-enabled");
  2312. if (!dms_enabled)
  2313. return 0;
  2314. data = utils->get_property(utils->data,
  2315. "qcom,dynamic-mode-switch-type", NULL);
  2316. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2317. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2318. } else {
  2319. pr_err("[%s] unsupported dynamic switch mode: %s\n",
  2320. panel->name, data);
  2321. return -EINVAL;
  2322. }
  2323. return 0;
  2324. };
  2325. /*
  2326. * The length of all the valid values to be checked should not be greater
  2327. * than the length of returned data from read command.
  2328. */
  2329. static bool
  2330. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2331. {
  2332. int i;
  2333. struct drm_panel_esd_config *config = &panel->esd_config;
  2334. for (i = 0; i < count; ++i) {
  2335. if (config->status_valid_params[i] >
  2336. config->status_cmds_rlen[i]) {
  2337. pr_debug("ignore valid params\n");
  2338. return false;
  2339. }
  2340. }
  2341. return true;
  2342. }
  2343. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2344. char *prop_key, u32 **target, u32 cmd_cnt)
  2345. {
  2346. int tmp;
  2347. if (!utils->find_property(utils->data, prop_key, &tmp))
  2348. return false;
  2349. tmp /= sizeof(u32);
  2350. if (tmp != cmd_cnt) {
  2351. pr_err("request property(%d) do not match cmd count(%d)\n",
  2352. tmp, cmd_cnt);
  2353. return false;
  2354. }
  2355. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2356. if (IS_ERR_OR_NULL(*target)) {
  2357. pr_err("Error allocating memory for property\n");
  2358. return false;
  2359. }
  2360. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2361. pr_err("cannot get values from dts\n");
  2362. kfree(*target);
  2363. *target = NULL;
  2364. return false;
  2365. }
  2366. return true;
  2367. }
  2368. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2369. {
  2370. kfree(esd_config->status_buf);
  2371. kfree(esd_config->return_buf);
  2372. kfree(esd_config->status_value);
  2373. kfree(esd_config->status_valid_params);
  2374. kfree(esd_config->status_cmds_rlen);
  2375. kfree(esd_config->status_cmd.cmds);
  2376. }
  2377. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2378. {
  2379. struct drm_panel_esd_config *esd_config;
  2380. int rc = 0;
  2381. u32 tmp;
  2382. u32 i, status_len, *lenp;
  2383. struct property *data;
  2384. struct dsi_parser_utils *utils = &panel->utils;
  2385. if (!panel) {
  2386. pr_err("Invalid Params\n");
  2387. return -EINVAL;
  2388. }
  2389. esd_config = &panel->esd_config;
  2390. if (!esd_config)
  2391. return -EINVAL;
  2392. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2393. DSI_CMD_SET_PANEL_STATUS, utils);
  2394. if (!esd_config->status_cmd.count) {
  2395. pr_err("panel status command parsing failed\n");
  2396. rc = -EINVAL;
  2397. goto error;
  2398. }
  2399. if (!dsi_panel_parse_esd_status_len(utils,
  2400. "qcom,mdss-dsi-panel-status-read-length",
  2401. &panel->esd_config.status_cmds_rlen,
  2402. esd_config->status_cmd.count)) {
  2403. pr_err("Invalid status read length\n");
  2404. rc = -EINVAL;
  2405. goto error1;
  2406. }
  2407. if (dsi_panel_parse_esd_status_len(utils,
  2408. "qcom,mdss-dsi-panel-status-valid-params",
  2409. &panel->esd_config.status_valid_params,
  2410. esd_config->status_cmd.count)) {
  2411. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2412. esd_config->status_cmd.count)) {
  2413. rc = -EINVAL;
  2414. goto error2;
  2415. }
  2416. }
  2417. status_len = 0;
  2418. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2419. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2420. status_len += lenp[i];
  2421. if (!status_len) {
  2422. rc = -EINVAL;
  2423. goto error2;
  2424. }
  2425. /*
  2426. * Some panel may need multiple read commands to properly
  2427. * check panel status. Do a sanity check for proper status
  2428. * value which will be compared with the value read by dsi
  2429. * controller during ESD check. Also check if multiple read
  2430. * commands are there then, there should be corresponding
  2431. * status check values for each read command.
  2432. */
  2433. data = utils->find_property(utils->data,
  2434. "qcom,mdss-dsi-panel-status-value", &tmp);
  2435. tmp /= sizeof(u32);
  2436. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2437. esd_config->groups = tmp / status_len;
  2438. } else {
  2439. pr_err("error parse panel-status-value\n");
  2440. rc = -EINVAL;
  2441. goto error2;
  2442. }
  2443. esd_config->status_value =
  2444. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2445. GFP_KERNEL);
  2446. if (!esd_config->status_value) {
  2447. rc = -ENOMEM;
  2448. goto error2;
  2449. }
  2450. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2451. sizeof(unsigned char), GFP_KERNEL);
  2452. if (!esd_config->return_buf) {
  2453. rc = -ENOMEM;
  2454. goto error3;
  2455. }
  2456. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2457. if (!esd_config->status_buf) {
  2458. rc = -ENOMEM;
  2459. goto error4;
  2460. }
  2461. rc = utils->read_u32_array(utils->data,
  2462. "qcom,mdss-dsi-panel-status-value",
  2463. esd_config->status_value, esd_config->groups * status_len);
  2464. if (rc) {
  2465. pr_debug("error reading panel status values\n");
  2466. memset(esd_config->status_value, 0,
  2467. esd_config->groups * status_len);
  2468. }
  2469. return 0;
  2470. error4:
  2471. kfree(esd_config->return_buf);
  2472. error3:
  2473. kfree(esd_config->status_value);
  2474. error2:
  2475. kfree(esd_config->status_valid_params);
  2476. kfree(esd_config->status_cmds_rlen);
  2477. error1:
  2478. kfree(esd_config->status_cmd.cmds);
  2479. error:
  2480. return rc;
  2481. }
  2482. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2483. {
  2484. int rc = 0;
  2485. const char *string;
  2486. struct drm_panel_esd_config *esd_config;
  2487. struct dsi_parser_utils *utils = &panel->utils;
  2488. u8 *esd_mode = NULL;
  2489. esd_config = &panel->esd_config;
  2490. esd_config->status_mode = ESD_MODE_MAX;
  2491. esd_config->esd_enabled = utils->read_bool(utils->data,
  2492. "qcom,esd-check-enabled");
  2493. if (!esd_config->esd_enabled)
  2494. return 0;
  2495. rc = utils->read_string(utils->data,
  2496. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2497. if (!rc) {
  2498. if (!strcmp(string, "bta_check")) {
  2499. esd_config->status_mode = ESD_MODE_SW_BTA;
  2500. } else if (!strcmp(string, "reg_read")) {
  2501. esd_config->status_mode = ESD_MODE_REG_READ;
  2502. } else if (!strcmp(string, "te_signal_check")) {
  2503. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2504. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2505. } else {
  2506. pr_err("TE-ESD not valid for video mode\n");
  2507. rc = -EINVAL;
  2508. goto error;
  2509. }
  2510. } else {
  2511. pr_err("No valid panel-status-check-mode string\n");
  2512. rc = -EINVAL;
  2513. goto error;
  2514. }
  2515. } else {
  2516. pr_debug("status check method not defined!\n");
  2517. rc = -EINVAL;
  2518. goto error;
  2519. }
  2520. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2521. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2522. if (rc) {
  2523. pr_err("failed to parse esd reg read mode params, rc=%d\n",
  2524. rc);
  2525. goto error;
  2526. }
  2527. esd_mode = "register_read";
  2528. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2529. esd_mode = "bta_trigger";
  2530. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2531. esd_mode = "te_check";
  2532. }
  2533. pr_info("ESD enabled with mode: %s\n", esd_mode);
  2534. return 0;
  2535. error:
  2536. panel->esd_config.esd_enabled = false;
  2537. return rc;
  2538. }
  2539. static void dsi_panel_update_util(struct dsi_panel *panel,
  2540. struct device_node *parser_node)
  2541. {
  2542. struct dsi_parser_utils *utils = &panel->utils;
  2543. if (parser_node) {
  2544. *utils = *dsi_parser_get_parser_utils();
  2545. utils->data = parser_node;
  2546. pr_debug("switching to parser APIs\n");
  2547. goto end;
  2548. }
  2549. *utils = *dsi_parser_get_of_utils();
  2550. utils->data = panel->panel_of_node;
  2551. end:
  2552. utils->node = panel->panel_of_node;
  2553. }
  2554. struct dsi_panel *dsi_panel_get(struct device *parent,
  2555. struct device_node *of_node,
  2556. struct device_node *parser_node,
  2557. const char *type,
  2558. int topology_override)
  2559. {
  2560. struct dsi_panel *panel;
  2561. struct dsi_parser_utils *utils;
  2562. int rc = 0;
  2563. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2564. if (!panel)
  2565. return ERR_PTR(-ENOMEM);
  2566. panel->panel_of_node = of_node;
  2567. panel->parent = parent;
  2568. panel->type = type;
  2569. dsi_panel_update_util(panel, parser_node);
  2570. utils = &panel->utils;
  2571. panel->name = utils->get_property(utils->data,
  2572. "qcom,mdss-dsi-panel-name", NULL);
  2573. if (!panel->name)
  2574. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2575. rc = dsi_panel_parse_host_config(panel);
  2576. if (rc) {
  2577. pr_err("failed to parse host configuration, rc=%d\n", rc);
  2578. goto error;
  2579. }
  2580. rc = dsi_panel_parse_panel_mode(panel);
  2581. if (rc) {
  2582. pr_err("failed to parse panel mode configuration, rc=%d\n", rc);
  2583. goto error;
  2584. }
  2585. rc = dsi_panel_parse_dfps_caps(panel);
  2586. if (rc)
  2587. pr_err("failed to parse dfps configuration, rc=%d\n", rc);
  2588. if (!(panel->dfps_caps.dfps_support)) {
  2589. /* qsync and dfps are mutually exclusive features */
  2590. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2591. if (rc)
  2592. pr_err("failed to parse qsync features, rc=%d\n", rc);
  2593. }
  2594. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2595. if (rc)
  2596. pr_err("failed to parse dynamic clk config, rc=%d\n", rc);
  2597. rc = dsi_panel_parse_phy_props(panel);
  2598. if (rc) {
  2599. pr_err("failed to parse panel physical dimension, rc=%d\n", rc);
  2600. goto error;
  2601. }
  2602. rc = dsi_panel_parse_gpios(panel);
  2603. if (rc) {
  2604. pr_err("failed to parse panel gpios, rc=%d\n", rc);
  2605. goto error;
  2606. }
  2607. rc = dsi_panel_parse_power_cfg(panel);
  2608. if (rc)
  2609. pr_err("failed to parse power config, rc=%d\n", rc);
  2610. rc = dsi_panel_parse_bl_config(panel);
  2611. if (rc)
  2612. pr_err("failed to parse backlight config, rc=%d\n", rc);
  2613. rc = dsi_panel_parse_misc_features(panel);
  2614. if (rc)
  2615. pr_err("failed to parse misc features, rc=%d\n", rc);
  2616. rc = dsi_panel_parse_hdr_config(panel);
  2617. if (rc)
  2618. pr_err("failed to parse hdr config, rc=%d\n", rc);
  2619. rc = dsi_panel_get_mode_count(panel);
  2620. if (rc) {
  2621. pr_err("failed to get mode count, rc=%d\n", rc);
  2622. goto error;
  2623. }
  2624. rc = dsi_panel_parse_dms_info(panel);
  2625. if (rc)
  2626. pr_debug("failed to get dms info, rc=%d\n", rc);
  2627. rc = dsi_panel_parse_esd_config(panel);
  2628. if (rc)
  2629. pr_debug("failed to parse esd config, rc=%d\n", rc);
  2630. drm_panel_init(&panel->drm_panel);
  2631. mutex_init(&panel->panel_lock);
  2632. return panel;
  2633. error:
  2634. kfree(panel);
  2635. return ERR_PTR(rc);
  2636. }
  2637. void dsi_panel_put(struct dsi_panel *panel)
  2638. {
  2639. /* free resources allocated for ESD check */
  2640. dsi_panel_esd_config_deinit(&panel->esd_config);
  2641. kfree(panel);
  2642. }
  2643. int dsi_panel_drv_init(struct dsi_panel *panel,
  2644. struct mipi_dsi_host *host)
  2645. {
  2646. int rc = 0;
  2647. struct mipi_dsi_device *dev;
  2648. if (!panel || !host) {
  2649. pr_err("invalid params\n");
  2650. return -EINVAL;
  2651. }
  2652. mutex_lock(&panel->panel_lock);
  2653. dev = &panel->mipi_device;
  2654. dev->host = host;
  2655. /*
  2656. * We dont have device structure since panel is not a device node.
  2657. * When using drm panel framework, the device is probed when the host is
  2658. * create.
  2659. */
  2660. dev->channel = 0;
  2661. dev->lanes = 4;
  2662. panel->host = host;
  2663. rc = dsi_panel_vreg_get(panel);
  2664. if (rc) {
  2665. pr_err("[%s] failed to get panel regulators, rc=%d\n",
  2666. panel->name, rc);
  2667. goto exit;
  2668. }
  2669. rc = dsi_panel_pinctrl_init(panel);
  2670. if (rc) {
  2671. pr_err("[%s] failed to init pinctrl, rc=%d\n", panel->name, rc);
  2672. goto error_vreg_put;
  2673. }
  2674. rc = dsi_panel_gpio_request(panel);
  2675. if (rc) {
  2676. pr_err("[%s] failed to request gpios, rc=%d\n", panel->name,
  2677. rc);
  2678. goto error_pinctrl_deinit;
  2679. }
  2680. rc = dsi_panel_bl_register(panel);
  2681. if (rc) {
  2682. if (rc != -EPROBE_DEFER)
  2683. pr_err("[%s] failed to register backlight, rc=%d\n",
  2684. panel->name, rc);
  2685. goto error_gpio_release;
  2686. }
  2687. goto exit;
  2688. error_gpio_release:
  2689. (void)dsi_panel_gpio_release(panel);
  2690. error_pinctrl_deinit:
  2691. (void)dsi_panel_pinctrl_deinit(panel);
  2692. error_vreg_put:
  2693. (void)dsi_panel_vreg_put(panel);
  2694. exit:
  2695. mutex_unlock(&panel->panel_lock);
  2696. return rc;
  2697. }
  2698. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2699. {
  2700. int rc = 0;
  2701. if (!panel) {
  2702. pr_err("invalid params\n");
  2703. return -EINVAL;
  2704. }
  2705. mutex_lock(&panel->panel_lock);
  2706. rc = dsi_panel_bl_unregister(panel);
  2707. if (rc)
  2708. pr_err("[%s] failed to unregister backlight, rc=%d\n",
  2709. panel->name, rc);
  2710. rc = dsi_panel_gpio_release(panel);
  2711. if (rc)
  2712. pr_err("[%s] failed to release gpios, rc=%d\n", panel->name,
  2713. rc);
  2714. rc = dsi_panel_pinctrl_deinit(panel);
  2715. if (rc)
  2716. pr_err("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2717. rc);
  2718. rc = dsi_panel_vreg_put(panel);
  2719. if (rc)
  2720. pr_err("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2721. panel->host = NULL;
  2722. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2723. mutex_unlock(&panel->panel_lock);
  2724. return rc;
  2725. }
  2726. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2727. struct dsi_display_mode *mode)
  2728. {
  2729. return 0;
  2730. }
  2731. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2732. {
  2733. const u32 SINGLE_MODE_SUPPORT = 1;
  2734. struct dsi_parser_utils *utils;
  2735. struct device_node *timings_np;
  2736. int count, rc = 0;
  2737. if (!panel) {
  2738. pr_err("invalid params\n");
  2739. return -EINVAL;
  2740. }
  2741. utils = &panel->utils;
  2742. panel->num_timing_nodes = 0;
  2743. timings_np = utils->get_child_by_name(utils->data,
  2744. "qcom,mdss-dsi-display-timings");
  2745. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2746. pr_err("no display timing nodes defined\n");
  2747. rc = -EINVAL;
  2748. goto error;
  2749. }
  2750. count = utils->get_child_count(timings_np);
  2751. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2752. count > DSI_MODE_MAX) {
  2753. pr_err("invalid count of timing nodes: %d\n", count);
  2754. rc = -EINVAL;
  2755. goto error;
  2756. }
  2757. /* No multiresolution support is available for video mode panels */
  2758. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2759. !panel->host_config.ext_bridge_mode)
  2760. count = SINGLE_MODE_SUPPORT;
  2761. panel->num_timing_nodes = count;
  2762. error:
  2763. return rc;
  2764. }
  2765. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2766. struct dsi_panel_phy_props *phy_props)
  2767. {
  2768. int rc = 0;
  2769. if (!panel || !phy_props) {
  2770. pr_err("invalid params\n");
  2771. return -EINVAL;
  2772. }
  2773. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2774. return rc;
  2775. }
  2776. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2777. struct dsi_dfps_capabilities *dfps_caps)
  2778. {
  2779. int rc = 0;
  2780. if (!panel || !dfps_caps) {
  2781. pr_err("invalid params\n");
  2782. return -EINVAL;
  2783. }
  2784. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2785. return rc;
  2786. }
  2787. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2788. {
  2789. int i;
  2790. if (!mode->priv_info)
  2791. return;
  2792. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2793. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2794. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2795. }
  2796. kfree(mode->priv_info);
  2797. }
  2798. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2799. struct dsi_mode_info *timing)
  2800. {
  2801. u32 frame_time_us,nslices;
  2802. u64 min_bitclk, total_active_pixels, bits_per_line;
  2803. struct msm_display_dsc_info *dsc = timing->dsc;
  2804. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  2805. * + 1 byte dcs data command.
  2806. */
  2807. const u32 packet_overhead = 56;
  2808. /* Default time between pingpong done to TE in microsecs */
  2809. const u32 max_tx_threshold_time = 2166;
  2810. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  2811. if (timing->dsc_enabled) {
  2812. nslices = (timing->h_active)/(dsc->slice_width);
  2813. /* (slice width x bit-per-pixel + packet overhead) x
  2814. * number of slices x height x fps / lane
  2815. */
  2816. bits_per_line = ((dsc->slice_width * dsc->bpp) +
  2817. packet_overhead) * nslices;
  2818. bits_per_line = bits_per_line / (config->num_data_lanes);
  2819. min_bitclk = (bits_per_line * timing->v_active *
  2820. timing->refresh_rate);
  2821. } else {
  2822. total_active_pixels = ((DSI_H_ACTIVE_DSC(timing)
  2823. * timing->v_active));
  2824. /* calculate the actual bitclk needed to transfer the frame */
  2825. min_bitclk = (total_active_pixels * (timing->refresh_rate) *
  2826. (config->bpp)) / (config->num_data_lanes);
  2827. }
  2828. timing->min_dsi_clk_hz = min_bitclk;
  2829. if (timing->clk_rate_hz) {
  2830. /* adjust the transfer time proportionately for bit clk*/
  2831. timing->dsi_transfer_time_us = mult_frac(frame_time_us,
  2832. min_bitclk, timing->clk_rate_hz);
  2833. } else {
  2834. timing->dsi_transfer_time_us = frame_time_us -
  2835. max_tx_threshold_time;
  2836. }
  2837. }
  2838. int dsi_panel_get_mode(struct dsi_panel *panel,
  2839. u32 index, struct dsi_display_mode *mode,
  2840. int topology_override)
  2841. {
  2842. struct device_node *timings_np, *child_np;
  2843. struct dsi_parser_utils *utils;
  2844. struct dsi_display_mode_priv_info *prv_info;
  2845. u32 child_idx = 0;
  2846. int rc = 0, num_timings;
  2847. void *utils_data = NULL;
  2848. if (!panel || !mode) {
  2849. pr_err("invalid params\n");
  2850. return -EINVAL;
  2851. }
  2852. mutex_lock(&panel->panel_lock);
  2853. utils = &panel->utils;
  2854. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  2855. if (!mode->priv_info) {
  2856. rc = -ENOMEM;
  2857. goto done;
  2858. }
  2859. prv_info = mode->priv_info;
  2860. timings_np = utils->get_child_by_name(utils->data,
  2861. "qcom,mdss-dsi-display-timings");
  2862. if (!timings_np) {
  2863. pr_err("no display timing nodes defined\n");
  2864. rc = -EINVAL;
  2865. goto parse_fail;
  2866. }
  2867. num_timings = utils->get_child_count(timings_np);
  2868. if (!num_timings || num_timings > DSI_MODE_MAX) {
  2869. pr_err("invalid count of timing nodes: %d\n", num_timings);
  2870. rc = -EINVAL;
  2871. goto parse_fail;
  2872. }
  2873. utils_data = utils->data;
  2874. dsi_for_each_child_node(timings_np, child_np) {
  2875. if (index != child_idx++)
  2876. continue;
  2877. utils->data = child_np;
  2878. rc = dsi_panel_parse_timing(&mode->timing, utils);
  2879. if (rc) {
  2880. pr_err("failed to parse panel timing, rc=%d\n", rc);
  2881. goto parse_fail;
  2882. }
  2883. rc = dsi_panel_parse_dsc_params(mode, utils);
  2884. if (rc) {
  2885. pr_err("failed to parse dsc params, rc=%d\n", rc);
  2886. goto parse_fail;
  2887. }
  2888. rc = dsi_panel_parse_topology(prv_info, utils,
  2889. topology_override);
  2890. if (rc) {
  2891. pr_err("failed to parse panel topology, rc=%d\n", rc);
  2892. goto parse_fail;
  2893. }
  2894. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  2895. if (rc) {
  2896. pr_err("failed to parse command sets, rc=%d\n", rc);
  2897. goto parse_fail;
  2898. }
  2899. rc = dsi_panel_parse_jitter_config(mode, utils);
  2900. if (rc)
  2901. pr_err(
  2902. "failed to parse panel jitter config, rc=%d\n", rc);
  2903. rc = dsi_panel_parse_phy_timing(mode, utils);
  2904. if (rc) {
  2905. pr_err(
  2906. "failed to parse panel phy timings, rc=%d\n", rc);
  2907. goto parse_fail;
  2908. }
  2909. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  2910. if (rc)
  2911. pr_err("failed to partial update caps, rc=%d\n", rc);
  2912. if (panel->panel_mode_switch_enabled) {
  2913. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  2914. if (rc) {
  2915. pr_err("PMS: failed to parse panel mode\n");
  2916. rc = 0;
  2917. mode->panel_mode = panel->panel_mode;
  2918. }
  2919. } else {
  2920. mode->panel_mode = panel->panel_mode;
  2921. }
  2922. }
  2923. goto done;
  2924. parse_fail:
  2925. kfree(mode->priv_info);
  2926. mode->priv_info = NULL;
  2927. done:
  2928. utils->data = utils_data;
  2929. mutex_unlock(&panel->panel_lock);
  2930. return rc;
  2931. }
  2932. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  2933. struct dsi_display_mode *mode,
  2934. struct dsi_host_config *config)
  2935. {
  2936. int rc = 0;
  2937. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  2938. if (!panel || !mode || !config) {
  2939. pr_err("invalid params\n");
  2940. return -EINVAL;
  2941. }
  2942. mutex_lock(&panel->panel_lock);
  2943. config->panel_mode = panel->panel_mode;
  2944. memcpy(&config->common_config, &panel->host_config,
  2945. sizeof(config->common_config));
  2946. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  2947. memcpy(&config->u.video_engine, &panel->video_config,
  2948. sizeof(config->u.video_engine));
  2949. } else {
  2950. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  2951. sizeof(config->u.cmd_engine));
  2952. }
  2953. memcpy(&config->video_timing, &mode->timing,
  2954. sizeof(config->video_timing));
  2955. config->video_timing.mdp_transfer_time_us =
  2956. mode->priv_info->mdp_transfer_time_us;
  2957. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  2958. config->video_timing.dsc = &mode->priv_info->dsc;
  2959. if (dyn_clk_caps->dyn_clk_support)
  2960. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  2961. else
  2962. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  2963. config->esc_clk_rate_hz = 19200000;
  2964. mutex_unlock(&panel->panel_lock);
  2965. return rc;
  2966. }
  2967. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  2968. {
  2969. int rc = 0;
  2970. if (!panel) {
  2971. pr_err("invalid params\n");
  2972. return -EINVAL;
  2973. }
  2974. mutex_lock(&panel->panel_lock);
  2975. /* If LP11_INIT is set, panel will be powered up during prepare() */
  2976. if (panel->lp11_init)
  2977. goto error;
  2978. rc = dsi_panel_power_on(panel);
  2979. if (rc) {
  2980. pr_err("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  2981. goto error;
  2982. }
  2983. error:
  2984. mutex_unlock(&panel->panel_lock);
  2985. return rc;
  2986. }
  2987. int dsi_panel_update_pps(struct dsi_panel *panel)
  2988. {
  2989. int rc = 0;
  2990. struct dsi_panel_cmd_set *set = NULL;
  2991. struct dsi_display_mode_priv_info *priv_info = NULL;
  2992. if (!panel || !panel->cur_mode) {
  2993. pr_err("invalid params\n");
  2994. return -EINVAL;
  2995. }
  2996. mutex_lock(&panel->panel_lock);
  2997. priv_info = panel->cur_mode->priv_info;
  2998. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  2999. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc, panel->dsc_pps_cmd, 0);
  3000. rc = dsi_panel_create_cmd_packets(panel->dsc_pps_cmd,
  3001. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3002. if (rc) {
  3003. pr_err("failed to create cmd packets, rc=%d\n", rc);
  3004. goto error;
  3005. }
  3006. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3007. if (rc) {
  3008. pr_err("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3009. panel->name, rc);
  3010. }
  3011. dsi_panel_destroy_cmd_packets(set);
  3012. error:
  3013. mutex_unlock(&panel->panel_lock);
  3014. return rc;
  3015. }
  3016. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3017. {
  3018. int rc = 0;
  3019. if (!panel) {
  3020. pr_err("invalid params\n");
  3021. return -EINVAL;
  3022. }
  3023. mutex_lock(&panel->panel_lock);
  3024. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3025. if (rc)
  3026. pr_err("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3027. panel->name, rc);
  3028. mutex_unlock(&panel->panel_lock);
  3029. return rc;
  3030. }
  3031. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3032. {
  3033. int rc = 0;
  3034. if (!panel) {
  3035. pr_err("invalid params\n");
  3036. return -EINVAL;
  3037. }
  3038. mutex_lock(&panel->panel_lock);
  3039. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3040. if (rc)
  3041. pr_err("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3042. panel->name, rc);
  3043. mutex_unlock(&panel->panel_lock);
  3044. return rc;
  3045. }
  3046. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3047. {
  3048. int rc = 0;
  3049. if (!panel) {
  3050. pr_err("invalid params\n");
  3051. return -EINVAL;
  3052. }
  3053. mutex_lock(&panel->panel_lock);
  3054. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3055. if (rc)
  3056. pr_err("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3057. panel->name, rc);
  3058. mutex_unlock(&panel->panel_lock);
  3059. return rc;
  3060. }
  3061. int dsi_panel_prepare(struct dsi_panel *panel)
  3062. {
  3063. int rc = 0;
  3064. if (!panel) {
  3065. pr_err("invalid params\n");
  3066. return -EINVAL;
  3067. }
  3068. mutex_lock(&panel->panel_lock);
  3069. if (panel->lp11_init) {
  3070. rc = dsi_panel_power_on(panel);
  3071. if (rc) {
  3072. pr_err("[%s] panel power on failed, rc=%d\n",
  3073. panel->name, rc);
  3074. goto error;
  3075. }
  3076. }
  3077. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3078. if (rc) {
  3079. pr_err("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3080. panel->name, rc);
  3081. goto error;
  3082. }
  3083. error:
  3084. mutex_unlock(&panel->panel_lock);
  3085. return rc;
  3086. }
  3087. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3088. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3089. {
  3090. static const int ROI_CMD_LEN = 5;
  3091. int rc = 0;
  3092. /* DTYPE_DCS_LWRITE */
  3093. static char *caset, *paset;
  3094. set->cmds = NULL;
  3095. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3096. if (!caset) {
  3097. rc = -ENOMEM;
  3098. goto exit;
  3099. }
  3100. caset[0] = 0x2a;
  3101. caset[1] = (roi->x & 0xFF00) >> 8;
  3102. caset[2] = roi->x & 0xFF;
  3103. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3104. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3105. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3106. if (!paset) {
  3107. rc = -ENOMEM;
  3108. goto error_free_mem;
  3109. }
  3110. paset[0] = 0x2b;
  3111. paset[1] = (roi->y & 0xFF00) >> 8;
  3112. paset[2] = roi->y & 0xFF;
  3113. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3114. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3115. set->type = DSI_CMD_SET_ROI;
  3116. set->state = DSI_CMD_SET_STATE_LP;
  3117. set->count = 2; /* send caset + paset together */
  3118. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3119. if (!set->cmds) {
  3120. rc = -ENOMEM;
  3121. goto error_free_mem;
  3122. }
  3123. set->cmds[0].msg.channel = 0;
  3124. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3125. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3126. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3127. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3128. set->cmds[0].msg.tx_buf = caset;
  3129. set->cmds[0].msg.rx_len = 0;
  3130. set->cmds[0].msg.rx_buf = 0;
  3131. set->cmds[0].msg.wait_ms = 0;
  3132. set->cmds[0].last_command = 0;
  3133. set->cmds[0].post_wait_ms = 0;
  3134. set->cmds[1].msg.channel = 0;
  3135. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3136. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3137. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3138. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3139. set->cmds[1].msg.tx_buf = paset;
  3140. set->cmds[1].msg.rx_len = 0;
  3141. set->cmds[1].msg.rx_buf = 0;
  3142. set->cmds[1].msg.wait_ms = 0;
  3143. set->cmds[1].last_command = 1;
  3144. set->cmds[1].post_wait_ms = 0;
  3145. goto exit;
  3146. error_free_mem:
  3147. kfree(caset);
  3148. kfree(paset);
  3149. kfree(set->cmds);
  3150. exit:
  3151. return rc;
  3152. }
  3153. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3154. int ctrl_idx)
  3155. {
  3156. int rc = 0;
  3157. if (!panel) {
  3158. pr_err("invalid params\n");
  3159. return -EINVAL;
  3160. }
  3161. mutex_lock(&panel->panel_lock);
  3162. pr_debug("ctrl:%d qsync on\n", ctrl_idx);
  3163. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3164. if (rc)
  3165. pr_err("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3166. panel->name, rc);
  3167. mutex_unlock(&panel->panel_lock);
  3168. return rc;
  3169. }
  3170. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3171. int ctrl_idx)
  3172. {
  3173. int rc = 0;
  3174. if (!panel) {
  3175. pr_err("invalid params\n");
  3176. return -EINVAL;
  3177. }
  3178. mutex_lock(&panel->panel_lock);
  3179. pr_debug("ctrl:%d qsync off\n", ctrl_idx);
  3180. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3181. if (rc)
  3182. pr_err("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3183. panel->name, rc);
  3184. mutex_unlock(&panel->panel_lock);
  3185. return rc;
  3186. }
  3187. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3188. struct dsi_rect *roi)
  3189. {
  3190. int rc = 0;
  3191. struct dsi_panel_cmd_set *set;
  3192. struct dsi_display_mode_priv_info *priv_info;
  3193. if (!panel || !panel->cur_mode) {
  3194. pr_err("Invalid params\n");
  3195. return -EINVAL;
  3196. }
  3197. priv_info = panel->cur_mode->priv_info;
  3198. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3199. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3200. if (rc) {
  3201. pr_err("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3202. panel->name, rc);
  3203. return rc;
  3204. }
  3205. pr_debug("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3206. roi->x, roi->y, roi->w, roi->h);
  3207. mutex_lock(&panel->panel_lock);
  3208. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3209. if (rc)
  3210. pr_err("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3211. panel->name, rc);
  3212. mutex_unlock(&panel->panel_lock);
  3213. dsi_panel_destroy_cmd_packets(set);
  3214. return rc;
  3215. }
  3216. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3217. {
  3218. int rc = 0;
  3219. if (!panel) {
  3220. pr_err("Invalid params\n");
  3221. return -EINVAL;
  3222. }
  3223. mutex_lock(&panel->panel_lock);
  3224. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3225. if (rc)
  3226. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3227. panel->name, rc);
  3228. mutex_unlock(&panel->panel_lock);
  3229. return rc;
  3230. }
  3231. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3232. {
  3233. int rc = 0;
  3234. if (!panel) {
  3235. pr_err("Invalid params\n");
  3236. return -EINVAL;
  3237. }
  3238. mutex_lock(&panel->panel_lock);
  3239. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3240. if (rc)
  3241. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3242. panel->name, rc);
  3243. mutex_unlock(&panel->panel_lock);
  3244. return rc;
  3245. }
  3246. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3247. {
  3248. int rc = 0;
  3249. if (!panel) {
  3250. pr_err("Invalid params\n");
  3251. return -EINVAL;
  3252. }
  3253. mutex_lock(&panel->panel_lock);
  3254. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3255. if (rc)
  3256. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3257. panel->name, rc);
  3258. mutex_unlock(&panel->panel_lock);
  3259. return rc;
  3260. }
  3261. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3262. {
  3263. int rc = 0;
  3264. if (!panel) {
  3265. pr_err("Invalid params\n");
  3266. return -EINVAL;
  3267. }
  3268. mutex_lock(&panel->panel_lock);
  3269. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3270. if (rc)
  3271. pr_err("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3272. panel->name, rc);
  3273. mutex_unlock(&panel->panel_lock);
  3274. return rc;
  3275. }
  3276. int dsi_panel_switch(struct dsi_panel *panel)
  3277. {
  3278. int rc = 0;
  3279. if (!panel) {
  3280. pr_err("Invalid params\n");
  3281. return -EINVAL;
  3282. }
  3283. mutex_lock(&panel->panel_lock);
  3284. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3285. if (rc)
  3286. pr_err("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3287. panel->name, rc);
  3288. mutex_unlock(&panel->panel_lock);
  3289. return rc;
  3290. }
  3291. int dsi_panel_post_switch(struct dsi_panel *panel)
  3292. {
  3293. int rc = 0;
  3294. if (!panel) {
  3295. pr_err("Invalid params\n");
  3296. return -EINVAL;
  3297. }
  3298. mutex_lock(&panel->panel_lock);
  3299. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3300. if (rc)
  3301. pr_err("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3302. panel->name, rc);
  3303. mutex_unlock(&panel->panel_lock);
  3304. return rc;
  3305. }
  3306. int dsi_panel_enable(struct dsi_panel *panel)
  3307. {
  3308. int rc = 0;
  3309. if (!panel) {
  3310. pr_err("Invalid params\n");
  3311. return -EINVAL;
  3312. }
  3313. mutex_lock(&panel->panel_lock);
  3314. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3315. if (rc) {
  3316. pr_err("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3317. panel->name, rc);
  3318. }
  3319. panel->panel_initialized = true;
  3320. mutex_unlock(&panel->panel_lock);
  3321. return rc;
  3322. }
  3323. int dsi_panel_post_enable(struct dsi_panel *panel)
  3324. {
  3325. int rc = 0;
  3326. if (!panel) {
  3327. pr_err("invalid params\n");
  3328. return -EINVAL;
  3329. }
  3330. mutex_lock(&panel->panel_lock);
  3331. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3332. if (rc) {
  3333. pr_err("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3334. panel->name, rc);
  3335. goto error;
  3336. }
  3337. error:
  3338. mutex_unlock(&panel->panel_lock);
  3339. return rc;
  3340. }
  3341. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3342. {
  3343. int rc = 0;
  3344. if (!panel) {
  3345. pr_err("invalid params\n");
  3346. return -EINVAL;
  3347. }
  3348. mutex_lock(&panel->panel_lock);
  3349. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3350. if (rc) {
  3351. pr_err("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3352. panel->name, rc);
  3353. goto error;
  3354. }
  3355. error:
  3356. mutex_unlock(&panel->panel_lock);
  3357. return rc;
  3358. }
  3359. int dsi_panel_disable(struct dsi_panel *panel)
  3360. {
  3361. int rc = 0;
  3362. if (!panel) {
  3363. pr_err("invalid params\n");
  3364. return -EINVAL;
  3365. }
  3366. mutex_lock(&panel->panel_lock);
  3367. /* Avoid sending panel off commands when ESD recovery is underway */
  3368. if (!atomic_read(&panel->esd_recovery_pending)) {
  3369. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3370. if (rc) {
  3371. /*
  3372. * Sending panel off commands may fail when DSI
  3373. * controller is in a bad state. These failures can be
  3374. * ignored since controller will go for full reset on
  3375. * subsequent display enable anyway.
  3376. */
  3377. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3378. panel->name, rc);
  3379. rc = 0;
  3380. }
  3381. }
  3382. panel->panel_initialized = false;
  3383. mutex_unlock(&panel->panel_lock);
  3384. return rc;
  3385. }
  3386. int dsi_panel_unprepare(struct dsi_panel *panel)
  3387. {
  3388. int rc = 0;
  3389. if (!panel) {
  3390. pr_err("invalid params\n");
  3391. return -EINVAL;
  3392. }
  3393. mutex_lock(&panel->panel_lock);
  3394. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3395. if (rc) {
  3396. pr_err("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3397. panel->name, rc);
  3398. goto error;
  3399. }
  3400. error:
  3401. mutex_unlock(&panel->panel_lock);
  3402. return rc;
  3403. }
  3404. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3405. {
  3406. int rc = 0;
  3407. if (!panel) {
  3408. pr_err("invalid params\n");
  3409. return -EINVAL;
  3410. }
  3411. mutex_lock(&panel->panel_lock);
  3412. rc = dsi_panel_power_off(panel);
  3413. if (rc) {
  3414. pr_err("[%s] panel power_Off failed, rc=%d\n",
  3415. panel->name, rc);
  3416. goto error;
  3417. }
  3418. error:
  3419. mutex_unlock(&panel->panel_lock);
  3420. return rc;
  3421. }