qmi.c 98 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  39. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  40. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  41. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  43. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  44. #define DMS_QMI_MAX_MSG_LEN SZ_256
  45. #define MAX_SHADOW_REG_RESERVED 2
  46. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  47. MAX_SHADOW_REG_RESERVED)
  48. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  49. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  50. #ifdef CONFIG_CNSS2_DEBUG
  51. static bool ignore_qmi_failure;
  52. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  53. void cnss_ignore_qmi_failure(bool ignore)
  54. {
  55. ignore_qmi_failure = ignore;
  56. }
  57. #else
  58. #define CNSS_QMI_ASSERT() do { } while (0)
  59. void cnss_ignore_qmi_failure(bool ignore) { }
  60. #endif
  61. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  62. {
  63. switch (mode) {
  64. case CNSS_MISSION:
  65. return "MISSION";
  66. case CNSS_FTM:
  67. return "FTM";
  68. case CNSS_EPPING:
  69. return "EPPING";
  70. case CNSS_WALTEST:
  71. return "WALTEST";
  72. case CNSS_OFF:
  73. return "OFF";
  74. case CNSS_CCPM:
  75. return "CCPM";
  76. case CNSS_QVIT:
  77. return "QVIT";
  78. case CNSS_CALIBRATION:
  79. return "CALIBRATION";
  80. default:
  81. return "UNKNOWN";
  82. }
  83. }
  84. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  85. struct qmi_elem_info *req_ei,
  86. struct qmi_elem_info *rsp_ei,
  87. int req_id, size_t req_len,
  88. unsigned long timeout)
  89. {
  90. struct qmi_txn txn;
  91. int ret;
  92. char *err_msg;
  93. struct qmi_response_type_v01 *resp = rsp;
  94. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  95. if (ret < 0) {
  96. err_msg = "Qmi fail: fail to init txn,";
  97. goto out;
  98. }
  99. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  100. req_len, req_ei, req);
  101. if (ret < 0) {
  102. qmi_txn_cancel(&txn);
  103. err_msg = "Qmi fail: fail to send req,";
  104. goto out;
  105. }
  106. ret = qmi_txn_wait(&txn, timeout);
  107. if (ret < 0) {
  108. err_msg = "Qmi fail: wait timeout,";
  109. goto out;
  110. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  111. err_msg = "Qmi fail: request rejected,";
  112. cnss_pr_err("Qmi fail: respons with error:%d\n",
  113. resp->error);
  114. ret = -resp->result;
  115. goto out;
  116. }
  117. cnss_pr_dbg("req %x success\n", req_id);
  118. return 0;
  119. out:
  120. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  121. return ret;
  122. }
  123. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  124. {
  125. struct wlfw_ind_register_req_msg_v01 *req;
  126. struct wlfw_ind_register_resp_msg_v01 *resp;
  127. struct qmi_txn txn;
  128. int ret = 0;
  129. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  130. plat_priv->driver_state);
  131. req = kzalloc(sizeof(*req), GFP_KERNEL);
  132. if (!req)
  133. return -ENOMEM;
  134. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  135. if (!resp) {
  136. kfree(req);
  137. return -ENOMEM;
  138. }
  139. req->client_id_valid = 1;
  140. req->client_id = WLFW_CLIENT_ID;
  141. req->request_mem_enable_valid = 1;
  142. req->request_mem_enable = 1;
  143. req->fw_mem_ready_enable_valid = 1;
  144. req->fw_mem_ready_enable = 1;
  145. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  146. req->fw_init_done_enable_valid = 1;
  147. req->fw_init_done_enable = 1;
  148. req->pin_connect_result_enable_valid = 1;
  149. req->pin_connect_result_enable = 1;
  150. req->cal_done_enable_valid = 1;
  151. req->cal_done_enable = 1;
  152. req->qdss_trace_req_mem_enable_valid = 1;
  153. req->qdss_trace_req_mem_enable = 1;
  154. req->qdss_trace_save_enable_valid = 1;
  155. req->qdss_trace_save_enable = 1;
  156. req->qdss_trace_free_enable_valid = 1;
  157. req->qdss_trace_free_enable = 1;
  158. req->respond_get_info_enable_valid = 1;
  159. req->respond_get_info_enable = 1;
  160. req->wfc_call_twt_config_enable_valid = 1;
  161. req->wfc_call_twt_config_enable = 1;
  162. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  163. wlfw_ind_register_resp_msg_v01_ei, resp);
  164. if (ret < 0) {
  165. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  166. ret);
  167. goto out;
  168. }
  169. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  170. QMI_WLFW_IND_REGISTER_REQ_V01,
  171. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  172. wlfw_ind_register_req_msg_v01_ei, req);
  173. if (ret < 0) {
  174. qmi_txn_cancel(&txn);
  175. cnss_pr_err("Failed to send indication register request, err: %d\n",
  176. ret);
  177. goto out;
  178. }
  179. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  180. if (ret < 0) {
  181. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  182. ret);
  183. goto out;
  184. }
  185. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  186. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  187. resp->resp.result, resp->resp.error);
  188. ret = -resp->resp.result;
  189. goto out;
  190. }
  191. if (resp->fw_status_valid) {
  192. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  193. ret = -EALREADY;
  194. goto qmi_registered;
  195. }
  196. }
  197. kfree(req);
  198. kfree(resp);
  199. return 0;
  200. out:
  201. CNSS_QMI_ASSERT();
  202. qmi_registered:
  203. kfree(req);
  204. kfree(resp);
  205. return ret;
  206. }
  207. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  208. struct wlfw_host_cap_req_msg_v01 *req)
  209. {
  210. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  211. plat_priv->device_id == MANGO_DEVICE_ID) {
  212. req->mlo_capable_valid = 1;
  213. req->mlo_capable = 1;
  214. req->mlo_chip_id_valid = 1;
  215. req->mlo_chip_id = 0;
  216. req->mlo_group_id_valid = 1;
  217. req->mlo_group_id = 0;
  218. req->max_mlo_peer_valid = 1;
  219. /* Max peer number generally won't change for the same device
  220. * but needs to be synced with host driver.
  221. */
  222. req->max_mlo_peer = 32;
  223. req->mlo_num_chips_valid = 1;
  224. req->mlo_num_chips = 1;
  225. req->mlo_chip_info_valid = 1;
  226. req->mlo_chip_info[0].chip_id = 0;
  227. req->mlo_chip_info[0].num_local_links = 2;
  228. req->mlo_chip_info[0].hw_link_id[0] = 0;
  229. req->mlo_chip_info[0].hw_link_id[1] = 1;
  230. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  231. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  232. }
  233. }
  234. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  235. {
  236. struct wlfw_host_cap_req_msg_v01 *req;
  237. struct wlfw_host_cap_resp_msg_v01 *resp;
  238. struct qmi_txn txn;
  239. int ret = 0;
  240. u64 iova_start = 0, iova_size = 0,
  241. iova_ipa_start = 0, iova_ipa_size = 0;
  242. u64 feature_list = 0;
  243. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  244. plat_priv->driver_state);
  245. req = kzalloc(sizeof(*req), GFP_KERNEL);
  246. if (!req)
  247. return -ENOMEM;
  248. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  249. if (!resp) {
  250. kfree(req);
  251. return -ENOMEM;
  252. }
  253. req->num_clients_valid = 1;
  254. req->num_clients = 1;
  255. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  256. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  257. if (req->wake_msi) {
  258. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  259. req->wake_msi_valid = 1;
  260. }
  261. req->bdf_support_valid = 1;
  262. req->bdf_support = 1;
  263. req->m3_support_valid = 1;
  264. req->m3_support = 1;
  265. req->m3_cache_support_valid = 1;
  266. req->m3_cache_support = 1;
  267. req->cal_done_valid = 1;
  268. req->cal_done = plat_priv->cal_done;
  269. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  270. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  271. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  272. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  273. &iova_ipa_size)) {
  274. req->ddr_range_valid = 1;
  275. req->ddr_range[0].start = iova_start;
  276. req->ddr_range[0].size = iova_size + iova_ipa_size;
  277. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  278. req->ddr_range[0].start, req->ddr_range[0].size);
  279. }
  280. req->host_build_type_valid = 1;
  281. req->host_build_type = cnss_get_host_build_type();
  282. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  283. ret = cnss_get_feature_list(plat_priv, &feature_list);
  284. if (!ret) {
  285. req->feature_list_valid = 1;
  286. req->feature_list = feature_list;
  287. cnss_pr_dbg("Sending feature list 0x%llx\n",
  288. req->feature_list);
  289. }
  290. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  291. wlfw_host_cap_resp_msg_v01_ei, resp);
  292. if (ret < 0) {
  293. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  294. ret);
  295. goto out;
  296. }
  297. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  298. QMI_WLFW_HOST_CAP_REQ_V01,
  299. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  300. wlfw_host_cap_req_msg_v01_ei, req);
  301. if (ret < 0) {
  302. qmi_txn_cancel(&txn);
  303. cnss_pr_err("Failed to send host capability request, err: %d\n",
  304. ret);
  305. goto out;
  306. }
  307. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  308. if (ret < 0) {
  309. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  310. ret);
  311. goto out;
  312. }
  313. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  314. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  315. resp->resp.result, resp->resp.error);
  316. ret = -resp->resp.result;
  317. goto out;
  318. }
  319. kfree(req);
  320. kfree(resp);
  321. return 0;
  322. out:
  323. CNSS_QMI_ASSERT();
  324. kfree(req);
  325. kfree(resp);
  326. return ret;
  327. }
  328. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  329. {
  330. struct wlfw_respond_mem_req_msg_v01 *req;
  331. struct wlfw_respond_mem_resp_msg_v01 *resp;
  332. struct qmi_txn txn;
  333. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  334. int ret = 0, i;
  335. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  336. plat_priv->driver_state);
  337. req = kzalloc(sizeof(*req), GFP_KERNEL);
  338. if (!req)
  339. return -ENOMEM;
  340. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  341. if (!resp) {
  342. kfree(req);
  343. return -ENOMEM;
  344. }
  345. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  346. for (i = 0; i < req->mem_seg_len; i++) {
  347. if (!fw_mem[i].pa || !fw_mem[i].size) {
  348. if (fw_mem[i].type == 0) {
  349. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  350. i);
  351. ret = -EINVAL;
  352. goto out;
  353. }
  354. cnss_pr_err("Memory for FW is not available for type: %u\n",
  355. fw_mem[i].type);
  356. ret = -ENOMEM;
  357. goto out;
  358. }
  359. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  360. fw_mem[i].va, &fw_mem[i].pa,
  361. fw_mem[i].size, fw_mem[i].type);
  362. req->mem_seg[i].addr = fw_mem[i].pa;
  363. req->mem_seg[i].size = fw_mem[i].size;
  364. req->mem_seg[i].type = fw_mem[i].type;
  365. }
  366. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  367. wlfw_respond_mem_resp_msg_v01_ei, resp);
  368. if (ret < 0) {
  369. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  370. ret);
  371. goto out;
  372. }
  373. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  374. QMI_WLFW_RESPOND_MEM_REQ_V01,
  375. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  376. wlfw_respond_mem_req_msg_v01_ei, req);
  377. if (ret < 0) {
  378. qmi_txn_cancel(&txn);
  379. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  380. ret);
  381. goto out;
  382. }
  383. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  384. if (ret < 0) {
  385. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  386. ret);
  387. goto out;
  388. }
  389. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  390. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  391. resp->resp.result, resp->resp.error);
  392. ret = -resp->resp.result;
  393. goto out;
  394. }
  395. kfree(req);
  396. kfree(resp);
  397. return 0;
  398. out:
  399. CNSS_QMI_ASSERT();
  400. kfree(req);
  401. kfree(resp);
  402. return ret;
  403. }
  404. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  405. {
  406. struct wlfw_cap_req_msg_v01 *req;
  407. struct wlfw_cap_resp_msg_v01 *resp;
  408. struct qmi_txn txn;
  409. char *fw_build_timestamp;
  410. int ret = 0, i;
  411. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  412. plat_priv->driver_state);
  413. req = kzalloc(sizeof(*req), GFP_KERNEL);
  414. if (!req)
  415. return -ENOMEM;
  416. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  417. if (!resp) {
  418. kfree(req);
  419. return -ENOMEM;
  420. }
  421. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  422. wlfw_cap_resp_msg_v01_ei, resp);
  423. if (ret < 0) {
  424. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  425. ret);
  426. goto out;
  427. }
  428. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  429. QMI_WLFW_CAP_REQ_V01,
  430. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  431. wlfw_cap_req_msg_v01_ei, req);
  432. if (ret < 0) {
  433. qmi_txn_cancel(&txn);
  434. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  435. ret);
  436. goto out;
  437. }
  438. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  439. if (ret < 0) {
  440. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  441. ret);
  442. goto out;
  443. }
  444. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  445. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  446. resp->resp.result, resp->resp.error);
  447. ret = -resp->resp.result;
  448. goto out;
  449. }
  450. if (resp->chip_info_valid) {
  451. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  452. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  453. }
  454. if (resp->board_info_valid)
  455. plat_priv->board_info.board_id = resp->board_info.board_id;
  456. else
  457. plat_priv->board_info.board_id = 0xFF;
  458. if (resp->soc_info_valid)
  459. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  460. if (resp->fw_version_info_valid) {
  461. plat_priv->fw_version_info.fw_version =
  462. resp->fw_version_info.fw_version;
  463. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  464. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  465. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  466. resp->fw_version_info.fw_build_timestamp,
  467. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  468. }
  469. if (resp->fw_build_id_valid) {
  470. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  471. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  472. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  473. }
  474. /* FW will send aop retention volatage for qca6490 */
  475. if (resp->voltage_mv_valid) {
  476. plat_priv->cpr_info.voltage = resp->voltage_mv;
  477. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  478. plat_priv->cpr_info.voltage);
  479. cnss_update_cpr_info(plat_priv);
  480. }
  481. if (resp->time_freq_hz_valid) {
  482. plat_priv->device_freq_hz = resp->time_freq_hz;
  483. cnss_pr_dbg("Device frequency is %d HZ\n",
  484. plat_priv->device_freq_hz);
  485. }
  486. if (resp->otp_version_valid)
  487. plat_priv->otp_version = resp->otp_version;
  488. if (resp->dev_mem_info_valid) {
  489. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  490. plat_priv->dev_mem_info[i].start =
  491. resp->dev_mem_info[i].start;
  492. plat_priv->dev_mem_info[i].size =
  493. resp->dev_mem_info[i].size;
  494. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  495. i, plat_priv->dev_mem_info[i].start,
  496. plat_priv->dev_mem_info[i].size);
  497. }
  498. }
  499. if (resp->fw_caps_valid)
  500. plat_priv->fw_pcie_gen_switch =
  501. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  502. if (resp->hang_data_length_valid &&
  503. resp->hang_data_length &&
  504. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  505. plat_priv->hang_event_data_len = resp->hang_data_length;
  506. else
  507. plat_priv->hang_event_data_len = 0;
  508. if (resp->hang_data_addr_offset_valid)
  509. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  510. else
  511. plat_priv->hang_data_addr_offset = 0;
  512. if (resp->hwid_bitmap_valid)
  513. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  514. if (resp->ol_cpr_cfg_valid)
  515. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  516. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  517. plat_priv->chip_info.chip_id,
  518. plat_priv->chip_info.chip_family,
  519. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  520. plat_priv->otp_version);
  521. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  522. plat_priv->fw_version_info.fw_version,
  523. plat_priv->fw_version_info.fw_build_timestamp,
  524. plat_priv->fw_build_id,
  525. plat_priv->hwid_bitmap);
  526. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  527. plat_priv->hang_event_data_len,
  528. plat_priv->hang_data_addr_offset);
  529. kfree(req);
  530. kfree(resp);
  531. return 0;
  532. out:
  533. CNSS_QMI_ASSERT();
  534. kfree(req);
  535. kfree(resp);
  536. return ret;
  537. }
  538. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  539. u32 bdf_type, char *filename,
  540. u32 filename_len)
  541. {
  542. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  543. int ret = 0;
  544. switch (bdf_type) {
  545. case CNSS_BDF_ELF:
  546. /* Board ID will be equal or less than 0xFF in GF mask case */
  547. if (plat_priv->board_info.board_id == 0xFF) {
  548. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  549. snprintf(filename_tmp, filename_len,
  550. ELF_BDF_FILE_NAME_GF);
  551. else
  552. snprintf(filename_tmp, filename_len,
  553. ELF_BDF_FILE_NAME);
  554. } else if (plat_priv->board_info.board_id < 0xFF) {
  555. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  556. snprintf(filename_tmp, filename_len,
  557. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  558. plat_priv->board_info.board_id);
  559. else
  560. snprintf(filename_tmp, filename_len,
  561. ELF_BDF_FILE_NAME_PREFIX "%02x",
  562. plat_priv->board_info.board_id);
  563. } else {
  564. snprintf(filename_tmp, filename_len,
  565. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  566. plat_priv->board_info.board_id >> 8 & 0xFF,
  567. plat_priv->board_info.board_id & 0xFF);
  568. }
  569. break;
  570. case CNSS_BDF_BIN:
  571. if (plat_priv->board_info.board_id == 0xFF) {
  572. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  573. snprintf(filename_tmp, filename_len,
  574. BIN_BDF_FILE_NAME_GF);
  575. else
  576. snprintf(filename_tmp, filename_len,
  577. BIN_BDF_FILE_NAME);
  578. } else if (plat_priv->board_info.board_id < 0xFF) {
  579. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  580. snprintf(filename_tmp, filename_len,
  581. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  582. plat_priv->board_info.board_id);
  583. else
  584. snprintf(filename_tmp, filename_len,
  585. BIN_BDF_FILE_NAME_PREFIX "%02x",
  586. plat_priv->board_info.board_id);
  587. } else {
  588. snprintf(filename_tmp, filename_len,
  589. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  590. plat_priv->board_info.board_id >> 8 & 0xFF,
  591. plat_priv->board_info.board_id & 0xFF);
  592. }
  593. break;
  594. case CNSS_BDF_REGDB:
  595. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  596. break;
  597. case CNSS_BDF_HDS:
  598. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  599. break;
  600. default:
  601. cnss_pr_err("Invalid BDF type: %d\n",
  602. plat_priv->ctrl_params.bdf_type);
  603. ret = -EINVAL;
  604. break;
  605. }
  606. if (!ret)
  607. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  608. return ret;
  609. }
  610. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  611. enum wlfw_ini_file_type_v01 file_type)
  612. {
  613. struct wlfw_ini_file_download_req_msg_v01 *req;
  614. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  615. struct qmi_txn txn;
  616. int ret = 0;
  617. const struct firmware *fw;
  618. char filename[INI_FILE_NAME_LEN] = {0};
  619. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  620. const u8 *temp;
  621. unsigned int remaining;
  622. bool backup_supported = false;
  623. cnss_pr_info("INI File %u download\n", file_type);
  624. req = kzalloc(sizeof(*req), GFP_KERNEL);
  625. if (!req)
  626. return -ENOMEM;
  627. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  628. if (!resp) {
  629. kfree(req);
  630. return -ENOMEM;
  631. }
  632. switch (file_type) {
  633. case WLFW_CONN_ROAM_INI_V01:
  634. snprintf(tmp_filename, sizeof(tmp_filename),
  635. CONN_ROAM_FILE_NAME);
  636. backup_supported = true;
  637. break;
  638. default:
  639. cnss_pr_err("Invalid file type: %u\n", file_type);
  640. ret = -EINVAL;
  641. goto err_req_fw;
  642. }
  643. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  644. /* Fetch the file */
  645. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  646. if (ret) {
  647. cnss_pr_err("Failed to get INI file %s (%d), Backup file: %s",
  648. filename, ret,
  649. backup_supported ? "Supported" : "Not Supported");
  650. if (!backup_supported)
  651. goto err_req_fw;
  652. snprintf(filename, sizeof(filename),
  653. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  654. ret = firmware_request_nowarn(&fw, filename,
  655. &plat_priv->plat_dev->dev);
  656. if (ret) {
  657. cnss_pr_err("Failed to get INI file %s (%d)", filename,
  658. ret);
  659. goto err_req_fw;
  660. }
  661. }
  662. temp = fw->data;
  663. remaining = fw->size;
  664. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  665. remaining);
  666. while (remaining) {
  667. req->file_type_valid = 1;
  668. req->file_type = file_type;
  669. req->total_size_valid = 1;
  670. req->total_size = remaining;
  671. req->seg_id_valid = 1;
  672. req->data_valid = 1;
  673. req->end_valid = 1;
  674. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  675. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  676. } else {
  677. req->data_len = remaining;
  678. req->end = 1;
  679. }
  680. memcpy(req->data, temp, req->data_len);
  681. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  682. wlfw_ini_file_download_resp_msg_v01_ei,
  683. resp);
  684. if (ret < 0) {
  685. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  686. ret);
  687. goto err;
  688. }
  689. ret = qmi_send_request
  690. (&plat_priv->qmi_wlfw, NULL, &txn,
  691. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  692. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  693. wlfw_ini_file_download_req_msg_v01_ei, req);
  694. if (ret < 0) {
  695. qmi_txn_cancel(&txn);
  696. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  697. ret);
  698. goto err;
  699. }
  700. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  701. if (ret < 0) {
  702. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  703. ret);
  704. goto err;
  705. }
  706. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  707. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  708. resp->resp.result, resp->resp.error);
  709. ret = -resp->resp.result;
  710. goto err;
  711. }
  712. remaining -= req->data_len;
  713. temp += req->data_len;
  714. req->seg_id++;
  715. }
  716. release_firmware(fw);
  717. kfree(req);
  718. kfree(resp);
  719. return 0;
  720. err:
  721. release_firmware(fw);
  722. err_req_fw:
  723. kfree(req);
  724. kfree(resp);
  725. return ret;
  726. }
  727. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  728. u32 bdf_type)
  729. {
  730. struct wlfw_bdf_download_req_msg_v01 *req;
  731. struct wlfw_bdf_download_resp_msg_v01 *resp;
  732. struct qmi_txn txn;
  733. char filename[MAX_FIRMWARE_NAME_LEN];
  734. const struct firmware *fw_entry = NULL;
  735. const u8 *temp;
  736. unsigned int remaining;
  737. int ret = 0;
  738. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  739. plat_priv->driver_state, bdf_type);
  740. req = kzalloc(sizeof(*req), GFP_KERNEL);
  741. if (!req)
  742. return -ENOMEM;
  743. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  744. if (!resp) {
  745. kfree(req);
  746. return -ENOMEM;
  747. }
  748. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  749. filename, sizeof(filename));
  750. if (ret)
  751. goto err_req_fw;
  752. if (bdf_type == CNSS_BDF_REGDB)
  753. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  754. filename);
  755. else
  756. ret = firmware_request_nowarn(&fw_entry, filename,
  757. &plat_priv->plat_dev->dev);
  758. if (ret) {
  759. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  760. goto err_req_fw;
  761. }
  762. temp = fw_entry->data;
  763. remaining = fw_entry->size;
  764. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  765. while (remaining) {
  766. req->valid = 1;
  767. req->file_id_valid = 1;
  768. req->file_id = plat_priv->board_info.board_id;
  769. req->total_size_valid = 1;
  770. req->total_size = remaining;
  771. req->seg_id_valid = 1;
  772. req->data_valid = 1;
  773. req->end_valid = 1;
  774. req->bdf_type_valid = 1;
  775. req->bdf_type = bdf_type;
  776. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  777. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  778. } else {
  779. req->data_len = remaining;
  780. req->end = 1;
  781. }
  782. memcpy(req->data, temp, req->data_len);
  783. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  784. wlfw_bdf_download_resp_msg_v01_ei, resp);
  785. if (ret < 0) {
  786. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  787. ret);
  788. goto err_send;
  789. }
  790. ret = qmi_send_request
  791. (&plat_priv->qmi_wlfw, NULL, &txn,
  792. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  793. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  794. wlfw_bdf_download_req_msg_v01_ei, req);
  795. if (ret < 0) {
  796. qmi_txn_cancel(&txn);
  797. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  798. ret);
  799. goto err_send;
  800. }
  801. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  802. if (ret < 0) {
  803. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  804. ret);
  805. goto err_send;
  806. }
  807. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  808. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  809. resp->resp.result, resp->resp.error);
  810. ret = -resp->resp.result;
  811. goto err_send;
  812. }
  813. remaining -= req->data_len;
  814. temp += req->data_len;
  815. req->seg_id++;
  816. }
  817. release_firmware(fw_entry);
  818. if (resp->host_bdf_data_valid) {
  819. /* QCA6490 enable S3E regulator for IPA configuration only */
  820. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  821. cnss_enable_int_pow_amp_vreg(plat_priv);
  822. plat_priv->cbc_file_download =
  823. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  824. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  825. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  826. plat_priv->cbc_file_download);
  827. }
  828. kfree(req);
  829. kfree(resp);
  830. return 0;
  831. err_send:
  832. release_firmware(fw_entry);
  833. err_req_fw:
  834. if (!(bdf_type == CNSS_BDF_REGDB ||
  835. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  836. ret == -EAGAIN))
  837. CNSS_QMI_ASSERT();
  838. kfree(req);
  839. kfree(resp);
  840. return ret;
  841. }
  842. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  843. {
  844. struct wlfw_m3_info_req_msg_v01 *req;
  845. struct wlfw_m3_info_resp_msg_v01 *resp;
  846. struct qmi_txn txn;
  847. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  848. int ret = 0;
  849. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  850. plat_priv->driver_state);
  851. req = kzalloc(sizeof(*req), GFP_KERNEL);
  852. if (!req)
  853. return -ENOMEM;
  854. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  855. if (!resp) {
  856. kfree(req);
  857. return -ENOMEM;
  858. }
  859. if (!m3_mem->pa || !m3_mem->size) {
  860. cnss_pr_err("Memory for M3 is not available\n");
  861. ret = -ENOMEM;
  862. goto out;
  863. }
  864. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  865. m3_mem->va, &m3_mem->pa, m3_mem->size);
  866. req->addr = plat_priv->m3_mem.pa;
  867. req->size = plat_priv->m3_mem.size;
  868. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  869. wlfw_m3_info_resp_msg_v01_ei, resp);
  870. if (ret < 0) {
  871. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  872. ret);
  873. goto out;
  874. }
  875. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  876. QMI_WLFW_M3_INFO_REQ_V01,
  877. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  878. wlfw_m3_info_req_msg_v01_ei, req);
  879. if (ret < 0) {
  880. qmi_txn_cancel(&txn);
  881. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  882. ret);
  883. goto out;
  884. }
  885. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  886. if (ret < 0) {
  887. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  888. ret);
  889. goto out;
  890. }
  891. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  892. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  893. resp->resp.result, resp->resp.error);
  894. ret = -resp->resp.result;
  895. goto out;
  896. }
  897. kfree(req);
  898. kfree(resp);
  899. return 0;
  900. out:
  901. CNSS_QMI_ASSERT();
  902. kfree(req);
  903. kfree(resp);
  904. return ret;
  905. }
  906. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  907. u8 *mac, u32 mac_len)
  908. {
  909. struct wlfw_mac_addr_req_msg_v01 req;
  910. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  911. struct qmi_txn txn;
  912. int ret;
  913. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  914. return -EINVAL;
  915. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  916. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  917. if (ret < 0) {
  918. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  919. ret);
  920. ret = -EIO;
  921. goto out;
  922. }
  923. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  924. mac, plat_priv->driver_state);
  925. memcpy(req.mac_addr, mac, mac_len);
  926. req.mac_addr_valid = 1;
  927. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  928. QMI_WLFW_MAC_ADDR_REQ_V01,
  929. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  930. wlfw_mac_addr_req_msg_v01_ei, &req);
  931. if (ret < 0) {
  932. qmi_txn_cancel(&txn);
  933. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  934. ret = -EIO;
  935. goto out;
  936. }
  937. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  938. if (ret < 0) {
  939. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  940. ret);
  941. ret = -EIO;
  942. goto out;
  943. }
  944. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  945. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  946. resp.resp.result);
  947. ret = -resp.resp.result;
  948. }
  949. out:
  950. return ret;
  951. }
  952. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  953. u32 total_size)
  954. {
  955. int ret = 0;
  956. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  957. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  958. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  959. unsigned int remaining;
  960. struct qmi_txn txn;
  961. cnss_pr_dbg("%s\n", __func__);
  962. req = kzalloc(sizeof(*req), GFP_KERNEL);
  963. if (!req)
  964. return -ENOMEM;
  965. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  966. if (!resp) {
  967. kfree(req);
  968. return -ENOMEM;
  969. }
  970. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  971. if (!p_qdss_trace_data) {
  972. ret = ENOMEM;
  973. goto end;
  974. }
  975. remaining = total_size;
  976. p_qdss_trace_data_temp = p_qdss_trace_data;
  977. while (remaining && resp->end == 0) {
  978. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  979. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  980. if (ret < 0) {
  981. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  982. ret);
  983. goto fail;
  984. }
  985. ret = qmi_send_request
  986. (&plat_priv->qmi_wlfw, NULL, &txn,
  987. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  988. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  989. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  990. if (ret < 0) {
  991. qmi_txn_cancel(&txn);
  992. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  993. ret);
  994. goto fail;
  995. }
  996. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  997. if (ret < 0) {
  998. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  999. ret);
  1000. goto fail;
  1001. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1002. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1003. resp->resp.result, resp->resp.error);
  1004. ret = -resp->resp.result;
  1005. goto fail;
  1006. } else {
  1007. ret = 0;
  1008. }
  1009. cnss_pr_dbg("%s: response total size %d data len %d",
  1010. __func__, resp->total_size, resp->data_len);
  1011. if ((resp->total_size_valid == 1 &&
  1012. resp->total_size == total_size) &&
  1013. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1014. (resp->data_valid == 1 &&
  1015. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01)) {
  1016. memcpy(p_qdss_trace_data_temp,
  1017. resp->data, resp->data_len);
  1018. } else {
  1019. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1020. __func__,
  1021. total_size, req->seg_id,
  1022. resp->total_size_valid,
  1023. resp->total_size,
  1024. resp->seg_id_valid,
  1025. resp->seg_id,
  1026. resp->data_valid,
  1027. resp->data_len);
  1028. ret = -1;
  1029. goto fail;
  1030. }
  1031. remaining -= resp->data_len;
  1032. p_qdss_trace_data_temp += resp->data_len;
  1033. req->seg_id++;
  1034. }
  1035. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1036. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1037. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1038. total_size);
  1039. if (ret < 0) {
  1040. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1041. ret);
  1042. ret = -1;
  1043. goto fail;
  1044. }
  1045. } else {
  1046. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1047. __func__,
  1048. remaining, resp->end_valid, resp->end);
  1049. ret = -1;
  1050. goto fail;
  1051. }
  1052. fail:
  1053. kfree(p_qdss_trace_data);
  1054. end:
  1055. kfree(req);
  1056. kfree(resp);
  1057. return ret;
  1058. }
  1059. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1060. char *filename, u32 filename_len)
  1061. {
  1062. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1063. char *debug_str = QDSS_DEBUG_FILE_STR;
  1064. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1065. plat_priv->device_id == MANGO_DEVICE_ID)
  1066. debug_str = "";
  1067. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1068. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1069. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1070. else
  1071. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1072. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1073. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1074. }
  1075. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1076. {
  1077. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1078. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1079. struct qmi_txn txn;
  1080. const struct firmware *fw_entry = NULL;
  1081. const u8 *temp;
  1082. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1083. unsigned int remaining;
  1084. int ret = 0;
  1085. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1086. plat_priv->driver_state);
  1087. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1088. if (!req)
  1089. return -ENOMEM;
  1090. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1091. if (!resp) {
  1092. kfree(req);
  1093. return -ENOMEM;
  1094. }
  1095. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1096. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1097. qdss_cfg_filename);
  1098. if (ret) {
  1099. cnss_pr_dbg("Unable to load %s\n",
  1100. qdss_cfg_filename);
  1101. goto err_req_fw;
  1102. }
  1103. temp = fw_entry->data;
  1104. remaining = fw_entry->size;
  1105. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1106. qdss_cfg_filename, remaining);
  1107. while (remaining) {
  1108. req->total_size_valid = 1;
  1109. req->total_size = remaining;
  1110. req->seg_id_valid = 1;
  1111. req->data_valid = 1;
  1112. req->end_valid = 1;
  1113. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1114. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1115. } else {
  1116. req->data_len = remaining;
  1117. req->end = 1;
  1118. }
  1119. memcpy(req->data, temp, req->data_len);
  1120. ret = qmi_txn_init
  1121. (&plat_priv->qmi_wlfw, &txn,
  1122. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1123. resp);
  1124. if (ret < 0) {
  1125. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1126. ret);
  1127. goto err_send;
  1128. }
  1129. ret = qmi_send_request
  1130. (&plat_priv->qmi_wlfw, NULL, &txn,
  1131. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1132. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1133. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1134. if (ret < 0) {
  1135. qmi_txn_cancel(&txn);
  1136. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1137. ret);
  1138. goto err_send;
  1139. }
  1140. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1141. if (ret < 0) {
  1142. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1143. ret);
  1144. goto err_send;
  1145. }
  1146. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1147. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1148. resp->resp.result, resp->resp.error);
  1149. ret = -resp->resp.result;
  1150. goto err_send;
  1151. }
  1152. remaining -= req->data_len;
  1153. temp += req->data_len;
  1154. req->seg_id++;
  1155. }
  1156. release_firmware(fw_entry);
  1157. kfree(req);
  1158. kfree(resp);
  1159. return 0;
  1160. err_send:
  1161. release_firmware(fw_entry);
  1162. err_req_fw:
  1163. kfree(req);
  1164. kfree(resp);
  1165. return ret;
  1166. }
  1167. static int wlfw_send_qdss_trace_mode_req
  1168. (struct cnss_plat_data *plat_priv,
  1169. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1170. unsigned long long option)
  1171. {
  1172. int rc = 0;
  1173. int tmp = 0;
  1174. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1175. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1176. struct qmi_txn txn;
  1177. if (!plat_priv)
  1178. return -ENODEV;
  1179. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1180. if (!req)
  1181. return -ENOMEM;
  1182. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1183. if (!resp) {
  1184. kfree(req);
  1185. return -ENOMEM;
  1186. }
  1187. req->mode_valid = 1;
  1188. req->mode = mode;
  1189. req->option_valid = 1;
  1190. req->option = option;
  1191. tmp = plat_priv->hw_trc_override;
  1192. req->hw_trc_disable_override_valid = 1;
  1193. req->hw_trc_disable_override =
  1194. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1195. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1196. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1197. __func__, mode, option, req->hw_trc_disable_override);
  1198. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1199. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1200. if (rc < 0) {
  1201. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1202. rc);
  1203. goto out;
  1204. }
  1205. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1206. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1207. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1208. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1209. if (rc < 0) {
  1210. qmi_txn_cancel(&txn);
  1211. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1212. goto out;
  1213. }
  1214. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1215. if (rc < 0) {
  1216. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1217. rc);
  1218. goto out;
  1219. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1220. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1221. resp->resp.result, resp->resp.error);
  1222. rc = -resp->resp.result;
  1223. goto out;
  1224. }
  1225. kfree(resp);
  1226. kfree(req);
  1227. return rc;
  1228. out:
  1229. kfree(resp);
  1230. kfree(req);
  1231. CNSS_QMI_ASSERT();
  1232. return rc;
  1233. }
  1234. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1235. {
  1236. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1237. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1238. }
  1239. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1240. {
  1241. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1242. option);
  1243. }
  1244. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1245. enum cnss_driver_mode mode)
  1246. {
  1247. struct wlfw_wlan_mode_req_msg_v01 *req;
  1248. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1249. struct qmi_txn txn;
  1250. int ret = 0;
  1251. if (!plat_priv)
  1252. return -ENODEV;
  1253. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1254. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1255. if (mode == CNSS_OFF &&
  1256. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1257. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1258. return 0;
  1259. }
  1260. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1261. if (!req)
  1262. return -ENOMEM;
  1263. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1264. if (!resp) {
  1265. kfree(req);
  1266. return -ENOMEM;
  1267. }
  1268. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1269. req->hw_debug_valid = 1;
  1270. req->hw_debug = 0;
  1271. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1272. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1273. if (ret < 0) {
  1274. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1275. cnss_qmi_mode_to_str(mode), mode, ret);
  1276. goto out;
  1277. }
  1278. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1279. QMI_WLFW_WLAN_MODE_REQ_V01,
  1280. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1281. wlfw_wlan_mode_req_msg_v01_ei, req);
  1282. if (ret < 0) {
  1283. qmi_txn_cancel(&txn);
  1284. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1285. cnss_qmi_mode_to_str(mode), mode, ret);
  1286. goto out;
  1287. }
  1288. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1289. if (ret < 0) {
  1290. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1291. cnss_qmi_mode_to_str(mode), mode, ret);
  1292. goto out;
  1293. }
  1294. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1295. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1296. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1297. resp->resp.error);
  1298. ret = -resp->resp.result;
  1299. goto out;
  1300. }
  1301. kfree(req);
  1302. kfree(resp);
  1303. return 0;
  1304. out:
  1305. if (mode == CNSS_OFF) {
  1306. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1307. ret = 0;
  1308. } else {
  1309. CNSS_QMI_ASSERT();
  1310. }
  1311. kfree(req);
  1312. kfree(resp);
  1313. return ret;
  1314. }
  1315. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1316. struct cnss_wlan_enable_cfg *config,
  1317. const char *host_version)
  1318. {
  1319. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1320. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1321. struct qmi_txn txn;
  1322. u32 i;
  1323. int ret = 0;
  1324. if (!plat_priv)
  1325. return -ENODEV;
  1326. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1327. plat_priv->driver_state);
  1328. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1329. if (!req)
  1330. return -ENOMEM;
  1331. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1332. if (!resp) {
  1333. kfree(req);
  1334. return -ENOMEM;
  1335. }
  1336. req->host_version_valid = 1;
  1337. strlcpy(req->host_version, host_version,
  1338. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1339. req->tgt_cfg_valid = 1;
  1340. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1341. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1342. else
  1343. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1344. for (i = 0; i < req->tgt_cfg_len; i++) {
  1345. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1346. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1347. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1348. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1349. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1350. }
  1351. req->svc_cfg_valid = 1;
  1352. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1353. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1354. else
  1355. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1356. for (i = 0; i < req->svc_cfg_len; i++) {
  1357. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1358. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1359. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1360. }
  1361. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1362. plat_priv->device_id != MANGO_DEVICE_ID) {
  1363. req->shadow_reg_v2_valid = 1;
  1364. if (config->num_shadow_reg_v2_cfg >
  1365. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1366. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1367. else
  1368. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1369. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1370. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1371. * req->shadow_reg_v2_len);
  1372. } else {
  1373. req->shadow_reg_v3_valid = 1;
  1374. if (config->num_shadow_reg_v3_cfg >
  1375. MAX_NUM_SHADOW_REG_V3)
  1376. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1377. else
  1378. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1379. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1380. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1381. plat_priv->num_shadow_regs_v3);
  1382. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1383. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1384. * req->shadow_reg_v3_len);
  1385. }
  1386. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1387. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1388. if (ret < 0) {
  1389. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1390. ret);
  1391. goto out;
  1392. }
  1393. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1394. QMI_WLFW_WLAN_CFG_REQ_V01,
  1395. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1396. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1397. if (ret < 0) {
  1398. qmi_txn_cancel(&txn);
  1399. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1400. ret);
  1401. goto out;
  1402. }
  1403. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1404. if (ret < 0) {
  1405. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1406. ret);
  1407. goto out;
  1408. }
  1409. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1410. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1411. resp->resp.result, resp->resp.error);
  1412. ret = -resp->resp.result;
  1413. goto out;
  1414. }
  1415. kfree(req);
  1416. kfree(resp);
  1417. return 0;
  1418. out:
  1419. CNSS_QMI_ASSERT();
  1420. kfree(req);
  1421. kfree(resp);
  1422. return ret;
  1423. }
  1424. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1425. u32 offset, u32 mem_type,
  1426. u32 data_len, u8 *data)
  1427. {
  1428. struct wlfw_athdiag_read_req_msg_v01 *req;
  1429. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1430. struct qmi_txn txn;
  1431. int ret = 0;
  1432. if (!plat_priv)
  1433. return -ENODEV;
  1434. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1435. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1436. data, data_len);
  1437. return -EINVAL;
  1438. }
  1439. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1440. plat_priv->driver_state, offset, mem_type, data_len);
  1441. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1442. if (!req)
  1443. return -ENOMEM;
  1444. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1445. if (!resp) {
  1446. kfree(req);
  1447. return -ENOMEM;
  1448. }
  1449. req->offset = offset;
  1450. req->mem_type = mem_type;
  1451. req->data_len = data_len;
  1452. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1453. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1454. if (ret < 0) {
  1455. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1456. ret);
  1457. goto out;
  1458. }
  1459. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1460. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1461. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1462. wlfw_athdiag_read_req_msg_v01_ei, req);
  1463. if (ret < 0) {
  1464. qmi_txn_cancel(&txn);
  1465. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1466. ret);
  1467. goto out;
  1468. }
  1469. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1470. if (ret < 0) {
  1471. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1472. ret);
  1473. goto out;
  1474. }
  1475. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1476. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1477. resp->resp.result, resp->resp.error);
  1478. ret = -resp->resp.result;
  1479. goto out;
  1480. }
  1481. if (!resp->data_valid || resp->data_len != data_len) {
  1482. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1483. resp->data_valid, resp->data_len);
  1484. ret = -EINVAL;
  1485. goto out;
  1486. }
  1487. memcpy(data, resp->data, resp->data_len);
  1488. kfree(req);
  1489. kfree(resp);
  1490. return 0;
  1491. out:
  1492. kfree(req);
  1493. kfree(resp);
  1494. return ret;
  1495. }
  1496. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1497. u32 offset, u32 mem_type,
  1498. u32 data_len, u8 *data)
  1499. {
  1500. struct wlfw_athdiag_write_req_msg_v01 *req;
  1501. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1502. struct qmi_txn txn;
  1503. int ret = 0;
  1504. if (!plat_priv)
  1505. return -ENODEV;
  1506. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1507. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1508. data, data_len);
  1509. return -EINVAL;
  1510. }
  1511. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1512. plat_priv->driver_state, offset, mem_type, data_len, data);
  1513. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1514. if (!req)
  1515. return -ENOMEM;
  1516. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1517. if (!resp) {
  1518. kfree(req);
  1519. return -ENOMEM;
  1520. }
  1521. req->offset = offset;
  1522. req->mem_type = mem_type;
  1523. req->data_len = data_len;
  1524. memcpy(req->data, data, data_len);
  1525. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1526. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1527. if (ret < 0) {
  1528. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1529. ret);
  1530. goto out;
  1531. }
  1532. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1533. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1534. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1535. wlfw_athdiag_write_req_msg_v01_ei, req);
  1536. if (ret < 0) {
  1537. qmi_txn_cancel(&txn);
  1538. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1539. ret);
  1540. goto out;
  1541. }
  1542. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1543. if (ret < 0) {
  1544. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1545. ret);
  1546. goto out;
  1547. }
  1548. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1549. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1550. resp->resp.result, resp->resp.error);
  1551. ret = -resp->resp.result;
  1552. goto out;
  1553. }
  1554. kfree(req);
  1555. kfree(resp);
  1556. return 0;
  1557. out:
  1558. kfree(req);
  1559. kfree(resp);
  1560. return ret;
  1561. }
  1562. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1563. u8 fw_log_mode)
  1564. {
  1565. struct wlfw_ini_req_msg_v01 *req;
  1566. struct wlfw_ini_resp_msg_v01 *resp;
  1567. struct qmi_txn txn;
  1568. int ret = 0;
  1569. if (!plat_priv)
  1570. return -ENODEV;
  1571. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1572. plat_priv->driver_state, fw_log_mode);
  1573. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1574. if (!req)
  1575. return -ENOMEM;
  1576. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1577. if (!resp) {
  1578. kfree(req);
  1579. return -ENOMEM;
  1580. }
  1581. req->enablefwlog_valid = 1;
  1582. req->enablefwlog = fw_log_mode;
  1583. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1584. wlfw_ini_resp_msg_v01_ei, resp);
  1585. if (ret < 0) {
  1586. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1587. fw_log_mode, ret);
  1588. goto out;
  1589. }
  1590. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1591. QMI_WLFW_INI_REQ_V01,
  1592. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1593. wlfw_ini_req_msg_v01_ei, req);
  1594. if (ret < 0) {
  1595. qmi_txn_cancel(&txn);
  1596. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1597. fw_log_mode, ret);
  1598. goto out;
  1599. }
  1600. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1601. if (ret < 0) {
  1602. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1603. fw_log_mode, ret);
  1604. goto out;
  1605. }
  1606. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1607. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1608. fw_log_mode, resp->resp.result, resp->resp.error);
  1609. ret = -resp->resp.result;
  1610. goto out;
  1611. }
  1612. kfree(req);
  1613. kfree(resp);
  1614. return 0;
  1615. out:
  1616. kfree(req);
  1617. kfree(resp);
  1618. return ret;
  1619. }
  1620. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1621. {
  1622. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1623. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1624. struct qmi_txn txn;
  1625. int ret = 0;
  1626. if (!plat_priv)
  1627. return -ENODEV;
  1628. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1629. !plat_priv->fw_pcie_gen_switch) {
  1630. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1631. return 0;
  1632. }
  1633. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1634. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1635. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1636. plat_priv->pcie_gen_speed;
  1637. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1638. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1639. if (ret < 0) {
  1640. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1641. ret);
  1642. goto out;
  1643. }
  1644. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1645. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1646. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1647. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1648. if (ret < 0) {
  1649. qmi_txn_cancel(&txn);
  1650. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1651. goto out;
  1652. }
  1653. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1654. if (ret < 0) {
  1655. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1656. ret);
  1657. goto out;
  1658. }
  1659. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1660. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1661. plat_priv->pcie_gen_speed, resp.resp.result,
  1662. resp.resp.error);
  1663. ret = -resp.resp.result;
  1664. }
  1665. out:
  1666. /* Reset PCIE Gen speed after one time use */
  1667. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1668. return ret;
  1669. }
  1670. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1671. {
  1672. struct wlfw_antenna_switch_req_msg_v01 *req;
  1673. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1674. struct qmi_txn txn;
  1675. int ret = 0;
  1676. if (!plat_priv)
  1677. return -ENODEV;
  1678. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1679. plat_priv->driver_state);
  1680. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1681. if (!req)
  1682. return -ENOMEM;
  1683. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1684. if (!resp) {
  1685. kfree(req);
  1686. return -ENOMEM;
  1687. }
  1688. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1689. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1690. if (ret < 0) {
  1691. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1692. ret);
  1693. goto out;
  1694. }
  1695. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1696. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1697. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1698. wlfw_antenna_switch_req_msg_v01_ei, req);
  1699. if (ret < 0) {
  1700. qmi_txn_cancel(&txn);
  1701. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1702. ret);
  1703. goto out;
  1704. }
  1705. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1706. if (ret < 0) {
  1707. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1708. ret);
  1709. goto out;
  1710. }
  1711. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1712. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1713. resp->resp.result, resp->resp.error);
  1714. ret = -resp->resp.result;
  1715. goto out;
  1716. }
  1717. if (resp->antenna_valid)
  1718. plat_priv->antenna = resp->antenna;
  1719. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1720. resp->antenna_valid, resp->antenna);
  1721. kfree(req);
  1722. kfree(resp);
  1723. return 0;
  1724. out:
  1725. kfree(req);
  1726. kfree(resp);
  1727. return ret;
  1728. }
  1729. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1730. {
  1731. struct wlfw_antenna_grant_req_msg_v01 *req;
  1732. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1733. struct qmi_txn txn;
  1734. int ret = 0;
  1735. if (!plat_priv)
  1736. return -ENODEV;
  1737. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1738. plat_priv->driver_state, plat_priv->grant);
  1739. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1740. if (!req)
  1741. return -ENOMEM;
  1742. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1743. if (!resp) {
  1744. kfree(req);
  1745. return -ENOMEM;
  1746. }
  1747. req->grant_valid = 1;
  1748. req->grant = plat_priv->grant;
  1749. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1750. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1751. if (ret < 0) {
  1752. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1753. ret);
  1754. goto out;
  1755. }
  1756. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1757. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1758. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1759. wlfw_antenna_grant_req_msg_v01_ei, req);
  1760. if (ret < 0) {
  1761. qmi_txn_cancel(&txn);
  1762. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1763. ret);
  1764. goto out;
  1765. }
  1766. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1767. if (ret < 0) {
  1768. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1769. ret);
  1770. goto out;
  1771. }
  1772. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1773. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1774. resp->resp.result, resp->resp.error);
  1775. ret = -resp->resp.result;
  1776. goto out;
  1777. }
  1778. kfree(req);
  1779. kfree(resp);
  1780. return 0;
  1781. out:
  1782. kfree(req);
  1783. kfree(resp);
  1784. return ret;
  1785. }
  1786. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1787. {
  1788. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1789. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1790. struct qmi_txn txn;
  1791. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1792. int ret = 0;
  1793. int i;
  1794. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1795. plat_priv->driver_state);
  1796. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1797. if (!req)
  1798. return -ENOMEM;
  1799. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1800. if (!resp) {
  1801. kfree(req);
  1802. return -ENOMEM;
  1803. }
  1804. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1805. for (i = 0; i < req->mem_seg_len; i++) {
  1806. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1807. qdss_mem[i].va, &qdss_mem[i].pa,
  1808. qdss_mem[i].size, qdss_mem[i].type);
  1809. req->mem_seg[i].addr = qdss_mem[i].pa;
  1810. req->mem_seg[i].size = qdss_mem[i].size;
  1811. req->mem_seg[i].type = qdss_mem[i].type;
  1812. }
  1813. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1814. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1815. if (ret < 0) {
  1816. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1817. ret);
  1818. goto out;
  1819. }
  1820. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1821. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1822. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1823. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1824. if (ret < 0) {
  1825. qmi_txn_cancel(&txn);
  1826. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1827. ret);
  1828. goto out;
  1829. }
  1830. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1831. if (ret < 0) {
  1832. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1833. ret);
  1834. goto out;
  1835. }
  1836. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1837. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1838. resp->resp.result, resp->resp.error);
  1839. ret = -resp->resp.result;
  1840. goto out;
  1841. }
  1842. kfree(req);
  1843. kfree(resp);
  1844. return 0;
  1845. out:
  1846. kfree(req);
  1847. kfree(resp);
  1848. return ret;
  1849. }
  1850. static int cnss_wlfw_wfc_call_status_send_sync
  1851. (struct cnss_plat_data *plat_priv,
  1852. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1853. {
  1854. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1855. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1856. struct qmi_txn txn;
  1857. int ret = 0;
  1858. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1859. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1860. return -EINVAL;
  1861. }
  1862. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1863. if (!req)
  1864. return -ENOMEM;
  1865. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1866. if (!resp) {
  1867. kfree(req);
  1868. return -ENOMEM;
  1869. }
  1870. /**
  1871. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1872. * But in r2 update QMI structure is expanded and as an effect qmi
  1873. * decoded structures have padding. Thus we cannot use buffer design.
  1874. * For backward compatibility for r1 design copy only wfc_call_active
  1875. * value in hex buffer.
  1876. */
  1877. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1878. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1879. /* wfc_call_active is mandatory in IMS indication */
  1880. req->wfc_call_active_valid = 1;
  1881. req->wfc_call_active = ind_msg->wfc_call_active;
  1882. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1883. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1884. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1885. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1886. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1887. req->twt_ims_start = ind_msg->twt_ims_start;
  1888. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1889. req->twt_ims_int = ind_msg->twt_ims_int;
  1890. req->media_quality_valid = ind_msg->media_quality_valid;
  1891. req->media_quality =
  1892. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1893. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1894. plat_priv->driver_state);
  1895. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1896. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1897. if (ret < 0) {
  1898. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1899. ret);
  1900. goto out;
  1901. }
  1902. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1903. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1904. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1905. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1906. if (ret < 0) {
  1907. qmi_txn_cancel(&txn);
  1908. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1909. ret);
  1910. goto out;
  1911. }
  1912. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1913. if (ret < 0) {
  1914. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1915. ret);
  1916. goto out;
  1917. }
  1918. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1919. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1920. resp->resp.result, resp->resp.error);
  1921. ret = -resp->resp.result;
  1922. goto out;
  1923. }
  1924. ret = 0;
  1925. out:
  1926. kfree(req);
  1927. kfree(resp);
  1928. return ret;
  1929. }
  1930. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1931. {
  1932. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  1933. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  1934. struct qmi_txn txn;
  1935. int ret = 0;
  1936. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  1937. plat_priv->dynamic_feature,
  1938. plat_priv->driver_state);
  1939. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1940. if (!req)
  1941. return -ENOMEM;
  1942. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1943. if (!resp) {
  1944. kfree(req);
  1945. return -ENOMEM;
  1946. }
  1947. req->mask_valid = 1;
  1948. req->mask = plat_priv->dynamic_feature;
  1949. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1950. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  1951. if (ret < 0) {
  1952. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  1953. ret);
  1954. goto out;
  1955. }
  1956. ret = qmi_send_request
  1957. (&plat_priv->qmi_wlfw, NULL, &txn,
  1958. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  1959. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  1960. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  1961. if (ret < 0) {
  1962. qmi_txn_cancel(&txn);
  1963. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  1964. ret);
  1965. goto out;
  1966. }
  1967. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1968. if (ret < 0) {
  1969. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  1970. ret);
  1971. goto out;
  1972. }
  1973. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1974. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  1975. resp->resp.result, resp->resp.error);
  1976. ret = -resp->resp.result;
  1977. goto out;
  1978. }
  1979. out:
  1980. kfree(req);
  1981. kfree(resp);
  1982. return ret;
  1983. }
  1984. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  1985. void *cmd, int cmd_len)
  1986. {
  1987. struct wlfw_get_info_req_msg_v01 *req;
  1988. struct wlfw_get_info_resp_msg_v01 *resp;
  1989. struct qmi_txn txn;
  1990. int ret = 0;
  1991. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  1992. type, cmd_len, plat_priv->driver_state);
  1993. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  1994. return -EINVAL;
  1995. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1996. if (!req)
  1997. return -ENOMEM;
  1998. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1999. if (!resp) {
  2000. kfree(req);
  2001. return -ENOMEM;
  2002. }
  2003. req->type = type;
  2004. req->data_len = cmd_len;
  2005. memcpy(req->data, cmd, req->data_len);
  2006. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2007. wlfw_get_info_resp_msg_v01_ei, resp);
  2008. if (ret < 0) {
  2009. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2010. ret);
  2011. goto out;
  2012. }
  2013. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2014. QMI_WLFW_GET_INFO_REQ_V01,
  2015. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2016. wlfw_get_info_req_msg_v01_ei, req);
  2017. if (ret < 0) {
  2018. qmi_txn_cancel(&txn);
  2019. cnss_pr_err("Failed to send get info request, err: %d\n",
  2020. ret);
  2021. goto out;
  2022. }
  2023. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2024. if (ret < 0) {
  2025. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2026. ret);
  2027. goto out;
  2028. }
  2029. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2030. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2031. resp->resp.result, resp->resp.error);
  2032. ret = -resp->resp.result;
  2033. goto out;
  2034. }
  2035. kfree(req);
  2036. kfree(resp);
  2037. return 0;
  2038. out:
  2039. kfree(req);
  2040. kfree(resp);
  2041. return ret;
  2042. }
  2043. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2044. {
  2045. return QMI_WLFW_TIMEOUT_MS;
  2046. }
  2047. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2048. struct sockaddr_qrtr *sq,
  2049. struct qmi_txn *txn, const void *data)
  2050. {
  2051. struct cnss_plat_data *plat_priv =
  2052. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2053. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2054. int i;
  2055. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2056. if (!txn) {
  2057. cnss_pr_err("Spurious indication\n");
  2058. return;
  2059. }
  2060. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2061. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2062. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2063. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2064. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2065. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2066. if (!plat_priv->fw_mem[i].va &&
  2067. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2068. plat_priv->fw_mem[i].attrs |=
  2069. DMA_ATTR_FORCE_CONTIGUOUS;
  2070. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2071. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2072. }
  2073. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2074. 0, NULL);
  2075. }
  2076. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2077. struct sockaddr_qrtr *sq,
  2078. struct qmi_txn *txn, const void *data)
  2079. {
  2080. struct cnss_plat_data *plat_priv =
  2081. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2082. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2083. if (!txn) {
  2084. cnss_pr_err("Spurious indication\n");
  2085. return;
  2086. }
  2087. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2088. 0, NULL);
  2089. }
  2090. /**
  2091. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2092. *
  2093. * This event is not required for HST/ HSP as FW calibration done is
  2094. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2095. */
  2096. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2097. struct sockaddr_qrtr *sq,
  2098. struct qmi_txn *txn, const void *data)
  2099. {
  2100. struct cnss_plat_data *plat_priv =
  2101. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2102. struct cnss_cal_info *cal_info;
  2103. if (!txn) {
  2104. cnss_pr_err("Spurious indication\n");
  2105. return;
  2106. }
  2107. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2108. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2109. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2110. return;
  2111. }
  2112. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2113. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2114. if (!cal_info)
  2115. return;
  2116. cal_info->cal_status = CNSS_CAL_DONE;
  2117. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2118. 0, cal_info);
  2119. }
  2120. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2121. struct sockaddr_qrtr *sq,
  2122. struct qmi_txn *txn, const void *data)
  2123. {
  2124. struct cnss_plat_data *plat_priv =
  2125. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2126. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2127. if (!txn) {
  2128. cnss_pr_err("Spurious indication\n");
  2129. return;
  2130. }
  2131. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2132. }
  2133. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2134. struct sockaddr_qrtr *sq,
  2135. struct qmi_txn *txn, const void *data)
  2136. {
  2137. struct cnss_plat_data *plat_priv =
  2138. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2139. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2140. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2141. if (!txn) {
  2142. cnss_pr_err("Spurious indication\n");
  2143. return;
  2144. }
  2145. if (ind_msg->pwr_pin_result_valid)
  2146. plat_priv->pin_result.fw_pwr_pin_result =
  2147. ind_msg->pwr_pin_result;
  2148. if (ind_msg->phy_io_pin_result_valid)
  2149. plat_priv->pin_result.fw_phy_io_pin_result =
  2150. ind_msg->phy_io_pin_result;
  2151. if (ind_msg->rf_pin_result_valid)
  2152. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2153. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2154. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2155. ind_msg->rf_pin_result);
  2156. }
  2157. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2158. u32 cal_file_download_size)
  2159. {
  2160. struct wlfw_cal_report_req_msg_v01 req = {0};
  2161. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2162. struct qmi_txn txn;
  2163. int ret = 0;
  2164. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2165. cal_file_download_size, plat_priv->driver_state);
  2166. req.cal_file_download_size_valid = 1;
  2167. req.cal_file_download_size = cal_file_download_size;
  2168. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2169. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2170. if (ret < 0) {
  2171. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2172. ret);
  2173. goto out;
  2174. }
  2175. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2176. QMI_WLFW_CAL_REPORT_REQ_V01,
  2177. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2178. wlfw_cal_report_req_msg_v01_ei, &req);
  2179. if (ret < 0) {
  2180. qmi_txn_cancel(&txn);
  2181. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2182. ret);
  2183. goto out;
  2184. }
  2185. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2186. if (ret < 0) {
  2187. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2188. ret);
  2189. goto out;
  2190. }
  2191. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2192. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2193. resp.resp.result, resp.resp.error);
  2194. ret = -resp.resp.result;
  2195. goto out;
  2196. }
  2197. out:
  2198. return ret;
  2199. }
  2200. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2201. struct sockaddr_qrtr *sq,
  2202. struct qmi_txn *txn, const void *data)
  2203. {
  2204. struct cnss_plat_data *plat_priv =
  2205. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2206. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2207. struct cnss_cal_info *cal_info;
  2208. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2209. ind->cal_file_upload_size);
  2210. cnss_pr_info("Calibration took %d ms\n",
  2211. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2212. if (!txn) {
  2213. cnss_pr_err("Spurious indication\n");
  2214. return;
  2215. }
  2216. if (ind->cal_file_upload_size_valid)
  2217. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2218. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2219. if (!cal_info)
  2220. return;
  2221. cal_info->cal_status = CNSS_CAL_DONE;
  2222. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2223. 0, cal_info);
  2224. }
  2225. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2226. struct sockaddr_qrtr *sq,
  2227. struct qmi_txn *txn,
  2228. const void *data)
  2229. {
  2230. struct cnss_plat_data *plat_priv =
  2231. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2232. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2233. int i;
  2234. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2235. if (!txn) {
  2236. cnss_pr_err("Spurious indication\n");
  2237. return;
  2238. }
  2239. if (plat_priv->qdss_mem_seg_len) {
  2240. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2241. plat_priv->qdss_mem_seg_len);
  2242. return;
  2243. }
  2244. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2245. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2246. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2247. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2248. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2249. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2250. }
  2251. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2252. 0, NULL);
  2253. }
  2254. /**
  2255. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2256. *
  2257. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2258. * fw memory segment for dumping to file system. Only one type of mem can be
  2259. * saved per indication and is provided in mem seg index 0.
  2260. *
  2261. * Return: None
  2262. */
  2263. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2264. struct sockaddr_qrtr *sq,
  2265. struct qmi_txn *txn,
  2266. const void *data)
  2267. {
  2268. struct cnss_plat_data *plat_priv =
  2269. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2270. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2271. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2272. int i = 0;
  2273. if (!txn || !data) {
  2274. cnss_pr_err("Spurious indication\n");
  2275. return;
  2276. }
  2277. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2278. ind_msg->source, ind_msg->mem_seg_valid,
  2279. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2280. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2281. if (!event_data)
  2282. return;
  2283. event_data->mem_type = ind_msg->mem_seg[0].type;
  2284. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2285. event_data->total_size = ind_msg->total_size;
  2286. if (ind_msg->mem_seg_valid) {
  2287. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2288. cnss_pr_err("Invalid seg len indication\n");
  2289. goto free_event_data;
  2290. }
  2291. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2292. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2293. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2294. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2295. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2296. goto free_event_data;
  2297. }
  2298. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2299. i, ind_msg->mem_seg[i].addr,
  2300. ind_msg->mem_seg[i].size);
  2301. }
  2302. }
  2303. if (ind_msg->file_name_valid)
  2304. strlcpy(event_data->file_name, ind_msg->file_name,
  2305. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2306. if (ind_msg->source == 1) {
  2307. if (!ind_msg->file_name_valid)
  2308. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2309. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2310. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2311. 0, event_data);
  2312. } else {
  2313. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2314. if (!ind_msg->file_name_valid)
  2315. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2316. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2317. } else {
  2318. if (!ind_msg->file_name_valid)
  2319. strlcpy(event_data->file_name, "fw_mem_dump",
  2320. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2321. }
  2322. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2323. 0, event_data);
  2324. }
  2325. return;
  2326. free_event_data:
  2327. kfree(event_data);
  2328. }
  2329. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2330. struct sockaddr_qrtr *sq,
  2331. struct qmi_txn *txn,
  2332. const void *data)
  2333. {
  2334. struct cnss_plat_data *plat_priv =
  2335. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2336. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2337. 0, NULL);
  2338. }
  2339. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2340. struct sockaddr_qrtr *sq,
  2341. struct qmi_txn *txn,
  2342. const void *data)
  2343. {
  2344. struct cnss_plat_data *plat_priv =
  2345. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2346. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2347. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2348. if (!txn) {
  2349. cnss_pr_err("Spurious indication\n");
  2350. return;
  2351. }
  2352. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2353. ind_msg->data_len, ind_msg->type,
  2354. ind_msg->is_last, ind_msg->seq_no);
  2355. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2356. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2357. (void *)ind_msg->data,
  2358. ind_msg->data_len);
  2359. }
  2360. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2361. (struct cnss_plat_data *plat_priv,
  2362. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2363. {
  2364. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2365. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2366. struct qmi_txn txn;
  2367. int ret = 0;
  2368. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2369. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2370. return -EINVAL;
  2371. }
  2372. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2373. if (!req)
  2374. return -ENOMEM;
  2375. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2376. if (!resp) {
  2377. kfree(req);
  2378. return -ENOMEM;
  2379. }
  2380. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2381. req->twt_sta_start = ind_msg->twt_sta_start;
  2382. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2383. req->twt_sta_int = ind_msg->twt_sta_int;
  2384. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2385. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2386. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2387. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2388. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2389. req->twt_sta_dl = req->twt_sta_dl;
  2390. req->twt_sta_config_changed_valid =
  2391. ind_msg->twt_sta_config_changed_valid;
  2392. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2393. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2394. plat_priv->driver_state);
  2395. ret =
  2396. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2397. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2398. resp);
  2399. if (ret < 0) {
  2400. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2401. ret);
  2402. goto out;
  2403. }
  2404. ret =
  2405. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2406. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2407. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2408. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2409. if (ret < 0) {
  2410. qmi_txn_cancel(&txn);
  2411. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2412. goto out;
  2413. }
  2414. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2415. if (ret < 0) {
  2416. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2417. goto out;
  2418. }
  2419. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2420. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2421. resp->resp.result, resp->resp.error);
  2422. ret = -resp->resp.result;
  2423. goto out;
  2424. }
  2425. ret = 0;
  2426. out:
  2427. kfree(req);
  2428. kfree(resp);
  2429. return ret;
  2430. }
  2431. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2432. void *data)
  2433. {
  2434. int ret;
  2435. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2436. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2437. kfree(data);
  2438. return ret;
  2439. }
  2440. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2441. struct sockaddr_qrtr *sq,
  2442. struct qmi_txn *txn,
  2443. const void *data)
  2444. {
  2445. struct cnss_plat_data *plat_priv =
  2446. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2447. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2448. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2449. if (!txn) {
  2450. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2451. return;
  2452. }
  2453. if (!ind_msg) {
  2454. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2455. return;
  2456. }
  2457. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2458. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2459. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2460. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2461. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2462. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2463. ind_msg->twt_sta_config_changed_valid,
  2464. ind_msg->twt_sta_config_changed);
  2465. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2466. if (!event_data)
  2467. return;
  2468. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2469. event_data);
  2470. }
  2471. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2472. {
  2473. .type = QMI_INDICATION,
  2474. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2475. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2476. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2477. .fn = cnss_wlfw_request_mem_ind_cb
  2478. },
  2479. {
  2480. .type = QMI_INDICATION,
  2481. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2482. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2483. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2484. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2485. },
  2486. {
  2487. .type = QMI_INDICATION,
  2488. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2489. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2490. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2491. .fn = cnss_wlfw_fw_ready_ind_cb
  2492. },
  2493. {
  2494. .type = QMI_INDICATION,
  2495. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2496. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2497. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2498. .fn = cnss_wlfw_fw_init_done_ind_cb
  2499. },
  2500. {
  2501. .type = QMI_INDICATION,
  2502. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2503. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2504. .decoded_size =
  2505. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2506. .fn = cnss_wlfw_pin_result_ind_cb
  2507. },
  2508. {
  2509. .type = QMI_INDICATION,
  2510. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2511. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2512. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2513. .fn = cnss_wlfw_cal_done_ind_cb
  2514. },
  2515. {
  2516. .type = QMI_INDICATION,
  2517. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2518. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2519. .decoded_size =
  2520. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2521. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2522. },
  2523. {
  2524. .type = QMI_INDICATION,
  2525. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2526. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2527. .decoded_size =
  2528. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2529. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2530. },
  2531. {
  2532. .type = QMI_INDICATION,
  2533. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2534. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2535. .decoded_size =
  2536. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2537. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2538. },
  2539. {
  2540. .type = QMI_INDICATION,
  2541. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2542. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2543. .decoded_size =
  2544. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2545. .fn = cnss_wlfw_respond_get_info_ind_cb
  2546. },
  2547. {
  2548. .type = QMI_INDICATION,
  2549. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2550. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2551. .decoded_size =
  2552. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2553. .fn = cnss_wlfw_process_twt_cfg_ind
  2554. },
  2555. {}
  2556. };
  2557. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2558. void *data)
  2559. {
  2560. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2561. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2562. struct sockaddr_qrtr sq = { 0 };
  2563. int ret = 0;
  2564. if (!event_data)
  2565. return -EINVAL;
  2566. sq.sq_family = AF_QIPCRTR;
  2567. sq.sq_node = event_data->node;
  2568. sq.sq_port = event_data->port;
  2569. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2570. sizeof(sq), 0);
  2571. if (ret < 0) {
  2572. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2573. goto out;
  2574. }
  2575. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2576. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2577. plat_priv->driver_state);
  2578. kfree(data);
  2579. return 0;
  2580. out:
  2581. CNSS_QMI_ASSERT();
  2582. kfree(data);
  2583. return ret;
  2584. }
  2585. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2586. {
  2587. int ret = 0;
  2588. if (!plat_priv)
  2589. return -ENODEV;
  2590. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2591. cnss_pr_err("Unexpected WLFW server arrive\n");
  2592. CNSS_ASSERT(0);
  2593. return -EINVAL;
  2594. }
  2595. cnss_ignore_qmi_failure(false);
  2596. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2597. if (ret < 0)
  2598. goto out;
  2599. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2600. if (ret < 0) {
  2601. if (ret == -EALREADY)
  2602. ret = 0;
  2603. goto out;
  2604. }
  2605. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2606. if (ret < 0)
  2607. goto out;
  2608. return 0;
  2609. out:
  2610. return ret;
  2611. }
  2612. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2613. {
  2614. int ret;
  2615. if (!plat_priv)
  2616. return -ENODEV;
  2617. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2618. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2619. plat_priv->driver_state);
  2620. cnss_qmi_deinit(plat_priv);
  2621. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2622. ret = cnss_qmi_init(plat_priv);
  2623. if (ret < 0) {
  2624. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2625. CNSS_ASSERT(0);
  2626. }
  2627. return 0;
  2628. }
  2629. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2630. struct qmi_service *service)
  2631. {
  2632. struct cnss_plat_data *plat_priv =
  2633. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2634. struct cnss_qmi_event_server_arrive_data *event_data;
  2635. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2636. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2637. plat_priv->driver_state);
  2638. return 0;
  2639. }
  2640. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2641. service->node, service->port);
  2642. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2643. if (!event_data)
  2644. return -ENOMEM;
  2645. event_data->node = service->node;
  2646. event_data->port = service->port;
  2647. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2648. 0, event_data);
  2649. return 0;
  2650. }
  2651. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2652. struct qmi_service *service)
  2653. {
  2654. struct cnss_plat_data *plat_priv =
  2655. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2656. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2657. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2658. plat_priv->driver_state);
  2659. return;
  2660. }
  2661. cnss_pr_dbg("WLFW server exiting\n");
  2662. if (plat_priv) {
  2663. cnss_ignore_qmi_failure(true);
  2664. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2665. }
  2666. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2667. 0, NULL);
  2668. }
  2669. static struct qmi_ops qmi_wlfw_ops = {
  2670. .new_server = wlfw_new_server,
  2671. .del_server = wlfw_del_server,
  2672. };
  2673. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2674. {
  2675. int ret = 0;
  2676. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2677. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2678. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2679. if (ret < 0) {
  2680. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2681. ret);
  2682. goto out;
  2683. }
  2684. ret = qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2685. WLFW_SERVICE_VERS_V01, WLFW_SERVICE_INS_ID_V01);
  2686. if (ret < 0)
  2687. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2688. out:
  2689. return ret;
  2690. }
  2691. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2692. {
  2693. qmi_handle_release(&plat_priv->qmi_wlfw);
  2694. }
  2695. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2696. {
  2697. struct dms_get_mac_address_req_msg_v01 req;
  2698. struct dms_get_mac_address_resp_msg_v01 resp;
  2699. struct qmi_txn txn;
  2700. int ret = 0;
  2701. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2702. cnss_pr_err("DMS QMI connection not established\n");
  2703. return -EINVAL;
  2704. }
  2705. cnss_pr_dbg("Requesting DMS MAC address");
  2706. memset(&resp, 0, sizeof(resp));
  2707. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2708. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2709. if (ret < 0) {
  2710. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2711. ret);
  2712. goto out;
  2713. }
  2714. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2715. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2716. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2717. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2718. dms_get_mac_address_req_msg_v01_ei, &req);
  2719. if (ret < 0) {
  2720. qmi_txn_cancel(&txn);
  2721. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2722. ret);
  2723. goto out;
  2724. }
  2725. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2726. if (ret < 0) {
  2727. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2728. ret);
  2729. goto out;
  2730. }
  2731. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2732. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2733. resp.resp.result, resp.resp.error);
  2734. ret = -resp.resp.result;
  2735. goto out;
  2736. }
  2737. if (!resp.mac_address_valid ||
  2738. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2739. cnss_pr_err("Invalid MAC address received from DMS\n");
  2740. plat_priv->dms.mac_valid = false;
  2741. goto out;
  2742. }
  2743. plat_priv->dms.mac_valid = true;
  2744. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2745. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2746. out:
  2747. return ret;
  2748. }
  2749. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2750. unsigned int node, unsigned int port)
  2751. {
  2752. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2753. struct sockaddr_qrtr sq = {0};
  2754. int ret = 0;
  2755. sq.sq_family = AF_QIPCRTR;
  2756. sq.sq_node = node;
  2757. sq.sq_port = port;
  2758. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2759. sizeof(sq), 0);
  2760. if (ret < 0) {
  2761. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2762. node, port);
  2763. goto out;
  2764. }
  2765. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2766. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2767. plat_priv->driver_state);
  2768. out:
  2769. return ret;
  2770. }
  2771. static int dms_new_server(struct qmi_handle *qmi_dms,
  2772. struct qmi_service *service)
  2773. {
  2774. struct cnss_plat_data *plat_priv =
  2775. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2776. if (!service)
  2777. return -EINVAL;
  2778. return cnss_dms_connect_to_server(plat_priv, service->node,
  2779. service->port);
  2780. }
  2781. static void cnss_dms_server_exit_work(struct work_struct *work)
  2782. {
  2783. int ret;
  2784. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  2785. cnss_dms_deinit(plat_priv);
  2786. cnss_pr_info("QMI DMS Server Exit");
  2787. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2788. ret = cnss_dms_init(plat_priv);
  2789. if (ret < 0)
  2790. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  2791. }
  2792. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  2793. static void dms_del_server(struct qmi_handle *qmi_dms,
  2794. struct qmi_service *service)
  2795. {
  2796. struct cnss_plat_data *plat_priv =
  2797. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2798. if (!plat_priv)
  2799. return;
  2800. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  2801. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  2802. plat_priv->driver_state);
  2803. return;
  2804. }
  2805. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2806. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2807. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2808. plat_priv->driver_state);
  2809. schedule_work(&cnss_dms_del_work);
  2810. }
  2811. void cnss_cancel_dms_work(void)
  2812. {
  2813. cancel_work_sync(&cnss_dms_del_work);
  2814. }
  2815. static struct qmi_ops qmi_dms_ops = {
  2816. .new_server = dms_new_server,
  2817. .del_server = dms_del_server,
  2818. };
  2819. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2820. {
  2821. int ret = 0;
  2822. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2823. &qmi_dms_ops, NULL);
  2824. if (ret < 0) {
  2825. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2826. goto out;
  2827. }
  2828. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2829. DMS_SERVICE_VERS_V01, 0);
  2830. if (ret < 0)
  2831. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2832. out:
  2833. return ret;
  2834. }
  2835. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2836. {
  2837. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  2838. qmi_handle_release(&plat_priv->qmi_dms);
  2839. }
  2840. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2841. {
  2842. int ret;
  2843. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2844. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2845. struct qmi_txn txn;
  2846. if (!plat_priv)
  2847. return -ENODEV;
  2848. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2849. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2850. if (!req)
  2851. return -ENOMEM;
  2852. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2853. if (!resp) {
  2854. kfree(req);
  2855. return -ENOMEM;
  2856. }
  2857. req->antenna = plat_priv->antenna;
  2858. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2859. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2860. if (ret < 0) {
  2861. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2862. ret);
  2863. goto out;
  2864. }
  2865. ret = qmi_send_request
  2866. (&plat_priv->coex_qmi, NULL, &txn,
  2867. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2868. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2869. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2870. if (ret < 0) {
  2871. qmi_txn_cancel(&txn);
  2872. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2873. ret);
  2874. goto out;
  2875. }
  2876. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2877. if (ret < 0) {
  2878. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2879. ret);
  2880. goto out;
  2881. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2882. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2883. resp->resp.result, resp->resp.error);
  2884. ret = -resp->resp.result;
  2885. goto out;
  2886. }
  2887. if (resp->grant_valid)
  2888. plat_priv->grant = resp->grant;
  2889. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2890. kfree(resp);
  2891. kfree(req);
  2892. return 0;
  2893. out:
  2894. kfree(resp);
  2895. kfree(req);
  2896. return ret;
  2897. }
  2898. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2899. {
  2900. int ret;
  2901. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2902. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2903. struct qmi_txn txn;
  2904. if (!plat_priv)
  2905. return -ENODEV;
  2906. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2907. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2908. if (!req)
  2909. return -ENOMEM;
  2910. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2911. if (!resp) {
  2912. kfree(req);
  2913. return -ENOMEM;
  2914. }
  2915. req->antenna = plat_priv->antenna;
  2916. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2917. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  2918. if (ret < 0) {
  2919. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  2920. ret);
  2921. goto out;
  2922. }
  2923. ret = qmi_send_request
  2924. (&plat_priv->coex_qmi, NULL, &txn,
  2925. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  2926. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  2927. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  2928. if (ret < 0) {
  2929. qmi_txn_cancel(&txn);
  2930. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  2931. ret);
  2932. goto out;
  2933. }
  2934. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2935. if (ret < 0) {
  2936. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  2937. ret);
  2938. goto out;
  2939. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2940. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  2941. resp->resp.result, resp->resp.error);
  2942. ret = -resp->resp.result;
  2943. goto out;
  2944. }
  2945. kfree(resp);
  2946. kfree(req);
  2947. return 0;
  2948. out:
  2949. kfree(resp);
  2950. kfree(req);
  2951. return ret;
  2952. }
  2953. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  2954. {
  2955. int ret;
  2956. struct wlfw_subsys_restart_level_req_msg_v01 req;
  2957. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  2958. u8 pcss_enabled;
  2959. if (!plat_priv)
  2960. return -ENODEV;
  2961. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2962. cnss_pr_err("Can't send pcss cmd before fw ready\n");
  2963. return -EINVAL;
  2964. }
  2965. pcss_enabled = plat_priv->recovery_pcss_enabled;
  2966. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  2967. req.restart_level_type_valid = 1;
  2968. req.restart_level_type = pcss_enabled;
  2969. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  2970. wlfw_subsys_restart_level_req_msg_v01_ei,
  2971. wlfw_subsys_restart_level_resp_msg_v01_ei,
  2972. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  2973. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  2974. QMI_WLFW_TIMEOUT_JF);
  2975. return ret;
  2976. }
  2977. static int coex_new_server(struct qmi_handle *qmi,
  2978. struct qmi_service *service)
  2979. {
  2980. struct cnss_plat_data *plat_priv =
  2981. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2982. struct sockaddr_qrtr sq = { 0 };
  2983. int ret = 0;
  2984. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  2985. service->node, service->port);
  2986. sq.sq_family = AF_QIPCRTR;
  2987. sq.sq_node = service->node;
  2988. sq.sq_port = service->port;
  2989. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2990. if (ret < 0) {
  2991. cnss_pr_err("Fail to connect to remote service port\n");
  2992. return ret;
  2993. }
  2994. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2995. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  2996. plat_priv->driver_state);
  2997. return 0;
  2998. }
  2999. static void coex_del_server(struct qmi_handle *qmi,
  3000. struct qmi_service *service)
  3001. {
  3002. struct cnss_plat_data *plat_priv =
  3003. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3004. cnss_pr_dbg("COEX server exit\n");
  3005. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3006. }
  3007. static struct qmi_ops coex_qmi_ops = {
  3008. .new_server = coex_new_server,
  3009. .del_server = coex_del_server,
  3010. };
  3011. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3012. { int ret;
  3013. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3014. COEX_SERVICE_MAX_MSG_LEN,
  3015. &coex_qmi_ops, NULL);
  3016. if (ret < 0)
  3017. return ret;
  3018. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3019. COEX_SERVICE_VERS_V01, 0);
  3020. return ret;
  3021. }
  3022. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3023. {
  3024. qmi_handle_release(&plat_priv->coex_qmi);
  3025. }
  3026. /* IMS Service */
  3027. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3028. {
  3029. int ret;
  3030. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3031. struct qmi_txn *txn;
  3032. if (!plat_priv)
  3033. return -ENODEV;
  3034. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3035. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3036. if (!req)
  3037. return -ENOMEM;
  3038. req->wfc_call_status_valid = 1;
  3039. req->wfc_call_status = 1;
  3040. txn = &plat_priv->txn;
  3041. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3042. if (ret < 0) {
  3043. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3044. ret);
  3045. goto out;
  3046. }
  3047. ret = qmi_send_request
  3048. (&plat_priv->ims_qmi, NULL, txn,
  3049. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3050. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3051. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3052. if (ret < 0) {
  3053. qmi_txn_cancel(txn);
  3054. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3055. ret);
  3056. goto out;
  3057. }
  3058. kfree(req);
  3059. return 0;
  3060. out:
  3061. kfree(req);
  3062. return ret;
  3063. }
  3064. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3065. struct sockaddr_qrtr *sq,
  3066. struct qmi_txn *txn,
  3067. const void *data)
  3068. {
  3069. const
  3070. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3071. data;
  3072. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3073. if (!txn) {
  3074. cnss_pr_err("spurious response\n");
  3075. return;
  3076. }
  3077. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3078. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3079. resp->resp.result, resp->resp.error);
  3080. txn->result = -resp->resp.result;
  3081. }
  3082. }
  3083. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3084. void *data)
  3085. {
  3086. int ret;
  3087. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3088. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3089. kfree(data);
  3090. return ret;
  3091. }
  3092. static void
  3093. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3094. struct sockaddr_qrtr *sq,
  3095. struct qmi_txn *txn, const void *data)
  3096. {
  3097. struct cnss_plat_data *plat_priv =
  3098. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3099. const
  3100. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3101. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3102. if (!txn) {
  3103. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3104. return;
  3105. }
  3106. if (!ind_msg) {
  3107. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3108. return;
  3109. }
  3110. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3111. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3112. ind_msg->all_wfc_calls_held,
  3113. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3114. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3115. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3116. ind_msg->media_quality_valid, ind_msg->media_quality);
  3117. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3118. if (!event_data)
  3119. return;
  3120. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3121. 0, event_data);
  3122. }
  3123. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3124. {
  3125. .type = QMI_RESPONSE,
  3126. .msg_id =
  3127. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3128. .ei =
  3129. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3130. .decoded_size = sizeof(struct
  3131. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3132. .fn = ims_subscribe_for_indication_resp_cb
  3133. },
  3134. {
  3135. .type = QMI_INDICATION,
  3136. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3137. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3138. .decoded_size =
  3139. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3140. .fn = cnss_ims_process_wfc_call_ind_cb
  3141. },
  3142. {}
  3143. };
  3144. static int ims_new_server(struct qmi_handle *qmi,
  3145. struct qmi_service *service)
  3146. {
  3147. struct cnss_plat_data *plat_priv =
  3148. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3149. struct sockaddr_qrtr sq = { 0 };
  3150. int ret = 0;
  3151. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3152. service->node, service->port);
  3153. sq.sq_family = AF_QIPCRTR;
  3154. sq.sq_node = service->node;
  3155. sq.sq_port = service->port;
  3156. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3157. if (ret < 0) {
  3158. cnss_pr_err("Fail to connect to remote service port\n");
  3159. return ret;
  3160. }
  3161. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3162. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3163. plat_priv->driver_state);
  3164. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3165. return ret;
  3166. }
  3167. static void ims_del_server(struct qmi_handle *qmi,
  3168. struct qmi_service *service)
  3169. {
  3170. struct cnss_plat_data *plat_priv =
  3171. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3172. cnss_pr_dbg("IMS server exit\n");
  3173. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3174. }
  3175. static struct qmi_ops ims_qmi_ops = {
  3176. .new_server = ims_new_server,
  3177. .del_server = ims_del_server,
  3178. };
  3179. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3180. { int ret;
  3181. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3182. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3183. &ims_qmi_ops, qmi_ims_msg_handlers);
  3184. if (ret < 0)
  3185. return ret;
  3186. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3187. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3188. return ret;
  3189. }
  3190. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3191. {
  3192. qmi_handle_release(&plat_priv->ims_qmi);
  3193. }