power.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #if IS_ENABLED(CONFIG_MSM_QMP)
  8. #include <linux/mailbox/qmp.h>
  9. #endif
  10. #include <linux/of.h>
  11. #include <linux/pinctrl/consumer.h>
  12. #include <linux/regulator/consumer.h>
  13. #include <soc/qcom/cmd-db.h>
  14. #include "main.h"
  15. #include "qmi.h"
  16. #include "debug.h"
  17. #include "power.h"
  18. static struct icnss_vreg_cfg icnss_wcn6750_vreg_list[] = {
  19. {"vdd-cx-mx", 824000, 952000, 0, 0, 0, false, true},
  20. {"vdd-1.8-xo", 1872000, 1872000, 0, 0, 0, false, true},
  21. {"vdd-1.3-rfa", 1256000, 1352000, 0, 0, 0, false, true},
  22. };
  23. static struct icnss_vreg_cfg icnss_adrestea_vreg_list[] = {
  24. {"vdd-cx-mx", 752000, 752000, 0, 0, 0, false, true},
  25. {"vdd-1.8-xo", 1800000, 1800000, 0, 0, 0, false, true},
  26. {"vdd-1.3-rfa", 1304000, 1304000, 0, 0, 0, false, true},
  27. {"vdd-3.3-ch1", 3312000, 3312000, 0, 0, 0, false, true},
  28. {"vdd-3.3-ch0", 3312000, 3312000, 0, 0, 0, false, true},
  29. };
  30. static struct icnss_clk_cfg icnss_clk_list[] = {
  31. {"rf_clk", 0, 0},
  32. };
  33. static struct icnss_clk_cfg icnss_adrestea_clk_list[] = {
  34. {"cxo_ref_clk_pin", 0, 0},
  35. };
  36. #define ICNSS_VREG_LIST_SIZE ARRAY_SIZE(icnss_wcn6750_vreg_list)
  37. #define ICNSS_VREG_ADRESTEA_LIST_SIZE ARRAY_SIZE(icnss_adrestea_vreg_list)
  38. #define ICNSS_CLK_LIST_SIZE ARRAY_SIZE(icnss_clk_list)
  39. #define ICNSS_CLK_ADRESTEA_LIST_SIZE ARRAY_SIZE(icnss_adrestea_clk_list)
  40. #define ICNSS_CHAIN1_REGULATOR "vdd-3.3-ch1"
  41. #define MAX_PROP_SIZE 32
  42. #define ICNSS_THRESHOLD_HIGH 3600000
  43. #define ICNSS_THRESHOLD_LOW 3450000
  44. #define ICNSS_THRESHOLD_GUARD 20000
  45. #define BT_CXMX_VOLTAGE_MV 950
  46. #define ICNSS_MBOX_MSG_MAX_LEN 64
  47. #define ICNSS_MBOX_TIMEOUT_MS 1000
  48. /**
  49. * enum icnss_vreg_param: Voltage regulator TCS param
  50. * @ICNSS_VREG_VOLTAGE: Provides voltage level to be configured in TCS
  51. * @ICNSS_VREG_MODE: Regulator mode
  52. * @ICNSS_VREG_ENABLE: Set Voltage regulator enable config in TCS
  53. */
  54. enum icnss_vreg_param {
  55. ICNSS_VREG_VOLTAGE,
  56. ICNSS_VREG_MODE,
  57. ICNSS_VREG_ENABLE,
  58. };
  59. /**
  60. * enum icnss_tcs_seq: TCS sequence ID for trigger
  61. * ICNSS_TCS_UP_SEQ: TCS Sequence based on up trigger / Wake TCS
  62. * ICNSS_TCS_DOWN_SEQ: TCS Sequence based on down trigger / Sleep TCS
  63. * ICNSS_TCS_ALL_SEQ: Update for both up and down triggers
  64. */
  65. enum icnss_tcs_seq {
  66. ICNSS_TCS_UP_SEQ,
  67. ICNSS_TCS_DOWN_SEQ,
  68. ICNSS_TCS_ALL_SEQ,
  69. };
  70. static int icnss_get_vreg_single(struct icnss_priv *priv,
  71. struct icnss_vreg_info *vreg)
  72. {
  73. int ret = 0;
  74. struct device *dev = NULL;
  75. struct regulator *reg = NULL;
  76. const __be32 *prop = NULL;
  77. char prop_name[MAX_PROP_SIZE] = {0};
  78. int len = 0;
  79. int i;
  80. dev = &priv->pdev->dev;
  81. reg = devm_regulator_get_optional(dev, vreg->cfg.name);
  82. if (IS_ERR(reg)) {
  83. ret = PTR_ERR(reg);
  84. if (ret == -ENODEV) {
  85. return ret;
  86. } else if (ret == -EPROBE_DEFER) {
  87. icnss_pr_info("EPROBE_DEFER for regulator: %s\n",
  88. vreg->cfg.name);
  89. goto out;
  90. } else if (priv->device_id == ADRASTEA_DEVICE_ID) {
  91. if (vreg->cfg.required) {
  92. icnss_pr_err("Regulator %s doesn't exist: %d\n",
  93. vreg->cfg.name, ret);
  94. goto out;
  95. } else {
  96. icnss_pr_dbg("Optional regulator %s doesn't exist: %d\n",
  97. vreg->cfg.name, ret);
  98. goto done;
  99. }
  100. } else {
  101. icnss_pr_err("Failed to get regulator %s, err = %d\n",
  102. vreg->cfg.name, ret);
  103. goto out;
  104. }
  105. }
  106. vreg->reg = reg;
  107. snprintf(prop_name, MAX_PROP_SIZE, "qcom,%s-config",
  108. vreg->cfg.name);
  109. prop = of_get_property(dev->of_node, prop_name, &len);
  110. icnss_pr_dbg("Got regulator config, prop: %s, len: %d\n",
  111. prop_name, len);
  112. if (!prop || len < (2 * sizeof(__be32))) {
  113. icnss_pr_dbg("Property %s %s, use default\n", prop_name,
  114. prop ? "invalid format" : "doesn't exist");
  115. goto done;
  116. }
  117. for (i = 0; (i * sizeof(__be32)) < len; i++) {
  118. switch (i) {
  119. case 0:
  120. vreg->cfg.min_uv = be32_to_cpup(&prop[0]);
  121. break;
  122. case 1:
  123. vreg->cfg.max_uv = be32_to_cpup(&prop[1]);
  124. break;
  125. case 2:
  126. vreg->cfg.load_ua = be32_to_cpup(&prop[2]);
  127. break;
  128. case 3:
  129. vreg->cfg.delay_us = be32_to_cpup(&prop[3]);
  130. break;
  131. case 4:
  132. if (priv->device_id == WCN6750_DEVICE_ID)
  133. vreg->cfg.need_unvote = be32_to_cpup(&prop[4]);
  134. else
  135. vreg->cfg.need_unvote = 0;
  136. break;
  137. default:
  138. icnss_pr_dbg("Property %s, ignoring value at %d\n",
  139. prop_name, i);
  140. break;
  141. }
  142. }
  143. done:
  144. icnss_pr_dbg("Got regulator: %s, min_uv: %u, max_uv: %u, load_ua: %u, delay_us: %u, need_unvote: %u\n",
  145. vreg->cfg.name, vreg->cfg.min_uv,
  146. vreg->cfg.max_uv, vreg->cfg.load_ua,
  147. vreg->cfg.delay_us, vreg->cfg.need_unvote);
  148. return 0;
  149. out:
  150. return ret;
  151. }
  152. static int icnss_vreg_on_single(struct icnss_vreg_info *vreg)
  153. {
  154. int ret = 0;
  155. if (vreg->enabled) {
  156. icnss_pr_dbg("Regulator %s is already enabled\n",
  157. vreg->cfg.name);
  158. return 0;
  159. }
  160. icnss_pr_dbg("Regulator %s is being enabled\n", vreg->cfg.name);
  161. if (vreg->cfg.min_uv != 0 && vreg->cfg.max_uv != 0) {
  162. ret = regulator_set_voltage(vreg->reg,
  163. vreg->cfg.min_uv,
  164. vreg->cfg.max_uv);
  165. if (ret) {
  166. icnss_pr_err("Failed to set voltage for regulator %s, min_uv: %u, max_uv: %u, err = %d\n",
  167. vreg->cfg.name, vreg->cfg.min_uv,
  168. vreg->cfg.max_uv, ret);
  169. goto out;
  170. }
  171. }
  172. if (vreg->cfg.load_ua) {
  173. ret = regulator_set_load(vreg->reg,
  174. vreg->cfg.load_ua);
  175. if (ret < 0) {
  176. icnss_pr_err("Failed to set load for regulator %s, load: %u, err = %d\n",
  177. vreg->cfg.name, vreg->cfg.load_ua,
  178. ret);
  179. goto out;
  180. }
  181. }
  182. if (vreg->cfg.delay_us)
  183. udelay(vreg->cfg.delay_us);
  184. ret = regulator_enable(vreg->reg);
  185. if (ret) {
  186. icnss_pr_err("Failed to enable regulator %s, err = %d\n",
  187. vreg->cfg.name, ret);
  188. goto out;
  189. }
  190. vreg->enabled = true;
  191. out:
  192. return ret;
  193. }
  194. static int icnss_vreg_unvote_single(struct icnss_vreg_info *vreg)
  195. {
  196. int ret = 0;
  197. if (!vreg->enabled) {
  198. icnss_pr_dbg("Regulator %s is already disabled\n",
  199. vreg->cfg.name);
  200. return 0;
  201. }
  202. icnss_pr_dbg("Removing vote for Regulator %s\n", vreg->cfg.name);
  203. if (vreg->cfg.load_ua) {
  204. ret = regulator_set_load(vreg->reg, 0);
  205. if (ret < 0)
  206. icnss_pr_err("Failed to set load for regulator %s, err = %d\n",
  207. vreg->cfg.name, ret);
  208. }
  209. if (vreg->cfg.min_uv != 0 && vreg->cfg.max_uv != 0) {
  210. ret = regulator_set_voltage(vreg->reg, 0,
  211. vreg->cfg.max_uv);
  212. if (ret)
  213. icnss_pr_err("Failed to set voltage for regulator %s, err = %d\n",
  214. vreg->cfg.name, ret);
  215. }
  216. return ret;
  217. }
  218. static int icnss_vreg_off_single(struct icnss_vreg_info *vreg)
  219. {
  220. int ret = 0;
  221. if (!vreg->enabled) {
  222. icnss_pr_dbg("Regulator %s is already disabled\n",
  223. vreg->cfg.name);
  224. return 0;
  225. }
  226. icnss_pr_dbg("Regulator %s is being disabled\n",
  227. vreg->cfg.name);
  228. ret = regulator_disable(vreg->reg);
  229. if (ret)
  230. icnss_pr_err("Failed to disable regulator %s, err = %d\n",
  231. vreg->cfg.name, ret);
  232. if (vreg->cfg.load_ua) {
  233. ret = regulator_set_load(vreg->reg, 0);
  234. if (ret < 0)
  235. icnss_pr_err("Failed to set load for regulator %s, err = %d\n",
  236. vreg->cfg.name, ret);
  237. }
  238. if (vreg->cfg.min_uv != 0 && vreg->cfg.max_uv != 0) {
  239. ret = regulator_set_voltage(vreg->reg, 0,
  240. vreg->cfg.max_uv);
  241. if (ret)
  242. icnss_pr_err("Failed to set voltage for regulator %s, err = %d\n",
  243. vreg->cfg.name, ret);
  244. }
  245. vreg->enabled = false;
  246. return ret;
  247. }
  248. static struct icnss_vreg_cfg *get_vreg_list(u32 *vreg_list_size,
  249. unsigned long device_id)
  250. {
  251. switch (device_id) {
  252. case WCN6750_DEVICE_ID:
  253. *vreg_list_size = ICNSS_VREG_LIST_SIZE;
  254. return icnss_wcn6750_vreg_list;
  255. case ADRASTEA_DEVICE_ID:
  256. *vreg_list_size = ICNSS_VREG_ADRESTEA_LIST_SIZE;
  257. return icnss_adrestea_vreg_list;
  258. default:
  259. icnss_pr_err("Unsupported device_id 0x%x\n", device_id);
  260. *vreg_list_size = 0;
  261. return NULL;
  262. }
  263. }
  264. int icnss_get_vreg(struct icnss_priv *priv)
  265. {
  266. int ret = 0;
  267. int i;
  268. struct icnss_vreg_info *vreg;
  269. struct icnss_vreg_cfg *vreg_cfg = NULL;
  270. struct list_head *vreg_list = &priv->vreg_list;
  271. struct device *dev = &priv->pdev->dev;
  272. u32 vreg_list_size = 0;
  273. vreg_cfg = get_vreg_list(&vreg_list_size, priv->device_id);
  274. if (!vreg_cfg)
  275. return -EINVAL;
  276. for (i = 0; i < vreg_list_size; i++) {
  277. vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
  278. if (!vreg)
  279. return -ENOMEM;
  280. memcpy(&vreg->cfg, &vreg_cfg[i], sizeof(vreg->cfg));
  281. ret = icnss_get_vreg_single(priv, vreg);
  282. if (ret != 0) {
  283. if (ret == -ENODEV)
  284. continue;
  285. else
  286. return ret;
  287. }
  288. list_add_tail(&vreg->list, vreg_list);
  289. }
  290. return 0;
  291. }
  292. void icnss_put_vreg(struct icnss_priv *priv)
  293. {
  294. struct list_head *vreg_list = &priv->vreg_list;
  295. struct icnss_vreg_info *vreg = NULL;
  296. while (!list_empty(vreg_list)) {
  297. vreg = list_first_entry(vreg_list,
  298. struct icnss_vreg_info, list);
  299. list_del(&vreg->list);
  300. }
  301. }
  302. static int icnss_vreg_on(struct icnss_priv *priv)
  303. {
  304. struct list_head *vreg_list = &priv->vreg_list;
  305. struct icnss_vreg_info *vreg = NULL;
  306. int ret = 0;
  307. list_for_each_entry(vreg, vreg_list, list) {
  308. if (IS_ERR_OR_NULL(vreg->reg) || !vreg->cfg.is_supported)
  309. continue;
  310. if (!priv->chain_reg_info_updated &&
  311. !strcmp(ICNSS_CHAIN1_REGULATOR, vreg->cfg.name)) {
  312. priv->chain_reg_info_updated = true;
  313. if (!priv->is_chain1_supported) {
  314. vreg->cfg.is_supported = false;
  315. continue;
  316. }
  317. }
  318. ret = icnss_vreg_on_single(vreg);
  319. if (ret)
  320. break;
  321. }
  322. if (!ret)
  323. return 0;
  324. list_for_each_entry_continue_reverse(vreg, vreg_list, list) {
  325. if (IS_ERR_OR_NULL(vreg->reg) || !vreg->enabled)
  326. continue;
  327. icnss_vreg_off_single(vreg);
  328. }
  329. return ret;
  330. }
  331. static int icnss_vreg_off(struct icnss_priv *priv)
  332. {
  333. struct list_head *vreg_list = &priv->vreg_list;
  334. struct icnss_vreg_info *vreg = NULL;
  335. list_for_each_entry_reverse(vreg, vreg_list, list) {
  336. if (IS_ERR_OR_NULL(vreg->reg))
  337. continue;
  338. icnss_vreg_off_single(vreg);
  339. }
  340. return 0;
  341. }
  342. int icnss_vreg_unvote(struct icnss_priv *priv)
  343. {
  344. struct list_head *vreg_list = &priv->vreg_list;
  345. struct icnss_vreg_info *vreg = NULL;
  346. list_for_each_entry_reverse(vreg, vreg_list, list) {
  347. if (IS_ERR_OR_NULL(vreg->reg))
  348. continue;
  349. if (vreg->cfg.need_unvote)
  350. icnss_vreg_unvote_single(vreg);
  351. }
  352. return 0;
  353. }
  354. int icnss_get_clk_single(struct icnss_priv *priv,
  355. struct icnss_clk_info *clk_info)
  356. {
  357. struct device *dev = &priv->pdev->dev;
  358. struct clk *clk;
  359. int ret;
  360. clk = devm_clk_get(dev, clk_info->cfg.name);
  361. if (IS_ERR(clk)) {
  362. ret = PTR_ERR(clk);
  363. if (clk_info->cfg.required)
  364. icnss_pr_err("Failed to get clock %s, err = %d\n",
  365. clk_info->cfg.name, ret);
  366. else
  367. icnss_pr_dbg("Failed to get optional clock %s, err = %d\n",
  368. clk_info->cfg.name, ret);
  369. return ret;
  370. }
  371. clk_info->clk = clk;
  372. icnss_pr_dbg("Got clock: %s, freq: %u\n",
  373. clk_info->cfg.name, clk_info->cfg.freq);
  374. return 0;
  375. }
  376. static int icnss_clk_on_single(struct icnss_clk_info *clk_info)
  377. {
  378. int ret;
  379. if (clk_info->enabled) {
  380. icnss_pr_dbg("Clock %s is already enabled\n",
  381. clk_info->cfg.name);
  382. return 0;
  383. }
  384. icnss_pr_dbg("Clock %s is being enabled\n", clk_info->cfg.name);
  385. if (clk_info->cfg.freq) {
  386. ret = clk_set_rate(clk_info->clk, clk_info->cfg.freq);
  387. if (ret) {
  388. icnss_pr_err("Failed to set frequency %u for clock %s, err = %d\n",
  389. clk_info->cfg.freq, clk_info->cfg.name,
  390. ret);
  391. return ret;
  392. }
  393. }
  394. ret = clk_prepare_enable(clk_info->clk);
  395. if (ret) {
  396. icnss_pr_err("Failed to enable clock %s, err = %d\n",
  397. clk_info->cfg.name, ret);
  398. return ret;
  399. }
  400. clk_info->enabled = true;
  401. return 0;
  402. }
  403. static int icnss_clk_off_single(struct icnss_clk_info *clk_info)
  404. {
  405. if (!clk_info->enabled) {
  406. icnss_pr_dbg("Clock %s is already disabled\n",
  407. clk_info->cfg.name);
  408. return 0;
  409. }
  410. icnss_pr_dbg("Clock %s is being disabled\n", clk_info->cfg.name);
  411. clk_disable_unprepare(clk_info->clk);
  412. clk_info->enabled = false;
  413. return 0;
  414. }
  415. int icnss_get_clk(struct icnss_priv *priv)
  416. {
  417. struct device *dev;
  418. struct list_head *clk_list;
  419. struct icnss_clk_info *clk_info;
  420. struct icnss_clk_cfg *clk_cfg;
  421. int ret, i;
  422. u32 clk_list_size = 0;
  423. if (!priv)
  424. return -ENODEV;
  425. dev = &priv->pdev->dev;
  426. clk_list = &priv->clk_list;
  427. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  428. clk_cfg = icnss_adrestea_clk_list;
  429. clk_list_size = ICNSS_CLK_ADRESTEA_LIST_SIZE;
  430. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  431. clk_cfg = icnss_clk_list;
  432. clk_list_size = ICNSS_CLK_LIST_SIZE;
  433. }
  434. if (!list_empty(clk_list)) {
  435. icnss_pr_dbg("Clocks have already been updated\n");
  436. return 0;
  437. }
  438. for (i = 0; i < clk_list_size; i++) {
  439. clk_info = devm_kzalloc(dev, sizeof(*clk_info), GFP_KERNEL);
  440. if (!clk_info) {
  441. ret = -ENOMEM;
  442. goto cleanup;
  443. }
  444. memcpy(&clk_info->cfg, &clk_cfg[i],
  445. sizeof(clk_info->cfg));
  446. ret = icnss_get_clk_single(priv, clk_info);
  447. if (ret != 0) {
  448. if (clk_info->cfg.required)
  449. goto cleanup;
  450. else
  451. continue;
  452. }
  453. list_add_tail(&clk_info->list, clk_list);
  454. }
  455. return 0;
  456. cleanup:
  457. while (!list_empty(clk_list)) {
  458. clk_info = list_first_entry(clk_list, struct icnss_clk_info,
  459. list);
  460. list_del(&clk_info->list);
  461. }
  462. return ret;
  463. }
  464. void icnss_put_clk(struct icnss_priv *priv)
  465. {
  466. struct device *dev;
  467. struct list_head *clk_list;
  468. struct icnss_clk_info *clk_info;
  469. if (!priv)
  470. return;
  471. dev = &priv->pdev->dev;
  472. clk_list = &priv->clk_list;
  473. while (!list_empty(clk_list)) {
  474. clk_info = list_first_entry(clk_list, struct icnss_clk_info,
  475. list);
  476. list_del(&clk_info->list);
  477. }
  478. }
  479. static int icnss_clk_on(struct list_head *clk_list)
  480. {
  481. struct icnss_clk_info *clk_info;
  482. int ret = 0;
  483. list_for_each_entry(clk_info, clk_list, list) {
  484. if (IS_ERR_OR_NULL(clk_info->clk))
  485. continue;
  486. ret = icnss_clk_on_single(clk_info);
  487. if (ret)
  488. break;
  489. }
  490. if (!ret)
  491. return 0;
  492. list_for_each_entry_continue_reverse(clk_info, clk_list, list) {
  493. if (IS_ERR_OR_NULL(clk_info->clk))
  494. continue;
  495. icnss_clk_off_single(clk_info);
  496. }
  497. return ret;
  498. }
  499. static int icnss_clk_off(struct list_head *clk_list)
  500. {
  501. struct icnss_clk_info *clk_info;
  502. list_for_each_entry_reverse(clk_info, clk_list, list) {
  503. if (IS_ERR_OR_NULL(clk_info->clk))
  504. continue;
  505. icnss_clk_off_single(clk_info);
  506. }
  507. return 0;
  508. }
  509. int icnss_hw_power_on(struct icnss_priv *priv)
  510. {
  511. int ret = 0;
  512. icnss_pr_dbg("HW Power on: state: 0x%lx\n", priv->state);
  513. spin_lock(&priv->on_off_lock);
  514. if (test_bit(ICNSS_POWER_ON, &priv->state)) {
  515. spin_unlock(&priv->on_off_lock);
  516. return ret;
  517. }
  518. set_bit(ICNSS_POWER_ON, &priv->state);
  519. spin_unlock(&priv->on_off_lock);
  520. ret = icnss_vreg_on(priv);
  521. if (ret) {
  522. icnss_pr_err("Failed to turn on vreg, err = %d\n", ret);
  523. goto out;
  524. }
  525. ret = icnss_clk_on(&priv->clk_list);
  526. if (ret)
  527. goto vreg_off;
  528. return ret;
  529. vreg_off:
  530. icnss_vreg_off(priv);
  531. out:
  532. clear_bit(ICNSS_POWER_ON, &priv->state);
  533. return ret;
  534. }
  535. int icnss_hw_power_off(struct icnss_priv *priv)
  536. {
  537. int ret = 0;
  538. if (test_bit(HW_ALWAYS_ON, &priv->ctrl_params.quirks))
  539. return 0;
  540. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  541. return 0;
  542. icnss_pr_dbg("HW Power off: 0x%lx\n", priv->state);
  543. spin_lock(&priv->on_off_lock);
  544. if (!test_bit(ICNSS_POWER_ON, &priv->state)) {
  545. spin_unlock(&priv->on_off_lock);
  546. return ret;
  547. }
  548. clear_bit(ICNSS_POWER_ON, &priv->state);
  549. spin_unlock(&priv->on_off_lock);
  550. icnss_clk_off(&priv->clk_list);
  551. ret = icnss_vreg_off(priv);
  552. return ret;
  553. }
  554. int icnss_power_on(struct device *dev)
  555. {
  556. struct icnss_priv *priv = dev_get_drvdata(dev);
  557. if (!priv) {
  558. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  559. dev, priv);
  560. return -EINVAL;
  561. }
  562. icnss_pr_dbg("Power On: 0x%lx\n", priv->state);
  563. return icnss_hw_power_on(priv);
  564. }
  565. EXPORT_SYMBOL(icnss_power_on);
  566. int icnss_power_off(struct device *dev)
  567. {
  568. struct icnss_priv *priv = dev_get_drvdata(dev);
  569. if (!priv) {
  570. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  571. dev, priv);
  572. return -EINVAL;
  573. }
  574. icnss_pr_dbg("Power Off: 0x%lx\n", priv->state);
  575. return icnss_hw_power_off(priv);
  576. }
  577. EXPORT_SYMBOL(icnss_power_off);
  578. void icnss_put_resources(struct icnss_priv *priv)
  579. {
  580. icnss_put_clk(priv);
  581. icnss_put_vreg(priv);
  582. }
  583. static int icnss_get_phone_power(struct icnss_priv *priv, uint64_t *result_uv)
  584. {
  585. int ret = 0;
  586. int result;
  587. if (!priv->channel) {
  588. icnss_pr_err("Channel doesn't exists\n");
  589. ret = -EINVAL;
  590. goto out;
  591. }
  592. ret = iio_read_channel_processed(priv->channel, &result);
  593. if (ret < 0) {
  594. icnss_pr_err("Error reading channel, ret = %d\n", ret);
  595. goto out;
  596. }
  597. *result_uv = (uint64_t)result;
  598. out:
  599. return ret;
  600. }
  601. static void icnss_vph_notify(enum adc_tm_state state, void *ctx)
  602. {
  603. struct icnss_priv *priv = ctx;
  604. u64 vph_pwr = 0;
  605. u64 vph_pwr_prev;
  606. int ret = 0;
  607. bool update = true;
  608. if (!priv) {
  609. icnss_pr_err("Priv pointer is NULL\n");
  610. return;
  611. }
  612. vph_pwr_prev = priv->vph_pwr;
  613. ret = icnss_get_phone_power(priv, &vph_pwr);
  614. if (ret < 0)
  615. return;
  616. if (vph_pwr < ICNSS_THRESHOLD_LOW) {
  617. if (vph_pwr_prev < ICNSS_THRESHOLD_LOW)
  618. update = false;
  619. priv->vph_monitor_params.state_request =
  620. ADC_TM_HIGH_THR_ENABLE;
  621. priv->vph_monitor_params.high_thr = ICNSS_THRESHOLD_LOW +
  622. ICNSS_THRESHOLD_GUARD;
  623. priv->vph_monitor_params.low_thr = 0;
  624. } else if (vph_pwr > ICNSS_THRESHOLD_HIGH) {
  625. if (vph_pwr_prev > ICNSS_THRESHOLD_HIGH)
  626. update = false;
  627. priv->vph_monitor_params.state_request =
  628. ADC_TM_LOW_THR_ENABLE;
  629. priv->vph_monitor_params.low_thr = ICNSS_THRESHOLD_HIGH -
  630. ICNSS_THRESHOLD_GUARD;
  631. priv->vph_monitor_params.high_thr = 0;
  632. } else {
  633. if (vph_pwr_prev > ICNSS_THRESHOLD_LOW &&
  634. vph_pwr_prev < ICNSS_THRESHOLD_HIGH)
  635. update = false;
  636. priv->vph_monitor_params.state_request =
  637. ADC_TM_HIGH_LOW_THR_ENABLE;
  638. priv->vph_monitor_params.low_thr = ICNSS_THRESHOLD_LOW;
  639. priv->vph_monitor_params.high_thr = ICNSS_THRESHOLD_HIGH;
  640. }
  641. priv->vph_pwr = vph_pwr;
  642. if (update) {
  643. icnss_send_vbatt_update(priv, vph_pwr);
  644. icnss_pr_dbg("set low threshold to %d, high threshold to %d Phone power=%llu\n",
  645. priv->vph_monitor_params.low_thr,
  646. priv->vph_monitor_params.high_thr, vph_pwr);
  647. }
  648. ret = adc_tm_channel_measure(priv->adc_tm_dev,
  649. &priv->vph_monitor_params);
  650. if (ret)
  651. icnss_pr_err("TM channel setup failed %d\n", ret);
  652. }
  653. static int icnss_setup_vph_monitor(struct icnss_priv *priv)
  654. {
  655. int ret = 0;
  656. if (!priv->adc_tm_dev) {
  657. icnss_pr_err("ADC TM handler is NULL\n");
  658. ret = -EINVAL;
  659. goto out;
  660. }
  661. priv->vph_monitor_params.low_thr = ICNSS_THRESHOLD_LOW;
  662. priv->vph_monitor_params.high_thr = ICNSS_THRESHOLD_HIGH;
  663. priv->vph_monitor_params.state_request = ADC_TM_HIGH_LOW_THR_ENABLE;
  664. priv->vph_monitor_params.channel = ADC5_VBAT_SNS;
  665. priv->vph_monitor_params.btm_ctx = priv;
  666. priv->vph_monitor_params.threshold_notification = &icnss_vph_notify;
  667. icnss_pr_dbg("Set low threshold to %d, high threshold to %d\n",
  668. priv->vph_monitor_params.low_thr,
  669. priv->vph_monitor_params.high_thr);
  670. ret = adc_tm_channel_measure(priv->adc_tm_dev,
  671. &priv->vph_monitor_params);
  672. if (ret)
  673. icnss_pr_err("TM channel setup failed %d\n", ret);
  674. out:
  675. return ret;
  676. }
  677. int icnss_init_vph_monitor(struct icnss_priv *priv)
  678. {
  679. int ret = 0;
  680. ret = icnss_get_phone_power(priv, &priv->vph_pwr);
  681. if (ret < 0)
  682. goto out;
  683. icnss_pr_dbg("Phone power=%llu\n", priv->vph_pwr);
  684. icnss_send_vbatt_update(priv, priv->vph_pwr);
  685. ret = icnss_setup_vph_monitor(priv);
  686. if (ret)
  687. goto out;
  688. out:
  689. return ret;
  690. }
  691. int icnss_aop_mbox_init(struct icnss_priv *priv)
  692. {
  693. struct mbox_client *mbox = &priv->mbox_client_data;
  694. struct mbox_chan *chan;
  695. int ret = 0;
  696. ret = of_property_read_string(priv->pdev->dev.of_node,
  697. "qcom,vreg_ol_cpr",
  698. &priv->cpr_info.vreg_ol_cpr);
  699. if (ret) {
  700. icnss_pr_dbg("Vreg for OL CPR not configured\n");
  701. return -EINVAL;
  702. }
  703. mbox->dev = &priv->pdev->dev;
  704. mbox->tx_block = true;
  705. mbox->tx_tout = ICNSS_MBOX_TIMEOUT_MS;
  706. mbox->knows_txdone = false;
  707. priv->mbox_chan = NULL;
  708. chan = mbox_request_channel(mbox, 0);
  709. if (IS_ERR(chan)) {
  710. ret = PTR_ERR(chan);
  711. icnss_pr_err("Failed to get mbox channel with err %d\n", ret);
  712. return ret;
  713. }
  714. priv->mbox_chan = chan;
  715. icnss_pr_dbg("Mbox channel initialized\n");
  716. return 0;
  717. }
  718. #if IS_ENABLED(CONFIG_MSM_QMP)
  719. static int icnss_aop_set_vreg_param(struct icnss_priv *priv,
  720. const char *vreg_name,
  721. enum icnss_vreg_param param,
  722. enum icnss_tcs_seq seq, int val)
  723. {
  724. struct qmp_pkt pkt;
  725. char mbox_msg[ICNSS_MBOX_MSG_MAX_LEN];
  726. static const char * const vreg_param_str[] = {"v", "m", "e"};
  727. static const char *const tcs_seq_str[] = {"upval", "dwnval", "enable"};
  728. int ret = 0;
  729. if (param > ICNSS_VREG_ENABLE || seq > ICNSS_TCS_ALL_SEQ || !vreg_name)
  730. return -EINVAL;
  731. snprintf(mbox_msg, ICNSS_MBOX_MSG_MAX_LEN,
  732. "{class: wlan_pdc, res: %s.%s, %s: %d}", vreg_name,
  733. vreg_param_str[param], tcs_seq_str[seq], val);
  734. icnss_pr_dbg("Sending AOP Mbox msg: %s\n", mbox_msg);
  735. pkt.size = ICNSS_MBOX_MSG_MAX_LEN;
  736. pkt.data = mbox_msg;
  737. ret = mbox_send_message(priv->mbox_chan, &pkt);
  738. if (ret < 0)
  739. icnss_pr_err("Failed to send AOP mbox msg: %s,ret: %d\n",
  740. mbox_msg, ret);
  741. else
  742. ret = 0;
  743. return ret;
  744. }
  745. #else
  746. static int icnss_aop_set_vreg_param(struct icnss_priv *priv,
  747. const char *vreg_name,
  748. enum icnss_vreg_param param,
  749. enum icnss_tcs_seq seq, int val)
  750. {
  751. return 0;
  752. }
  753. #endif
  754. int icnss_update_cpr_info(struct icnss_priv *priv)
  755. {
  756. struct icnss_cpr_info *cpr_info = &priv->cpr_info;
  757. if (!cpr_info->vreg_ol_cpr || !priv->mbox_chan) {
  758. icnss_pr_dbg("Mbox channel / OL CPR Vreg not configured\n");
  759. return 0;
  760. }
  761. if (cpr_info->voltage == 0) {
  762. icnss_pr_err("Voltage %dmV is not valid\n", cpr_info->voltage);
  763. return -EINVAL;
  764. }
  765. cpr_info->voltage = cpr_info->voltage > BT_CXMX_VOLTAGE_MV ?
  766. cpr_info->voltage : BT_CXMX_VOLTAGE_MV;
  767. return icnss_aop_set_vreg_param(priv,
  768. cpr_info->vreg_ol_cpr,
  769. ICNSS_VREG_VOLTAGE,
  770. ICNSS_TCS_UP_SEQ,
  771. cpr_info->voltage);
  772. }