main.c 109 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/adc-tm-clients.h>
  29. #include <linux/iio/consumer.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/of.h>
  32. #include <linux/of_irq.h>
  33. #include <linux/pm_runtime.h>
  34. #include <linux/soc/qcom/qmi.h>
  35. #include <linux/sysfs.h>
  36. #include <linux/thermal.h>
  37. #include <soc/qcom/memory_dump.h>
  38. #include <soc/qcom/secure_buffer.h>
  39. #include <soc/qcom/socinfo.h>
  40. #include <soc/qcom/qcom_ramdump.h>
  41. #include <linux/soc/qcom/smem.h>
  42. #include <linux/soc/qcom/smem_state.h>
  43. #include <linux/remoteproc.h>
  44. #include <linux/remoteproc/qcom_rproc.h>
  45. #include <linux/soc/qcom/pdr.h>
  46. #include <linux/remoteproc.h>
  47. #include <trace/hooks/remoteproc.h>
  48. #include "main.h"
  49. #include "qmi.h"
  50. #include "debug.h"
  51. #include "power.h"
  52. #include "genl.h"
  53. #define MAX_PROP_SIZE 32
  54. #define NUM_LOG_PAGES 10
  55. #define NUM_LOG_LONG_PAGES 4
  56. #define ICNSS_MAGIC 0x5abc5abc
  57. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  58. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  59. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  60. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  61. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  62. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  63. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  64. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  65. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  66. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  67. #define ICNSS_MAX_PROBE_CNT 2
  68. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  69. #define PROBE_TIMEOUT 15000
  70. #define SMP2P_SOC_WAKE_TIMEOUT 500
  71. #ifdef CONFIG_ICNSS2_DEBUG
  72. static unsigned long qmi_timeout = 3000;
  73. module_param(qmi_timeout, ulong, 0600);
  74. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  75. #else
  76. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  77. #endif
  78. static struct icnss_priv *penv;
  79. static struct work_struct wpss_loader;
  80. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  81. #define ICNSS_EVENT_PENDING 2989
  82. #define ICNSS_EVENT_SYNC BIT(0)
  83. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  84. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  85. ICNSS_EVENT_SYNC)
  86. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  87. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  88. #define SMP2P_GET_MAX_RETRY 4
  89. #define SMP2P_GET_RETRY_DELAY_MS 500
  90. #define RAMDUMP_NUM_DEVICES 256
  91. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  92. #define ICNSS_RPROC_LEN 10
  93. static DEFINE_IDA(rd_minor_id);
  94. enum icnss_pdr_cause_index {
  95. ICNSS_FW_CRASH,
  96. ICNSS_ROOT_PD_CRASH,
  97. ICNSS_ROOT_PD_SHUTDOWN,
  98. ICNSS_HOST_ERROR,
  99. };
  100. static const char * const icnss_pdr_cause[] = {
  101. [ICNSS_FW_CRASH] = "FW crash",
  102. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  103. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  104. [ICNSS_HOST_ERROR] = "Host error",
  105. };
  106. static void icnss_set_plat_priv(struct icnss_priv *priv)
  107. {
  108. penv = priv;
  109. }
  110. static struct icnss_priv *icnss_get_plat_priv()
  111. {
  112. return penv;
  113. }
  114. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  115. struct kobj_attribute *attr,
  116. const char *buf, size_t count)
  117. {
  118. struct icnss_priv *priv = icnss_get_plat_priv();
  119. atomic_set(&priv->is_shutdown, true);
  120. icnss_pr_dbg("Received shutdown indication");
  121. return count;
  122. }
  123. static struct kobj_attribute icnss_sysfs_attribute =
  124. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  125. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  126. {
  127. if (atomic_inc_return(&priv->pm_count) != 1)
  128. return;
  129. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  130. atomic_read(&priv->pm_count));
  131. pm_stay_awake(&priv->pdev->dev);
  132. priv->stats.pm_stay_awake++;
  133. }
  134. static void icnss_pm_relax(struct icnss_priv *priv)
  135. {
  136. int r = atomic_dec_return(&priv->pm_count);
  137. WARN_ON(r < 0);
  138. if (r != 0)
  139. return;
  140. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  141. atomic_read(&priv->pm_count));
  142. pm_relax(&priv->pdev->dev);
  143. priv->stats.pm_relax++;
  144. }
  145. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  146. {
  147. switch (type) {
  148. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  149. return "SERVER_ARRIVE";
  150. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  151. return "SERVER_EXIT";
  152. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  153. return "FW_READY";
  154. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  155. return "REGISTER_DRIVER";
  156. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  157. return "UNREGISTER_DRIVER";
  158. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  159. return "PD_SERVICE_DOWN";
  160. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  161. return "FW_EARLY_CRASH_IND";
  162. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  163. return "IDLE_SHUTDOWN";
  164. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  165. return "IDLE_RESTART";
  166. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  167. return "FW_INIT_DONE";
  168. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  169. return "QDSS_TRACE_REQ_MEM";
  170. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  171. return "QDSS_TRACE_SAVE";
  172. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  173. return "QDSS_TRACE_FREE";
  174. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  175. return "M3_DUMP_UPLOAD";
  176. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  177. return "QDSS_TRACE_REQ_DATA";
  178. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  179. return "SUBSYS_RESTART_LEVEL";
  180. case ICNSS_DRIVER_EVENT_MAX:
  181. return "EVENT_MAX";
  182. }
  183. return "UNKNOWN";
  184. };
  185. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  186. {
  187. switch (type) {
  188. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  189. return "SOC_WAKE_REQUEST";
  190. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  191. return "SOC_WAKE_RELEASE";
  192. case ICNSS_SOC_WAKE_EVENT_MAX:
  193. return "SOC_EVENT_MAX";
  194. }
  195. return "UNKNOWN";
  196. };
  197. int icnss_driver_event_post(struct icnss_priv *priv,
  198. enum icnss_driver_event_type type,
  199. u32 flags, void *data)
  200. {
  201. struct icnss_driver_event *event;
  202. unsigned long irq_flags;
  203. int gfp = GFP_KERNEL;
  204. int ret = 0;
  205. if (!priv)
  206. return -ENODEV;
  207. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  208. icnss_driver_event_to_str(type), type, current->comm,
  209. flags, priv->state);
  210. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  211. icnss_pr_err("Invalid Event type: %d, can't post", type);
  212. return -EINVAL;
  213. }
  214. if (in_interrupt() || irqs_disabled())
  215. gfp = GFP_ATOMIC;
  216. event = kzalloc(sizeof(*event), gfp);
  217. if (event == NULL)
  218. return -ENOMEM;
  219. icnss_pm_stay_awake(priv);
  220. event->type = type;
  221. event->data = data;
  222. init_completion(&event->complete);
  223. event->ret = ICNSS_EVENT_PENDING;
  224. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  225. spin_lock_irqsave(&priv->event_lock, irq_flags);
  226. list_add_tail(&event->list, &priv->event_list);
  227. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  228. priv->stats.events[type].posted++;
  229. queue_work(priv->event_wq, &priv->event_work);
  230. if (!(flags & ICNSS_EVENT_SYNC))
  231. goto out;
  232. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  233. wait_for_completion(&event->complete);
  234. else
  235. ret = wait_for_completion_interruptible(&event->complete);
  236. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  237. icnss_driver_event_to_str(type), type, priv->state, ret,
  238. event->ret);
  239. spin_lock_irqsave(&priv->event_lock, irq_flags);
  240. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  241. event->sync = false;
  242. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  243. ret = -EINTR;
  244. goto out;
  245. }
  246. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  247. ret = event->ret;
  248. kfree(event);
  249. out:
  250. icnss_pm_relax(priv);
  251. return ret;
  252. }
  253. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  254. enum icnss_soc_wake_event_type type,
  255. u32 flags, void *data)
  256. {
  257. struct icnss_soc_wake_event *event;
  258. unsigned long irq_flags;
  259. int gfp = GFP_KERNEL;
  260. int ret = 0;
  261. if (!priv)
  262. return -ENODEV;
  263. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  264. icnss_soc_wake_event_to_str(type),
  265. type, current->comm, flags, priv->state);
  266. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  267. icnss_pr_err("Invalid Event type: %d, can't post", type);
  268. return -EINVAL;
  269. }
  270. if (in_interrupt() || irqs_disabled())
  271. gfp = GFP_ATOMIC;
  272. event = kzalloc(sizeof(*event), gfp);
  273. if (!event)
  274. return -ENOMEM;
  275. icnss_pm_stay_awake(priv);
  276. event->type = type;
  277. event->data = data;
  278. init_completion(&event->complete);
  279. event->ret = ICNSS_EVENT_PENDING;
  280. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  281. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  282. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  283. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  284. priv->stats.soc_wake_events[type].posted++;
  285. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  286. if (!(flags & ICNSS_EVENT_SYNC))
  287. goto out;
  288. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  289. wait_for_completion(&event->complete);
  290. else
  291. ret = wait_for_completion_interruptible(&event->complete);
  292. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  293. icnss_soc_wake_event_to_str(type),
  294. type, priv->state, ret, event->ret);
  295. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  296. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  297. event->sync = false;
  298. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  299. ret = -EINTR;
  300. goto out;
  301. }
  302. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  303. ret = event->ret;
  304. kfree(event);
  305. out:
  306. icnss_pm_relax(priv);
  307. return ret;
  308. }
  309. bool icnss_is_fw_ready(void)
  310. {
  311. if (!penv)
  312. return false;
  313. else
  314. return test_bit(ICNSS_FW_READY, &penv->state);
  315. }
  316. EXPORT_SYMBOL(icnss_is_fw_ready);
  317. void icnss_block_shutdown(bool status)
  318. {
  319. if (!penv)
  320. return;
  321. if (status) {
  322. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  323. reinit_completion(&penv->unblock_shutdown);
  324. } else {
  325. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  326. complete(&penv->unblock_shutdown);
  327. }
  328. }
  329. EXPORT_SYMBOL(icnss_block_shutdown);
  330. bool icnss_is_fw_down(void)
  331. {
  332. struct icnss_priv *priv = icnss_get_plat_priv();
  333. if (!priv)
  334. return false;
  335. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  336. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  337. test_bit(ICNSS_REJUVENATE, &priv->state);
  338. }
  339. EXPORT_SYMBOL(icnss_is_fw_down);
  340. bool icnss_is_rejuvenate(void)
  341. {
  342. if (!penv)
  343. return false;
  344. else
  345. return test_bit(ICNSS_REJUVENATE, &penv->state);
  346. }
  347. EXPORT_SYMBOL(icnss_is_rejuvenate);
  348. bool icnss_is_pdr(void)
  349. {
  350. if (!penv)
  351. return false;
  352. else
  353. return test_bit(ICNSS_PDR, &penv->state);
  354. }
  355. EXPORT_SYMBOL(icnss_is_pdr);
  356. static int icnss_send_smp2p(struct icnss_priv *priv,
  357. enum icnss_smp2p_msg_id msg_id,
  358. enum smp2p_out_entry smp2p_entry)
  359. {
  360. unsigned int value = 0;
  361. int ret;
  362. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  363. return -EINVAL;
  364. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  365. if (msg_id == ICNSS_RESET_MSG) {
  366. priv->smp2p_info[smp2p_entry].seq = 0;
  367. ret = qcom_smem_state_update_bits(
  368. priv->smp2p_info[smp2p_entry].smem_state,
  369. ICNSS_SMEM_VALUE_MASK,
  370. 0);
  371. if (ret)
  372. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  373. ret, icnss_smp2p_str[smp2p_entry]);
  374. return ret;
  375. }
  376. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  377. return -ENODEV;
  378. value |= priv->smp2p_info[smp2p_entry].seq++;
  379. value <<= ICNSS_SMEM_SEQ_NO_POS;
  380. value |= msg_id;
  381. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  382. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  383. reinit_completion(&penv->smp2p_soc_wake_wait);
  384. ret = qcom_smem_state_update_bits(
  385. priv->smp2p_info[smp2p_entry].smem_state,
  386. ICNSS_SMEM_VALUE_MASK,
  387. value);
  388. if (ret) {
  389. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  390. icnss_smp2p_str[smp2p_entry]);
  391. } else {
  392. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  393. msg_id == ICNSS_SOC_WAKE_REL) {
  394. if (!wait_for_completion_timeout(
  395. &priv->smp2p_soc_wake_wait,
  396. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  397. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  398. icnss_smp2p_str[smp2p_entry]);
  399. ICNSS_ASSERT(0);
  400. }
  401. }
  402. }
  403. return ret;
  404. }
  405. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  406. {
  407. struct icnss_priv *priv = ctx;
  408. if (priv)
  409. priv->force_err_fatal = true;
  410. icnss_pr_err("Received force error fatal request from FW\n");
  411. return IRQ_HANDLED;
  412. }
  413. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  414. {
  415. struct icnss_priv *priv = ctx;
  416. struct icnss_uevent_fw_down_data fw_down_data = {0};
  417. icnss_pr_err("Received early crash indication from FW\n");
  418. if (priv) {
  419. set_bit(ICNSS_FW_DOWN, &priv->state);
  420. icnss_ignore_fw_timeout(true);
  421. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  422. clear_bit(ICNSS_FW_READY, &priv->state);
  423. fw_down_data.crashed = true;
  424. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  425. &fw_down_data);
  426. }
  427. }
  428. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  429. 0, NULL);
  430. return IRQ_HANDLED;
  431. }
  432. static void register_fw_error_notifications(struct device *dev)
  433. {
  434. struct icnss_priv *priv = dev_get_drvdata(dev);
  435. struct device_node *dev_node;
  436. int irq = 0, ret = 0;
  437. if (!priv)
  438. return;
  439. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  440. if (!dev_node) {
  441. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  442. return;
  443. }
  444. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  445. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  446. ret = irq = of_irq_get_byname(dev_node,
  447. "qcom,smp2p-force-fatal-error");
  448. if (ret < 0) {
  449. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  450. irq);
  451. return;
  452. }
  453. }
  454. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  455. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  456. "wlanfw-err", priv);
  457. if (ret < 0) {
  458. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  459. irq, ret);
  460. return;
  461. }
  462. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  463. priv->fw_error_fatal_irq = irq;
  464. }
  465. static void register_early_crash_notifications(struct device *dev)
  466. {
  467. struct icnss_priv *priv = dev_get_drvdata(dev);
  468. struct device_node *dev_node;
  469. int irq = 0, ret = 0;
  470. if (!priv)
  471. return;
  472. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  473. if (!dev_node) {
  474. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  475. return;
  476. }
  477. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  478. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  479. ret = irq = of_irq_get_byname(dev_node,
  480. "qcom,smp2p-early-crash-ind");
  481. if (ret < 0) {
  482. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  483. irq);
  484. return;
  485. }
  486. }
  487. ret = devm_request_threaded_irq(dev, irq, NULL,
  488. fw_crash_indication_handler,
  489. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  490. "wlanfw-early-crash-ind", priv);
  491. if (ret < 0) {
  492. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  493. irq, ret);
  494. return;
  495. }
  496. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  497. priv->fw_early_crash_irq = irq;
  498. }
  499. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  500. {
  501. struct icnss_priv *priv = ctx;
  502. if (priv)
  503. complete(&priv->smp2p_soc_wake_wait);
  504. return IRQ_HANDLED;
  505. }
  506. static void register_soc_wake_notif(struct device *dev)
  507. {
  508. struct icnss_priv *priv = dev_get_drvdata(dev);
  509. struct device_node *dev_node;
  510. int irq = 0, ret = 0;
  511. if (!priv)
  512. return;
  513. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  514. if (!dev_node) {
  515. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  516. return;
  517. }
  518. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  519. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  520. ret = irq = of_irq_get_byname(dev_node,
  521. "qcom,smp2p-soc-wake-ack");
  522. if (ret < 0) {
  523. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  524. irq);
  525. return;
  526. }
  527. }
  528. ret = devm_request_threaded_irq(dev, irq, NULL,
  529. fw_soc_wake_ack_handler,
  530. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  531. IRQF_TRIGGER_FALLING,
  532. "wlanfw-soc-wake-ack", priv);
  533. if (ret < 0) {
  534. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  535. irq, ret);
  536. return;
  537. }
  538. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  539. priv->fw_soc_wake_ack_irq = irq;
  540. }
  541. int icnss_call_driver_uevent(struct icnss_priv *priv,
  542. enum icnss_uevent uevent, void *data)
  543. {
  544. struct icnss_uevent_data uevent_data;
  545. if (!priv->ops || !priv->ops->uevent)
  546. return 0;
  547. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  548. priv->state, uevent);
  549. uevent_data.uevent = uevent;
  550. uevent_data.data = data;
  551. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  552. }
  553. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  554. {
  555. int i;
  556. int ret = 0;
  557. ret = icnss_qmi_get_dms_mac(priv);
  558. if (ret == 0 && priv->dms.mac_valid)
  559. goto qmi_send;
  560. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  561. * Thus assert on failure to get MAC from DMS even after retries
  562. */
  563. if (priv->use_nv_mac) {
  564. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  565. if (priv->dms.mac_valid)
  566. break;
  567. ret = icnss_qmi_get_dms_mac(priv);
  568. if (ret != -EAGAIN)
  569. break;
  570. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  571. }
  572. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  573. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  574. ICNSS_ASSERT(0);
  575. return -EINVAL;
  576. }
  577. }
  578. qmi_send:
  579. if (priv->dms.mac_valid)
  580. ret =
  581. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  582. ARRAY_SIZE(priv->dms.mac));
  583. return ret;
  584. }
  585. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  586. enum smp2p_out_entry smp2p_entry)
  587. {
  588. int retry = 0;
  589. int error;
  590. if (priv->smp2p_info[smp2p_entry].smem_state)
  591. return;
  592. retry:
  593. priv->smp2p_info[smp2p_entry].smem_state =
  594. qcom_smem_state_get(&priv->pdev->dev,
  595. icnss_smp2p_str[smp2p_entry],
  596. &priv->smp2p_info[smp2p_entry].smem_bit);
  597. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  598. if (retry++ < SMP2P_GET_MAX_RETRY) {
  599. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  600. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  601. error, icnss_smp2p_str[smp2p_entry]);
  602. msleep(SMP2P_GET_RETRY_DELAY_MS);
  603. goto retry;
  604. }
  605. ICNSS_ASSERT(0);
  606. return;
  607. }
  608. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  609. }
  610. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  611. void *data)
  612. {
  613. int ret = 0;
  614. bool ignore_assert = false;
  615. if (!priv)
  616. return -ENODEV;
  617. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  618. clear_bit(ICNSS_FW_DOWN, &priv->state);
  619. clear_bit(ICNSS_FW_READY, &priv->state);
  620. icnss_ignore_fw_timeout(false);
  621. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  622. icnss_pr_err("QMI Server already in Connected State\n");
  623. ICNSS_ASSERT(0);
  624. }
  625. ret = icnss_connect_to_fw_server(priv, data);
  626. if (ret)
  627. goto fail;
  628. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  629. ret = wlfw_ind_register_send_sync_msg(priv);
  630. if (ret < 0) {
  631. if (ret == -EALREADY) {
  632. ret = 0;
  633. goto qmi_registered;
  634. }
  635. ignore_assert = true;
  636. goto fail;
  637. }
  638. if (priv->device_id == WCN6750_DEVICE_ID) {
  639. ret = wlfw_host_cap_send_sync(priv);
  640. if (ret < 0)
  641. goto fail;
  642. }
  643. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  644. if (!priv->msa_va) {
  645. icnss_pr_err("Invalid MSA address\n");
  646. ret = -EINVAL;
  647. goto fail;
  648. }
  649. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  650. if (ret < 0) {
  651. ignore_assert = true;
  652. goto fail;
  653. }
  654. ret = wlfw_msa_ready_send_sync_msg(priv);
  655. if (ret < 0) {
  656. ignore_assert = true;
  657. goto fail;
  658. }
  659. }
  660. ret = wlfw_cap_send_sync_msg(priv);
  661. if (ret < 0) {
  662. ignore_assert = true;
  663. goto fail;
  664. }
  665. ret = icnss_hw_power_on(priv);
  666. if (ret)
  667. goto fail;
  668. if (priv->device_id == WCN6750_DEVICE_ID) {
  669. ret = wlfw_device_info_send_msg(priv);
  670. if (ret < 0) {
  671. ignore_assert = true;
  672. goto device_info_failure;
  673. }
  674. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  675. priv->mem_base_pa,
  676. priv->mem_base_size);
  677. if (!priv->mem_base_va) {
  678. icnss_pr_err("Ioremap failed for bar address\n");
  679. goto device_info_failure;
  680. }
  681. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  682. &priv->mem_base_pa,
  683. priv->mem_base_va);
  684. if (priv->mhi_state_info_pa)
  685. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  686. priv->mhi_state_info_pa,
  687. PAGE_SIZE);
  688. if (!priv->mhi_state_info_va)
  689. icnss_pr_err("Ioremap failed for MHI info address\n");
  690. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  691. &priv->mhi_state_info_pa,
  692. priv->mhi_state_info_va);
  693. }
  694. if (priv->bdf_download_support) {
  695. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  696. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  697. priv->ctrl_params.bdf_type);
  698. if (ret < 0)
  699. goto device_info_failure;
  700. }
  701. if (priv->device_id == WCN6750_DEVICE_ID) {
  702. if (!priv->fw_soc_wake_ack_irq)
  703. register_soc_wake_notif(&priv->pdev->dev);
  704. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  705. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  706. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  707. }
  708. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  709. if (priv->bdf_download_support) {
  710. ret = wlfw_cal_report_req(priv);
  711. if (ret < 0)
  712. goto device_info_failure;
  713. }
  714. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  715. dynamic_feature_mask);
  716. }
  717. if (!priv->fw_error_fatal_irq)
  718. register_fw_error_notifications(&priv->pdev->dev);
  719. if (!priv->fw_early_crash_irq)
  720. register_early_crash_notifications(&priv->pdev->dev);
  721. if (priv->vbatt_supported)
  722. icnss_init_vph_monitor(priv);
  723. return ret;
  724. device_info_failure:
  725. icnss_hw_power_off(priv);
  726. fail:
  727. ICNSS_ASSERT(ignore_assert);
  728. qmi_registered:
  729. return ret;
  730. }
  731. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  732. {
  733. if (!priv)
  734. return -ENODEV;
  735. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  736. icnss_clear_server(priv);
  737. if (priv->adc_tm_dev && priv->vbatt_supported)
  738. adc_tm_disable_chan_meas(priv->adc_tm_dev,
  739. &priv->vph_monitor_params);
  740. return 0;
  741. }
  742. static int icnss_call_driver_probe(struct icnss_priv *priv)
  743. {
  744. int ret = 0;
  745. int probe_cnt = 0;
  746. if (!priv->ops || !priv->ops->probe)
  747. return 0;
  748. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  749. return -EINVAL;
  750. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  751. icnss_hw_power_on(priv);
  752. icnss_block_shutdown(true);
  753. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  754. ret = priv->ops->probe(&priv->pdev->dev);
  755. probe_cnt++;
  756. if (ret != -EPROBE_DEFER)
  757. break;
  758. }
  759. if (ret < 0) {
  760. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  761. ret, priv->state, probe_cnt);
  762. icnss_block_shutdown(false);
  763. goto out;
  764. }
  765. icnss_block_shutdown(false);
  766. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  767. return 0;
  768. out:
  769. icnss_hw_power_off(priv);
  770. return ret;
  771. }
  772. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  773. {
  774. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  775. goto out;
  776. if (!priv->ops || !priv->ops->shutdown)
  777. goto out;
  778. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  779. goto out;
  780. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  781. priv->ops->shutdown(&priv->pdev->dev);
  782. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  783. out:
  784. return 0;
  785. }
  786. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  787. {
  788. int ret = 0;
  789. icnss_pm_relax(priv);
  790. icnss_call_driver_shutdown(priv);
  791. clear_bit(ICNSS_PDR, &priv->state);
  792. clear_bit(ICNSS_REJUVENATE, &priv->state);
  793. clear_bit(ICNSS_PD_RESTART, &priv->state);
  794. priv->early_crash_ind = false;
  795. priv->is_ssr = false;
  796. if (!priv->ops || !priv->ops->reinit)
  797. goto out;
  798. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  799. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  800. priv->state);
  801. goto out;
  802. }
  803. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  804. goto call_probe;
  805. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  806. icnss_hw_power_on(priv);
  807. icnss_block_shutdown(true);
  808. ret = priv->ops->reinit(&priv->pdev->dev);
  809. if (ret < 0) {
  810. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  811. ret, priv->state);
  812. if (!priv->allow_recursive_recovery)
  813. ICNSS_ASSERT(false);
  814. icnss_block_shutdown(false);
  815. goto out_power_off;
  816. }
  817. icnss_block_shutdown(false);
  818. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  819. return 0;
  820. call_probe:
  821. return icnss_call_driver_probe(priv);
  822. out_power_off:
  823. icnss_hw_power_off(priv);
  824. out:
  825. return ret;
  826. }
  827. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  828. {
  829. int ret = 0;
  830. if (!priv)
  831. return -ENODEV;
  832. set_bit(ICNSS_FW_READY, &priv->state);
  833. clear_bit(ICNSS_MODE_ON, &priv->state);
  834. atomic_set(&priv->soc_wake_ref_count, 0);
  835. if (priv->device_id == WCN6750_DEVICE_ID)
  836. icnss_free_qdss_mem(priv);
  837. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  838. icnss_hw_power_off(priv);
  839. if (!priv->pdev) {
  840. icnss_pr_err("Device is not ready\n");
  841. ret = -ENODEV;
  842. goto out;
  843. }
  844. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  845. ret = icnss_pd_restart_complete(priv);
  846. } else {
  847. if (priv->device_id == WCN6750_DEVICE_ID)
  848. icnss_setup_dms_mac(priv);
  849. ret = icnss_call_driver_probe(priv);
  850. }
  851. icnss_vreg_unvote(priv);
  852. out:
  853. return ret;
  854. }
  855. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  856. {
  857. int ret = 0;
  858. if (!priv)
  859. return -ENODEV;
  860. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  861. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  862. icnss_pr_info("Failed to download qdss configuration file");
  863. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state))
  864. ret = wlfw_wlan_mode_send_sync_msg(priv,
  865. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  866. else
  867. icnss_driver_event_fw_ready_ind(priv, NULL);
  868. return ret;
  869. }
  870. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  871. {
  872. struct platform_device *pdev = priv->pdev;
  873. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  874. int i, j;
  875. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  876. if (!qdss_mem[i].va && qdss_mem[i].size) {
  877. qdss_mem[i].va =
  878. dma_alloc_coherent(&pdev->dev,
  879. qdss_mem[i].size,
  880. &qdss_mem[i].pa,
  881. GFP_KERNEL);
  882. if (!qdss_mem[i].va) {
  883. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  884. qdss_mem[i].size,
  885. qdss_mem[i].type, i);
  886. break;
  887. }
  888. }
  889. }
  890. /* Best-effort allocation for QDSS trace */
  891. if (i < priv->qdss_mem_seg_len) {
  892. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  893. qdss_mem[j].type = 0;
  894. qdss_mem[j].size = 0;
  895. }
  896. priv->qdss_mem_seg_len = i;
  897. }
  898. return 0;
  899. }
  900. void icnss_free_qdss_mem(struct icnss_priv *priv)
  901. {
  902. struct platform_device *pdev = priv->pdev;
  903. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  904. int i;
  905. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  906. if (qdss_mem[i].va && qdss_mem[i].size) {
  907. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  908. &qdss_mem[i].pa, qdss_mem[i].size,
  909. qdss_mem[i].type);
  910. dma_free_coherent(&pdev->dev,
  911. qdss_mem[i].size, qdss_mem[i].va,
  912. qdss_mem[i].pa);
  913. qdss_mem[i].va = NULL;
  914. qdss_mem[i].pa = 0;
  915. qdss_mem[i].size = 0;
  916. qdss_mem[i].type = 0;
  917. }
  918. }
  919. priv->qdss_mem_seg_len = 0;
  920. }
  921. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  922. {
  923. int ret = 0;
  924. ret = icnss_alloc_qdss_mem(priv);
  925. if (ret < 0)
  926. return ret;
  927. return wlfw_qdss_trace_mem_info_send_sync(priv);
  928. }
  929. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  930. u64 pa, u32 size, int *seg_id)
  931. {
  932. int i = 0;
  933. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  934. u64 offset = 0;
  935. void *va = NULL;
  936. u64 local_pa;
  937. u32 local_size;
  938. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  939. local_pa = (u64)qdss_mem[i].pa;
  940. local_size = (u32)qdss_mem[i].size;
  941. if (pa == local_pa && size <= local_size) {
  942. va = qdss_mem[i].va;
  943. break;
  944. }
  945. if (pa > local_pa &&
  946. pa < local_pa + local_size &&
  947. pa + size <= local_pa + local_size) {
  948. offset = pa - local_pa;
  949. va = qdss_mem[i].va + offset;
  950. break;
  951. }
  952. }
  953. *seg_id = i;
  954. return va;
  955. }
  956. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  957. void *data)
  958. {
  959. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  960. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  961. int ret = 0;
  962. int i;
  963. void *va = NULL;
  964. u64 pa;
  965. u32 size;
  966. int seg_id = 0;
  967. if (!priv->qdss_mem_seg_len) {
  968. icnss_pr_err("Memory for QDSS trace is not available\n");
  969. return -ENOMEM;
  970. }
  971. if (event_data->mem_seg_len == 0) {
  972. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  973. ret = icnss_genl_send_msg(qdss_mem[i].va,
  974. ICNSS_GENL_MSG_TYPE_QDSS,
  975. event_data->file_name,
  976. qdss_mem[i].size);
  977. if (ret < 0) {
  978. icnss_pr_err("Fail to save QDSS data: %d\n",
  979. ret);
  980. break;
  981. }
  982. }
  983. } else {
  984. for (i = 0; i < event_data->mem_seg_len; i++) {
  985. pa = event_data->mem_seg[i].addr;
  986. size = event_data->mem_seg[i].size;
  987. va = icnss_qdss_trace_pa_to_va(priv, pa,
  988. size, &seg_id);
  989. if (!va) {
  990. icnss_pr_err("Fail to find matching va for pa %pa\n",
  991. &pa);
  992. ret = -EINVAL;
  993. break;
  994. }
  995. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  996. event_data->file_name, size);
  997. if (ret < 0) {
  998. icnss_pr_err("Fail to save QDSS data: %d\n",
  999. ret);
  1000. break;
  1001. }
  1002. }
  1003. }
  1004. kfree(data);
  1005. return ret;
  1006. }
  1007. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1008. {
  1009. int dec, c = atomic_read(v);
  1010. do {
  1011. dec = c - 1;
  1012. if (unlikely(dec < 1))
  1013. break;
  1014. } while (!atomic_try_cmpxchg(v, &c, dec));
  1015. return dec;
  1016. }
  1017. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1018. void *data)
  1019. {
  1020. int ret = 0;
  1021. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1022. if (!priv)
  1023. return -ENODEV;
  1024. if (!data)
  1025. return -EINVAL;
  1026. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1027. event_data->total_size);
  1028. kfree(data);
  1029. return ret;
  1030. }
  1031. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1032. {
  1033. int ret = 0;
  1034. if (!priv)
  1035. return -ENODEV;
  1036. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1037. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1038. atomic_read(&priv->soc_wake_ref_count));
  1039. return 0;
  1040. }
  1041. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1042. ICNSS_SMP2P_OUT_SOC_WAKE);
  1043. if (!ret)
  1044. atomic_inc(&priv->soc_wake_ref_count);
  1045. return ret;
  1046. }
  1047. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1048. {
  1049. int ret = 0;
  1050. if (!priv)
  1051. return -ENODEV;
  1052. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1053. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1054. priv->soc_wake_ref_count);
  1055. return 0;
  1056. }
  1057. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1058. ICNSS_SMP2P_OUT_SOC_WAKE);
  1059. return ret;
  1060. }
  1061. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1062. void *data)
  1063. {
  1064. int ret = 0;
  1065. int probe_cnt = 0;
  1066. if (priv->ops)
  1067. return -EEXIST;
  1068. priv->ops = data;
  1069. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1070. set_bit(ICNSS_FW_READY, &priv->state);
  1071. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1072. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1073. priv->state);
  1074. return -ENODEV;
  1075. }
  1076. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1077. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1078. priv->state);
  1079. goto out;
  1080. }
  1081. ret = icnss_hw_power_on(priv);
  1082. if (ret)
  1083. goto out;
  1084. icnss_block_shutdown(true);
  1085. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1086. ret = priv->ops->probe(&priv->pdev->dev);
  1087. probe_cnt++;
  1088. if (ret != -EPROBE_DEFER)
  1089. break;
  1090. }
  1091. if (ret) {
  1092. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1093. ret, priv->state, probe_cnt);
  1094. icnss_block_shutdown(false);
  1095. goto power_off;
  1096. }
  1097. icnss_block_shutdown(false);
  1098. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1099. return 0;
  1100. power_off:
  1101. icnss_hw_power_off(priv);
  1102. out:
  1103. return ret;
  1104. }
  1105. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1106. void *data)
  1107. {
  1108. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1109. priv->ops = NULL;
  1110. goto out;
  1111. }
  1112. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1113. icnss_block_shutdown(true);
  1114. if (priv->ops)
  1115. priv->ops->remove(&priv->pdev->dev);
  1116. icnss_block_shutdown(false);
  1117. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1118. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1119. priv->ops = NULL;
  1120. icnss_hw_power_off(priv);
  1121. out:
  1122. return 0;
  1123. }
  1124. static int icnss_fw_crashed(struct icnss_priv *priv,
  1125. struct icnss_event_pd_service_down_data *event_data)
  1126. {
  1127. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1128. set_bit(ICNSS_PD_RESTART, &priv->state);
  1129. clear_bit(ICNSS_FW_READY, &priv->state);
  1130. icnss_pm_stay_awake(priv);
  1131. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1132. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1133. if (event_data && event_data->fw_rejuvenate)
  1134. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1135. return 0;
  1136. }
  1137. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1138. struct icnss_uevent_hang_data *hang_data)
  1139. {
  1140. if (!priv->hang_event_data_va)
  1141. return -EINVAL;
  1142. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1143. priv->hang_event_data_len,
  1144. GFP_ATOMIC);
  1145. if (!priv->hang_event_data)
  1146. return -ENOMEM;
  1147. // Update the hang event params
  1148. hang_data->hang_event_data = priv->hang_event_data;
  1149. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1150. return 0;
  1151. }
  1152. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1153. {
  1154. struct icnss_uevent_hang_data hang_data = {0};
  1155. int ret = 0xFF;
  1156. if (priv->early_crash_ind) {
  1157. ret = icnss_update_hang_event_data(priv, &hang_data);
  1158. if (ret)
  1159. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1160. }
  1161. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1162. &hang_data);
  1163. if (!ret) {
  1164. kfree(priv->hang_event_data);
  1165. priv->hang_event_data = NULL;
  1166. }
  1167. return 0;
  1168. }
  1169. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1170. void *data)
  1171. {
  1172. struct icnss_event_pd_service_down_data *event_data = data;
  1173. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1174. icnss_ignore_fw_timeout(false);
  1175. goto out;
  1176. }
  1177. if (priv->force_err_fatal)
  1178. ICNSS_ASSERT(0);
  1179. if (priv->device_id == WCN6750_DEVICE_ID) {
  1180. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1181. ICNSS_SMP2P_OUT_POWER_SAVE);
  1182. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1183. ICNSS_SMP2P_OUT_SOC_WAKE);
  1184. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1185. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1186. }
  1187. icnss_send_hang_event_data(priv);
  1188. if (priv->early_crash_ind) {
  1189. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1190. event_data->crashed, priv->state);
  1191. goto out;
  1192. }
  1193. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1194. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1195. event_data->crashed, priv->state);
  1196. if (!priv->allow_recursive_recovery)
  1197. ICNSS_ASSERT(0);
  1198. goto out;
  1199. }
  1200. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1201. icnss_fw_crashed(priv, event_data);
  1202. out:
  1203. kfree(data);
  1204. return 0;
  1205. }
  1206. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1207. void *data)
  1208. {
  1209. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1210. icnss_ignore_fw_timeout(false);
  1211. goto out;
  1212. }
  1213. priv->early_crash_ind = true;
  1214. icnss_fw_crashed(priv, NULL);
  1215. out:
  1216. kfree(data);
  1217. return 0;
  1218. }
  1219. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1220. void *data)
  1221. {
  1222. int ret = 0;
  1223. if (!priv->ops || !priv->ops->idle_shutdown)
  1224. return 0;
  1225. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1226. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1227. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1228. ret = -EBUSY;
  1229. } else {
  1230. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1231. priv->state);
  1232. icnss_block_shutdown(true);
  1233. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1234. icnss_block_shutdown(false);
  1235. }
  1236. return ret;
  1237. }
  1238. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1239. void *data)
  1240. {
  1241. int ret = 0;
  1242. if (!priv->ops || !priv->ops->idle_restart)
  1243. return 0;
  1244. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1245. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1246. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1247. ret = -EBUSY;
  1248. } else {
  1249. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1250. priv->state);
  1251. icnss_block_shutdown(true);
  1252. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1253. icnss_block_shutdown(false);
  1254. }
  1255. return ret;
  1256. }
  1257. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1258. {
  1259. icnss_free_qdss_mem(priv);
  1260. return 0;
  1261. }
  1262. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1263. void *data)
  1264. {
  1265. struct icnss_m3_upload_segments_req_data *event_data = data;
  1266. struct qcom_dump_segment segment;
  1267. int i, status = 0, ret = 0;
  1268. struct list_head head;
  1269. if (!dump_enabled()) {
  1270. icnss_pr_info("Dump collection is not enabled\n");
  1271. return ret;
  1272. }
  1273. INIT_LIST_HEAD(&head);
  1274. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1275. memset(&segment, 0, sizeof(segment));
  1276. segment.va = devm_ioremap(&priv->pdev->dev,
  1277. event_data->m3_segment[i].addr,
  1278. event_data->m3_segment[i].size);
  1279. if (!segment.va) {
  1280. icnss_pr_err("Failed to ioremap M3 Dump region");
  1281. ret = -ENOMEM;
  1282. goto send_resp;
  1283. }
  1284. segment.size = event_data->m3_segment[i].size;
  1285. list_add(&segment.node, &head);
  1286. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1287. event_data->m3_segment[i].name);
  1288. switch (event_data->m3_segment[i].type) {
  1289. case QMI_M3_SEGMENT_PHYAREG_V01:
  1290. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1291. break;
  1292. case QMI_M3_SEGMENT_PHYDBG_V01:
  1293. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1294. break;
  1295. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1296. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1297. break;
  1298. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1299. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1300. break;
  1301. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1302. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1303. break;
  1304. default:
  1305. icnss_pr_err("Invalid Segment type: %d",
  1306. event_data->m3_segment[i].type);
  1307. }
  1308. if (ret) {
  1309. status = ret;
  1310. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1311. event_data->m3_segment[i].name, ret);
  1312. }
  1313. list_del(&segment.node);
  1314. }
  1315. send_resp:
  1316. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1317. status);
  1318. return ret;
  1319. }
  1320. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1321. {
  1322. int ret = 0;
  1323. struct icnss_subsys_restart_level_data *event_data = data;
  1324. if (!priv)
  1325. return -ENODEV;
  1326. if (!data)
  1327. return -EINVAL;
  1328. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1329. kfree(data);
  1330. return ret;
  1331. }
  1332. static void icnss_driver_event_work(struct work_struct *work)
  1333. {
  1334. struct icnss_priv *priv =
  1335. container_of(work, struct icnss_priv, event_work);
  1336. struct icnss_driver_event *event;
  1337. unsigned long flags;
  1338. int ret;
  1339. icnss_pm_stay_awake(priv);
  1340. spin_lock_irqsave(&priv->event_lock, flags);
  1341. while (!list_empty(&priv->event_list)) {
  1342. event = list_first_entry(&priv->event_list,
  1343. struct icnss_driver_event, list);
  1344. list_del(&event->list);
  1345. spin_unlock_irqrestore(&priv->event_lock, flags);
  1346. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1347. icnss_driver_event_to_str(event->type),
  1348. event->sync ? "-sync" : "", event->type,
  1349. priv->state);
  1350. switch (event->type) {
  1351. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1352. ret = icnss_driver_event_server_arrive(priv,
  1353. event->data);
  1354. break;
  1355. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1356. ret = icnss_driver_event_server_exit(priv);
  1357. break;
  1358. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1359. ret = icnss_driver_event_fw_ready_ind(priv,
  1360. event->data);
  1361. break;
  1362. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1363. ret = icnss_driver_event_register_driver(priv,
  1364. event->data);
  1365. break;
  1366. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1367. ret = icnss_driver_event_unregister_driver(priv,
  1368. event->data);
  1369. break;
  1370. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1371. ret = icnss_driver_event_pd_service_down(priv,
  1372. event->data);
  1373. break;
  1374. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1375. ret = icnss_driver_event_early_crash_ind(priv,
  1376. event->data);
  1377. break;
  1378. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1379. ret = icnss_driver_event_idle_shutdown(priv,
  1380. event->data);
  1381. break;
  1382. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1383. ret = icnss_driver_event_idle_restart(priv,
  1384. event->data);
  1385. break;
  1386. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1387. ret = icnss_driver_event_fw_init_done(priv,
  1388. event->data);
  1389. break;
  1390. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1391. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1392. break;
  1393. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1394. ret = icnss_qdss_trace_save_hdlr(priv,
  1395. event->data);
  1396. break;
  1397. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1398. ret = icnss_qdss_trace_free_hdlr(priv);
  1399. break;
  1400. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1401. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1402. break;
  1403. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1404. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1405. event->data);
  1406. break;
  1407. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1408. ret = icnss_subsys_restart_level(priv, event->data);
  1409. break;
  1410. default:
  1411. icnss_pr_err("Invalid Event type: %d", event->type);
  1412. kfree(event);
  1413. continue;
  1414. }
  1415. priv->stats.events[event->type].processed++;
  1416. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1417. icnss_driver_event_to_str(event->type),
  1418. event->sync ? "-sync" : "", event->type, ret,
  1419. priv->state);
  1420. spin_lock_irqsave(&priv->event_lock, flags);
  1421. if (event->sync) {
  1422. event->ret = ret;
  1423. complete(&event->complete);
  1424. continue;
  1425. }
  1426. spin_unlock_irqrestore(&priv->event_lock, flags);
  1427. kfree(event);
  1428. spin_lock_irqsave(&priv->event_lock, flags);
  1429. }
  1430. spin_unlock_irqrestore(&priv->event_lock, flags);
  1431. icnss_pm_relax(priv);
  1432. }
  1433. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1434. {
  1435. struct icnss_priv *priv =
  1436. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1437. struct icnss_soc_wake_event *event;
  1438. unsigned long flags;
  1439. int ret;
  1440. icnss_pm_stay_awake(priv);
  1441. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1442. while (!list_empty(&priv->soc_wake_msg_list)) {
  1443. event = list_first_entry(&priv->soc_wake_msg_list,
  1444. struct icnss_soc_wake_event, list);
  1445. list_del(&event->list);
  1446. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1447. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1448. icnss_soc_wake_event_to_str(event->type),
  1449. event->sync ? "-sync" : "", event->type,
  1450. priv->state);
  1451. switch (event->type) {
  1452. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1453. ret = icnss_event_soc_wake_request(priv,
  1454. event->data);
  1455. break;
  1456. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1457. ret = icnss_event_soc_wake_release(priv,
  1458. event->data);
  1459. break;
  1460. default:
  1461. icnss_pr_err("Invalid Event type: %d", event->type);
  1462. kfree(event);
  1463. continue;
  1464. }
  1465. priv->stats.soc_wake_events[event->type].processed++;
  1466. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1467. icnss_soc_wake_event_to_str(event->type),
  1468. event->sync ? "-sync" : "", event->type, ret,
  1469. priv->state);
  1470. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1471. if (event->sync) {
  1472. event->ret = ret;
  1473. complete(&event->complete);
  1474. continue;
  1475. }
  1476. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1477. kfree(event);
  1478. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1479. }
  1480. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1481. icnss_pm_relax(priv);
  1482. }
  1483. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1484. {
  1485. int ret = 0;
  1486. struct qcom_dump_segment segment;
  1487. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1488. struct list_head head;
  1489. if (!dump_enabled()) {
  1490. icnss_pr_info("Dump collection is not enabled\n");
  1491. return ret;
  1492. }
  1493. INIT_LIST_HEAD(&head);
  1494. memset(&segment, 0, sizeof(segment));
  1495. segment.va = priv->msa_va;
  1496. segment.size = priv->msa_mem_size;
  1497. list_add(&segment.node, &head);
  1498. if (!msa0_dump_dev->dev) {
  1499. icnss_pr_err("Created Dump Device not found\n");
  1500. return 0;
  1501. }
  1502. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1503. if (ret) {
  1504. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1505. return ret;
  1506. }
  1507. list_del(&segment.node);
  1508. return ret;
  1509. }
  1510. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1511. void *data)
  1512. {
  1513. struct qcom_ssr_notify_data *notif = data;
  1514. int ret = 0;
  1515. if (!notif->crashed) {
  1516. if (atomic_read(&priv->is_shutdown)) {
  1517. atomic_set(&priv->is_shutdown, false);
  1518. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1519. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1520. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1521. clear_bit(ICNSS_FW_READY, &priv->state);
  1522. icnss_driver_event_post(priv,
  1523. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1524. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1525. NULL);
  1526. }
  1527. }
  1528. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1529. if (!wait_for_completion_timeout(
  1530. &priv->unblock_shutdown,
  1531. msecs_to_jiffies(PROBE_TIMEOUT)))
  1532. icnss_pr_err("modem block shutdown timeout\n");
  1533. }
  1534. ret = wlfw_send_modem_shutdown_msg(priv);
  1535. if (ret < 0)
  1536. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1537. ret);
  1538. }
  1539. }
  1540. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1541. {
  1542. switch (code) {
  1543. case QCOM_SSR_BEFORE_POWERUP:
  1544. return "BEFORE_POWERUP";
  1545. case QCOM_SSR_AFTER_POWERUP:
  1546. return "AFTER_POWERUP";
  1547. case QCOM_SSR_BEFORE_SHUTDOWN:
  1548. return "BEFORE_SHUTDOWN";
  1549. case QCOM_SSR_AFTER_SHUTDOWN:
  1550. return "AFTER_SHUTDOWN";
  1551. default:
  1552. return "UNKNOWN";
  1553. }
  1554. };
  1555. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1556. unsigned long code,
  1557. void *data)
  1558. {
  1559. struct icnss_event_pd_service_down_data *event_data;
  1560. struct qcom_ssr_notify_data *notif = data;
  1561. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1562. wpss_ssr_nb);
  1563. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1564. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1565. icnss_qcom_ssr_notify_state_to_str(code), code);
  1566. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1567. icnss_pr_info("Collecting msa0 segment dump\n");
  1568. icnss_msa0_ramdump(priv);
  1569. goto out;
  1570. }
  1571. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1572. goto out;
  1573. priv->is_ssr = true;
  1574. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1575. priv->state, notif->crashed);
  1576. set_bit(ICNSS_FW_DOWN, &priv->state);
  1577. if (notif->crashed)
  1578. priv->stats.recovery.root_pd_crash++;
  1579. else
  1580. priv->stats.recovery.root_pd_shutdown++;
  1581. icnss_ignore_fw_timeout(true);
  1582. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1583. if (event_data == NULL)
  1584. return notifier_from_errno(-ENOMEM);
  1585. event_data->crashed = notif->crashed;
  1586. fw_down_data.crashed = !!notif->crashed;
  1587. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1588. clear_bit(ICNSS_FW_READY, &priv->state);
  1589. fw_down_data.crashed = !!notif->crashed;
  1590. icnss_call_driver_uevent(priv,
  1591. ICNSS_UEVENT_FW_DOWN,
  1592. &fw_down_data);
  1593. }
  1594. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1595. ICNSS_EVENT_SYNC, event_data);
  1596. out:
  1597. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1598. return NOTIFY_OK;
  1599. }
  1600. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1601. unsigned long code,
  1602. void *data)
  1603. {
  1604. struct icnss_event_pd_service_down_data *event_data;
  1605. struct qcom_ssr_notify_data *notif = data;
  1606. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1607. modem_ssr_nb);
  1608. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1609. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1610. icnss_qcom_ssr_notify_state_to_str(code), code);
  1611. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1612. icnss_pr_info("Collecting msa0 segment dump\n");
  1613. icnss_msa0_ramdump(priv);
  1614. goto out;
  1615. }
  1616. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1617. goto out;
  1618. priv->is_ssr = true;
  1619. if (notif->crashed) {
  1620. priv->stats.recovery.root_pd_crash++;
  1621. priv->root_pd_shutdown = false;
  1622. } else {
  1623. priv->stats.recovery.root_pd_shutdown++;
  1624. priv->root_pd_shutdown = true;
  1625. }
  1626. icnss_update_state_send_modem_shutdown(priv, data);
  1627. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1628. set_bit(ICNSS_FW_DOWN, &priv->state);
  1629. icnss_ignore_fw_timeout(true);
  1630. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1631. clear_bit(ICNSS_FW_READY, &priv->state);
  1632. fw_down_data.crashed = !!notif->crashed;
  1633. icnss_call_driver_uevent(priv,
  1634. ICNSS_UEVENT_FW_DOWN,
  1635. &fw_down_data);
  1636. }
  1637. goto out;
  1638. }
  1639. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1640. priv->state, notif->crashed);
  1641. set_bit(ICNSS_FW_DOWN, &priv->state);
  1642. icnss_ignore_fw_timeout(true);
  1643. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1644. if (event_data == NULL)
  1645. return notifier_from_errno(-ENOMEM);
  1646. event_data->crashed = notif->crashed;
  1647. fw_down_data.crashed = !!notif->crashed;
  1648. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1649. clear_bit(ICNSS_FW_READY, &priv->state);
  1650. fw_down_data.crashed = !!notif->crashed;
  1651. icnss_call_driver_uevent(priv,
  1652. ICNSS_UEVENT_FW_DOWN,
  1653. &fw_down_data);
  1654. }
  1655. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1656. ICNSS_EVENT_SYNC, event_data);
  1657. out:
  1658. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1659. return NOTIFY_OK;
  1660. }
  1661. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1662. {
  1663. int ret = 0;
  1664. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1665. /*
  1666. * Assign priority of icnss wpss notifier callback over IPA
  1667. * modem notifier callback which is 0
  1668. */
  1669. priv->wpss_ssr_nb.priority = 1;
  1670. priv->wpss_notify_handler =
  1671. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1672. if (IS_ERR(priv->wpss_notify_handler)) {
  1673. ret = PTR_ERR(priv->wpss_notify_handler);
  1674. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1675. }
  1676. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1677. return ret;
  1678. }
  1679. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1680. {
  1681. int ret = 0;
  1682. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1683. /*
  1684. * Assign priority of icnss modem notifier callback over IPA
  1685. * modem notifier callback which is 0
  1686. */
  1687. priv->modem_ssr_nb.priority = 1;
  1688. priv->modem_notify_handler =
  1689. qcom_register_ssr_notifier("modem", &priv->modem_ssr_nb);
  1690. if (IS_ERR(priv->modem_notify_handler)) {
  1691. ret = PTR_ERR(priv->modem_notify_handler);
  1692. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1693. }
  1694. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1695. return ret;
  1696. }
  1697. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1698. {
  1699. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1700. return 0;
  1701. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1702. &priv->wpss_ssr_nb);
  1703. priv->wpss_notify_handler = NULL;
  1704. return 0;
  1705. }
  1706. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1707. {
  1708. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1709. return 0;
  1710. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1711. &priv->modem_ssr_nb);
  1712. priv->modem_notify_handler = NULL;
  1713. return 0;
  1714. }
  1715. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1716. {
  1717. struct icnss_priv *priv = priv_cb;
  1718. struct icnss_event_pd_service_down_data *event_data;
  1719. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1720. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1721. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1722. state, priv->state);
  1723. switch (state) {
  1724. case SERVREG_SERVICE_STATE_DOWN:
  1725. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1726. if (!event_data)
  1727. return;
  1728. event_data->crashed = true;
  1729. if (!priv->is_ssr) {
  1730. set_bit(ICNSS_PDR, &penv->state);
  1731. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1732. cause = ICNSS_HOST_ERROR;
  1733. priv->stats.recovery.pdr_host_error++;
  1734. } else {
  1735. cause = ICNSS_FW_CRASH;
  1736. priv->stats.recovery.pdr_fw_crash++;
  1737. }
  1738. } else if (priv->root_pd_shutdown) {
  1739. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1740. event_data->crashed = false;
  1741. }
  1742. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1743. priv->state, icnss_pdr_cause[cause]);
  1744. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1745. set_bit(ICNSS_FW_DOWN, &priv->state);
  1746. icnss_ignore_fw_timeout(true);
  1747. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1748. clear_bit(ICNSS_FW_READY, &priv->state);
  1749. fw_down_data.crashed = event_data->crashed;
  1750. icnss_call_driver_uevent(priv,
  1751. ICNSS_UEVENT_FW_DOWN,
  1752. &fw_down_data);
  1753. }
  1754. }
  1755. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1756. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1757. ICNSS_EVENT_SYNC, event_data);
  1758. break;
  1759. case SERVREG_SERVICE_STATE_UP:
  1760. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1761. break;
  1762. default:
  1763. break;
  1764. }
  1765. return;
  1766. }
  1767. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1768. {
  1769. struct pdr_handle *handle = NULL;
  1770. struct pdr_service *service = NULL;
  1771. int err = 0;
  1772. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1773. if (IS_ERR_OR_NULL(handle)) {
  1774. err = PTR_ERR(handle);
  1775. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1776. goto out;
  1777. }
  1778. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1779. if (IS_ERR_OR_NULL(service)) {
  1780. err = PTR_ERR(service);
  1781. icnss_pr_err("Failed to add lookup, err %d", err);
  1782. goto out;
  1783. }
  1784. priv->pdr_handle = handle;
  1785. priv->pdr_service = service;
  1786. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1787. icnss_pr_info("PDR registration happened");
  1788. out:
  1789. return err;
  1790. }
  1791. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  1792. {
  1793. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  1794. return;
  1795. pdr_handle_release(priv->pdr_handle);
  1796. }
  1797. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  1798. {
  1799. int ret = 0;
  1800. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  1801. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  1802. ret = PTR_ERR(priv->icnss_ramdump_class);
  1803. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  1804. return ret;
  1805. }
  1806. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  1807. ICNSS_RAMDUMP_NAME);
  1808. if (ret < 0) {
  1809. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  1810. goto fail_alloc_major;
  1811. }
  1812. return 0;
  1813. fail_alloc_major:
  1814. class_destroy(priv->icnss_ramdump_class);
  1815. return ret;
  1816. }
  1817. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  1818. {
  1819. int ret = 0;
  1820. struct icnss_ramdump_info *ramdump_info;
  1821. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  1822. if (!dev_name) {
  1823. icnss_pr_err("%s: Invalid device name.\n", __func__);
  1824. return NULL;
  1825. }
  1826. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  1827. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  1828. if (ramdump_info->minor < 0) {
  1829. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  1830. ramdump_info->minor);
  1831. ret = -ENODEV;
  1832. goto fail_out_of_minors;
  1833. }
  1834. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  1835. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  1836. ramdump_info->minor),
  1837. ramdump_info, ramdump_info->name);
  1838. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  1839. ret = PTR_ERR(ramdump_info->dev);
  1840. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  1841. ramdump_info->name, ret);
  1842. goto fail_device_create;
  1843. }
  1844. return (void *)ramdump_info;
  1845. fail_device_create:
  1846. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  1847. fail_out_of_minors:
  1848. kfree(ramdump_info);
  1849. return ERR_PTR(ret);
  1850. }
  1851. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  1852. {
  1853. int ret = 0;
  1854. if (!priv || !priv->pdev) {
  1855. icnss_pr_err("Platform priv or pdev is NULL\n");
  1856. return -EINVAL;
  1857. }
  1858. ret = icnss_ramdump_devnode_init(priv);
  1859. if (ret)
  1860. return ret;
  1861. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  1862. if (!priv->msa0_dump_dev->dev) {
  1863. icnss_pr_err("Failed to create msa0 dump device!");
  1864. return -ENOMEM;
  1865. }
  1866. if (priv->device_id == WCN6750_DEVICE_ID) {
  1867. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  1868. ICNSS_M3_SEGMENT(
  1869. ICNSS_M3_SEGMENT_PHYAREG));
  1870. if (!priv->m3_dump_phyareg->dev) {
  1871. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  1872. return -ENOMEM;
  1873. }
  1874. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  1875. ICNSS_M3_SEGMENT(
  1876. ICNSS_M3_SEGMENT_PHYA));
  1877. if (!priv->m3_dump_phydbg->dev) {
  1878. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  1879. return -ENOMEM;
  1880. }
  1881. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  1882. ICNSS_M3_SEGMENT(
  1883. ICNSS_M3_SEGMENT_WMACREG));
  1884. if (!priv->m3_dump_wmac0reg->dev) {
  1885. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  1886. return -ENOMEM;
  1887. }
  1888. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  1889. ICNSS_M3_SEGMENT(
  1890. ICNSS_M3_SEGMENT_WCSSDBG));
  1891. if (!priv->m3_dump_wcssdbg->dev) {
  1892. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  1893. return -ENOMEM;
  1894. }
  1895. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  1896. ICNSS_M3_SEGMENT(
  1897. ICNSS_M3_SEGMENT_PHYAM3));
  1898. if (!priv->m3_dump_phyapdmem->dev) {
  1899. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  1900. return -ENOMEM;
  1901. }
  1902. }
  1903. return 0;
  1904. }
  1905. static int icnss_enable_recovery(struct icnss_priv *priv)
  1906. {
  1907. int ret;
  1908. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  1909. icnss_pr_dbg("Recovery disabled through module parameter\n");
  1910. return 0;
  1911. }
  1912. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  1913. icnss_pr_dbg("SSR disabled through module parameter\n");
  1914. goto enable_pdr;
  1915. }
  1916. ret = icnss_register_ramdump_devices(priv);
  1917. if (ret)
  1918. return ret;
  1919. if (priv->device_id == WCN6750_DEVICE_ID) {
  1920. icnss_wpss_ssr_register_notifier(priv);
  1921. return 0;
  1922. }
  1923. icnss_modem_ssr_register_notifier(priv);
  1924. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  1925. icnss_pr_dbg("PDR disabled through module parameter\n");
  1926. return 0;
  1927. }
  1928. enable_pdr:
  1929. ret = icnss_pd_restart_enable(priv);
  1930. if (ret)
  1931. return ret;
  1932. return 0;
  1933. }
  1934. static int icnss_dev_id_match(struct icnss_priv *priv,
  1935. struct device_info *dev_info)
  1936. {
  1937. if (!dev_info) {
  1938. icnss_pr_info("WLAN driver devinfo is null, Continue driver loading");
  1939. return 1;
  1940. }
  1941. while (dev_info->device_id) {
  1942. if (priv->device_id == dev_info->device_id)
  1943. return 1;
  1944. dev_info++;
  1945. }
  1946. return 0;
  1947. }
  1948. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  1949. unsigned long *thermal_state)
  1950. {
  1951. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  1952. *thermal_state = icnss_tcdev->max_thermal_state;
  1953. return 0;
  1954. }
  1955. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  1956. unsigned long *thermal_state)
  1957. {
  1958. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  1959. *thermal_state = icnss_tcdev->curr_thermal_state;
  1960. return 0;
  1961. }
  1962. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  1963. unsigned long thermal_state)
  1964. {
  1965. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  1966. struct device *dev = &penv->pdev->dev;
  1967. int ret = 0;
  1968. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  1969. return 0;
  1970. if (thermal_state > icnss_tcdev->max_thermal_state)
  1971. return -EINVAL;
  1972. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  1973. thermal_state, icnss_tcdev->tcdev_id);
  1974. mutex_lock(&penv->tcdev_lock);
  1975. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  1976. icnss_tcdev->tcdev_id);
  1977. if (!ret)
  1978. icnss_tcdev->curr_thermal_state = thermal_state;
  1979. mutex_unlock(&penv->tcdev_lock);
  1980. if (ret) {
  1981. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  1982. ret, icnss_tcdev->tcdev_id);
  1983. return ret;
  1984. }
  1985. return 0;
  1986. }
  1987. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  1988. .get_max_state = icnss_tcdev_get_max_state,
  1989. .get_cur_state = icnss_tcdev_get_cur_state,
  1990. .set_cur_state = icnss_tcdev_set_cur_state,
  1991. };
  1992. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  1993. int tcdev_id)
  1994. {
  1995. struct icnss_priv *priv = dev_get_drvdata(dev);
  1996. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  1997. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  1998. struct device_node *dev_node;
  1999. int ret = 0;
  2000. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2001. if (!icnss_tcdev)
  2002. return -ENOMEM;
  2003. icnss_tcdev->tcdev_id = tcdev_id;
  2004. icnss_tcdev->max_thermal_state = max_state;
  2005. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2006. "qcom,icnss_cdev%d", tcdev_id);
  2007. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2008. if (!dev_node) {
  2009. icnss_pr_err("Failed to get cooling device node\n");
  2010. return -EINVAL;
  2011. }
  2012. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2013. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2014. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2015. dev_node,
  2016. cdev_node_name, icnss_tcdev,
  2017. &icnss_cooling_ops);
  2018. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2019. ret = PTR_ERR(icnss_tcdev->tcdev);
  2020. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2021. ret, icnss_tcdev->tcdev_id);
  2022. } else {
  2023. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2024. icnss_tcdev->tcdev_id);
  2025. list_add(&icnss_tcdev->tcdev_list,
  2026. &priv->icnss_tcdev_list);
  2027. }
  2028. } else {
  2029. icnss_pr_dbg("Cooling device registration not supported");
  2030. ret = -EOPNOTSUPP;
  2031. }
  2032. return ret;
  2033. }
  2034. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2035. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2036. {
  2037. struct icnss_priv *priv = dev_get_drvdata(dev);
  2038. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2039. while (!list_empty(&priv->icnss_tcdev_list)) {
  2040. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2041. struct icnss_thermal_cdev,
  2042. tcdev_list);
  2043. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2044. list_del(&icnss_tcdev->tcdev_list);
  2045. kfree(icnss_tcdev);
  2046. }
  2047. }
  2048. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2049. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2050. unsigned long *thermal_state,
  2051. int tcdev_id)
  2052. {
  2053. struct icnss_priv *priv = dev_get_drvdata(dev);
  2054. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2055. mutex_lock(&priv->tcdev_lock);
  2056. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2057. if (icnss_tcdev->tcdev_id != tcdev_id)
  2058. continue;
  2059. *thermal_state = icnss_tcdev->curr_thermal_state;
  2060. mutex_unlock(&priv->tcdev_lock);
  2061. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2062. icnss_tcdev->curr_thermal_state, tcdev_id);
  2063. return 0;
  2064. }
  2065. mutex_unlock(&priv->tcdev_lock);
  2066. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2067. return -EINVAL;
  2068. }
  2069. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2070. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2071. int cmd_len, void *cb_ctx,
  2072. int (*cb)(void *ctx, void *event, int event_len))
  2073. {
  2074. struct icnss_priv *priv = icnss_get_plat_priv();
  2075. int ret;
  2076. if (!priv)
  2077. return -ENODEV;
  2078. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2079. return -EINVAL;
  2080. priv->get_info_cb = cb;
  2081. priv->get_info_cb_ctx = cb_ctx;
  2082. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2083. if (ret) {
  2084. priv->get_info_cb = NULL;
  2085. priv->get_info_cb_ctx = NULL;
  2086. }
  2087. return ret;
  2088. }
  2089. EXPORT_SYMBOL(icnss_qmi_send);
  2090. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2091. struct module *owner, const char *mod_name)
  2092. {
  2093. int ret = 0;
  2094. struct icnss_priv *priv = icnss_get_plat_priv();
  2095. if (!priv || !priv->pdev) {
  2096. ret = -ENODEV;
  2097. goto out;
  2098. }
  2099. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2100. if (priv->ops) {
  2101. icnss_pr_err("Driver already registered\n");
  2102. ret = -EEXIST;
  2103. goto out;
  2104. }
  2105. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2106. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2107. ops->dev_info->name);
  2108. return -ENODEV;
  2109. }
  2110. if (!ops->probe || !ops->remove) {
  2111. ret = -EINVAL;
  2112. goto out;
  2113. }
  2114. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2115. 0, ops);
  2116. if (ret == -EINTR)
  2117. ret = 0;
  2118. out:
  2119. return ret;
  2120. }
  2121. EXPORT_SYMBOL(__icnss_register_driver);
  2122. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2123. {
  2124. int ret;
  2125. struct icnss_priv *priv = icnss_get_plat_priv();
  2126. if (!priv || !priv->pdev) {
  2127. ret = -ENODEV;
  2128. goto out;
  2129. }
  2130. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2131. if (!priv->ops) {
  2132. icnss_pr_err("Driver not registered\n");
  2133. ret = -ENOENT;
  2134. goto out;
  2135. }
  2136. ret = icnss_driver_event_post(priv,
  2137. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2138. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2139. out:
  2140. return ret;
  2141. }
  2142. EXPORT_SYMBOL(icnss_unregister_driver);
  2143. static struct icnss_msi_config msi_config = {
  2144. .total_vectors = 28,
  2145. .total_users = 2,
  2146. .users = (struct icnss_msi_user[]) {
  2147. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2148. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2149. },
  2150. };
  2151. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2152. {
  2153. priv->msi_config = &msi_config;
  2154. return 0;
  2155. }
  2156. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2157. int *num_vectors, u32 *user_base_data,
  2158. u32 *base_vector)
  2159. {
  2160. struct icnss_priv *priv = dev_get_drvdata(dev);
  2161. struct icnss_msi_config *msi_config;
  2162. int idx;
  2163. if (!priv)
  2164. return -ENODEV;
  2165. msi_config = priv->msi_config;
  2166. if (!msi_config) {
  2167. icnss_pr_err("MSI is not supported.\n");
  2168. return -EINVAL;
  2169. }
  2170. for (idx = 0; idx < msi_config->total_users; idx++) {
  2171. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2172. *num_vectors = msi_config->users[idx].num_vectors;
  2173. *user_base_data = msi_config->users[idx].base_vector
  2174. + priv->msi_base_data;
  2175. *base_vector = msi_config->users[idx].base_vector;
  2176. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2177. user_name, *num_vectors, *user_base_data,
  2178. *base_vector);
  2179. return 0;
  2180. }
  2181. }
  2182. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2183. return -EINVAL;
  2184. }
  2185. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2186. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2187. {
  2188. struct icnss_priv *priv = dev_get_drvdata(dev);
  2189. int irq_num;
  2190. irq_num = priv->srng_irqs[vector];
  2191. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2192. irq_num, vector);
  2193. return irq_num;
  2194. }
  2195. EXPORT_SYMBOL(icnss_get_msi_irq);
  2196. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2197. u32 *msi_addr_high)
  2198. {
  2199. struct icnss_priv *priv = dev_get_drvdata(dev);
  2200. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2201. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2202. }
  2203. EXPORT_SYMBOL(icnss_get_msi_address);
  2204. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2205. irqreturn_t (*handler)(int, void *),
  2206. unsigned long flags, const char *name, void *ctx)
  2207. {
  2208. int ret = 0;
  2209. unsigned int irq;
  2210. struct ce_irq_list *irq_entry;
  2211. struct icnss_priv *priv = dev_get_drvdata(dev);
  2212. if (!priv || !priv->pdev) {
  2213. ret = -ENODEV;
  2214. goto out;
  2215. }
  2216. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2217. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2218. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2219. ret = -EINVAL;
  2220. goto out;
  2221. }
  2222. irq = priv->ce_irqs[ce_id];
  2223. irq_entry = &priv->ce_irq_list[ce_id];
  2224. if (irq_entry->handler || irq_entry->irq) {
  2225. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2226. irq, ce_id);
  2227. ret = -EEXIST;
  2228. goto out;
  2229. }
  2230. ret = request_irq(irq, handler, flags, name, ctx);
  2231. if (ret) {
  2232. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2233. irq, ce_id, ret);
  2234. goto out;
  2235. }
  2236. irq_entry->irq = irq;
  2237. irq_entry->handler = handler;
  2238. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2239. penv->stats.ce_irqs[ce_id].request++;
  2240. out:
  2241. return ret;
  2242. }
  2243. EXPORT_SYMBOL(icnss_ce_request_irq);
  2244. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2245. {
  2246. int ret = 0;
  2247. unsigned int irq;
  2248. struct ce_irq_list *irq_entry;
  2249. if (!penv || !penv->pdev || !dev) {
  2250. ret = -ENODEV;
  2251. goto out;
  2252. }
  2253. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2254. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2255. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2256. ret = -EINVAL;
  2257. goto out;
  2258. }
  2259. irq = penv->ce_irqs[ce_id];
  2260. irq_entry = &penv->ce_irq_list[ce_id];
  2261. if (!irq_entry->handler || !irq_entry->irq) {
  2262. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2263. ret = -EEXIST;
  2264. goto out;
  2265. }
  2266. free_irq(irq, ctx);
  2267. irq_entry->irq = 0;
  2268. irq_entry->handler = NULL;
  2269. penv->stats.ce_irqs[ce_id].free++;
  2270. out:
  2271. return ret;
  2272. }
  2273. EXPORT_SYMBOL(icnss_ce_free_irq);
  2274. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2275. {
  2276. unsigned int irq;
  2277. if (!penv || !penv->pdev || !dev) {
  2278. icnss_pr_err("Platform driver not initialized\n");
  2279. return;
  2280. }
  2281. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2282. penv->state);
  2283. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2284. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2285. return;
  2286. }
  2287. penv->stats.ce_irqs[ce_id].enable++;
  2288. irq = penv->ce_irqs[ce_id];
  2289. enable_irq(irq);
  2290. }
  2291. EXPORT_SYMBOL(icnss_enable_irq);
  2292. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2293. {
  2294. unsigned int irq;
  2295. if (!penv || !penv->pdev || !dev) {
  2296. icnss_pr_err("Platform driver not initialized\n");
  2297. return;
  2298. }
  2299. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2300. penv->state);
  2301. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2302. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2303. ce_id);
  2304. return;
  2305. }
  2306. irq = penv->ce_irqs[ce_id];
  2307. disable_irq(irq);
  2308. penv->stats.ce_irqs[ce_id].disable++;
  2309. }
  2310. EXPORT_SYMBOL(icnss_disable_irq);
  2311. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2312. {
  2313. char *fw_build_timestamp = NULL;
  2314. struct icnss_priv *priv = dev_get_drvdata(dev);
  2315. if (!priv) {
  2316. icnss_pr_err("Platform driver not initialized\n");
  2317. return -EINVAL;
  2318. }
  2319. info->v_addr = priv->mem_base_va;
  2320. info->p_addr = priv->mem_base_pa;
  2321. info->chip_id = priv->chip_info.chip_id;
  2322. info->chip_family = priv->chip_info.chip_family;
  2323. info->board_id = priv->board_id;
  2324. info->soc_id = priv->soc_id;
  2325. info->fw_version = priv->fw_version_info.fw_version;
  2326. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2327. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2328. strlcpy(info->fw_build_timestamp,
  2329. priv->fw_version_info.fw_build_timestamp,
  2330. WLFW_MAX_TIMESTAMP_LEN + 1);
  2331. return 0;
  2332. }
  2333. EXPORT_SYMBOL(icnss_get_soc_info);
  2334. int icnss_get_mhi_state(struct device *dev)
  2335. {
  2336. struct icnss_priv *priv = dev_get_drvdata(dev);
  2337. if (!priv) {
  2338. icnss_pr_err("Platform driver not initialized\n");
  2339. return -EINVAL;
  2340. }
  2341. if (!priv->mhi_state_info_va)
  2342. return -ENOMEM;
  2343. return ioread32(priv->mhi_state_info_va);
  2344. }
  2345. EXPORT_SYMBOL(icnss_get_mhi_state);
  2346. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2347. {
  2348. int ret;
  2349. struct icnss_priv *priv;
  2350. if (!dev)
  2351. return -ENODEV;
  2352. priv = dev_get_drvdata(dev);
  2353. if (!priv) {
  2354. icnss_pr_err("Platform driver not initialized\n");
  2355. return -EINVAL;
  2356. }
  2357. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2358. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2359. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2360. priv->state);
  2361. return -EINVAL;
  2362. }
  2363. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2364. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2365. if (ret)
  2366. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2367. ret, fw_log_mode);
  2368. return ret;
  2369. }
  2370. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2371. int icnss_force_wake_request(struct device *dev)
  2372. {
  2373. struct icnss_priv *priv;
  2374. if (!dev)
  2375. return -ENODEV;
  2376. priv = dev_get_drvdata(dev);
  2377. if (!priv) {
  2378. icnss_pr_err("Platform driver not initialized\n");
  2379. return -EINVAL;
  2380. }
  2381. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2382. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2383. atomic_read(&priv->soc_wake_ref_count));
  2384. return 0;
  2385. }
  2386. icnss_pr_soc_wake("Calling SOC Wake request");
  2387. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2388. 0, NULL);
  2389. return 0;
  2390. }
  2391. EXPORT_SYMBOL(icnss_force_wake_request);
  2392. int icnss_force_wake_release(struct device *dev)
  2393. {
  2394. struct icnss_priv *priv;
  2395. if (!dev)
  2396. return -ENODEV;
  2397. priv = dev_get_drvdata(dev);
  2398. if (!priv) {
  2399. icnss_pr_err("Platform driver not initialized\n");
  2400. return -EINVAL;
  2401. }
  2402. icnss_pr_soc_wake("Calling SOC Wake response");
  2403. if (atomic_read(&priv->soc_wake_ref_count) &&
  2404. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2405. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2406. atomic_read(&priv->soc_wake_ref_count));
  2407. return 0;
  2408. }
  2409. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2410. 0, NULL);
  2411. return 0;
  2412. }
  2413. EXPORT_SYMBOL(icnss_force_wake_release);
  2414. int icnss_is_device_awake(struct device *dev)
  2415. {
  2416. struct icnss_priv *priv = dev_get_drvdata(dev);
  2417. if (!priv) {
  2418. icnss_pr_err("Platform driver not initialized\n");
  2419. return -EINVAL;
  2420. }
  2421. return atomic_read(&priv->soc_wake_ref_count);
  2422. }
  2423. EXPORT_SYMBOL(icnss_is_device_awake);
  2424. int icnss_is_pci_ep_awake(struct device *dev)
  2425. {
  2426. struct icnss_priv *priv = dev_get_drvdata(dev);
  2427. if (!priv) {
  2428. icnss_pr_err("Platform driver not initialized\n");
  2429. return -EINVAL;
  2430. }
  2431. if (!priv->mhi_state_info_va)
  2432. return -ENOMEM;
  2433. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2434. }
  2435. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2436. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2437. uint32_t mem_type, uint32_t data_len,
  2438. uint8_t *output)
  2439. {
  2440. int ret = 0;
  2441. struct icnss_priv *priv = dev_get_drvdata(dev);
  2442. if (priv->magic != ICNSS_MAGIC) {
  2443. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2444. dev, priv, priv->magic);
  2445. return -EINVAL;
  2446. }
  2447. if (!output || data_len == 0
  2448. || data_len > WLFW_MAX_DATA_SIZE) {
  2449. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2450. output, data_len);
  2451. ret = -EINVAL;
  2452. goto out;
  2453. }
  2454. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2455. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2456. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2457. priv->state);
  2458. ret = -EINVAL;
  2459. goto out;
  2460. }
  2461. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2462. data_len, output);
  2463. out:
  2464. return ret;
  2465. }
  2466. EXPORT_SYMBOL(icnss_athdiag_read);
  2467. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2468. uint32_t mem_type, uint32_t data_len,
  2469. uint8_t *input)
  2470. {
  2471. int ret = 0;
  2472. struct icnss_priv *priv = dev_get_drvdata(dev);
  2473. if (priv->magic != ICNSS_MAGIC) {
  2474. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2475. dev, priv, priv->magic);
  2476. return -EINVAL;
  2477. }
  2478. if (!input || data_len == 0
  2479. || data_len > WLFW_MAX_DATA_SIZE) {
  2480. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2481. input, data_len);
  2482. ret = -EINVAL;
  2483. goto out;
  2484. }
  2485. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2486. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2487. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2488. priv->state);
  2489. ret = -EINVAL;
  2490. goto out;
  2491. }
  2492. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2493. data_len, input);
  2494. out:
  2495. return ret;
  2496. }
  2497. EXPORT_SYMBOL(icnss_athdiag_write);
  2498. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2499. enum icnss_driver_mode mode,
  2500. const char *host_version)
  2501. {
  2502. struct icnss_priv *priv = dev_get_drvdata(dev);
  2503. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2504. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2505. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2506. priv->state);
  2507. return -EINVAL;
  2508. }
  2509. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2510. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2511. priv->state);
  2512. return -EINVAL;
  2513. }
  2514. if (priv->device_id == WCN6750_DEVICE_ID &&
  2515. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2516. icnss_setup_dms_mac(priv);
  2517. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2518. }
  2519. EXPORT_SYMBOL(icnss_wlan_enable);
  2520. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2521. {
  2522. struct icnss_priv *priv = dev_get_drvdata(dev);
  2523. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2524. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2525. priv->state);
  2526. return 0;
  2527. }
  2528. return icnss_send_wlan_disable_to_fw(priv);
  2529. }
  2530. EXPORT_SYMBOL(icnss_wlan_disable);
  2531. bool icnss_is_qmi_disable(struct device *dev)
  2532. {
  2533. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2534. }
  2535. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2536. int icnss_get_ce_id(struct device *dev, int irq)
  2537. {
  2538. int i;
  2539. if (!penv || !penv->pdev || !dev)
  2540. return -ENODEV;
  2541. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2542. if (penv->ce_irqs[i] == irq)
  2543. return i;
  2544. }
  2545. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2546. return -EINVAL;
  2547. }
  2548. EXPORT_SYMBOL(icnss_get_ce_id);
  2549. int icnss_get_irq(struct device *dev, int ce_id)
  2550. {
  2551. int irq;
  2552. if (!penv || !penv->pdev || !dev)
  2553. return -ENODEV;
  2554. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2555. return -EINVAL;
  2556. irq = penv->ce_irqs[ce_id];
  2557. return irq;
  2558. }
  2559. EXPORT_SYMBOL(icnss_get_irq);
  2560. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2561. {
  2562. struct icnss_priv *priv = dev_get_drvdata(dev);
  2563. if (!priv) {
  2564. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2565. return NULL;
  2566. }
  2567. return priv->iommu_domain;
  2568. }
  2569. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2570. int icnss_smmu_map(struct device *dev,
  2571. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2572. {
  2573. struct icnss_priv *priv = dev_get_drvdata(dev);
  2574. int flag = IOMMU_READ | IOMMU_WRITE;
  2575. bool dma_coherent = false;
  2576. unsigned long iova;
  2577. int prop_len = 0;
  2578. size_t len;
  2579. int ret = 0;
  2580. if (!priv) {
  2581. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2582. dev, priv);
  2583. return -EINVAL;
  2584. }
  2585. if (!iova_addr) {
  2586. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2587. &paddr, size);
  2588. return -EINVAL;
  2589. }
  2590. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2591. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2592. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2593. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2594. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2595. iova,
  2596. &priv->smmu_iova_ipa_start,
  2597. priv->smmu_iova_ipa_len);
  2598. return -ENOMEM;
  2599. }
  2600. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2601. icnss_pr_dbg("dma-coherent is %s\n",
  2602. dma_coherent ? "enabled" : "disabled");
  2603. if (dma_coherent)
  2604. flag |= IOMMU_CACHE;
  2605. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2606. ret = iommu_map(priv->iommu_domain, iova,
  2607. rounddown(paddr, PAGE_SIZE), len,
  2608. flag);
  2609. if (ret) {
  2610. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2611. return ret;
  2612. }
  2613. priv->smmu_iova_ipa_current = iova + len;
  2614. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2615. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2616. return 0;
  2617. }
  2618. EXPORT_SYMBOL(icnss_smmu_map);
  2619. int icnss_smmu_unmap(struct device *dev,
  2620. uint32_t iova_addr, size_t size)
  2621. {
  2622. struct icnss_priv *priv = dev_get_drvdata(dev);
  2623. unsigned long iova;
  2624. size_t len, unmapped_len;
  2625. if (!priv) {
  2626. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2627. dev, priv);
  2628. return -EINVAL;
  2629. }
  2630. if (!iova_addr) {
  2631. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2632. size);
  2633. return -EINVAL;
  2634. }
  2635. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2636. PAGE_SIZE);
  2637. iova = rounddown(iova_addr, PAGE_SIZE);
  2638. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2639. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2640. iova,
  2641. &priv->smmu_iova_ipa_start,
  2642. priv->smmu_iova_ipa_len);
  2643. return -ENOMEM;
  2644. }
  2645. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2646. iova, len);
  2647. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2648. if (unmapped_len != len) {
  2649. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2650. return -EINVAL;
  2651. }
  2652. priv->smmu_iova_ipa_current = iova;
  2653. return 0;
  2654. }
  2655. EXPORT_SYMBOL(icnss_smmu_unmap);
  2656. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2657. {
  2658. return socinfo_get_serial_number();
  2659. }
  2660. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2661. int icnss_trigger_recovery(struct device *dev)
  2662. {
  2663. int ret = 0;
  2664. struct icnss_priv *priv = dev_get_drvdata(dev);
  2665. if (priv->magic != ICNSS_MAGIC) {
  2666. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2667. ret = -EINVAL;
  2668. goto out;
  2669. }
  2670. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2671. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2672. priv->state);
  2673. ret = -EPERM;
  2674. goto out;
  2675. }
  2676. if (priv->device_id == WCN6750_DEVICE_ID) {
  2677. icnss_pr_vdbg("Initiate Root PD restart");
  2678. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2679. ICNSS_SMP2P_OUT_POWER_SAVE);
  2680. if (!ret)
  2681. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2682. return ret;
  2683. }
  2684. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2685. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2686. priv->state);
  2687. ret = -EOPNOTSUPP;
  2688. goto out;
  2689. }
  2690. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2691. priv->state);
  2692. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2693. if (!ret)
  2694. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2695. out:
  2696. return ret;
  2697. }
  2698. EXPORT_SYMBOL(icnss_trigger_recovery);
  2699. int icnss_idle_shutdown(struct device *dev)
  2700. {
  2701. struct icnss_priv *priv = dev_get_drvdata(dev);
  2702. if (!priv) {
  2703. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2704. return -EINVAL;
  2705. }
  2706. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2707. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2708. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2709. return -EBUSY;
  2710. }
  2711. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2712. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2713. }
  2714. EXPORT_SYMBOL(icnss_idle_shutdown);
  2715. int icnss_idle_restart(struct device *dev)
  2716. {
  2717. struct icnss_priv *priv = dev_get_drvdata(dev);
  2718. if (!priv) {
  2719. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2720. return -EINVAL;
  2721. }
  2722. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2723. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2724. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2725. return -EBUSY;
  2726. }
  2727. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2728. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2729. }
  2730. EXPORT_SYMBOL(icnss_idle_restart);
  2731. int icnss_exit_power_save(struct device *dev)
  2732. {
  2733. struct icnss_priv *priv = dev_get_drvdata(dev);
  2734. icnss_pr_vdbg("Calling Exit Power Save\n");
  2735. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2736. !test_bit(ICNSS_MODE_ON, &priv->state))
  2737. return 0;
  2738. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2739. ICNSS_SMP2P_OUT_POWER_SAVE);
  2740. }
  2741. EXPORT_SYMBOL(icnss_exit_power_save);
  2742. int icnss_prevent_l1(struct device *dev)
  2743. {
  2744. struct icnss_priv *priv = dev_get_drvdata(dev);
  2745. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2746. !test_bit(ICNSS_MODE_ON, &priv->state))
  2747. return 0;
  2748. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2749. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2750. }
  2751. EXPORT_SYMBOL(icnss_prevent_l1);
  2752. void icnss_allow_l1(struct device *dev)
  2753. {
  2754. struct icnss_priv *priv = dev_get_drvdata(dev);
  2755. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2756. !test_bit(ICNSS_MODE_ON, &priv->state))
  2757. return;
  2758. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2759. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2760. }
  2761. EXPORT_SYMBOL(icnss_allow_l1);
  2762. void icnss_allow_recursive_recovery(struct device *dev)
  2763. {
  2764. struct icnss_priv *priv = dev_get_drvdata(dev);
  2765. priv->allow_recursive_recovery = true;
  2766. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2767. }
  2768. void icnss_disallow_recursive_recovery(struct device *dev)
  2769. {
  2770. struct icnss_priv *priv = dev_get_drvdata(dev);
  2771. priv->allow_recursive_recovery = false;
  2772. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  2773. }
  2774. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  2775. {
  2776. struct kobject *icnss_kobject;
  2777. int ret = 0;
  2778. atomic_set(&priv->is_shutdown, false);
  2779. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  2780. if (!icnss_kobject) {
  2781. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  2782. return -EINVAL;
  2783. }
  2784. priv->icnss_kobject = icnss_kobject;
  2785. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  2786. if (ret) {
  2787. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  2788. return ret;
  2789. }
  2790. return ret;
  2791. }
  2792. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  2793. {
  2794. struct kobject *icnss_kobject;
  2795. icnss_kobject = priv->icnss_kobject;
  2796. if (icnss_kobject)
  2797. kobject_put(icnss_kobject);
  2798. }
  2799. static ssize_t qdss_tr_start_store(struct device *dev,
  2800. struct device_attribute *attr,
  2801. const char *buf, size_t count)
  2802. {
  2803. struct icnss_priv *priv = dev_get_drvdata(dev);
  2804. wlfw_qdss_trace_start(priv);
  2805. icnss_pr_dbg("Received QDSS start command\n");
  2806. return count;
  2807. }
  2808. static ssize_t qdss_tr_stop_store(struct device *dev,
  2809. struct device_attribute *attr,
  2810. const char *user_buf, size_t count)
  2811. {
  2812. struct icnss_priv *priv = dev_get_drvdata(dev);
  2813. u32 option = 0;
  2814. if (sscanf(user_buf, "%du", &option) != 1)
  2815. return -EINVAL;
  2816. wlfw_qdss_trace_stop(priv, option);
  2817. icnss_pr_dbg("Received QDSS stop command\n");
  2818. return count;
  2819. }
  2820. static ssize_t qdss_conf_download_store(struct device *dev,
  2821. struct device_attribute *attr,
  2822. const char *buf, size_t count)
  2823. {
  2824. struct icnss_priv *priv = dev_get_drvdata(dev);
  2825. icnss_wlfw_qdss_dnld_send_sync(priv);
  2826. icnss_pr_dbg("Received QDSS download config command\n");
  2827. return count;
  2828. }
  2829. static ssize_t hw_trc_override_store(struct device *dev,
  2830. struct device_attribute *attr,
  2831. const char *buf, size_t count)
  2832. {
  2833. struct icnss_priv *priv = dev_get_drvdata(dev);
  2834. int tmp = 0;
  2835. if (sscanf(buf, "%du", &tmp) != 1)
  2836. return -EINVAL;
  2837. priv->hw_trc_override = tmp;
  2838. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2839. return count;
  2840. }
  2841. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  2842. {
  2843. struct icnss_priv *priv = icnss_get_plat_priv();
  2844. phandle rproc_phandle;
  2845. int ret;
  2846. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  2847. &rproc_phandle)) {
  2848. icnss_pr_err("error reading rproc phandle\n");
  2849. return;
  2850. }
  2851. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  2852. if (IS_ERR_OR_NULL(priv->rproc)) {
  2853. icnss_pr_err("rproc not found");
  2854. return;
  2855. }
  2856. ret = rproc_boot(priv->rproc);
  2857. if (ret) {
  2858. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  2859. rproc_put(priv->rproc);
  2860. }
  2861. }
  2862. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  2863. {
  2864. if (priv && priv->rproc) {
  2865. rproc_shutdown(priv->rproc);
  2866. rproc_put(priv->rproc);
  2867. priv->rproc = NULL;
  2868. }
  2869. }
  2870. static ssize_t wpss_boot_store(struct device *dev,
  2871. struct device_attribute *attr,
  2872. const char *buf, size_t count)
  2873. {
  2874. struct icnss_priv *priv = dev_get_drvdata(dev);
  2875. int wpss_rproc = 0;
  2876. if (priv->device_id != WCN6750_DEVICE_ID)
  2877. return count;
  2878. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  2879. icnss_pr_err("Failed to read wpss rproc info");
  2880. return -EINVAL;
  2881. }
  2882. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  2883. if (wpss_rproc == 1)
  2884. schedule_work(&wpss_loader);
  2885. else if (wpss_rproc == 0)
  2886. icnss_wpss_unload(priv);
  2887. return count;
  2888. }
  2889. static ssize_t wlan_en_delay_store(struct device *dev,
  2890. struct device_attribute *attr,
  2891. const char *buf, size_t count)
  2892. {
  2893. struct icnss_priv *priv = dev_get_drvdata(dev);
  2894. uint32_t wlan_en_delay = 0;
  2895. if (priv->device_id != WCN6750_DEVICE_ID)
  2896. return count;
  2897. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  2898. icnss_pr_err("Failed to read wlan_en_delay");
  2899. return -EINVAL;
  2900. }
  2901. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  2902. priv->wlan_en_delay_ms = wlan_en_delay;
  2903. return count;
  2904. }
  2905. static DEVICE_ATTR_WO(qdss_tr_start);
  2906. static DEVICE_ATTR_WO(qdss_tr_stop);
  2907. static DEVICE_ATTR_WO(qdss_conf_download);
  2908. static DEVICE_ATTR_WO(hw_trc_override);
  2909. static DEVICE_ATTR_WO(wpss_boot);
  2910. static DEVICE_ATTR_WO(wlan_en_delay);
  2911. static struct attribute *icnss_attrs[] = {
  2912. &dev_attr_qdss_tr_start.attr,
  2913. &dev_attr_qdss_tr_stop.attr,
  2914. &dev_attr_qdss_conf_download.attr,
  2915. &dev_attr_hw_trc_override.attr,
  2916. &dev_attr_wpss_boot.attr,
  2917. &dev_attr_wlan_en_delay.attr,
  2918. NULL,
  2919. };
  2920. static struct attribute_group icnss_attr_group = {
  2921. .attrs = icnss_attrs,
  2922. };
  2923. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  2924. {
  2925. struct device *dev = &priv->pdev->dev;
  2926. int ret;
  2927. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  2928. if (ret) {
  2929. icnss_pr_err("Failed to create icnss link, err = %d\n",
  2930. ret);
  2931. goto out;
  2932. }
  2933. return 0;
  2934. out:
  2935. return ret;
  2936. }
  2937. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  2938. {
  2939. sysfs_remove_link(kernel_kobj, "icnss");
  2940. }
  2941. static int icnss_sysfs_create(struct icnss_priv *priv)
  2942. {
  2943. int ret = 0;
  2944. ret = devm_device_add_group(&priv->pdev->dev,
  2945. &icnss_attr_group);
  2946. if (ret) {
  2947. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  2948. ret);
  2949. goto out;
  2950. }
  2951. icnss_create_sysfs_link(priv);
  2952. ret = icnss_create_shutdown_sysfs(priv);
  2953. if (ret)
  2954. goto remove_icnss_group;
  2955. return 0;
  2956. remove_icnss_group:
  2957. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  2958. out:
  2959. return ret;
  2960. }
  2961. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  2962. {
  2963. icnss_destroy_shutdown_sysfs(priv);
  2964. icnss_remove_sysfs_link(priv);
  2965. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  2966. }
  2967. static int icnss_get_vbatt_info(struct icnss_priv *priv)
  2968. {
  2969. struct adc_tm_chip *adc_tm_dev = NULL;
  2970. struct iio_channel *channel = NULL;
  2971. int ret = 0;
  2972. adc_tm_dev = get_adc_tm(&priv->pdev->dev, "icnss");
  2973. if (PTR_ERR(adc_tm_dev) == -EPROBE_DEFER) {
  2974. icnss_pr_err("adc_tm_dev probe defer\n");
  2975. return -EPROBE_DEFER;
  2976. }
  2977. if (IS_ERR(adc_tm_dev)) {
  2978. ret = PTR_ERR(adc_tm_dev);
  2979. icnss_pr_err("Not able to get ADC dev, VBATT monitoring is disabled: %d\n",
  2980. ret);
  2981. return ret;
  2982. }
  2983. channel = devm_iio_channel_get(&priv->pdev->dev, "icnss");
  2984. if (PTR_ERR(channel) == -EPROBE_DEFER) {
  2985. icnss_pr_err("channel probe defer\n");
  2986. return -EPROBE_DEFER;
  2987. }
  2988. if (IS_ERR(channel)) {
  2989. ret = PTR_ERR(channel);
  2990. icnss_pr_err("Not able to get VADC dev, VBATT monitoring is disabled: %d\n",
  2991. ret);
  2992. return ret;
  2993. }
  2994. priv->adc_tm_dev = adc_tm_dev;
  2995. priv->channel = channel;
  2996. return 0;
  2997. }
  2998. static int icnss_resource_parse(struct icnss_priv *priv)
  2999. {
  3000. int ret = 0, i = 0;
  3001. struct platform_device *pdev = priv->pdev;
  3002. struct device *dev = &pdev->dev;
  3003. struct resource *res;
  3004. u32 int_prop;
  3005. if (of_property_read_bool(pdev->dev.of_node, "qcom,icnss-adc_tm")) {
  3006. ret = icnss_get_vbatt_info(priv);
  3007. if (ret == -EPROBE_DEFER)
  3008. goto out;
  3009. priv->vbatt_supported = true;
  3010. }
  3011. ret = icnss_get_vreg(priv);
  3012. if (ret) {
  3013. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3014. goto out;
  3015. }
  3016. ret = icnss_get_clk(priv);
  3017. if (ret) {
  3018. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3019. goto put_vreg;
  3020. }
  3021. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3022. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3023. "membase");
  3024. if (!res) {
  3025. icnss_pr_err("Memory base not found in DT\n");
  3026. ret = -EINVAL;
  3027. goto put_clk;
  3028. }
  3029. priv->mem_base_pa = res->start;
  3030. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3031. resource_size(res));
  3032. if (!priv->mem_base_va) {
  3033. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3034. &priv->mem_base_pa);
  3035. ret = -EINVAL;
  3036. goto put_clk;
  3037. }
  3038. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3039. &priv->mem_base_pa,
  3040. priv->mem_base_va);
  3041. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3042. res = platform_get_resource(priv->pdev,
  3043. IORESOURCE_IRQ, i);
  3044. if (!res) {
  3045. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3046. ret = -ENODEV;
  3047. goto put_clk;
  3048. } else {
  3049. priv->ce_irqs[i] = res->start;
  3050. }
  3051. }
  3052. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3053. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3054. "msi_addr");
  3055. if (!res) {
  3056. icnss_pr_err("MSI address not found in DT\n");
  3057. ret = -EINVAL;
  3058. goto put_clk;
  3059. }
  3060. priv->msi_addr_pa = res->start;
  3061. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3062. PAGE_SIZE,
  3063. DMA_FROM_DEVICE, 0);
  3064. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3065. icnss_pr_err("MSI: failed to map msi address\n");
  3066. priv->msi_addr_iova = 0;
  3067. ret = -ENOMEM;
  3068. goto put_clk;
  3069. }
  3070. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3071. &priv->msi_addr_pa,
  3072. priv->msi_addr_iova);
  3073. ret = of_property_read_u32_index(dev->of_node,
  3074. "interrupts",
  3075. 1,
  3076. &int_prop);
  3077. if (ret) {
  3078. icnss_pr_dbg("Read interrupt prop failed");
  3079. goto put_clk;
  3080. }
  3081. priv->msi_base_data = int_prop + 32;
  3082. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3083. priv->msi_base_data, int_prop);
  3084. icnss_get_msi_assignment(priv);
  3085. for (i = 0; i < msi_config.total_vectors; i++) {
  3086. res = platform_get_resource(priv->pdev,
  3087. IORESOURCE_IRQ, i);
  3088. if (!res) {
  3089. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3090. ret = -ENODEV;
  3091. goto put_clk;
  3092. } else {
  3093. priv->srng_irqs[i] = res->start;
  3094. }
  3095. }
  3096. }
  3097. return 0;
  3098. put_clk:
  3099. icnss_put_clk(priv);
  3100. put_vreg:
  3101. icnss_put_vreg(priv);
  3102. out:
  3103. return ret;
  3104. }
  3105. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3106. {
  3107. int ret = 0;
  3108. struct platform_device *pdev = priv->pdev;
  3109. struct device *dev = &pdev->dev;
  3110. struct device_node *np = NULL;
  3111. u64 prop_size = 0;
  3112. const __be32 *addrp = NULL;
  3113. np = of_parse_phandle(dev->of_node,
  3114. "qcom,wlan-msa-fixed-region", 0);
  3115. if (np) {
  3116. addrp = of_get_address(np, 0, &prop_size, NULL);
  3117. if (!addrp) {
  3118. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3119. ret = -EINVAL;
  3120. of_node_put(np);
  3121. goto out;
  3122. }
  3123. priv->msa_pa = of_translate_address(np, addrp);
  3124. if (priv->msa_pa == OF_BAD_ADDR) {
  3125. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3126. ret = -EINVAL;
  3127. of_node_put(np);
  3128. goto out;
  3129. }
  3130. of_node_put(np);
  3131. priv->msa_va = memremap(priv->msa_pa,
  3132. (unsigned long)prop_size, MEMREMAP_WT);
  3133. if (!priv->msa_va) {
  3134. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3135. &priv->msa_pa);
  3136. ret = -EINVAL;
  3137. goto out;
  3138. }
  3139. priv->msa_mem_size = prop_size;
  3140. } else {
  3141. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3142. &priv->msa_mem_size);
  3143. if (ret || priv->msa_mem_size == 0) {
  3144. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3145. priv->msa_mem_size, ret);
  3146. goto out;
  3147. }
  3148. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3149. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3150. if (!priv->msa_va) {
  3151. icnss_pr_err("DMA alloc failed for MSA\n");
  3152. ret = -ENOMEM;
  3153. goto out;
  3154. }
  3155. }
  3156. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3157. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3158. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3159. "qcom,fw-prefix");
  3160. return 0;
  3161. out:
  3162. return ret;
  3163. }
  3164. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3165. struct device *dev, unsigned long iova,
  3166. int flags, void *handler_token)
  3167. {
  3168. struct icnss_priv *priv = handler_token;
  3169. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3170. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3171. if (!priv) {
  3172. icnss_pr_err("priv is NULL\n");
  3173. return -ENODEV;
  3174. }
  3175. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3176. fw_down_data.crashed = true;
  3177. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3178. &fw_down_data);
  3179. }
  3180. icnss_trigger_recovery(&priv->pdev->dev);
  3181. /* IOMMU driver requires non-zero return value to print debug info. */
  3182. return -EINVAL;
  3183. }
  3184. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3185. {
  3186. int ret = 0;
  3187. struct platform_device *pdev = priv->pdev;
  3188. struct device *dev = &pdev->dev;
  3189. const char *iommu_dma_type;
  3190. struct resource *res;
  3191. u32 addr_win[2];
  3192. ret = of_property_read_u32_array(dev->of_node,
  3193. "qcom,iommu-dma-addr-pool",
  3194. addr_win,
  3195. ARRAY_SIZE(addr_win));
  3196. if (ret) {
  3197. icnss_pr_err("SMMU IOVA base not found\n");
  3198. } else {
  3199. priv->smmu_iova_start = addr_win[0];
  3200. priv->smmu_iova_len = addr_win[1];
  3201. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3202. &priv->smmu_iova_start,
  3203. priv->smmu_iova_len);
  3204. priv->iommu_domain =
  3205. iommu_get_domain_for_dev(&pdev->dev);
  3206. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3207. &iommu_dma_type);
  3208. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3209. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3210. priv->smmu_s1_enable = true;
  3211. if (priv->device_id == WCN6750_DEVICE_ID)
  3212. iommu_set_fault_handler(priv->iommu_domain,
  3213. icnss_smmu_fault_handler,
  3214. priv);
  3215. }
  3216. res = platform_get_resource_byname(pdev,
  3217. IORESOURCE_MEM,
  3218. "smmu_iova_ipa");
  3219. if (!res) {
  3220. icnss_pr_err("SMMU IOVA IPA not found\n");
  3221. } else {
  3222. priv->smmu_iova_ipa_start = res->start;
  3223. priv->smmu_iova_ipa_current = res->start;
  3224. priv->smmu_iova_ipa_len = resource_size(res);
  3225. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3226. &priv->smmu_iova_ipa_start,
  3227. priv->smmu_iova_ipa_len);
  3228. }
  3229. }
  3230. return 0;
  3231. }
  3232. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3233. {
  3234. if (!priv)
  3235. return -ENODEV;
  3236. if (!priv->smmu_iova_len)
  3237. return -EINVAL;
  3238. *addr = priv->smmu_iova_start;
  3239. *size = priv->smmu_iova_len;
  3240. return 0;
  3241. }
  3242. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3243. {
  3244. if (!priv)
  3245. return -ENODEV;
  3246. if (!priv->smmu_iova_ipa_len)
  3247. return -EINVAL;
  3248. *addr = priv->smmu_iova_ipa_start;
  3249. *size = priv->smmu_iova_ipa_len;
  3250. return 0;
  3251. }
  3252. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3253. char *name)
  3254. {
  3255. if (!priv)
  3256. return;
  3257. if (!priv->use_prefix_path) {
  3258. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3259. return;
  3260. }
  3261. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3262. QCA6750_PATH_PREFIX "%s", name);
  3263. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3264. }
  3265. static const struct platform_device_id icnss_platform_id_table[] = {
  3266. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3267. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3268. { },
  3269. };
  3270. static const struct of_device_id icnss_dt_match[] = {
  3271. {
  3272. .compatible = "qcom,wcn6750",
  3273. .data = (void *)&icnss_platform_id_table[0]},
  3274. {
  3275. .compatible = "qcom,icnss",
  3276. .data = (void *)&icnss_platform_id_table[1]},
  3277. { },
  3278. };
  3279. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3280. static void icnss_init_control_params(struct icnss_priv *priv)
  3281. {
  3282. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3283. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3284. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3285. if (of_property_read_bool(priv->pdev->dev.of_node,
  3286. "bdf-download-support"))
  3287. priv->bdf_download_support = true;
  3288. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3289. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3290. }
  3291. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3292. {
  3293. pm_runtime_get_sync(&priv->pdev->dev);
  3294. pm_runtime_forbid(&priv->pdev->dev);
  3295. pm_runtime_set_active(&priv->pdev->dev);
  3296. pm_runtime_enable(&priv->pdev->dev);
  3297. }
  3298. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3299. {
  3300. pm_runtime_disable(&priv->pdev->dev);
  3301. pm_runtime_allow(&priv->pdev->dev);
  3302. pm_runtime_put_sync(&priv->pdev->dev);
  3303. }
  3304. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3305. {
  3306. return of_property_read_bool(priv->pdev->dev.of_node,
  3307. "use-nv-mac");
  3308. }
  3309. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3310. {
  3311. struct icnss_subsys_restart_level_data *restart_level_data;
  3312. icnss_pr_info("rproc name: %s recovery disable: %d",
  3313. rproc->name, rproc->recovery_disabled);
  3314. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3315. if (!restart_level_data)
  3316. return;
  3317. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3318. if (rproc->recovery_disabled)
  3319. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3320. else
  3321. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3322. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3323. 0, restart_level_data);
  3324. }
  3325. }
  3326. static int icnss_probe(struct platform_device *pdev)
  3327. {
  3328. int ret = 0;
  3329. struct device *dev = &pdev->dev;
  3330. struct icnss_priv *priv;
  3331. const struct of_device_id *of_id;
  3332. const struct platform_device_id *device_id;
  3333. if (dev_get_drvdata(dev)) {
  3334. icnss_pr_err("Driver is already initialized\n");
  3335. return -EEXIST;
  3336. }
  3337. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3338. if (!of_id || !of_id->data) {
  3339. icnss_pr_err("Failed to find of match device!\n");
  3340. ret = -ENODEV;
  3341. goto out_reset_drvdata;
  3342. }
  3343. device_id = of_id->data;
  3344. icnss_pr_dbg("Platform driver probe\n");
  3345. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3346. if (!priv)
  3347. return -ENOMEM;
  3348. priv->magic = ICNSS_MAGIC;
  3349. dev_set_drvdata(dev, priv);
  3350. priv->pdev = pdev;
  3351. priv->device_id = device_id->driver_data;
  3352. priv->is_chain1_supported = true;
  3353. INIT_LIST_HEAD(&priv->vreg_list);
  3354. INIT_LIST_HEAD(&priv->clk_list);
  3355. icnss_allow_recursive_recovery(dev);
  3356. icnss_init_control_params(priv);
  3357. ret = icnss_resource_parse(priv);
  3358. if (ret)
  3359. goto out_reset_drvdata;
  3360. ret = icnss_msa_dt_parse(priv);
  3361. if (ret)
  3362. goto out_free_resources;
  3363. ret = icnss_smmu_dt_parse(priv);
  3364. if (ret)
  3365. goto out_free_resources;
  3366. spin_lock_init(&priv->event_lock);
  3367. spin_lock_init(&priv->on_off_lock);
  3368. spin_lock_init(&priv->soc_wake_msg_lock);
  3369. mutex_init(&priv->dev_lock);
  3370. mutex_init(&priv->tcdev_lock);
  3371. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3372. if (!priv->event_wq) {
  3373. icnss_pr_err("Workqueue creation failed\n");
  3374. ret = -EFAULT;
  3375. goto smmu_cleanup;
  3376. }
  3377. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3378. INIT_LIST_HEAD(&priv->event_list);
  3379. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3380. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3381. if (!priv->soc_wake_wq) {
  3382. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3383. ret = -EFAULT;
  3384. goto out_destroy_wq;
  3385. }
  3386. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3387. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3388. ret = icnss_register_fw_service(priv);
  3389. if (ret < 0) {
  3390. icnss_pr_err("fw service registration failed: %d\n", ret);
  3391. goto out_destroy_soc_wq;
  3392. }
  3393. icnss_enable_recovery(priv);
  3394. icnss_debugfs_create(priv);
  3395. icnss_sysfs_create(priv);
  3396. ret = device_init_wakeup(&priv->pdev->dev, true);
  3397. if (ret)
  3398. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3399. ret);
  3400. icnss_set_plat_priv(priv);
  3401. init_completion(&priv->unblock_shutdown);
  3402. if (priv->device_id == WCN6750_DEVICE_ID) {
  3403. ret = icnss_dms_init(priv);
  3404. if (ret)
  3405. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3406. ret = icnss_genl_init();
  3407. if (ret < 0)
  3408. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3409. init_completion(&priv->smp2p_soc_wake_wait);
  3410. icnss_runtime_pm_init(priv);
  3411. icnss_aop_mbox_init(priv);
  3412. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3413. priv->bdf_download_support = true;
  3414. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3415. icnss_pr_dbg("NV MAC feature is %s\n",
  3416. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3417. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3418. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3419. }
  3420. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3421. icnss_pr_info("Platform driver probed successfully\n");
  3422. return 0;
  3423. out_destroy_soc_wq:
  3424. destroy_workqueue(priv->soc_wake_wq);
  3425. out_destroy_wq:
  3426. destroy_workqueue(priv->event_wq);
  3427. smmu_cleanup:
  3428. priv->iommu_domain = NULL;
  3429. out_free_resources:
  3430. icnss_put_resources(priv);
  3431. out_reset_drvdata:
  3432. dev_set_drvdata(dev, NULL);
  3433. return ret;
  3434. }
  3435. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3436. {
  3437. device_unregister(ramdump_info->dev);
  3438. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3439. kfree(ramdump_info);
  3440. }
  3441. static int icnss_remove(struct platform_device *pdev)
  3442. {
  3443. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3444. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3445. if (priv->device_id == WCN6750_DEVICE_ID) {
  3446. icnss_dms_deinit(priv);
  3447. icnss_genl_exit();
  3448. icnss_runtime_pm_deinit(priv);
  3449. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3450. mbox_free_channel(priv->mbox_chan);
  3451. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3452. complete_all(&priv->smp2p_soc_wake_wait);
  3453. }
  3454. device_init_wakeup(&priv->pdev->dev, false);
  3455. icnss_debugfs_destroy(priv);
  3456. icnss_sysfs_destroy(priv);
  3457. complete_all(&priv->unblock_shutdown);
  3458. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3459. if (priv->device_id == WCN6750_DEVICE_ID) {
  3460. icnss_wpss_ssr_unregister_notifier(priv);
  3461. rproc_put(priv->rproc);
  3462. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3463. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3464. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3465. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3466. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3467. } else {
  3468. icnss_modem_ssr_unregister_notifier(priv);
  3469. icnss_pdr_unregister_notifier(priv);
  3470. }
  3471. class_destroy(priv->icnss_ramdump_class);
  3472. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3473. icnss_unregister_fw_service(priv);
  3474. if (priv->event_wq)
  3475. destroy_workqueue(priv->event_wq);
  3476. if (priv->soc_wake_wq)
  3477. destroy_workqueue(priv->soc_wake_wq);
  3478. priv->iommu_domain = NULL;
  3479. icnss_hw_power_off(priv);
  3480. icnss_put_resources(priv);
  3481. dev_set_drvdata(&pdev->dev, NULL);
  3482. return 0;
  3483. }
  3484. #ifdef CONFIG_PM_SLEEP
  3485. static int icnss_pm_suspend(struct device *dev)
  3486. {
  3487. struct icnss_priv *priv = dev_get_drvdata(dev);
  3488. int ret = 0;
  3489. if (priv->magic != ICNSS_MAGIC) {
  3490. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3491. dev, priv, priv->magic);
  3492. return -EINVAL;
  3493. }
  3494. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3495. if (!priv->ops || !priv->ops->pm_suspend ||
  3496. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3497. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3498. return 0;
  3499. ret = priv->ops->pm_suspend(dev);
  3500. if (ret == 0) {
  3501. if (priv->device_id == WCN6750_DEVICE_ID) {
  3502. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3503. !test_bit(ICNSS_MODE_ON, &priv->state))
  3504. return 0;
  3505. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3506. ICNSS_SMP2P_OUT_POWER_SAVE);
  3507. }
  3508. priv->stats.pm_suspend++;
  3509. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3510. } else {
  3511. priv->stats.pm_suspend_err++;
  3512. }
  3513. return ret;
  3514. }
  3515. static int icnss_pm_resume(struct device *dev)
  3516. {
  3517. struct icnss_priv *priv = dev_get_drvdata(dev);
  3518. int ret = 0;
  3519. if (priv->magic != ICNSS_MAGIC) {
  3520. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3521. dev, priv, priv->magic);
  3522. return -EINVAL;
  3523. }
  3524. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3525. if (!priv->ops || !priv->ops->pm_resume ||
  3526. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3527. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3528. goto out;
  3529. ret = priv->ops->pm_resume(dev);
  3530. out:
  3531. if (ret == 0) {
  3532. priv->stats.pm_resume++;
  3533. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3534. } else {
  3535. priv->stats.pm_resume_err++;
  3536. }
  3537. return ret;
  3538. }
  3539. static int icnss_pm_suspend_noirq(struct device *dev)
  3540. {
  3541. struct icnss_priv *priv = dev_get_drvdata(dev);
  3542. int ret = 0;
  3543. if (priv->magic != ICNSS_MAGIC) {
  3544. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3545. dev, priv, priv->magic);
  3546. return -EINVAL;
  3547. }
  3548. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3549. if (!priv->ops || !priv->ops->suspend_noirq ||
  3550. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3551. goto out;
  3552. ret = priv->ops->suspend_noirq(dev);
  3553. out:
  3554. if (ret == 0) {
  3555. priv->stats.pm_suspend_noirq++;
  3556. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3557. } else {
  3558. priv->stats.pm_suspend_noirq_err++;
  3559. }
  3560. return ret;
  3561. }
  3562. static int icnss_pm_resume_noirq(struct device *dev)
  3563. {
  3564. struct icnss_priv *priv = dev_get_drvdata(dev);
  3565. int ret = 0;
  3566. if (priv->magic != ICNSS_MAGIC) {
  3567. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3568. dev, priv, priv->magic);
  3569. return -EINVAL;
  3570. }
  3571. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3572. if (!priv->ops || !priv->ops->resume_noirq ||
  3573. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3574. goto out;
  3575. ret = priv->ops->resume_noirq(dev);
  3576. out:
  3577. if (ret == 0) {
  3578. priv->stats.pm_resume_noirq++;
  3579. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3580. } else {
  3581. priv->stats.pm_resume_noirq_err++;
  3582. }
  3583. return ret;
  3584. }
  3585. static int icnss_pm_runtime_suspend(struct device *dev)
  3586. {
  3587. struct icnss_priv *priv = dev_get_drvdata(dev);
  3588. int ret = 0;
  3589. if (priv->device_id != WCN6750_DEVICE_ID) {
  3590. icnss_pr_err("Ignore runtime suspend:\n");
  3591. goto out;
  3592. }
  3593. if (priv->magic != ICNSS_MAGIC) {
  3594. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3595. dev, priv, priv->magic);
  3596. return -EINVAL;
  3597. }
  3598. if (!priv->ops || !priv->ops->runtime_suspend ||
  3599. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3600. goto out;
  3601. icnss_pr_vdbg("Runtime suspend\n");
  3602. ret = priv->ops->runtime_suspend(dev);
  3603. if (!ret) {
  3604. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3605. !test_bit(ICNSS_MODE_ON, &priv->state))
  3606. return 0;
  3607. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3608. ICNSS_SMP2P_OUT_POWER_SAVE);
  3609. }
  3610. out:
  3611. return ret;
  3612. }
  3613. static int icnss_pm_runtime_resume(struct device *dev)
  3614. {
  3615. struct icnss_priv *priv = dev_get_drvdata(dev);
  3616. int ret = 0;
  3617. if (priv->device_id != WCN6750_DEVICE_ID) {
  3618. icnss_pr_err("Ignore runtime resume:\n");
  3619. goto out;
  3620. }
  3621. if (priv->magic != ICNSS_MAGIC) {
  3622. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3623. dev, priv, priv->magic);
  3624. return -EINVAL;
  3625. }
  3626. if (!priv->ops || !priv->ops->runtime_resume ||
  3627. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3628. goto out;
  3629. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3630. ret = priv->ops->runtime_resume(dev);
  3631. out:
  3632. return ret;
  3633. }
  3634. static int icnss_pm_runtime_idle(struct device *dev)
  3635. {
  3636. struct icnss_priv *priv = dev_get_drvdata(dev);
  3637. if (priv->device_id != WCN6750_DEVICE_ID) {
  3638. icnss_pr_err("Ignore runtime idle:\n");
  3639. goto out;
  3640. }
  3641. icnss_pr_vdbg("Runtime idle\n");
  3642. pm_request_autosuspend(dev);
  3643. out:
  3644. return -EBUSY;
  3645. }
  3646. #endif
  3647. static const struct dev_pm_ops icnss_pm_ops = {
  3648. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3649. icnss_pm_resume)
  3650. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3651. icnss_pm_resume_noirq)
  3652. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3653. icnss_pm_runtime_idle)
  3654. };
  3655. static struct platform_driver icnss_driver = {
  3656. .probe = icnss_probe,
  3657. .remove = icnss_remove,
  3658. .driver = {
  3659. .name = "icnss2",
  3660. .pm = &icnss_pm_ops,
  3661. .of_match_table = icnss_dt_match,
  3662. },
  3663. };
  3664. static int __init icnss_initialize(void)
  3665. {
  3666. icnss_debug_init();
  3667. return platform_driver_register(&icnss_driver);
  3668. }
  3669. static void __exit icnss_exit(void)
  3670. {
  3671. platform_driver_unregister(&icnss_driver);
  3672. icnss_debug_deinit();
  3673. }
  3674. module_init(icnss_initialize);
  3675. module_exit(icnss_exit);
  3676. MODULE_LICENSE("GPL v2");
  3677. MODULE_DESCRIPTION("iWCN CORE platform driver");