main.c 110 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include "main.h"
  47. #include "qmi.h"
  48. #include "debug.h"
  49. #include "power.h"
  50. #include "genl.h"
  51. #define MAX_PROP_SIZE 32
  52. #define NUM_LOG_PAGES 10
  53. #define NUM_LOG_LONG_PAGES 4
  54. #define ICNSS_MAGIC 0x5abc5abc
  55. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  56. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  57. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  58. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  59. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  60. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  61. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  62. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  63. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  64. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  65. #define ICNSS_MAX_PROBE_CNT 2
  66. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  67. #define PROBE_TIMEOUT 15000
  68. #define SMP2P_SOC_WAKE_TIMEOUT 500
  69. #ifdef CONFIG_ICNSS2_DEBUG
  70. static unsigned long qmi_timeout = 3000;
  71. module_param(qmi_timeout, ulong, 0600);
  72. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  73. #else
  74. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  75. #endif
  76. static struct icnss_priv *penv;
  77. static struct work_struct wpss_loader;
  78. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  79. #define ICNSS_EVENT_PENDING 2989
  80. #define ICNSS_EVENT_SYNC BIT(0)
  81. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  82. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  83. ICNSS_EVENT_SYNC)
  84. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  85. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  86. #define SMP2P_GET_MAX_RETRY 4
  87. #define SMP2P_GET_RETRY_DELAY_MS 500
  88. #define RAMDUMP_NUM_DEVICES 256
  89. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  90. #define ICNSS_RPROC_LEN 10
  91. static DEFINE_IDA(rd_minor_id);
  92. enum icnss_pdr_cause_index {
  93. ICNSS_FW_CRASH,
  94. ICNSS_ROOT_PD_CRASH,
  95. ICNSS_ROOT_PD_SHUTDOWN,
  96. ICNSS_HOST_ERROR,
  97. };
  98. static const char * const icnss_pdr_cause[] = {
  99. [ICNSS_FW_CRASH] = "FW crash",
  100. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  101. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  102. [ICNSS_HOST_ERROR] = "Host error",
  103. };
  104. static void icnss_set_plat_priv(struct icnss_priv *priv)
  105. {
  106. penv = priv;
  107. }
  108. static struct icnss_priv *icnss_get_plat_priv()
  109. {
  110. return penv;
  111. }
  112. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  113. struct kobj_attribute *attr,
  114. const char *buf, size_t count)
  115. {
  116. struct icnss_priv *priv = icnss_get_plat_priv();
  117. atomic_set(&priv->is_shutdown, true);
  118. icnss_pr_dbg("Received shutdown indication");
  119. return count;
  120. }
  121. static struct kobj_attribute icnss_sysfs_attribute =
  122. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  123. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  124. {
  125. if (atomic_inc_return(&priv->pm_count) != 1)
  126. return;
  127. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  128. atomic_read(&priv->pm_count));
  129. pm_stay_awake(&priv->pdev->dev);
  130. priv->stats.pm_stay_awake++;
  131. }
  132. static void icnss_pm_relax(struct icnss_priv *priv)
  133. {
  134. int r = atomic_dec_return(&priv->pm_count);
  135. WARN_ON(r < 0);
  136. if (r != 0)
  137. return;
  138. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  139. atomic_read(&priv->pm_count));
  140. pm_relax(&priv->pdev->dev);
  141. priv->stats.pm_relax++;
  142. }
  143. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  144. {
  145. switch (type) {
  146. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  147. return "SERVER_ARRIVE";
  148. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  149. return "SERVER_EXIT";
  150. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  151. return "FW_READY";
  152. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  153. return "REGISTER_DRIVER";
  154. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  155. return "UNREGISTER_DRIVER";
  156. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  157. return "PD_SERVICE_DOWN";
  158. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  159. return "FW_EARLY_CRASH_IND";
  160. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  161. return "IDLE_SHUTDOWN";
  162. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  163. return "IDLE_RESTART";
  164. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  165. return "FW_INIT_DONE";
  166. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  167. return "QDSS_TRACE_REQ_MEM";
  168. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  169. return "QDSS_TRACE_SAVE";
  170. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  171. return "QDSS_TRACE_FREE";
  172. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  173. return "M3_DUMP_UPLOAD";
  174. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  175. return "QDSS_TRACE_REQ_DATA";
  176. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  177. return "SUBSYS_RESTART_LEVEL";
  178. case ICNSS_DRIVER_EVENT_MAX:
  179. return "EVENT_MAX";
  180. }
  181. return "UNKNOWN";
  182. };
  183. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  184. {
  185. switch (type) {
  186. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  187. return "SOC_WAKE_REQUEST";
  188. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  189. return "SOC_WAKE_RELEASE";
  190. case ICNSS_SOC_WAKE_EVENT_MAX:
  191. return "SOC_EVENT_MAX";
  192. }
  193. return "UNKNOWN";
  194. };
  195. int icnss_driver_event_post(struct icnss_priv *priv,
  196. enum icnss_driver_event_type type,
  197. u32 flags, void *data)
  198. {
  199. struct icnss_driver_event *event;
  200. unsigned long irq_flags;
  201. int gfp = GFP_KERNEL;
  202. int ret = 0;
  203. if (!priv)
  204. return -ENODEV;
  205. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  206. icnss_driver_event_to_str(type), type, current->comm,
  207. flags, priv->state);
  208. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  209. icnss_pr_err("Invalid Event type: %d, can't post", type);
  210. return -EINVAL;
  211. }
  212. if (in_interrupt() || irqs_disabled())
  213. gfp = GFP_ATOMIC;
  214. event = kzalloc(sizeof(*event), gfp);
  215. if (event == NULL)
  216. return -ENOMEM;
  217. icnss_pm_stay_awake(priv);
  218. event->type = type;
  219. event->data = data;
  220. init_completion(&event->complete);
  221. event->ret = ICNSS_EVENT_PENDING;
  222. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  223. spin_lock_irqsave(&priv->event_lock, irq_flags);
  224. list_add_tail(&event->list, &priv->event_list);
  225. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  226. priv->stats.events[type].posted++;
  227. queue_work(priv->event_wq, &priv->event_work);
  228. if (!(flags & ICNSS_EVENT_SYNC))
  229. goto out;
  230. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  231. wait_for_completion(&event->complete);
  232. else
  233. ret = wait_for_completion_interruptible(&event->complete);
  234. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  235. icnss_driver_event_to_str(type), type, priv->state, ret,
  236. event->ret);
  237. spin_lock_irqsave(&priv->event_lock, irq_flags);
  238. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  239. event->sync = false;
  240. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  241. ret = -EINTR;
  242. goto out;
  243. }
  244. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  245. ret = event->ret;
  246. kfree(event);
  247. out:
  248. icnss_pm_relax(priv);
  249. return ret;
  250. }
  251. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  252. enum icnss_soc_wake_event_type type,
  253. u32 flags, void *data)
  254. {
  255. struct icnss_soc_wake_event *event;
  256. unsigned long irq_flags;
  257. int gfp = GFP_KERNEL;
  258. int ret = 0;
  259. if (!priv)
  260. return -ENODEV;
  261. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  262. icnss_soc_wake_event_to_str(type),
  263. type, current->comm, flags, priv->state);
  264. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  265. icnss_pr_err("Invalid Event type: %d, can't post", type);
  266. return -EINVAL;
  267. }
  268. if (in_interrupt() || irqs_disabled())
  269. gfp = GFP_ATOMIC;
  270. event = kzalloc(sizeof(*event), gfp);
  271. if (!event)
  272. return -ENOMEM;
  273. icnss_pm_stay_awake(priv);
  274. event->type = type;
  275. event->data = data;
  276. init_completion(&event->complete);
  277. event->ret = ICNSS_EVENT_PENDING;
  278. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  279. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  280. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  281. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  282. priv->stats.soc_wake_events[type].posted++;
  283. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  284. if (!(flags & ICNSS_EVENT_SYNC))
  285. goto out;
  286. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  287. wait_for_completion(&event->complete);
  288. else
  289. ret = wait_for_completion_interruptible(&event->complete);
  290. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  291. icnss_soc_wake_event_to_str(type),
  292. type, priv->state, ret, event->ret);
  293. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  294. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  295. event->sync = false;
  296. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  297. ret = -EINTR;
  298. goto out;
  299. }
  300. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  301. ret = event->ret;
  302. kfree(event);
  303. out:
  304. icnss_pm_relax(priv);
  305. return ret;
  306. }
  307. bool icnss_is_fw_ready(void)
  308. {
  309. if (!penv)
  310. return false;
  311. else
  312. return test_bit(ICNSS_FW_READY, &penv->state);
  313. }
  314. EXPORT_SYMBOL(icnss_is_fw_ready);
  315. void icnss_block_shutdown(bool status)
  316. {
  317. if (!penv)
  318. return;
  319. if (status) {
  320. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  321. reinit_completion(&penv->unblock_shutdown);
  322. } else {
  323. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  324. complete(&penv->unblock_shutdown);
  325. }
  326. }
  327. EXPORT_SYMBOL(icnss_block_shutdown);
  328. bool icnss_is_fw_down(void)
  329. {
  330. struct icnss_priv *priv = icnss_get_plat_priv();
  331. if (!priv)
  332. return false;
  333. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  334. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  335. test_bit(ICNSS_REJUVENATE, &priv->state);
  336. }
  337. EXPORT_SYMBOL(icnss_is_fw_down);
  338. bool icnss_is_rejuvenate(void)
  339. {
  340. if (!penv)
  341. return false;
  342. else
  343. return test_bit(ICNSS_REJUVENATE, &penv->state);
  344. }
  345. EXPORT_SYMBOL(icnss_is_rejuvenate);
  346. bool icnss_is_pdr(void)
  347. {
  348. if (!penv)
  349. return false;
  350. else
  351. return test_bit(ICNSS_PDR, &penv->state);
  352. }
  353. EXPORT_SYMBOL(icnss_is_pdr);
  354. static int icnss_send_smp2p(struct icnss_priv *priv,
  355. enum icnss_smp2p_msg_id msg_id,
  356. enum smp2p_out_entry smp2p_entry)
  357. {
  358. unsigned int value = 0;
  359. int ret;
  360. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  361. return -EINVAL;
  362. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  363. if (msg_id == ICNSS_RESET_MSG) {
  364. priv->smp2p_info[smp2p_entry].seq = 0;
  365. ret = qcom_smem_state_update_bits(
  366. priv->smp2p_info[smp2p_entry].smem_state,
  367. ICNSS_SMEM_VALUE_MASK,
  368. 0);
  369. if (ret)
  370. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  371. ret, icnss_smp2p_str[smp2p_entry]);
  372. return ret;
  373. }
  374. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  375. return -ENODEV;
  376. value |= priv->smp2p_info[smp2p_entry].seq++;
  377. value <<= ICNSS_SMEM_SEQ_NO_POS;
  378. value |= msg_id;
  379. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  380. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  381. reinit_completion(&penv->smp2p_soc_wake_wait);
  382. ret = qcom_smem_state_update_bits(
  383. priv->smp2p_info[smp2p_entry].smem_state,
  384. ICNSS_SMEM_VALUE_MASK,
  385. value);
  386. if (ret) {
  387. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  388. icnss_smp2p_str[smp2p_entry]);
  389. } else {
  390. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  391. msg_id == ICNSS_SOC_WAKE_REL) {
  392. if (!wait_for_completion_timeout(
  393. &priv->smp2p_soc_wake_wait,
  394. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  395. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  396. icnss_smp2p_str[smp2p_entry]);
  397. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  398. ICNSS_ASSERT(0);
  399. }
  400. }
  401. }
  402. return ret;
  403. }
  404. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  405. {
  406. struct icnss_priv *priv = ctx;
  407. if (priv)
  408. priv->force_err_fatal = true;
  409. icnss_pr_err("Received force error fatal request from FW\n");
  410. return IRQ_HANDLED;
  411. }
  412. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  413. {
  414. struct icnss_priv *priv = ctx;
  415. struct icnss_uevent_fw_down_data fw_down_data = {0};
  416. icnss_pr_err("Received early crash indication from FW\n");
  417. if (priv) {
  418. set_bit(ICNSS_FW_DOWN, &priv->state);
  419. icnss_ignore_fw_timeout(true);
  420. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  421. clear_bit(ICNSS_FW_READY, &priv->state);
  422. fw_down_data.crashed = true;
  423. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  424. &fw_down_data);
  425. }
  426. }
  427. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  428. 0, NULL);
  429. return IRQ_HANDLED;
  430. }
  431. static void register_fw_error_notifications(struct device *dev)
  432. {
  433. struct icnss_priv *priv = dev_get_drvdata(dev);
  434. struct device_node *dev_node;
  435. int irq = 0, ret = 0;
  436. if (!priv)
  437. return;
  438. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  439. if (!dev_node) {
  440. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  441. return;
  442. }
  443. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  444. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  445. ret = irq = of_irq_get_byname(dev_node,
  446. "qcom,smp2p-force-fatal-error");
  447. if (ret < 0) {
  448. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  449. irq);
  450. return;
  451. }
  452. }
  453. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  454. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  455. "wlanfw-err", priv);
  456. if (ret < 0) {
  457. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  458. irq, ret);
  459. return;
  460. }
  461. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  462. priv->fw_error_fatal_irq = irq;
  463. }
  464. static void register_early_crash_notifications(struct device *dev)
  465. {
  466. struct icnss_priv *priv = dev_get_drvdata(dev);
  467. struct device_node *dev_node;
  468. int irq = 0, ret = 0;
  469. if (!priv)
  470. return;
  471. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  472. if (!dev_node) {
  473. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  474. return;
  475. }
  476. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  477. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  478. ret = irq = of_irq_get_byname(dev_node,
  479. "qcom,smp2p-early-crash-ind");
  480. if (ret < 0) {
  481. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  482. irq);
  483. return;
  484. }
  485. }
  486. ret = devm_request_threaded_irq(dev, irq, NULL,
  487. fw_crash_indication_handler,
  488. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  489. "wlanfw-early-crash-ind", priv);
  490. if (ret < 0) {
  491. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  492. irq, ret);
  493. return;
  494. }
  495. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  496. priv->fw_early_crash_irq = irq;
  497. }
  498. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  499. {
  500. struct icnss_priv *priv = ctx;
  501. if (priv)
  502. complete(&priv->smp2p_soc_wake_wait);
  503. return IRQ_HANDLED;
  504. }
  505. static void register_soc_wake_notif(struct device *dev)
  506. {
  507. struct icnss_priv *priv = dev_get_drvdata(dev);
  508. struct device_node *dev_node;
  509. int irq = 0, ret = 0;
  510. if (!priv)
  511. return;
  512. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  513. if (!dev_node) {
  514. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  515. return;
  516. }
  517. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  518. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  519. ret = irq = of_irq_get_byname(dev_node,
  520. "qcom,smp2p-soc-wake-ack");
  521. if (ret < 0) {
  522. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  523. irq);
  524. return;
  525. }
  526. }
  527. ret = devm_request_threaded_irq(dev, irq, NULL,
  528. fw_soc_wake_ack_handler,
  529. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  530. IRQF_TRIGGER_FALLING,
  531. "wlanfw-soc-wake-ack", priv);
  532. if (ret < 0) {
  533. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  534. irq, ret);
  535. return;
  536. }
  537. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  538. priv->fw_soc_wake_ack_irq = irq;
  539. }
  540. int icnss_call_driver_uevent(struct icnss_priv *priv,
  541. enum icnss_uevent uevent, void *data)
  542. {
  543. struct icnss_uevent_data uevent_data;
  544. if (!priv->ops || !priv->ops->uevent)
  545. return 0;
  546. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  547. priv->state, uevent);
  548. uevent_data.uevent = uevent;
  549. uevent_data.data = data;
  550. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  551. }
  552. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  553. {
  554. int i;
  555. int ret = 0;
  556. ret = icnss_qmi_get_dms_mac(priv);
  557. if (ret == 0 && priv->dms.mac_valid)
  558. goto qmi_send;
  559. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  560. * Thus assert on failure to get MAC from DMS even after retries
  561. */
  562. if (priv->use_nv_mac) {
  563. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  564. if (priv->dms.mac_valid)
  565. break;
  566. ret = icnss_qmi_get_dms_mac(priv);
  567. if (ret != -EAGAIN)
  568. break;
  569. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  570. }
  571. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  572. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  573. ICNSS_ASSERT(0);
  574. return -EINVAL;
  575. }
  576. }
  577. qmi_send:
  578. if (priv->dms.mac_valid)
  579. ret =
  580. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  581. ARRAY_SIZE(priv->dms.mac));
  582. return ret;
  583. }
  584. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  585. enum smp2p_out_entry smp2p_entry)
  586. {
  587. int retry = 0;
  588. int error;
  589. if (priv->smp2p_info[smp2p_entry].smem_state)
  590. return;
  591. retry:
  592. priv->smp2p_info[smp2p_entry].smem_state =
  593. qcom_smem_state_get(&priv->pdev->dev,
  594. icnss_smp2p_str[smp2p_entry],
  595. &priv->smp2p_info[smp2p_entry].smem_bit);
  596. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  597. if (retry++ < SMP2P_GET_MAX_RETRY) {
  598. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  599. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  600. error, icnss_smp2p_str[smp2p_entry]);
  601. msleep(SMP2P_GET_RETRY_DELAY_MS);
  602. goto retry;
  603. }
  604. ICNSS_ASSERT(0);
  605. return;
  606. }
  607. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  608. }
  609. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  610. void *data)
  611. {
  612. int ret = 0;
  613. bool ignore_assert = false;
  614. if (!priv)
  615. return -ENODEV;
  616. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  617. clear_bit(ICNSS_FW_DOWN, &priv->state);
  618. clear_bit(ICNSS_FW_READY, &priv->state);
  619. icnss_ignore_fw_timeout(false);
  620. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  621. icnss_pr_err("QMI Server already in Connected State\n");
  622. ICNSS_ASSERT(0);
  623. }
  624. ret = icnss_connect_to_fw_server(priv, data);
  625. if (ret)
  626. goto fail;
  627. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  628. ret = wlfw_ind_register_send_sync_msg(priv);
  629. if (ret < 0) {
  630. if (ret == -EALREADY) {
  631. ret = 0;
  632. goto qmi_registered;
  633. }
  634. ignore_assert = true;
  635. goto fail;
  636. }
  637. if (priv->device_id == WCN6750_DEVICE_ID) {
  638. ret = wlfw_host_cap_send_sync(priv);
  639. if (ret < 0)
  640. goto fail;
  641. }
  642. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  643. if (!priv->msa_va) {
  644. icnss_pr_err("Invalid MSA address\n");
  645. ret = -EINVAL;
  646. goto fail;
  647. }
  648. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  649. if (ret < 0) {
  650. ignore_assert = true;
  651. goto fail;
  652. }
  653. ret = wlfw_msa_ready_send_sync_msg(priv);
  654. if (ret < 0) {
  655. ignore_assert = true;
  656. goto fail;
  657. }
  658. }
  659. ret = wlfw_cap_send_sync_msg(priv);
  660. if (ret < 0) {
  661. ignore_assert = true;
  662. goto fail;
  663. }
  664. ret = icnss_hw_power_on(priv);
  665. if (ret)
  666. goto fail;
  667. if (priv->device_id == WCN6750_DEVICE_ID) {
  668. ret = wlfw_device_info_send_msg(priv);
  669. if (ret < 0) {
  670. ignore_assert = true;
  671. goto device_info_failure;
  672. }
  673. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  674. priv->mem_base_pa,
  675. priv->mem_base_size);
  676. if (!priv->mem_base_va) {
  677. icnss_pr_err("Ioremap failed for bar address\n");
  678. goto device_info_failure;
  679. }
  680. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  681. &priv->mem_base_pa,
  682. priv->mem_base_va);
  683. if (priv->mhi_state_info_pa)
  684. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  685. priv->mhi_state_info_pa,
  686. PAGE_SIZE);
  687. if (!priv->mhi_state_info_va)
  688. icnss_pr_err("Ioremap failed for MHI info address\n");
  689. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  690. &priv->mhi_state_info_pa,
  691. priv->mhi_state_info_va);
  692. }
  693. if (priv->bdf_download_support) {
  694. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  695. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  696. priv->ctrl_params.bdf_type);
  697. if (ret < 0)
  698. goto device_info_failure;
  699. }
  700. if (priv->device_id == WCN6750_DEVICE_ID) {
  701. if (!priv->fw_soc_wake_ack_irq)
  702. register_soc_wake_notif(&priv->pdev->dev);
  703. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  704. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  705. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  706. }
  707. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  708. if (priv->bdf_download_support) {
  709. ret = wlfw_cal_report_req(priv);
  710. if (ret < 0)
  711. goto device_info_failure;
  712. }
  713. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  714. dynamic_feature_mask);
  715. }
  716. if (!priv->fw_error_fatal_irq)
  717. register_fw_error_notifications(&priv->pdev->dev);
  718. if (!priv->fw_early_crash_irq)
  719. register_early_crash_notifications(&priv->pdev->dev);
  720. return ret;
  721. device_info_failure:
  722. icnss_hw_power_off(priv);
  723. fail:
  724. ICNSS_ASSERT(ignore_assert);
  725. qmi_registered:
  726. return ret;
  727. }
  728. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  729. {
  730. if (!priv)
  731. return -ENODEV;
  732. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  733. icnss_clear_server(priv);
  734. return 0;
  735. }
  736. static int icnss_call_driver_probe(struct icnss_priv *priv)
  737. {
  738. int ret = 0;
  739. int probe_cnt = 0;
  740. if (!priv->ops || !priv->ops->probe)
  741. return 0;
  742. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  743. return -EINVAL;
  744. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  745. icnss_hw_power_on(priv);
  746. icnss_block_shutdown(true);
  747. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  748. ret = priv->ops->probe(&priv->pdev->dev);
  749. probe_cnt++;
  750. if (ret != -EPROBE_DEFER)
  751. break;
  752. }
  753. if (ret < 0) {
  754. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  755. ret, priv->state, probe_cnt);
  756. icnss_block_shutdown(false);
  757. goto out;
  758. }
  759. icnss_block_shutdown(false);
  760. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  761. return 0;
  762. out:
  763. icnss_hw_power_off(priv);
  764. return ret;
  765. }
  766. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  767. {
  768. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  769. goto out;
  770. if (!priv->ops || !priv->ops->shutdown)
  771. goto out;
  772. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  773. goto out;
  774. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  775. priv->ops->shutdown(&priv->pdev->dev);
  776. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  777. out:
  778. return 0;
  779. }
  780. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  781. {
  782. int ret = 0;
  783. icnss_pm_relax(priv);
  784. icnss_call_driver_shutdown(priv);
  785. clear_bit(ICNSS_PDR, &priv->state);
  786. clear_bit(ICNSS_REJUVENATE, &priv->state);
  787. clear_bit(ICNSS_PD_RESTART, &priv->state);
  788. priv->early_crash_ind = false;
  789. priv->is_ssr = false;
  790. if (!priv->ops || !priv->ops->reinit)
  791. goto out;
  792. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  793. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  794. priv->state);
  795. goto out;
  796. }
  797. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  798. goto call_probe;
  799. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  800. icnss_hw_power_on(priv);
  801. icnss_block_shutdown(true);
  802. ret = priv->ops->reinit(&priv->pdev->dev);
  803. if (ret < 0) {
  804. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  805. ret, priv->state);
  806. if (!priv->allow_recursive_recovery)
  807. ICNSS_ASSERT(false);
  808. icnss_block_shutdown(false);
  809. goto out_power_off;
  810. }
  811. icnss_block_shutdown(false);
  812. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  813. return 0;
  814. call_probe:
  815. return icnss_call_driver_probe(priv);
  816. out_power_off:
  817. icnss_hw_power_off(priv);
  818. out:
  819. return ret;
  820. }
  821. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  822. {
  823. int ret = 0;
  824. if (!priv)
  825. return -ENODEV;
  826. set_bit(ICNSS_FW_READY, &priv->state);
  827. clear_bit(ICNSS_MODE_ON, &priv->state);
  828. atomic_set(&priv->soc_wake_ref_count, 0);
  829. if (priv->device_id == WCN6750_DEVICE_ID)
  830. icnss_free_qdss_mem(priv);
  831. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  832. icnss_hw_power_off(priv);
  833. if (!priv->pdev) {
  834. icnss_pr_err("Device is not ready\n");
  835. ret = -ENODEV;
  836. goto out;
  837. }
  838. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  839. ret = icnss_pd_restart_complete(priv);
  840. } else {
  841. if (priv->device_id == WCN6750_DEVICE_ID)
  842. icnss_setup_dms_mac(priv);
  843. ret = icnss_call_driver_probe(priv);
  844. }
  845. icnss_vreg_unvote(priv);
  846. out:
  847. return ret;
  848. }
  849. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  850. {
  851. int ret = 0;
  852. if (!priv)
  853. return -ENODEV;
  854. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  855. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  856. icnss_pr_info("Failed to download qdss configuration file");
  857. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state))
  858. ret = wlfw_wlan_mode_send_sync_msg(priv,
  859. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  860. else
  861. icnss_driver_event_fw_ready_ind(priv, NULL);
  862. return ret;
  863. }
  864. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  865. {
  866. struct platform_device *pdev = priv->pdev;
  867. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  868. int i, j;
  869. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  870. if (!qdss_mem[i].va && qdss_mem[i].size) {
  871. qdss_mem[i].va =
  872. dma_alloc_coherent(&pdev->dev,
  873. qdss_mem[i].size,
  874. &qdss_mem[i].pa,
  875. GFP_KERNEL);
  876. if (!qdss_mem[i].va) {
  877. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  878. qdss_mem[i].size,
  879. qdss_mem[i].type, i);
  880. break;
  881. }
  882. }
  883. }
  884. /* Best-effort allocation for QDSS trace */
  885. if (i < priv->qdss_mem_seg_len) {
  886. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  887. qdss_mem[j].type = 0;
  888. qdss_mem[j].size = 0;
  889. }
  890. priv->qdss_mem_seg_len = i;
  891. }
  892. return 0;
  893. }
  894. void icnss_free_qdss_mem(struct icnss_priv *priv)
  895. {
  896. struct platform_device *pdev = priv->pdev;
  897. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  898. int i;
  899. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  900. if (qdss_mem[i].va && qdss_mem[i].size) {
  901. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  902. &qdss_mem[i].pa, qdss_mem[i].size,
  903. qdss_mem[i].type);
  904. dma_free_coherent(&pdev->dev,
  905. qdss_mem[i].size, qdss_mem[i].va,
  906. qdss_mem[i].pa);
  907. qdss_mem[i].va = NULL;
  908. qdss_mem[i].pa = 0;
  909. qdss_mem[i].size = 0;
  910. qdss_mem[i].type = 0;
  911. }
  912. }
  913. priv->qdss_mem_seg_len = 0;
  914. }
  915. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  916. {
  917. int ret = 0;
  918. ret = icnss_alloc_qdss_mem(priv);
  919. if (ret < 0)
  920. return ret;
  921. return wlfw_qdss_trace_mem_info_send_sync(priv);
  922. }
  923. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  924. u64 pa, u32 size, int *seg_id)
  925. {
  926. int i = 0;
  927. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  928. u64 offset = 0;
  929. void *va = NULL;
  930. u64 local_pa;
  931. u32 local_size;
  932. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  933. local_pa = (u64)qdss_mem[i].pa;
  934. local_size = (u32)qdss_mem[i].size;
  935. if (pa == local_pa && size <= local_size) {
  936. va = qdss_mem[i].va;
  937. break;
  938. }
  939. if (pa > local_pa &&
  940. pa < local_pa + local_size &&
  941. pa + size <= local_pa + local_size) {
  942. offset = pa - local_pa;
  943. va = qdss_mem[i].va + offset;
  944. break;
  945. }
  946. }
  947. *seg_id = i;
  948. return va;
  949. }
  950. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  951. void *data)
  952. {
  953. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  954. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  955. int ret = 0;
  956. int i;
  957. void *va = NULL;
  958. u64 pa;
  959. u32 size;
  960. int seg_id = 0;
  961. if (!priv->qdss_mem_seg_len) {
  962. icnss_pr_err("Memory for QDSS trace is not available\n");
  963. return -ENOMEM;
  964. }
  965. if (event_data->mem_seg_len == 0) {
  966. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  967. ret = icnss_genl_send_msg(qdss_mem[i].va,
  968. ICNSS_GENL_MSG_TYPE_QDSS,
  969. event_data->file_name,
  970. qdss_mem[i].size);
  971. if (ret < 0) {
  972. icnss_pr_err("Fail to save QDSS data: %d\n",
  973. ret);
  974. break;
  975. }
  976. }
  977. } else {
  978. for (i = 0; i < event_data->mem_seg_len; i++) {
  979. pa = event_data->mem_seg[i].addr;
  980. size = event_data->mem_seg[i].size;
  981. va = icnss_qdss_trace_pa_to_va(priv, pa,
  982. size, &seg_id);
  983. if (!va) {
  984. icnss_pr_err("Fail to find matching va for pa %pa\n",
  985. &pa);
  986. ret = -EINVAL;
  987. break;
  988. }
  989. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  990. event_data->file_name, size);
  991. if (ret < 0) {
  992. icnss_pr_err("Fail to save QDSS data: %d\n",
  993. ret);
  994. break;
  995. }
  996. }
  997. }
  998. kfree(data);
  999. return ret;
  1000. }
  1001. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1002. {
  1003. int dec, c = atomic_read(v);
  1004. do {
  1005. dec = c - 1;
  1006. if (unlikely(dec < 1))
  1007. break;
  1008. } while (!atomic_try_cmpxchg(v, &c, dec));
  1009. return dec;
  1010. }
  1011. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1012. void *data)
  1013. {
  1014. int ret = 0;
  1015. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1016. if (!priv)
  1017. return -ENODEV;
  1018. if (!data)
  1019. return -EINVAL;
  1020. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1021. event_data->total_size);
  1022. kfree(data);
  1023. return ret;
  1024. }
  1025. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1026. {
  1027. int ret = 0;
  1028. if (!priv)
  1029. return -ENODEV;
  1030. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1031. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1032. atomic_read(&priv->soc_wake_ref_count));
  1033. return 0;
  1034. }
  1035. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1036. ICNSS_SMP2P_OUT_SOC_WAKE);
  1037. if (!ret)
  1038. atomic_inc(&priv->soc_wake_ref_count);
  1039. return ret;
  1040. }
  1041. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1042. {
  1043. int ret = 0;
  1044. if (!priv)
  1045. return -ENODEV;
  1046. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1047. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1048. priv->soc_wake_ref_count);
  1049. return 0;
  1050. }
  1051. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1052. ICNSS_SMP2P_OUT_SOC_WAKE);
  1053. return ret;
  1054. }
  1055. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1056. void *data)
  1057. {
  1058. int ret = 0;
  1059. int probe_cnt = 0;
  1060. if (priv->ops)
  1061. return -EEXIST;
  1062. priv->ops = data;
  1063. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1064. set_bit(ICNSS_FW_READY, &priv->state);
  1065. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1066. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1067. priv->state);
  1068. return -ENODEV;
  1069. }
  1070. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1071. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1072. priv->state);
  1073. goto out;
  1074. }
  1075. ret = icnss_hw_power_on(priv);
  1076. if (ret)
  1077. goto out;
  1078. icnss_block_shutdown(true);
  1079. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1080. ret = priv->ops->probe(&priv->pdev->dev);
  1081. probe_cnt++;
  1082. if (ret != -EPROBE_DEFER)
  1083. break;
  1084. }
  1085. if (ret) {
  1086. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1087. ret, priv->state, probe_cnt);
  1088. icnss_block_shutdown(false);
  1089. goto power_off;
  1090. }
  1091. icnss_block_shutdown(false);
  1092. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1093. return 0;
  1094. power_off:
  1095. icnss_hw_power_off(priv);
  1096. out:
  1097. return ret;
  1098. }
  1099. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1100. void *data)
  1101. {
  1102. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1103. priv->ops = NULL;
  1104. goto out;
  1105. }
  1106. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1107. icnss_block_shutdown(true);
  1108. if (priv->ops)
  1109. priv->ops->remove(&priv->pdev->dev);
  1110. icnss_block_shutdown(false);
  1111. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1112. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1113. priv->ops = NULL;
  1114. icnss_hw_power_off(priv);
  1115. out:
  1116. return 0;
  1117. }
  1118. static int icnss_fw_crashed(struct icnss_priv *priv,
  1119. struct icnss_event_pd_service_down_data *event_data)
  1120. {
  1121. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1122. set_bit(ICNSS_PD_RESTART, &priv->state);
  1123. clear_bit(ICNSS_FW_READY, &priv->state);
  1124. icnss_pm_stay_awake(priv);
  1125. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1126. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1127. if (event_data && event_data->fw_rejuvenate)
  1128. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1129. return 0;
  1130. }
  1131. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1132. struct icnss_uevent_hang_data *hang_data)
  1133. {
  1134. if (!priv->hang_event_data_va)
  1135. return -EINVAL;
  1136. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1137. priv->hang_event_data_len,
  1138. GFP_ATOMIC);
  1139. if (!priv->hang_event_data)
  1140. return -ENOMEM;
  1141. // Update the hang event params
  1142. hang_data->hang_event_data = priv->hang_event_data;
  1143. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1144. return 0;
  1145. }
  1146. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1147. {
  1148. struct icnss_uevent_hang_data hang_data = {0};
  1149. int ret = 0xFF;
  1150. if (priv->early_crash_ind) {
  1151. ret = icnss_update_hang_event_data(priv, &hang_data);
  1152. if (ret)
  1153. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1154. }
  1155. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1156. &hang_data);
  1157. if (!ret) {
  1158. kfree(priv->hang_event_data);
  1159. priv->hang_event_data = NULL;
  1160. }
  1161. return 0;
  1162. }
  1163. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1164. void *data)
  1165. {
  1166. struct icnss_event_pd_service_down_data *event_data = data;
  1167. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1168. icnss_ignore_fw_timeout(false);
  1169. goto out;
  1170. }
  1171. if (priv->force_err_fatal)
  1172. ICNSS_ASSERT(0);
  1173. if (priv->device_id == WCN6750_DEVICE_ID) {
  1174. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1175. ICNSS_SMP2P_OUT_POWER_SAVE);
  1176. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1177. ICNSS_SMP2P_OUT_SOC_WAKE);
  1178. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1179. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1180. }
  1181. icnss_send_hang_event_data(priv);
  1182. if (priv->early_crash_ind) {
  1183. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1184. event_data->crashed, priv->state);
  1185. goto out;
  1186. }
  1187. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1188. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1189. event_data->crashed, priv->state);
  1190. if (!priv->allow_recursive_recovery)
  1191. ICNSS_ASSERT(0);
  1192. goto out;
  1193. }
  1194. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1195. icnss_fw_crashed(priv, event_data);
  1196. out:
  1197. kfree(data);
  1198. return 0;
  1199. }
  1200. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1201. void *data)
  1202. {
  1203. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1204. icnss_ignore_fw_timeout(false);
  1205. goto out;
  1206. }
  1207. priv->early_crash_ind = true;
  1208. icnss_fw_crashed(priv, NULL);
  1209. out:
  1210. kfree(data);
  1211. return 0;
  1212. }
  1213. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1214. void *data)
  1215. {
  1216. int ret = 0;
  1217. if (!priv->ops || !priv->ops->idle_shutdown)
  1218. return 0;
  1219. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1220. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1221. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1222. ret = -EBUSY;
  1223. } else {
  1224. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1225. priv->state);
  1226. icnss_block_shutdown(true);
  1227. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1228. icnss_block_shutdown(false);
  1229. }
  1230. return ret;
  1231. }
  1232. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1233. void *data)
  1234. {
  1235. int ret = 0;
  1236. if (!priv->ops || !priv->ops->idle_restart)
  1237. return 0;
  1238. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1239. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1240. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1241. ret = -EBUSY;
  1242. } else {
  1243. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1244. priv->state);
  1245. icnss_block_shutdown(true);
  1246. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1247. icnss_block_shutdown(false);
  1248. }
  1249. return ret;
  1250. }
  1251. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1252. {
  1253. icnss_free_qdss_mem(priv);
  1254. return 0;
  1255. }
  1256. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1257. void *data)
  1258. {
  1259. struct icnss_m3_upload_segments_req_data *event_data = data;
  1260. struct qcom_dump_segment segment;
  1261. int i, status = 0, ret = 0;
  1262. struct list_head head;
  1263. if (!dump_enabled()) {
  1264. icnss_pr_info("Dump collection is not enabled\n");
  1265. return ret;
  1266. }
  1267. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1268. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1269. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1270. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1271. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1272. return ret;
  1273. INIT_LIST_HEAD(&head);
  1274. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1275. memset(&segment, 0, sizeof(segment));
  1276. segment.va = devm_ioremap(&priv->pdev->dev,
  1277. event_data->m3_segment[i].addr,
  1278. event_data->m3_segment[i].size);
  1279. if (!segment.va) {
  1280. icnss_pr_err("Failed to ioremap M3 Dump region");
  1281. ret = -ENOMEM;
  1282. goto send_resp;
  1283. }
  1284. segment.size = event_data->m3_segment[i].size;
  1285. list_add(&segment.node, &head);
  1286. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1287. event_data->m3_segment[i].name);
  1288. switch (event_data->m3_segment[i].type) {
  1289. case QMI_M3_SEGMENT_PHYAREG_V01:
  1290. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1291. break;
  1292. case QMI_M3_SEGMENT_PHYDBG_V01:
  1293. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1294. break;
  1295. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1296. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1297. break;
  1298. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1299. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1300. break;
  1301. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1302. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1303. break;
  1304. default:
  1305. icnss_pr_err("Invalid Segment type: %d",
  1306. event_data->m3_segment[i].type);
  1307. }
  1308. if (ret) {
  1309. status = ret;
  1310. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1311. event_data->m3_segment[i].name, ret);
  1312. }
  1313. list_del(&segment.node);
  1314. }
  1315. send_resp:
  1316. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1317. status);
  1318. return ret;
  1319. }
  1320. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1321. {
  1322. int ret = 0;
  1323. struct icnss_subsys_restart_level_data *event_data = data;
  1324. if (!priv)
  1325. return -ENODEV;
  1326. if (!data)
  1327. return -EINVAL;
  1328. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1329. kfree(data);
  1330. return ret;
  1331. }
  1332. static void icnss_driver_event_work(struct work_struct *work)
  1333. {
  1334. struct icnss_priv *priv =
  1335. container_of(work, struct icnss_priv, event_work);
  1336. struct icnss_driver_event *event;
  1337. unsigned long flags;
  1338. int ret;
  1339. icnss_pm_stay_awake(priv);
  1340. spin_lock_irqsave(&priv->event_lock, flags);
  1341. while (!list_empty(&priv->event_list)) {
  1342. event = list_first_entry(&priv->event_list,
  1343. struct icnss_driver_event, list);
  1344. list_del(&event->list);
  1345. spin_unlock_irqrestore(&priv->event_lock, flags);
  1346. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1347. icnss_driver_event_to_str(event->type),
  1348. event->sync ? "-sync" : "", event->type,
  1349. priv->state);
  1350. switch (event->type) {
  1351. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1352. ret = icnss_driver_event_server_arrive(priv,
  1353. event->data);
  1354. break;
  1355. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1356. ret = icnss_driver_event_server_exit(priv);
  1357. break;
  1358. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1359. ret = icnss_driver_event_fw_ready_ind(priv,
  1360. event->data);
  1361. break;
  1362. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1363. ret = icnss_driver_event_register_driver(priv,
  1364. event->data);
  1365. break;
  1366. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1367. ret = icnss_driver_event_unregister_driver(priv,
  1368. event->data);
  1369. break;
  1370. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1371. ret = icnss_driver_event_pd_service_down(priv,
  1372. event->data);
  1373. break;
  1374. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1375. ret = icnss_driver_event_early_crash_ind(priv,
  1376. event->data);
  1377. break;
  1378. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1379. ret = icnss_driver_event_idle_shutdown(priv,
  1380. event->data);
  1381. break;
  1382. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1383. ret = icnss_driver_event_idle_restart(priv,
  1384. event->data);
  1385. break;
  1386. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1387. ret = icnss_driver_event_fw_init_done(priv,
  1388. event->data);
  1389. break;
  1390. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1391. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1392. break;
  1393. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1394. ret = icnss_qdss_trace_save_hdlr(priv,
  1395. event->data);
  1396. break;
  1397. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1398. ret = icnss_qdss_trace_free_hdlr(priv);
  1399. break;
  1400. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1401. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1402. break;
  1403. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1404. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1405. event->data);
  1406. break;
  1407. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1408. ret = icnss_subsys_restart_level(priv, event->data);
  1409. break;
  1410. default:
  1411. icnss_pr_err("Invalid Event type: %d", event->type);
  1412. kfree(event);
  1413. continue;
  1414. }
  1415. priv->stats.events[event->type].processed++;
  1416. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1417. icnss_driver_event_to_str(event->type),
  1418. event->sync ? "-sync" : "", event->type, ret,
  1419. priv->state);
  1420. spin_lock_irqsave(&priv->event_lock, flags);
  1421. if (event->sync) {
  1422. event->ret = ret;
  1423. complete(&event->complete);
  1424. continue;
  1425. }
  1426. spin_unlock_irqrestore(&priv->event_lock, flags);
  1427. kfree(event);
  1428. spin_lock_irqsave(&priv->event_lock, flags);
  1429. }
  1430. spin_unlock_irqrestore(&priv->event_lock, flags);
  1431. icnss_pm_relax(priv);
  1432. }
  1433. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1434. {
  1435. struct icnss_priv *priv =
  1436. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1437. struct icnss_soc_wake_event *event;
  1438. unsigned long flags;
  1439. int ret;
  1440. icnss_pm_stay_awake(priv);
  1441. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1442. while (!list_empty(&priv->soc_wake_msg_list)) {
  1443. event = list_first_entry(&priv->soc_wake_msg_list,
  1444. struct icnss_soc_wake_event, list);
  1445. list_del(&event->list);
  1446. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1447. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1448. icnss_soc_wake_event_to_str(event->type),
  1449. event->sync ? "-sync" : "", event->type,
  1450. priv->state);
  1451. switch (event->type) {
  1452. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1453. ret = icnss_event_soc_wake_request(priv,
  1454. event->data);
  1455. break;
  1456. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1457. ret = icnss_event_soc_wake_release(priv,
  1458. event->data);
  1459. break;
  1460. default:
  1461. icnss_pr_err("Invalid Event type: %d", event->type);
  1462. kfree(event);
  1463. continue;
  1464. }
  1465. priv->stats.soc_wake_events[event->type].processed++;
  1466. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1467. icnss_soc_wake_event_to_str(event->type),
  1468. event->sync ? "-sync" : "", event->type, ret,
  1469. priv->state);
  1470. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1471. if (event->sync) {
  1472. event->ret = ret;
  1473. complete(&event->complete);
  1474. continue;
  1475. }
  1476. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1477. kfree(event);
  1478. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1479. }
  1480. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1481. icnss_pm_relax(priv);
  1482. }
  1483. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1484. {
  1485. int ret = 0;
  1486. struct qcom_dump_segment segment;
  1487. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1488. struct list_head head;
  1489. if (!dump_enabled()) {
  1490. icnss_pr_info("Dump collection is not enabled\n");
  1491. return ret;
  1492. }
  1493. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1494. return ret;
  1495. INIT_LIST_HEAD(&head);
  1496. memset(&segment, 0, sizeof(segment));
  1497. segment.va = priv->msa_va;
  1498. segment.size = priv->msa_mem_size;
  1499. list_add(&segment.node, &head);
  1500. if (!msa0_dump_dev->dev) {
  1501. icnss_pr_err("Created Dump Device not found\n");
  1502. return 0;
  1503. }
  1504. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1505. if (ret) {
  1506. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1507. return ret;
  1508. }
  1509. list_del(&segment.node);
  1510. return ret;
  1511. }
  1512. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1513. void *data)
  1514. {
  1515. struct qcom_ssr_notify_data *notif = data;
  1516. int ret = 0;
  1517. if (!notif->crashed) {
  1518. if (atomic_read(&priv->is_shutdown)) {
  1519. atomic_set(&priv->is_shutdown, false);
  1520. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1521. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1522. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1523. clear_bit(ICNSS_FW_READY, &priv->state);
  1524. icnss_driver_event_post(priv,
  1525. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1526. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1527. NULL);
  1528. }
  1529. }
  1530. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1531. if (!wait_for_completion_timeout(
  1532. &priv->unblock_shutdown,
  1533. msecs_to_jiffies(PROBE_TIMEOUT)))
  1534. icnss_pr_err("modem block shutdown timeout\n");
  1535. }
  1536. ret = wlfw_send_modem_shutdown_msg(priv);
  1537. if (ret < 0)
  1538. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1539. ret);
  1540. }
  1541. }
  1542. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1543. {
  1544. switch (code) {
  1545. case QCOM_SSR_BEFORE_POWERUP:
  1546. return "BEFORE_POWERUP";
  1547. case QCOM_SSR_AFTER_POWERUP:
  1548. return "AFTER_POWERUP";
  1549. case QCOM_SSR_BEFORE_SHUTDOWN:
  1550. return "BEFORE_SHUTDOWN";
  1551. case QCOM_SSR_AFTER_SHUTDOWN:
  1552. return "AFTER_SHUTDOWN";
  1553. default:
  1554. return "UNKNOWN";
  1555. }
  1556. };
  1557. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1558. unsigned long code,
  1559. void *data)
  1560. {
  1561. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1562. wpss_early_ssr_nb);
  1563. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1564. icnss_qcom_ssr_notify_state_to_str(code), code);
  1565. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1566. set_bit(ICNSS_FW_DOWN, &priv->state);
  1567. icnss_ignore_fw_timeout(true);
  1568. }
  1569. return NOTIFY_DONE;
  1570. }
  1571. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1572. unsigned long code,
  1573. void *data)
  1574. {
  1575. struct icnss_event_pd_service_down_data *event_data;
  1576. struct qcom_ssr_notify_data *notif = data;
  1577. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1578. wpss_ssr_nb);
  1579. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1580. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1581. icnss_qcom_ssr_notify_state_to_str(code), code);
  1582. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1583. icnss_pr_info("Collecting msa0 segment dump\n");
  1584. icnss_msa0_ramdump(priv);
  1585. goto out;
  1586. }
  1587. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1588. goto out;
  1589. priv->is_ssr = true;
  1590. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1591. priv->state, notif->crashed);
  1592. set_bit(ICNSS_FW_DOWN, &priv->state);
  1593. if (notif->crashed)
  1594. priv->stats.recovery.root_pd_crash++;
  1595. else
  1596. priv->stats.recovery.root_pd_shutdown++;
  1597. icnss_ignore_fw_timeout(true);
  1598. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1599. if (event_data == NULL)
  1600. return notifier_from_errno(-ENOMEM);
  1601. event_data->crashed = notif->crashed;
  1602. fw_down_data.crashed = !!notif->crashed;
  1603. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1604. clear_bit(ICNSS_FW_READY, &priv->state);
  1605. fw_down_data.crashed = !!notif->crashed;
  1606. icnss_call_driver_uevent(priv,
  1607. ICNSS_UEVENT_FW_DOWN,
  1608. &fw_down_data);
  1609. }
  1610. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1611. ICNSS_EVENT_SYNC, event_data);
  1612. out:
  1613. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1614. return NOTIFY_OK;
  1615. }
  1616. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1617. unsigned long code,
  1618. void *data)
  1619. {
  1620. struct icnss_event_pd_service_down_data *event_data;
  1621. struct qcom_ssr_notify_data *notif = data;
  1622. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1623. modem_ssr_nb);
  1624. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1625. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1626. icnss_qcom_ssr_notify_state_to_str(code), code);
  1627. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1628. icnss_pr_info("Collecting msa0 segment dump\n");
  1629. icnss_msa0_ramdump(priv);
  1630. goto out;
  1631. }
  1632. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1633. goto out;
  1634. priv->is_ssr = true;
  1635. if (notif->crashed) {
  1636. priv->stats.recovery.root_pd_crash++;
  1637. priv->root_pd_shutdown = false;
  1638. } else {
  1639. priv->stats.recovery.root_pd_shutdown++;
  1640. priv->root_pd_shutdown = true;
  1641. }
  1642. icnss_update_state_send_modem_shutdown(priv, data);
  1643. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1644. set_bit(ICNSS_FW_DOWN, &priv->state);
  1645. icnss_ignore_fw_timeout(true);
  1646. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1647. clear_bit(ICNSS_FW_READY, &priv->state);
  1648. fw_down_data.crashed = !!notif->crashed;
  1649. icnss_call_driver_uevent(priv,
  1650. ICNSS_UEVENT_FW_DOWN,
  1651. &fw_down_data);
  1652. }
  1653. goto out;
  1654. }
  1655. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1656. priv->state, notif->crashed);
  1657. set_bit(ICNSS_FW_DOWN, &priv->state);
  1658. icnss_ignore_fw_timeout(true);
  1659. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1660. if (event_data == NULL)
  1661. return notifier_from_errno(-ENOMEM);
  1662. event_data->crashed = notif->crashed;
  1663. fw_down_data.crashed = !!notif->crashed;
  1664. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1665. clear_bit(ICNSS_FW_READY, &priv->state);
  1666. fw_down_data.crashed = !!notif->crashed;
  1667. icnss_call_driver_uevent(priv,
  1668. ICNSS_UEVENT_FW_DOWN,
  1669. &fw_down_data);
  1670. }
  1671. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1672. ICNSS_EVENT_SYNC, event_data);
  1673. out:
  1674. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1675. return NOTIFY_OK;
  1676. }
  1677. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1678. {
  1679. int ret = 0;
  1680. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1681. priv->wpss_early_notify_handler =
  1682. qcom_register_early_ssr_notifier("wpss",
  1683. &priv->wpss_early_ssr_nb);
  1684. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1685. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1686. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1687. }
  1688. return ret;
  1689. }
  1690. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1691. {
  1692. int ret = 0;
  1693. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1694. /*
  1695. * Assign priority of icnss wpss notifier callback over IPA
  1696. * modem notifier callback which is 0
  1697. */
  1698. priv->wpss_ssr_nb.priority = 1;
  1699. priv->wpss_notify_handler =
  1700. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1701. if (IS_ERR(priv->wpss_notify_handler)) {
  1702. ret = PTR_ERR(priv->wpss_notify_handler);
  1703. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1704. }
  1705. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1706. return ret;
  1707. }
  1708. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1709. {
  1710. int ret = 0;
  1711. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1712. /*
  1713. * Assign priority of icnss modem notifier callback over IPA
  1714. * modem notifier callback which is 0
  1715. */
  1716. priv->modem_ssr_nb.priority = 1;
  1717. priv->modem_notify_handler =
  1718. qcom_register_ssr_notifier("modem", &priv->modem_ssr_nb);
  1719. if (IS_ERR(priv->modem_notify_handler)) {
  1720. ret = PTR_ERR(priv->modem_notify_handler);
  1721. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1722. }
  1723. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1724. return ret;
  1725. }
  1726. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1727. {
  1728. if (IS_ERR(priv->wpss_early_notify_handler))
  1729. return;
  1730. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1731. &priv->wpss_early_ssr_nb);
  1732. priv->wpss_early_notify_handler = NULL;
  1733. }
  1734. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1735. {
  1736. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1737. return 0;
  1738. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1739. &priv->wpss_ssr_nb);
  1740. priv->wpss_notify_handler = NULL;
  1741. return 0;
  1742. }
  1743. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1744. {
  1745. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1746. return 0;
  1747. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1748. &priv->modem_ssr_nb);
  1749. priv->modem_notify_handler = NULL;
  1750. return 0;
  1751. }
  1752. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1753. {
  1754. struct icnss_priv *priv = priv_cb;
  1755. struct icnss_event_pd_service_down_data *event_data;
  1756. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1757. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1758. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1759. state, priv->state);
  1760. switch (state) {
  1761. case SERVREG_SERVICE_STATE_DOWN:
  1762. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1763. if (!event_data)
  1764. return;
  1765. event_data->crashed = true;
  1766. if (!priv->is_ssr) {
  1767. set_bit(ICNSS_PDR, &penv->state);
  1768. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1769. cause = ICNSS_HOST_ERROR;
  1770. priv->stats.recovery.pdr_host_error++;
  1771. } else {
  1772. cause = ICNSS_FW_CRASH;
  1773. priv->stats.recovery.pdr_fw_crash++;
  1774. }
  1775. } else if (priv->root_pd_shutdown) {
  1776. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1777. event_data->crashed = false;
  1778. }
  1779. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1780. priv->state, icnss_pdr_cause[cause]);
  1781. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1782. set_bit(ICNSS_FW_DOWN, &priv->state);
  1783. icnss_ignore_fw_timeout(true);
  1784. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1785. clear_bit(ICNSS_FW_READY, &priv->state);
  1786. fw_down_data.crashed = event_data->crashed;
  1787. icnss_call_driver_uevent(priv,
  1788. ICNSS_UEVENT_FW_DOWN,
  1789. &fw_down_data);
  1790. }
  1791. }
  1792. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1793. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1794. ICNSS_EVENT_SYNC, event_data);
  1795. break;
  1796. case SERVREG_SERVICE_STATE_UP:
  1797. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1798. break;
  1799. default:
  1800. break;
  1801. }
  1802. return;
  1803. }
  1804. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1805. {
  1806. struct pdr_handle *handle = NULL;
  1807. struct pdr_service *service = NULL;
  1808. int err = 0;
  1809. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1810. if (IS_ERR_OR_NULL(handle)) {
  1811. err = PTR_ERR(handle);
  1812. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1813. goto out;
  1814. }
  1815. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1816. if (IS_ERR_OR_NULL(service)) {
  1817. err = PTR_ERR(service);
  1818. icnss_pr_err("Failed to add lookup, err %d", err);
  1819. goto out;
  1820. }
  1821. priv->pdr_handle = handle;
  1822. priv->pdr_service = service;
  1823. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1824. icnss_pr_info("PDR registration happened");
  1825. out:
  1826. return err;
  1827. }
  1828. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  1829. {
  1830. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  1831. return;
  1832. pdr_handle_release(priv->pdr_handle);
  1833. }
  1834. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  1835. {
  1836. int ret = 0;
  1837. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  1838. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  1839. ret = PTR_ERR(priv->icnss_ramdump_class);
  1840. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  1841. return ret;
  1842. }
  1843. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  1844. ICNSS_RAMDUMP_NAME);
  1845. if (ret < 0) {
  1846. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  1847. goto fail_alloc_major;
  1848. }
  1849. return 0;
  1850. fail_alloc_major:
  1851. class_destroy(priv->icnss_ramdump_class);
  1852. return ret;
  1853. }
  1854. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  1855. {
  1856. int ret = 0;
  1857. struct icnss_ramdump_info *ramdump_info;
  1858. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  1859. if (!ramdump_info)
  1860. return ERR_PTR(-ENOMEM);
  1861. if (!dev_name) {
  1862. icnss_pr_err("%s: Invalid device name.\n", __func__);
  1863. return NULL;
  1864. }
  1865. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  1866. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  1867. if (ramdump_info->minor < 0) {
  1868. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  1869. ramdump_info->minor);
  1870. ret = -ENODEV;
  1871. goto fail_out_of_minors;
  1872. }
  1873. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  1874. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  1875. ramdump_info->minor),
  1876. ramdump_info, ramdump_info->name);
  1877. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  1878. ret = PTR_ERR(ramdump_info->dev);
  1879. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  1880. ramdump_info->name, ret);
  1881. goto fail_device_create;
  1882. }
  1883. return (void *)ramdump_info;
  1884. fail_device_create:
  1885. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  1886. fail_out_of_minors:
  1887. kfree(ramdump_info);
  1888. return ERR_PTR(ret);
  1889. }
  1890. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  1891. {
  1892. int ret = 0;
  1893. if (!priv || !priv->pdev) {
  1894. icnss_pr_err("Platform priv or pdev is NULL\n");
  1895. return -EINVAL;
  1896. }
  1897. ret = icnss_ramdump_devnode_init(priv);
  1898. if (ret)
  1899. return ret;
  1900. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  1901. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  1902. icnss_pr_err("Failed to create msa0 dump device!");
  1903. return -ENOMEM;
  1904. }
  1905. if (priv->device_id == WCN6750_DEVICE_ID) {
  1906. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  1907. ICNSS_M3_SEGMENT(
  1908. ICNSS_M3_SEGMENT_PHYAREG));
  1909. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1910. !priv->m3_dump_phyareg->dev) {
  1911. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  1912. return -ENOMEM;
  1913. }
  1914. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  1915. ICNSS_M3_SEGMENT(
  1916. ICNSS_M3_SEGMENT_PHYA));
  1917. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1918. !priv->m3_dump_phydbg->dev) {
  1919. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  1920. return -ENOMEM;
  1921. }
  1922. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  1923. ICNSS_M3_SEGMENT(
  1924. ICNSS_M3_SEGMENT_WMACREG));
  1925. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1926. !priv->m3_dump_wmac0reg->dev) {
  1927. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  1928. return -ENOMEM;
  1929. }
  1930. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  1931. ICNSS_M3_SEGMENT(
  1932. ICNSS_M3_SEGMENT_WCSSDBG));
  1933. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1934. !priv->m3_dump_wcssdbg->dev) {
  1935. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  1936. return -ENOMEM;
  1937. }
  1938. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  1939. ICNSS_M3_SEGMENT(
  1940. ICNSS_M3_SEGMENT_PHYAM3));
  1941. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  1942. !priv->m3_dump_phyapdmem->dev) {
  1943. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  1944. return -ENOMEM;
  1945. }
  1946. }
  1947. return 0;
  1948. }
  1949. static int icnss_enable_recovery(struct icnss_priv *priv)
  1950. {
  1951. int ret;
  1952. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  1953. icnss_pr_dbg("Recovery disabled through module parameter\n");
  1954. return 0;
  1955. }
  1956. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  1957. icnss_pr_dbg("SSR disabled through module parameter\n");
  1958. goto enable_pdr;
  1959. }
  1960. ret = icnss_register_ramdump_devices(priv);
  1961. if (ret)
  1962. return ret;
  1963. if (priv->device_id == WCN6750_DEVICE_ID) {
  1964. icnss_wpss_early_ssr_register_notifier(priv);
  1965. icnss_wpss_ssr_register_notifier(priv);
  1966. return 0;
  1967. }
  1968. icnss_modem_ssr_register_notifier(priv);
  1969. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  1970. icnss_pr_dbg("PDR disabled through module parameter\n");
  1971. return 0;
  1972. }
  1973. enable_pdr:
  1974. ret = icnss_pd_restart_enable(priv);
  1975. if (ret)
  1976. return ret;
  1977. return 0;
  1978. }
  1979. static int icnss_dev_id_match(struct icnss_priv *priv,
  1980. struct device_info *dev_info)
  1981. {
  1982. if (!dev_info) {
  1983. icnss_pr_info("WLAN driver devinfo is null, Continue driver loading");
  1984. return 1;
  1985. }
  1986. while (dev_info->device_id) {
  1987. if (priv->device_id == dev_info->device_id)
  1988. return 1;
  1989. dev_info++;
  1990. }
  1991. return 0;
  1992. }
  1993. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  1994. unsigned long *thermal_state)
  1995. {
  1996. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  1997. *thermal_state = icnss_tcdev->max_thermal_state;
  1998. return 0;
  1999. }
  2000. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2001. unsigned long *thermal_state)
  2002. {
  2003. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2004. *thermal_state = icnss_tcdev->curr_thermal_state;
  2005. return 0;
  2006. }
  2007. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2008. unsigned long thermal_state)
  2009. {
  2010. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2011. struct device *dev = &penv->pdev->dev;
  2012. int ret = 0;
  2013. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2014. return 0;
  2015. if (thermal_state > icnss_tcdev->max_thermal_state)
  2016. return -EINVAL;
  2017. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2018. thermal_state, icnss_tcdev->tcdev_id);
  2019. mutex_lock(&penv->tcdev_lock);
  2020. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2021. icnss_tcdev->tcdev_id);
  2022. if (!ret)
  2023. icnss_tcdev->curr_thermal_state = thermal_state;
  2024. mutex_unlock(&penv->tcdev_lock);
  2025. if (ret) {
  2026. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2027. ret, icnss_tcdev->tcdev_id);
  2028. return ret;
  2029. }
  2030. return 0;
  2031. }
  2032. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2033. .get_max_state = icnss_tcdev_get_max_state,
  2034. .get_cur_state = icnss_tcdev_get_cur_state,
  2035. .set_cur_state = icnss_tcdev_set_cur_state,
  2036. };
  2037. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2038. int tcdev_id)
  2039. {
  2040. struct icnss_priv *priv = dev_get_drvdata(dev);
  2041. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2042. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2043. struct device_node *dev_node;
  2044. int ret = 0;
  2045. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2046. if (!icnss_tcdev)
  2047. return -ENOMEM;
  2048. icnss_tcdev->tcdev_id = tcdev_id;
  2049. icnss_tcdev->max_thermal_state = max_state;
  2050. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2051. "qcom,icnss_cdev%d", tcdev_id);
  2052. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2053. if (!dev_node) {
  2054. icnss_pr_err("Failed to get cooling device node\n");
  2055. return -EINVAL;
  2056. }
  2057. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2058. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2059. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2060. dev_node,
  2061. cdev_node_name, icnss_tcdev,
  2062. &icnss_cooling_ops);
  2063. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2064. ret = PTR_ERR(icnss_tcdev->tcdev);
  2065. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2066. ret, icnss_tcdev->tcdev_id);
  2067. } else {
  2068. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2069. icnss_tcdev->tcdev_id);
  2070. list_add(&icnss_tcdev->tcdev_list,
  2071. &priv->icnss_tcdev_list);
  2072. }
  2073. } else {
  2074. icnss_pr_dbg("Cooling device registration not supported");
  2075. ret = -EOPNOTSUPP;
  2076. }
  2077. return ret;
  2078. }
  2079. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2080. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2081. {
  2082. struct icnss_priv *priv = dev_get_drvdata(dev);
  2083. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2084. while (!list_empty(&priv->icnss_tcdev_list)) {
  2085. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2086. struct icnss_thermal_cdev,
  2087. tcdev_list);
  2088. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2089. list_del(&icnss_tcdev->tcdev_list);
  2090. kfree(icnss_tcdev);
  2091. }
  2092. }
  2093. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2094. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2095. unsigned long *thermal_state,
  2096. int tcdev_id)
  2097. {
  2098. struct icnss_priv *priv = dev_get_drvdata(dev);
  2099. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2100. mutex_lock(&priv->tcdev_lock);
  2101. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2102. if (icnss_tcdev->tcdev_id != tcdev_id)
  2103. continue;
  2104. *thermal_state = icnss_tcdev->curr_thermal_state;
  2105. mutex_unlock(&priv->tcdev_lock);
  2106. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2107. icnss_tcdev->curr_thermal_state, tcdev_id);
  2108. return 0;
  2109. }
  2110. mutex_unlock(&priv->tcdev_lock);
  2111. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2112. return -EINVAL;
  2113. }
  2114. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2115. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2116. int cmd_len, void *cb_ctx,
  2117. int (*cb)(void *ctx, void *event, int event_len))
  2118. {
  2119. struct icnss_priv *priv = icnss_get_plat_priv();
  2120. int ret;
  2121. if (!priv)
  2122. return -ENODEV;
  2123. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2124. return -EINVAL;
  2125. priv->get_info_cb = cb;
  2126. priv->get_info_cb_ctx = cb_ctx;
  2127. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2128. if (ret) {
  2129. priv->get_info_cb = NULL;
  2130. priv->get_info_cb_ctx = NULL;
  2131. }
  2132. return ret;
  2133. }
  2134. EXPORT_SYMBOL(icnss_qmi_send);
  2135. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2136. struct module *owner, const char *mod_name)
  2137. {
  2138. int ret = 0;
  2139. struct icnss_priv *priv = icnss_get_plat_priv();
  2140. if (!priv || !priv->pdev) {
  2141. ret = -ENODEV;
  2142. goto out;
  2143. }
  2144. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2145. if (priv->ops) {
  2146. icnss_pr_err("Driver already registered\n");
  2147. ret = -EEXIST;
  2148. goto out;
  2149. }
  2150. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2151. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2152. ops->dev_info->name);
  2153. return -ENODEV;
  2154. }
  2155. if (!ops->probe || !ops->remove) {
  2156. ret = -EINVAL;
  2157. goto out;
  2158. }
  2159. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2160. 0, ops);
  2161. if (ret == -EINTR)
  2162. ret = 0;
  2163. out:
  2164. return ret;
  2165. }
  2166. EXPORT_SYMBOL(__icnss_register_driver);
  2167. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2168. {
  2169. int ret;
  2170. struct icnss_priv *priv = icnss_get_plat_priv();
  2171. if (!priv || !priv->pdev) {
  2172. ret = -ENODEV;
  2173. goto out;
  2174. }
  2175. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2176. if (!priv->ops) {
  2177. icnss_pr_err("Driver not registered\n");
  2178. ret = -ENOENT;
  2179. goto out;
  2180. }
  2181. ret = icnss_driver_event_post(priv,
  2182. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2183. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2184. out:
  2185. return ret;
  2186. }
  2187. EXPORT_SYMBOL(icnss_unregister_driver);
  2188. static struct icnss_msi_config msi_config = {
  2189. .total_vectors = 28,
  2190. .total_users = 2,
  2191. .users = (struct icnss_msi_user[]) {
  2192. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2193. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2194. },
  2195. };
  2196. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2197. {
  2198. priv->msi_config = &msi_config;
  2199. return 0;
  2200. }
  2201. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2202. int *num_vectors, u32 *user_base_data,
  2203. u32 *base_vector)
  2204. {
  2205. struct icnss_priv *priv = dev_get_drvdata(dev);
  2206. struct icnss_msi_config *msi_config;
  2207. int idx;
  2208. if (!priv)
  2209. return -ENODEV;
  2210. msi_config = priv->msi_config;
  2211. if (!msi_config) {
  2212. icnss_pr_err("MSI is not supported.\n");
  2213. return -EINVAL;
  2214. }
  2215. for (idx = 0; idx < msi_config->total_users; idx++) {
  2216. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2217. *num_vectors = msi_config->users[idx].num_vectors;
  2218. *user_base_data = msi_config->users[idx].base_vector
  2219. + priv->msi_base_data;
  2220. *base_vector = msi_config->users[idx].base_vector;
  2221. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2222. user_name, *num_vectors, *user_base_data,
  2223. *base_vector);
  2224. return 0;
  2225. }
  2226. }
  2227. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2228. return -EINVAL;
  2229. }
  2230. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2231. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2232. {
  2233. struct icnss_priv *priv = dev_get_drvdata(dev);
  2234. int irq_num;
  2235. irq_num = priv->srng_irqs[vector];
  2236. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2237. irq_num, vector);
  2238. return irq_num;
  2239. }
  2240. EXPORT_SYMBOL(icnss_get_msi_irq);
  2241. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2242. u32 *msi_addr_high)
  2243. {
  2244. struct icnss_priv *priv = dev_get_drvdata(dev);
  2245. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2246. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2247. }
  2248. EXPORT_SYMBOL(icnss_get_msi_address);
  2249. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2250. irqreturn_t (*handler)(int, void *),
  2251. unsigned long flags, const char *name, void *ctx)
  2252. {
  2253. int ret = 0;
  2254. unsigned int irq;
  2255. struct ce_irq_list *irq_entry;
  2256. struct icnss_priv *priv = dev_get_drvdata(dev);
  2257. if (!priv || !priv->pdev) {
  2258. ret = -ENODEV;
  2259. goto out;
  2260. }
  2261. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2262. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2263. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2264. ret = -EINVAL;
  2265. goto out;
  2266. }
  2267. irq = priv->ce_irqs[ce_id];
  2268. irq_entry = &priv->ce_irq_list[ce_id];
  2269. if (irq_entry->handler || irq_entry->irq) {
  2270. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2271. irq, ce_id);
  2272. ret = -EEXIST;
  2273. goto out;
  2274. }
  2275. ret = request_irq(irq, handler, flags, name, ctx);
  2276. if (ret) {
  2277. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2278. irq, ce_id, ret);
  2279. goto out;
  2280. }
  2281. irq_entry->irq = irq;
  2282. irq_entry->handler = handler;
  2283. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2284. penv->stats.ce_irqs[ce_id].request++;
  2285. out:
  2286. return ret;
  2287. }
  2288. EXPORT_SYMBOL(icnss_ce_request_irq);
  2289. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2290. {
  2291. int ret = 0;
  2292. unsigned int irq;
  2293. struct ce_irq_list *irq_entry;
  2294. if (!penv || !penv->pdev || !dev) {
  2295. ret = -ENODEV;
  2296. goto out;
  2297. }
  2298. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2299. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2300. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2301. ret = -EINVAL;
  2302. goto out;
  2303. }
  2304. irq = penv->ce_irqs[ce_id];
  2305. irq_entry = &penv->ce_irq_list[ce_id];
  2306. if (!irq_entry->handler || !irq_entry->irq) {
  2307. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2308. ret = -EEXIST;
  2309. goto out;
  2310. }
  2311. free_irq(irq, ctx);
  2312. irq_entry->irq = 0;
  2313. irq_entry->handler = NULL;
  2314. penv->stats.ce_irqs[ce_id].free++;
  2315. out:
  2316. return ret;
  2317. }
  2318. EXPORT_SYMBOL(icnss_ce_free_irq);
  2319. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2320. {
  2321. unsigned int irq;
  2322. if (!penv || !penv->pdev || !dev) {
  2323. icnss_pr_err("Platform driver not initialized\n");
  2324. return;
  2325. }
  2326. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2327. penv->state);
  2328. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2329. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2330. return;
  2331. }
  2332. penv->stats.ce_irqs[ce_id].enable++;
  2333. irq = penv->ce_irqs[ce_id];
  2334. enable_irq(irq);
  2335. }
  2336. EXPORT_SYMBOL(icnss_enable_irq);
  2337. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2338. {
  2339. unsigned int irq;
  2340. if (!penv || !penv->pdev || !dev) {
  2341. icnss_pr_err("Platform driver not initialized\n");
  2342. return;
  2343. }
  2344. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2345. penv->state);
  2346. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2347. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2348. ce_id);
  2349. return;
  2350. }
  2351. irq = penv->ce_irqs[ce_id];
  2352. disable_irq(irq);
  2353. penv->stats.ce_irqs[ce_id].disable++;
  2354. }
  2355. EXPORT_SYMBOL(icnss_disable_irq);
  2356. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2357. {
  2358. char *fw_build_timestamp = NULL;
  2359. struct icnss_priv *priv = dev_get_drvdata(dev);
  2360. if (!priv) {
  2361. icnss_pr_err("Platform driver not initialized\n");
  2362. return -EINVAL;
  2363. }
  2364. info->v_addr = priv->mem_base_va;
  2365. info->p_addr = priv->mem_base_pa;
  2366. info->chip_id = priv->chip_info.chip_id;
  2367. info->chip_family = priv->chip_info.chip_family;
  2368. info->board_id = priv->board_id;
  2369. info->soc_id = priv->soc_id;
  2370. info->fw_version = priv->fw_version_info.fw_version;
  2371. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2372. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2373. strlcpy(info->fw_build_timestamp,
  2374. priv->fw_version_info.fw_build_timestamp,
  2375. WLFW_MAX_TIMESTAMP_LEN + 1);
  2376. return 0;
  2377. }
  2378. EXPORT_SYMBOL(icnss_get_soc_info);
  2379. int icnss_get_mhi_state(struct device *dev)
  2380. {
  2381. struct icnss_priv *priv = dev_get_drvdata(dev);
  2382. if (!priv) {
  2383. icnss_pr_err("Platform driver not initialized\n");
  2384. return -EINVAL;
  2385. }
  2386. if (!priv->mhi_state_info_va)
  2387. return -ENOMEM;
  2388. return ioread32(priv->mhi_state_info_va);
  2389. }
  2390. EXPORT_SYMBOL(icnss_get_mhi_state);
  2391. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2392. {
  2393. int ret;
  2394. struct icnss_priv *priv;
  2395. if (!dev)
  2396. return -ENODEV;
  2397. priv = dev_get_drvdata(dev);
  2398. if (!priv) {
  2399. icnss_pr_err("Platform driver not initialized\n");
  2400. return -EINVAL;
  2401. }
  2402. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2403. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2404. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2405. priv->state);
  2406. return -EINVAL;
  2407. }
  2408. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2409. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2410. if (ret)
  2411. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2412. ret, fw_log_mode);
  2413. return ret;
  2414. }
  2415. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2416. int icnss_force_wake_request(struct device *dev)
  2417. {
  2418. struct icnss_priv *priv;
  2419. if (!dev)
  2420. return -ENODEV;
  2421. priv = dev_get_drvdata(dev);
  2422. if (!priv) {
  2423. icnss_pr_err("Platform driver not initialized\n");
  2424. return -EINVAL;
  2425. }
  2426. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2427. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2428. atomic_read(&priv->soc_wake_ref_count));
  2429. return 0;
  2430. }
  2431. icnss_pr_soc_wake("Calling SOC Wake request");
  2432. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2433. 0, NULL);
  2434. return 0;
  2435. }
  2436. EXPORT_SYMBOL(icnss_force_wake_request);
  2437. int icnss_force_wake_release(struct device *dev)
  2438. {
  2439. struct icnss_priv *priv;
  2440. if (!dev)
  2441. return -ENODEV;
  2442. priv = dev_get_drvdata(dev);
  2443. if (!priv) {
  2444. icnss_pr_err("Platform driver not initialized\n");
  2445. return -EINVAL;
  2446. }
  2447. icnss_pr_soc_wake("Calling SOC Wake response");
  2448. if (atomic_read(&priv->soc_wake_ref_count) &&
  2449. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2450. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2451. atomic_read(&priv->soc_wake_ref_count));
  2452. return 0;
  2453. }
  2454. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2455. 0, NULL);
  2456. return 0;
  2457. }
  2458. EXPORT_SYMBOL(icnss_force_wake_release);
  2459. int icnss_is_device_awake(struct device *dev)
  2460. {
  2461. struct icnss_priv *priv = dev_get_drvdata(dev);
  2462. if (!priv) {
  2463. icnss_pr_err("Platform driver not initialized\n");
  2464. return -EINVAL;
  2465. }
  2466. return atomic_read(&priv->soc_wake_ref_count);
  2467. }
  2468. EXPORT_SYMBOL(icnss_is_device_awake);
  2469. int icnss_is_pci_ep_awake(struct device *dev)
  2470. {
  2471. struct icnss_priv *priv = dev_get_drvdata(dev);
  2472. if (!priv) {
  2473. icnss_pr_err("Platform driver not initialized\n");
  2474. return -EINVAL;
  2475. }
  2476. if (!priv->mhi_state_info_va)
  2477. return -ENOMEM;
  2478. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2479. }
  2480. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2481. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2482. uint32_t mem_type, uint32_t data_len,
  2483. uint8_t *output)
  2484. {
  2485. int ret = 0;
  2486. struct icnss_priv *priv = dev_get_drvdata(dev);
  2487. if (priv->magic != ICNSS_MAGIC) {
  2488. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2489. dev, priv, priv->magic);
  2490. return -EINVAL;
  2491. }
  2492. if (!output || data_len == 0
  2493. || data_len > WLFW_MAX_DATA_SIZE) {
  2494. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2495. output, data_len);
  2496. ret = -EINVAL;
  2497. goto out;
  2498. }
  2499. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2500. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2501. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2502. priv->state);
  2503. ret = -EINVAL;
  2504. goto out;
  2505. }
  2506. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2507. data_len, output);
  2508. out:
  2509. return ret;
  2510. }
  2511. EXPORT_SYMBOL(icnss_athdiag_read);
  2512. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2513. uint32_t mem_type, uint32_t data_len,
  2514. uint8_t *input)
  2515. {
  2516. int ret = 0;
  2517. struct icnss_priv *priv = dev_get_drvdata(dev);
  2518. if (priv->magic != ICNSS_MAGIC) {
  2519. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2520. dev, priv, priv->magic);
  2521. return -EINVAL;
  2522. }
  2523. if (!input || data_len == 0
  2524. || data_len > WLFW_MAX_DATA_SIZE) {
  2525. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2526. input, data_len);
  2527. ret = -EINVAL;
  2528. goto out;
  2529. }
  2530. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2531. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2532. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2533. priv->state);
  2534. ret = -EINVAL;
  2535. goto out;
  2536. }
  2537. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2538. data_len, input);
  2539. out:
  2540. return ret;
  2541. }
  2542. EXPORT_SYMBOL(icnss_athdiag_write);
  2543. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2544. enum icnss_driver_mode mode,
  2545. const char *host_version)
  2546. {
  2547. struct icnss_priv *priv = dev_get_drvdata(dev);
  2548. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2549. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2550. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2551. priv->state);
  2552. return -EINVAL;
  2553. }
  2554. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2555. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2556. priv->state);
  2557. return -EINVAL;
  2558. }
  2559. if (priv->device_id == WCN6750_DEVICE_ID &&
  2560. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2561. icnss_setup_dms_mac(priv);
  2562. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2563. }
  2564. EXPORT_SYMBOL(icnss_wlan_enable);
  2565. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2566. {
  2567. struct icnss_priv *priv = dev_get_drvdata(dev);
  2568. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2569. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2570. priv->state);
  2571. return 0;
  2572. }
  2573. return icnss_send_wlan_disable_to_fw(priv);
  2574. }
  2575. EXPORT_SYMBOL(icnss_wlan_disable);
  2576. bool icnss_is_qmi_disable(struct device *dev)
  2577. {
  2578. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2579. }
  2580. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2581. int icnss_get_ce_id(struct device *dev, int irq)
  2582. {
  2583. int i;
  2584. if (!penv || !penv->pdev || !dev)
  2585. return -ENODEV;
  2586. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2587. if (penv->ce_irqs[i] == irq)
  2588. return i;
  2589. }
  2590. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2591. return -EINVAL;
  2592. }
  2593. EXPORT_SYMBOL(icnss_get_ce_id);
  2594. int icnss_get_irq(struct device *dev, int ce_id)
  2595. {
  2596. int irq;
  2597. if (!penv || !penv->pdev || !dev)
  2598. return -ENODEV;
  2599. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2600. return -EINVAL;
  2601. irq = penv->ce_irqs[ce_id];
  2602. return irq;
  2603. }
  2604. EXPORT_SYMBOL(icnss_get_irq);
  2605. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2606. {
  2607. struct icnss_priv *priv = dev_get_drvdata(dev);
  2608. if (!priv) {
  2609. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2610. return NULL;
  2611. }
  2612. return priv->iommu_domain;
  2613. }
  2614. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2615. int icnss_smmu_map(struct device *dev,
  2616. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2617. {
  2618. struct icnss_priv *priv = dev_get_drvdata(dev);
  2619. int flag = IOMMU_READ | IOMMU_WRITE;
  2620. bool dma_coherent = false;
  2621. unsigned long iova;
  2622. int prop_len = 0;
  2623. size_t len;
  2624. int ret = 0;
  2625. if (!priv) {
  2626. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2627. dev, priv);
  2628. return -EINVAL;
  2629. }
  2630. if (!iova_addr) {
  2631. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2632. &paddr, size);
  2633. return -EINVAL;
  2634. }
  2635. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2636. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2637. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2638. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2639. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2640. iova,
  2641. &priv->smmu_iova_ipa_start,
  2642. priv->smmu_iova_ipa_len);
  2643. return -ENOMEM;
  2644. }
  2645. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2646. icnss_pr_dbg("dma-coherent is %s\n",
  2647. dma_coherent ? "enabled" : "disabled");
  2648. if (dma_coherent)
  2649. flag |= IOMMU_CACHE;
  2650. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2651. ret = iommu_map(priv->iommu_domain, iova,
  2652. rounddown(paddr, PAGE_SIZE), len,
  2653. flag);
  2654. if (ret) {
  2655. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2656. return ret;
  2657. }
  2658. priv->smmu_iova_ipa_current = iova + len;
  2659. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2660. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2661. return 0;
  2662. }
  2663. EXPORT_SYMBOL(icnss_smmu_map);
  2664. int icnss_smmu_unmap(struct device *dev,
  2665. uint32_t iova_addr, size_t size)
  2666. {
  2667. struct icnss_priv *priv = dev_get_drvdata(dev);
  2668. unsigned long iova;
  2669. size_t len, unmapped_len;
  2670. if (!priv) {
  2671. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2672. dev, priv);
  2673. return -EINVAL;
  2674. }
  2675. if (!iova_addr) {
  2676. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2677. size);
  2678. return -EINVAL;
  2679. }
  2680. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2681. PAGE_SIZE);
  2682. iova = rounddown(iova_addr, PAGE_SIZE);
  2683. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2684. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2685. iova,
  2686. &priv->smmu_iova_ipa_start,
  2687. priv->smmu_iova_ipa_len);
  2688. return -ENOMEM;
  2689. }
  2690. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2691. iova, len);
  2692. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2693. if (unmapped_len != len) {
  2694. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2695. return -EINVAL;
  2696. }
  2697. priv->smmu_iova_ipa_current = iova;
  2698. return 0;
  2699. }
  2700. EXPORT_SYMBOL(icnss_smmu_unmap);
  2701. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2702. {
  2703. return socinfo_get_serial_number();
  2704. }
  2705. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2706. int icnss_trigger_recovery(struct device *dev)
  2707. {
  2708. int ret = 0;
  2709. struct icnss_priv *priv = dev_get_drvdata(dev);
  2710. if (priv->magic != ICNSS_MAGIC) {
  2711. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2712. ret = -EINVAL;
  2713. goto out;
  2714. }
  2715. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2716. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2717. priv->state);
  2718. ret = -EPERM;
  2719. goto out;
  2720. }
  2721. if (priv->device_id == WCN6750_DEVICE_ID) {
  2722. icnss_pr_vdbg("Initiate Root PD restart");
  2723. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2724. ICNSS_SMP2P_OUT_POWER_SAVE);
  2725. if (!ret)
  2726. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2727. return ret;
  2728. }
  2729. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2730. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2731. priv->state);
  2732. ret = -EOPNOTSUPP;
  2733. goto out;
  2734. }
  2735. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2736. priv->state);
  2737. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2738. if (!ret)
  2739. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2740. out:
  2741. return ret;
  2742. }
  2743. EXPORT_SYMBOL(icnss_trigger_recovery);
  2744. int icnss_idle_shutdown(struct device *dev)
  2745. {
  2746. struct icnss_priv *priv = dev_get_drvdata(dev);
  2747. if (!priv) {
  2748. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2749. return -EINVAL;
  2750. }
  2751. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2752. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2753. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2754. return -EBUSY;
  2755. }
  2756. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2757. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2758. }
  2759. EXPORT_SYMBOL(icnss_idle_shutdown);
  2760. int icnss_idle_restart(struct device *dev)
  2761. {
  2762. struct icnss_priv *priv = dev_get_drvdata(dev);
  2763. if (!priv) {
  2764. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2765. return -EINVAL;
  2766. }
  2767. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2768. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2769. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2770. return -EBUSY;
  2771. }
  2772. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2773. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2774. }
  2775. EXPORT_SYMBOL(icnss_idle_restart);
  2776. int icnss_exit_power_save(struct device *dev)
  2777. {
  2778. struct icnss_priv *priv = dev_get_drvdata(dev);
  2779. icnss_pr_vdbg("Calling Exit Power Save\n");
  2780. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2781. !test_bit(ICNSS_MODE_ON, &priv->state))
  2782. return 0;
  2783. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2784. ICNSS_SMP2P_OUT_POWER_SAVE);
  2785. }
  2786. EXPORT_SYMBOL(icnss_exit_power_save);
  2787. int icnss_prevent_l1(struct device *dev)
  2788. {
  2789. struct icnss_priv *priv = dev_get_drvdata(dev);
  2790. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2791. !test_bit(ICNSS_MODE_ON, &priv->state))
  2792. return 0;
  2793. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2794. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2795. }
  2796. EXPORT_SYMBOL(icnss_prevent_l1);
  2797. void icnss_allow_l1(struct device *dev)
  2798. {
  2799. struct icnss_priv *priv = dev_get_drvdata(dev);
  2800. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2801. !test_bit(ICNSS_MODE_ON, &priv->state))
  2802. return;
  2803. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2804. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2805. }
  2806. EXPORT_SYMBOL(icnss_allow_l1);
  2807. void icnss_allow_recursive_recovery(struct device *dev)
  2808. {
  2809. struct icnss_priv *priv = dev_get_drvdata(dev);
  2810. priv->allow_recursive_recovery = true;
  2811. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2812. }
  2813. void icnss_disallow_recursive_recovery(struct device *dev)
  2814. {
  2815. struct icnss_priv *priv = dev_get_drvdata(dev);
  2816. priv->allow_recursive_recovery = false;
  2817. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  2818. }
  2819. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  2820. {
  2821. struct kobject *icnss_kobject;
  2822. int ret = 0;
  2823. atomic_set(&priv->is_shutdown, false);
  2824. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  2825. if (!icnss_kobject) {
  2826. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  2827. return -EINVAL;
  2828. }
  2829. priv->icnss_kobject = icnss_kobject;
  2830. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  2831. if (ret) {
  2832. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  2833. return ret;
  2834. }
  2835. return ret;
  2836. }
  2837. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  2838. {
  2839. struct kobject *icnss_kobject;
  2840. icnss_kobject = priv->icnss_kobject;
  2841. if (icnss_kobject)
  2842. kobject_put(icnss_kobject);
  2843. }
  2844. static ssize_t qdss_tr_start_store(struct device *dev,
  2845. struct device_attribute *attr,
  2846. const char *buf, size_t count)
  2847. {
  2848. struct icnss_priv *priv = dev_get_drvdata(dev);
  2849. wlfw_qdss_trace_start(priv);
  2850. icnss_pr_dbg("Received QDSS start command\n");
  2851. return count;
  2852. }
  2853. static ssize_t qdss_tr_stop_store(struct device *dev,
  2854. struct device_attribute *attr,
  2855. const char *user_buf, size_t count)
  2856. {
  2857. struct icnss_priv *priv = dev_get_drvdata(dev);
  2858. u32 option = 0;
  2859. if (sscanf(user_buf, "%du", &option) != 1)
  2860. return -EINVAL;
  2861. wlfw_qdss_trace_stop(priv, option);
  2862. icnss_pr_dbg("Received QDSS stop command\n");
  2863. return count;
  2864. }
  2865. static ssize_t qdss_conf_download_store(struct device *dev,
  2866. struct device_attribute *attr,
  2867. const char *buf, size_t count)
  2868. {
  2869. struct icnss_priv *priv = dev_get_drvdata(dev);
  2870. icnss_wlfw_qdss_dnld_send_sync(priv);
  2871. icnss_pr_dbg("Received QDSS download config command\n");
  2872. return count;
  2873. }
  2874. static ssize_t hw_trc_override_store(struct device *dev,
  2875. struct device_attribute *attr,
  2876. const char *buf, size_t count)
  2877. {
  2878. struct icnss_priv *priv = dev_get_drvdata(dev);
  2879. int tmp = 0;
  2880. if (sscanf(buf, "%du", &tmp) != 1)
  2881. return -EINVAL;
  2882. priv->hw_trc_override = tmp;
  2883. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  2884. return count;
  2885. }
  2886. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  2887. {
  2888. struct icnss_priv *priv = icnss_get_plat_priv();
  2889. phandle rproc_phandle;
  2890. int ret;
  2891. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  2892. &rproc_phandle)) {
  2893. icnss_pr_err("error reading rproc phandle\n");
  2894. return;
  2895. }
  2896. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  2897. if (IS_ERR_OR_NULL(priv->rproc)) {
  2898. icnss_pr_err("rproc not found");
  2899. return;
  2900. }
  2901. ret = rproc_boot(priv->rproc);
  2902. if (ret) {
  2903. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  2904. rproc_put(priv->rproc);
  2905. }
  2906. }
  2907. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  2908. {
  2909. if (priv && priv->rproc) {
  2910. rproc_shutdown(priv->rproc);
  2911. rproc_put(priv->rproc);
  2912. priv->rproc = NULL;
  2913. }
  2914. }
  2915. static ssize_t wpss_boot_store(struct device *dev,
  2916. struct device_attribute *attr,
  2917. const char *buf, size_t count)
  2918. {
  2919. struct icnss_priv *priv = dev_get_drvdata(dev);
  2920. int wpss_rproc = 0;
  2921. if (priv->device_id != WCN6750_DEVICE_ID)
  2922. return count;
  2923. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  2924. icnss_pr_err("Failed to read wpss rproc info");
  2925. return -EINVAL;
  2926. }
  2927. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  2928. if (wpss_rproc == 1)
  2929. schedule_work(&wpss_loader);
  2930. else if (wpss_rproc == 0)
  2931. icnss_wpss_unload(priv);
  2932. return count;
  2933. }
  2934. static ssize_t wlan_en_delay_store(struct device *dev,
  2935. struct device_attribute *attr,
  2936. const char *buf, size_t count)
  2937. {
  2938. struct icnss_priv *priv = dev_get_drvdata(dev);
  2939. uint32_t wlan_en_delay = 0;
  2940. if (priv->device_id != WCN6750_DEVICE_ID)
  2941. return count;
  2942. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  2943. icnss_pr_err("Failed to read wlan_en_delay");
  2944. return -EINVAL;
  2945. }
  2946. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  2947. priv->wlan_en_delay_ms = wlan_en_delay;
  2948. return count;
  2949. }
  2950. static DEVICE_ATTR_WO(qdss_tr_start);
  2951. static DEVICE_ATTR_WO(qdss_tr_stop);
  2952. static DEVICE_ATTR_WO(qdss_conf_download);
  2953. static DEVICE_ATTR_WO(hw_trc_override);
  2954. static DEVICE_ATTR_WO(wpss_boot);
  2955. static DEVICE_ATTR_WO(wlan_en_delay);
  2956. static struct attribute *icnss_attrs[] = {
  2957. &dev_attr_qdss_tr_start.attr,
  2958. &dev_attr_qdss_tr_stop.attr,
  2959. &dev_attr_qdss_conf_download.attr,
  2960. &dev_attr_hw_trc_override.attr,
  2961. &dev_attr_wpss_boot.attr,
  2962. &dev_attr_wlan_en_delay.attr,
  2963. NULL,
  2964. };
  2965. static struct attribute_group icnss_attr_group = {
  2966. .attrs = icnss_attrs,
  2967. };
  2968. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  2969. {
  2970. struct device *dev = &priv->pdev->dev;
  2971. int ret;
  2972. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  2973. if (ret) {
  2974. icnss_pr_err("Failed to create icnss link, err = %d\n",
  2975. ret);
  2976. goto out;
  2977. }
  2978. return 0;
  2979. out:
  2980. return ret;
  2981. }
  2982. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  2983. {
  2984. sysfs_remove_link(kernel_kobj, "icnss");
  2985. }
  2986. static int icnss_sysfs_create(struct icnss_priv *priv)
  2987. {
  2988. int ret = 0;
  2989. ret = devm_device_add_group(&priv->pdev->dev,
  2990. &icnss_attr_group);
  2991. if (ret) {
  2992. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  2993. ret);
  2994. goto out;
  2995. }
  2996. icnss_create_sysfs_link(priv);
  2997. ret = icnss_create_shutdown_sysfs(priv);
  2998. if (ret)
  2999. goto remove_icnss_group;
  3000. return 0;
  3001. remove_icnss_group:
  3002. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3003. out:
  3004. return ret;
  3005. }
  3006. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3007. {
  3008. icnss_destroy_shutdown_sysfs(priv);
  3009. icnss_remove_sysfs_link(priv);
  3010. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3011. }
  3012. static int icnss_resource_parse(struct icnss_priv *priv)
  3013. {
  3014. int ret = 0, i = 0;
  3015. struct platform_device *pdev = priv->pdev;
  3016. struct device *dev = &pdev->dev;
  3017. struct resource *res;
  3018. u32 int_prop;
  3019. ret = icnss_get_vreg(priv);
  3020. if (ret) {
  3021. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3022. goto out;
  3023. }
  3024. ret = icnss_get_clk(priv);
  3025. if (ret) {
  3026. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3027. goto put_vreg;
  3028. }
  3029. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3030. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3031. "membase");
  3032. if (!res) {
  3033. icnss_pr_err("Memory base not found in DT\n");
  3034. ret = -EINVAL;
  3035. goto put_clk;
  3036. }
  3037. priv->mem_base_pa = res->start;
  3038. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3039. resource_size(res));
  3040. if (!priv->mem_base_va) {
  3041. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3042. &priv->mem_base_pa);
  3043. ret = -EINVAL;
  3044. goto put_clk;
  3045. }
  3046. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3047. &priv->mem_base_pa,
  3048. priv->mem_base_va);
  3049. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3050. res = platform_get_resource(priv->pdev,
  3051. IORESOURCE_IRQ, i);
  3052. if (!res) {
  3053. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3054. ret = -ENODEV;
  3055. goto put_clk;
  3056. } else {
  3057. priv->ce_irqs[i] = res->start;
  3058. }
  3059. }
  3060. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3061. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3062. "msi_addr");
  3063. if (!res) {
  3064. icnss_pr_err("MSI address not found in DT\n");
  3065. ret = -EINVAL;
  3066. goto put_clk;
  3067. }
  3068. priv->msi_addr_pa = res->start;
  3069. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3070. PAGE_SIZE,
  3071. DMA_FROM_DEVICE, 0);
  3072. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3073. icnss_pr_err("MSI: failed to map msi address\n");
  3074. priv->msi_addr_iova = 0;
  3075. ret = -ENOMEM;
  3076. goto put_clk;
  3077. }
  3078. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3079. &priv->msi_addr_pa,
  3080. priv->msi_addr_iova);
  3081. ret = of_property_read_u32_index(dev->of_node,
  3082. "interrupts",
  3083. 1,
  3084. &int_prop);
  3085. if (ret) {
  3086. icnss_pr_dbg("Read interrupt prop failed");
  3087. goto put_clk;
  3088. }
  3089. priv->msi_base_data = int_prop + 32;
  3090. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3091. priv->msi_base_data, int_prop);
  3092. icnss_get_msi_assignment(priv);
  3093. for (i = 0; i < msi_config.total_vectors; i++) {
  3094. res = platform_get_resource(priv->pdev,
  3095. IORESOURCE_IRQ, i);
  3096. if (!res) {
  3097. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3098. ret = -ENODEV;
  3099. goto put_clk;
  3100. } else {
  3101. priv->srng_irqs[i] = res->start;
  3102. }
  3103. }
  3104. }
  3105. return 0;
  3106. put_clk:
  3107. icnss_put_clk(priv);
  3108. put_vreg:
  3109. icnss_put_vreg(priv);
  3110. out:
  3111. return ret;
  3112. }
  3113. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3114. {
  3115. int ret = 0;
  3116. struct platform_device *pdev = priv->pdev;
  3117. struct device *dev = &pdev->dev;
  3118. struct device_node *np = NULL;
  3119. u64 prop_size = 0;
  3120. const __be32 *addrp = NULL;
  3121. np = of_parse_phandle(dev->of_node,
  3122. "qcom,wlan-msa-fixed-region", 0);
  3123. if (np) {
  3124. addrp = of_get_address(np, 0, &prop_size, NULL);
  3125. if (!addrp) {
  3126. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3127. ret = -EINVAL;
  3128. of_node_put(np);
  3129. goto out;
  3130. }
  3131. priv->msa_pa = of_translate_address(np, addrp);
  3132. if (priv->msa_pa == OF_BAD_ADDR) {
  3133. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3134. ret = -EINVAL;
  3135. of_node_put(np);
  3136. goto out;
  3137. }
  3138. of_node_put(np);
  3139. priv->msa_va = memremap(priv->msa_pa,
  3140. (unsigned long)prop_size, MEMREMAP_WT);
  3141. if (!priv->msa_va) {
  3142. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3143. &priv->msa_pa);
  3144. ret = -EINVAL;
  3145. goto out;
  3146. }
  3147. priv->msa_mem_size = prop_size;
  3148. } else {
  3149. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3150. &priv->msa_mem_size);
  3151. if (ret || priv->msa_mem_size == 0) {
  3152. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3153. priv->msa_mem_size, ret);
  3154. goto out;
  3155. }
  3156. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3157. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3158. if (!priv->msa_va) {
  3159. icnss_pr_err("DMA alloc failed for MSA\n");
  3160. ret = -ENOMEM;
  3161. goto out;
  3162. }
  3163. }
  3164. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3165. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3166. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3167. "qcom,fw-prefix");
  3168. return 0;
  3169. out:
  3170. return ret;
  3171. }
  3172. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3173. struct device *dev, unsigned long iova,
  3174. int flags, void *handler_token)
  3175. {
  3176. struct icnss_priv *priv = handler_token;
  3177. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3178. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3179. if (!priv) {
  3180. icnss_pr_err("priv is NULL\n");
  3181. return -ENODEV;
  3182. }
  3183. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3184. fw_down_data.crashed = true;
  3185. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3186. &fw_down_data);
  3187. }
  3188. icnss_trigger_recovery(&priv->pdev->dev);
  3189. /* IOMMU driver requires non-zero return value to print debug info. */
  3190. return -EINVAL;
  3191. }
  3192. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3193. {
  3194. int ret = 0;
  3195. struct platform_device *pdev = priv->pdev;
  3196. struct device *dev = &pdev->dev;
  3197. const char *iommu_dma_type;
  3198. struct resource *res;
  3199. u32 addr_win[2];
  3200. ret = of_property_read_u32_array(dev->of_node,
  3201. "qcom,iommu-dma-addr-pool",
  3202. addr_win,
  3203. ARRAY_SIZE(addr_win));
  3204. if (ret) {
  3205. icnss_pr_err("SMMU IOVA base not found\n");
  3206. } else {
  3207. priv->smmu_iova_start = addr_win[0];
  3208. priv->smmu_iova_len = addr_win[1];
  3209. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3210. &priv->smmu_iova_start,
  3211. priv->smmu_iova_len);
  3212. priv->iommu_domain =
  3213. iommu_get_domain_for_dev(&pdev->dev);
  3214. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3215. &iommu_dma_type);
  3216. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3217. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3218. priv->smmu_s1_enable = true;
  3219. if (priv->device_id == WCN6750_DEVICE_ID)
  3220. iommu_set_fault_handler(priv->iommu_domain,
  3221. icnss_smmu_fault_handler,
  3222. priv);
  3223. }
  3224. res = platform_get_resource_byname(pdev,
  3225. IORESOURCE_MEM,
  3226. "smmu_iova_ipa");
  3227. if (!res) {
  3228. icnss_pr_err("SMMU IOVA IPA not found\n");
  3229. } else {
  3230. priv->smmu_iova_ipa_start = res->start;
  3231. priv->smmu_iova_ipa_current = res->start;
  3232. priv->smmu_iova_ipa_len = resource_size(res);
  3233. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3234. &priv->smmu_iova_ipa_start,
  3235. priv->smmu_iova_ipa_len);
  3236. }
  3237. }
  3238. return 0;
  3239. }
  3240. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3241. {
  3242. if (!priv)
  3243. return -ENODEV;
  3244. if (!priv->smmu_iova_len)
  3245. return -EINVAL;
  3246. *addr = priv->smmu_iova_start;
  3247. *size = priv->smmu_iova_len;
  3248. return 0;
  3249. }
  3250. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3251. {
  3252. if (!priv)
  3253. return -ENODEV;
  3254. if (!priv->smmu_iova_ipa_len)
  3255. return -EINVAL;
  3256. *addr = priv->smmu_iova_ipa_start;
  3257. *size = priv->smmu_iova_ipa_len;
  3258. return 0;
  3259. }
  3260. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3261. char *name)
  3262. {
  3263. if (!priv)
  3264. return;
  3265. if (!priv->use_prefix_path) {
  3266. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3267. return;
  3268. }
  3269. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3270. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3271. ADRASTEA_PATH_PREFIX "%s", name);
  3272. else
  3273. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3274. QCA6750_PATH_PREFIX "%s", name);
  3275. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3276. }
  3277. static const struct platform_device_id icnss_platform_id_table[] = {
  3278. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3279. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3280. { },
  3281. };
  3282. static const struct of_device_id icnss_dt_match[] = {
  3283. {
  3284. .compatible = "qcom,wcn6750",
  3285. .data = (void *)&icnss_platform_id_table[0]},
  3286. {
  3287. .compatible = "qcom,icnss",
  3288. .data = (void *)&icnss_platform_id_table[1]},
  3289. { },
  3290. };
  3291. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3292. static void icnss_init_control_params(struct icnss_priv *priv)
  3293. {
  3294. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3295. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3296. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3297. if (of_property_read_bool(priv->pdev->dev.of_node,
  3298. "bdf-download-support"))
  3299. priv->bdf_download_support = true;
  3300. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3301. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3302. }
  3303. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3304. {
  3305. pm_runtime_get_sync(&priv->pdev->dev);
  3306. pm_runtime_forbid(&priv->pdev->dev);
  3307. pm_runtime_set_active(&priv->pdev->dev);
  3308. pm_runtime_enable(&priv->pdev->dev);
  3309. }
  3310. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3311. {
  3312. pm_runtime_disable(&priv->pdev->dev);
  3313. pm_runtime_allow(&priv->pdev->dev);
  3314. pm_runtime_put_sync(&priv->pdev->dev);
  3315. }
  3316. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3317. {
  3318. return of_property_read_bool(priv->pdev->dev.of_node,
  3319. "use-nv-mac");
  3320. }
  3321. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3322. {
  3323. struct icnss_subsys_restart_level_data *restart_level_data;
  3324. icnss_pr_info("rproc name: %s recovery disable: %d",
  3325. rproc->name, rproc->recovery_disabled);
  3326. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3327. if (!restart_level_data)
  3328. return;
  3329. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3330. if (rproc->recovery_disabled)
  3331. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3332. else
  3333. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3334. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3335. 0, restart_level_data);
  3336. }
  3337. }
  3338. static int icnss_probe(struct platform_device *pdev)
  3339. {
  3340. int ret = 0;
  3341. struct device *dev = &pdev->dev;
  3342. struct icnss_priv *priv;
  3343. const struct of_device_id *of_id;
  3344. const struct platform_device_id *device_id;
  3345. if (dev_get_drvdata(dev)) {
  3346. icnss_pr_err("Driver is already initialized\n");
  3347. return -EEXIST;
  3348. }
  3349. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3350. if (!of_id || !of_id->data) {
  3351. icnss_pr_err("Failed to find of match device!\n");
  3352. ret = -ENODEV;
  3353. goto out_reset_drvdata;
  3354. }
  3355. device_id = of_id->data;
  3356. icnss_pr_dbg("Platform driver probe\n");
  3357. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3358. if (!priv)
  3359. return -ENOMEM;
  3360. priv->magic = ICNSS_MAGIC;
  3361. dev_set_drvdata(dev, priv);
  3362. priv->pdev = pdev;
  3363. priv->device_id = device_id->driver_data;
  3364. priv->is_chain1_supported = true;
  3365. INIT_LIST_HEAD(&priv->vreg_list);
  3366. INIT_LIST_HEAD(&priv->clk_list);
  3367. icnss_allow_recursive_recovery(dev);
  3368. icnss_init_control_params(priv);
  3369. ret = icnss_resource_parse(priv);
  3370. if (ret)
  3371. goto out_reset_drvdata;
  3372. ret = icnss_msa_dt_parse(priv);
  3373. if (ret)
  3374. goto out_free_resources;
  3375. ret = icnss_smmu_dt_parse(priv);
  3376. if (ret)
  3377. goto out_free_resources;
  3378. spin_lock_init(&priv->event_lock);
  3379. spin_lock_init(&priv->on_off_lock);
  3380. spin_lock_init(&priv->soc_wake_msg_lock);
  3381. mutex_init(&priv->dev_lock);
  3382. mutex_init(&priv->tcdev_lock);
  3383. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3384. if (!priv->event_wq) {
  3385. icnss_pr_err("Workqueue creation failed\n");
  3386. ret = -EFAULT;
  3387. goto smmu_cleanup;
  3388. }
  3389. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3390. INIT_LIST_HEAD(&priv->event_list);
  3391. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3392. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3393. if (!priv->soc_wake_wq) {
  3394. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3395. ret = -EFAULT;
  3396. goto out_destroy_wq;
  3397. }
  3398. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3399. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3400. ret = icnss_register_fw_service(priv);
  3401. if (ret < 0) {
  3402. icnss_pr_err("fw service registration failed: %d\n", ret);
  3403. goto out_destroy_soc_wq;
  3404. }
  3405. icnss_enable_recovery(priv);
  3406. icnss_debugfs_create(priv);
  3407. icnss_sysfs_create(priv);
  3408. ret = device_init_wakeup(&priv->pdev->dev, true);
  3409. if (ret)
  3410. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3411. ret);
  3412. icnss_set_plat_priv(priv);
  3413. init_completion(&priv->unblock_shutdown);
  3414. if (priv->device_id == WCN6750_DEVICE_ID) {
  3415. ret = icnss_dms_init(priv);
  3416. if (ret)
  3417. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3418. ret = icnss_genl_init();
  3419. if (ret < 0)
  3420. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3421. init_completion(&priv->smp2p_soc_wake_wait);
  3422. icnss_runtime_pm_init(priv);
  3423. icnss_aop_mbox_init(priv);
  3424. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3425. priv->bdf_download_support = true;
  3426. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3427. icnss_pr_dbg("NV MAC feature is %s\n",
  3428. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3429. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3430. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3431. }
  3432. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3433. icnss_pr_info("Platform driver probed successfully\n");
  3434. return 0;
  3435. out_destroy_soc_wq:
  3436. destroy_workqueue(priv->soc_wake_wq);
  3437. out_destroy_wq:
  3438. destroy_workqueue(priv->event_wq);
  3439. smmu_cleanup:
  3440. priv->iommu_domain = NULL;
  3441. out_free_resources:
  3442. icnss_put_resources(priv);
  3443. out_reset_drvdata:
  3444. dev_set_drvdata(dev, NULL);
  3445. return ret;
  3446. }
  3447. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3448. {
  3449. if (IS_ERR_OR_NULL(ramdump_info))
  3450. return;
  3451. device_unregister(ramdump_info->dev);
  3452. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3453. kfree(ramdump_info);
  3454. }
  3455. static int icnss_remove(struct platform_device *pdev)
  3456. {
  3457. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3458. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3459. if (priv->device_id == WCN6750_DEVICE_ID) {
  3460. icnss_dms_deinit(priv);
  3461. icnss_genl_exit();
  3462. icnss_runtime_pm_deinit(priv);
  3463. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3464. mbox_free_channel(priv->mbox_chan);
  3465. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3466. complete_all(&priv->smp2p_soc_wake_wait);
  3467. }
  3468. device_init_wakeup(&priv->pdev->dev, false);
  3469. icnss_debugfs_destroy(priv);
  3470. icnss_sysfs_destroy(priv);
  3471. complete_all(&priv->unblock_shutdown);
  3472. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3473. if (priv->device_id == WCN6750_DEVICE_ID) {
  3474. icnss_wpss_early_ssr_unregister_notifier(priv);
  3475. icnss_wpss_ssr_unregister_notifier(priv);
  3476. rproc_put(priv->rproc);
  3477. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3478. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3479. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3480. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3481. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3482. } else {
  3483. icnss_modem_ssr_unregister_notifier(priv);
  3484. icnss_pdr_unregister_notifier(priv);
  3485. }
  3486. class_destroy(priv->icnss_ramdump_class);
  3487. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3488. icnss_unregister_fw_service(priv);
  3489. if (priv->event_wq)
  3490. destroy_workqueue(priv->event_wq);
  3491. if (priv->soc_wake_wq)
  3492. destroy_workqueue(priv->soc_wake_wq);
  3493. priv->iommu_domain = NULL;
  3494. icnss_hw_power_off(priv);
  3495. icnss_put_resources(priv);
  3496. dev_set_drvdata(&pdev->dev, NULL);
  3497. return 0;
  3498. }
  3499. #ifdef CONFIG_PM_SLEEP
  3500. static int icnss_pm_suspend(struct device *dev)
  3501. {
  3502. struct icnss_priv *priv = dev_get_drvdata(dev);
  3503. int ret = 0;
  3504. if (priv->magic != ICNSS_MAGIC) {
  3505. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3506. dev, priv, priv->magic);
  3507. return -EINVAL;
  3508. }
  3509. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3510. if (!priv->ops || !priv->ops->pm_suspend ||
  3511. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3512. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3513. return 0;
  3514. ret = priv->ops->pm_suspend(dev);
  3515. if (ret == 0) {
  3516. if (priv->device_id == WCN6750_DEVICE_ID) {
  3517. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3518. !test_bit(ICNSS_MODE_ON, &priv->state))
  3519. return 0;
  3520. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3521. ICNSS_SMP2P_OUT_POWER_SAVE);
  3522. }
  3523. priv->stats.pm_suspend++;
  3524. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3525. } else {
  3526. priv->stats.pm_suspend_err++;
  3527. }
  3528. return ret;
  3529. }
  3530. static int icnss_pm_resume(struct device *dev)
  3531. {
  3532. struct icnss_priv *priv = dev_get_drvdata(dev);
  3533. int ret = 0;
  3534. if (priv->magic != ICNSS_MAGIC) {
  3535. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3536. dev, priv, priv->magic);
  3537. return -EINVAL;
  3538. }
  3539. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3540. if (!priv->ops || !priv->ops->pm_resume ||
  3541. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3542. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3543. goto out;
  3544. ret = priv->ops->pm_resume(dev);
  3545. out:
  3546. if (ret == 0) {
  3547. priv->stats.pm_resume++;
  3548. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3549. } else {
  3550. priv->stats.pm_resume_err++;
  3551. }
  3552. return ret;
  3553. }
  3554. static int icnss_pm_suspend_noirq(struct device *dev)
  3555. {
  3556. struct icnss_priv *priv = dev_get_drvdata(dev);
  3557. int ret = 0;
  3558. if (priv->magic != ICNSS_MAGIC) {
  3559. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3560. dev, priv, priv->magic);
  3561. return -EINVAL;
  3562. }
  3563. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3564. if (!priv->ops || !priv->ops->suspend_noirq ||
  3565. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3566. goto out;
  3567. ret = priv->ops->suspend_noirq(dev);
  3568. out:
  3569. if (ret == 0) {
  3570. priv->stats.pm_suspend_noirq++;
  3571. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3572. } else {
  3573. priv->stats.pm_suspend_noirq_err++;
  3574. }
  3575. return ret;
  3576. }
  3577. static int icnss_pm_resume_noirq(struct device *dev)
  3578. {
  3579. struct icnss_priv *priv = dev_get_drvdata(dev);
  3580. int ret = 0;
  3581. if (priv->magic != ICNSS_MAGIC) {
  3582. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3583. dev, priv, priv->magic);
  3584. return -EINVAL;
  3585. }
  3586. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3587. if (!priv->ops || !priv->ops->resume_noirq ||
  3588. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3589. goto out;
  3590. ret = priv->ops->resume_noirq(dev);
  3591. out:
  3592. if (ret == 0) {
  3593. priv->stats.pm_resume_noirq++;
  3594. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3595. } else {
  3596. priv->stats.pm_resume_noirq_err++;
  3597. }
  3598. return ret;
  3599. }
  3600. static int icnss_pm_runtime_suspend(struct device *dev)
  3601. {
  3602. struct icnss_priv *priv = dev_get_drvdata(dev);
  3603. int ret = 0;
  3604. if (priv->device_id != WCN6750_DEVICE_ID) {
  3605. icnss_pr_err("Ignore runtime suspend:\n");
  3606. goto out;
  3607. }
  3608. if (priv->magic != ICNSS_MAGIC) {
  3609. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3610. dev, priv, priv->magic);
  3611. return -EINVAL;
  3612. }
  3613. if (!priv->ops || !priv->ops->runtime_suspend ||
  3614. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3615. goto out;
  3616. icnss_pr_vdbg("Runtime suspend\n");
  3617. ret = priv->ops->runtime_suspend(dev);
  3618. if (!ret) {
  3619. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3620. !test_bit(ICNSS_MODE_ON, &priv->state))
  3621. return 0;
  3622. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3623. ICNSS_SMP2P_OUT_POWER_SAVE);
  3624. }
  3625. out:
  3626. return ret;
  3627. }
  3628. static int icnss_pm_runtime_resume(struct device *dev)
  3629. {
  3630. struct icnss_priv *priv = dev_get_drvdata(dev);
  3631. int ret = 0;
  3632. if (priv->device_id != WCN6750_DEVICE_ID) {
  3633. icnss_pr_err("Ignore runtime resume:\n");
  3634. goto out;
  3635. }
  3636. if (priv->magic != ICNSS_MAGIC) {
  3637. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3638. dev, priv, priv->magic);
  3639. return -EINVAL;
  3640. }
  3641. if (!priv->ops || !priv->ops->runtime_resume ||
  3642. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3643. goto out;
  3644. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3645. ret = priv->ops->runtime_resume(dev);
  3646. out:
  3647. return ret;
  3648. }
  3649. static int icnss_pm_runtime_idle(struct device *dev)
  3650. {
  3651. struct icnss_priv *priv = dev_get_drvdata(dev);
  3652. if (priv->device_id != WCN6750_DEVICE_ID) {
  3653. icnss_pr_err("Ignore runtime idle:\n");
  3654. goto out;
  3655. }
  3656. icnss_pr_vdbg("Runtime idle\n");
  3657. pm_request_autosuspend(dev);
  3658. out:
  3659. return -EBUSY;
  3660. }
  3661. #endif
  3662. static const struct dev_pm_ops icnss_pm_ops = {
  3663. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3664. icnss_pm_resume)
  3665. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3666. icnss_pm_resume_noirq)
  3667. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3668. icnss_pm_runtime_idle)
  3669. };
  3670. static struct platform_driver icnss_driver = {
  3671. .probe = icnss_probe,
  3672. .remove = icnss_remove,
  3673. .driver = {
  3674. .name = "icnss2",
  3675. .pm = &icnss_pm_ops,
  3676. .of_match_table = icnss_dt_match,
  3677. },
  3678. };
  3679. static int __init icnss_initialize(void)
  3680. {
  3681. icnss_debug_init();
  3682. return platform_driver_register(&icnss_driver);
  3683. }
  3684. static void __exit icnss_exit(void)
  3685. {
  3686. platform_driver_unregister(&icnss_driver);
  3687. icnss_debug_deinit();
  3688. }
  3689. module_init(icnss_initialize);
  3690. module_exit(icnss_exit);
  3691. MODULE_LICENSE("GPL v2");
  3692. MODULE_DESCRIPTION("iWCN CORE platform driver");