dp_rx.c 92 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #include "dp_hist.h"
  35. #include "dp_rx_buffer_pool.h"
  36. #ifdef ATH_RX_PRI_SAVE
  37. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  38. (qdf_nbuf_set_priority(_nbuf, _tid))
  39. #else
  40. #define DP_RX_TID_SAVE(_nbuf, _tid)
  41. #endif
  42. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  43. static inline
  44. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  45. {
  46. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  47. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  48. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  49. return false;
  50. }
  51. return true;
  52. }
  53. #else
  54. static inline
  55. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  56. {
  57. return true;
  58. }
  59. #endif
  60. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  61. {
  62. return vdev->ap_bridge_enabled;
  63. }
  64. #ifdef DUP_RX_DESC_WAR
  65. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  66. hal_ring_handle_t hal_ring,
  67. hal_ring_desc_t ring_desc,
  68. struct dp_rx_desc *rx_desc)
  69. {
  70. void *hal_soc = soc->hal_soc;
  71. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  72. dp_rx_desc_dump(rx_desc);
  73. }
  74. #else
  75. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  76. hal_ring_handle_t hal_ring_hdl,
  77. hal_ring_desc_t ring_desc,
  78. struct dp_rx_desc *rx_desc)
  79. {
  80. hal_soc_handle_t hal_soc = soc->hal_soc;
  81. dp_rx_desc_dump(rx_desc);
  82. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  83. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  84. qdf_assert_always(0);
  85. }
  86. #endif
  87. #ifdef RX_DESC_SANITY_WAR
  88. static inline
  89. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  90. hal_ring_handle_t hal_ring_hdl,
  91. hal_ring_desc_t ring_desc,
  92. struct dp_rx_desc *rx_desc)
  93. {
  94. uint8_t return_buffer_manager;
  95. if (qdf_unlikely(!rx_desc)) {
  96. /*
  97. * This is an unlikely case where the cookie obtained
  98. * from the ring_desc is invalid and hence we are not
  99. * able to find the corresponding rx_desc
  100. */
  101. goto fail;
  102. }
  103. return_buffer_manager = hal_rx_ret_buf_manager_get(ring_desc);
  104. if (qdf_unlikely(!(return_buffer_manager == HAL_RX_BUF_RBM_SW1_BM ||
  105. return_buffer_manager == HAL_RX_BUF_RBM_SW3_BM))) {
  106. goto fail;
  107. }
  108. return QDF_STATUS_SUCCESS;
  109. fail:
  110. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  111. dp_err("Ring Desc:");
  112. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  113. ring_desc);
  114. return QDF_STATUS_E_NULL_VALUE;
  115. }
  116. #else
  117. static inline
  118. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  119. hal_ring_handle_t hal_ring_hdl,
  120. hal_ring_desc_t ring_desc,
  121. struct dp_rx_desc *rx_desc)
  122. {
  123. return QDF_STATUS_SUCCESS;
  124. }
  125. #endif
  126. /**
  127. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  128. *
  129. * @dp_soc: struct dp_soc *
  130. * @nbuf_frag_info_t: nbuf frag info
  131. * @dp_pdev: struct dp_pdev *
  132. * @rx_desc_pool: Rx desc pool
  133. *
  134. * Return: QDF_STATUS
  135. */
  136. #ifdef DP_RX_MON_MEM_FRAG
  137. static inline QDF_STATUS
  138. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  139. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  140. struct dp_pdev *dp_pdev,
  141. struct rx_desc_pool *rx_desc_pool)
  142. {
  143. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  144. (nbuf_frag_info_t->virt_addr).vaddr =
  145. qdf_frag_alloc(rx_desc_pool->buf_size);
  146. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  147. dp_err("Frag alloc failed");
  148. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  149. return QDF_STATUS_E_NOMEM;
  150. }
  151. ret = qdf_mem_map_page(dp_soc->osdev,
  152. (nbuf_frag_info_t->virt_addr).vaddr,
  153. QDF_DMA_FROM_DEVICE,
  154. rx_desc_pool->buf_size,
  155. &nbuf_frag_info_t->paddr);
  156. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  157. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  158. dp_err("Frag map failed");
  159. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  160. return QDF_STATUS_E_FAULT;
  161. }
  162. return QDF_STATUS_SUCCESS;
  163. }
  164. #else
  165. static inline QDF_STATUS
  166. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  167. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  168. struct dp_pdev *dp_pdev,
  169. struct rx_desc_pool *rx_desc_pool)
  170. {
  171. return QDF_STATUS_SUCCESS;
  172. }
  173. #endif /* DP_RX_MON_MEM_FRAG */
  174. /**
  175. * dp_pdev_nbuf_alloc_and_map() - Allocate nbuf for desc buffer and map
  176. *
  177. * @dp_soc: struct dp_soc *
  178. * @mac_id: Mac id
  179. * @num_entries_avail: num_entries_avail
  180. * @nbuf_frag_info_t: nbuf frag info
  181. * @dp_pdev: struct dp_pdev *
  182. * @rx_desc_pool: Rx desc pool
  183. *
  184. * Return: QDF_STATUS
  185. */
  186. static inline QDF_STATUS
  187. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  188. uint32_t mac_id,
  189. uint32_t num_entries_avail,
  190. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  191. struct dp_pdev *dp_pdev,
  192. struct rx_desc_pool *rx_desc_pool)
  193. {
  194. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  195. (nbuf_frag_info_t->virt_addr).nbuf =
  196. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  197. mac_id,
  198. rx_desc_pool,
  199. num_entries_avail);
  200. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  201. dp_err("nbuf alloc failed");
  202. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  203. return QDF_STATUS_E_NOMEM;
  204. }
  205. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  206. (nbuf_frag_info_t->virt_addr).nbuf,
  207. QDF_DMA_FROM_DEVICE,
  208. rx_desc_pool->buf_size);
  209. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  210. dp_rx_buffer_pool_nbuf_free(dp_soc,
  211. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  212. dp_err("nbuf map failed");
  213. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  214. return QDF_STATUS_E_FAULT;
  215. }
  216. nbuf_frag_info_t->paddr =
  217. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  218. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc,
  219. (qdf_nbuf_t)((nbuf_frag_info_t->virt_addr).nbuf),
  220. rx_desc_pool->buf_size,
  221. true);
  222. ret = check_x86_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  223. &nbuf_frag_info_t->paddr,
  224. rx_desc_pool);
  225. if (ret == QDF_STATUS_E_FAILURE) {
  226. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  227. (nbuf_frag_info_t->virt_addr).nbuf,
  228. QDF_DMA_FROM_DEVICE,
  229. rx_desc_pool->buf_size);
  230. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  231. return QDF_STATUS_E_ADDRNOTAVAIL;
  232. }
  233. return QDF_STATUS_SUCCESS;
  234. }
  235. /*
  236. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  237. * called during dp rx initialization
  238. * and at the end of dp_rx_process.
  239. *
  240. * @soc: core txrx main context
  241. * @mac_id: mac_id which is one of 3 mac_ids
  242. * @dp_rxdma_srng: dp rxdma circular ring
  243. * @rx_desc_pool: Pointer to free Rx descriptor pool
  244. * @num_req_buffers: number of buffer to be replenished
  245. * @desc_list: list of descs if called from dp_rx_process
  246. * or NULL during dp rx initialization or out of buffer
  247. * interrupt.
  248. * @tail: tail of descs list
  249. * @func_name: name of the caller function
  250. * Return: return success or failure
  251. */
  252. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  253. struct dp_srng *dp_rxdma_srng,
  254. struct rx_desc_pool *rx_desc_pool,
  255. uint32_t num_req_buffers,
  256. union dp_rx_desc_list_elem_t **desc_list,
  257. union dp_rx_desc_list_elem_t **tail,
  258. const char *func_name)
  259. {
  260. uint32_t num_alloc_desc;
  261. uint16_t num_desc_to_free = 0;
  262. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  263. uint32_t num_entries_avail;
  264. uint32_t count;
  265. int sync_hw_ptr = 1;
  266. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  267. void *rxdma_ring_entry;
  268. union dp_rx_desc_list_elem_t *next;
  269. QDF_STATUS ret;
  270. void *rxdma_srng;
  271. rxdma_srng = dp_rxdma_srng->hal_srng;
  272. if (!rxdma_srng) {
  273. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  274. "rxdma srng not initialized");
  275. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  276. return QDF_STATUS_E_FAILURE;
  277. }
  278. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  279. "requested %d buffers for replenish", num_req_buffers);
  280. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  281. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  282. rxdma_srng,
  283. sync_hw_ptr);
  284. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  285. "no of available entries in rxdma ring: %d",
  286. num_entries_avail);
  287. if (!(*desc_list) && (num_entries_avail >
  288. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  289. num_req_buffers = num_entries_avail;
  290. } else if (num_entries_avail < num_req_buffers) {
  291. num_desc_to_free = num_req_buffers - num_entries_avail;
  292. num_req_buffers = num_entries_avail;
  293. }
  294. if (qdf_unlikely(!num_req_buffers)) {
  295. num_desc_to_free = num_req_buffers;
  296. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  297. goto free_descs;
  298. }
  299. /*
  300. * if desc_list is NULL, allocate the descs from freelist
  301. */
  302. if (!(*desc_list)) {
  303. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  304. rx_desc_pool,
  305. num_req_buffers,
  306. desc_list,
  307. tail);
  308. if (!num_alloc_desc) {
  309. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  310. "no free rx_descs in freelist");
  311. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  312. num_req_buffers);
  313. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  314. return QDF_STATUS_E_NOMEM;
  315. }
  316. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  317. "%d rx desc allocated", num_alloc_desc);
  318. num_req_buffers = num_alloc_desc;
  319. }
  320. count = 0;
  321. while (count < num_req_buffers) {
  322. /* Flag is set while pdev rx_desc_pool initialization */
  323. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  324. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  325. &nbuf_frag_info,
  326. dp_pdev,
  327. rx_desc_pool);
  328. else
  329. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  330. mac_id,
  331. num_entries_avail, &nbuf_frag_info,
  332. dp_pdev, rx_desc_pool);
  333. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  334. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  335. continue;
  336. break;
  337. }
  338. count++;
  339. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  340. rxdma_srng);
  341. qdf_assert_always(rxdma_ring_entry);
  342. next = (*desc_list)->next;
  343. /* Flag is set while pdev rx_desc_pool initialization */
  344. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  345. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  346. &nbuf_frag_info);
  347. else
  348. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  349. &nbuf_frag_info);
  350. /* rx_desc.in_use should be zero at this time*/
  351. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  352. (*desc_list)->rx_desc.in_use = 1;
  353. (*desc_list)->rx_desc.in_err_state = 0;
  354. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  355. func_name, RX_DESC_REPLENISHED);
  356. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  357. nbuf_frag_info.virt_addr.nbuf,
  358. (unsigned long long)(nbuf_frag_info.paddr),
  359. (*desc_list)->rx_desc.cookie);
  360. hal_rxdma_buff_addr_info_set(rxdma_ring_entry,
  361. nbuf_frag_info.paddr,
  362. (*desc_list)->rx_desc.cookie,
  363. rx_desc_pool->owner);
  364. *desc_list = next;
  365. }
  366. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  367. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  368. count, num_desc_to_free);
  369. /* No need to count the number of bytes received during replenish.
  370. * Therefore set replenish.pkts.bytes as 0.
  371. */
  372. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  373. free_descs:
  374. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  375. /*
  376. * add any available free desc back to the free list
  377. */
  378. if (*desc_list)
  379. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  380. mac_id, rx_desc_pool);
  381. return QDF_STATUS_SUCCESS;
  382. }
  383. /*
  384. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  385. * pkts to RAW mode simulation to
  386. * decapsulate the pkt.
  387. *
  388. * @vdev: vdev on which RAW mode is enabled
  389. * @nbuf_list: list of RAW pkts to process
  390. * @peer: peer object from which the pkt is rx
  391. *
  392. * Return: void
  393. */
  394. void
  395. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  396. struct dp_peer *peer)
  397. {
  398. qdf_nbuf_t deliver_list_head = NULL;
  399. qdf_nbuf_t deliver_list_tail = NULL;
  400. qdf_nbuf_t nbuf;
  401. nbuf = nbuf_list;
  402. while (nbuf) {
  403. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  404. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  405. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  406. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  407. /*
  408. * reset the chfrag_start and chfrag_end bits in nbuf cb
  409. * as this is a non-amsdu pkt and RAW mode simulation expects
  410. * these bit s to be 0 for non-amsdu pkt.
  411. */
  412. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  413. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  414. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  415. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  416. }
  417. nbuf = next;
  418. }
  419. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  420. &deliver_list_tail, peer->mac_addr.raw);
  421. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  422. }
  423. #ifndef FEATURE_WDS
  424. static void
  425. dp_rx_da_learn(struct dp_soc *soc,
  426. uint8_t *rx_tlv_hdr,
  427. struct dp_peer *ta_peer,
  428. qdf_nbuf_t nbuf)
  429. {
  430. }
  431. #endif
  432. /*
  433. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  434. *
  435. * @soc: core txrx main context
  436. * @ta_peer : source peer entry
  437. * @rx_tlv_hdr : start address of rx tlvs
  438. * @nbuf : nbuf that has to be intrabss forwarded
  439. *
  440. * Return: bool: true if it is forwarded else false
  441. */
  442. static bool
  443. dp_rx_intrabss_fwd(struct dp_soc *soc,
  444. struct dp_peer *ta_peer,
  445. uint8_t *rx_tlv_hdr,
  446. qdf_nbuf_t nbuf,
  447. struct hal_rx_msdu_metadata msdu_metadata)
  448. {
  449. uint16_t len;
  450. uint8_t is_frag;
  451. uint16_t da_peer_id = HTT_INVALID_PEER;
  452. struct dp_peer *da_peer = NULL;
  453. bool is_da_bss_peer = false;
  454. struct dp_ast_entry *ast_entry;
  455. qdf_nbuf_t nbuf_copy;
  456. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  457. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  458. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  459. tid_stats.tid_rx_stats[ring_id][tid];
  460. /* check if the destination peer is available in peer table
  461. * and also check if the source peer and destination peer
  462. * belong to the same vap and destination peer is not bss peer.
  463. */
  464. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  465. ast_entry = soc->ast_table[msdu_metadata.da_idx];
  466. if (!ast_entry)
  467. return false;
  468. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  469. ast_entry->is_active = TRUE;
  470. return false;
  471. }
  472. da_peer_id = ast_entry->peer_id;
  473. if (da_peer_id == HTT_INVALID_PEER)
  474. return false;
  475. /* TA peer cannot be same as peer(DA) on which AST is present
  476. * this indicates a change in topology and that AST entries
  477. * are yet to be updated.
  478. */
  479. if (da_peer_id == ta_peer->peer_id)
  480. return false;
  481. if (ast_entry->vdev_id != ta_peer->vdev->vdev_id)
  482. return false;
  483. da_peer = dp_peer_get_ref_by_id(soc, da_peer_id,
  484. DP_MOD_ID_RX);
  485. if (!da_peer)
  486. return false;
  487. is_da_bss_peer = da_peer->bss_peer;
  488. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  489. if (!is_da_bss_peer) {
  490. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  491. is_frag = qdf_nbuf_is_frag(nbuf);
  492. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  493. /* If the source or destination peer in the isolation
  494. * list then dont forward instead push to bridge stack.
  495. */
  496. if (dp_get_peer_isolation(ta_peer) ||
  497. dp_get_peer_isolation(da_peer))
  498. return false;
  499. /* linearize the nbuf just before we send to
  500. * dp_tx_send()
  501. */
  502. if (qdf_unlikely(is_frag)) {
  503. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  504. return false;
  505. nbuf = qdf_nbuf_unshare(nbuf);
  506. if (!nbuf) {
  507. DP_STATS_INC_PKT(ta_peer,
  508. rx.intra_bss.fail,
  509. 1,
  510. len);
  511. /* return true even though the pkt is
  512. * not forwarded. Basically skb_unshare
  513. * failed and we want to continue with
  514. * next nbuf.
  515. */
  516. tid_stats->fail_cnt[INTRABSS_DROP]++;
  517. return true;
  518. }
  519. }
  520. if (!dp_tx_send((struct cdp_soc_t *)soc,
  521. ta_peer->vdev->vdev_id, nbuf)) {
  522. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  523. len);
  524. return true;
  525. } else {
  526. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  527. len);
  528. tid_stats->fail_cnt[INTRABSS_DROP]++;
  529. return false;
  530. }
  531. }
  532. }
  533. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  534. * source, then clone the pkt and send the cloned pkt for
  535. * intra BSS forwarding and original pkt up the network stack
  536. * Note: how do we handle multicast pkts. do we forward
  537. * all multicast pkts as is or let a higher layer module
  538. * like igmpsnoop decide whether to forward or not with
  539. * Mcast enhancement.
  540. */
  541. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  542. !ta_peer->bss_peer))) {
  543. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  544. goto end;
  545. /* If the source peer in the isolation list
  546. * then dont forward instead push to bridge stack
  547. */
  548. if (dp_get_peer_isolation(ta_peer))
  549. goto end;
  550. nbuf_copy = qdf_nbuf_copy(nbuf);
  551. if (!nbuf_copy)
  552. goto end;
  553. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  554. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  555. /* Set cb->ftype to intrabss FWD */
  556. qdf_nbuf_set_tx_ftype(nbuf_copy, CB_FTYPE_INTRABSS_FWD);
  557. if (dp_tx_send((struct cdp_soc_t *)soc,
  558. ta_peer->vdev->vdev_id, nbuf_copy)) {
  559. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  560. tid_stats->fail_cnt[INTRABSS_DROP]++;
  561. qdf_nbuf_free(nbuf_copy);
  562. } else {
  563. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  564. tid_stats->intrabss_cnt++;
  565. }
  566. }
  567. end:
  568. /* return false as we have to still send the original pkt
  569. * up the stack
  570. */
  571. return false;
  572. }
  573. #ifdef MESH_MODE_SUPPORT
  574. /**
  575. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  576. *
  577. * @vdev: DP Virtual device handle
  578. * @nbuf: Buffer pointer
  579. * @rx_tlv_hdr: start of rx tlv header
  580. * @peer: pointer to peer
  581. *
  582. * This function allocated memory for mesh receive stats and fill the
  583. * required stats. Stores the memory address in skb cb.
  584. *
  585. * Return: void
  586. */
  587. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  588. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  589. {
  590. struct mesh_recv_hdr_s *rx_info = NULL;
  591. uint32_t pkt_type;
  592. uint32_t nss;
  593. uint32_t rate_mcs;
  594. uint32_t bw;
  595. uint8_t primary_chan_num;
  596. uint32_t center_chan_freq;
  597. struct dp_soc *soc;
  598. /* fill recv mesh stats */
  599. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  600. /* upper layers are resposible to free this memory */
  601. if (!rx_info) {
  602. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  603. "Memory allocation failed for mesh rx stats");
  604. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  605. return;
  606. }
  607. rx_info->rs_flags = MESH_RXHDR_VER1;
  608. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  609. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  610. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  611. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  612. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  613. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  614. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  615. if (vdev->osif_get_key)
  616. vdev->osif_get_key(vdev->osif_vdev,
  617. &rx_info->rs_decryptkey[0],
  618. &peer->mac_addr.raw[0],
  619. rx_info->rs_keyix);
  620. }
  621. rx_info->rs_rssi = peer->stats.rx.rssi;
  622. soc = vdev->pdev->soc;
  623. primary_chan_num = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  624. center_chan_freq = hal_rx_msdu_start_get_freq(rx_tlv_hdr) >> 16;
  625. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  626. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  627. soc->ctrl_psoc,
  628. vdev->pdev->pdev_id,
  629. center_chan_freq);
  630. }
  631. rx_info->rs_channel = primary_chan_num;
  632. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  633. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  634. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  635. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  636. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  637. (bw << 24);
  638. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  639. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  640. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  641. rx_info->rs_flags,
  642. rx_info->rs_rssi,
  643. rx_info->rs_channel,
  644. rx_info->rs_ratephy1,
  645. rx_info->rs_keyix);
  646. }
  647. /**
  648. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  649. *
  650. * @vdev: DP Virtual device handle
  651. * @nbuf: Buffer pointer
  652. * @rx_tlv_hdr: start of rx tlv header
  653. *
  654. * This checks if the received packet is matching any filter out
  655. * catogery and and drop the packet if it matches.
  656. *
  657. * Return: status(0 indicates drop, 1 indicate to no drop)
  658. */
  659. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  660. uint8_t *rx_tlv_hdr)
  661. {
  662. union dp_align_mac_addr mac_addr;
  663. struct dp_soc *soc = vdev->pdev->soc;
  664. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  665. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  666. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  667. rx_tlv_hdr))
  668. return QDF_STATUS_SUCCESS;
  669. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  670. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  671. rx_tlv_hdr))
  672. return QDF_STATUS_SUCCESS;
  673. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  674. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  675. rx_tlv_hdr) &&
  676. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  677. rx_tlv_hdr))
  678. return QDF_STATUS_SUCCESS;
  679. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  680. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  681. rx_tlv_hdr,
  682. &mac_addr.raw[0]))
  683. return QDF_STATUS_E_FAILURE;
  684. if (!qdf_mem_cmp(&mac_addr.raw[0],
  685. &vdev->mac_addr.raw[0],
  686. QDF_MAC_ADDR_SIZE))
  687. return QDF_STATUS_SUCCESS;
  688. }
  689. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  690. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  691. rx_tlv_hdr,
  692. &mac_addr.raw[0]))
  693. return QDF_STATUS_E_FAILURE;
  694. if (!qdf_mem_cmp(&mac_addr.raw[0],
  695. &vdev->mac_addr.raw[0],
  696. QDF_MAC_ADDR_SIZE))
  697. return QDF_STATUS_SUCCESS;
  698. }
  699. }
  700. return QDF_STATUS_E_FAILURE;
  701. }
  702. #else
  703. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  704. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  705. {
  706. }
  707. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  708. uint8_t *rx_tlv_hdr)
  709. {
  710. return QDF_STATUS_E_FAILURE;
  711. }
  712. #endif
  713. #ifdef FEATURE_NAC_RSSI
  714. /**
  715. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  716. * clients
  717. * @pdev: DP pdev handle
  718. * @rx_pkt_hdr: Rx packet Header
  719. *
  720. * return: dp_vdev*
  721. */
  722. static
  723. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  724. uint8_t *rx_pkt_hdr)
  725. {
  726. struct ieee80211_frame *wh;
  727. struct dp_neighbour_peer *peer = NULL;
  728. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  729. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  730. return NULL;
  731. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  732. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  733. neighbour_peer_list_elem) {
  734. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  735. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  736. QDF_TRACE(
  737. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  738. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  739. peer->neighbour_peers_macaddr.raw[0],
  740. peer->neighbour_peers_macaddr.raw[1],
  741. peer->neighbour_peers_macaddr.raw[2],
  742. peer->neighbour_peers_macaddr.raw[3],
  743. peer->neighbour_peers_macaddr.raw[4],
  744. peer->neighbour_peers_macaddr.raw[5]);
  745. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  746. return pdev->monitor_vdev;
  747. }
  748. }
  749. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  750. return NULL;
  751. }
  752. /**
  753. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  754. * @soc: DP SOC handle
  755. * @mpdu: mpdu for which peer is invalid
  756. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  757. * pool_id has same mapping)
  758. *
  759. * return: integer type
  760. */
  761. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  762. uint8_t mac_id)
  763. {
  764. struct dp_invalid_peer_msg msg;
  765. struct dp_vdev *vdev = NULL;
  766. struct dp_pdev *pdev = NULL;
  767. struct ieee80211_frame *wh;
  768. qdf_nbuf_t curr_nbuf, next_nbuf;
  769. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  770. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  771. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  772. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  773. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  774. "Drop decapped frames");
  775. goto free;
  776. }
  777. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  778. if (!DP_FRAME_IS_DATA(wh)) {
  779. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  780. "NAWDS valid only for data frames");
  781. goto free;
  782. }
  783. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  784. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  785. "Invalid nbuf length");
  786. goto free;
  787. }
  788. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  789. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  790. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  791. "PDEV %s", !pdev ? "not found" : "down");
  792. goto free;
  793. }
  794. if (pdev->filter_neighbour_peers) {
  795. /* Next Hop scenario not yet handle */
  796. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  797. if (vdev) {
  798. dp_rx_mon_deliver(soc, pdev->pdev_id,
  799. pdev->invalid_peer_head_msdu,
  800. pdev->invalid_peer_tail_msdu);
  801. pdev->invalid_peer_head_msdu = NULL;
  802. pdev->invalid_peer_tail_msdu = NULL;
  803. return 0;
  804. }
  805. }
  806. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  807. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  808. QDF_MAC_ADDR_SIZE) == 0) {
  809. goto out;
  810. }
  811. }
  812. if (!vdev) {
  813. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  814. "VDEV not found");
  815. goto free;
  816. }
  817. out:
  818. msg.wh = wh;
  819. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  820. msg.nbuf = mpdu;
  821. msg.vdev_id = vdev->vdev_id;
  822. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  823. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  824. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  825. pdev->pdev_id, &msg);
  826. free:
  827. /* Drop and free packet */
  828. curr_nbuf = mpdu;
  829. while (curr_nbuf) {
  830. next_nbuf = qdf_nbuf_next(curr_nbuf);
  831. qdf_nbuf_free(curr_nbuf);
  832. curr_nbuf = next_nbuf;
  833. }
  834. return 0;
  835. }
  836. /**
  837. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  838. * @soc: DP SOC handle
  839. * @mpdu: mpdu for which peer is invalid
  840. * @mpdu_done: if an mpdu is completed
  841. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  842. * pool_id has same mapping)
  843. *
  844. * return: integer type
  845. */
  846. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  847. qdf_nbuf_t mpdu, bool mpdu_done,
  848. uint8_t mac_id)
  849. {
  850. /* Only trigger the process when mpdu is completed */
  851. if (mpdu_done)
  852. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  853. }
  854. #else
  855. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  856. uint8_t mac_id)
  857. {
  858. qdf_nbuf_t curr_nbuf, next_nbuf;
  859. struct dp_pdev *pdev;
  860. struct dp_vdev *vdev = NULL;
  861. struct ieee80211_frame *wh;
  862. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  863. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  864. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  865. if (!DP_FRAME_IS_DATA(wh)) {
  866. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  867. "only for data frames");
  868. goto free;
  869. }
  870. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  871. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  872. "Invalid nbuf length");
  873. goto free;
  874. }
  875. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  876. if (!pdev) {
  877. QDF_TRACE(QDF_MODULE_ID_DP,
  878. QDF_TRACE_LEVEL_ERROR,
  879. "PDEV not found");
  880. goto free;
  881. }
  882. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  883. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  884. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  885. QDF_MAC_ADDR_SIZE) == 0) {
  886. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  887. goto out;
  888. }
  889. }
  890. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  891. if (!vdev) {
  892. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  893. "VDEV not found");
  894. goto free;
  895. }
  896. out:
  897. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  898. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  899. free:
  900. /* reset the head and tail pointers */
  901. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  902. if (pdev) {
  903. pdev->invalid_peer_head_msdu = NULL;
  904. pdev->invalid_peer_tail_msdu = NULL;
  905. }
  906. /* Drop and free packet */
  907. curr_nbuf = mpdu;
  908. while (curr_nbuf) {
  909. next_nbuf = qdf_nbuf_next(curr_nbuf);
  910. qdf_nbuf_free(curr_nbuf);
  911. curr_nbuf = next_nbuf;
  912. }
  913. /* Reset the head and tail pointers */
  914. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  915. if (pdev) {
  916. pdev->invalid_peer_head_msdu = NULL;
  917. pdev->invalid_peer_tail_msdu = NULL;
  918. }
  919. return 0;
  920. }
  921. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  922. qdf_nbuf_t mpdu, bool mpdu_done,
  923. uint8_t mac_id)
  924. {
  925. /* Process the nbuf */
  926. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  927. }
  928. #endif
  929. #ifdef RECEIVE_OFFLOAD
  930. /**
  931. * dp_rx_print_offload_info() - Print offload info from RX TLV
  932. * @soc: dp soc handle
  933. * @rx_tlv: RX TLV for which offload information is to be printed
  934. *
  935. * Return: None
  936. */
  937. static void dp_rx_print_offload_info(struct dp_soc *soc, uint8_t *rx_tlv)
  938. {
  939. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  940. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  941. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  942. dp_verbose_debug("chksum 0x%x", hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  943. rx_tlv));
  944. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  945. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  946. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  947. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  948. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  949. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  950. dp_verbose_debug("---------------------------------------------------------");
  951. }
  952. /**
  953. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  954. * @soc: DP SOC handle
  955. * @rx_tlv: RX TLV received for the msdu
  956. * @msdu: msdu for which GRO info needs to be filled
  957. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  958. *
  959. * Return: None
  960. */
  961. static
  962. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  963. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  964. {
  965. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  966. return;
  967. /* Filling up RX offload info only for TCP packets */
  968. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  969. return;
  970. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  971. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  972. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  973. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  974. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  975. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  976. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  977. rx_tlv);
  978. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  979. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  980. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  981. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  982. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  983. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  984. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  985. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  986. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  987. HAL_RX_TLV_GET_IPV6(rx_tlv);
  988. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  989. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  990. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  991. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  992. dp_rx_print_offload_info(soc, rx_tlv);
  993. }
  994. #else
  995. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  996. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  997. {
  998. }
  999. #endif /* RECEIVE_OFFLOAD */
  1000. /**
  1001. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1002. *
  1003. * @nbuf: pointer to msdu.
  1004. * @mpdu_len: mpdu length
  1005. *
  1006. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  1007. */
  1008. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  1009. {
  1010. bool last_nbuf;
  1011. if (*mpdu_len > (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  1012. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1013. last_nbuf = false;
  1014. } else {
  1015. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  1016. last_nbuf = true;
  1017. }
  1018. *mpdu_len -= (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  1019. return last_nbuf;
  1020. }
  1021. /**
  1022. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  1023. * multiple nbufs.
  1024. * @soc: DP SOC handle
  1025. * @nbuf: pointer to the first msdu of an amsdu.
  1026. *
  1027. * This function implements the creation of RX frag_list for cases
  1028. * where an MSDU is spread across multiple nbufs.
  1029. *
  1030. * Return: returns the head nbuf which contains complete frag_list.
  1031. */
  1032. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1033. {
  1034. qdf_nbuf_t parent, frag_list, next = NULL;
  1035. uint16_t frag_list_len = 0;
  1036. uint16_t mpdu_len;
  1037. bool last_nbuf;
  1038. /*
  1039. * Use msdu len got from REO entry descriptor instead since
  1040. * there is case the RX PKT TLV is corrupted while msdu_len
  1041. * from REO descriptor is right for non-raw RX scatter msdu.
  1042. */
  1043. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1044. /*
  1045. * this is a case where the complete msdu fits in one single nbuf.
  1046. * in this case HW sets both start and end bit and we only need to
  1047. * reset these bits for RAW mode simulator to decap the pkt
  1048. */
  1049. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1050. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1051. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  1052. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1053. return nbuf;
  1054. }
  1055. /*
  1056. * This is a case where we have multiple msdus (A-MSDU) spread across
  1057. * multiple nbufs. here we create a fraglist out of these nbufs.
  1058. *
  1059. * the moment we encounter a nbuf with continuation bit set we
  1060. * know for sure we have an MSDU which is spread across multiple
  1061. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1062. */
  1063. parent = nbuf;
  1064. frag_list = nbuf->next;
  1065. nbuf = nbuf->next;
  1066. /*
  1067. * set the start bit in the first nbuf we encounter with continuation
  1068. * bit set. This has the proper mpdu length set as it is the first
  1069. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1070. * nbufs will form the frag_list of the parent nbuf.
  1071. */
  1072. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1073. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  1074. /*
  1075. * HW issue: MSDU cont bit is set but reported MPDU length can fit
  1076. * in to single buffer
  1077. *
  1078. * Increment error stats and avoid SG list creation
  1079. */
  1080. if (last_nbuf) {
  1081. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1082. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  1083. return parent;
  1084. }
  1085. /*
  1086. * this is where we set the length of the fragments which are
  1087. * associated to the parent nbuf. We iterate through the frag_list
  1088. * till we hit the last_nbuf of the list.
  1089. */
  1090. do {
  1091. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  1092. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1093. frag_list_len += qdf_nbuf_len(nbuf);
  1094. if (last_nbuf) {
  1095. next = nbuf->next;
  1096. nbuf->next = NULL;
  1097. break;
  1098. }
  1099. nbuf = nbuf->next;
  1100. } while (!last_nbuf);
  1101. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1102. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1103. parent->next = next;
  1104. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  1105. return parent;
  1106. }
  1107. #ifdef QCA_PEER_EXT_STATS
  1108. /*
  1109. * dp_rx_compute_tid_delay - Computer per TID delay stats
  1110. * @peer: DP soc context
  1111. * @nbuf: NBuffer
  1112. *
  1113. * Return: Void
  1114. */
  1115. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1116. qdf_nbuf_t nbuf)
  1117. {
  1118. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1119. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1120. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1121. }
  1122. #endif /* QCA_PEER_EXT_STATS */
  1123. /**
  1124. * dp_rx_compute_delay() - Compute and fill in all timestamps
  1125. * to pass in correct fields
  1126. *
  1127. * @vdev: pdev handle
  1128. * @tx_desc: tx descriptor
  1129. * @tid: tid value
  1130. * Return: none
  1131. */
  1132. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1133. {
  1134. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1135. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1136. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1137. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1138. uint32_t interframe_delay =
  1139. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1140. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  1141. CDP_DELAY_STATS_REAP_STACK, ring_id);
  1142. /*
  1143. * Update interframe delay stats calculated at deliver_data_ol point.
  1144. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1145. * interframe delay will not be calculate correctly for 1st frame.
  1146. * On the other side, this will help in avoiding extra per packet check
  1147. * of vdev->prev_rx_deliver_tstamp.
  1148. */
  1149. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  1150. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  1151. vdev->prev_rx_deliver_tstamp = current_ts;
  1152. }
  1153. /**
  1154. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1155. * @pdev: dp pdev reference
  1156. * @buf_list: buffer list to be dropepd
  1157. *
  1158. * Return: int (number of bufs dropped)
  1159. */
  1160. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1161. qdf_nbuf_t buf_list)
  1162. {
  1163. struct cdp_tid_rx_stats *stats = NULL;
  1164. uint8_t tid = 0, ring_id = 0;
  1165. int num_dropped = 0;
  1166. qdf_nbuf_t buf, next_buf;
  1167. buf = buf_list;
  1168. while (buf) {
  1169. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1170. next_buf = qdf_nbuf_queue_next(buf);
  1171. tid = qdf_nbuf_get_tid_val(buf);
  1172. if (qdf_likely(pdev)) {
  1173. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1174. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1175. stats->delivered_to_stack--;
  1176. }
  1177. qdf_nbuf_free(buf);
  1178. buf = next_buf;
  1179. num_dropped++;
  1180. }
  1181. return num_dropped;
  1182. }
  1183. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1184. /**
  1185. * dp_rx_wds_ext() - Make different lists for 4-address and 3-address frames
  1186. * @nbuf_head: skb list head
  1187. * @vdev: vdev
  1188. * @peer: peer
  1189. * @peer_id: peer id of new received frame
  1190. * @vdev_id: vdev_id of new received frame
  1191. *
  1192. * Return: true if peer_ids are different.
  1193. */
  1194. static inline bool
  1195. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1196. struct dp_vdev *vdev,
  1197. struct dp_peer *peer,
  1198. uint16_t peer_id,
  1199. uint8_t vdev_id)
  1200. {
  1201. if (nbuf_head && peer && (peer->peer_id != peer_id))
  1202. return true;
  1203. return false;
  1204. }
  1205. /**
  1206. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1207. * @soc: core txrx main context
  1208. * @vdev: vdev
  1209. * @peer: peer
  1210. * @nbuf_head: skb list head
  1211. *
  1212. * Return: true if packet is delivered to netdev per STA.
  1213. */
  1214. static inline bool
  1215. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1216. struct dp_peer *peer, qdf_nbuf_t nbuf_head)
  1217. {
  1218. /*
  1219. * When extended WDS is disabled, frames are sent to AP netdevice.
  1220. */
  1221. if (qdf_likely(!vdev->wds_ext_enabled))
  1222. return false;
  1223. /*
  1224. * There can be 2 cases:
  1225. * 1. Send frame to parent netdev if its not for netdev per STA
  1226. * 2. If frame is meant for netdev per STA:
  1227. * a. Send frame to appropriate netdev using registered fp.
  1228. * b. If fp is NULL, drop the frames.
  1229. */
  1230. if (!peer->wds_ext.init)
  1231. return false;
  1232. if (peer->osif_rx)
  1233. peer->osif_rx(peer->wds_ext.osif_peer, nbuf_head);
  1234. else
  1235. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1236. return true;
  1237. }
  1238. #else
  1239. static inline bool
  1240. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1241. struct dp_vdev *vdev,
  1242. struct dp_peer *peer,
  1243. uint16_t peer_id,
  1244. uint8_t vdev_id)
  1245. {
  1246. if (nbuf_head && vdev && (vdev->vdev_id != vdev_id))
  1247. return true;
  1248. return false;
  1249. }
  1250. static inline bool
  1251. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1252. struct dp_peer *peer, qdf_nbuf_t nbuf_head)
  1253. {
  1254. return false;
  1255. }
  1256. #endif
  1257. #ifdef PEER_CACHE_RX_PKTS
  1258. /**
  1259. * dp_rx_flush_rx_cached() - flush cached rx frames
  1260. * @peer: peer
  1261. * @drop: flag to drop frames or forward to net stack
  1262. *
  1263. * Return: None
  1264. */
  1265. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1266. {
  1267. struct dp_peer_cached_bufq *bufqi;
  1268. struct dp_rx_cached_buf *cache_buf = NULL;
  1269. ol_txrx_rx_fp data_rx = NULL;
  1270. int num_buff_elem;
  1271. QDF_STATUS status;
  1272. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1273. qdf_atomic_dec(&peer->flush_in_progress);
  1274. return;
  1275. }
  1276. qdf_spin_lock_bh(&peer->peer_info_lock);
  1277. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1278. data_rx = peer->vdev->osif_rx;
  1279. else
  1280. drop = true;
  1281. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1282. bufqi = &peer->bufq_info;
  1283. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1284. qdf_list_remove_front(&bufqi->cached_bufq,
  1285. (qdf_list_node_t **)&cache_buf);
  1286. while (cache_buf) {
  1287. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1288. cache_buf->buf);
  1289. bufqi->entries -= num_buff_elem;
  1290. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1291. if (drop) {
  1292. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1293. cache_buf->buf);
  1294. } else {
  1295. /* Flush the cached frames to OSIF DEV */
  1296. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1297. if (status != QDF_STATUS_SUCCESS)
  1298. bufqi->dropped = dp_rx_drop_nbuf_list(
  1299. peer->vdev->pdev,
  1300. cache_buf->buf);
  1301. }
  1302. qdf_mem_free(cache_buf);
  1303. cache_buf = NULL;
  1304. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1305. qdf_list_remove_front(&bufqi->cached_bufq,
  1306. (qdf_list_node_t **)&cache_buf);
  1307. }
  1308. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1309. qdf_atomic_dec(&peer->flush_in_progress);
  1310. }
  1311. /**
  1312. * dp_rx_enqueue_rx() - cache rx frames
  1313. * @peer: peer
  1314. * @rx_buf_list: cache buffer list
  1315. *
  1316. * Return: None
  1317. */
  1318. static QDF_STATUS
  1319. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1320. {
  1321. struct dp_rx_cached_buf *cache_buf;
  1322. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1323. int num_buff_elem;
  1324. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1325. bufqi->dropped);
  1326. if (!peer->valid) {
  1327. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1328. rx_buf_list);
  1329. return QDF_STATUS_E_INVAL;
  1330. }
  1331. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1332. if (bufqi->entries >= bufqi->thresh) {
  1333. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1334. rx_buf_list);
  1335. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1336. return QDF_STATUS_E_RESOURCES;
  1337. }
  1338. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1339. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1340. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1341. if (!cache_buf) {
  1342. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1343. "Failed to allocate buf to cache rx frames");
  1344. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1345. rx_buf_list);
  1346. return QDF_STATUS_E_NOMEM;
  1347. }
  1348. cache_buf->buf = rx_buf_list;
  1349. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1350. qdf_list_insert_back(&bufqi->cached_bufq,
  1351. &cache_buf->node);
  1352. bufqi->entries += num_buff_elem;
  1353. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1354. return QDF_STATUS_SUCCESS;
  1355. }
  1356. static inline
  1357. bool dp_rx_is_peer_cache_bufq_supported(void)
  1358. {
  1359. return true;
  1360. }
  1361. #else
  1362. static inline
  1363. bool dp_rx_is_peer_cache_bufq_supported(void)
  1364. {
  1365. return false;
  1366. }
  1367. static inline QDF_STATUS
  1368. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1369. {
  1370. return QDF_STATUS_SUCCESS;
  1371. }
  1372. #endif
  1373. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1374. /**
  1375. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1376. * using the appropriate call back functions.
  1377. * @soc: soc
  1378. * @vdev: vdev
  1379. * @peer: peer
  1380. * @nbuf_head: skb list head
  1381. * @nbuf_tail: skb list tail
  1382. *
  1383. * Return: None
  1384. */
  1385. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1386. struct dp_vdev *vdev,
  1387. struct dp_peer *peer,
  1388. qdf_nbuf_t nbuf_head)
  1389. {
  1390. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1391. peer, nbuf_head)))
  1392. return;
  1393. /* Function pointer initialized only when FISA is enabled */
  1394. if (vdev->osif_fisa_rx)
  1395. /* on failure send it via regular path */
  1396. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1397. else
  1398. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1399. }
  1400. #else
  1401. /**
  1402. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1403. * using the appropriate call back functions.
  1404. * @soc: soc
  1405. * @vdev: vdev
  1406. * @peer: peer
  1407. * @nbuf_head: skb list head
  1408. * @nbuf_tail: skb list tail
  1409. *
  1410. * Check the return status of the call back function and drop
  1411. * the packets if the return status indicates a failure.
  1412. *
  1413. * Return: None
  1414. */
  1415. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1416. struct dp_vdev *vdev,
  1417. struct dp_peer *peer,
  1418. qdf_nbuf_t nbuf_head)
  1419. {
  1420. int num_nbuf = 0;
  1421. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1422. /* Function pointer initialized only when FISA is enabled */
  1423. if (vdev->osif_fisa_rx)
  1424. /* on failure send it via regular path */
  1425. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1426. else if (vdev->osif_rx)
  1427. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1428. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1429. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1430. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1431. if (peer)
  1432. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1433. }
  1434. }
  1435. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1436. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1437. struct dp_vdev *vdev,
  1438. struct dp_peer *peer,
  1439. qdf_nbuf_t nbuf_head,
  1440. qdf_nbuf_t nbuf_tail)
  1441. {
  1442. int num_nbuf = 0;
  1443. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1444. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1445. /*
  1446. * This is a special case where vdev is invalid,
  1447. * so we cannot know the pdev to which this packet
  1448. * belonged. Hence we update the soc rx error stats.
  1449. */
  1450. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1451. return;
  1452. }
  1453. /*
  1454. * highly unlikely to have a vdev without a registered rx
  1455. * callback function. if so let us free the nbuf_list.
  1456. */
  1457. if (qdf_unlikely(!vdev->osif_rx)) {
  1458. if (peer && dp_rx_is_peer_cache_bufq_supported()) {
  1459. dp_rx_enqueue_rx(peer, nbuf_head);
  1460. } else {
  1461. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1462. nbuf_head);
  1463. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1464. }
  1465. return;
  1466. }
  1467. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1468. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1469. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1470. &nbuf_tail, peer->mac_addr.raw);
  1471. }
  1472. dp_rx_check_delivery_to_stack(soc, vdev, peer, nbuf_head);
  1473. }
  1474. /**
  1475. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1476. * @nbuf: pointer to the first msdu of an amsdu.
  1477. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1478. *
  1479. * The ipsumed field of the skb is set based on whether HW validated the
  1480. * IP/TCP/UDP checksum.
  1481. *
  1482. * Return: void
  1483. */
  1484. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1485. qdf_nbuf_t nbuf,
  1486. uint8_t *rx_tlv_hdr)
  1487. {
  1488. qdf_nbuf_rx_cksum_t cksum = {0};
  1489. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1490. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1491. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1492. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1493. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1494. } else {
  1495. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1496. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1497. }
  1498. }
  1499. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1500. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer) \
  1501. { \
  1502. qdf_nbuf_t nbuf_local; \
  1503. struct dp_peer *peer_local; \
  1504. struct dp_vdev *vdev_local = vdev_hdl; \
  1505. do { \
  1506. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1507. break; \
  1508. nbuf_local = nbuf; \
  1509. peer_local = peer; \
  1510. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1511. break; \
  1512. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1513. break; \
  1514. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1515. (nbuf_local), \
  1516. (peer_local), 0, 1); \
  1517. } while (0); \
  1518. }
  1519. #else
  1520. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer)
  1521. #endif
  1522. /**
  1523. * dp_rx_msdu_stats_update() - update per msdu stats.
  1524. * @soc: core txrx main context
  1525. * @nbuf: pointer to the first msdu of an amsdu.
  1526. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1527. * @peer: pointer to the peer object.
  1528. * @ring_id: reo dest ring number on which pkt is reaped.
  1529. * @tid_stats: per tid rx stats.
  1530. *
  1531. * update all the per msdu stats for that nbuf.
  1532. * Return: void
  1533. */
  1534. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1535. qdf_nbuf_t nbuf,
  1536. uint8_t *rx_tlv_hdr,
  1537. struct dp_peer *peer,
  1538. uint8_t ring_id,
  1539. struct cdp_tid_rx_stats *tid_stats)
  1540. {
  1541. bool is_ampdu, is_not_amsdu;
  1542. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1543. struct dp_vdev *vdev = peer->vdev;
  1544. qdf_ether_header_t *eh;
  1545. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1546. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, peer);
  1547. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1548. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1549. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1550. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1551. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1552. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1553. tid_stats->msdu_cnt++;
  1554. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1555. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1556. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1557. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1558. tid_stats->mcast_msdu_cnt++;
  1559. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1560. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1561. tid_stats->bcast_msdu_cnt++;
  1562. }
  1563. }
  1564. /*
  1565. * currently we can return from here as we have similar stats
  1566. * updated at per ppdu level instead of msdu level
  1567. */
  1568. if (!soc->process_rx_status)
  1569. return;
  1570. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1571. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1572. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1573. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1574. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1575. tid = qdf_nbuf_get_tid_val(nbuf);
  1576. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1577. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1578. rx_tlv_hdr);
  1579. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1580. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1581. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[mcs], 1,
  1582. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1583. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  1584. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1585. DP_STATS_INC(peer, rx.bw[bw], 1);
  1586. /*
  1587. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1588. * then increase index [nss - 1] in array counter.
  1589. */
  1590. if (nss > 0 && (pkt_type == DOT11_N ||
  1591. pkt_type == DOT11_AC ||
  1592. pkt_type == DOT11_AX))
  1593. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1594. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1595. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1596. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1597. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1598. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1599. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1600. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1601. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1602. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1603. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1604. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1605. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1606. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1607. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1608. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1609. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1610. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1611. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1612. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1613. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1614. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1615. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1616. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1617. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1618. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1619. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1620. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1621. if ((soc->process_rx_status) &&
  1622. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1623. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1624. if (!vdev->pdev)
  1625. return;
  1626. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1627. &peer->stats, peer->peer_id,
  1628. UPDATE_PEER_STATS,
  1629. vdev->pdev->pdev_id);
  1630. #endif
  1631. }
  1632. }
  1633. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1634. uint8_t *rx_tlv_hdr,
  1635. qdf_nbuf_t nbuf,
  1636. struct hal_rx_msdu_metadata msdu_info)
  1637. {
  1638. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1639. (msdu_info.sa_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1640. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1641. qdf_nbuf_is_da_valid(nbuf) &&
  1642. (msdu_info.da_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1643. return false;
  1644. return true;
  1645. }
  1646. #ifndef WDS_VENDOR_EXTENSION
  1647. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1648. struct dp_vdev *vdev,
  1649. struct dp_peer *peer)
  1650. {
  1651. return 1;
  1652. }
  1653. #endif
  1654. #ifdef RX_DESC_DEBUG_CHECK
  1655. /**
  1656. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1657. * corruption
  1658. *
  1659. * @ring_desc: REO ring descriptor
  1660. * @rx_desc: Rx descriptor
  1661. *
  1662. * Return: NONE
  1663. */
  1664. static inline
  1665. QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1666. struct dp_rx_desc *rx_desc)
  1667. {
  1668. struct hal_buf_info hbi;
  1669. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1670. /* Sanity check for possible buffer paddr corruption */
  1671. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  1672. return QDF_STATUS_SUCCESS;
  1673. return QDF_STATUS_E_FAILURE;
  1674. }
  1675. #else
  1676. static inline
  1677. QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1678. struct dp_rx_desc *rx_desc)
  1679. {
  1680. return QDF_STATUS_SUCCESS;
  1681. }
  1682. #endif
  1683. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1684. static inline
  1685. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1686. {
  1687. bool limit_hit = false;
  1688. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1689. limit_hit =
  1690. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1691. if (limit_hit)
  1692. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1693. return limit_hit;
  1694. }
  1695. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1696. {
  1697. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1698. }
  1699. #else
  1700. static inline
  1701. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1702. {
  1703. return false;
  1704. }
  1705. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1706. {
  1707. return false;
  1708. }
  1709. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1710. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1711. /**
  1712. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1713. * no corresbonding peer found
  1714. * @soc: core txrx main context
  1715. * @nbuf: pkt skb pointer
  1716. *
  1717. * This function will try to deliver some RX special frames to stack
  1718. * even there is no peer matched found. for instance, LFR case, some
  1719. * eapol data will be sent to host before peer_map done.
  1720. *
  1721. * Return: None
  1722. */
  1723. static
  1724. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1725. {
  1726. uint16_t peer_id;
  1727. uint8_t vdev_id;
  1728. struct dp_vdev *vdev = NULL;
  1729. uint32_t l2_hdr_offset = 0;
  1730. uint16_t msdu_len = 0;
  1731. uint32_t pkt_len = 0;
  1732. uint8_t *rx_tlv_hdr;
  1733. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  1734. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  1735. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1736. if (peer_id > soc->max_peers)
  1737. goto deliver_fail;
  1738. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1739. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  1740. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  1741. goto deliver_fail;
  1742. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  1743. goto deliver_fail;
  1744. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1745. l2_hdr_offset =
  1746. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1747. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1748. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1749. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  1750. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1751. qdf_nbuf_pull_head(nbuf,
  1752. RX_PKT_TLVS_LEN +
  1753. l2_hdr_offset);
  1754. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  1755. qdf_nbuf_set_exc_frame(nbuf, 1);
  1756. if (QDF_STATUS_SUCCESS !=
  1757. vdev->osif_rx(vdev->osif_vdev, nbuf))
  1758. goto deliver_fail;
  1759. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1760. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  1761. return;
  1762. }
  1763. deliver_fail:
  1764. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1765. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1766. qdf_nbuf_free(nbuf);
  1767. if (vdev)
  1768. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  1769. }
  1770. #else
  1771. static inline
  1772. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1773. {
  1774. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1775. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1776. qdf_nbuf_free(nbuf);
  1777. }
  1778. #endif
  1779. /**
  1780. * dp_rx_srng_get_num_pending() - get number of pending entries
  1781. * @hal_soc: hal soc opaque pointer
  1782. * @hal_ring: opaque pointer to the HAL Rx Ring
  1783. * @num_entries: number of entries in the hal_ring.
  1784. * @near_full: pointer to a boolean. This is set if ring is near full.
  1785. *
  1786. * The function returns the number of entries in a destination ring which are
  1787. * yet to be reaped. The function also checks if the ring is near full.
  1788. * If more than half of the ring needs to be reaped, the ring is considered
  1789. * approaching full.
  1790. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1791. * entries. It should not be called within a SRNG lock. HW pointer value is
  1792. * synced into cached_hp.
  1793. *
  1794. * Return: Number of pending entries if any
  1795. */
  1796. static
  1797. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1798. hal_ring_handle_t hal_ring_hdl,
  1799. uint32_t num_entries,
  1800. bool *near_full)
  1801. {
  1802. uint32_t num_pending = 0;
  1803. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1804. hal_ring_hdl,
  1805. true);
  1806. if (num_entries && (num_pending >= num_entries >> 1))
  1807. *near_full = true;
  1808. else
  1809. *near_full = false;
  1810. return num_pending;
  1811. }
  1812. #ifdef WLAN_SUPPORT_RX_FISA
  1813. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1814. {
  1815. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1816. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1817. }
  1818. /**
  1819. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  1820. * @nbuf: pkt skb pointer
  1821. * @l3_padding: l3 padding
  1822. *
  1823. * Return: None
  1824. */
  1825. static inline
  1826. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1827. {
  1828. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1829. }
  1830. #else
  1831. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1832. {
  1833. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1834. }
  1835. static inline
  1836. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1837. {
  1838. }
  1839. #endif
  1840. #ifdef DP_RX_DROP_RAW_FRM
  1841. /**
  1842. * dp_rx_is_raw_frame_dropped() - if raw frame nbuf, free and drop
  1843. * @nbuf: pkt skb pointer
  1844. *
  1845. * Return: true - raw frame, dropped
  1846. * false - not raw frame, do nothing
  1847. */
  1848. static inline
  1849. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1850. {
  1851. if (qdf_nbuf_is_raw_frame(nbuf)) {
  1852. qdf_nbuf_free(nbuf);
  1853. return true;
  1854. }
  1855. return false;
  1856. }
  1857. #else
  1858. static inline
  1859. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1860. {
  1861. return false;
  1862. }
  1863. #endif
  1864. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1865. /**
  1866. * dp_rx_ring_record_entry() - Record an entry into the rx ring history.
  1867. * @soc: Datapath soc structure
  1868. * @ring_num: REO ring number
  1869. * @ring_desc: REO ring descriptor
  1870. *
  1871. * Returns: None
  1872. */
  1873. static inline void
  1874. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1875. hal_ring_desc_t ring_desc)
  1876. {
  1877. struct dp_buf_info_record *record;
  1878. uint8_t rbm;
  1879. struct hal_buf_info hbi;
  1880. uint32_t idx;
  1881. if (qdf_unlikely(!&soc->rx_ring_history[ring_num]))
  1882. return;
  1883. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1884. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  1885. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  1886. DP_RX_HIST_MAX);
  1887. /* No NULL check needed for record since its an array */
  1888. record = &soc->rx_ring_history[ring_num]->entry[idx];
  1889. record->timestamp = qdf_get_log_timestamp();
  1890. record->hbi.paddr = hbi.paddr;
  1891. record->hbi.sw_cookie = hbi.sw_cookie;
  1892. record->hbi.rbm = rbm;
  1893. }
  1894. #else
  1895. static inline void
  1896. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1897. hal_ring_desc_t ring_desc)
  1898. {
  1899. }
  1900. #endif
  1901. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1902. /**
  1903. * dp_rx_update_stats() - Update soc level rx packet count
  1904. * @soc: DP soc handle
  1905. * @nbuf: nbuf received
  1906. *
  1907. * Returns: none
  1908. */
  1909. static inline void dp_rx_update_stats(struct dp_soc *soc,
  1910. qdf_nbuf_t nbuf)
  1911. {
  1912. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  1913. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1914. }
  1915. #else
  1916. static inline void dp_rx_update_stats(struct dp_soc *soc,
  1917. qdf_nbuf_t nbuf)
  1918. {
  1919. }
  1920. #endif
  1921. /**
  1922. * dp_rx_process() - Brain of the Rx processing functionality
  1923. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1924. * @int_ctx: per interrupt context
  1925. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1926. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1927. * @quota: No. of units (packets) that can be serviced in one shot.
  1928. *
  1929. * This function implements the core of Rx functionality. This is
  1930. * expected to handle only non-error frames.
  1931. *
  1932. * Return: uint32_t: No. of elements processed
  1933. */
  1934. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1935. uint8_t reo_ring_num, uint32_t quota)
  1936. {
  1937. hal_ring_desc_t ring_desc;
  1938. hal_soc_handle_t hal_soc;
  1939. struct dp_rx_desc *rx_desc = NULL;
  1940. qdf_nbuf_t nbuf, next;
  1941. bool near_full;
  1942. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1943. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1944. uint32_t num_pending;
  1945. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1946. uint16_t msdu_len = 0;
  1947. uint16_t peer_id;
  1948. uint8_t vdev_id;
  1949. struct dp_peer *peer;
  1950. struct dp_vdev *vdev;
  1951. uint32_t pkt_len = 0;
  1952. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1953. struct hal_rx_msdu_desc_info msdu_desc_info;
  1954. enum hal_reo_error_status error;
  1955. uint32_t peer_mdata;
  1956. uint8_t *rx_tlv_hdr;
  1957. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1958. uint8_t mac_id = 0;
  1959. struct dp_pdev *rx_pdev;
  1960. struct dp_srng *dp_rxdma_srng;
  1961. struct rx_desc_pool *rx_desc_pool;
  1962. struct dp_soc *soc = int_ctx->soc;
  1963. uint8_t ring_id = 0;
  1964. uint8_t core_id = 0;
  1965. struct cdp_tid_rx_stats *tid_stats;
  1966. qdf_nbuf_t nbuf_head;
  1967. qdf_nbuf_t nbuf_tail;
  1968. qdf_nbuf_t deliver_list_head;
  1969. qdf_nbuf_t deliver_list_tail;
  1970. uint32_t num_rx_bufs_reaped = 0;
  1971. uint32_t intr_id;
  1972. struct hif_opaque_softc *scn;
  1973. int32_t tid = 0;
  1974. bool is_prev_msdu_last = true;
  1975. uint32_t num_entries_avail = 0;
  1976. uint32_t rx_ol_pkt_cnt = 0;
  1977. uint32_t num_entries = 0;
  1978. struct hal_rx_msdu_metadata msdu_metadata;
  1979. QDF_STATUS status;
  1980. qdf_nbuf_t ebuf_head;
  1981. qdf_nbuf_t ebuf_tail;
  1982. DP_HIST_INIT();
  1983. qdf_assert_always(soc && hal_ring_hdl);
  1984. hal_soc = soc->hal_soc;
  1985. qdf_assert_always(hal_soc);
  1986. scn = soc->hif_handle;
  1987. hif_pm_runtime_mark_dp_rx_busy(scn);
  1988. intr_id = int_ctx->dp_intr_id;
  1989. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  1990. more_data:
  1991. /* reset local variables here to be re-used in the function */
  1992. nbuf_head = NULL;
  1993. nbuf_tail = NULL;
  1994. deliver_list_head = NULL;
  1995. deliver_list_tail = NULL;
  1996. peer = NULL;
  1997. vdev = NULL;
  1998. num_rx_bufs_reaped = 0;
  1999. ebuf_head = NULL;
  2000. ebuf_tail = NULL;
  2001. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  2002. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  2003. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  2004. qdf_mem_zero(head, sizeof(head));
  2005. qdf_mem_zero(tail, sizeof(tail));
  2006. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  2007. /*
  2008. * Need API to convert from hal_ring pointer to
  2009. * Ring Type / Ring Id combo
  2010. */
  2011. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  2012. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2013. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  2014. goto done;
  2015. }
  2016. /*
  2017. * start reaping the buffers from reo ring and queue
  2018. * them in per vdev queue.
  2019. * Process the received pkts in a different per vdev loop.
  2020. */
  2021. while (qdf_likely(quota &&
  2022. (ring_desc = hal_srng_dst_peek(hal_soc,
  2023. hal_ring_hdl)))) {
  2024. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  2025. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  2026. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  2027. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2028. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  2029. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  2030. /* Don't know how to deal with this -- assert */
  2031. qdf_assert(0);
  2032. }
  2033. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  2034. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  2035. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  2036. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  2037. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  2038. break;
  2039. }
  2040. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  2041. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  2042. ring_desc, rx_desc);
  2043. if (QDF_IS_STATUS_ERROR(status)) {
  2044. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  2045. qdf_assert_always(rx_desc->unmapped);
  2046. dp_ipa_handle_rx_buf_smmu_mapping(
  2047. soc,
  2048. rx_desc->nbuf,
  2049. RX_DATA_BUFFER_SIZE,
  2050. false);
  2051. qdf_nbuf_unmap_nbytes_single(
  2052. soc->osdev,
  2053. rx_desc->nbuf,
  2054. QDF_DMA_FROM_DEVICE,
  2055. RX_DATA_BUFFER_SIZE);
  2056. rx_desc->unmapped = 1;
  2057. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  2058. rx_desc->pool_id);
  2059. dp_rx_add_to_free_desc_list(
  2060. &head[rx_desc->pool_id],
  2061. &tail[rx_desc->pool_id],
  2062. rx_desc);
  2063. }
  2064. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2065. continue;
  2066. }
  2067. /*
  2068. * this is a unlikely scenario where the host is reaping
  2069. * a descriptor which it already reaped just a while ago
  2070. * but is yet to replenish it back to HW.
  2071. * In this case host will dump the last 128 descriptors
  2072. * including the software descriptor rx_desc and assert.
  2073. */
  2074. if (qdf_unlikely(!rx_desc->in_use)) {
  2075. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  2076. dp_info_rl("Reaping rx_desc not in use!");
  2077. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2078. ring_desc, rx_desc);
  2079. /* ignore duplicate RX desc and continue to process */
  2080. /* Pop out the descriptor */
  2081. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2082. continue;
  2083. }
  2084. status = dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  2085. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  2086. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  2087. dp_info_rl("Nbuf sanity check failure!");
  2088. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2089. ring_desc, rx_desc);
  2090. rx_desc->in_err_state = 1;
  2091. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2092. continue;
  2093. }
  2094. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  2095. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  2096. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  2097. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2098. ring_desc, rx_desc);
  2099. }
  2100. /* Get MPDU DESC info */
  2101. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  2102. /* Get MSDU DESC info */
  2103. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  2104. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  2105. HAL_MSDU_F_MSDU_CONTINUATION)) {
  2106. /* previous msdu has end bit set, so current one is
  2107. * the new MPDU
  2108. */
  2109. if (is_prev_msdu_last) {
  2110. /* Get number of entries available in HW ring */
  2111. num_entries_avail =
  2112. hal_srng_dst_num_valid(hal_soc,
  2113. hal_ring_hdl, 1);
  2114. /* For new MPDU check if we can read complete
  2115. * MPDU by comparing the number of buffers
  2116. * available and number of buffers needed to
  2117. * reap this MPDU
  2118. */
  2119. if (((msdu_desc_info.msdu_len /
  2120. (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN) +
  2121. 1)) > num_entries_avail) {
  2122. DP_STATS_INC(
  2123. soc,
  2124. rx.msdu_scatter_wait_break,
  2125. 1);
  2126. break;
  2127. }
  2128. is_prev_msdu_last = false;
  2129. }
  2130. }
  2131. core_id = smp_processor_id();
  2132. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  2133. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  2134. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  2135. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  2136. HAL_MPDU_F_RAW_AMPDU))
  2137. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  2138. if (!is_prev_msdu_last &&
  2139. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  2140. is_prev_msdu_last = true;
  2141. /* Pop out the descriptor*/
  2142. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2143. rx_bufs_reaped[rx_desc->pool_id]++;
  2144. peer_mdata = mpdu_desc_info.peer_meta_data;
  2145. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  2146. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  2147. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  2148. DP_PEER_METADATA_VDEV_ID_GET(peer_mdata);
  2149. /*
  2150. * save msdu flags first, last and continuation msdu in
  2151. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  2152. * length to nbuf->cb. This ensures the info required for
  2153. * per pkt processing is always in the same cache line.
  2154. * This helps in improving throughput for smaller pkt
  2155. * sizes.
  2156. */
  2157. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  2158. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  2159. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  2160. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  2161. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  2162. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  2163. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  2164. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  2165. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  2166. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  2167. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  2168. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  2169. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  2170. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  2171. qdf_nbuf_set_rx_reo_dest_ind(
  2172. rx_desc->nbuf,
  2173. HAL_RX_REO_MSDU_REO_DST_IND_GET(ring_desc));
  2174. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  2175. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  2176. /*
  2177. * move unmap after scattered msdu waiting break logic
  2178. * in case double skb unmap happened.
  2179. */
  2180. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2181. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  2182. rx_desc_pool->buf_size,
  2183. false);
  2184. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  2185. QDF_DMA_FROM_DEVICE,
  2186. rx_desc_pool->buf_size);
  2187. rx_desc->unmapped = 1;
  2188. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  2189. ebuf_tail, rx_desc);
  2190. /*
  2191. * if continuation bit is set then we have MSDU spread
  2192. * across multiple buffers, let us not decrement quota
  2193. * till we reap all buffers of that MSDU.
  2194. */
  2195. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  2196. quota -= 1;
  2197. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  2198. &tail[rx_desc->pool_id],
  2199. rx_desc);
  2200. num_rx_bufs_reaped++;
  2201. /*
  2202. * only if complete msdu is received for scatter case,
  2203. * then allow break.
  2204. */
  2205. if (is_prev_msdu_last &&
  2206. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  2207. break;
  2208. }
  2209. done:
  2210. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2211. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2212. /*
  2213. * continue with next mac_id if no pkts were reaped
  2214. * from that pool
  2215. */
  2216. if (!rx_bufs_reaped[mac_id])
  2217. continue;
  2218. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2219. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2220. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2221. rx_desc_pool, rx_bufs_reaped[mac_id],
  2222. &head[mac_id], &tail[mac_id]);
  2223. }
  2224. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  2225. /* Peer can be NULL is case of LFR */
  2226. if (qdf_likely(peer))
  2227. vdev = NULL;
  2228. /*
  2229. * BIG loop where each nbuf is dequeued from global queue,
  2230. * processed and queued back on a per vdev basis. These nbufs
  2231. * are sent to stack as and when we run out of nbufs
  2232. * or a new nbuf dequeued from global queue has a different
  2233. * vdev when compared to previous nbuf.
  2234. */
  2235. nbuf = nbuf_head;
  2236. while (nbuf) {
  2237. next = nbuf->next;
  2238. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  2239. nbuf = next;
  2240. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  2241. continue;
  2242. }
  2243. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2244. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2245. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2246. if (dp_rx_is_list_ready(deliver_list_head, vdev, peer,
  2247. peer_id, vdev_id)) {
  2248. dp_rx_deliver_to_stack(soc, vdev, peer,
  2249. deliver_list_head,
  2250. deliver_list_tail);
  2251. deliver_list_head = NULL;
  2252. deliver_list_tail = NULL;
  2253. }
  2254. /* Get TID from struct cb->tid_val, save to tid */
  2255. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  2256. tid = qdf_nbuf_get_tid_val(nbuf);
  2257. if (qdf_unlikely(!peer)) {
  2258. peer = dp_peer_get_ref_by_id(soc, peer_id,
  2259. DP_MOD_ID_RX);
  2260. } else if (peer && peer->peer_id != peer_id) {
  2261. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2262. peer = dp_peer_get_ref_by_id(soc, peer_id,
  2263. DP_MOD_ID_RX);
  2264. }
  2265. if (peer) {
  2266. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  2267. qdf_dp_trace_set_track(nbuf, QDF_RX);
  2268. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  2269. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  2270. QDF_NBUF_RX_PKT_DATA_TRACK;
  2271. }
  2272. rx_bufs_used++;
  2273. if (qdf_likely(peer)) {
  2274. vdev = peer->vdev;
  2275. } else {
  2276. nbuf->next = NULL;
  2277. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2278. nbuf = next;
  2279. continue;
  2280. }
  2281. if (qdf_unlikely(!vdev)) {
  2282. qdf_nbuf_free(nbuf);
  2283. nbuf = next;
  2284. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  2285. continue;
  2286. }
  2287. /* when hlos tid override is enabled, save tid in
  2288. * skb->priority
  2289. */
  2290. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  2291. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  2292. qdf_nbuf_set_priority(nbuf, tid);
  2293. rx_pdev = vdev->pdev;
  2294. DP_RX_TID_SAVE(nbuf, tid);
  2295. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  2296. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  2297. soc->wlan_cfg_ctx)))
  2298. qdf_nbuf_set_timestamp(nbuf);
  2299. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  2300. tid_stats =
  2301. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  2302. /*
  2303. * Check if DMA completed -- msdu_done is the last bit
  2304. * to be written
  2305. */
  2306. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  2307. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  2308. dp_err("MSDU DONE failure");
  2309. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  2310. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  2311. QDF_TRACE_LEVEL_INFO);
  2312. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  2313. qdf_nbuf_free(nbuf);
  2314. qdf_assert(0);
  2315. nbuf = next;
  2316. continue;
  2317. }
  2318. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  2319. /*
  2320. * First IF condition:
  2321. * 802.11 Fragmented pkts are reinjected to REO
  2322. * HW block as SG pkts and for these pkts we only
  2323. * need to pull the RX TLVS header length.
  2324. * Second IF condition:
  2325. * The below condition happens when an MSDU is spread
  2326. * across multiple buffers. This can happen in two cases
  2327. * 1. The nbuf size is smaller then the received msdu.
  2328. * ex: we have set the nbuf size to 2048 during
  2329. * nbuf_alloc. but we received an msdu which is
  2330. * 2304 bytes in size then this msdu is spread
  2331. * across 2 nbufs.
  2332. *
  2333. * 2. AMSDUs when RAW mode is enabled.
  2334. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  2335. * across 1st nbuf and 2nd nbuf and last MSDU is
  2336. * spread across 2nd nbuf and 3rd nbuf.
  2337. *
  2338. * for these scenarios let us create a skb frag_list and
  2339. * append these buffers till the last MSDU of the AMSDU
  2340. * Third condition:
  2341. * This is the most likely case, we receive 802.3 pkts
  2342. * decapsulated by HW, here we need to set the pkt length.
  2343. */
  2344. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  2345. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2346. bool is_mcbc, is_sa_vld, is_da_vld;
  2347. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  2348. rx_tlv_hdr);
  2349. is_sa_vld =
  2350. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  2351. rx_tlv_hdr);
  2352. is_da_vld =
  2353. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  2354. rx_tlv_hdr);
  2355. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  2356. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  2357. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  2358. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  2359. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2360. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2361. nbuf = dp_rx_sg_create(soc, nbuf);
  2362. next = nbuf->next;
  2363. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2364. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  2365. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  2366. } else {
  2367. qdf_nbuf_free(nbuf);
  2368. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  2369. dp_info_rl("scatter msdu len %d, dropped",
  2370. msdu_len);
  2371. nbuf = next;
  2372. continue;
  2373. }
  2374. } else {
  2375. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2376. pkt_len = msdu_len +
  2377. msdu_metadata.l3_hdr_pad +
  2378. RX_PKT_TLVS_LEN;
  2379. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2380. dp_rx_skip_tlvs(nbuf, msdu_metadata.l3_hdr_pad);
  2381. }
  2382. /*
  2383. * process frame for mulitpass phrase processing
  2384. */
  2385. if (qdf_unlikely(vdev->multipass_en)) {
  2386. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  2387. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  2388. qdf_nbuf_free(nbuf);
  2389. nbuf = next;
  2390. continue;
  2391. }
  2392. }
  2393. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  2394. QDF_TRACE(QDF_MODULE_ID_DP,
  2395. QDF_TRACE_LEVEL_ERROR,
  2396. FL("Policy Check Drop pkt"));
  2397. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  2398. /* Drop & free packet */
  2399. qdf_nbuf_free(nbuf);
  2400. /* Statistics */
  2401. nbuf = next;
  2402. continue;
  2403. }
  2404. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  2405. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  2406. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  2407. rx_tlv_hdr) ==
  2408. false))) {
  2409. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  2410. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  2411. qdf_nbuf_free(nbuf);
  2412. nbuf = next;
  2413. continue;
  2414. }
  2415. if (soc->process_rx_status)
  2416. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  2417. /* Update the protocol tag in SKB based on CCE metadata */
  2418. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  2419. reo_ring_num, false, true);
  2420. /* Update the flow tag in SKB based on FSE metadata */
  2421. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  2422. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  2423. ring_id, tid_stats);
  2424. if (qdf_unlikely(vdev->mesh_vdev)) {
  2425. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  2426. == QDF_STATUS_SUCCESS) {
  2427. QDF_TRACE(QDF_MODULE_ID_DP,
  2428. QDF_TRACE_LEVEL_INFO_MED,
  2429. FL("mesh pkt filtered"));
  2430. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  2431. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  2432. 1);
  2433. qdf_nbuf_free(nbuf);
  2434. nbuf = next;
  2435. continue;
  2436. }
  2437. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  2438. }
  2439. if (qdf_likely(vdev->rx_decap_type ==
  2440. htt_cmn_pkt_type_ethernet) &&
  2441. qdf_likely(!vdev->mesh_vdev)) {
  2442. /* WDS Destination Address Learning */
  2443. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  2444. /* Due to HW issue, sometimes we see that the sa_idx
  2445. * and da_idx are invalid with sa_valid and da_valid
  2446. * bits set
  2447. *
  2448. * in this case we also see that value of
  2449. * sa_sw_peer_id is set as 0
  2450. *
  2451. * Drop the packet if sa_idx and da_idx OOB or
  2452. * sa_sw_peerid is 0
  2453. */
  2454. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf,
  2455. msdu_metadata)) {
  2456. qdf_nbuf_free(nbuf);
  2457. nbuf = next;
  2458. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  2459. continue;
  2460. }
  2461. /* WDS Source Port Learning */
  2462. if (qdf_likely(vdev->wds_enabled))
  2463. dp_rx_wds_srcport_learn(soc,
  2464. rx_tlv_hdr,
  2465. peer,
  2466. nbuf,
  2467. msdu_metadata);
  2468. /* Intrabss-fwd */
  2469. if (dp_rx_check_ap_bridge(vdev))
  2470. if (dp_rx_intrabss_fwd(soc,
  2471. peer,
  2472. rx_tlv_hdr,
  2473. nbuf,
  2474. msdu_metadata)) {
  2475. nbuf = next;
  2476. tid_stats->intrabss_cnt++;
  2477. continue; /* Get next desc */
  2478. }
  2479. }
  2480. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  2481. dp_rx_update_stats(soc, nbuf);
  2482. DP_RX_LIST_APPEND(deliver_list_head,
  2483. deliver_list_tail,
  2484. nbuf);
  2485. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  2486. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2487. if (qdf_unlikely(peer->in_twt))
  2488. DP_STATS_INC_PKT(peer, rx.to_stack_twt, 1,
  2489. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2490. tid_stats->delivered_to_stack++;
  2491. nbuf = next;
  2492. }
  2493. if (qdf_likely(deliver_list_head)) {
  2494. if (qdf_likely(peer))
  2495. dp_rx_deliver_to_stack(soc, vdev, peer,
  2496. deliver_list_head,
  2497. deliver_list_tail);
  2498. else {
  2499. nbuf = deliver_list_head;
  2500. while (nbuf) {
  2501. next = nbuf->next;
  2502. nbuf->next = NULL;
  2503. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2504. nbuf = next;
  2505. }
  2506. }
  2507. }
  2508. if (qdf_likely(peer))
  2509. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2510. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  2511. if (quota) {
  2512. num_pending =
  2513. dp_rx_srng_get_num_pending(hal_soc,
  2514. hal_ring_hdl,
  2515. num_entries,
  2516. &near_full);
  2517. if (num_pending) {
  2518. DP_STATS_INC(soc, rx.hp_oos2, 1);
  2519. if (!hif_exec_should_yield(scn, intr_id))
  2520. goto more_data;
  2521. if (qdf_unlikely(near_full)) {
  2522. DP_STATS_INC(soc, rx.near_full, 1);
  2523. goto more_data;
  2524. }
  2525. }
  2526. }
  2527. if (vdev && vdev->osif_fisa_flush)
  2528. vdev->osif_fisa_flush(soc, reo_ring_num);
  2529. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  2530. vdev->osif_gro_flush(vdev->osif_vdev,
  2531. reo_ring_num);
  2532. }
  2533. }
  2534. /* Update histogram statistics by looping through pdev's */
  2535. DP_RX_HIST_STATS_PER_PDEV();
  2536. return rx_bufs_used; /* Assume no scale factor for now */
  2537. }
  2538. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2539. {
  2540. QDF_STATUS ret;
  2541. if (vdev->osif_rx_flush) {
  2542. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2543. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2544. dp_err("Failed to flush rx pkts for vdev %d\n",
  2545. vdev->vdev_id);
  2546. return ret;
  2547. }
  2548. }
  2549. return QDF_STATUS_SUCCESS;
  2550. }
  2551. static QDF_STATUS
  2552. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2553. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2554. struct dp_pdev *dp_pdev,
  2555. struct rx_desc_pool *rx_desc_pool)
  2556. {
  2557. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2558. (nbuf_frag_info_t->virt_addr).nbuf =
  2559. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2560. RX_BUFFER_RESERVATION,
  2561. rx_desc_pool->buf_alignment, FALSE);
  2562. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2563. dp_err("nbuf alloc failed");
  2564. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2565. return ret;
  2566. }
  2567. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2568. (nbuf_frag_info_t->virt_addr).nbuf,
  2569. QDF_DMA_FROM_DEVICE,
  2570. rx_desc_pool->buf_size);
  2571. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2572. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2573. dp_err("nbuf map failed");
  2574. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2575. return ret;
  2576. }
  2577. nbuf_frag_info_t->paddr =
  2578. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2579. ret = check_x86_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2580. &nbuf_frag_info_t->paddr,
  2581. rx_desc_pool);
  2582. if (ret == QDF_STATUS_E_FAILURE) {
  2583. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  2584. (nbuf_frag_info_t->virt_addr).nbuf,
  2585. QDF_DMA_FROM_DEVICE,
  2586. rx_desc_pool->buf_size);
  2587. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2588. dp_err("nbuf check x86 failed");
  2589. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2590. return ret;
  2591. }
  2592. return QDF_STATUS_SUCCESS;
  2593. }
  2594. QDF_STATUS
  2595. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2596. struct dp_srng *dp_rxdma_srng,
  2597. struct rx_desc_pool *rx_desc_pool,
  2598. uint32_t num_req_buffers)
  2599. {
  2600. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2601. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2602. union dp_rx_desc_list_elem_t *next;
  2603. void *rxdma_ring_entry;
  2604. qdf_dma_addr_t paddr;
  2605. struct dp_rx_nbuf_frag_info *nf_info;
  2606. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2607. uint32_t buffer_index, nbuf_ptrs_per_page;
  2608. qdf_nbuf_t nbuf;
  2609. QDF_STATUS ret;
  2610. int page_idx, total_pages;
  2611. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2612. union dp_rx_desc_list_elem_t *tail = NULL;
  2613. int sync_hw_ptr = 1;
  2614. uint32_t num_entries_avail;
  2615. if (qdf_unlikely(!rxdma_srng)) {
  2616. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2617. return QDF_STATUS_E_FAILURE;
  2618. }
  2619. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2620. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2621. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2622. rxdma_srng,
  2623. sync_hw_ptr);
  2624. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2625. if (!num_entries_avail) {
  2626. dp_err("Num of available entries is zero, nothing to do");
  2627. return QDF_STATUS_E_NOMEM;
  2628. }
  2629. if (num_entries_avail < num_req_buffers)
  2630. num_req_buffers = num_entries_avail;
  2631. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2632. num_req_buffers, &desc_list, &tail);
  2633. if (!nr_descs) {
  2634. dp_err("no free rx_descs in freelist");
  2635. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2636. return QDF_STATUS_E_NOMEM;
  2637. }
  2638. dp_debug("got %u RX descs for driver attach", nr_descs);
  2639. /*
  2640. * Try to allocate pointers to the nbuf one page at a time.
  2641. * Take pointers that can fit in one page of memory and
  2642. * iterate through the total descriptors that need to be
  2643. * allocated in order of pages. Reuse the pointers that
  2644. * have been allocated to fit in one page across each
  2645. * iteration to index into the nbuf.
  2646. */
  2647. total_pages = (nr_descs * sizeof(*nf_info)) / PAGE_SIZE;
  2648. /*
  2649. * Add an extra page to store the remainder if any
  2650. */
  2651. if ((nr_descs * sizeof(*nf_info)) % PAGE_SIZE)
  2652. total_pages++;
  2653. nf_info = qdf_mem_malloc(PAGE_SIZE);
  2654. if (!nf_info) {
  2655. dp_err("failed to allocate nbuf array");
  2656. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2657. QDF_BUG(0);
  2658. return QDF_STATUS_E_NOMEM;
  2659. }
  2660. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*nf_info);
  2661. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2662. qdf_mem_zero(nf_info, PAGE_SIZE);
  2663. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2664. /*
  2665. * The last page of buffer pointers may not be required
  2666. * completely based on the number of descriptors. Below
  2667. * check will ensure we are allocating only the
  2668. * required number of descriptors.
  2669. */
  2670. if (nr_nbuf_total >= nr_descs)
  2671. break;
  2672. /* Flag is set while pdev rx_desc_pool initialization */
  2673. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2674. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2675. &nf_info[nr_nbuf], dp_pdev,
  2676. rx_desc_pool);
  2677. else
  2678. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2679. &nf_info[nr_nbuf], dp_pdev,
  2680. rx_desc_pool);
  2681. if (QDF_IS_STATUS_ERROR(ret))
  2682. break;
  2683. nr_nbuf_total++;
  2684. }
  2685. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2686. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2687. rxdma_ring_entry =
  2688. hal_srng_src_get_next(dp_soc->hal_soc,
  2689. rxdma_srng);
  2690. qdf_assert_always(rxdma_ring_entry);
  2691. next = desc_list->next;
  2692. paddr = nf_info[buffer_index].paddr;
  2693. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2694. /* Flag is set while pdev rx_desc_pool initialization */
  2695. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2696. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2697. &nf_info[buffer_index]);
  2698. else
  2699. dp_rx_desc_prep(&desc_list->rx_desc,
  2700. &nf_info[buffer_index]);
  2701. desc_list->rx_desc.in_use = 1;
  2702. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2703. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2704. __func__,
  2705. RX_DESC_REPLENISHED);
  2706. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2707. desc_list->rx_desc.cookie,
  2708. rx_desc_pool->owner);
  2709. dp_ipa_handle_rx_buf_smmu_mapping(
  2710. dp_soc, nbuf,
  2711. rx_desc_pool->buf_size,
  2712. true);
  2713. desc_list = next;
  2714. }
  2715. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2716. }
  2717. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2718. qdf_mem_free(nf_info);
  2719. if (!nr_nbuf_total) {
  2720. dp_err("No nbuf's allocated");
  2721. QDF_BUG(0);
  2722. return QDF_STATUS_E_RESOURCES;
  2723. }
  2724. /* No need to count the number of bytes received during replenish.
  2725. * Therefore set replenish.pkts.bytes as 0.
  2726. */
  2727. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2728. return QDF_STATUS_SUCCESS;
  2729. }
  2730. /**
  2731. * dp_rx_enable_mon_dest_frag() - Enable frag processing for
  2732. * monitor destination ring via frag.
  2733. *
  2734. * Enable this flag only for monitor destination buffer processing
  2735. * if DP_RX_MON_MEM_FRAG feature is enabled.
  2736. * If flag is set then frag based function will be called for alloc,
  2737. * map, prep desc and free ops for desc buffer else normal nbuf based
  2738. * function will be called.
  2739. *
  2740. * @rx_desc_pool: Rx desc pool
  2741. * @is_mon_dest_desc: Is it for monitor dest buffer
  2742. *
  2743. * Return: None
  2744. */
  2745. #ifdef DP_RX_MON_MEM_FRAG
  2746. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2747. bool is_mon_dest_desc)
  2748. {
  2749. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2750. if (is_mon_dest_desc)
  2751. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2752. }
  2753. #else
  2754. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2755. bool is_mon_dest_desc)
  2756. {
  2757. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2758. if (is_mon_dest_desc)
  2759. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2760. }
  2761. #endif
  2762. /*
  2763. * dp_rx_pdev_desc_pool_alloc() - allocate memory for software rx descriptor
  2764. * pool
  2765. *
  2766. * @pdev: core txrx pdev context
  2767. *
  2768. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2769. * QDF_STATUS_E_NOMEM
  2770. */
  2771. QDF_STATUS
  2772. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2773. {
  2774. struct dp_soc *soc = pdev->soc;
  2775. uint32_t rxdma_entries;
  2776. uint32_t rx_sw_desc_num;
  2777. struct dp_srng *dp_rxdma_srng;
  2778. struct rx_desc_pool *rx_desc_pool;
  2779. uint32_t status = QDF_STATUS_SUCCESS;
  2780. int mac_for_pdev;
  2781. mac_for_pdev = pdev->lmac_id;
  2782. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2783. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2784. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2785. return status;
  2786. }
  2787. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2788. rxdma_entries = dp_rxdma_srng->num_entries;
  2789. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2790. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2791. rx_desc_pool->desc_type = DP_RX_DESC_BUF_TYPE;
  2792. status = dp_rx_desc_pool_alloc(soc,
  2793. rx_sw_desc_num,
  2794. rx_desc_pool);
  2795. if (status != QDF_STATUS_SUCCESS)
  2796. return status;
  2797. return status;
  2798. }
  2799. /*
  2800. * dp_rx_pdev_desc_pool_free() - free software rx descriptor pool
  2801. *
  2802. * @pdev: core txrx pdev context
  2803. */
  2804. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2805. {
  2806. int mac_for_pdev = pdev->lmac_id;
  2807. struct dp_soc *soc = pdev->soc;
  2808. struct rx_desc_pool *rx_desc_pool;
  2809. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2810. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2811. }
  2812. /*
  2813. * dp_rx_pdev_desc_pool_init() - initialize software rx descriptors
  2814. *
  2815. * @pdev: core txrx pdev context
  2816. *
  2817. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2818. * QDF_STATUS_E_NOMEM
  2819. */
  2820. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2821. {
  2822. int mac_for_pdev = pdev->lmac_id;
  2823. struct dp_soc *soc = pdev->soc;
  2824. uint32_t rxdma_entries;
  2825. uint32_t rx_sw_desc_num;
  2826. struct dp_srng *dp_rxdma_srng;
  2827. struct rx_desc_pool *rx_desc_pool;
  2828. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2829. /**
  2830. * If NSS is enabled, rx_desc_pool is already filled.
  2831. * Hence, just disable desc_pool frag flag.
  2832. */
  2833. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2834. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2835. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2836. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2837. return QDF_STATUS_SUCCESS;
  2838. }
  2839. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2840. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2841. return QDF_STATUS_E_NOMEM;
  2842. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2843. rxdma_entries = dp_rxdma_srng->num_entries;
  2844. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2845. rx_sw_desc_num =
  2846. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2847. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2848. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2849. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2850. /* Disable monitor dest processing via frag */
  2851. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2852. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2853. rx_sw_desc_num, rx_desc_pool);
  2854. return QDF_STATUS_SUCCESS;
  2855. }
  2856. /*
  2857. * dp_rx_pdev_desc_pool_deinit() - de-initialize software rx descriptor pools
  2858. * @pdev: core txrx pdev context
  2859. *
  2860. * This function resets the freelist of rx descriptors and destroys locks
  2861. * associated with this list of descriptors.
  2862. */
  2863. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2864. {
  2865. int mac_for_pdev = pdev->lmac_id;
  2866. struct dp_soc *soc = pdev->soc;
  2867. struct rx_desc_pool *rx_desc_pool;
  2868. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2869. dp_rx_desc_pool_deinit(soc, rx_desc_pool);
  2870. }
  2871. /*
  2872. * dp_rx_pdev_buffers_alloc() - Allocate nbufs (skbs) and replenish RxDMA ring
  2873. *
  2874. * @pdev: core txrx pdev context
  2875. *
  2876. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2877. * QDF_STATUS_E_NOMEM
  2878. */
  2879. QDF_STATUS
  2880. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2881. {
  2882. int mac_for_pdev = pdev->lmac_id;
  2883. struct dp_soc *soc = pdev->soc;
  2884. struct dp_srng *dp_rxdma_srng;
  2885. struct rx_desc_pool *rx_desc_pool;
  2886. uint32_t rxdma_entries;
  2887. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2888. rxdma_entries = dp_rxdma_srng->num_entries;
  2889. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2890. /* Initialize RX buffer pool which will be
  2891. * used during low memory conditions
  2892. */
  2893. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2894. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev, dp_rxdma_srng,
  2895. rx_desc_pool, rxdma_entries - 1);
  2896. }
  2897. /*
  2898. * dp_rx_pdev_buffers_free - Free nbufs (skbs)
  2899. *
  2900. * @pdev: core txrx pdev context
  2901. */
  2902. void
  2903. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2904. {
  2905. int mac_for_pdev = pdev->lmac_id;
  2906. struct dp_soc *soc = pdev->soc;
  2907. struct rx_desc_pool *rx_desc_pool;
  2908. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2909. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2910. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2911. }
  2912. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2913. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  2914. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2915. uint8_t *rx_tlv_hdr)
  2916. {
  2917. uint32_t l2_hdr_offset = 0;
  2918. uint16_t msdu_len = 0;
  2919. uint32_t skip_len;
  2920. l2_hdr_offset =
  2921. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2922. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2923. skip_len = l2_hdr_offset;
  2924. } else {
  2925. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2926. skip_len = l2_hdr_offset + RX_PKT_TLVS_LEN;
  2927. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2928. }
  2929. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2930. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2931. qdf_nbuf_pull_head(nbuf, skip_len);
  2932. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2933. qdf_nbuf_set_exc_frame(nbuf, 1);
  2934. dp_rx_deliver_to_stack(soc, peer->vdev, peer,
  2935. nbuf, NULL);
  2936. return true;
  2937. }
  2938. return false;
  2939. }
  2940. #endif